From 5a9391a692b79ff998aa3d835d06d92f007f0370 Mon Sep 17 00:00:00 2001 From: Johnny Hsu Date: Sun, 3 Nov 2024 14:57:15 +0100 Subject: [PATCH] change git ignore --- .gitignore | 16 +- Software/.gitignore | 9 - .../debug/Core/Lib/can-halal/can-halal.d | 61 + .../debug/Core/Lib/can-halal/can-halal.lst | 1101 + .../debug/Core/Lib/can-halal/can-halal.o | Bin 0 -> 14768 bytes Software/build/debug/Core/Src/adc.d | 60 + Software/build/debug/Core/Src/adc.lst | 225 + Software/build/debug/Core/Src/adc.o | Bin 0 -> 9184 bytes Software/build/debug/Core/Src/main.d | 61 + Software/build/debug/Core/Src/main.lst | 1536 + Software/build/debug/Core/Src/main.o | Bin 0 -> 19164 bytes .../build/debug/Core/Src/stm32f0xx_hal_msp.d | 60 + .../debug/Core/Src/stm32f0xx_hal_msp.lst | 1112 + .../build/debug/Core/Src/stm32f0xx_hal_msp.o | Bin 0 -> 15964 bytes Software/build/debug/Core/Src/stm32f0xx_it.d | 62 + .../build/debug/Core/Src/stm32f0xx_it.lst | 291 + Software/build/debug/Core/Src/stm32f0xx_it.o | Bin 0 -> 3816 bytes .../build/debug/Core/Src/system_stm32f0xx.d | 59 + .../build/debug/Core/Src/system_stm32f0xx.lst | 571 + .../build/debug/Core/Src/system_stm32f0xx.o | Bin 0 -> 5752 bytes .../STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d | 60 + .../Src/stm32f0xx_hal.lst | 1504 + .../STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o | Bin 0 -> 15332 bytes .../Src/stm32f0xx_hal_adc.d | 60 + .../Src/stm32f0xx_hal_adc.lst | 6963 ++++ .../Src/stm32f0xx_hal_adc.o | Bin 0 -> 28704 bytes .../Src/stm32f0xx_hal_adc_ex.d | 60 + .../Src/stm32f0xx_hal_adc_ex.lst | 424 + .../Src/stm32f0xx_hal_adc_ex.o | Bin 0 -> 7384 bytes .../Src/stm32f0xx_hal_can.d | 60 + .../Src/stm32f0xx_hal_can.lst | 6702 ++++ .../Src/stm32f0xx_hal_can.o | Bin 0 -> 31412 bytes .../Src/stm32f0xx_hal_cortex.d | 60 + .../Src/stm32f0xx_hal_cortex.lst | 3268 ++ .../Src/stm32f0xx_hal_cortex.o | Bin 0 -> 13844 bytes .../Src/stm32f0xx_hal_dma.d | 60 + .../Src/stm32f0xx_hal_dma.lst | 3197 ++ .../Src/stm32f0xx_hal_dma.o | Bin 0 -> 16988 bytes .../Src/stm32f0xx_hal_exti.d | 60 + .../Src/stm32f0xx_hal_exti.lst | 1584 + .../Src/stm32f0xx_hal_exti.o | Bin 0 -> 10944 bytes .../Src/stm32f0xx_hal_flash.d | 60 + .../Src/stm32f0xx_hal_flash.lst | 2253 ++ .../Src/stm32f0xx_hal_flash.o | Bin 0 -> 13700 bytes .../Src/stm32f0xx_hal_flash_ex.d | 60 + .../Src/stm32f0xx_hal_flash_ex.lst | 2940 ++ .../Src/stm32f0xx_hal_flash_ex.o | Bin 0 -> 17040 bytes .../Src/stm32f0xx_hal_gpio.d | 60 + .../Src/stm32f0xx_hal_gpio.lst | 1725 + .../Src/stm32f0xx_hal_gpio.o | Bin 0 -> 10700 bytes .../Src/stm32f0xx_hal_i2c.d | 60 + .../Src/stm32f0xx_hal_i2c.lst | 30078 ++++++++++++++++ .../Src/stm32f0xx_hal_i2c.o | Bin 0 -> 112684 bytes .../Src/stm32f0xx_hal_i2c_ex.d | 60 + .../Src/stm32f0xx_hal_i2c_ex.lst | 992 + .../Src/stm32f0xx_hal_i2c_ex.o | Bin 0 -> 11000 bytes .../Src/stm32f0xx_hal_pwr.d | 60 + .../Src/stm32f0xx_hal_pwr.lst | 1031 + .../Src/stm32f0xx_hal_pwr.o | Bin 0 -> 8628 bytes .../Src/stm32f0xx_hal_pwr_ex.d | 60 + .../Src/stm32f0xx_hal_pwr_ex.lst | 724 + .../Src/stm32f0xx_hal_pwr_ex.o | Bin 0 -> 6804 bytes .../Src/stm32f0xx_hal_rcc.d | 60 + .../Src/stm32f0xx_hal_rcc.lst | 4462 +++ .../Src/stm32f0xx_hal_rcc.o | Bin 0 -> 20020 bytes .../Src/stm32f0xx_hal_rcc_ex.d | 60 + .../Src/stm32f0xx_hal_rcc_ex.lst | 2750 ++ .../Src/stm32f0xx_hal_rcc_ex.o | Bin 0 -> 15268 bytes .../Src/stm32f0xx_hal_tim.d | 60 + .../Src/stm32f0xx_hal_tim.lst | 29587 +++++++++++++++ .../Src/stm32f0xx_hal_tim.o | Bin 0 -> 118148 bytes .../Src/stm32f0xx_hal_tim_ex.d | 60 + .../Src/stm32f0xx_hal_tim_ex.lst | 10316 ++++++ .../Src/stm32f0xx_hal_tim_ex.o | Bin 0 -> 49392 bytes Software/build/debug/startup_stm32f042x6.o | Bin 0 -> 4624 bytes 75 files changed, 116787 insertions(+), 17 deletions(-) delete mode 100644 Software/.gitignore create mode 100644 Software/build/debug/Core/Lib/can-halal/can-halal.d create mode 100644 Software/build/debug/Core/Lib/can-halal/can-halal.lst create mode 100644 Software/build/debug/Core/Lib/can-halal/can-halal.o create mode 100644 Software/build/debug/Core/Src/adc.d create mode 100644 Software/build/debug/Core/Src/adc.lst create mode 100644 Software/build/debug/Core/Src/adc.o create mode 100644 Software/build/debug/Core/Src/main.d create mode 100644 Software/build/debug/Core/Src/main.lst create mode 100644 Software/build/debug/Core/Src/main.o create mode 100644 Software/build/debug/Core/Src/stm32f0xx_hal_msp.d create mode 100644 Software/build/debug/Core/Src/stm32f0xx_hal_msp.lst create mode 100644 Software/build/debug/Core/Src/stm32f0xx_hal_msp.o create mode 100644 Software/build/debug/Core/Src/stm32f0xx_it.d create mode 100644 Software/build/debug/Core/Src/stm32f0xx_it.lst create mode 100644 Software/build/debug/Core/Src/stm32f0xx_it.o create mode 100644 Software/build/debug/Core/Src/system_stm32f0xx.d create mode 100644 Software/build/debug/Core/Src/system_stm32f0xx.lst create mode 100644 Software/build/debug/Core/Src/system_stm32f0xx.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.d create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.lst create mode 100644 Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o create mode 100644 Software/build/debug/startup_stm32f042x6.o diff --git a/.gitignore b/.gitignore index fed034b..ef12439 100644 --- a/.gitignore +++ b/.gitignore @@ -2,14 +2,14 @@ Manual/* Datenblätter/* -Software/.vscode/* -Software/build/* -Software/Debug -Software/.cache/* -Software/compile_commands.json -Software/STM32Make.make -Software/.metadata/* -Software/openocd.cfg +/.vscode/ +/build/ +/Debug +/.cache/ +compile_commands.json +STM32Make.make +/.metadata/ +openocd.cfg Simulation/* !Simulation/SLS_Sim.asc diff --git a/Software/.gitignore b/Software/.gitignore deleted file mode 100644 index 235ace8..0000000 --- a/Software/.gitignore +++ /dev/null @@ -1,9 +0,0 @@ -/.vscode/ -/build/ -/Debug -/.cache/ -.clangd -compile_commands.json -STM32Make.make -/.metadata/ -openocd.cfg \ No newline at end of file diff --git a/Software/build/debug/Core/Lib/can-halal/can-halal.d b/Software/build/debug/Core/Lib/can-halal/can-halal.d new file mode 100644 index 0000000..7e9a59d --- /dev/null +++ b/Software/build/debug/Core/Lib/can-halal/can-halal.d @@ -0,0 +1,61 @@ +build/debug/Core/Lib/can-halal/can-halal.o: \ + Core/Lib/can-halal/can-halal.c Core/Lib/can-halal/can-halal.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Core/Lib/can-halal/can-halal.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Core/Lib/can-halal/can-halal.lst b/Software/build/debug/Core/Lib/can-halal/can-halal.lst new file mode 100644 index 0000000..5ac12b3 --- /dev/null +++ b/Software/build/debug/Core/Lib/can-halal/can-halal.lst @@ -0,0 +1,1101 @@ +ARM GAS /tmp/cc39XKgG.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "can-halal.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Core/Lib/can-halal/can-halal.c" + 18 .section .text.ftcan_init,"ax",%progbits + 19 .align 1 + 20 .global ftcan_init + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 ftcan_init: + 26 .LVL0: + 27 .LFB40: + 1:Core/Lib/can-halal/can-halal.c **** #include "can-halal.h" + 2:Core/Lib/can-halal/can-halal.c **** + 3:Core/Lib/can-halal/can-halal.c **** #include + 4:Core/Lib/can-halal/can-halal.c **** + 5:Core/Lib/can-halal/can-halal.c **** #if defined(FTCAN_IS_BXCAN) + 6:Core/Lib/can-halal/can-halal.c **** static CAN_HandleTypeDef *hcan; + 7:Core/Lib/can-halal/can-halal.c **** + 8:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *handle) { + 28 .loc 1 8 57 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 8 57 is_stmt 0 view .LVU1 + 33 0000 10B5 push {r4, lr} + 34 .cfi_def_cfa_offset 8 + 35 .cfi_offset 4, -8 + 36 .cfi_offset 14, -4 + 9:Core/Lib/can-halal/can-halal.c **** hcan = handle; + 37 .loc 1 9 3 is_stmt 1 view .LVU2 + 38 .loc 1 9 8 is_stmt 0 view .LVU3 + 39 0002 064B ldr r3, .L4 + 40 0004 1860 str r0, [r3] + 10:Core/Lib/can-halal/can-halal.c **** + 11:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef status = + 41 .loc 1 11 3 is_stmt 1 view .LVU4 + 12:Core/Lib/can-halal/can-halal.c **** HAL_CAN_ActivateNotification(hcan, CAN_IT_RX_FIFO0_MSG_PENDING); + 42 .loc 1 12 7 is_stmt 0 view .LVU5 + 43 0006 0221 movs r1, #2 + 44 0008 FFF7FEFF bl HAL_CAN_ActivateNotification + 45 .LVL1: + 13:Core/Lib/can-halal/can-halal.c **** if (status != HAL_OK) { + ARM GAS /tmp/cc39XKgG.s page 2 + + + 46 .loc 1 13 3 is_stmt 1 view .LVU6 + 47 .loc 1 13 6 is_stmt 0 view .LVU7 + 48 000c 0028 cmp r0, #0 + 49 000e 00D0 beq .L3 + 50 .LVL2: + 51 .L2: + 14:Core/Lib/can-halal/can-halal.c **** return status; + 15:Core/Lib/can-halal/can-halal.c **** } + 16:Core/Lib/can-halal/can-halal.c **** + 17:Core/Lib/can-halal/can-halal.c **** return HAL_CAN_Start(hcan); + 18:Core/Lib/can-halal/can-halal.c **** } + 52 .loc 1 18 1 view .LVU8 + 53 @ sp needed + 54 0010 10BD pop {r4, pc} + 55 .LVL3: + 56 .L3: + 17:Core/Lib/can-halal/can-halal.c **** } + 57 .loc 1 17 3 is_stmt 1 view .LVU9 + 17:Core/Lib/can-halal/can-halal.c **** } + 58 .loc 1 17 10 is_stmt 0 view .LVU10 + 59 0012 024B ldr r3, .L4 + 60 0014 1868 ldr r0, [r3] + 61 .LVL4: + 17:Core/Lib/can-halal/can-halal.c **** } + 62 .loc 1 17 10 view .LVU11 + 63 0016 FFF7FEFF bl HAL_CAN_Start + 64 .LVL5: + 65 001a F9E7 b .L2 + 66 .L5: + 67 .align 2 + 68 .L4: + 69 001c 00000000 .word hcan + 70 .cfi_endproc + 71 .LFE40: + 73 .section .text.ftcan_transmit,"ax",%progbits + 74 .align 1 + 75 .global ftcan_transmit + 76 .syntax unified + 77 .code 16 + 78 .thumb_func + 80 ftcan_transmit: + 81 .LVL6: + 82 .LFB41: + 19:Core/Lib/can-halal/can-halal.c **** + 20:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data, + 21:Core/Lib/can-halal/can-halal.c **** size_t datalen) { + 83 .loc 1 21 50 is_stmt 1 view -0 + 84 .cfi_startproc + 85 @ args = 0, pretend = 0, frame = 8 + 86 @ frame_needed = 0, uses_anonymous_args = 0 + 87 .loc 1 21 50 is_stmt 0 view .LVU13 + 88 0000 10B5 push {r4, lr} + 89 .cfi_def_cfa_offset 8 + 90 .cfi_offset 4, -8 + 91 .cfi_offset 14, -4 + 92 0002 82B0 sub sp, sp, #8 + 93 .cfi_def_cfa_offset 16 + ARM GAS /tmp/cc39XKgG.s page 3 + + + 94 0004 0C00 movs r4, r1 + 22:Core/Lib/can-halal/can-halal.c **** static CAN_TxHeaderTypeDef header; + 95 .loc 1 22 3 is_stmt 1 view .LVU14 + 23:Core/Lib/can-halal/can-halal.c **** header.StdId = id; + 96 .loc 1 23 3 view .LVU15 + 97 .loc 1 23 16 is_stmt 0 view .LVU16 + 98 0006 0749 ldr r1, .L7 + 99 .LVL7: + 100 .loc 1 23 16 view .LVU17 + 101 0008 0860 str r0, [r1] + 24:Core/Lib/can-halal/can-halal.c **** header.IDE = CAN_ID_STD; + 102 .loc 1 24 3 is_stmt 1 view .LVU18 + 103 .loc 1 24 14 is_stmt 0 view .LVU19 + 104 000a 0023 movs r3, #0 + 105 000c 8B60 str r3, [r1, #8] + 25:Core/Lib/can-halal/can-halal.c **** header.RTR = CAN_RTR_DATA; + 106 .loc 1 25 3 is_stmt 1 view .LVU20 + 107 .loc 1 25 14 is_stmt 0 view .LVU21 + 108 000e CB60 str r3, [r1, #12] + 26:Core/Lib/can-halal/can-halal.c **** header.DLC = datalen; + 109 .loc 1 26 3 is_stmt 1 view .LVU22 + 110 .loc 1 26 14 is_stmt 0 view .LVU23 + 111 0010 0A61 str r2, [r1, #16] + 27:Core/Lib/can-halal/can-halal.c **** uint32_t mailbox; + 112 .loc 1 27 3 is_stmt 1 view .LVU24 + 28:Core/Lib/can-halal/can-halal.c **** return HAL_CAN_AddTxMessage(hcan, &header, data, &mailbox); + 113 .loc 1 28 3 view .LVU25 + 114 .loc 1 28 10 is_stmt 0 view .LVU26 + 115 0012 054B ldr r3, .L7+4 + 116 0014 1868 ldr r0, [r3] + 117 .LVL8: + 118 .loc 1 28 10 view .LVU27 + 119 0016 01AB add r3, sp, #4 + 120 0018 2200 movs r2, r4 + 121 .LVL9: + 122 .loc 1 28 10 view .LVU28 + 123 001a FFF7FEFF bl HAL_CAN_AddTxMessage + 124 .LVL10: + 29:Core/Lib/can-halal/can-halal.c **** } + 125 .loc 1 29 1 view .LVU29 + 126 001e 02B0 add sp, sp, #8 + 127 @ sp needed + 128 .LVL11: + 129 .loc 1 29 1 view .LVU30 + 130 0020 10BD pop {r4, pc} + 131 .L8: + 132 0022 C046 .align 2 + 133 .L7: + 134 0024 00000000 .word header.2 + 135 0028 00000000 .word hcan + 136 .cfi_endproc + 137 .LFE41: + 139 .section .text.ftcan_add_filter,"ax",%progbits + 140 .align 1 + 141 .global ftcan_add_filter + 142 .syntax unified + 143 .code 16 + ARM GAS /tmp/cc39XKgG.s page 4 + + + 144 .thumb_func + 146 ftcan_add_filter: + 147 .LVL12: + 148 .LFB42: + 30:Core/Lib/can-halal/can-halal.c **** + 31:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask) { + 149 .loc 1 31 64 is_stmt 1 view -0 + 150 .cfi_startproc + 151 @ args = 0, pretend = 0, frame = 0 + 152 @ frame_needed = 0, uses_anonymous_args = 0 + 153 .loc 1 31 64 is_stmt 0 view .LVU32 + 154 0000 10B5 push {r4, lr} + 155 .cfi_def_cfa_offset 8 + 156 .cfi_offset 4, -8 + 157 .cfi_offset 14, -4 + 32:Core/Lib/can-halal/can-halal.c **** static uint32_t next_filter_no = 0; + 158 .loc 1 32 3 is_stmt 1 view .LVU33 + 33:Core/Lib/can-halal/can-halal.c **** static CAN_FilterTypeDef filter; + 159 .loc 1 33 3 view .LVU34 + 34:Core/Lib/can-halal/can-halal.c **** if (next_filter_no % 2 == 0) { + 160 .loc 1 34 3 view .LVU35 + 161 .loc 1 34 22 is_stmt 0 view .LVU36 + 162 0002 164B ldr r3, .L15 + 163 0004 1B68 ldr r3, [r3] + 164 .loc 1 34 6 view .LVU37 + 165 0006 DA07 lsls r2, r3, #31 + 166 0008 0FD4 bmi .L10 + 35:Core/Lib/can-halal/can-halal.c **** filter.FilterIdHigh = id << 5; + 167 .loc 1 35 5 is_stmt 1 view .LVU38 + 168 .loc 1 35 30 is_stmt 0 view .LVU39 + 169 000a 4001 lsls r0, r0, #5 + 170 .LVL13: + 171 .loc 1 35 25 view .LVU40 + 172 000c 144A ldr r2, .L15+4 + 173 000e 1060 str r0, [r2] + 36:Core/Lib/can-halal/can-halal.c **** filter.FilterMaskIdHigh = mask << 5; + 174 .loc 1 36 5 is_stmt 1 view .LVU41 + 175 .loc 1 36 36 is_stmt 0 view .LVU42 + 176 0010 4901 lsls r1, r1, #5 + 177 .LVL14: + 178 .loc 1 36 29 view .LVU43 + 179 0012 9160 str r1, [r2, #8] + 37:Core/Lib/can-halal/can-halal.c **** filter.FilterIdLow = id << 5; + 180 .loc 1 37 5 is_stmt 1 view .LVU44 + 181 .loc 1 37 24 is_stmt 0 view .LVU45 + 182 0014 5060 str r0, [r2, #4] + 38:Core/Lib/can-halal/can-halal.c **** filter.FilterMaskIdLow = mask << 5; + 183 .loc 1 38 5 is_stmt 1 view .LVU46 + 184 .loc 1 38 28 is_stmt 0 view .LVU47 + 185 0016 D160 str r1, [r2, #12] + 186 .L11: + 39:Core/Lib/can-halal/can-halal.c **** } else { + 40:Core/Lib/can-halal/can-halal.c **** // Leave high filter untouched from the last configuration + 41:Core/Lib/can-halal/can-halal.c **** filter.FilterIdLow = id << 5; + 42:Core/Lib/can-halal/can-halal.c **** filter.FilterMaskIdLow = mask << 5; + 43:Core/Lib/can-halal/can-halal.c **** } + 44:Core/Lib/can-halal/can-halal.c **** filter.FilterFIFOAssignment = CAN_FILTER_FIFO0; + ARM GAS /tmp/cc39XKgG.s page 5 + + + 187 .loc 1 44 3 is_stmt 1 view .LVU48 + 188 .loc 1 44 31 is_stmt 0 view .LVU49 + 189 0018 114A ldr r2, .L15+4 + 190 001a 0021 movs r1, #0 + 191 001c 1161 str r1, [r2, #16] + 45:Core/Lib/can-halal/can-halal.c **** filter.FilterBank = next_filter_no / 2; + 192 .loc 1 45 3 is_stmt 1 view .LVU50 + 193 .loc 1 45 38 is_stmt 0 view .LVU51 + 194 001e 5908 lsrs r1, r3, #1 + 195 .loc 1 45 21 view .LVU52 + 196 0020 5161 str r1, [r2, #20] + 46:Core/Lib/can-halal/can-halal.c **** if (filter.FilterBank > FTCAN_NUM_FILTERS + 1) { + 197 .loc 1 46 3 is_stmt 1 view .LVU53 + 198 .loc 1 46 6 is_stmt 0 view .LVU54 + 199 0022 1D2B cmp r3, #29 + 200 0024 07D9 bls .L14 + 47:Core/Lib/can-halal/can-halal.c **** return HAL_ERROR; + 201 .loc 1 47 12 view .LVU55 + 202 0026 0120 movs r0, #1 + 203 .L12: + 48:Core/Lib/can-halal/can-halal.c **** } + 49:Core/Lib/can-halal/can-halal.c **** filter.FilterMode = CAN_FILTERMODE_IDMASK; + 50:Core/Lib/can-halal/can-halal.c **** filter.FilterScale = CAN_FILTERSCALE_16BIT; + 51:Core/Lib/can-halal/can-halal.c **** filter.FilterActivation = CAN_FILTER_ENABLE; + 52:Core/Lib/can-halal/can-halal.c **** + 53:Core/Lib/can-halal/can-halal.c **** // Disable slave filters + 54:Core/Lib/can-halal/can-halal.c **** // TODO: Some STM32 have multiple CAN peripherals, and one uses the slave + 55:Core/Lib/can-halal/can-halal.c **** // filter bank + 56:Core/Lib/can-halal/can-halal.c **** filter.SlaveStartFilterBank = FTCAN_NUM_FILTERS; + 57:Core/Lib/can-halal/can-halal.c **** + 58:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef status = HAL_CAN_ConfigFilter(hcan, &filter); + 59:Core/Lib/can-halal/can-halal.c **** if (status == HAL_OK) { + 60:Core/Lib/can-halal/can-halal.c **** next_filter_no++; + 61:Core/Lib/can-halal/can-halal.c **** } + 62:Core/Lib/can-halal/can-halal.c **** return status; + 63:Core/Lib/can-halal/can-halal.c **** } + 204 .loc 1 63 1 view .LVU56 + 205 @ sp needed + 206 0028 10BD pop {r4, pc} + 207 .LVL15: + 208 .L10: + 41:Core/Lib/can-halal/can-halal.c **** filter.FilterMaskIdLow = mask << 5; + 209 .loc 1 41 5 is_stmt 1 view .LVU57 + 41:Core/Lib/can-halal/can-halal.c **** filter.FilterMaskIdLow = mask << 5; + 210 .loc 1 41 29 is_stmt 0 view .LVU58 + 211 002a 4001 lsls r0, r0, #5 + 212 .LVL16: + 41:Core/Lib/can-halal/can-halal.c **** filter.FilterMaskIdLow = mask << 5; + 213 .loc 1 41 24 view .LVU59 + 214 002c 0C4A ldr r2, .L15+4 + 215 002e 5060 str r0, [r2, #4] + 42:Core/Lib/can-halal/can-halal.c **** } + 216 .loc 1 42 5 is_stmt 1 view .LVU60 + 42:Core/Lib/can-halal/can-halal.c **** } + 217 .loc 1 42 35 is_stmt 0 view .LVU61 + 218 0030 4901 lsls r1, r1, #5 + 219 .LVL17: + ARM GAS /tmp/cc39XKgG.s page 6 + + + 42:Core/Lib/can-halal/can-halal.c **** } + 220 .loc 1 42 28 view .LVU62 + 221 0032 D160 str r1, [r2, #12] + 222 0034 F0E7 b .L11 + 223 .L14: + 49:Core/Lib/can-halal/can-halal.c **** filter.FilterScale = CAN_FILTERSCALE_16BIT; + 224 .loc 1 49 3 is_stmt 1 view .LVU63 + 49:Core/Lib/can-halal/can-halal.c **** filter.FilterScale = CAN_FILTERSCALE_16BIT; + 225 .loc 1 49 21 is_stmt 0 view .LVU64 + 226 0036 1100 movs r1, r2 + 227 0038 0023 movs r3, #0 + 228 003a 9361 str r3, [r2, #24] + 50:Core/Lib/can-halal/can-halal.c **** filter.FilterActivation = CAN_FILTER_ENABLE; + 229 .loc 1 50 3 is_stmt 1 view .LVU65 + 50:Core/Lib/can-halal/can-halal.c **** filter.FilterActivation = CAN_FILTER_ENABLE; + 230 .loc 1 50 22 is_stmt 0 view .LVU66 + 231 003c D361 str r3, [r2, #28] + 51:Core/Lib/can-halal/can-halal.c **** + 232 .loc 1 51 3 is_stmt 1 view .LVU67 + 51:Core/Lib/can-halal/can-halal.c **** + 233 .loc 1 51 27 is_stmt 0 view .LVU68 + 234 003e 0133 adds r3, r3, #1 + 235 0040 1362 str r3, [r2, #32] + 56:Core/Lib/can-halal/can-halal.c **** + 236 .loc 1 56 3 is_stmt 1 view .LVU69 + 56:Core/Lib/can-halal/can-halal.c **** + 237 .loc 1 56 31 is_stmt 0 view .LVU70 + 238 0042 0C33 adds r3, r3, #12 + 239 0044 5362 str r3, [r2, #36] + 58:Core/Lib/can-halal/can-halal.c **** if (status == HAL_OK) { + 240 .loc 1 58 3 is_stmt 1 view .LVU71 + 58:Core/Lib/can-halal/can-halal.c **** if (status == HAL_OK) { + 241 .loc 1 58 30 is_stmt 0 view .LVU72 + 242 0046 074B ldr r3, .L15+8 + 243 0048 1868 ldr r0, [r3] + 244 004a FFF7FEFF bl HAL_CAN_ConfigFilter + 245 .LVL18: + 59:Core/Lib/can-halal/can-halal.c **** next_filter_no++; + 246 .loc 1 59 3 is_stmt 1 view .LVU73 + 59:Core/Lib/can-halal/can-halal.c **** next_filter_no++; + 247 .loc 1 59 6 is_stmt 0 view .LVU74 + 248 004e 0028 cmp r0, #0 + 249 0050 EAD1 bne .L12 + 60:Core/Lib/can-halal/can-halal.c **** } + 250 .loc 1 60 5 is_stmt 1 view .LVU75 + 60:Core/Lib/can-halal/can-halal.c **** } + 251 .loc 1 60 19 is_stmt 0 view .LVU76 + 252 0052 024A ldr r2, .L15 + 253 0054 1368 ldr r3, [r2] + 254 0056 0133 adds r3, r3, #1 + 255 0058 1360 str r3, [r2] + 256 005a E5E7 b .L12 + 257 .L16: + 258 .align 2 + 259 .L15: + 260 005c 00000000 .word next_filter_no.1 + 261 0060 00000000 .word filter.0 + ARM GAS /tmp/cc39XKgG.s page 7 + + + 262 0064 00000000 .word hcan + 263 .cfi_endproc + 264 .LFE42: + 266 .section .text.ftcan_msg_received_cb,"ax",%progbits + 267 .align 1 + 268 .weak ftcan_msg_received_cb + 269 .syntax unified + 270 .code 16 + 271 .thumb_func + 273 ftcan_msg_received_cb: + 274 .LVL19: + 275 .LFB44: + 64:Core/Lib/can-halal/can-halal.c **** + 65:Core/Lib/can-halal/can-halal.c **** void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *handle) { + 66:Core/Lib/can-halal/can-halal.c **** if (handle != hcan) { + 67:Core/Lib/can-halal/can-halal.c **** return; + 68:Core/Lib/can-halal/can-halal.c **** } + 69:Core/Lib/can-halal/can-halal.c **** CAN_RxHeaderTypeDef header; + 70:Core/Lib/can-halal/can-halal.c **** uint8_t data[8]; + 71:Core/Lib/can-halal/can-halal.c **** if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &header, data) != HAL_OK) { + 72:Core/Lib/can-halal/can-halal.c **** return; + 73:Core/Lib/can-halal/can-halal.c **** } + 74:Core/Lib/can-halal/can-halal.c **** + 75:Core/Lib/can-halal/can-halal.c **** if (header.IDE != CAN_ID_STD) { + 76:Core/Lib/can-halal/can-halal.c **** return; + 77:Core/Lib/can-halal/can-halal.c **** } + 78:Core/Lib/can-halal/can-halal.c **** + 79:Core/Lib/can-halal/can-halal.c **** ftcan_msg_received_cb(header.StdId, header.DLC, data); + 80:Core/Lib/can-halal/can-halal.c **** } + 81:Core/Lib/can-halal/can-halal.c **** #elif defined(FTCAN_IS_FDCAN) + 82:Core/Lib/can-halal/can-halal.c **** static FDCAN_HandleTypeDef *hcan; + 83:Core/Lib/can-halal/can-halal.c **** + 84:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef ftcan_init(FDCAN_HandleTypeDef *handle) { + 85:Core/Lib/can-halal/can-halal.c **** hcan = handle; + 86:Core/Lib/can-halal/can-halal.c **** + 87:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef status = + 88:Core/Lib/can-halal/can-halal.c **** HAL_FDCAN_ActivateNotification(hcan, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0); + 89:Core/Lib/can-halal/can-halal.c **** if (status != HAL_OK) { + 90:Core/Lib/can-halal/can-halal.c **** return status; + 91:Core/Lib/can-halal/can-halal.c **** } + 92:Core/Lib/can-halal/can-halal.c **** // Reject non-matching messages + 93:Core/Lib/can-halal/can-halal.c **** status = + 94:Core/Lib/can-halal/can-halal.c **** HAL_FDCAN_ConfigGlobalFilter(hcan, FDCAN_REJECT, FDCAN_REJECT, + 95:Core/Lib/can-halal/can-halal.c **** FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE); + 96:Core/Lib/can-halal/can-halal.c **** if (status != HAL_OK) { + 97:Core/Lib/can-halal/can-halal.c **** return status; + 98:Core/Lib/can-halal/can-halal.c **** } + 99:Core/Lib/can-halal/can-halal.c **** + 100:Core/Lib/can-halal/can-halal.c **** return HAL_FDCAN_Start(hcan); + 101:Core/Lib/can-halal/can-halal.c **** } + 102:Core/Lib/can-halal/can-halal.c **** + 103:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data, + 104:Core/Lib/can-halal/can-halal.c **** size_t datalen) { + 105:Core/Lib/can-halal/can-halal.c **** static FDCAN_TxHeaderTypeDef header; + 106:Core/Lib/can-halal/can-halal.c **** header.Identifier = id; + 107:Core/Lib/can-halal/can-halal.c **** header.IdType = FDCAN_STANDARD_ID; + 108:Core/Lib/can-halal/can-halal.c **** header.TxFrameType = FDCAN_DATA_FRAME; + ARM GAS /tmp/cc39XKgG.s page 8 + + + 109:Core/Lib/can-halal/can-halal.c **** switch (datalen) { + 110:Core/Lib/can-halal/can-halal.c **** case 0: + 111:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_0; + 112:Core/Lib/can-halal/can-halal.c **** break; + 113:Core/Lib/can-halal/can-halal.c **** case 1: + 114:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_1; + 115:Core/Lib/can-halal/can-halal.c **** break; + 116:Core/Lib/can-halal/can-halal.c **** case 2: + 117:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_2; + 118:Core/Lib/can-halal/can-halal.c **** break; + 119:Core/Lib/can-halal/can-halal.c **** case 3: + 120:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_3; + 121:Core/Lib/can-halal/can-halal.c **** break; + 122:Core/Lib/can-halal/can-halal.c **** case 4: + 123:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_4; + 124:Core/Lib/can-halal/can-halal.c **** break; + 125:Core/Lib/can-halal/can-halal.c **** case 5: + 126:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_5; + 127:Core/Lib/can-halal/can-halal.c **** break; + 128:Core/Lib/can-halal/can-halal.c **** case 6: + 129:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_6; + 130:Core/Lib/can-halal/can-halal.c **** break; + 131:Core/Lib/can-halal/can-halal.c **** case 7: + 132:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_7; + 133:Core/Lib/can-halal/can-halal.c **** break; + 134:Core/Lib/can-halal/can-halal.c **** case 8: + 135:Core/Lib/can-halal/can-halal.c **** default: + 136:Core/Lib/can-halal/can-halal.c **** header.DataLength = FDCAN_DLC_BYTES_8; + 137:Core/Lib/can-halal/can-halal.c **** break; + 138:Core/Lib/can-halal/can-halal.c **** } + 139:Core/Lib/can-halal/can-halal.c **** header.ErrorStateIndicator = FDCAN_ESI_PASSIVE; + 140:Core/Lib/can-halal/can-halal.c **** header.BitRateSwitch = FDCAN_BRS_OFF; + 141:Core/Lib/can-halal/can-halal.c **** header.FDFormat = FDCAN_CLASSIC_CAN; + 142:Core/Lib/can-halal/can-halal.c **** header.TxEventFifoControl = FDCAN_NO_TX_EVENTS; + 143:Core/Lib/can-halal/can-halal.c **** + 144:Core/Lib/can-halal/can-halal.c **** // HAL_FDCAN_AddMessageToTxFifoQ doesn't modify the data, but it's not marked + 145:Core/Lib/can-halal/can-halal.c **** // as const for some reason. + 146:Core/Lib/can-halal/can-halal.c **** uint8_t *data_nonconst = (uint8_t *)data; + 147:Core/Lib/can-halal/can-halal.c **** return HAL_FDCAN_AddMessageToTxFifoQ(hcan, &header, data_nonconst); + 148:Core/Lib/can-halal/can-halal.c **** } + 149:Core/Lib/can-halal/can-halal.c **** + 150:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask) { + 151:Core/Lib/can-halal/can-halal.c **** static uint32_t next_filter_no = 0; + 152:Core/Lib/can-halal/can-halal.c **** static FDCAN_FilterTypeDef filter; + 153:Core/Lib/can-halal/can-halal.c **** filter.IdType = FDCAN_STANDARD_ID; + 154:Core/Lib/can-halal/can-halal.c **** filter.FilterIndex = next_filter_no; + 155:Core/Lib/can-halal/can-halal.c **** if (filter.FilterIndex > FTCAN_NUM_FILTERS + 1) { + 156:Core/Lib/can-halal/can-halal.c **** return HAL_ERROR; + 157:Core/Lib/can-halal/can-halal.c **** } + 158:Core/Lib/can-halal/can-halal.c **** filter.FilterType = FDCAN_FILTER_MASK; + 159:Core/Lib/can-halal/can-halal.c **** filter.FilterConfig = FDCAN_FILTER_TO_RXFIFO0; + 160:Core/Lib/can-halal/can-halal.c **** filter.FilterID1 = id; + 161:Core/Lib/can-halal/can-halal.c **** filter.FilterID2 = mask; + 162:Core/Lib/can-halal/can-halal.c **** + 163:Core/Lib/can-halal/can-halal.c **** HAL_StatusTypeDef status = HAL_FDCAN_ConfigFilter(hcan, &filter); + 164:Core/Lib/can-halal/can-halal.c **** if (status == HAL_OK) { + 165:Core/Lib/can-halal/can-halal.c **** next_filter_no++; + ARM GAS /tmp/cc39XKgG.s page 9 + + + 166:Core/Lib/can-halal/can-halal.c **** } + 167:Core/Lib/can-halal/can-halal.c **** return status; + 168:Core/Lib/can-halal/can-halal.c **** } + 169:Core/Lib/can-halal/can-halal.c **** + 170:Core/Lib/can-halal/can-halal.c **** void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *handle, + 171:Core/Lib/can-halal/can-halal.c **** uint32_t RxFifo0ITs) { + 172:Core/Lib/can-halal/can-halal.c **** if (handle != hcan || (RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE) == RESET) { + 173:Core/Lib/can-halal/can-halal.c **** return; + 174:Core/Lib/can-halal/can-halal.c **** } + 175:Core/Lib/can-halal/can-halal.c **** + 176:Core/Lib/can-halal/can-halal.c **** static FDCAN_RxHeaderTypeDef header; + 177:Core/Lib/can-halal/can-halal.c **** static uint8_t data[8]; + 178:Core/Lib/can-halal/can-halal.c **** if (HAL_FDCAN_GetRxMessage(hcan, FDCAN_RX_FIFO0, &header, data) != HAL_OK) { + 179:Core/Lib/can-halal/can-halal.c **** return; + 180:Core/Lib/can-halal/can-halal.c **** } + 181:Core/Lib/can-halal/can-halal.c **** + 182:Core/Lib/can-halal/can-halal.c **** if (header.FDFormat != FDCAN_CLASSIC_CAN || + 183:Core/Lib/can-halal/can-halal.c **** header.RxFrameType != FDCAN_DATA_FRAME || + 184:Core/Lib/can-halal/can-halal.c **** header.IdType != FDCAN_STANDARD_ID) { + 185:Core/Lib/can-halal/can-halal.c **** return; + 186:Core/Lib/can-halal/can-halal.c **** } + 187:Core/Lib/can-halal/can-halal.c **** + 188:Core/Lib/can-halal/can-halal.c **** size_t datalen; + 189:Core/Lib/can-halal/can-halal.c **** switch (header.DataLength) { + 190:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_0: + 191:Core/Lib/can-halal/can-halal.c **** datalen = 0; + 192:Core/Lib/can-halal/can-halal.c **** break; + 193:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_1: + 194:Core/Lib/can-halal/can-halal.c **** datalen = 1; + 195:Core/Lib/can-halal/can-halal.c **** break; + 196:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_2: + 197:Core/Lib/can-halal/can-halal.c **** datalen = 2; + 198:Core/Lib/can-halal/can-halal.c **** break; + 199:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_3: + 200:Core/Lib/can-halal/can-halal.c **** datalen = 3; + 201:Core/Lib/can-halal/can-halal.c **** break; + 202:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_4: + 203:Core/Lib/can-halal/can-halal.c **** datalen = 4; + 204:Core/Lib/can-halal/can-halal.c **** break; + 205:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_5: + 206:Core/Lib/can-halal/can-halal.c **** datalen = 5; + 207:Core/Lib/can-halal/can-halal.c **** break; + 208:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_6: + 209:Core/Lib/can-halal/can-halal.c **** datalen = 6; + 210:Core/Lib/can-halal/can-halal.c **** break; + 211:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_7: + 212:Core/Lib/can-halal/can-halal.c **** datalen = 7; + 213:Core/Lib/can-halal/can-halal.c **** break; + 214:Core/Lib/can-halal/can-halal.c **** case FDCAN_DLC_BYTES_8: + 215:Core/Lib/can-halal/can-halal.c **** datalen = 8; + 216:Core/Lib/can-halal/can-halal.c **** break; + 217:Core/Lib/can-halal/can-halal.c **** default: + 218:Core/Lib/can-halal/can-halal.c **** return; + 219:Core/Lib/can-halal/can-halal.c **** } + 220:Core/Lib/can-halal/can-halal.c **** + 221:Core/Lib/can-halal/can-halal.c **** ftcan_msg_received_cb(header.Identifier, datalen, data); + 222:Core/Lib/can-halal/can-halal.c **** } + ARM GAS /tmp/cc39XKgG.s page 10 + + + 223:Core/Lib/can-halal/can-halal.c **** #endif + 224:Core/Lib/can-halal/can-halal.c **** + 225:Core/Lib/can-halal/can-halal.c **** __weak void ftcan_msg_received_cb(uint16_t id, size_t datalen, + 226:Core/Lib/can-halal/can-halal.c **** const uint8_t *data) {} + 276 .loc 1 226 56 is_stmt 1 view -0 + 277 .cfi_startproc + 278 @ args = 0, pretend = 0, frame = 0 + 279 @ frame_needed = 0, uses_anonymous_args = 0 + 280 @ link register save eliminated. + 281 .loc 1 226 57 view .LVU78 + 282 @ sp needed + 283 0000 7047 bx lr + 284 .cfi_endproc + 285 .LFE44: + 287 .section .text.HAL_CAN_RxFifo0MsgPendingCallback,"ax",%progbits + 288 .align 1 + 289 .global HAL_CAN_RxFifo0MsgPendingCallback + 290 .syntax unified + 291 .code 16 + 292 .thumb_func + 294 HAL_CAN_RxFifo0MsgPendingCallback: + 295 .LVL20: + 296 .LFB43: + 65:Core/Lib/can-halal/can-halal.c **** if (handle != hcan) { + 297 .loc 1 65 67 view -0 + 298 .cfi_startproc + 299 @ args = 0, pretend = 0, frame = 40 + 300 @ frame_needed = 0, uses_anonymous_args = 0 + 65:Core/Lib/can-halal/can-halal.c **** if (handle != hcan) { + 301 .loc 1 65 67 is_stmt 0 view .LVU80 + 302 0000 10B5 push {r4, lr} + 303 .cfi_def_cfa_offset 8 + 304 .cfi_offset 4, -8 + 305 .cfi_offset 14, -4 + 306 0002 8AB0 sub sp, sp, #40 + 307 .cfi_def_cfa_offset 48 + 66:Core/Lib/can-halal/can-halal.c **** return; + 308 .loc 1 66 3 is_stmt 1 view .LVU81 + 66:Core/Lib/can-halal/can-halal.c **** return; + 309 .loc 1 66 14 is_stmt 0 view .LVU82 + 310 0004 0B4B ldr r3, .L22 + 311 0006 1C68 ldr r4, [r3] + 66:Core/Lib/can-halal/can-halal.c **** return; + 312 .loc 1 66 6 view .LVU83 + 313 0008 8442 cmp r4, r0 + 314 000a 01D0 beq .L21 + 315 .LVL21: + 316 .L18: + 80:Core/Lib/can-halal/can-halal.c **** #elif defined(FTCAN_IS_FDCAN) + 317 .loc 1 80 1 view .LVU84 + 318 000c 0AB0 add sp, sp, #40 + 319 @ sp needed + 320 000e 10BD pop {r4, pc} + 321 .LVL22: + 322 .L21: + 69:Core/Lib/can-halal/can-halal.c **** uint8_t data[8]; + 323 .loc 1 69 3 is_stmt 1 view .LVU85 + ARM GAS /tmp/cc39XKgG.s page 11 + + + 70:Core/Lib/can-halal/can-halal.c **** if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &header, data) != HAL_OK) { + 324 .loc 1 70 3 view .LVU86 + 71:Core/Lib/can-halal/can-halal.c **** return; + 325 .loc 1 71 3 view .LVU87 + 71:Core/Lib/can-halal/can-halal.c **** return; + 326 .loc 1 71 7 is_stmt 0 view .LVU88 + 327 0010 01AB add r3, sp, #4 + 328 0012 03AA add r2, sp, #12 + 329 0014 0021 movs r1, #0 + 330 0016 2000 movs r0, r4 + 331 .LVL23: + 71:Core/Lib/can-halal/can-halal.c **** return; + 332 .loc 1 71 7 view .LVU89 + 333 0018 FFF7FEFF bl HAL_CAN_GetRxMessage + 334 .LVL24: + 71:Core/Lib/can-halal/can-halal.c **** return; + 335 .loc 1 71 6 discriminator 1 view .LVU90 + 336 001c 0028 cmp r0, #0 + 337 001e F5D1 bne .L18 + 75:Core/Lib/can-halal/can-halal.c **** return; + 338 .loc 1 75 3 is_stmt 1 view .LVU91 + 75:Core/Lib/can-halal/can-halal.c **** return; + 339 .loc 1 75 13 is_stmt 0 view .LVU92 + 340 0020 059B ldr r3, [sp, #20] + 75:Core/Lib/can-halal/can-halal.c **** return; + 341 .loc 1 75 6 view .LVU93 + 342 0022 002B cmp r3, #0 + 343 0024 F2D1 bne .L18 + 79:Core/Lib/can-halal/can-halal.c **** } + 344 .loc 1 79 3 is_stmt 1 view .LVU94 + 79:Core/Lib/can-halal/can-halal.c **** } + 345 .loc 1 79 31 is_stmt 0 view .LVU95 + 346 0026 0398 ldr r0, [sp, #12] + 79:Core/Lib/can-halal/can-halal.c **** } + 347 .loc 1 79 45 view .LVU96 + 348 0028 0799 ldr r1, [sp, #28] + 79:Core/Lib/can-halal/can-halal.c **** } + 349 .loc 1 79 3 view .LVU97 + 350 002a 80B2 uxth r0, r0 + 351 002c 01AA add r2, sp, #4 + 352 002e FFF7FEFF bl ftcan_msg_received_cb + 353 .LVL25: + 354 0032 EBE7 b .L18 + 355 .L23: + 356 .align 2 + 357 .L22: + 358 0034 00000000 .word hcan + 359 .cfi_endproc + 360 .LFE43: + 362 .section .text.ftcan_unmarshal_unsigned,"ax",%progbits + 363 .align 1 + 364 .global ftcan_unmarshal_unsigned + 365 .syntax unified + 366 .code 16 + 367 .thumb_func + 369 ftcan_unmarshal_unsigned: + 370 .LVL26: + ARM GAS /tmp/cc39XKgG.s page 12 + + + 371 .LFB45: + 227:Core/Lib/can-halal/can-halal.c **** + 228:Core/Lib/can-halal/can-halal.c **** uint64_t ftcan_unmarshal_unsigned(const uint8_t **data_ptr, size_t num_bytes) { + 372 .loc 1 228 79 is_stmt 1 view -0 + 373 .cfi_startproc + 374 @ args = 0, pretend = 0, frame = 0 + 375 @ frame_needed = 0, uses_anonymous_args = 0 + 376 .loc 1 228 79 is_stmt 0 view .LVU99 + 377 0000 F0B5 push {r4, r5, r6, r7, lr} + 378 .cfi_def_cfa_offset 20 + 379 .cfi_offset 4, -20 + 380 .cfi_offset 5, -16 + 381 .cfi_offset 6, -12 + 382 .cfi_offset 7, -8 + 383 .cfi_offset 14, -4 + 384 0002 0700 movs r7, r0 + 385 0004 0D00 movs r5, r1 + 229:Core/Lib/can-halal/can-halal.c **** if (num_bytes > 8) { + 386 .loc 1 229 3 is_stmt 1 view .LVU100 + 387 .loc 1 229 6 is_stmt 0 view .LVU101 + 388 0006 0829 cmp r1, #8 + 389 0008 00D9 bls .L25 + 230:Core/Lib/can-halal/can-halal.c **** num_bytes = 8; + 390 .loc 1 230 15 view .LVU102 + 391 000a 0825 movs r5, #8 + 392 .L25: + 393 .LVL27: + 231:Core/Lib/can-halal/can-halal.c **** } + 232:Core/Lib/can-halal/can-halal.c **** + 233:Core/Lib/can-halal/can-halal.c **** const uint8_t *data = *data_ptr; + 394 .loc 1 233 3 is_stmt 1 view .LVU103 + 395 .loc 1 233 18 is_stmt 0 view .LVU104 + 396 000c 3E68 ldr r6, [r7] + 397 .LVL28: + 234:Core/Lib/can-halal/can-halal.c **** uint64_t result = 0; + 398 .loc 1 234 3 is_stmt 1 view .LVU105 + 235:Core/Lib/can-halal/can-halal.c **** for (size_t i = 0; i < num_bytes; i++) { + 399 .loc 1 235 3 view .LVU106 + 400 .LBB2: + 401 .loc 1 235 8 view .LVU107 + 402 .loc 1 235 15 is_stmt 0 view .LVU108 + 403 000e 0023 movs r3, #0 + 404 .LBE2: + 234:Core/Lib/can-halal/can-halal.c **** uint64_t result = 0; + 405 .loc 1 234 12 view .LVU109 + 406 0010 0020 movs r0, #0 + 407 .LVL29: + 234:Core/Lib/can-halal/can-halal.c **** uint64_t result = 0; + 408 .loc 1 234 12 view .LVU110 + 409 0012 0021 movs r1, #0 + 410 .LBB3: + 411 .loc 1 235 3 view .LVU111 + 412 0014 06E0 b .L26 + 413 .LVL30: + 414 .L27: + 236:Core/Lib/can-halal/can-halal.c **** result <<= 8; + 415 .loc 1 236 5 is_stmt 1 view .LVU112 + ARM GAS /tmp/cc39XKgG.s page 13 + + + 416 .loc 1 236 12 is_stmt 0 view .LVU113 + 417 0016 020E lsrs r2, r0, #24 + 418 0018 0902 lsls r1, r1, #8 + 419 .LVL31: + 420 .loc 1 236 12 view .LVU114 + 421 001a 0002 lsls r0, r0, #8 + 422 .LVL32: + 237:Core/Lib/can-halal/can-halal.c **** result |= data[i]; + 423 .loc 1 237 5 is_stmt 1 view .LVU115 + 424 .loc 1 237 19 is_stmt 0 view .LVU116 + 425 001c F45C ldrb r4, [r6, r3] + 426 .loc 1 237 12 view .LVU117 + 427 001e 2043 orrs r0, r4 + 428 .LVL33: + 429 .loc 1 237 12 view .LVU118 + 430 0020 1143 orrs r1, r2 + 431 .LVL34: + 235:Core/Lib/can-halal/can-halal.c **** for (size_t i = 0; i < num_bytes; i++) { + 432 .loc 1 235 38 is_stmt 1 discriminator 3 view .LVU119 + 433 0022 0133 adds r3, r3, #1 + 434 .LVL35: + 435 .L26: + 235:Core/Lib/can-halal/can-halal.c **** for (size_t i = 0; i < num_bytes; i++) { + 436 .loc 1 235 24 discriminator 1 view .LVU120 + 437 0024 9D42 cmp r5, r3 + 438 0026 F6D8 bhi .L27 + 439 .LBE3: + 238:Core/Lib/can-halal/can-halal.c **** } + 239:Core/Lib/can-halal/can-halal.c **** *data_ptr += num_bytes; + 440 .loc 1 239 3 view .LVU121 + 441 .loc 1 239 13 is_stmt 0 view .LVU122 + 442 0028 7619 adds r6, r6, r5 + 443 .LVL36: + 444 .loc 1 239 13 view .LVU123 + 445 002a 3E60 str r6, [r7] + 446 .LVL37: + 240:Core/Lib/can-halal/can-halal.c **** return result; + 447 .loc 1 240 3 is_stmt 1 view .LVU124 + 241:Core/Lib/can-halal/can-halal.c **** } + 448 .loc 1 241 1 is_stmt 0 view .LVU125 + 449 @ sp needed + 450 .LVL38: + 451 .LVL39: + 452 .loc 1 241 1 view .LVU126 + 453 002c F0BD pop {r4, r5, r6, r7, pc} + 454 .cfi_endproc + 455 .LFE45: + 457 .section .text.ftcan_unmarshal_signed,"ax",%progbits + 458 .align 1 + 459 .global ftcan_unmarshal_signed + 460 .syntax unified + 461 .code 16 + 462 .thumb_func + 464 ftcan_unmarshal_signed: + 465 .LVL40: + 466 .LFB46: + 242:Core/Lib/can-halal/can-halal.c **** + ARM GAS /tmp/cc39XKgG.s page 14 + + + 243:Core/Lib/can-halal/can-halal.c **** int64_t ftcan_unmarshal_signed(const uint8_t **data_ptr, size_t num_bytes) { + 467 .loc 1 243 76 is_stmt 1 view -0 + 468 .cfi_startproc + 469 @ args = 0, pretend = 0, frame = 0 + 470 @ frame_needed = 0, uses_anonymous_args = 0 + 471 .loc 1 243 76 is_stmt 0 view .LVU128 + 472 0000 10B5 push {r4, lr} + 473 .cfi_def_cfa_offset 8 + 474 .cfi_offset 4, -8 + 475 .cfi_offset 14, -4 + 476 0002 0C00 movs r4, r1 + 244:Core/Lib/can-halal/can-halal.c **** if (num_bytes > 8) { + 477 .loc 1 244 3 is_stmt 1 view .LVU129 + 478 .loc 1 244 6 is_stmt 0 view .LVU130 + 479 0004 0829 cmp r1, #8 + 480 0006 00D9 bls .L30 + 245:Core/Lib/can-halal/can-halal.c **** num_bytes = 8; + 481 .loc 1 245 15 view .LVU131 + 482 0008 0824 movs r4, #8 + 483 .L30: + 484 .LVL41: + 246:Core/Lib/can-halal/can-halal.c **** } + 247:Core/Lib/can-halal/can-halal.c **** + 248:Core/Lib/can-halal/can-halal.c **** uint64_t result_unsigned = ftcan_unmarshal_unsigned(data_ptr, num_bytes); + 485 .loc 1 248 3 is_stmt 1 view .LVU132 + 486 .loc 1 248 30 is_stmt 0 view .LVU133 + 487 000a 2100 movs r1, r4 + 488 000c FFF7FEFF bl ftcan_unmarshal_unsigned + 489 .LVL42: + 249:Core/Lib/can-halal/can-halal.c **** // Sign extend by shifting left, then copying to a signed int and shifting + 250:Core/Lib/can-halal/can-halal.c **** // back to the right + 251:Core/Lib/can-halal/can-halal.c **** size_t diff_to_64 = 64 - num_bytes * 8; + 490 .loc 1 251 3 is_stmt 1 view .LVU134 + 491 .loc 1 251 26 is_stmt 0 view .LVU135 + 492 0010 0823 movs r3, #8 + 493 0012 1B1B subs r3, r3, r4 + 494 .loc 1 251 10 view .LVU136 + 495 0014 DB00 lsls r3, r3, #3 + 496 .LVL43: + 252:Core/Lib/can-halal/can-halal.c **** result_unsigned <<= diff_to_64; + 497 .loc 1 252 3 is_stmt 1 view .LVU137 + 498 .loc 1 252 19 is_stmt 0 view .LVU138 + 499 0016 1A00 movs r2, r3 + 500 0018 203A subs r2, r2, #32 + 501 001a 0BD4 bmi .L31 + 502 001c 0100 movs r1, r0 + 503 .LVL44: + 504 .loc 1 252 19 view .LVU139 + 505 001e 9140 lsls r1, r1, r2 + 506 0020 0A00 movs r2, r1 + 507 .LVL45: + 508 .L32: + 509 .loc 1 252 19 view .LVU140 + 510 0022 9840 lsls r0, r0, r3 + 253:Core/Lib/can-halal/can-halal.c **** int64_t result; + 511 .loc 1 253 3 is_stmt 1 view .LVU141 + 254:Core/Lib/can-halal/can-halal.c **** memcpy(&result, &result_unsigned, 8); + ARM GAS /tmp/cc39XKgG.s page 15 + + + 512 .loc 1 254 3 view .LVU142 + 513 .LVL46: + 514 .loc 1 254 3 is_stmt 0 view .LVU143 + 515 0024 1100 movs r1, r2 + 516 .LVL47: + 255:Core/Lib/can-halal/can-halal.c **** return result >> diff_to_64; + 517 .loc 1 255 3 is_stmt 1 view .LVU144 + 518 .loc 1 255 17 is_stmt 0 view .LVU145 + 519 0026 1C00 movs r4, r3 + 520 0028 203C subs r4, r4, #32 + 521 002a 0BD4 bmi .L33 + 522 002c 2241 asrs r2, r2, r4 + 523 .LVL48: + 524 .loc 1 255 17 view .LVU146 + 525 002e 1000 movs r0, r2 + 526 .LVL49: + 527 .L34: + 528 .loc 1 255 17 view .LVU147 + 529 0030 1941 asrs r1, r1, r3 + 256:Core/Lib/can-halal/can-halal.c **** } + 530 .loc 1 256 1 view .LVU148 + 531 @ sp needed + 532 0032 10BD pop {r4, pc} + 533 .LVL50: + 534 .L31: + 252:Core/Lib/can-halal/can-halal.c **** int64_t result; + 535 .loc 1 252 19 view .LVU149 + 536 0034 2022 movs r2, #32 + 537 0036 D21A subs r2, r2, r3 + 538 0038 0400 movs r4, r0 + 539 .LVL51: + 252:Core/Lib/can-halal/can-halal.c **** int64_t result; + 540 .loc 1 252 19 view .LVU150 + 541 003a D440 lsrs r4, r4, r2 + 542 003c 0A00 movs r2, r1 + 543 003e 9A40 lsls r2, r2, r3 + 544 0040 2243 orrs r2, r4 + 545 0042 EEE7 b .L32 + 546 .LVL52: + 547 .L33: + 255:Core/Lib/can-halal/can-halal.c **** return result >> diff_to_64; + 548 .loc 1 255 17 view .LVU151 + 549 0044 2024 movs r4, #32 + 550 0046 E41A subs r4, r4, r3 + 551 0048 A240 lsls r2, r2, r4 + 552 004a D840 lsrs r0, r0, r3 + 553 .LVL53: + 255:Core/Lib/can-halal/can-halal.c **** return result >> diff_to_64; + 554 .loc 1 255 17 view .LVU152 + 555 004c 1043 orrs r0, r2 + 556 004e EFE7 b .L34 + 557 .cfi_endproc + 558 .LFE46: + 560 .section .text.ftcan_marshal_unsigned,"ax",%progbits + 561 .align 1 + 562 .global ftcan_marshal_unsigned + 563 .syntax unified + ARM GAS /tmp/cc39XKgG.s page 16 + + + 564 .code 16 + 565 .thumb_func + 567 ftcan_marshal_unsigned: + 568 .LVL54: + 569 .LFB47: + 257:Core/Lib/can-halal/can-halal.c **** + 258:Core/Lib/can-halal/can-halal.c **** uint8_t *ftcan_marshal_unsigned(uint8_t *data, uint64_t val, size_t num_bytes) { + 570 .loc 1 258 80 is_stmt 1 view -0 + 571 .cfi_startproc + 572 @ args = 4, pretend = 0, frame = 0 + 573 @ frame_needed = 0, uses_anonymous_args = 0 + 574 .loc 1 258 80 is_stmt 0 view .LVU154 + 575 0000 30B5 push {r4, r5, lr} + 576 .cfi_def_cfa_offset 12 + 577 .cfi_offset 4, -12 + 578 .cfi_offset 5, -8 + 579 .cfi_offset 14, -4 + 580 0002 039D ldr r5, [sp, #12] + 259:Core/Lib/can-halal/can-halal.c **** if (num_bytes > 8) { + 581 .loc 1 259 3 is_stmt 1 view .LVU155 + 582 .loc 1 259 6 is_stmt 0 view .LVU156 + 583 0004 082D cmp r5, #8 + 584 0006 00D9 bls .L37 + 260:Core/Lib/can-halal/can-halal.c **** num_bytes = 8; + 585 .loc 1 260 15 view .LVU157 + 586 0008 0825 movs r5, #8 + 587 .L37: + 588 .LVL55: + 261:Core/Lib/can-halal/can-halal.c **** } + 262:Core/Lib/can-halal/can-halal.c **** + 263:Core/Lib/can-halal/can-halal.c **** for (int i = num_bytes - 1; i >= 0; i--) { + 589 .loc 1 263 3 is_stmt 1 view .LVU158 + 590 .LBB4: + 591 .loc 1 263 8 view .LVU159 + 592 .loc 1 263 26 is_stmt 0 view .LVU160 + 593 000a 691E subs r1, r5, #1 + 594 .LVL56: + 595 .loc 1 263 3 view .LVU161 + 596 000c 05E0 b .L38 + 597 .LVL57: + 598 .L39: + 264:Core/Lib/can-halal/can-halal.c **** data[i] = val & 0xFF; + 599 .loc 1 264 5 is_stmt 1 view .LVU162 + 600 .loc 1 264 13 is_stmt 0 view .LVU163 + 601 000e 4254 strb r2, [r0, r1] + 265:Core/Lib/can-halal/can-halal.c **** val >>= 8; + 602 .loc 1 265 5 is_stmt 1 view .LVU164 + 603 .loc 1 265 9 is_stmt 0 view .LVU165 + 604 0010 1C06 lsls r4, r3, #24 + 605 0012 120A lsrs r2, r2, #8 + 606 .LVL58: + 607 .loc 1 265 9 view .LVU166 + 608 0014 2243 orrs r2, r4 + 609 0016 1B0A lsrs r3, r3, #8 + 610 .LVL59: + 263:Core/Lib/can-halal/can-halal.c **** data[i] = val & 0xFF; + 611 .loc 1 263 40 is_stmt 1 discriminator 3 view .LVU167 + ARM GAS /tmp/cc39XKgG.s page 17 + + + 612 0018 0139 subs r1, r1, #1 + 613 .LVL60: + 614 .L38: + 263:Core/Lib/can-halal/can-halal.c **** data[i] = val & 0xFF; + 615 .loc 1 263 33 discriminator 1 view .LVU168 + 616 001a 0029 cmp r1, #0 + 617 001c F7DA bge .L39 + 263:Core/Lib/can-halal/can-halal.c **** data[i] = val & 0xFF; + 618 .loc 1 263 33 is_stmt 0 discriminator 1 view .LVU169 + 619 .LBE4: + 266:Core/Lib/can-halal/can-halal.c **** } + 267:Core/Lib/can-halal/can-halal.c **** + 268:Core/Lib/can-halal/can-halal.c **** return data + num_bytes; + 620 .loc 1 268 3 is_stmt 1 view .LVU170 + 621 .loc 1 268 15 is_stmt 0 view .LVU171 + 622 001e 4019 adds r0, r0, r5 + 623 .LVL61: + 269:Core/Lib/can-halal/can-halal.c **** } + 624 .loc 1 269 1 view .LVU172 + 625 @ sp needed + 626 .LVL62: + 627 .loc 1 269 1 view .LVU173 + 628 0020 30BD pop {r4, r5, pc} + 629 .cfi_endproc + 630 .LFE47: + 632 .section .text.ftcan_marshal_signed,"ax",%progbits + 633 .align 1 + 634 .global ftcan_marshal_signed + 635 .syntax unified + 636 .code 16 + 637 .thumb_func + 639 ftcan_marshal_signed: + 640 .LVL63: + 641 .LFB48: + 270:Core/Lib/can-halal/can-halal.c **** + 271:Core/Lib/can-halal/can-halal.c **** uint8_t *ftcan_marshal_signed(uint8_t *data, int64_t val, size_t num_bytes) { + 642 .loc 1 271 77 is_stmt 1 view -0 + 643 .cfi_startproc + 644 @ args = 4, pretend = 0, frame = 0 + 645 @ frame_needed = 0, uses_anonymous_args = 0 + 646 .loc 1 271 77 is_stmt 0 view .LVU175 + 647 0000 00B5 push {lr} + 648 .cfi_def_cfa_offset 4 + 649 .cfi_offset 14, -4 + 650 0002 83B0 sub sp, sp, #12 + 651 .cfi_def_cfa_offset 16 + 272:Core/Lib/can-halal/can-halal.c **** return ftcan_marshal_unsigned(data, val, num_bytes); + 652 .loc 1 272 3 is_stmt 1 view .LVU176 + 653 .loc 1 272 10 is_stmt 0 view .LVU177 + 654 0004 0499 ldr r1, [sp, #16] + 655 0006 0091 str r1, [sp] + 656 0008 FFF7FEFF bl ftcan_marshal_unsigned + 657 .LVL64: + 273:Core/Lib/can-halal/can-halal.c **** } + 658 .loc 1 273 1 view .LVU178 + 659 000c 03B0 add sp, sp, #12 + 660 @ sp needed + ARM GAS /tmp/cc39XKgG.s page 18 + + + 661 000e 00BD pop {pc} + 662 .cfi_endproc + 663 .LFE48: + 665 .section .bss.filter.0,"aw",%nobits + 666 .align 2 + 669 filter.0: + 670 0000 00000000 .space 40 + 670 00000000 + 670 00000000 + 670 00000000 + 670 00000000 + 671 .section .bss.next_filter_no.1,"aw",%nobits + 672 .align 2 + 675 next_filter_no.1: + 676 0000 00000000 .space 4 + 677 .section .bss.header.2,"aw",%nobits + 678 .align 2 + 681 header.2: + 682 0000 00000000 .space 24 + 682 00000000 + 682 00000000 + 682 00000000 + 682 00000000 + 683 .section .bss.hcan,"aw",%nobits + 684 .align 2 + 687 hcan: + 688 0000 00000000 .space 4 + 689 .text + 690 .Letext0: + 691 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 692 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 693 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 694 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 695 .file 6 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 696 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 697 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h" + ARM GAS /tmp/cc39XKgG.s page 19 + + +DEFINED SYMBOLS + *ABS*:00000000 can-halal.c + /tmp/cc39XKgG.s:19 .text.ftcan_init:00000000 $t + /tmp/cc39XKgG.s:25 .text.ftcan_init:00000000 ftcan_init + /tmp/cc39XKgG.s:69 .text.ftcan_init:0000001c $d + /tmp/cc39XKgG.s:687 .bss.hcan:00000000 hcan + /tmp/cc39XKgG.s:74 .text.ftcan_transmit:00000000 $t + /tmp/cc39XKgG.s:80 .text.ftcan_transmit:00000000 ftcan_transmit + /tmp/cc39XKgG.s:134 .text.ftcan_transmit:00000024 $d + /tmp/cc39XKgG.s:681 .bss.header.2:00000000 header.2 + /tmp/cc39XKgG.s:140 .text.ftcan_add_filter:00000000 $t + /tmp/cc39XKgG.s:146 .text.ftcan_add_filter:00000000 ftcan_add_filter + /tmp/cc39XKgG.s:260 .text.ftcan_add_filter:0000005c $d + /tmp/cc39XKgG.s:675 .bss.next_filter_no.1:00000000 next_filter_no.1 + /tmp/cc39XKgG.s:669 .bss.filter.0:00000000 filter.0 + /tmp/cc39XKgG.s:267 .text.ftcan_msg_received_cb:00000000 $t + /tmp/cc39XKgG.s:273 .text.ftcan_msg_received_cb:00000000 ftcan_msg_received_cb + /tmp/cc39XKgG.s:288 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 $t + /tmp/cc39XKgG.s:294 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 HAL_CAN_RxFifo0MsgPendingCallback + /tmp/cc39XKgG.s:358 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000034 $d + /tmp/cc39XKgG.s:363 .text.ftcan_unmarshal_unsigned:00000000 $t + /tmp/cc39XKgG.s:369 .text.ftcan_unmarshal_unsigned:00000000 ftcan_unmarshal_unsigned + /tmp/cc39XKgG.s:458 .text.ftcan_unmarshal_signed:00000000 $t + /tmp/cc39XKgG.s:464 .text.ftcan_unmarshal_signed:00000000 ftcan_unmarshal_signed + /tmp/cc39XKgG.s:561 .text.ftcan_marshal_unsigned:00000000 $t + /tmp/cc39XKgG.s:567 .text.ftcan_marshal_unsigned:00000000 ftcan_marshal_unsigned + /tmp/cc39XKgG.s:633 .text.ftcan_marshal_signed:00000000 $t + /tmp/cc39XKgG.s:639 .text.ftcan_marshal_signed:00000000 ftcan_marshal_signed + /tmp/cc39XKgG.s:666 .bss.filter.0:00000000 $d + /tmp/cc39XKgG.s:672 .bss.next_filter_no.1:00000000 $d + /tmp/cc39XKgG.s:678 .bss.header.2:00000000 $d + /tmp/cc39XKgG.s:684 .bss.hcan:00000000 $d + +UNDEFINED SYMBOLS +HAL_CAN_ActivateNotification +HAL_CAN_Start +HAL_CAN_AddTxMessage +HAL_CAN_ConfigFilter +HAL_CAN_GetRxMessage diff --git a/Software/build/debug/Core/Lib/can-halal/can-halal.o b/Software/build/debug/Core/Lib/can-halal/can-halal.o new file mode 100644 index 0000000000000000000000000000000000000000..01e629263c3e91d5c940236e646d43feebf2a10f GIT binary patch literal 14768 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zT@8^;CKVr?;C0*oIw73YcNym{Q?m=%H>QkAA-u6%;M>$q`Eo2{!t__?`u|CebA@$s z?FK=62~$rc&MizSu~AV%^uYk<9qmwtkAtTTPp-Z`(5&kvPhSfdx%$R(^wAej-+PeH z)prHxQ9NGq^j!c(uD+|GF9;s}qhFrB3FLG2{T{T}x5#Gm-gmdxFMmQA*GVsVcKMBx zYxi?G?ZEbuwR;@-T)TB3u=He;=fgALbn(0EqGq??D88aSMDJY0Z$0%$;|~n*X~0(cDavwcGp6V{&?~C80e)r`n>+z@-}i_ z8O6Q)g>NIr`16t{xA$%2yfVsqdH!WE{$&&WJC_5dlUK%X!rb=$2<`nlf`a{wEh5|A zYar*Fq+O=JLN0ea-V4Pa1E2oY;qm-4G3FS~ePF5dSZMnC2Q?}YbHYPS%G0RG nIl^-k^#$ + 2:Core/Src/adc.c **** + 3:Core/Src/adc.c **** #include "can-halal.h" + 4:Core/Src/adc.c **** #include "stm32f0xx_hal_adc.h" + 5:Core/Src/adc.c **** + 6:Core/Src/adc.c **** int16_t id = 0x200; + 7:Core/Src/adc.c **** int32_t adcRes = 0; + 8:Core/Src/adc.c **** + 9:Core/Src/adc.c **** void adc_init(ADC_HandleTypeDef* hadc){ + 28 .loc 1 9 39 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 9 39 is_stmt 0 view .LVU1 + 33 0000 10B5 push {r4, lr} + 34 .cfi_def_cfa_offset 8 + 35 .cfi_offset 4, -8 + 36 .cfi_offset 14, -4 + 10:Core/Src/adc.c **** HAL_ADCEx_Calibration_Start(hadc); + 37 .loc 1 10 5 is_stmt 1 view .LVU2 + 38 0002 FFF7FEFF bl HAL_ADCEx_Calibration_Start + 39 .LVL1: + 11:Core/Src/adc.c **** } + 40 .loc 1 11 1 is_stmt 0 view .LVU3 + 41 @ sp needed + 42 0006 10BD pop {r4, pc} + 43 .cfi_endproc + 44 .LFE40: + 46 .section .text.adc_loop,"ax",%progbits + 47 .align 1 + 48 .global adc_loop + ARM GAS /tmp/ccZUAizG.s page 2 + + + 49 .syntax unified + 50 .code 16 + 51 .thumb_func + 53 adc_loop: + 54 .LVL2: + 55 .LFB41: + 12:Core/Src/adc.c **** + 13:Core/Src/adc.c **** void adc_loop(ADC_HandleTypeDef* hadc){ + 56 .loc 1 13 39 is_stmt 1 view -0 + 57 .cfi_startproc + 58 @ args = 0, pretend = 0, frame = 0 + 59 @ frame_needed = 0, uses_anonymous_args = 0 + 60 .loc 1 13 39 is_stmt 0 view .LVU5 + 61 0000 10B5 push {r4, lr} + 62 .cfi_def_cfa_offset 8 + 63 .cfi_offset 4, -8 + 64 .cfi_offset 14, -4 + 65 0002 82B0 sub sp, sp, #8 + 66 .cfi_def_cfa_offset 16 + 14:Core/Src/adc.c **** HAL_ADC_Start_IT(hadc); + 67 .loc 1 14 5 is_stmt 1 view .LVU6 + 68 0004 FFF7FEFF bl HAL_ADC_Start_IT + 69 .LVL3: + 15:Core/Src/adc.c **** static uint8_t data[8]; + 70 .loc 1 15 5 view .LVU7 + 16:Core/Src/adc.c **** ftcan_marshal_unsigned(data, adcRes, 4); + 71 .loc 1 16 5 view .LVU8 + 72 0008 094B ldr r3, .L3 + 73 000a 1A68 ldr r2, [r3] + 74 000c D317 asrs r3, r2, #31 + 75 000e 094C ldr r4, .L3+4 + 76 0010 0421 movs r1, #4 + 77 0012 0091 str r1, [sp] + 78 0014 2000 movs r0, r4 + 79 0016 FFF7FEFF bl ftcan_marshal_unsigned + 80 .LVL4: + 17:Core/Src/adc.c **** ftcan_transmit(id, data, sizeof(data)); + 81 .loc 1 17 5 view .LVU9 + 82 001a 074B ldr r3, .L3+8 + 83 001c 1888 ldrh r0, [r3] + 84 001e 0822 movs r2, #8 + 85 0020 2100 movs r1, r4 + 86 0022 FFF7FEFF bl ftcan_transmit + 87 .LVL5: + 18:Core/Src/adc.c **** HAL_Delay(5); + 88 .loc 1 18 5 view .LVU10 + 89 0026 0520 movs r0, #5 + 90 0028 FFF7FEFF bl HAL_Delay + 91 .LVL6: + 19:Core/Src/adc.c **** //testing gitignore + 20:Core/Src/adc.c **** } + 92 .loc 1 20 1 is_stmt 0 view .LVU11 + 93 002c 02B0 add sp, sp, #8 + 94 @ sp needed + 95 002e 10BD pop {r4, pc} + 96 .L4: + 97 .align 2 + ARM GAS /tmp/ccZUAizG.s page 3 + + + 98 .L3: + 99 0030 00000000 .word adcRes + 100 0034 00000000 .word data.0 + 101 0038 00000000 .word id + 102 .cfi_endproc + 103 .LFE41: + 105 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits + 106 .align 1 + 107 .global HAL_ADC_ConvCpltCallback + 108 .syntax unified + 109 .code 16 + 110 .thumb_func + 112 HAL_ADC_ConvCpltCallback: + 113 .LVL7: + 114 .LFB42: + 21:Core/Src/adc.c **** + 22:Core/Src/adc.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc){ + 115 .loc 1 22 55 is_stmt 1 view -0 + 116 .cfi_startproc + 117 @ args = 0, pretend = 0, frame = 0 + 118 @ frame_needed = 0, uses_anonymous_args = 0 + 119 .loc 1 22 55 is_stmt 0 view .LVU13 + 120 0000 10B5 push {r4, lr} + 121 .cfi_def_cfa_offset 8 + 122 .cfi_offset 4, -8 + 123 .cfi_offset 14, -4 + 23:Core/Src/adc.c **** adcRes = HAL_ADC_GetValue(hadc); + 124 .loc 1 23 5 is_stmt 1 view .LVU14 + 125 .loc 1 23 14 is_stmt 0 view .LVU15 + 126 0002 FFF7FEFF bl HAL_ADC_GetValue + 127 .LVL8: + 128 .loc 1 23 12 discriminator 1 view .LVU16 + 129 0006 014B ldr r3, .L6 + 130 0008 1860 str r0, [r3] + 24:Core/Src/adc.c **** }... + 131 .loc 1 24 1 view .LVU17 + 132 @ sp needed + 133 000a 10BD pop {r4, pc} + 134 .L7: + 135 .align 2 + 136 .L6: + 137 000c 00000000 .word adcRes + 138 .cfi_endproc + 139 .LFE42: + 141 .section .bss.data.0,"aw",%nobits + 142 .align 2 + 145 data.0: + 146 0000 00000000 .space 8 + 146 00000000 + 147 .global adcRes + 148 .section .bss.adcRes,"aw",%nobits + 149 .align 2 + 152 adcRes: + 153 0000 00000000 .space 4 + 154 .global id + 155 .section .data.id,"aw" + 156 .align 1 + ARM GAS /tmp/ccZUAizG.s page 4 + + + 159 id: + 160 0000 0002 .short 512 + 161 .text + 162 .Letext0: + 163 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 164 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 165 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 166 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 167 .file 6 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 168 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 169 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 170 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 171 .file 10 "Core/Lib/can-halal/can-halal.h" + 172 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h" + 173 .file 12 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccZUAizG.s page 5 + + +DEFINED SYMBOLS + *ABS*:00000000 adc.c + /tmp/ccZUAizG.s:19 .text.adc_init:00000000 $t + /tmp/ccZUAizG.s:25 .text.adc_init:00000000 adc_init + /tmp/ccZUAizG.s:47 .text.adc_loop:00000000 $t + /tmp/ccZUAizG.s:53 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Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h Core/Inc/adc.h +Core/Inc/main.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: +Core/Inc/adc.h: diff --git a/Software/build/debug/Core/Src/main.lst b/Software/build/debug/Core/Src/main.lst new file mode 100644 index 0000000..36c2206 --- /dev/null +++ b/Software/build/debug/Core/Src/main.lst @@ -0,0 +1,1536 @@ +ARM GAS /tmp/ccooGdrJ.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "main.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Core/Src/main.c" + 18 .section .text.MX_GPIO_Init,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 MX_GPIO_Init: + 25 .LFB45: + 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/main.c **** /** + 3:Core/Src/main.c **** ****************************************************************************** + 4:Core/Src/main.c **** * @file : main.c + 5:Core/Src/main.c **** * @brief : Main program body + 6:Core/Src/main.c **** ****************************************************************************** + 7:Core/Src/main.c **** * @attention + 8:Core/Src/main.c **** * + 9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics. + 10:Core/Src/main.c **** * All rights reserved. + 11:Core/Src/main.c **** * + 12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file + 13:Core/Src/main.c **** * in the root directory of this software component. + 14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 15:Core/Src/main.c **** * + 16:Core/Src/main.c **** ****************************************************************************** + 17:Core/Src/main.c **** */ + 18:Core/Src/main.c **** /* USER CODE END Header */ + 19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ + 20:Core/Src/main.c **** #include "main.h" + 21:Core/Src/main.c **** + 22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ + 23:Core/Src/main.c **** /* USER CODE BEGIN Includes */ + 24:Core/Src/main.c **** #include "adc.h" + 25:Core/Src/main.c **** /* USER CODE END Includes */ + 26:Core/Src/main.c **** + 27:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ + 28:Core/Src/main.c **** /* USER CODE BEGIN PTD */ + 29:Core/Src/main.c **** + 30:Core/Src/main.c **** /* USER CODE END PTD */ + 31:Core/Src/main.c **** + 32:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ + 33:Core/Src/main.c **** /* USER CODE BEGIN PD */ + ARM GAS /tmp/ccooGdrJ.s page 2 + + + 34:Core/Src/main.c **** + 35:Core/Src/main.c **** /* USER CODE END PD */ + 36:Core/Src/main.c **** + 37:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ + 38:Core/Src/main.c **** /* USER CODE BEGIN PM */ + 39:Core/Src/main.c **** + 40:Core/Src/main.c **** /* USER CODE END PM */ + 41:Core/Src/main.c **** + 42:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ + 43:Core/Src/main.c **** ADC_HandleTypeDef hadc; + 44:Core/Src/main.c **** + 45:Core/Src/main.c **** CAN_HandleTypeDef hcan; + 46:Core/Src/main.c **** + 47:Core/Src/main.c **** TIM_HandleTypeDef htim2; + 48:Core/Src/main.c **** + 49:Core/Src/main.c **** /* USER CODE BEGIN PV */ + 50:Core/Src/main.c **** + 51:Core/Src/main.c **** /* USER CODE END PV */ + 52:Core/Src/main.c **** + 53:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ + 54:Core/Src/main.c **** void SystemClock_Config(void); + 55:Core/Src/main.c **** static void MX_GPIO_Init(void); + 56:Core/Src/main.c **** static void MX_ADC_Init(void); + 57:Core/Src/main.c **** static void MX_CAN_Init(void); + 58:Core/Src/main.c **** static void MX_TIM2_Init(void); + 59:Core/Src/main.c **** /* USER CODE BEGIN PFP */ + 60:Core/Src/main.c **** + 61:Core/Src/main.c **** /* USER CODE END PFP */ + 62:Core/Src/main.c **** + 63:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ + 64:Core/Src/main.c **** /* USER CODE BEGIN 0 */ + 65:Core/Src/main.c **** + 66:Core/Src/main.c **** /* USER CODE END 0 */ + 67:Core/Src/main.c **** + 68:Core/Src/main.c **** /** + 69:Core/Src/main.c **** * @brief The application entry point. + 70:Core/Src/main.c **** * @retval int + 71:Core/Src/main.c **** */ + 72:Core/Src/main.c **** int main(void) + 73:Core/Src/main.c **** { + 74:Core/Src/main.c **** /* USER CODE BEGIN 1 */ + 75:Core/Src/main.c **** + 76:Core/Src/main.c **** /* USER CODE END 1 */ + 77:Core/Src/main.c **** + 78:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 79:Core/Src/main.c **** + 80:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 81:Core/Src/main.c **** HAL_Init(); + 82:Core/Src/main.c **** + 83:Core/Src/main.c **** /* USER CODE BEGIN Init */ + 84:Core/Src/main.c **** + 85:Core/Src/main.c **** /* USER CODE END Init */ + 86:Core/Src/main.c **** + 87:Core/Src/main.c **** /* Configure the system clock */ + 88:Core/Src/main.c **** SystemClock_Config(); + 89:Core/Src/main.c **** + 90:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ + ARM GAS /tmp/ccooGdrJ.s page 3 + + + 91:Core/Src/main.c **** + 92:Core/Src/main.c **** /* USER CODE END SysInit */ + 93:Core/Src/main.c **** + 94:Core/Src/main.c **** /* Initialize all configured peripherals */ + 95:Core/Src/main.c **** MX_GPIO_Init(); + 96:Core/Src/main.c **** MX_ADC_Init(); + 97:Core/Src/main.c **** MX_CAN_Init(); + 98:Core/Src/main.c **** MX_TIM2_Init(); + 99:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 100:Core/Src/main.c **** adc_init(&hadc); + 101:Core/Src/main.c **** /* USER CODE END 2 */ + 102:Core/Src/main.c **** + 103:Core/Src/main.c **** /* Infinite loop */ + 104:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ + 105:Core/Src/main.c **** while (1) + 106:Core/Src/main.c **** { + 107:Core/Src/main.c **** /* USER CODE END WHILE */ + 108:Core/Src/main.c **** + 109:Core/Src/main.c **** /* USER CODE BEGIN 3 */ + 110:Core/Src/main.c **** adc_loop(&hadc); + 111:Core/Src/main.c **** } + 112:Core/Src/main.c **** /* USER CODE END 3 */ + 113:Core/Src/main.c **** } + 114:Core/Src/main.c **** + 115:Core/Src/main.c **** /** + 116:Core/Src/main.c **** * @brief System Clock Configuration + 117:Core/Src/main.c **** * @retval None + 118:Core/Src/main.c **** */ + 119:Core/Src/main.c **** void SystemClock_Config(void) + 120:Core/Src/main.c **** { + 121:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 122:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 123:Core/Src/main.c **** + 124:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 125:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. + 126:Core/Src/main.c **** */ + 127:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI14; + 128:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 129:Core/Src/main.c **** RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 130:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 131:Core/Src/main.c **** RCC_OscInitStruct.HSI14CalibrationValue = 16; + 132:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 133:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 134:Core/Src/main.c **** { + 135:Core/Src/main.c **** Error_Handler(); + 136:Core/Src/main.c **** } + 137:Core/Src/main.c **** + 138:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 139:Core/Src/main.c **** */ + 140:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 141:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1; + 142:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; + 143:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 144:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 145:Core/Src/main.c **** + 146:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) + 147:Core/Src/main.c **** { + ARM GAS /tmp/ccooGdrJ.s page 4 + + + 148:Core/Src/main.c **** Error_Handler(); + 149:Core/Src/main.c **** } + 150:Core/Src/main.c **** } + 151:Core/Src/main.c **** + 152:Core/Src/main.c **** /** + 153:Core/Src/main.c **** * @brief ADC Initialization Function + 154:Core/Src/main.c **** * @param None + 155:Core/Src/main.c **** * @retval None + 156:Core/Src/main.c **** */ + 157:Core/Src/main.c **** static void MX_ADC_Init(void) + 158:Core/Src/main.c **** { + 159:Core/Src/main.c **** + 160:Core/Src/main.c **** /* USER CODE BEGIN ADC_Init 0 */ + 161:Core/Src/main.c **** + 162:Core/Src/main.c **** /* USER CODE END ADC_Init 0 */ + 163:Core/Src/main.c **** + 164:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 165:Core/Src/main.c **** + 166:Core/Src/main.c **** /* USER CODE BEGIN ADC_Init 1 */ + 167:Core/Src/main.c **** + 168:Core/Src/main.c **** /* USER CODE END ADC_Init 1 */ + 169:Core/Src/main.c **** + 170:Core/Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 171:Core/Src/main.c **** */ + 172:Core/Src/main.c **** hadc.Instance = ADC1; + 173:Core/Src/main.c **** hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 174:Core/Src/main.c **** hadc.Init.Resolution = ADC_RESOLUTION_12B; + 175:Core/Src/main.c **** hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 176:Core/Src/main.c **** hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 177:Core/Src/main.c **** hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 178:Core/Src/main.c **** hadc.Init.LowPowerAutoWait = DISABLE; + 179:Core/Src/main.c **** hadc.Init.LowPowerAutoPowerOff = DISABLE; + 180:Core/Src/main.c **** hadc.Init.ContinuousConvMode = DISABLE; + 181:Core/Src/main.c **** hadc.Init.DiscontinuousConvMode = DISABLE; + 182:Core/Src/main.c **** hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 183:Core/Src/main.c **** hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 184:Core/Src/main.c **** hadc.Init.DMAContinuousRequests = DISABLE; + 185:Core/Src/main.c **** hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 186:Core/Src/main.c **** if (HAL_ADC_Init(&hadc) != HAL_OK) + 187:Core/Src/main.c **** { + 188:Core/Src/main.c **** Error_Handler(); + 189:Core/Src/main.c **** } + 190:Core/Src/main.c **** + 191:Core/Src/main.c **** /** Configure for the selected ADC regular channel to be converted. + 192:Core/Src/main.c **** */ + 193:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_0; + 194:Core/Src/main.c **** sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + 195:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + 196:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 197:Core/Src/main.c **** { + 198:Core/Src/main.c **** Error_Handler(); + 199:Core/Src/main.c **** } + 200:Core/Src/main.c **** + 201:Core/Src/main.c **** /** Configure for the selected ADC regular channel to be converted. + 202:Core/Src/main.c **** */ + 203:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_1; + 204:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + ARM GAS /tmp/ccooGdrJ.s page 5 + + + 205:Core/Src/main.c **** { + 206:Core/Src/main.c **** Error_Handler(); + 207:Core/Src/main.c **** } + 208:Core/Src/main.c **** /* USER CODE BEGIN ADC_Init 2 */ + 209:Core/Src/main.c **** + 210:Core/Src/main.c **** /* USER CODE END ADC_Init 2 */ + 211:Core/Src/main.c **** + 212:Core/Src/main.c **** } + 213:Core/Src/main.c **** + 214:Core/Src/main.c **** /** + 215:Core/Src/main.c **** * @brief CAN Initialization Function + 216:Core/Src/main.c **** * @param None + 217:Core/Src/main.c **** * @retval None + 218:Core/Src/main.c **** */ + 219:Core/Src/main.c **** static void MX_CAN_Init(void) + 220:Core/Src/main.c **** { + 221:Core/Src/main.c **** + 222:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 0 */ + 223:Core/Src/main.c **** + 224:Core/Src/main.c **** /* USER CODE END CAN_Init 0 */ + 225:Core/Src/main.c **** + 226:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 1 */ + 227:Core/Src/main.c **** + 228:Core/Src/main.c **** /* USER CODE END CAN_Init 1 */ + 229:Core/Src/main.c **** hcan.Instance = CAN; + 230:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 231:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 232:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 233:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 234:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 235:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 236:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 237:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 238:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 239:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 240:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 241:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 242:Core/Src/main.c **** { + 243:Core/Src/main.c **** Error_Handler(); + 244:Core/Src/main.c **** } + 245:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 2 */ + 246:Core/Src/main.c **** + 247:Core/Src/main.c **** /* USER CODE END CAN_Init 2 */ + 248:Core/Src/main.c **** + 249:Core/Src/main.c **** } + 250:Core/Src/main.c **** + 251:Core/Src/main.c **** /** + 252:Core/Src/main.c **** * @brief TIM2 Initialization Function + 253:Core/Src/main.c **** * @param None + 254:Core/Src/main.c **** * @retval None + 255:Core/Src/main.c **** */ + 256:Core/Src/main.c **** static void MX_TIM2_Init(void) + 257:Core/Src/main.c **** { + 258:Core/Src/main.c **** + 259:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ + 260:Core/Src/main.c **** + 261:Core/Src/main.c **** /* USER CODE END TIM2_Init 0 */ + ARM GAS /tmp/ccooGdrJ.s page 6 + + + 262:Core/Src/main.c **** + 263:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + 264:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 265:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 266:Core/Src/main.c **** + 267:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ + 268:Core/Src/main.c **** + 269:Core/Src/main.c **** /* USER CODE END TIM2_Init 1 */ + 270:Core/Src/main.c **** htim2.Instance = TIM2; + 271:Core/Src/main.c **** htim2.Init.Prescaler = 0; + 272:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + 273:Core/Src/main.c **** htim2.Init.Period = 4294967295; + 274:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 275:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 276:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + 277:Core/Src/main.c **** { + 278:Core/Src/main.c **** Error_Handler(); + 279:Core/Src/main.c **** } + 280:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + 281:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + 282:Core/Src/main.c **** { + 283:Core/Src/main.c **** Error_Handler(); + 284:Core/Src/main.c **** } + 285:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) + 286:Core/Src/main.c **** { + 287:Core/Src/main.c **** Error_Handler(); + 288:Core/Src/main.c **** } + 289:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 290:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 291:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + 292:Core/Src/main.c **** { + 293:Core/Src/main.c **** Error_Handler(); + 294:Core/Src/main.c **** } + 295:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; + 296:Core/Src/main.c **** sConfigOC.Pulse = 0; + 297:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 298:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 299:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 300:Core/Src/main.c **** { + 301:Core/Src/main.c **** Error_Handler(); + 302:Core/Src/main.c **** } + 303:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + 304:Core/Src/main.c **** { + 305:Core/Src/main.c **** Error_Handler(); + 306:Core/Src/main.c **** } + 307:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 308:Core/Src/main.c **** { + 309:Core/Src/main.c **** Error_Handler(); + 310:Core/Src/main.c **** } + 311:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ + 312:Core/Src/main.c **** + 313:Core/Src/main.c **** /* USER CODE END TIM2_Init 2 */ + 314:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim2); + 315:Core/Src/main.c **** + 316:Core/Src/main.c **** } + 317:Core/Src/main.c **** + 318:Core/Src/main.c **** /** + ARM GAS /tmp/ccooGdrJ.s page 7 + + + 319:Core/Src/main.c **** * @brief GPIO Initialization Function + 320:Core/Src/main.c **** * @param None + 321:Core/Src/main.c **** * @retval None + 322:Core/Src/main.c **** */ + 323:Core/Src/main.c **** static void MX_GPIO_Init(void) + 324:Core/Src/main.c **** { + 26 .loc 1 324 1 view -0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 16 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 31 0000 84B0 sub sp, sp, #16 + 32 .cfi_def_cfa_offset 16 + 325:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ + 326:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ + 327:Core/Src/main.c **** + 328:Core/Src/main.c **** /* GPIO Ports Clock Enable */ + 329:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); + 33 .loc 1 329 3 view .LVU1 + 34 .LBB4: + 35 .loc 1 329 3 view .LVU2 + 36 .loc 1 329 3 view .LVU3 + 37 0002 0F4B ldr r3, .L2 + 38 0004 5A69 ldr r2, [r3, #20] + 39 0006 8021 movs r1, #128 + 40 0008 C903 lsls r1, r1, #15 + 41 000a 0A43 orrs r2, r1 + 42 000c 5A61 str r2, [r3, #20] + 43 .loc 1 329 3 view .LVU4 + 44 000e 5A69 ldr r2, [r3, #20] + 45 0010 0A40 ands r2, r1 + 46 0012 0192 str r2, [sp, #4] + 47 .loc 1 329 3 view .LVU5 + 48 0014 019A ldr r2, [sp, #4] + 49 .LBE4: + 50 .loc 1 329 3 view .LVU6 + 330:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 51 .loc 1 330 3 view .LVU7 + 52 .LBB5: + 53 .loc 1 330 3 view .LVU8 + 54 .loc 1 330 3 view .LVU9 + 55 0016 5A69 ldr r2, [r3, #20] + 56 0018 8021 movs r1, #128 + 57 001a 8902 lsls r1, r1, #10 + 58 001c 0A43 orrs r2, r1 + 59 001e 5A61 str r2, [r3, #20] + 60 .loc 1 330 3 view .LVU10 + 61 0020 5A69 ldr r2, [r3, #20] + 62 0022 0A40 ands r2, r1 + 63 0024 0292 str r2, [sp, #8] + 64 .loc 1 330 3 view .LVU11 + 65 0026 029A ldr r2, [sp, #8] + 66 .LBE5: + 67 .loc 1 330 3 view .LVU12 + 331:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 68 .loc 1 331 3 view .LVU13 + 69 .LBB6: + ARM GAS /tmp/ccooGdrJ.s page 8 + + + 70 .loc 1 331 3 view .LVU14 + 71 .loc 1 331 3 view .LVU15 + 72 0028 5A69 ldr r2, [r3, #20] + 73 002a 8021 movs r1, #128 + 74 002c C902 lsls r1, r1, #11 + 75 002e 0A43 orrs r2, r1 + 76 0030 5A61 str r2, [r3, #20] + 77 .loc 1 331 3 view .LVU16 + 78 0032 5B69 ldr r3, [r3, #20] + 79 0034 0B40 ands r3, r1 + 80 0036 0393 str r3, [sp, #12] + 81 .loc 1 331 3 view .LVU17 + 82 0038 039B ldr r3, [sp, #12] + 83 .LBE6: + 84 .loc 1 331 3 view .LVU18 + 332:Core/Src/main.c **** + 333:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ + 334:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ + 335:Core/Src/main.c **** } + 85 .loc 1 335 1 is_stmt 0 view .LVU19 + 86 003a 04B0 add sp, sp, #16 + 87 @ sp needed + 88 003c 7047 bx lr + 89 .L3: + 90 003e C046 .align 2 + 91 .L2: + 92 0040 00100240 .word 1073876992 + 93 .cfi_endproc + 94 .LFE45: + 96 .section .text.Error_Handler,"ax",%progbits + 97 .align 1 + 98 .global Error_Handler + 99 .syntax unified + 100 .code 16 + 101 .thumb_func + 103 Error_Handler: + 104 .LFB46: + 336:Core/Src/main.c **** + 337:Core/Src/main.c **** /* USER CODE BEGIN 4 */ + 338:Core/Src/main.c **** + 339:Core/Src/main.c **** /* USER CODE END 4 */ + 340:Core/Src/main.c **** + 341:Core/Src/main.c **** /** + 342:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. + 343:Core/Src/main.c **** * @retval None + 344:Core/Src/main.c **** */ + 345:Core/Src/main.c **** void Error_Handler(void) + 346:Core/Src/main.c **** { + 105 .loc 1 346 1 is_stmt 1 view -0 + 106 .cfi_startproc + 107 @ Volatile: function does not return. + 108 @ args = 0, pretend = 0, frame = 0 + 109 @ frame_needed = 0, uses_anonymous_args = 0 + 110 @ link register save eliminated. + 347:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ + 348:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ + 349:Core/Src/main.c **** __disable_irq(); + ARM GAS /tmp/ccooGdrJ.s page 9 + + + 111 .loc 1 349 3 view .LVU21 + 112 .LBB7: + 113 .LBI7: + 114 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + ARM GAS /tmp/ccooGdrJ.s page 10 + + + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + ARM GAS /tmp/ccooGdrJ.s page 11 + + + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 115 .loc 2 140 27 view .LVU22 + 116 .LBB8: + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 117 .loc 2 142 3 view .LVU23 + 118 .syntax divided + 119 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 120 0000 72B6 cpsid i + 121 @ 0 "" 2 + 122 .thumb + 123 .syntax unified + 124 .L5: + 125 .LBE8: + 126 .LBE7: + 350:Core/Src/main.c **** while (1) + 127 .loc 1 350 3 view .LVU24 + 351:Core/Src/main.c **** { + 352:Core/Src/main.c **** } + 128 .loc 1 352 3 view .LVU25 + 350:Core/Src/main.c **** while (1) + 129 .loc 1 350 9 view .LVU26 + 130 0002 FEE7 b .L5 + 131 .cfi_endproc + 132 .LFE46: + 134 .section .text.MX_ADC_Init,"ax",%progbits + 135 .align 1 + 136 .syntax unified + ARM GAS /tmp/ccooGdrJ.s page 12 + + + 137 .code 16 + 138 .thumb_func + 140 MX_ADC_Init: + 141 .LFB42: + 158:Core/Src/main.c **** + 142 .loc 1 158 1 view -0 + 143 .cfi_startproc + 144 @ args = 0, pretend = 0, frame = 16 + 145 @ frame_needed = 0, uses_anonymous_args = 0 + 146 0000 00B5 push {lr} + 147 .cfi_def_cfa_offset 4 + 148 .cfi_offset 14, -4 + 149 0002 85B0 sub sp, sp, #20 + 150 .cfi_def_cfa_offset 24 + 164:Core/Src/main.c **** + 151 .loc 1 164 3 view .LVU28 + 164:Core/Src/main.c **** + 152 .loc 1 164 26 is_stmt 0 view .LVU29 + 153 0004 0C22 movs r2, #12 + 154 0006 0021 movs r1, #0 + 155 0008 01A8 add r0, sp, #4 + 156 000a FFF7FEFF bl memset + 157 .LVL0: + 172:Core/Src/main.c **** hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 158 .loc 1 172 3 is_stmt 1 view .LVU30 + 172:Core/Src/main.c **** hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 159 .loc 1 172 17 is_stmt 0 view .LVU31 + 160 000e 1C48 ldr r0, .L13 + 161 0010 1C4B ldr r3, .L13+4 + 162 0012 0360 str r3, [r0] + 173:Core/Src/main.c **** hadc.Init.Resolution = ADC_RESOLUTION_12B; + 163 .loc 1 173 3 is_stmt 1 view .LVU32 + 173:Core/Src/main.c **** hadc.Init.Resolution = ADC_RESOLUTION_12B; + 164 .loc 1 173 28 is_stmt 0 view .LVU33 + 165 0014 0023 movs r3, #0 + 166 0016 4360 str r3, [r0, #4] + 174:Core/Src/main.c **** hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 167 .loc 1 174 3 is_stmt 1 view .LVU34 + 174:Core/Src/main.c **** hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 168 .loc 1 174 24 is_stmt 0 view .LVU35 + 169 0018 8360 str r3, [r0, #8] + 175:Core/Src/main.c **** hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 170 .loc 1 175 3 is_stmt 1 view .LVU36 + 175:Core/Src/main.c **** hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 171 .loc 1 175 23 is_stmt 0 view .LVU37 + 172 001a C360 str r3, [r0, #12] + 176:Core/Src/main.c **** hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 173 .loc 1 176 3 is_stmt 1 view .LVU38 + 176:Core/Src/main.c **** hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 174 .loc 1 176 26 is_stmt 0 view .LVU39 + 175 001c 0122 movs r2, #1 + 176 001e 0261 str r2, [r0, #16] + 177:Core/Src/main.c **** hadc.Init.LowPowerAutoWait = DISABLE; + 177 .loc 1 177 3 is_stmt 1 view .LVU40 + 177:Core/Src/main.c **** hadc.Init.LowPowerAutoWait = DISABLE; + 178 .loc 1 177 26 is_stmt 0 view .LVU41 + 179 0020 0421 movs r1, #4 + ARM GAS /tmp/ccooGdrJ.s page 13 + + + 180 0022 4161 str r1, [r0, #20] + 178:Core/Src/main.c **** hadc.Init.LowPowerAutoPowerOff = DISABLE; + 181 .loc 1 178 3 is_stmt 1 view .LVU42 + 178:Core/Src/main.c **** hadc.Init.LowPowerAutoPowerOff = DISABLE; + 182 .loc 1 178 30 is_stmt 0 view .LVU43 + 183 0024 0376 strb r3, [r0, #24] + 179:Core/Src/main.c **** hadc.Init.ContinuousConvMode = DISABLE; + 184 .loc 1 179 3 is_stmt 1 view .LVU44 + 179:Core/Src/main.c **** hadc.Init.ContinuousConvMode = DISABLE; + 185 .loc 1 179 34 is_stmt 0 view .LVU45 + 186 0026 4376 strb r3, [r0, #25] + 180:Core/Src/main.c **** hadc.Init.DiscontinuousConvMode = DISABLE; + 187 .loc 1 180 3 is_stmt 1 view .LVU46 + 180:Core/Src/main.c **** hadc.Init.DiscontinuousConvMode = DISABLE; + 188 .loc 1 180 32 is_stmt 0 view .LVU47 + 189 0028 8376 strb r3, [r0, #26] + 181:Core/Src/main.c **** hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 190 .loc 1 181 3 is_stmt 1 view .LVU48 + 181:Core/Src/main.c **** hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 191 .loc 1 181 35 is_stmt 0 view .LVU49 + 192 002a C376 strb r3, [r0, #27] + 182:Core/Src/main.c **** hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 193 .loc 1 182 3 is_stmt 1 view .LVU50 + 182:Core/Src/main.c **** hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 194 .loc 1 182 30 is_stmt 0 view .LVU51 + 195 002c C221 movs r1, #194 + 196 002e FF31 adds r1, r1, #255 + 197 0030 C161 str r1, [r0, #28] + 183:Core/Src/main.c **** hadc.Init.DMAContinuousRequests = DISABLE; + 198 .loc 1 183 3 is_stmt 1 view .LVU52 + 183:Core/Src/main.c **** hadc.Init.DMAContinuousRequests = DISABLE; + 199 .loc 1 183 34 is_stmt 0 view .LVU53 + 200 0032 0362 str r3, [r0, #32] + 184:Core/Src/main.c **** hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 201 .loc 1 184 3 is_stmt 1 view .LVU54 + 184:Core/Src/main.c **** hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 202 .loc 1 184 35 is_stmt 0 view .LVU55 + 203 0034 9E39 subs r1, r1, #158 + 204 0036 FF39 subs r1, r1, #255 + 205 0038 4354 strb r3, [r0, r1] + 185:Core/Src/main.c **** if (HAL_ADC_Init(&hadc) != HAL_OK) + 206 .loc 1 185 3 is_stmt 1 view .LVU56 + 185:Core/Src/main.c **** if (HAL_ADC_Init(&hadc) != HAL_OK) + 207 .loc 1 185 21 is_stmt 0 view .LVU57 + 208 003a 8262 str r2, [r0, #40] + 186:Core/Src/main.c **** { + 209 .loc 1 186 3 is_stmt 1 view .LVU58 + 186:Core/Src/main.c **** { + 210 .loc 1 186 7 is_stmt 0 view .LVU59 + 211 003c FFF7FEFF bl HAL_ADC_Init + 212 .LVL1: + 186:Core/Src/main.c **** { + 213 .loc 1 186 6 discriminator 1 view .LVU60 + 214 0040 0028 cmp r0, #0 + 215 0042 17D1 bne .L10 + 193:Core/Src/main.c **** sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + 216 .loc 1 193 3 is_stmt 1 view .LVU61 + ARM GAS /tmp/ccooGdrJ.s page 14 + + + 193:Core/Src/main.c **** sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + 217 .loc 1 193 19 is_stmt 0 view .LVU62 + 218 0044 0023 movs r3, #0 + 219 0046 0193 str r3, [sp, #4] + 194:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + 220 .loc 1 194 3 is_stmt 1 view .LVU63 + 194:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + 221 .loc 1 194 16 is_stmt 0 view .LVU64 + 222 0048 8023 movs r3, #128 + 223 004a 5B01 lsls r3, r3, #5 + 224 004c 0293 str r3, [sp, #8] + 195:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 225 .loc 1 195 3 is_stmt 1 view .LVU65 + 195:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 226 .loc 1 195 24 is_stmt 0 view .LVU66 + 227 004e 8023 movs r3, #128 + 228 0050 5B05 lsls r3, r3, #21 + 229 0052 0393 str r3, [sp, #12] + 196:Core/Src/main.c **** { + 230 .loc 1 196 3 is_stmt 1 view .LVU67 + 196:Core/Src/main.c **** { + 231 .loc 1 196 7 is_stmt 0 view .LVU68 + 232 0054 0A48 ldr r0, .L13 + 233 0056 01A9 add r1, sp, #4 + 234 0058 FFF7FEFF bl HAL_ADC_ConfigChannel + 235 .LVL2: + 196:Core/Src/main.c **** { + 236 .loc 1 196 6 discriminator 1 view .LVU69 + 237 005c 0028 cmp r0, #0 + 238 005e 0BD1 bne .L11 + 203:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 239 .loc 1 203 3 is_stmt 1 view .LVU70 + 203:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 240 .loc 1 203 19 is_stmt 0 view .LVU71 + 241 0060 0123 movs r3, #1 + 242 0062 0193 str r3, [sp, #4] + 204:Core/Src/main.c **** { + 243 .loc 1 204 3 is_stmt 1 view .LVU72 + 204:Core/Src/main.c **** { + 244 .loc 1 204 7 is_stmt 0 view .LVU73 + 245 0064 0648 ldr r0, .L13 + 246 0066 01A9 add r1, sp, #4 + 247 0068 FFF7FEFF bl HAL_ADC_ConfigChannel + 248 .LVL3: + 204:Core/Src/main.c **** { + 249 .loc 1 204 6 discriminator 1 view .LVU74 + 250 006c 0028 cmp r0, #0 + 251 006e 05D1 bne .L12 + 212:Core/Src/main.c **** + 252 .loc 1 212 1 view .LVU75 + 253 0070 05B0 add sp, sp, #20 + 254 @ sp needed + 255 0072 00BD pop {pc} + 256 .L10: + 188:Core/Src/main.c **** } + 257 .loc 1 188 5 is_stmt 1 view .LVU76 + 258 0074 FFF7FEFF bl Error_Handler + ARM GAS /tmp/ccooGdrJ.s page 15 + + + 259 .LVL4: + 260 .L11: + 198:Core/Src/main.c **** } + 261 .loc 1 198 5 view .LVU77 + 262 0078 FFF7FEFF bl Error_Handler + 263 .LVL5: + 264 .L12: + 206:Core/Src/main.c **** } + 265 .loc 1 206 5 view .LVU78 + 266 007c FFF7FEFF bl Error_Handler + 267 .LVL6: + 268 .L14: + 269 .align 2 + 270 .L13: + 271 0080 00000000 .word hadc + 272 0084 00240140 .word 1073816576 + 273 .cfi_endproc + 274 .LFE42: + 276 .section .text.MX_CAN_Init,"ax",%progbits + 277 .align 1 + 278 .syntax unified + 279 .code 16 + 280 .thumb_func + 282 MX_CAN_Init: + 283 .LFB43: + 220:Core/Src/main.c **** + 284 .loc 1 220 1 view -0 + 285 .cfi_startproc + 286 @ args = 0, pretend = 0, frame = 0 + 287 @ frame_needed = 0, uses_anonymous_args = 0 + 288 0000 10B5 push {r4, lr} + 289 .cfi_def_cfa_offset 8 + 290 .cfi_offset 4, -8 + 291 .cfi_offset 14, -4 + 229:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 292 .loc 1 229 3 view .LVU80 + 229:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 293 .loc 1 229 17 is_stmt 0 view .LVU81 + 294 0002 0B48 ldr r0, .L18 + 295 0004 0B4B ldr r3, .L18+4 + 296 0006 0360 str r3, [r0] + 230:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 297 .loc 1 230 3 is_stmt 1 view .LVU82 + 230:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 298 .loc 1 230 23 is_stmt 0 view .LVU83 + 299 0008 1023 movs r3, #16 + 300 000a 4360 str r3, [r0, #4] + 231:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 301 .loc 1 231 3 is_stmt 1 view .LVU84 + 231:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 302 .loc 1 231 18 is_stmt 0 view .LVU85 + 303 000c 0023 movs r3, #0 + 304 000e 8360 str r3, [r0, #8] + 232:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 305 .loc 1 232 3 is_stmt 1 view .LVU86 + 232:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 306 .loc 1 232 27 is_stmt 0 view .LVU87 + ARM GAS /tmp/ccooGdrJ.s page 16 + + + 307 0010 C360 str r3, [r0, #12] + 233:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 308 .loc 1 233 3 is_stmt 1 view .LVU88 + 233:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 309 .loc 1 233 22 is_stmt 0 view .LVU89 + 310 0012 0361 str r3, [r0, #16] + 234:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 311 .loc 1 234 3 is_stmt 1 view .LVU90 + 234:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 312 .loc 1 234 22 is_stmt 0 view .LVU91 + 313 0014 4361 str r3, [r0, #20] + 235:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 314 .loc 1 235 3 is_stmt 1 view .LVU92 + 235:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 315 .loc 1 235 31 is_stmt 0 view .LVU93 + 316 0016 0376 strb r3, [r0, #24] + 236:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 317 .loc 1 236 3 is_stmt 1 view .LVU94 + 236:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 318 .loc 1 236 24 is_stmt 0 view .LVU95 + 319 0018 4376 strb r3, [r0, #25] + 237:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 320 .loc 1 237 3 is_stmt 1 view .LVU96 + 237:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 321 .loc 1 237 24 is_stmt 0 view .LVU97 + 322 001a 8376 strb r3, [r0, #26] + 238:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 323 .loc 1 238 3 is_stmt 1 view .LVU98 + 238:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 324 .loc 1 238 32 is_stmt 0 view .LVU99 + 325 001c C376 strb r3, [r0, #27] + 239:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 326 .loc 1 239 3 is_stmt 1 view .LVU100 + 239:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 327 .loc 1 239 31 is_stmt 0 view .LVU101 + 328 001e 0377 strb r3, [r0, #28] + 240:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 329 .loc 1 240 3 is_stmt 1 view .LVU102 + 240:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 330 .loc 1 240 34 is_stmt 0 view .LVU103 + 331 0020 4377 strb r3, [r0, #29] + 241:Core/Src/main.c **** { + 332 .loc 1 241 3 is_stmt 1 view .LVU104 + 241:Core/Src/main.c **** { + 333 .loc 1 241 7 is_stmt 0 view .LVU105 + 334 0022 FFF7FEFF bl HAL_CAN_Init + 335 .LVL7: + 241:Core/Src/main.c **** { + 336 .loc 1 241 6 discriminator 1 view .LVU106 + 337 0026 0028 cmp r0, #0 + 338 0028 00D1 bne .L17 + 249:Core/Src/main.c **** + 339 .loc 1 249 1 view .LVU107 + 340 @ sp needed + 341 002a 10BD pop {r4, pc} + 342 .L17: + 243:Core/Src/main.c **** } + ARM GAS /tmp/ccooGdrJ.s page 17 + + + 343 .loc 1 243 5 is_stmt 1 view .LVU108 + 344 002c FFF7FEFF bl Error_Handler + 345 .LVL8: + 346 .L19: + 347 .align 2 + 348 .L18: + 349 0030 00000000 .word hcan + 350 0034 00640040 .word 1073767424 + 351 .cfi_endproc + 352 .LFE43: + 354 .section .text.MX_TIM2_Init,"ax",%progbits + 355 .align 1 + 356 .syntax unified + 357 .code 16 + 358 .thumb_func + 360 MX_TIM2_Init: + 361 .LFB44: + 257:Core/Src/main.c **** + 362 .loc 1 257 1 view -0 + 363 .cfi_startproc + 364 @ args = 0, pretend = 0, frame = 56 + 365 @ frame_needed = 0, uses_anonymous_args = 0 + 366 0000 00B5 push {lr} + 367 .cfi_def_cfa_offset 4 + 368 .cfi_offset 14, -4 + 369 0002 8FB0 sub sp, sp, #60 + 370 .cfi_def_cfa_offset 64 + 263:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 371 .loc 1 263 3 view .LVU110 + 263:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 372 .loc 1 263 26 is_stmt 0 view .LVU111 + 373 0004 1022 movs r2, #16 + 374 0006 0021 movs r1, #0 + 375 0008 0AA8 add r0, sp, #40 + 376 000a FFF7FEFF bl memset + 377 .LVL9: + 264:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 378 .loc 1 264 3 is_stmt 1 view .LVU112 + 264:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 379 .loc 1 264 27 is_stmt 0 view .LVU113 + 380 000e 0822 movs r2, #8 + 381 0010 0021 movs r1, #0 + 382 0012 08A8 add r0, sp, #32 + 383 0014 FFF7FEFF bl memset + 384 .LVL10: + 265:Core/Src/main.c **** + 385 .loc 1 265 3 is_stmt 1 view .LVU114 + 265:Core/Src/main.c **** + 386 .loc 1 265 22 is_stmt 0 view .LVU115 + 387 0018 1C22 movs r2, #28 + 388 001a 0021 movs r1, #0 + 389 001c 01A8 add r0, sp, #4 + 390 001e FFF7FEFF bl memset + 391 .LVL11: + 270:Core/Src/main.c **** htim2.Init.Prescaler = 0; + 392 .loc 1 270 3 is_stmt 1 view .LVU116 + 270:Core/Src/main.c **** htim2.Init.Prescaler = 0; + ARM GAS /tmp/ccooGdrJ.s page 18 + + + 393 .loc 1 270 18 is_stmt 0 view .LVU117 + 394 0022 2A48 ldr r0, .L35 + 395 0024 8023 movs r3, #128 + 396 0026 DB05 lsls r3, r3, #23 + 397 0028 0360 str r3, [r0] + 271:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + 398 .loc 1 271 3 is_stmt 1 view .LVU118 + 271:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + 399 .loc 1 271 24 is_stmt 0 view .LVU119 + 400 002a 0023 movs r3, #0 + 401 002c 4360 str r3, [r0, #4] + 272:Core/Src/main.c **** htim2.Init.Period = 4294967295; + 402 .loc 1 272 3 is_stmt 1 view .LVU120 + 272:Core/Src/main.c **** htim2.Init.Period = 4294967295; + 403 .loc 1 272 26 is_stmt 0 view .LVU121 + 404 002e 8360 str r3, [r0, #8] + 273:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 405 .loc 1 273 3 is_stmt 1 view .LVU122 + 273:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 406 .loc 1 273 21 is_stmt 0 view .LVU123 + 407 0030 0122 movs r2, #1 + 408 0032 5242 rsbs r2, r2, #0 + 409 0034 C260 str r2, [r0, #12] + 274:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 410 .loc 1 274 3 is_stmt 1 view .LVU124 + 274:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 411 .loc 1 274 28 is_stmt 0 view .LVU125 + 412 0036 0361 str r3, [r0, #16] + 275:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + 413 .loc 1 275 3 is_stmt 1 view .LVU126 + 275:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + 414 .loc 1 275 32 is_stmt 0 view .LVU127 + 415 0038 8361 str r3, [r0, #24] + 276:Core/Src/main.c **** { + 416 .loc 1 276 3 is_stmt 1 view .LVU128 + 276:Core/Src/main.c **** { + 417 .loc 1 276 7 is_stmt 0 view .LVU129 + 418 003a FFF7FEFF bl HAL_TIM_Base_Init + 419 .LVL12: + 276:Core/Src/main.c **** { + 420 .loc 1 276 6 discriminator 1 view .LVU130 + 421 003e 0028 cmp r0, #0 + 422 0040 36D1 bne .L28 + 280:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + 423 .loc 1 280 3 is_stmt 1 view .LVU131 + 280:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + 424 .loc 1 280 34 is_stmt 0 view .LVU132 + 425 0042 8023 movs r3, #128 + 426 0044 5B01 lsls r3, r3, #5 + 427 0046 0A93 str r3, [sp, #40] + 281:Core/Src/main.c **** { + 428 .loc 1 281 3 is_stmt 1 view .LVU133 + 281:Core/Src/main.c **** { + 429 .loc 1 281 7 is_stmt 0 view .LVU134 + 430 0048 2048 ldr r0, .L35 + 431 004a 0AA9 add r1, sp, #40 + 432 004c FFF7FEFF bl HAL_TIM_ConfigClockSource + ARM GAS /tmp/ccooGdrJ.s page 19 + + + 433 .LVL13: + 281:Core/Src/main.c **** { + 434 .loc 1 281 6 discriminator 1 view .LVU135 + 435 0050 0028 cmp r0, #0 + 436 0052 2FD1 bne .L29 + 285:Core/Src/main.c **** { + 437 .loc 1 285 3 is_stmt 1 view .LVU136 + 285:Core/Src/main.c **** { + 438 .loc 1 285 7 is_stmt 0 view .LVU137 + 439 0054 1D48 ldr r0, .L35 + 440 0056 FFF7FEFF bl HAL_TIM_PWM_Init + 441 .LVL14: + 285:Core/Src/main.c **** { + 442 .loc 1 285 6 discriminator 1 view .LVU138 + 443 005a 0028 cmp r0, #0 + 444 005c 2CD1 bne .L30 + 289:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 445 .loc 1 289 3 is_stmt 1 view .LVU139 + 289:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 446 .loc 1 289 37 is_stmt 0 view .LVU140 + 447 005e 0023 movs r3, #0 + 448 0060 0893 str r3, [sp, #32] + 290:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + 449 .loc 1 290 3 is_stmt 1 view .LVU141 + 290:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + 450 .loc 1 290 33 is_stmt 0 view .LVU142 + 451 0062 0993 str r3, [sp, #36] + 291:Core/Src/main.c **** { + 452 .loc 1 291 3 is_stmt 1 view .LVU143 + 291:Core/Src/main.c **** { + 453 .loc 1 291 7 is_stmt 0 view .LVU144 + 454 0064 1948 ldr r0, .L35 + 455 0066 08A9 add r1, sp, #32 + 456 0068 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 457 .LVL15: + 291:Core/Src/main.c **** { + 458 .loc 1 291 6 discriminator 1 view .LVU145 + 459 006c 0028 cmp r0, #0 + 460 006e 25D1 bne .L31 + 295:Core/Src/main.c **** sConfigOC.Pulse = 0; + 461 .loc 1 295 3 is_stmt 1 view .LVU146 + 295:Core/Src/main.c **** sConfigOC.Pulse = 0; + 462 .loc 1 295 20 is_stmt 0 view .LVU147 + 463 0070 6023 movs r3, #96 + 464 0072 0193 str r3, [sp, #4] + 296:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 465 .loc 1 296 3 is_stmt 1 view .LVU148 + 296:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 466 .loc 1 296 19 is_stmt 0 view .LVU149 + 467 0074 0023 movs r3, #0 + 468 0076 0293 str r3, [sp, #8] + 297:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 469 .loc 1 297 3 is_stmt 1 view .LVU150 + 297:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 470 .loc 1 297 24 is_stmt 0 view .LVU151 + 471 0078 0393 str r3, [sp, #12] + 298:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + ARM GAS /tmp/ccooGdrJ.s page 20 + + + 472 .loc 1 298 3 is_stmt 1 view .LVU152 + 298:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 473 .loc 1 298 24 is_stmt 0 view .LVU153 + 474 007a 0593 str r3, [sp, #20] + 299:Core/Src/main.c **** { + 475 .loc 1 299 3 is_stmt 1 view .LVU154 + 299:Core/Src/main.c **** { + 476 .loc 1 299 7 is_stmt 0 view .LVU155 + 477 007c 1348 ldr r0, .L35 + 478 007e 0022 movs r2, #0 + 479 0080 01A9 add r1, sp, #4 + 480 0082 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 481 .LVL16: + 299:Core/Src/main.c **** { + 482 .loc 1 299 6 discriminator 1 view .LVU156 + 483 0086 0028 cmp r0, #0 + 484 0088 1AD1 bne .L32 + 303:Core/Src/main.c **** { + 485 .loc 1 303 3 is_stmt 1 view .LVU157 + 303:Core/Src/main.c **** { + 486 .loc 1 303 7 is_stmt 0 view .LVU158 + 487 008a 1048 ldr r0, .L35 + 488 008c 0422 movs r2, #4 + 489 008e 01A9 add r1, sp, #4 + 490 0090 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 491 .LVL17: + 303:Core/Src/main.c **** { + 492 .loc 1 303 6 discriminator 1 view .LVU159 + 493 0094 0028 cmp r0, #0 + 494 0096 15D1 bne .L33 + 307:Core/Src/main.c **** { + 495 .loc 1 307 3 is_stmt 1 view .LVU160 + 307:Core/Src/main.c **** { + 496 .loc 1 307 7 is_stmt 0 view .LVU161 + 497 0098 0C48 ldr r0, .L35 + 498 009a 0822 movs r2, #8 + 499 009c 01A9 add r1, sp, #4 + 500 009e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 501 .LVL18: + 307:Core/Src/main.c **** { + 502 .loc 1 307 6 discriminator 1 view .LVU162 + 503 00a2 0028 cmp r0, #0 + 504 00a4 10D1 bne .L34 + 314:Core/Src/main.c **** + 505 .loc 1 314 3 is_stmt 1 view .LVU163 + 506 00a6 0948 ldr r0, .L35 + 507 00a8 FFF7FEFF bl HAL_TIM_MspPostInit + 508 .LVL19: + 316:Core/Src/main.c **** + 509 .loc 1 316 1 is_stmt 0 view .LVU164 + 510 00ac 0FB0 add sp, sp, #60 + 511 @ sp needed + 512 00ae 00BD pop {pc} + 513 .L28: + 278:Core/Src/main.c **** } + 514 .loc 1 278 5 is_stmt 1 view .LVU165 + 515 00b0 FFF7FEFF bl Error_Handler + ARM GAS /tmp/ccooGdrJ.s page 21 + + + 516 .LVL20: + 517 .L29: + 283:Core/Src/main.c **** } + 518 .loc 1 283 5 view .LVU166 + 519 00b4 FFF7FEFF bl Error_Handler + 520 .LVL21: + 521 .L30: + 287:Core/Src/main.c **** } + 522 .loc 1 287 5 view .LVU167 + 523 00b8 FFF7FEFF bl Error_Handler + 524 .LVL22: + 525 .L31: + 293:Core/Src/main.c **** } + 526 .loc 1 293 5 view .LVU168 + 527 00bc FFF7FEFF bl Error_Handler + 528 .LVL23: + 529 .L32: + 301:Core/Src/main.c **** } + 530 .loc 1 301 5 view .LVU169 + 531 00c0 FFF7FEFF bl Error_Handler + 532 .LVL24: + 533 .L33: + 305:Core/Src/main.c **** } + 534 .loc 1 305 5 view .LVU170 + 535 00c4 FFF7FEFF bl Error_Handler + 536 .LVL25: + 537 .L34: + 309:Core/Src/main.c **** } + 538 .loc 1 309 5 view .LVU171 + 539 00c8 FFF7FEFF bl Error_Handler + 540 .LVL26: + 541 .L36: + 542 .align 2 + 543 .L35: + 544 00cc 00000000 .word htim2 + 545 .cfi_endproc + 546 .LFE44: + 548 .section .text.SystemClock_Config,"ax",%progbits + 549 .align 1 + 550 .global SystemClock_Config + 551 .syntax unified + 552 .code 16 + 553 .thumb_func + 555 SystemClock_Config: + 556 .LFB41: + 120:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 557 .loc 1 120 1 view -0 + 558 .cfi_startproc + 559 @ args = 0, pretend = 0, frame = 72 + 560 @ frame_needed = 0, uses_anonymous_args = 0 + 561 0000 10B5 push {r4, lr} + 562 .cfi_def_cfa_offset 8 + 563 .cfi_offset 4, -8 + 564 .cfi_offset 14, -4 + 565 0002 92B0 sub sp, sp, #72 + 566 .cfi_def_cfa_offset 80 + 121:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + ARM GAS /tmp/ccooGdrJ.s page 22 + + + 567 .loc 1 121 3 view .LVU173 + 121:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 568 .loc 1 121 22 is_stmt 0 view .LVU174 + 569 0004 3422 movs r2, #52 + 570 0006 0021 movs r1, #0 + 571 0008 05A8 add r0, sp, #20 + 572 000a FFF7FEFF bl memset + 573 .LVL27: + 122:Core/Src/main.c **** + 574 .loc 1 122 3 is_stmt 1 view .LVU175 + 122:Core/Src/main.c **** + 575 .loc 1 122 22 is_stmt 0 view .LVU176 + 576 000e 1024 movs r4, #16 + 577 0010 1022 movs r2, #16 + 578 0012 0021 movs r1, #0 + 579 0014 01A8 add r0, sp, #4 + 580 0016 FFF7FEFF bl memset + 581 .LVL28: + 127:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 582 .loc 1 127 3 is_stmt 1 view .LVU177 + 127:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 583 .loc 1 127 36 is_stmt 0 view .LVU178 + 584 001a 1223 movs r3, #18 + 585 001c 0593 str r3, [sp, #20] + 128:Core/Src/main.c **** RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 586 .loc 1 128 3 is_stmt 1 view .LVU179 + 128:Core/Src/main.c **** RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 587 .loc 1 128 30 is_stmt 0 view .LVU180 + 588 001e 113B subs r3, r3, #17 + 589 0020 0893 str r3, [sp, #32] + 129:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 590 .loc 1 129 3 is_stmt 1 view .LVU181 + 129:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 591 .loc 1 129 32 is_stmt 0 view .LVU182 + 592 0022 0A93 str r3, [sp, #40] + 130:Core/Src/main.c **** RCC_OscInitStruct.HSI14CalibrationValue = 16; + 593 .loc 1 130 3 is_stmt 1 view .LVU183 + 130:Core/Src/main.c **** RCC_OscInitStruct.HSI14CalibrationValue = 16; + 594 .loc 1 130 41 is_stmt 0 view .LVU184 + 595 0024 0994 str r4, [sp, #36] + 131:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 596 .loc 1 131 3 is_stmt 1 view .LVU185 + 131:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 597 .loc 1 131 43 is_stmt 0 view .LVU186 + 598 0026 0B94 str r4, [sp, #44] + 132:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 599 .loc 1 132 3 is_stmt 1 view .LVU187 + 133:Core/Src/main.c **** { + 600 .loc 1 133 3 view .LVU188 + 133:Core/Src/main.c **** { + 601 .loc 1 133 7 is_stmt 0 view .LVU189 + 602 0028 05A8 add r0, sp, #20 + 603 002a FFF7FEFF bl HAL_RCC_OscConfig + 604 .LVL29: + 133:Core/Src/main.c **** { + 605 .loc 1 133 6 discriminator 1 view .LVU190 + 606 002e 0028 cmp r0, #0 + ARM GAS /tmp/ccooGdrJ.s page 23 + + + 607 0030 0DD1 bne .L40 + 140:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1; + 608 .loc 1 140 3 is_stmt 1 view .LVU191 + 140:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1; + 609 .loc 1 140 31 is_stmt 0 view .LVU192 + 610 0032 0723 movs r3, #7 + 611 0034 0193 str r3, [sp, #4] + 142:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 612 .loc 1 142 3 is_stmt 1 view .LVU193 + 142:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 613 .loc 1 142 34 is_stmt 0 view .LVU194 + 614 0036 0023 movs r3, #0 + 615 0038 0293 str r3, [sp, #8] + 143:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 616 .loc 1 143 3 is_stmt 1 view .LVU195 + 143:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 617 .loc 1 143 35 is_stmt 0 view .LVU196 + 618 003a 0393 str r3, [sp, #12] + 144:Core/Src/main.c **** + 619 .loc 1 144 3 is_stmt 1 view .LVU197 + 144:Core/Src/main.c **** + 620 .loc 1 144 36 is_stmt 0 view .LVU198 + 621 003c 0493 str r3, [sp, #16] + 146:Core/Src/main.c **** { + 622 .loc 1 146 3 is_stmt 1 view .LVU199 + 146:Core/Src/main.c **** { + 623 .loc 1 146 7 is_stmt 0 view .LVU200 + 624 003e 0021 movs r1, #0 + 625 0040 01A8 add r0, sp, #4 + 626 0042 FFF7FEFF bl HAL_RCC_ClockConfig + 627 .LVL30: + 146:Core/Src/main.c **** { + 628 .loc 1 146 6 discriminator 1 view .LVU201 + 629 0046 0028 cmp r0, #0 + 630 0048 03D1 bne .L41 + 150:Core/Src/main.c **** + 631 .loc 1 150 1 view .LVU202 + 632 004a 12B0 add sp, sp, #72 + 633 @ sp needed + 634 004c 10BD pop {r4, pc} + 635 .L40: + 135:Core/Src/main.c **** } + 636 .loc 1 135 5 is_stmt 1 view .LVU203 + 637 004e FFF7FEFF bl Error_Handler + 638 .LVL31: + 639 .L41: + 148:Core/Src/main.c **** } + 640 .loc 1 148 5 view .LVU204 + 641 0052 FFF7FEFF bl Error_Handler + 642 .LVL32: + 643 .cfi_endproc + 644 .LFE41: + 646 .section .text.main,"ax",%progbits + 647 .align 1 + 648 .global main + 649 .syntax unified + 650 .code 16 + ARM GAS /tmp/ccooGdrJ.s page 24 + + + 651 .thumb_func + 653 main: + 654 .LFB40: + 73:Core/Src/main.c **** /* USER CODE BEGIN 1 */ + 655 .loc 1 73 1 view -0 + 656 .cfi_startproc + 657 @ Volatile: function does not return. + 658 @ args = 0, pretend = 0, frame = 0 + 659 @ frame_needed = 0, uses_anonymous_args = 0 + 660 0000 10B5 push {r4, lr} + 661 .cfi_def_cfa_offset 8 + 662 .cfi_offset 4, -8 + 663 .cfi_offset 14, -4 + 81:Core/Src/main.c **** + 664 .loc 1 81 3 view .LVU206 + 665 0002 FFF7FEFF bl HAL_Init + 666 .LVL33: + 88:Core/Src/main.c **** + 667 .loc 1 88 3 view .LVU207 + 668 0006 FFF7FEFF bl SystemClock_Config + 669 .LVL34: + 95:Core/Src/main.c **** MX_ADC_Init(); + 670 .loc 1 95 3 view .LVU208 + 671 000a FFF7FEFF bl MX_GPIO_Init + 672 .LVL35: + 96:Core/Src/main.c **** MX_CAN_Init(); + 673 .loc 1 96 3 view .LVU209 + 674 000e FFF7FEFF bl MX_ADC_Init + 675 .LVL36: + 97:Core/Src/main.c **** MX_TIM2_Init(); + 676 .loc 1 97 3 view .LVU210 + 677 0012 FFF7FEFF bl MX_CAN_Init + 678 .LVL37: + 98:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 679 .loc 1 98 3 view .LVU211 + 680 0016 FFF7FEFF bl MX_TIM2_Init + 681 .LVL38: + 100:Core/Src/main.c **** /* USER CODE END 2 */ + 682 .loc 1 100 3 view .LVU212 + 683 001a 0348 ldr r0, .L44 + 684 001c FFF7FEFF bl adc_init + 685 .LVL39: + 686 .L43: + 105:Core/Src/main.c **** { + 687 .loc 1 105 3 view .LVU213 + 110:Core/Src/main.c **** } + 688 .loc 1 110 5 discriminator 1 view .LVU214 + 689 0020 0148 ldr r0, .L44 + 690 0022 FFF7FEFF bl adc_loop + 691 .LVL40: + 105:Core/Src/main.c **** { + 692 .loc 1 105 9 view .LVU215 + 693 0026 FBE7 b .L43 + 694 .L45: + 695 .align 2 + 696 .L44: + 697 0028 00000000 .word hadc + ARM GAS /tmp/ccooGdrJ.s page 25 + + + 698 .cfi_endproc + 699 .LFE40: + 701 .global htim2 + 702 .section .bss.htim2,"aw",%nobits + 703 .align 2 + 706 htim2: + 707 0000 00000000 .space 72 + 707 00000000 + 707 00000000 + 707 00000000 + 707 00000000 + 708 .global hcan + 709 .section .bss.hcan,"aw",%nobits + 710 .align 2 + 713 hcan: + 714 0000 00000000 .space 40 + 714 00000000 + 714 00000000 + 714 00000000 + 714 00000000 + 715 .global hadc + 716 .section .bss.hadc,"aw",%nobits + 717 .align 2 + 720 hadc: + 721 0000 00000000 .space 64 + 721 00000000 + 721 00000000 + 721 00000000 + 721 00000000 + 722 .text + 723 .Letext0: + 724 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 725 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 726 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 727 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 728 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 729 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + 730 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 731 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 732 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h" + 733 .file 12 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h" + 734 .file 13 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h" + 735 .file 14 "Core/Inc/main.h" + 736 .file 15 "Core/Inc/adc.h" + 737 .file 16 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 738 .file 17 "" + ARM GAS /tmp/ccooGdrJ.s page 26 + + +DEFINED SYMBOLS + *ABS*:00000000 main.c + /tmp/ccooGdrJ.s:19 .text.MX_GPIO_Init:00000000 $t + /tmp/ccooGdrJ.s:24 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccooGdrJ.s:92 .text.MX_GPIO_Init:00000040 $d + /tmp/ccooGdrJ.s:97 .text.Error_Handler:00000000 $t + /tmp/ccooGdrJ.s:103 .text.Error_Handler:00000000 Error_Handler + /tmp/ccooGdrJ.s:135 .text.MX_ADC_Init:00000000 $t + /tmp/ccooGdrJ.s:140 .text.MX_ADC_Init:00000000 MX_ADC_Init + /tmp/ccooGdrJ.s:271 .text.MX_ADC_Init:00000080 $d + /tmp/ccooGdrJ.s:720 .bss.hadc:00000000 hadc + /tmp/ccooGdrJ.s:277 .text.MX_CAN_Init:00000000 $t + /tmp/ccooGdrJ.s:282 .text.MX_CAN_Init:00000000 MX_CAN_Init + /tmp/ccooGdrJ.s:349 .text.MX_CAN_Init:00000030 $d + /tmp/ccooGdrJ.s:713 .bss.hcan:00000000 hcan + /tmp/ccooGdrJ.s:355 .text.MX_TIM2_Init:00000000 $t + /tmp/ccooGdrJ.s:360 .text.MX_TIM2_Init:00000000 MX_TIM2_Init + /tmp/ccooGdrJ.s:544 .text.MX_TIM2_Init:000000cc $d + /tmp/ccooGdrJ.s:706 .bss.htim2:00000000 htim2 + /tmp/ccooGdrJ.s:549 .text.SystemClock_Config:00000000 $t + /tmp/ccooGdrJ.s:555 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccooGdrJ.s:647 .text.main:00000000 $t + /tmp/ccooGdrJ.s:653 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Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Core/Inc/main.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Core/Src/stm32f0xx_hal_msp.lst b/Software/build/debug/Core/Src/stm32f0xx_hal_msp.lst new file mode 100644 index 0000000..fb9febf --- /dev/null +++ b/Software/build/debug/Core/Src/stm32f0xx_hal_msp.lst @@ -0,0 +1,1112 @@ +ARM GAS /tmp/cclJcjsj.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_msp.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Core/Src/stm32f0xx_hal_msp.c" + 18 .section .text.HAL_MspInit,"ax",%progbits + 19 .align 1 + 20 .global HAL_MspInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_MspInit: + 26 .LFB40: + 1:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/stm32f0xx_hal_msp.c **** /** + 3:Core/Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 4:Core/Src/stm32f0xx_hal_msp.c **** * @file stm32f0xx_hal_msp.c + 5:Core/Src/stm32f0xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization + 6:Core/Src/stm32f0xx_hal_msp.c **** * and de-Initialization codes. + 7:Core/Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 8:Core/Src/stm32f0xx_hal_msp.c **** * @attention + 9:Core/Src/stm32f0xx_hal_msp.c **** * + 10:Core/Src/stm32f0xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics. + 11:Core/Src/stm32f0xx_hal_msp.c **** * All rights reserved. + 12:Core/Src/stm32f0xx_hal_msp.c **** * + 13:Core/Src/stm32f0xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file + 14:Core/Src/stm32f0xx_hal_msp.c **** * in the root directory of this software component. + 15:Core/Src/stm32f0xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 16:Core/Src/stm32f0xx_hal_msp.c **** * + 17:Core/Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 18:Core/Src/stm32f0xx_hal_msp.c **** */ + 19:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END Header */ + 20:Core/Src/stm32f0xx_hal_msp.c **** + 21:Core/Src/stm32f0xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ + 22:Core/Src/stm32f0xx_hal_msp.c **** #include "main.h" + 23:Core/Src/stm32f0xx_hal_msp.c **** + 24:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Includes */ + 25:Core/Src/stm32f0xx_hal_msp.c **** + 26:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END Includes */ + 27:Core/Src/stm32f0xx_hal_msp.c **** + 28:Core/Src/stm32f0xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ + 29:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TD */ + 30:Core/Src/stm32f0xx_hal_msp.c **** + 31:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TD */ + 32:Core/Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/cclJcjsj.s page 2 + + + 33:Core/Src/stm32f0xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ + 34:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Define */ + 35:Core/Src/stm32f0xx_hal_msp.c **** + 36:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END Define */ + 37:Core/Src/stm32f0xx_hal_msp.c **** + 38:Core/Src/stm32f0xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ + 39:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Macro */ + 40:Core/Src/stm32f0xx_hal_msp.c **** + 41:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END Macro */ + 42:Core/Src/stm32f0xx_hal_msp.c **** + 43:Core/Src/stm32f0xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ + 44:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN PV */ + 45:Core/Src/stm32f0xx_hal_msp.c **** + 46:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END PV */ + 47:Core/Src/stm32f0xx_hal_msp.c **** + 48:Core/Src/stm32f0xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ + 49:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN PFP */ + 50:Core/Src/stm32f0xx_hal_msp.c **** + 51:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END PFP */ + 52:Core/Src/stm32f0xx_hal_msp.c **** + 53:Core/Src/stm32f0xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ + 54:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ + 55:Core/Src/stm32f0xx_hal_msp.c **** + 56:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ + 57:Core/Src/stm32f0xx_hal_msp.c **** + 58:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN 0 */ + 59:Core/Src/stm32f0xx_hal_msp.c **** + 60:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END 0 */ + 61:Core/Src/stm32f0xx_hal_msp.c **** + 62:Core/Src/stm32f0xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + 63:Core/Src/stm32f0xx_hal_msp.c **** /** + 64:Core/Src/stm32f0xx_hal_msp.c **** * Initializes the Global MSP. + 65:Core/Src/stm32f0xx_hal_msp.c **** */ + 66:Core/Src/stm32f0xx_hal_msp.c **** void HAL_MspInit(void) + 67:Core/Src/stm32f0xx_hal_msp.c **** { + 27 .loc 1 67 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 8 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. + 32 0000 82B0 sub sp, sp, #8 + 33 .cfi_def_cfa_offset 8 + 68:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ + 69:Core/Src/stm32f0xx_hal_msp.c **** + 70:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END MspInit 0 */ + 71:Core/Src/stm32f0xx_hal_msp.c **** + 72:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 34 .loc 1 72 3 view .LVU1 + 35 .LBB2: + 36 .loc 1 72 3 view .LVU2 + 37 .loc 1 72 3 view .LVU3 + 38 0002 0A4B ldr r3, .L2 + 39 0004 9969 ldr r1, [r3, #24] + 40 0006 0122 movs r2, #1 + 41 0008 1143 orrs r1, r2 + 42 000a 9961 str r1, [r3, #24] + 43 .loc 1 72 3 view .LVU4 + ARM GAS /tmp/cclJcjsj.s page 3 + + + 44 000c 9969 ldr r1, [r3, #24] + 45 000e 0A40 ands r2, r1 + 46 0010 0092 str r2, [sp] + 47 .loc 1 72 3 view .LVU5 + 48 0012 009A ldr r2, [sp] + 49 .LBE2: + 50 .loc 1 72 3 view .LVU6 + 73:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 51 .loc 1 73 3 view .LVU7 + 52 .LBB3: + 53 .loc 1 73 3 view .LVU8 + 54 .loc 1 73 3 view .LVU9 + 55 0014 DA69 ldr r2, [r3, #28] + 56 0016 8021 movs r1, #128 + 57 0018 4905 lsls r1, r1, #21 + 58 001a 0A43 orrs r2, r1 + 59 001c DA61 str r2, [r3, #28] + 60 .loc 1 73 3 view .LVU10 + 61 001e DB69 ldr r3, [r3, #28] + 62 0020 0B40 ands r3, r1 + 63 0022 0193 str r3, [sp, #4] + 64 .loc 1 73 3 view .LVU11 + 65 0024 019B ldr r3, [sp, #4] + 66 .LBE3: + 67 .loc 1 73 3 view .LVU12 + 74:Core/Src/stm32f0xx_hal_msp.c **** + 75:Core/Src/stm32f0xx_hal_msp.c **** /* System interrupt init*/ + 76:Core/Src/stm32f0xx_hal_msp.c **** + 77:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ + 78:Core/Src/stm32f0xx_hal_msp.c **** + 79:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END MspInit 1 */ + 80:Core/Src/stm32f0xx_hal_msp.c **** } + 68 .loc 1 80 1 is_stmt 0 view .LVU13 + 69 0026 02B0 add sp, sp, #8 + 70 @ sp needed + 71 0028 7047 bx lr + 72 .L3: + 73 002a C046 .align 2 + 74 .L2: + 75 002c 00100240 .word 1073876992 + 76 .cfi_endproc + 77 .LFE40: + 79 .section .text.HAL_ADC_MspInit,"ax",%progbits + 80 .align 1 + 81 .global HAL_ADC_MspInit + 82 .syntax unified + 83 .code 16 + 84 .thumb_func + 86 HAL_ADC_MspInit: + 87 .LVL0: + 88 .LFB41: + 81:Core/Src/stm32f0xx_hal_msp.c **** + 82:Core/Src/stm32f0xx_hal_msp.c **** /** + 83:Core/Src/stm32f0xx_hal_msp.c **** * @brief ADC MSP Initialization + 84:Core/Src/stm32f0xx_hal_msp.c **** * This function configures the hardware resources used in this example + 85:Core/Src/stm32f0xx_hal_msp.c **** * @param hadc: ADC handle pointer + 86:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + ARM GAS /tmp/cclJcjsj.s page 4 + + + 87:Core/Src/stm32f0xx_hal_msp.c **** */ + 88:Core/Src/stm32f0xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) + 89:Core/Src/stm32f0xx_hal_msp.c **** { + 89 .loc 1 89 1 is_stmt 1 view -0 + 90 .cfi_startproc + 91 @ args = 0, pretend = 0, frame = 32 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 .loc 1 89 1 is_stmt 0 view .LVU15 + 94 0000 10B5 push {r4, lr} + 95 .cfi_def_cfa_offset 8 + 96 .cfi_offset 4, -8 + 97 .cfi_offset 14, -4 + 98 0002 88B0 sub sp, sp, #32 + 99 .cfi_def_cfa_offset 40 + 100 0004 0400 movs r4, r0 + 90:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 101 .loc 1 90 3 is_stmt 1 view .LVU16 + 102 .loc 1 90 20 is_stmt 0 view .LVU17 + 103 0006 1422 movs r2, #20 + 104 0008 0021 movs r1, #0 + 105 000a 03A8 add r0, sp, #12 + 106 .LVL1: + 107 .loc 1 90 20 view .LVU18 + 108 000c FFF7FEFF bl memset + 109 .LVL2: + 91:Core/Src/stm32f0xx_hal_msp.c **** if(hadc->Instance==ADC1) + 110 .loc 1 91 3 is_stmt 1 view .LVU19 + 111 .loc 1 91 10 is_stmt 0 view .LVU20 + 112 0010 2268 ldr r2, [r4] + 113 .loc 1 91 5 view .LVU21 + 114 0012 104B ldr r3, .L7 + 115 0014 9A42 cmp r2, r3 + 116 0016 01D0 beq .L6 + 117 .L4: + 92:Core/Src/stm32f0xx_hal_msp.c **** { + 93:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */ + 94:Core/Src/stm32f0xx_hal_msp.c **** + 95:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */ + 96:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock enable */ + 97:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE(); + 98:Core/Src/stm32f0xx_hal_msp.c **** + 99:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 100:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 101:Core/Src/stm32f0xx_hal_msp.c **** PA0 ------> ADC_IN0 + 102:Core/Src/stm32f0xx_hal_msp.c **** PA1 ------> ADC_IN1 + 103:Core/Src/stm32f0xx_hal_msp.c **** */ + 104:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + 105:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 106:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 107:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 108:Core/Src/stm32f0xx_hal_msp.c **** + 109:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ + 110:Core/Src/stm32f0xx_hal_msp.c **** + 111:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */ + 112:Core/Src/stm32f0xx_hal_msp.c **** } + 113:Core/Src/stm32f0xx_hal_msp.c **** + 114:Core/Src/stm32f0xx_hal_msp.c **** } + ARM GAS /tmp/cclJcjsj.s page 5 + + + 118 .loc 1 114 1 view .LVU22 + 119 0018 08B0 add sp, sp, #32 + 120 @ sp needed + 121 .LVL3: + 122 .loc 1 114 1 view .LVU23 + 123 001a 10BD pop {r4, pc} + 124 .LVL4: + 125 .L6: + 97:Core/Src/stm32f0xx_hal_msp.c **** + 126 .loc 1 97 5 is_stmt 1 view .LVU24 + 127 .LBB4: + 97:Core/Src/stm32f0xx_hal_msp.c **** + 128 .loc 1 97 5 view .LVU25 + 97:Core/Src/stm32f0xx_hal_msp.c **** + 129 .loc 1 97 5 view .LVU26 + 130 001c 0E4B ldr r3, .L7+4 + 131 001e 9A69 ldr r2, [r3, #24] + 132 0020 8021 movs r1, #128 + 133 0022 8900 lsls r1, r1, #2 + 134 0024 0A43 orrs r2, r1 + 135 0026 9A61 str r2, [r3, #24] + 97:Core/Src/stm32f0xx_hal_msp.c **** + 136 .loc 1 97 5 view .LVU27 + 137 0028 9A69 ldr r2, [r3, #24] + 138 002a 0A40 ands r2, r1 + 139 002c 0192 str r2, [sp, #4] + 97:Core/Src/stm32f0xx_hal_msp.c **** + 140 .loc 1 97 5 view .LVU28 + 141 002e 019A ldr r2, [sp, #4] + 142 .LBE4: + 97:Core/Src/stm32f0xx_hal_msp.c **** + 143 .loc 1 97 5 view .LVU29 + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 144 .loc 1 99 5 view .LVU30 + 145 .LBB5: + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 146 .loc 1 99 5 view .LVU31 + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 147 .loc 1 99 5 view .LVU32 + 148 0030 5A69 ldr r2, [r3, #20] + 149 0032 8021 movs r1, #128 + 150 0034 8902 lsls r1, r1, #10 + 151 0036 0A43 orrs r2, r1 + 152 0038 5A61 str r2, [r3, #20] + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 153 .loc 1 99 5 view .LVU33 + 154 003a 5B69 ldr r3, [r3, #20] + 155 003c 0B40 ands r3, r1 + 156 003e 0293 str r3, [sp, #8] + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 157 .loc 1 99 5 view .LVU34 + 158 0040 029B ldr r3, [sp, #8] + 159 .LBE5: + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 160 .loc 1 99 5 view .LVU35 + 104:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 161 .loc 1 104 5 view .LVU36 + ARM GAS /tmp/cclJcjsj.s page 6 + + + 104:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 162 .loc 1 104 25 is_stmt 0 view .LVU37 + 163 0042 0323 movs r3, #3 + 164 0044 0393 str r3, [sp, #12] + 105:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 165 .loc 1 105 5 is_stmt 1 view .LVU38 + 105:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 166 .loc 1 105 26 is_stmt 0 view .LVU39 + 167 0046 0493 str r3, [sp, #16] + 106:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 168 .loc 1 106 5 is_stmt 1 view .LVU40 + 107:Core/Src/stm32f0xx_hal_msp.c **** + 169 .loc 1 107 5 view .LVU41 + 170 0048 9020 movs r0, #144 + 171 004a 03A9 add r1, sp, #12 + 172 004c C005 lsls r0, r0, #23 + 173 004e FFF7FEFF bl HAL_GPIO_Init + 174 .LVL5: + 175 .loc 1 114 1 is_stmt 0 view .LVU42 + 176 0052 E1E7 b .L4 + 177 .L8: + 178 .align 2 + 179 .L7: + 180 0054 00240140 .word 1073816576 + 181 0058 00100240 .word 1073876992 + 182 .cfi_endproc + 183 .LFE41: + 185 .section .text.HAL_ADC_MspDeInit,"ax",%progbits + 186 .align 1 + 187 .global HAL_ADC_MspDeInit + 188 .syntax unified + 189 .code 16 + 190 .thumb_func + 192 HAL_ADC_MspDeInit: + 193 .LVL6: + 194 .LFB42: + 115:Core/Src/stm32f0xx_hal_msp.c **** + 116:Core/Src/stm32f0xx_hal_msp.c **** /** + 117:Core/Src/stm32f0xx_hal_msp.c **** * @brief ADC MSP De-Initialization + 118:Core/Src/stm32f0xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 119:Core/Src/stm32f0xx_hal_msp.c **** * @param hadc: ADC handle pointer + 120:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 121:Core/Src/stm32f0xx_hal_msp.c **** */ + 122:Core/Src/stm32f0xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) + 123:Core/Src/stm32f0xx_hal_msp.c **** { + 195 .loc 1 123 1 is_stmt 1 view -0 + 196 .cfi_startproc + 197 @ args = 0, pretend = 0, frame = 0 + 198 @ frame_needed = 0, uses_anonymous_args = 0 + 199 .loc 1 123 1 is_stmt 0 view .LVU44 + 200 0000 10B5 push {r4, lr} + 201 .cfi_def_cfa_offset 8 + 202 .cfi_offset 4, -8 + 203 .cfi_offset 14, -4 + 124:Core/Src/stm32f0xx_hal_msp.c **** if(hadc->Instance==ADC1) + 204 .loc 1 124 3 is_stmt 1 view .LVU45 + 205 .loc 1 124 10 is_stmt 0 view .LVU46 + ARM GAS /tmp/cclJcjsj.s page 7 + + + 206 0002 0268 ldr r2, [r0] + 207 .loc 1 124 5 view .LVU47 + 208 0004 074B ldr r3, .L12 + 209 0006 9A42 cmp r2, r3 + 210 0008 00D0 beq .L11 + 211 .LVL7: + 212 .L9: + 125:Core/Src/stm32f0xx_hal_msp.c **** { + 126:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */ + 127:Core/Src/stm32f0xx_hal_msp.c **** + 128:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */ + 129:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock disable */ + 130:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE(); + 131:Core/Src/stm32f0xx_hal_msp.c **** + 132:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 133:Core/Src/stm32f0xx_hal_msp.c **** PA0 ------> ADC_IN0 + 134:Core/Src/stm32f0xx_hal_msp.c **** PA1 ------> ADC_IN1 + 135:Core/Src/stm32f0xx_hal_msp.c **** */ + 136:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_1); + 137:Core/Src/stm32f0xx_hal_msp.c **** + 138:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ + 139:Core/Src/stm32f0xx_hal_msp.c **** + 140:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */ + 141:Core/Src/stm32f0xx_hal_msp.c **** } + 142:Core/Src/stm32f0xx_hal_msp.c **** + 143:Core/Src/stm32f0xx_hal_msp.c **** } + 213 .loc 1 143 1 view .LVU48 + 214 @ sp needed + 215 000a 10BD pop {r4, pc} + 216 .LVL8: + 217 .L11: + 130:Core/Src/stm32f0xx_hal_msp.c **** + 218 .loc 1 130 5 is_stmt 1 view .LVU49 + 219 000c 064A ldr r2, .L12+4 + 220 000e 9369 ldr r3, [r2, #24] + 221 0010 0649 ldr r1, .L12+8 + 222 0012 0B40 ands r3, r1 + 223 0014 9361 str r3, [r2, #24] + 136:Core/Src/stm32f0xx_hal_msp.c **** + 224 .loc 1 136 5 view .LVU50 + 225 0016 9020 movs r0, #144 + 226 .LVL9: + 136:Core/Src/stm32f0xx_hal_msp.c **** + 227 .loc 1 136 5 is_stmt 0 view .LVU51 + 228 0018 0321 movs r1, #3 + 229 001a C005 lsls r0, r0, #23 + 230 001c FFF7FEFF bl HAL_GPIO_DeInit + 231 .LVL10: + 232 .loc 1 143 1 view .LVU52 + 233 0020 F3E7 b .L9 + 234 .L13: + 235 0022 C046 .align 2 + 236 .L12: + 237 0024 00240140 .word 1073816576 + 238 0028 00100240 .word 1073876992 + 239 002c FFFDFFFF .word -513 + 240 .cfi_endproc + ARM GAS /tmp/cclJcjsj.s page 8 + + + 241 .LFE42: + 243 .section .text.HAL_CAN_MspInit,"ax",%progbits + 244 .align 1 + 245 .global HAL_CAN_MspInit + 246 .syntax unified + 247 .code 16 + 248 .thumb_func + 250 HAL_CAN_MspInit: + 251 .LVL11: + 252 .LFB43: + 144:Core/Src/stm32f0xx_hal_msp.c **** + 145:Core/Src/stm32f0xx_hal_msp.c **** /** + 146:Core/Src/stm32f0xx_hal_msp.c **** * @brief CAN MSP Initialization + 147:Core/Src/stm32f0xx_hal_msp.c **** * This function configures the hardware resources used in this example + 148:Core/Src/stm32f0xx_hal_msp.c **** * @param hcan: CAN handle pointer + 149:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 150:Core/Src/stm32f0xx_hal_msp.c **** */ + 151:Core/Src/stm32f0xx_hal_msp.c **** void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) + 152:Core/Src/stm32f0xx_hal_msp.c **** { + 253 .loc 1 152 1 is_stmt 1 view -0 + 254 .cfi_startproc + 255 @ args = 0, pretend = 0, frame = 32 + 256 @ frame_needed = 0, uses_anonymous_args = 0 + 257 .loc 1 152 1 is_stmt 0 view .LVU54 + 258 0000 10B5 push {r4, lr} + 259 .cfi_def_cfa_offset 8 + 260 .cfi_offset 4, -8 + 261 .cfi_offset 14, -4 + 262 0002 88B0 sub sp, sp, #32 + 263 .cfi_def_cfa_offset 40 + 264 0004 0400 movs r4, r0 + 153:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 265 .loc 1 153 3 is_stmt 1 view .LVU55 + 266 .loc 1 153 20 is_stmt 0 view .LVU56 + 267 0006 1422 movs r2, #20 + 268 0008 0021 movs r1, #0 + 269 000a 03A8 add r0, sp, #12 + 270 .LVL12: + 271 .loc 1 153 20 view .LVU57 + 272 000c FFF7FEFF bl memset + 273 .LVL13: + 154:Core/Src/stm32f0xx_hal_msp.c **** if(hcan->Instance==CAN) + 274 .loc 1 154 3 is_stmt 1 view .LVU58 + 275 .loc 1 154 10 is_stmt 0 view .LVU59 + 276 0010 2268 ldr r2, [r4] + 277 .loc 1 154 5 view .LVU60 + 278 0012 134B ldr r3, .L17 + 279 0014 9A42 cmp r2, r3 + 280 0016 01D0 beq .L16 + 281 .L14: + 155:Core/Src/stm32f0xx_hal_msp.c **** { + 156:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 0 */ + 157:Core/Src/stm32f0xx_hal_msp.c **** + 158:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END CAN_MspInit 0 */ + 159:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock enable */ + 160:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_ENABLE(); + 161:Core/Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/cclJcjsj.s page 9 + + + 162:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 163:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 164:Core/Src/stm32f0xx_hal_msp.c **** PA11 ------> CAN_RX + 165:Core/Src/stm32f0xx_hal_msp.c **** PA12 ------> CAN_TX + 166:Core/Src/stm32f0xx_hal_msp.c **** */ + 167:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; + 168:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 169:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 170:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 171:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_CAN; + 172:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 173:Core/Src/stm32f0xx_hal_msp.c **** + 174:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */ + 175:Core/Src/stm32f0xx_hal_msp.c **** + 176:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END CAN_MspInit 1 */ + 177:Core/Src/stm32f0xx_hal_msp.c **** } + 178:Core/Src/stm32f0xx_hal_msp.c **** + 179:Core/Src/stm32f0xx_hal_msp.c **** } + 282 .loc 1 179 1 view .LVU61 + 283 0018 08B0 add sp, sp, #32 + 284 @ sp needed + 285 .LVL14: + 286 .loc 1 179 1 view .LVU62 + 287 001a 10BD pop {r4, pc} + 288 .LVL15: + 289 .L16: + 160:Core/Src/stm32f0xx_hal_msp.c **** + 290 .loc 1 160 5 is_stmt 1 view .LVU63 + 291 .LBB6: + 160:Core/Src/stm32f0xx_hal_msp.c **** + 292 .loc 1 160 5 view .LVU64 + 160:Core/Src/stm32f0xx_hal_msp.c **** + 293 .loc 1 160 5 view .LVU65 + 294 001c 114B ldr r3, .L17+4 + 295 001e DA69 ldr r2, [r3, #28] + 296 0020 8021 movs r1, #128 + 297 0022 8904 lsls r1, r1, #18 + 298 0024 0A43 orrs r2, r1 + 299 0026 DA61 str r2, [r3, #28] + 160:Core/Src/stm32f0xx_hal_msp.c **** + 300 .loc 1 160 5 view .LVU66 + 301 0028 DA69 ldr r2, [r3, #28] + 302 002a 0A40 ands r2, r1 + 303 002c 0192 str r2, [sp, #4] + 160:Core/Src/stm32f0xx_hal_msp.c **** + 304 .loc 1 160 5 view .LVU67 + 305 002e 019A ldr r2, [sp, #4] + 306 .LBE6: + 160:Core/Src/stm32f0xx_hal_msp.c **** + 307 .loc 1 160 5 view .LVU68 + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 308 .loc 1 162 5 view .LVU69 + 309 .LBB7: + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 310 .loc 1 162 5 view .LVU70 + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 311 .loc 1 162 5 view .LVU71 + ARM GAS /tmp/cclJcjsj.s page 10 + + + 312 0030 5A69 ldr r2, [r3, #20] + 313 0032 8021 movs r1, #128 + 314 0034 8902 lsls r1, r1, #10 + 315 0036 0A43 orrs r2, r1 + 316 0038 5A61 str r2, [r3, #20] + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 317 .loc 1 162 5 view .LVU72 + 318 003a 5B69 ldr r3, [r3, #20] + 319 003c 0B40 ands r3, r1 + 320 003e 0293 str r3, [sp, #8] + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 321 .loc 1 162 5 view .LVU73 + 322 0040 029B ldr r3, [sp, #8] + 323 .LBE7: + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 324 .loc 1 162 5 view .LVU74 + 167:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 325 .loc 1 167 5 view .LVU75 + 167:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 326 .loc 1 167 25 is_stmt 0 view .LVU76 + 327 0042 C023 movs r3, #192 + 328 0044 5B01 lsls r3, r3, #5 + 329 0046 0393 str r3, [sp, #12] + 168:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 330 .loc 1 168 5 is_stmt 1 view .LVU77 + 168:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 331 .loc 1 168 26 is_stmt 0 view .LVU78 + 332 0048 0223 movs r3, #2 + 333 004a 0493 str r3, [sp, #16] + 169:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 334 .loc 1 169 5 is_stmt 1 view .LVU79 + 170:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_CAN; + 335 .loc 1 170 5 view .LVU80 + 170:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_CAN; + 336 .loc 1 170 27 is_stmt 0 view .LVU81 + 337 004c 0133 adds r3, r3, #1 + 338 004e 0693 str r3, [sp, #24] + 171:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 339 .loc 1 171 5 is_stmt 1 view .LVU82 + 171:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 340 .loc 1 171 31 is_stmt 0 view .LVU83 + 341 0050 0133 adds r3, r3, #1 + 342 0052 0793 str r3, [sp, #28] + 172:Core/Src/stm32f0xx_hal_msp.c **** + 343 .loc 1 172 5 is_stmt 1 view .LVU84 + 344 0054 9020 movs r0, #144 + 345 0056 03A9 add r1, sp, #12 + 346 0058 C005 lsls r0, r0, #23 + 347 005a FFF7FEFF bl HAL_GPIO_Init + 348 .LVL16: + 349 .loc 1 179 1 is_stmt 0 view .LVU85 + 350 005e DBE7 b .L14 + 351 .L18: + 352 .align 2 + 353 .L17: + 354 0060 00640040 .word 1073767424 + 355 0064 00100240 .word 1073876992 + ARM GAS /tmp/cclJcjsj.s page 11 + + + 356 .cfi_endproc + 357 .LFE43: + 359 .section .text.HAL_CAN_MspDeInit,"ax",%progbits + 360 .align 1 + 361 .global HAL_CAN_MspDeInit + 362 .syntax unified + 363 .code 16 + 364 .thumb_func + 366 HAL_CAN_MspDeInit: + 367 .LVL17: + 368 .LFB44: + 180:Core/Src/stm32f0xx_hal_msp.c **** + 181:Core/Src/stm32f0xx_hal_msp.c **** /** + 182:Core/Src/stm32f0xx_hal_msp.c **** * @brief CAN MSP De-Initialization + 183:Core/Src/stm32f0xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 184:Core/Src/stm32f0xx_hal_msp.c **** * @param hcan: CAN handle pointer + 185:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 186:Core/Src/stm32f0xx_hal_msp.c **** */ + 187:Core/Src/stm32f0xx_hal_msp.c **** void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) + 188:Core/Src/stm32f0xx_hal_msp.c **** { + 369 .loc 1 188 1 is_stmt 1 view -0 + 370 .cfi_startproc + 371 @ args = 0, pretend = 0, frame = 0 + 372 @ frame_needed = 0, uses_anonymous_args = 0 + 373 .loc 1 188 1 is_stmt 0 view .LVU87 + 374 0000 10B5 push {r4, lr} + 375 .cfi_def_cfa_offset 8 + 376 .cfi_offset 4, -8 + 377 .cfi_offset 14, -4 + 189:Core/Src/stm32f0xx_hal_msp.c **** if(hcan->Instance==CAN) + 378 .loc 1 189 3 is_stmt 1 view .LVU88 + 379 .loc 1 189 10 is_stmt 0 view .LVU89 + 380 0002 0268 ldr r2, [r0] + 381 .loc 1 189 5 view .LVU90 + 382 0004 074B ldr r3, .L22 + 383 0006 9A42 cmp r2, r3 + 384 0008 00D0 beq .L21 + 385 .LVL18: + 386 .L19: + 190:Core/Src/stm32f0xx_hal_msp.c **** { + 191:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 0 */ + 192:Core/Src/stm32f0xx_hal_msp.c **** + 193:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 0 */ + 194:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock disable */ + 195:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_DISABLE(); + 196:Core/Src/stm32f0xx_hal_msp.c **** + 197:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 198:Core/Src/stm32f0xx_hal_msp.c **** PA11 ------> CAN_RX + 199:Core/Src/stm32f0xx_hal_msp.c **** PA12 ------> CAN_TX + 200:Core/Src/stm32f0xx_hal_msp.c **** */ + 201:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); + 202:Core/Src/stm32f0xx_hal_msp.c **** + 203:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */ + 204:Core/Src/stm32f0xx_hal_msp.c **** + 205:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 1 */ + 206:Core/Src/stm32f0xx_hal_msp.c **** } + 207:Core/Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/cclJcjsj.s page 12 + + + 208:Core/Src/stm32f0xx_hal_msp.c **** } + 387 .loc 1 208 1 view .LVU91 + 388 @ sp needed + 389 000a 10BD pop {r4, pc} + 390 .LVL19: + 391 .L21: + 195:Core/Src/stm32f0xx_hal_msp.c **** + 392 .loc 1 195 5 is_stmt 1 view .LVU92 + 393 000c 064A ldr r2, .L22+4 + 394 000e D369 ldr r3, [r2, #28] + 395 0010 0649 ldr r1, .L22+8 + 396 0012 0B40 ands r3, r1 + 397 0014 D361 str r3, [r2, #28] + 201:Core/Src/stm32f0xx_hal_msp.c **** + 398 .loc 1 201 5 view .LVU93 + 399 0016 C021 movs r1, #192 + 400 0018 9020 movs r0, #144 + 401 .LVL20: + 201:Core/Src/stm32f0xx_hal_msp.c **** + 402 .loc 1 201 5 is_stmt 0 view .LVU94 + 403 001a 4901 lsls r1, r1, #5 + 404 001c C005 lsls r0, r0, #23 + 405 001e FFF7FEFF bl HAL_GPIO_DeInit + 406 .LVL21: + 407 .loc 1 208 1 view .LVU95 + 408 0022 F2E7 b .L19 + 409 .L23: + 410 .align 2 + 411 .L22: + 412 0024 00640040 .word 1073767424 + 413 0028 00100240 .word 1073876992 + 414 002c FFFFFFFD .word -33554433 + 415 .cfi_endproc + 416 .LFE44: + 418 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits + 419 .align 1 + 420 .global HAL_TIM_Base_MspInit + 421 .syntax unified + 422 .code 16 + 423 .thumb_func + 425 HAL_TIM_Base_MspInit: + 426 .LVL22: + 427 .LFB45: + 209:Core/Src/stm32f0xx_hal_msp.c **** + 210:Core/Src/stm32f0xx_hal_msp.c **** /** + 211:Core/Src/stm32f0xx_hal_msp.c **** * @brief TIM_Base MSP Initialization + 212:Core/Src/stm32f0xx_hal_msp.c **** * This function configures the hardware resources used in this example + 213:Core/Src/stm32f0xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer + 214:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 215:Core/Src/stm32f0xx_hal_msp.c **** */ + 216:Core/Src/stm32f0xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) + 217:Core/Src/stm32f0xx_hal_msp.c **** { + 428 .loc 1 217 1 is_stmt 1 view -0 + 429 .cfi_startproc + 430 @ args = 0, pretend = 0, frame = 8 + 431 @ frame_needed = 0, uses_anonymous_args = 0 + 432 @ link register save eliminated. + ARM GAS /tmp/cclJcjsj.s page 13 + + + 433 .loc 1 217 1 is_stmt 0 view .LVU97 + 434 0000 82B0 sub sp, sp, #8 + 435 .cfi_def_cfa_offset 8 + 218:Core/Src/stm32f0xx_hal_msp.c **** if(htim_base->Instance==TIM2) + 436 .loc 1 218 3 is_stmt 1 view .LVU98 + 437 .loc 1 218 15 is_stmt 0 view .LVU99 + 438 0002 0268 ldr r2, [r0] + 439 .loc 1 218 5 view .LVU100 + 440 0004 8023 movs r3, #128 + 441 0006 DB05 lsls r3, r3, #23 + 442 0008 9A42 cmp r2, r3 + 443 000a 01D0 beq .L26 + 444 .L24: + 219:Core/Src/stm32f0xx_hal_msp.c **** { + 220:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 0 */ + 221:Core/Src/stm32f0xx_hal_msp.c **** + 222:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 0 */ + 223:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock enable */ + 224:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_ENABLE(); + 225:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 226:Core/Src/stm32f0xx_hal_msp.c **** + 227:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 1 */ + 228:Core/Src/stm32f0xx_hal_msp.c **** } + 229:Core/Src/stm32f0xx_hal_msp.c **** + 230:Core/Src/stm32f0xx_hal_msp.c **** } + 445 .loc 1 230 1 view .LVU101 + 446 000c 02B0 add sp, sp, #8 + 447 @ sp needed + 448 000e 7047 bx lr + 449 .L26: + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 450 .loc 1 224 5 is_stmt 1 view .LVU102 + 451 .LBB8: + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 452 .loc 1 224 5 view .LVU103 + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 453 .loc 1 224 5 view .LVU104 + 454 0010 044A ldr r2, .L27 + 455 0012 D169 ldr r1, [r2, #28] + 456 0014 0123 movs r3, #1 + 457 0016 1943 orrs r1, r3 + 458 0018 D161 str r1, [r2, #28] + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 459 .loc 1 224 5 view .LVU105 + 460 001a D269 ldr r2, [r2, #28] + 461 001c 1340 ands r3, r2 + 462 001e 0193 str r3, [sp, #4] + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 463 .loc 1 224 5 view .LVU106 + 464 0020 019B ldr r3, [sp, #4] + 465 .LBE8: + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 466 .loc 1 224 5 discriminator 1 view .LVU107 + 467 .loc 1 230 1 is_stmt 0 view .LVU108 + 468 0022 F3E7 b .L24 + 469 .L28: + 470 .align 2 + ARM GAS /tmp/cclJcjsj.s page 14 + + + 471 .L27: + 472 0024 00100240 .word 1073876992 + 473 .cfi_endproc + 474 .LFE45: + 476 .section .text.HAL_TIM_MspPostInit,"ax",%progbits + 477 .align 1 + 478 .global HAL_TIM_MspPostInit + 479 .syntax unified + 480 .code 16 + 481 .thumb_func + 483 HAL_TIM_MspPostInit: + 484 .LVL23: + 485 .LFB46: + 231:Core/Src/stm32f0xx_hal_msp.c **** + 232:Core/Src/stm32f0xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) + 233:Core/Src/stm32f0xx_hal_msp.c **** { + 486 .loc 1 233 1 is_stmt 1 view -0 + 487 .cfi_startproc + 488 @ args = 0, pretend = 0, frame = 32 + 489 @ frame_needed = 0, uses_anonymous_args = 0 + 490 .loc 1 233 1 is_stmt 0 view .LVU110 + 491 0000 10B5 push {r4, lr} + 492 .cfi_def_cfa_offset 8 + 493 .cfi_offset 4, -8 + 494 .cfi_offset 14, -4 + 495 0002 88B0 sub sp, sp, #32 + 496 .cfi_def_cfa_offset 40 + 497 0004 0400 movs r4, r0 + 234:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 498 .loc 1 234 3 is_stmt 1 view .LVU111 + 499 .loc 1 234 20 is_stmt 0 view .LVU112 + 500 0006 1422 movs r2, #20 + 501 0008 0021 movs r1, #0 + 502 000a 03A8 add r0, sp, #12 + 503 .LVL24: + 504 .loc 1 234 20 view .LVU113 + 505 000c FFF7FEFF bl memset + 506 .LVL25: + 235:Core/Src/stm32f0xx_hal_msp.c **** if(htim->Instance==TIM2) + 507 .loc 1 235 3 is_stmt 1 view .LVU114 + 508 .loc 1 235 10 is_stmt 0 view .LVU115 + 509 0010 2268 ldr r2, [r4] + 510 .loc 1 235 5 view .LVU116 + 511 0012 8023 movs r3, #128 + 512 0014 DB05 lsls r3, r3, #23 + 513 0016 9A42 cmp r2, r3 + 514 0018 01D0 beq .L31 + 515 .LVL26: + 516 .L29: + 236:Core/Src/stm32f0xx_hal_msp.c **** { + 237:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */ + 238:Core/Src/stm32f0xx_hal_msp.c **** + 239:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 0 */ + 240:Core/Src/stm32f0xx_hal_msp.c **** + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 242:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 243:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + ARM GAS /tmp/cclJcjsj.s page 15 + + + 244:Core/Src/stm32f0xx_hal_msp.c **** PA2 ------> TIM2_CH3 + 245:Core/Src/stm32f0xx_hal_msp.c **** PA5 ------> TIM2_CH1 + 246:Core/Src/stm32f0xx_hal_msp.c **** PB3 ------> TIM2_CH2 + 247:Core/Src/stm32f0xx_hal_msp.c **** */ + 248:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_5; + 249:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 250:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 251:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 252:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 253:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 254:Core/Src/stm32f0xx_hal_msp.c **** + 255:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_3; + 256:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 257:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 258:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 259:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 260:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 261:Core/Src/stm32f0xx_hal_msp.c **** + 262:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */ + 263:Core/Src/stm32f0xx_hal_msp.c **** + 264:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 1 */ + 265:Core/Src/stm32f0xx_hal_msp.c **** } + 266:Core/Src/stm32f0xx_hal_msp.c **** + 267:Core/Src/stm32f0xx_hal_msp.c **** } + 517 .loc 1 267 1 view .LVU117 + 518 001a 08B0 add sp, sp, #32 + 519 @ sp needed + 520 001c 10BD pop {r4, pc} + 521 .LVL27: + 522 .L31: + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 523 .loc 1 241 5 is_stmt 1 view .LVU118 + 524 .LBB9: + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 525 .loc 1 241 5 view .LVU119 + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 526 .loc 1 241 5 view .LVU120 + 527 001e 144B ldr r3, .L32 + 528 0020 5A69 ldr r2, [r3, #20] + 529 0022 8021 movs r1, #128 + 530 0024 8902 lsls r1, r1, #10 + 531 0026 0A43 orrs r2, r1 + 532 0028 5A61 str r2, [r3, #20] + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 533 .loc 1 241 5 view .LVU121 + 534 002a 5A69 ldr r2, [r3, #20] + 535 002c 0A40 ands r2, r1 + 536 002e 0192 str r2, [sp, #4] + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 537 .loc 1 241 5 view .LVU122 + 538 0030 019A ldr r2, [sp, #4] + 539 .LBE9: + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 540 .loc 1 241 5 view .LVU123 + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 541 .loc 1 242 5 view .LVU124 + 542 .LBB10: + ARM GAS /tmp/cclJcjsj.s page 16 + + + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 543 .loc 1 242 5 view .LVU125 + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 544 .loc 1 242 5 view .LVU126 + 545 0032 5A69 ldr r2, [r3, #20] + 546 0034 8021 movs r1, #128 + 547 0036 C902 lsls r1, r1, #11 + 548 0038 0A43 orrs r2, r1 + 549 003a 5A61 str r2, [r3, #20] + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 550 .loc 1 242 5 view .LVU127 + 551 003c 5B69 ldr r3, [r3, #20] + 552 003e 0B40 ands r3, r1 + 553 0040 0293 str r3, [sp, #8] + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 554 .loc 1 242 5 view .LVU128 + 555 0042 029B ldr r3, [sp, #8] + 556 .LBE10: + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 557 .loc 1 242 5 view .LVU129 + 248:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 558 .loc 1 248 5 view .LVU130 + 248:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 559 .loc 1 248 25 is_stmt 0 view .LVU131 + 560 0044 2423 movs r3, #36 + 561 0046 0393 str r3, [sp, #12] + 249:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 562 .loc 1 249 5 is_stmt 1 view .LVU132 + 249:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 563 .loc 1 249 26 is_stmt 0 view .LVU133 + 564 0048 0224 movs r4, #2 + 565 .LVL28: + 249:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 566 .loc 1 249 26 view .LVU134 + 567 004a 0494 str r4, [sp, #16] + 250:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 568 .loc 1 250 5 is_stmt 1 view .LVU135 + 251:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 569 .loc 1 251 5 view .LVU136 + 252:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 570 .loc 1 252 5 view .LVU137 + 252:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 571 .loc 1 252 31 is_stmt 0 view .LVU138 + 572 004c 0794 str r4, [sp, #28] + 253:Core/Src/stm32f0xx_hal_msp.c **** + 573 .loc 1 253 5 is_stmt 1 view .LVU139 + 574 004e 9020 movs r0, #144 + 575 0050 03A9 add r1, sp, #12 + 576 0052 C005 lsls r0, r0, #23 + 577 0054 FFF7FEFF bl HAL_GPIO_Init + 578 .LVL29: + 255:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 579 .loc 1 255 5 view .LVU140 + 255:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 580 .loc 1 255 25 is_stmt 0 view .LVU141 + 581 0058 0823 movs r3, #8 + 582 005a 0393 str r3, [sp, #12] + ARM GAS /tmp/cclJcjsj.s page 17 + + + 256:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 583 .loc 1 256 5 is_stmt 1 view .LVU142 + 256:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 584 .loc 1 256 26 is_stmt 0 view .LVU143 + 585 005c 0494 str r4, [sp, #16] + 257:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 586 .loc 1 257 5 is_stmt 1 view .LVU144 + 257:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 587 .loc 1 257 26 is_stmt 0 view .LVU145 + 588 005e 0023 movs r3, #0 + 589 0060 0593 str r3, [sp, #20] + 258:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 590 .loc 1 258 5 is_stmt 1 view .LVU146 + 258:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 591 .loc 1 258 27 is_stmt 0 view .LVU147 + 592 0062 0693 str r3, [sp, #24] + 259:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 593 .loc 1 259 5 is_stmt 1 view .LVU148 + 259:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 594 .loc 1 259 31 is_stmt 0 view .LVU149 + 595 0064 0794 str r4, [sp, #28] + 260:Core/Src/stm32f0xx_hal_msp.c **** + 596 .loc 1 260 5 is_stmt 1 view .LVU150 + 597 0066 03A9 add r1, sp, #12 + 598 0068 0248 ldr r0, .L32+4 + 599 006a FFF7FEFF bl HAL_GPIO_Init + 600 .LVL30: + 601 .loc 1 267 1 is_stmt 0 view .LVU151 + 602 006e D4E7 b .L29 + 603 .L33: + 604 .align 2 + 605 .L32: + 606 0070 00100240 .word 1073876992 + 607 0074 00040048 .word 1207960576 + 608 .cfi_endproc + 609 .LFE46: + 611 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits + 612 .align 1 + 613 .global HAL_TIM_Base_MspDeInit + 614 .syntax unified + 615 .code 16 + 616 .thumb_func + 618 HAL_TIM_Base_MspDeInit: + 619 .LVL31: + 620 .LFB47: + 268:Core/Src/stm32f0xx_hal_msp.c **** /** + 269:Core/Src/stm32f0xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization + 270:Core/Src/stm32f0xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 271:Core/Src/stm32f0xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer + 272:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 273:Core/Src/stm32f0xx_hal_msp.c **** */ + 274:Core/Src/stm32f0xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) + 275:Core/Src/stm32f0xx_hal_msp.c **** { + 621 .loc 1 275 1 is_stmt 1 view -0 + 622 .cfi_startproc + 623 @ args = 0, pretend = 0, frame = 0 + 624 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cclJcjsj.s page 18 + + + 625 @ link register save eliminated. + 276:Core/Src/stm32f0xx_hal_msp.c **** if(htim_base->Instance==TIM2) + 626 .loc 1 276 3 view .LVU153 + 627 .loc 1 276 15 is_stmt 0 view .LVU154 + 628 0000 0268 ldr r2, [r0] + 629 .loc 1 276 5 view .LVU155 + 630 0002 8023 movs r3, #128 + 631 0004 DB05 lsls r3, r3, #23 + 632 0006 9A42 cmp r2, r3 + 633 0008 00D0 beq .L36 + 634 .L34: + 277:Core/Src/stm32f0xx_hal_msp.c **** { + 278:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */ + 279:Core/Src/stm32f0xx_hal_msp.c **** + 280:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 0 */ + 281:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock disable */ + 282:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_DISABLE(); + 283:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ + 284:Core/Src/stm32f0xx_hal_msp.c **** + 285:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 1 */ + 286:Core/Src/stm32f0xx_hal_msp.c **** } + 287:Core/Src/stm32f0xx_hal_msp.c **** + 288:Core/Src/stm32f0xx_hal_msp.c **** } + 635 .loc 1 288 1 view .LVU156 + 636 @ sp needed + 637 000a 7047 bx lr + 638 .L36: + 282:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ + 639 .loc 1 282 5 is_stmt 1 view .LVU157 + 640 000c 024A ldr r2, .L37 + 641 000e D369 ldr r3, [r2, #28] + 642 0010 0121 movs r1, #1 + 643 0012 8B43 bics r3, r1 + 644 0014 D361 str r3, [r2, #28] + 645 .loc 1 288 1 is_stmt 0 view .LVU158 + 646 0016 F8E7 b .L34 + 647 .L38: + 648 .align 2 + 649 .L37: + 650 0018 00100240 .word 1073876992 + 651 .cfi_endproc + 652 .LFE47: + 654 .text + 655 .Letext0: + 656 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 657 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 658 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 659 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 660 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 661 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 662 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 663 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 664 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h" + 665 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h" + 666 .file 12 "" + ARM GAS /tmp/cclJcjsj.s page 19 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_msp.c + /tmp/cclJcjsj.s:19 .text.HAL_MspInit:00000000 $t + /tmp/cclJcjsj.s:25 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/cclJcjsj.s:75 .text.HAL_MspInit:0000002c $d + /tmp/cclJcjsj.s:80 .text.HAL_ADC_MspInit:00000000 $t + /tmp/cclJcjsj.s:86 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit + /tmp/cclJcjsj.s:180 .text.HAL_ADC_MspInit:00000054 $d + /tmp/cclJcjsj.s:186 .text.HAL_ADC_MspDeInit:00000000 $t + /tmp/cclJcjsj.s:192 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit + /tmp/cclJcjsj.s:237 .text.HAL_ADC_MspDeInit:00000024 $d + /tmp/cclJcjsj.s:244 .text.HAL_CAN_MspInit:00000000 $t + /tmp/cclJcjsj.s:250 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit + /tmp/cclJcjsj.s:354 .text.HAL_CAN_MspInit:00000060 $d + /tmp/cclJcjsj.s:360 .text.HAL_CAN_MspDeInit:00000000 $t + /tmp/cclJcjsj.s:366 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit + /tmp/cclJcjsj.s:412 .text.HAL_CAN_MspDeInit:00000024 $d + /tmp/cclJcjsj.s:419 .text.HAL_TIM_Base_MspInit:00000000 $t + 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mode 100644 index 0000000..dbf3d60 --- /dev/null +++ b/Software/build/debug/Core/Src/system_stm32f0xx.d @@ -0,0 +1,59 @@ +build/debug/Core/Src/system_stm32f0xx.o: Core/Src/system_stm32f0xx.c \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Core/Src/system_stm32f0xx.lst b/Software/build/debug/Core/Src/system_stm32f0xx.lst new file mode 100644 index 0000000..b54219b --- /dev/null +++ b/Software/build/debug/Core/Src/system_stm32f0xx.lst @@ -0,0 +1,571 @@ +ARM GAS /tmp/ccUgyWfH.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "system_stm32f0xx.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Core/Src/system_stm32f0xx.c" + 18 .section .text.SystemInit,"ax",%progbits + 19 .align 1 + 20 .global SystemInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 SystemInit: + 26 .LFB40: + 1:Core/Src/system_stm32f0xx.c **** /** + 2:Core/Src/system_stm32f0xx.c **** ****************************************************************************** + 3:Core/Src/system_stm32f0xx.c **** * @file system_stm32f0xx.c + 4:Core/Src/system_stm32f0xx.c **** * @author MCD Application Team + 5:Core/Src/system_stm32f0xx.c **** * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. + 6:Core/Src/system_stm32f0xx.c **** * + 7:Core/Src/system_stm32f0xx.c **** * 1. This file provides two functions and one global variable to be called from + 8:Core/Src/system_stm32f0xx.c **** * user application: + 9:Core/Src/system_stm32f0xx.c **** * - SystemInit(): This function is called at startup just after reset and + 10:Core/Src/system_stm32f0xx.c **** * before branch to main program. This call is made inside + 11:Core/Src/system_stm32f0xx.c **** * the "startup_stm32f0xx.s" file. + 12:Core/Src/system_stm32f0xx.c **** * + 13:Core/Src/system_stm32f0xx.c **** * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + 14:Core/Src/system_stm32f0xx.c **** * by the user application to setup the SysTick + 15:Core/Src/system_stm32f0xx.c **** * timer or configure other parameters. + 16:Core/Src/system_stm32f0xx.c **** * + 17:Core/Src/system_stm32f0xx.c **** * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + 18:Core/Src/system_stm32f0xx.c **** * be called whenever the core clock is changed + 19:Core/Src/system_stm32f0xx.c **** * during program execution. + 20:Core/Src/system_stm32f0xx.c **** * + 21:Core/Src/system_stm32f0xx.c **** * + 22:Core/Src/system_stm32f0xx.c **** ****************************************************************************** + 23:Core/Src/system_stm32f0xx.c **** * @attention + 24:Core/Src/system_stm32f0xx.c **** * + 25:Core/Src/system_stm32f0xx.c **** * Copyright (c) 2016 STMicroelectronics. + 26:Core/Src/system_stm32f0xx.c **** * All rights reserved. + 27:Core/Src/system_stm32f0xx.c **** * + 28:Core/Src/system_stm32f0xx.c **** * This software is licensed under terms that can be found in the LICENSE file + 29:Core/Src/system_stm32f0xx.c **** * in the root directory of this software component. + 30:Core/Src/system_stm32f0xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 31:Core/Src/system_stm32f0xx.c **** * + 32:Core/Src/system_stm32f0xx.c **** ****************************************************************************** + ARM GAS /tmp/ccUgyWfH.s page 2 + + + 33:Core/Src/system_stm32f0xx.c **** */ + 34:Core/Src/system_stm32f0xx.c **** /** @addtogroup CMSIS + 35:Core/Src/system_stm32f0xx.c **** * @{ + 36:Core/Src/system_stm32f0xx.c **** */ + 37:Core/Src/system_stm32f0xx.c **** + 38:Core/Src/system_stm32f0xx.c **** /** @addtogroup stm32f0xx_system + 39:Core/Src/system_stm32f0xx.c **** * @{ + 40:Core/Src/system_stm32f0xx.c **** */ + 41:Core/Src/system_stm32f0xx.c **** + 42:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Includes + 43:Core/Src/system_stm32f0xx.c **** * @{ + 44:Core/Src/system_stm32f0xx.c **** */ + 45:Core/Src/system_stm32f0xx.c **** + 46:Core/Src/system_stm32f0xx.c **** #include "stm32f0xx.h" + 47:Core/Src/system_stm32f0xx.c **** + 48:Core/Src/system_stm32f0xx.c **** /** + 49:Core/Src/system_stm32f0xx.c **** * @} + 50:Core/Src/system_stm32f0xx.c **** */ + 51:Core/Src/system_stm32f0xx.c **** + 52:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_TypesDefinitions + 53:Core/Src/system_stm32f0xx.c **** * @{ + 54:Core/Src/system_stm32f0xx.c **** */ + 55:Core/Src/system_stm32f0xx.c **** + 56:Core/Src/system_stm32f0xx.c **** /** + 57:Core/Src/system_stm32f0xx.c **** * @} + 58:Core/Src/system_stm32f0xx.c **** */ + 59:Core/Src/system_stm32f0xx.c **** + 60:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Defines + 61:Core/Src/system_stm32f0xx.c **** * @{ + 62:Core/Src/system_stm32f0xx.c **** */ + 63:Core/Src/system_stm32f0xx.c **** #if !defined (HSE_VALUE) + 64:Core/Src/system_stm32f0xx.c **** #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. + 65:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + 66:Core/Src/system_stm32f0xx.c **** #endif /* HSE_VALUE */ + 67:Core/Src/system_stm32f0xx.c **** + 68:Core/Src/system_stm32f0xx.c **** #if !defined (HSI_VALUE) + 69:Core/Src/system_stm32f0xx.c **** #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. + 70:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + 71:Core/Src/system_stm32f0xx.c **** #endif /* HSI_VALUE */ + 72:Core/Src/system_stm32f0xx.c **** + 73:Core/Src/system_stm32f0xx.c **** #if !defined (HSI48_VALUE) + 74:Core/Src/system_stm32f0xx.c **** #define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in + 75:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + 76:Core/Src/system_stm32f0xx.c **** #endif /* HSI48_VALUE */ + 77:Core/Src/system_stm32f0xx.c **** /** + 78:Core/Src/system_stm32f0xx.c **** * @} + 79:Core/Src/system_stm32f0xx.c **** */ + 80:Core/Src/system_stm32f0xx.c **** + 81:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Macros + 82:Core/Src/system_stm32f0xx.c **** * @{ + 83:Core/Src/system_stm32f0xx.c **** */ + 84:Core/Src/system_stm32f0xx.c **** + 85:Core/Src/system_stm32f0xx.c **** /** + 86:Core/Src/system_stm32f0xx.c **** * @} + 87:Core/Src/system_stm32f0xx.c **** */ + 88:Core/Src/system_stm32f0xx.c **** + 89:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Variables + ARM GAS /tmp/ccUgyWfH.s page 3 + + + 90:Core/Src/system_stm32f0xx.c **** * @{ + 91:Core/Src/system_stm32f0xx.c **** */ + 92:Core/Src/system_stm32f0xx.c **** /* This variable is updated in three ways: + 93:Core/Src/system_stm32f0xx.c **** 1) by calling CMSIS function SystemCoreClockUpdate() + 94:Core/Src/system_stm32f0xx.c **** 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 95:Core/Src/system_stm32f0xx.c **** 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + 96:Core/Src/system_stm32f0xx.c **** Note: If you use this function to configure the system clock; then there + 97:Core/Src/system_stm32f0xx.c **** is no need to call the 2 first functions listed above, since SystemCoreClock + 98:Core/Src/system_stm32f0xx.c **** variable is updated automatically. + 99:Core/Src/system_stm32f0xx.c **** */ + 100:Core/Src/system_stm32f0xx.c **** uint32_t SystemCoreClock = 8000000; + 101:Core/Src/system_stm32f0xx.c **** + 102:Core/Src/system_stm32f0xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + 103:Core/Src/system_stm32f0xx.c **** const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; + 104:Core/Src/system_stm32f0xx.c **** + 105:Core/Src/system_stm32f0xx.c **** /** + 106:Core/Src/system_stm32f0xx.c **** * @} + 107:Core/Src/system_stm32f0xx.c **** */ + 108:Core/Src/system_stm32f0xx.c **** + 109:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_FunctionPrototypes + 110:Core/Src/system_stm32f0xx.c **** * @{ + 111:Core/Src/system_stm32f0xx.c **** */ + 112:Core/Src/system_stm32f0xx.c **** + 113:Core/Src/system_stm32f0xx.c **** /** + 114:Core/Src/system_stm32f0xx.c **** * @} + 115:Core/Src/system_stm32f0xx.c **** */ + 116:Core/Src/system_stm32f0xx.c **** + 117:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Functions + 118:Core/Src/system_stm32f0xx.c **** * @{ + 119:Core/Src/system_stm32f0xx.c **** */ + 120:Core/Src/system_stm32f0xx.c **** + 121:Core/Src/system_stm32f0xx.c **** /** + 122:Core/Src/system_stm32f0xx.c **** * @brief Setup the microcontroller system + 123:Core/Src/system_stm32f0xx.c **** * @param None + 124:Core/Src/system_stm32f0xx.c **** * @retval None + 125:Core/Src/system_stm32f0xx.c **** */ + 126:Core/Src/system_stm32f0xx.c **** void SystemInit(void) + 127:Core/Src/system_stm32f0xx.c **** { + 27 .loc 1 127 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. + 128:Core/Src/system_stm32f0xx.c **** /* NOTE :SystemInit(): This function is called at startup just after reset and + 129:Core/Src/system_stm32f0xx.c **** before branch to main program. This call is made inside + 130:Core/Src/system_stm32f0xx.c **** the "startup_stm32f0xx.s" file. + 131:Core/Src/system_stm32f0xx.c **** User can setups the default system clock (System clock source, PLL Multipl + 132:Core/Src/system_stm32f0xx.c **** and Divider factors, AHB/APBx prescalers and Flash settings). + 133:Core/Src/system_stm32f0xx.c **** */ + 134:Core/Src/system_stm32f0xx.c **** } + 32 .loc 1 134 1 view .LVU1 + 33 @ sp needed + 34 0000 7047 bx lr + 35 .cfi_endproc + 36 .LFE40: + 38 .global __aeabi_uidiv + 39 .section .text.SystemCoreClockUpdate,"ax",%progbits + ARM GAS /tmp/ccUgyWfH.s page 4 + + + 40 .align 1 + 41 .global SystemCoreClockUpdate + 42 .syntax unified + 43 .code 16 + 44 .thumb_func + 46 SystemCoreClockUpdate: + 47 .LFB41: + 135:Core/Src/system_stm32f0xx.c **** + 136:Core/Src/system_stm32f0xx.c **** /** + 137:Core/Src/system_stm32f0xx.c **** * @brief Update SystemCoreClock variable according to Clock Register Values. + 138:Core/Src/system_stm32f0xx.c **** * The SystemCoreClock variable contains the core clock (HCLK), it can + 139:Core/Src/system_stm32f0xx.c **** * be used by the user application to setup the SysTick timer or configure + 140:Core/Src/system_stm32f0xx.c **** * other parameters. + 141:Core/Src/system_stm32f0xx.c **** * + 142:Core/Src/system_stm32f0xx.c **** * @note Each time the core clock (HCLK) changes, this function must be called + 143:Core/Src/system_stm32f0xx.c **** * to update SystemCoreClock variable value. Otherwise, any configuration + 144:Core/Src/system_stm32f0xx.c **** * based on this variable will be incorrect. + 145:Core/Src/system_stm32f0xx.c **** * + 146:Core/Src/system_stm32f0xx.c **** * @note - The system frequency computed by this function is not the real + 147:Core/Src/system_stm32f0xx.c **** * frequency in the chip. It is calculated based on the predefined + 148:Core/Src/system_stm32f0xx.c **** * constant and the selected clock source: + 149:Core/Src/system_stm32f0xx.c **** * + 150:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + 151:Core/Src/system_stm32f0xx.c **** * + 152:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + 153:Core/Src/system_stm32f0xx.c **** * + 154:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + 155:Core/Src/system_stm32f0xx.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors. + 156:Core/Src/system_stm32f0xx.c **** * + 157:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSI48, SystemCoreClock will contain the HSI48_VALUE(***) + 158:Core/Src/system_stm32f0xx.c **** * + 159:Core/Src/system_stm32f0xx.c **** * (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value + 160:Core/Src/system_stm32f0xx.c **** * 8 MHz) but the real value may vary depending on the variations + 161:Core/Src/system_stm32f0xx.c **** * in voltage and temperature. + 162:Core/Src/system_stm32f0xx.c **** * + 163:Core/Src/system_stm32f0xx.c **** * (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (its value + 164:Core/Src/system_stm32f0xx.c **** * depends on the application requirements), user has to ensure that HSE_VALUE + 165:Core/Src/system_stm32f0xx.c **** * is same as the real frequency of the crystal used. Otherwise, this function + 166:Core/Src/system_stm32f0xx.c **** * may have wrong result. + 167:Core/Src/system_stm32f0xx.c **** * + 168:Core/Src/system_stm32f0xx.c **** * (***) HSI48_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value + 169:Core/Src/system_stm32f0xx.c **** * 48 MHz) but the real value may vary depending on the variations + 170:Core/Src/system_stm32f0xx.c **** * in voltage and temperature. + 171:Core/Src/system_stm32f0xx.c **** * + 172:Core/Src/system_stm32f0xx.c **** * - The result of this function could be not correct when using fractional + 173:Core/Src/system_stm32f0xx.c **** * value for HSE crystal. + 174:Core/Src/system_stm32f0xx.c **** * + 175:Core/Src/system_stm32f0xx.c **** * @param None + 176:Core/Src/system_stm32f0xx.c **** * @retval None + 177:Core/Src/system_stm32f0xx.c **** */ + 178:Core/Src/system_stm32f0xx.c **** void SystemCoreClockUpdate (void) + 179:Core/Src/system_stm32f0xx.c **** { + 48 .loc 1 179 1 view -0 + 49 .cfi_startproc + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccUgyWfH.s page 5 + + + 53 .cfi_def_cfa_offset 8 + 54 .cfi_offset 4, -8 + 55 .cfi_offset 14, -4 + 180:Core/Src/system_stm32f0xx.c **** uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; + 56 .loc 1 180 3 view .LVU3 + 57 .LVL0: + 181:Core/Src/system_stm32f0xx.c **** + 182:Core/Src/system_stm32f0xx.c **** /* Get SYSCLK source -------------------------------------------------------*/ + 183:Core/Src/system_stm32f0xx.c **** tmp = RCC->CFGR & RCC_CFGR_SWS; + 58 .loc 1 183 3 view .LVU4 + 59 .loc 1 183 12 is_stmt 0 view .LVU5 + 60 0002 254B ldr r3, .L11 + 61 0004 5A68 ldr r2, [r3, #4] + 62 .loc 1 183 7 view .LVU6 + 63 0006 0C23 movs r3, #12 + 64 0008 1340 ands r3, r2 + 65 .LVL1: + 184:Core/Src/system_stm32f0xx.c **** + 185:Core/Src/system_stm32f0xx.c **** switch (tmp) + 66 .loc 1 185 3 is_stmt 1 view .LVU7 + 67 000a 042B cmp r3, #4 + 68 000c 12D0 beq .L3 + 69 000e 082B cmp r3, #8 + 70 0010 14D0 beq .L4 + 71 0012 002B cmp r3, #0 + 72 0014 3CD1 bne .L5 + 186:Core/Src/system_stm32f0xx.c **** { + 187:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ + 188:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSI_VALUE; + 73 .loc 1 188 7 view .LVU8 + 74 .loc 1 188 23 is_stmt 0 view .LVU9 + 75 0016 214B ldr r3, .L11+4 + 76 .LVL2: + 77 .loc 1 188 23 view .LVU10 + 78 0018 214A ldr r2, .L11+8 + 79 .LVL3: + 80 .loc 1 188 23 view .LVU11 + 81 001a 1A60 str r2, [r3] + 189:Core/Src/system_stm32f0xx.c **** break; + 82 .loc 1 189 7 is_stmt 1 view .LVU12 + 83 .LVL4: + 84 .L6: + 190:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ + 191:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSE_VALUE; + 192:Core/Src/system_stm32f0xx.c **** break; + 193:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 194:Core/Src/system_stm32f0xx.c **** /* Get PLL clock source and multiplication factor ----------------------*/ + 195:Core/Src/system_stm32f0xx.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + 196:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 197:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 198:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 199:Core/Src/system_stm32f0xx.c **** + 200:Core/Src/system_stm32f0xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + 201:Core/Src/system_stm32f0xx.c **** { + 202:Core/Src/system_stm32f0xx.c **** /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */ + 203:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull; + 204:Core/Src/system_stm32f0xx.c **** } + ARM GAS /tmp/ccUgyWfH.s page 6 + + + 205:Core/Src/system_stm32f0xx.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F071xB) || defined(STM32F072xB) || + 206:Core/Src/system_stm32f0xx.c **** else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) + 207:Core/Src/system_stm32f0xx.c **** { + 208:Core/Src/system_stm32f0xx.c **** /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */ + 209:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull; + 210:Core/Src/system_stm32f0xx.c **** } + 211:Core/Src/system_stm32f0xx.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || + 212:Core/Src/system_stm32f0xx.c **** else + 213:Core/Src/system_stm32f0xx.c **** { + 214:Core/Src/system_stm32f0xx.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \ + 215:Core/Src/system_stm32f0xx.c **** || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \ + 216:Core/Src/system_stm32f0xx.c **** || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) + 217:Core/Src/system_stm32f0xx.c **** /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */ + 218:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull; + 219:Core/Src/system_stm32f0xx.c **** #else + 220:Core/Src/system_stm32f0xx.c **** /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */ + 221:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + 222:Core/Src/system_stm32f0xx.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F070x6 || + 223:Core/Src/system_stm32f0xx.c **** STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB || + 224:Core/Src/system_stm32f0xx.c **** STM32F091xC || STM32F098xx || STM32F030xC */ + 225:Core/Src/system_stm32f0xx.c **** } + 226:Core/Src/system_stm32f0xx.c **** break; + 227:Core/Src/system_stm32f0xx.c **** default: /* HSI used as system clock */ + 228:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSI_VALUE; + 229:Core/Src/system_stm32f0xx.c **** break; + 230:Core/Src/system_stm32f0xx.c **** } + 231:Core/Src/system_stm32f0xx.c **** /* Compute HCLK clock frequency ----------------*/ + 232:Core/Src/system_stm32f0xx.c **** /* Get HCLK prescaler */ + 233:Core/Src/system_stm32f0xx.c **** tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + 85 .loc 1 233 3 view .LVU13 + 86 .loc 1 233 28 is_stmt 0 view .LVU14 + 87 001c 1E4B ldr r3, .L11 + 88 001e 5A68 ldr r2, [r3, #4] + 89 .loc 1 233 52 view .LVU15 + 90 0020 1209 lsrs r2, r2, #4 + 91 0022 0F23 movs r3, #15 + 92 0024 1340 ands r3, r2 + 93 .loc 1 233 22 view .LVU16 + 94 0026 1F4A ldr r2, .L11+12 + 95 0028 D15C ldrb r1, [r2, r3] + 96 .LVL5: + 234:Core/Src/system_stm32f0xx.c **** /* HCLK clock frequency */ + 235:Core/Src/system_stm32f0xx.c **** SystemCoreClock >>= tmp; + 97 .loc 1 235 3 is_stmt 1 view .LVU17 + 98 .loc 1 235 19 is_stmt 0 view .LVU18 + 99 002a 1C4A ldr r2, .L11+4 + 100 002c 1368 ldr r3, [r2] + 101 002e CB40 lsrs r3, r3, r1 + 102 0030 1360 str r3, [r2] + 236:Core/Src/system_stm32f0xx.c **** } + 103 .loc 1 236 1 view .LVU19 + 104 @ sp needed + 105 0032 10BD pop {r4, pc} + 106 .LVL6: + 107 .L3: + 191:Core/Src/system_stm32f0xx.c **** break; + 108 .loc 1 191 7 is_stmt 1 view .LVU20 + ARM GAS /tmp/ccUgyWfH.s page 7 + + + 191:Core/Src/system_stm32f0xx.c **** break; + 109 .loc 1 191 23 is_stmt 0 view .LVU21 + 110 0034 194B ldr r3, .L11+4 + 111 .LVL7: + 191:Core/Src/system_stm32f0xx.c **** break; + 112 .loc 1 191 23 view .LVU22 + 113 0036 1A4A ldr r2, .L11+8 + 114 .LVL8: + 191:Core/Src/system_stm32f0xx.c **** break; + 115 .loc 1 191 23 view .LVU23 + 116 0038 1A60 str r2, [r3] + 192:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 117 .loc 1 192 7 is_stmt 1 view .LVU24 + 118 003a EFE7 b .L6 + 119 .LVL9: + 120 .L4: + 195:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 121 .loc 1 195 7 view .LVU25 + 195:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 122 .loc 1 195 20 is_stmt 0 view .LVU26 + 123 003c 164A ldr r2, .L11 + 124 003e 5068 ldr r0, [r2, #4] + 125 .LVL10: + 196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 126 .loc 1 196 7 is_stmt 1 view .LVU27 + 196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 127 .loc 1 196 22 is_stmt 0 view .LVU28 + 128 0040 5368 ldr r3, [r2, #4] + 129 .LVL11: + 196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 130 .loc 1 196 17 view .LVU29 + 131 0042 C021 movs r1, #192 + 132 0044 4902 lsls r1, r1, #9 + 133 0046 0B40 ands r3, r1 + 134 .LVL12: + 197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 135 .loc 1 197 7 is_stmt 1 view .LVU30 + 197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 136 .loc 1 197 27 is_stmt 0 view .LVU31 + 137 0048 800C lsrs r0, r0, #18 + 138 .LVL13: + 197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 139 .loc 1 197 27 view .LVU32 + 140 004a 0F21 movs r1, #15 + 141 004c 0840 ands r0, r1 + 197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 142 .loc 1 197 15 view .LVU33 + 143 004e 841C adds r4, r0, #2 + 144 .LVL14: + 198:Core/Src/system_stm32f0xx.c **** + 145 .loc 1 198 7 is_stmt 1 view .LVU34 + 198:Core/Src/system_stm32f0xx.c **** + 146 .loc 1 198 26 is_stmt 0 view .LVU35 + 147 0050 D26A ldr r2, [r2, #44] + 198:Core/Src/system_stm32f0xx.c **** + 148 .loc 1 198 34 view .LVU36 + 149 0052 1140 ands r1, r2 + ARM GAS /tmp/ccUgyWfH.s page 8 + + + 198:Core/Src/system_stm32f0xx.c **** + 150 .loc 1 198 20 view .LVU37 + 151 0054 0131 adds r1, r1, #1 + 152 .LVL15: + 200:Core/Src/system_stm32f0xx.c **** { + 153 .loc 1 200 7 is_stmt 1 view .LVU38 + 200:Core/Src/system_stm32f0xx.c **** { + 154 .loc 1 200 10 is_stmt 0 view .LVU39 + 155 0056 8022 movs r2, #128 + 156 0058 5202 lsls r2, r2, #9 + 157 005a 9342 cmp r3, r2 + 158 005c 0AD0 beq .L9 + 206:Core/Src/system_stm32f0xx.c **** { + 159 .loc 1 206 12 is_stmt 1 view .LVU40 + 206:Core/Src/system_stm32f0xx.c **** { + 160 .loc 1 206 15 is_stmt 0 view .LVU41 + 161 005e C022 movs r2, #192 + 162 0060 5202 lsls r2, r2, #9 + 163 0062 9342 cmp r3, r2 + 164 0064 0DD0 beq .L10 + 218:Core/Src/system_stm32f0xx.c **** #else + 165 .loc 1 218 9 is_stmt 1 view .LVU42 + 218:Core/Src/system_stm32f0xx.c **** #else + 166 .loc 1 218 37 is_stmt 0 view .LVU43 + 167 0066 0E48 ldr r0, .L11+8 + 168 0068 FFF7FEFF bl __aeabi_uidiv + 169 .LVL16: + 218:Core/Src/system_stm32f0xx.c **** #else + 170 .loc 1 218 52 view .LVU44 + 171 006c 6043 muls r0, r4 + 218:Core/Src/system_stm32f0xx.c **** #else + 172 .loc 1 218 25 view .LVU45 + 173 006e 0B4B ldr r3, .L11+4 + 174 0070 1860 str r0, [r3] + 175 0072 D3E7 b .L6 + 176 .LVL17: + 177 .L9: + 203:Core/Src/system_stm32f0xx.c **** } + 178 .loc 1 203 9 is_stmt 1 view .LVU46 + 203:Core/Src/system_stm32f0xx.c **** } + 179 .loc 1 203 37 is_stmt 0 view .LVU47 + 180 0074 0A48 ldr r0, .L11+8 + 181 0076 FFF7FEFF bl __aeabi_uidiv + 182 .LVL18: + 203:Core/Src/system_stm32f0xx.c **** } + 183 .loc 1 203 52 view .LVU48 + 184 007a 6043 muls r0, r4 + 203:Core/Src/system_stm32f0xx.c **** } + 185 .loc 1 203 25 view .LVU49 + 186 007c 074B ldr r3, .L11+4 + 187 007e 1860 str r0, [r3] + 188 0080 CCE7 b .L6 + 189 .LVL19: + 190 .L10: + 209:Core/Src/system_stm32f0xx.c **** } + 191 .loc 1 209 9 is_stmt 1 view .LVU50 + 209:Core/Src/system_stm32f0xx.c **** } + ARM GAS /tmp/ccUgyWfH.s page 9 + + + 192 .loc 1 209 39 is_stmt 0 view .LVU51 + 193 0082 0948 ldr r0, .L11+16 + 194 0084 FFF7FEFF bl __aeabi_uidiv + 195 .LVL20: + 209:Core/Src/system_stm32f0xx.c **** } + 196 .loc 1 209 54 view .LVU52 + 197 0088 6043 muls r0, r4 + 209:Core/Src/system_stm32f0xx.c **** } + 198 .loc 1 209 25 view .LVU53 + 199 008a 044B ldr r3, .L11+4 + 200 008c 1860 str r0, [r3] + 201 008e C5E7 b .L6 + 202 .LVL21: + 203 .L5: + 228:Core/Src/system_stm32f0xx.c **** break; + 204 .loc 1 228 7 is_stmt 1 view .LVU54 + 228:Core/Src/system_stm32f0xx.c **** break; + 205 .loc 1 228 23 is_stmt 0 view .LVU55 + 206 0090 024B ldr r3, .L11+4 + 207 .LVL22: + 228:Core/Src/system_stm32f0xx.c **** break; + 208 .loc 1 228 23 view .LVU56 + 209 0092 034A ldr r2, .L11+8 + 210 .LVL23: + 228:Core/Src/system_stm32f0xx.c **** break; + 211 .loc 1 228 23 view .LVU57 + 212 0094 1A60 str r2, [r3] + 229:Core/Src/system_stm32f0xx.c **** } + 213 .loc 1 229 7 is_stmt 1 view .LVU58 + 214 0096 C1E7 b .L6 + 215 .L12: + 216 .align 2 + 217 .L11: + 218 0098 00100240 .word 1073876992 + 219 009c 00000000 .word SystemCoreClock + 220 00a0 00127A00 .word 8000000 + 221 00a4 00000000 .word AHBPrescTable + 222 00a8 006CDC02 .word 48000000 + 223 .cfi_endproc + 224 .LFE41: + 226 .global APBPrescTable + 227 .section .rodata.APBPrescTable,"a" + 228 .align 2 + 231 APBPrescTable: + 232 0000 00000000 .ascii "\000\000\000\000\001\002\003\004" + 232 01020304 + 233 .global AHBPrescTable + 234 .section .rodata.AHBPrescTable,"a" + 235 .align 2 + 238 AHBPrescTable: + 239 0000 00000000 .ascii "\000\000\000\000\000\000\000\000\001\002\003\004\006" + 239 00000000 + 239 01020304 + 239 06 + 240 000d 070809 .ascii "\007\010\011" + 241 .global SystemCoreClock + 242 .section .data.SystemCoreClock,"aw" + ARM GAS /tmp/ccUgyWfH.s page 10 + + + 243 .align 2 + 246 SystemCoreClock: + 247 0000 00127A00 .word 8000000 + 248 .text + 249 .Letext0: + 250 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 251 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 252 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 253 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + ARM GAS /tmp/ccUgyWfH.s page 11 + + +DEFINED SYMBOLS + *ABS*:00000000 system_stm32f0xx.c + /tmp/ccUgyWfH.s:19 .text.SystemInit:00000000 $t + /tmp/ccUgyWfH.s:25 .text.SystemInit:00000000 SystemInit + /tmp/ccUgyWfH.s:40 .text.SystemCoreClockUpdate:00000000 $t + /tmp/ccUgyWfH.s:46 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate + /tmp/ccUgyWfH.s:218 .text.SystemCoreClockUpdate:00000098 $d + /tmp/ccUgyWfH.s:246 .data.SystemCoreClock:00000000 SystemCoreClock + /tmp/ccUgyWfH.s:238 .rodata.AHBPrescTable:00000000 AHBPrescTable + /tmp/ccUgyWfH.s:231 .rodata.APBPrescTable:00000000 APBPrescTable + /tmp/ccUgyWfH.s:228 .rodata.APBPrescTable:00000000 $d + /tmp/ccUgyWfH.s:235 .rodata.AHBPrescTable:00000000 $d + /tmp/ccUgyWfH.s:243 .data.SystemCoreClock:00000000 $d + +UNDEFINED SYMBOLS +__aeabi_uidiv diff --git a/Software/build/debug/Core/Src/system_stm32f0xx.o b/Software/build/debug/Core/Src/system_stm32f0xx.o new file mode 100644 index 0000000000000000000000000000000000000000..3ce6d0ca377ccc12583009ff370e5a742226d1bd GIT binary patch literal 5752 zcmd5=du&@*89(P1JmYhn}PA@NWP0*QfykjBa%NHFmSlRzuK@AzEj z+MP76apxbfy>Swnf4i~zy8f?^uAfQzjtrmq z&9!dHdBFYRT9@Qp;C_5fIikY%JJ(phGA}|Mctijz|4|`=E2^t0Xwq(vw~N8XgjQo* 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a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d new file mode 100644 index 0000000..0a78e87 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d @@ -0,0 +1,60 @@ +build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.lst new file mode 100644 index 0000000..5d2b6e9 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.lst @@ -0,0 +1,1504 @@ +ARM GAS /tmp/cc5acslE.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c" + 18 .section .text.HAL_MspInit,"ax",%progbits + 19 .align 1 + 20 .weak HAL_MspInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_MspInit: + 26 .LFB42: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @file stm32f0xx_hal.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * This is the common part of the HAL initialization + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @attention + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Copyright (c) 2016 STMicroelectronics. + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * All rights reserved. + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * This software is licensed under terms that can be found in the LICENSE file + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * in the root directory of this software component. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ============================================================================== + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### How to use this driver ##### + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ============================================================================== + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** The common HAL driver contains a set of generic and common APIs that can be + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** used by the PPP peripheral drivers and the user to start using the HAL. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** The HAL contains two APIs categories: + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) HAL Initialization and de-initialization functions + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) HAL Control functions + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + ARM GAS /tmp/cc5acslE.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Includes ------------------------------------------------------------------*/ + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #include "stm32f0xx_hal.h" + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @addtogroup STM32F0xx_HAL_Driver + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL HAL + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL module driver. + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #ifdef HAL_MODULE_ENABLED + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private typedef -----------------------------------------------------------*/ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private define ------------------------------------------------------------*/ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Constants HAL Private Constants + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief STM32F0xx HAL Driver version number + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_SUB2 (0x08U) /*!< [15:8] sub2 version */ + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\ + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_SUB2 << 8U )\ + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_RC)) + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define IDCODE_DEVID_MASK (0x00000FFFU) + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private macro -------------------------------------------------------------*/ + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Macros HAL Private Macros + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Exported variables ---------------------------------------------------------*/ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Variables HAL Exported Variables + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __IO uint32_t uwTick; + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private function prototypes -----------------------------------------------*/ + ARM GAS /tmp/cc5acslE.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Exported functions ---------------------------------------------------------*/ + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions HAL Exported Functions + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Initialization and de-initialization functions + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### Initialization and de-initialization functions ##### + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] This section provides functions allowing to: + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Initializes the Flash interface, the NVIC allocation and initial clock + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** configuration. It initializes the systick also when timeout is needed + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** and the backup domain when enabled. + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) de-Initializes common part of the HAL. + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Configure The time base source to have 1ms time base with a dedicated + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** Tick interrupt priority. + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) SysTick timer is used by default as source of time base, but user + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** can eventually implement his proper time base source (a general purpose + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** timer for example or other time source), keeping in mind that Time base + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** handled in milliseconds basis. + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) Time base configuration function (HAL_InitTick ()) is called automatically + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** at the beginning of the program after reset by HAL_Init() or at any time + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** when clock is configured, by HAL_RCC_ClockConfig(). + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) Source of time base is configured to generate interrupts at regular + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** time intervals. Care must be taken if HAL_Delay() is called from a + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** peripheral ISR process, the Tick interrupt line must have higher priority + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (numerically lower) than the peripheral interrupt. Otherwise the caller + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ISR process will be blocked. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) functions affecting time base configurations are declared as __Weak + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** to make override possible in case of other implementations in user file. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function configures the Flash prefetch, + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Configures time base source, NVIC and Low level hardware + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is called at the beginning of program after reset and before + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * the clock configuration + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note The time base configuration is based on HSI clock when exiting from Reset. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Once done, time base tick start incrementing. + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * In the default implementation,Systick is used as source of time base. + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The tick variable is incremented each 1ms in its ISR. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_Init(void) + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure Flash prefetch */ + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #if (PREFETCH_ENABLE != 0) + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #endif /* PREFETCH_ENABLE */ + ARM GAS /tmp/cc5acslE.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_InitTick(TICK_INT_PRIORITY); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Init the low level hardware */ + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_MspInit(); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function de-Initialize common part of the HAL and stops the SysTick + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * of time base. + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is optional. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_DeInit(void) + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Reset of all peripherals */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_FORCE_RESET(); + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_FORCE_RESET(); + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_FORCE_RESET(); + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* De-Init the low level hardware */ + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_MspDeInit(); + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Initialize the MSP. + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_MspInit(void) + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 27 .loc 1 189 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed, + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** the HAL_MspInit could be implemented in the user file + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 32 .loc 1 193 1 view .LVU1 + 33 @ sp needed + 34 0000 7047 bx lr + 35 .cfi_endproc + 36 .LFE42: + ARM GAS /tmp/cc5acslE.s page 5 + + + 38 .section .text.HAL_MspDeInit,"ax",%progbits + 39 .align 1 + 40 .weak HAL_MspDeInit + 41 .syntax unified + 42 .code 16 + 43 .thumb_func + 45 HAL_MspDeInit: + 46 .LFB43: + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief DeInitializes the MSP. + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_MspDeInit(void) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 47 .loc 1 200 1 view -0 + 48 .cfi_startproc + 49 @ args = 0, pretend = 0, frame = 0 + 50 @ frame_needed = 0, uses_anonymous_args = 0 + 51 @ link register save eliminated. + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed, + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** the HAL_MspDeInit could be implemented in the user file + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 52 .loc 1 204 1 view .LVU3 + 53 @ sp needed + 54 0000 7047 bx lr + 55 .cfi_endproc + 56 .LFE43: + 58 .section .text.HAL_DeInit,"ax",%progbits + 59 .align 1 + 60 .global HAL_DeInit + 61 .syntax unified + 62 .code 16 + 63 .thumb_func + 65 HAL_DeInit: + 66 .LFB41: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Reset of all peripherals */ + 67 .loc 1 166 1 view -0 + 68 .cfi_startproc + 69 @ args = 0, pretend = 0, frame = 0 + 70 @ frame_needed = 0, uses_anonymous_args = 0 + 71 0000 10B5 push {r4, lr} + 72 .cfi_def_cfa_offset 8 + 73 .cfi_offset 4, -8 + 74 .cfi_offset 14, -4 + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); + 75 .loc 1 168 3 view .LVU5 + 76 0002 074B ldr r3, .L4 + 77 0004 0121 movs r1, #1 + 78 0006 4942 rsbs r1, r1, #0 + 79 0008 1961 str r1, [r3, #16] + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 80 .loc 1 169 3 view .LVU6 + 81 000a 0022 movs r2, #0 + 82 000c 1A61 str r2, [r3, #16] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); + ARM GAS /tmp/cc5acslE.s page 6 + + + 83 .loc 1 171 3 view .LVU7 + 84 000e D960 str r1, [r3, #12] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 85 .loc 1 172 3 view .LVU8 + 86 0010 DA60 str r2, [r3, #12] + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); + 87 .loc 1 174 3 view .LVU9 + 88 0012 9962 str r1, [r3, #40] + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 89 .loc 1 175 3 view .LVU10 + 90 0014 9A62 str r2, [r3, #40] + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 91 .loc 1 178 3 view .LVU11 + 92 0016 FFF7FEFF bl HAL_MspDeInit + 93 .LVL0: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 94 .loc 1 181 3 view .LVU12 + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 95 .loc 1 182 1 is_stmt 0 view .LVU13 + 96 001a 0020 movs r0, #0 + 97 @ sp needed + 98 001c 10BD pop {r4, pc} + 99 .L5: + 100 001e C046 .align 2 + 101 .L4: + 102 0020 00100240 .word 1073876992 + 103 .cfi_endproc + 104 .LFE41: + 106 .global __aeabi_uidiv + 107 .section .text.HAL_InitTick,"ax",%progbits + 108 .align 1 + 109 .weak HAL_InitTick + 110 .syntax unified + 111 .code 16 + 112 .thumb_func + 114 HAL_InitTick: + 115 .LVL1: + 116 .LFB44: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function configures the source of the time base. + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The time source is configured to have 1ms time base with a dedicated + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Tick interrupt priority. + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is called automatically at the beginning of program after + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig(). + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation, SysTick timer is the source of time base. + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * It is used to generate interrupts at regular time intervals. + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Care must be taken if HAL_Delay() is called from a peripheral ISR process, + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The SysTick interrupt must have higher priority (numerically lower) + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * than the peripheral interrupt. Otherwise the caller ISR process will be blocked. + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementation in user file. + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @param TickPriority Tick interrupt priority. + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + ARM GAS /tmp/cc5acslE.s page 7 + + + 117 .loc 1 223 1 is_stmt 1 view -0 + 118 .cfi_startproc + 119 @ args = 0, pretend = 0, frame = 0 + 120 @ frame_needed = 0, uses_anonymous_args = 0 + 121 .loc 1 223 1 is_stmt 0 view .LVU15 + 122 0000 10B5 push {r4, lr} + 123 .cfi_def_cfa_offset 8 + 124 .cfi_offset 4, -8 + 125 .cfi_offset 14, -4 + 126 0002 0400 movs r4, r0 + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /*Configure the SysTick to have interrupt in 1ms time basis*/ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) + 127 .loc 1 225 3 is_stmt 1 view .LVU16 + 128 .loc 1 225 51 is_stmt 0 view .LVU17 + 129 0004 0F4B ldr r3, .L11 + 130 0006 1978 ldrb r1, [r3] + 131 0008 FA20 movs r0, #250 + 132 .LVL2: + 133 .loc 1 225 51 view .LVU18 + 134 000a 8000 lsls r0, r0, #2 + 135 000c FFF7FEFF bl __aeabi_uidiv + 136 .LVL3: + 137 0010 0100 movs r1, r0 + 138 .loc 1 225 7 view .LVU19 + 139 0012 0D4B ldr r3, .L11+4 + 140 0014 1868 ldr r0, [r3] + 141 0016 FFF7FEFF bl __aeabi_uidiv + 142 .LVL4: + 143 001a FFF7FEFF bl HAL_SYSTICK_Config + 144 .LVL5: + 145 .loc 1 225 6 discriminator 1 view .LVU20 + 146 001e 0028 cmp r0, #0 + 147 0020 0DD1 bne .L8 + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_ERROR; + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure the SysTick IRQ priority */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 148 .loc 1 231 3 is_stmt 1 view .LVU21 + 149 .loc 1 231 6 is_stmt 0 view .LVU22 + 150 0022 032C cmp r4, #3 + 151 0024 01D9 bls .L10 + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickPrio = TickPriority; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** else + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_ERROR; + 152 .loc 1 238 12 view .LVU23 + 153 0026 0120 movs r0, #1 + 154 0028 0AE0 b .L7 + 155 .L10: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickPrio = TickPriority; + 156 .loc 1 233 5 is_stmt 1 view .LVU24 + 157 002a 0130 adds r0, r0, #1 + ARM GAS /tmp/cc5acslE.s page 8 + + + 158 002c 0022 movs r2, #0 + 159 002e 2100 movs r1, r4 + 160 0030 4042 rsbs r0, r0, #0 + 161 0032 FFF7FEFF bl HAL_NVIC_SetPriority + 162 .LVL6: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 163 .loc 1 234 5 view .LVU25 + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 164 .loc 1 234 16 is_stmt 0 view .LVU26 + 165 0036 054B ldr r3, .L11+8 + 166 0038 1C60 str r4, [r3] + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 167 .loc 1 242 3 is_stmt 1 view .LVU27 + 168 .loc 1 242 10 is_stmt 0 view .LVU28 + 169 003a 0020 movs r0, #0 + 170 003c 00E0 b .L7 + 171 .L8: + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 172 .loc 1 227 12 view .LVU29 + 173 003e 0120 movs r0, #1 + 174 .L7: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 175 .loc 1 243 1 view .LVU30 + 176 @ sp needed + 177 .LVL7: + 178 .loc 1 243 1 view .LVU31 + 179 0040 10BD pop {r4, pc} + 180 .L12: + 181 0042 C046 .align 2 + 182 .L11: + 183 0044 00000000 .word uwTickFreq + 184 0048 00000000 .word SystemCoreClock + 185 004c 00000000 .word uwTickPrio + 186 .cfi_endproc + 187 .LFE44: + 189 .section .text.HAL_Init,"ax",%progbits + 190 .align 1 + 191 .global HAL_Init + 192 .syntax unified + 193 .code 16 + 194 .thumb_func + 196 HAL_Init: + 197 .LFB40: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure Flash prefetch */ + 198 .loc 1 142 1 is_stmt 1 view -0 + 199 .cfi_startproc + 200 @ args = 0, pretend = 0, frame = 0 + 201 @ frame_needed = 0, uses_anonymous_args = 0 + 202 0000 10B5 push {r4, lr} + 203 .cfi_def_cfa_offset 8 + 204 .cfi_offset 4, -8 + 205 .cfi_offset 14, -4 + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #endif /* PREFETCH_ENABLE */ + 206 .loc 1 145 3 view .LVU33 + ARM GAS /tmp/cc5acslE.s page 9 + + + 207 0002 064A ldr r2, .L14 + 208 0004 1368 ldr r3, [r2] + 209 0006 1021 movs r1, #16 + 210 0008 0B43 orrs r3, r1 + 211 000a 1360 str r3, [r2] + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 212 .loc 1 150 3 view .LVU34 + 213 000c 0320 movs r0, #3 + 214 000e FFF7FEFF bl HAL_InitTick + 215 .LVL8: + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 216 .loc 1 153 3 view .LVU35 + 217 0012 FFF7FEFF bl HAL_MspInit + 218 .LVL9: + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 219 .loc 1 156 3 view .LVU36 + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 220 .loc 1 157 1 is_stmt 0 view .LVU37 + 221 0016 0020 movs r0, #0 + 222 @ sp needed + 223 0018 10BD pop {r4, pc} + 224 .L15: + 225 001a C046 .align 2 + 226 .L14: + 227 001c 00200240 .word 1073881088 + 228 .cfi_endproc + 229 .LFE40: + 231 .section .text.HAL_IncTick,"ax",%progbits + 232 .align 1 + 233 .weak HAL_IncTick + 234 .syntax unified + 235 .code 16 + 236 .thumb_func + 238 HAL_IncTick: + 239 .LFB45: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL Control functions + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### HAL Control functions ##### + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] This section provides functions allowing to: + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Provide a tick value in millisecond + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Provide a blocking delay in millisecond + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Suspend the time base source interrupt + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Resume the time base source interrupt + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the HAL API driver version + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the device identifier + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the device revision identifier + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during Sleep mode + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during STOP mode + ARM GAS /tmp/cc5acslE.s page 10 + + + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during STANDBY mode + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function is called to increment a global variable "uwTick" + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used as application time base. + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation, this variable is incremented each 1ms + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * in SysTick ISR. + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_IncTick(void) + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 240 .loc 1 282 1 is_stmt 1 view -0 + 241 .cfi_startproc + 242 @ args = 0, pretend = 0, frame = 0 + 243 @ frame_needed = 0, uses_anonymous_args = 0 + 244 @ link register save eliminated. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTick += uwTickFreq; + 245 .loc 1 283 3 view .LVU39 + 246 .loc 1 283 10 is_stmt 0 view .LVU40 + 247 0000 034A ldr r2, .L17 + 248 0002 1168 ldr r1, [r2] + 249 0004 034B ldr r3, .L17+4 + 250 0006 1B78 ldrb r3, [r3] + 251 0008 5B18 adds r3, r3, r1 + 252 000a 1360 str r3, [r2] + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 253 .loc 1 284 1 view .LVU41 + 254 @ sp needed + 255 000c 7047 bx lr + 256 .L18: + 257 000e C046 .align 2 + 258 .L17: + 259 0010 00000000 .word uwTick + 260 0014 00000000 .word uwTickFreq + 261 .cfi_endproc + 262 .LFE45: + 264 .section .text.HAL_GetTick,"ax",%progbits + 265 .align 1 + 266 .weak HAL_GetTick + 267 .syntax unified + 268 .code 16 + 269 .thumb_func + 271 HAL_GetTick: + 272 .LFB46: + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Provides a tick value in millisecond. + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval tick value + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + ARM GAS /tmp/cc5acslE.s page 11 + + + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak uint32_t HAL_GetTick(void) + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 273 .loc 1 293 1 is_stmt 1 view -0 + 274 .cfi_startproc + 275 @ args = 0, pretend = 0, frame = 0 + 276 @ frame_needed = 0, uses_anonymous_args = 0 + 277 @ link register save eliminated. + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTick; + 278 .loc 1 294 3 view .LVU43 + 279 .loc 1 294 10 is_stmt 0 view .LVU44 + 280 0000 014B ldr r3, .L20 + 281 0002 1868 ldr r0, [r3] + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 282 .loc 1 295 1 view .LVU45 + 283 @ sp needed + 284 0004 7047 bx lr + 285 .L21: + 286 0006 C046 .align 2 + 287 .L20: + 288 0008 00000000 .word uwTick + 289 .cfi_endproc + 290 .LFE46: + 292 .section .text.HAL_GetTickPrio,"ax",%progbits + 293 .align 1 + 294 .global HAL_GetTickPrio + 295 .syntax unified + 296 .code 16 + 297 .thumb_func + 299 HAL_GetTickPrio: + 300 .LFB47: + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function returns a tick priority. + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval tick priority + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetTickPrio(void) + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 301 .loc 1 302 1 is_stmt 1 view -0 + 302 .cfi_startproc + 303 @ args = 0, pretend = 0, frame = 0 + 304 @ frame_needed = 0, uses_anonymous_args = 0 + 305 @ link register save eliminated. + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTickPrio; + 306 .loc 1 303 3 view .LVU47 + 307 .loc 1 303 10 is_stmt 0 view .LVU48 + 308 0000 014B ldr r3, .L23 + 309 .loc 1 303 10 discriminator 1 view .LVU49 + 310 0002 1868 ldr r0, [r3] + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 311 .loc 1 304 1 view .LVU50 + 312 @ sp needed + 313 0004 7047 bx lr + 314 .L24: + 315 0006 C046 .align 2 + 316 .L23: + 317 0008 00000000 .word uwTickPrio + 318 .cfi_endproc + ARM GAS /tmp/cc5acslE.s page 12 + + + 319 .LFE47: + 321 .section .text.HAL_SetTickFreq,"ax",%progbits + 322 .align 1 + 323 .global HAL_SetTickFreq + 324 .syntax unified + 325 .code 16 + 326 .thumb_func + 328 HAL_SetTickFreq: + 329 .LVL10: + 330 .LFB48: + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Set new tick Freq. + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval status + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq) + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 331 .loc 1 311 1 is_stmt 1 view -0 + 332 .cfi_startproc + 333 @ args = 0, pretend = 0, frame = 0 + 334 @ frame_needed = 0, uses_anonymous_args = 0 + 335 .loc 1 311 1 is_stmt 0 view .LVU52 + 336 0000 10B5 push {r4, lr} + 337 .cfi_def_cfa_offset 8 + 338 .cfi_offset 4, -8 + 339 .cfi_offset 14, -4 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef status = HAL_OK; + 340 .loc 1 312 3 is_stmt 1 view .LVU53 + 341 .LVL11: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 342 .loc 1 313 3 view .LVU54 + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** assert_param(IS_TICKFREQ(Freq)); + 343 .loc 1 315 3 view .LVU55 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (uwTickFreq != Freq) + 344 .loc 1 317 3 view .LVU56 + 345 .loc 1 317 18 is_stmt 0 view .LVU57 + 346 0002 084B ldr r3, .L29 + 347 0004 1C78 ldrb r4, [r3] + 348 .loc 1 317 6 view .LVU58 + 349 0006 8442 cmp r4, r0 + 350 0008 01D1 bne .L28 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 351 .loc 1 312 21 view .LVU59 + 352 000a 0020 movs r0, #0 + 353 .LVL12: + 354 .L26: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Back up uwTickFreq frequency */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** prevTickFreq = uwTickFreq; + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Update uwTickFreq global variable used by HAL_InitTick() */ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickFreq = Freq; + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Apply the new tick Freq */ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** status = HAL_InitTick(uwTickPrio); + ARM GAS /tmp/cc5acslE.s page 13 + + + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (status != HAL_OK) + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Restore previous tick frequency */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickFreq = prevTickFreq; + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return status; + 355 .loc 1 335 3 is_stmt 1 view .LVU60 + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 356 .loc 1 336 1 is_stmt 0 view .LVU61 + 357 @ sp needed + 358 000c 10BD pop {r4, pc} + 359 .LVL13: + 360 .L28: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 361 .loc 1 320 5 is_stmt 1 view .LVU62 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 362 .loc 1 323 5 view .LVU63 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 363 .loc 1 323 16 is_stmt 0 view .LVU64 + 364 000e 1870 strb r0, [r3] + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 365 .loc 1 326 5 is_stmt 1 view .LVU65 + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 366 .loc 1 326 14 is_stmt 0 view .LVU66 + 367 0010 054B ldr r3, .L29+4 + 368 0012 1868 ldr r0, [r3] + 369 .LVL14: + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 370 .loc 1 326 14 view .LVU67 + 371 0014 FFF7FEFF bl HAL_InitTick + 372 .LVL15: + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 373 .loc 1 328 5 is_stmt 1 view .LVU68 + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 374 .loc 1 328 8 is_stmt 0 view .LVU69 + 375 0018 0028 cmp r0, #0 + 376 001a F7D0 beq .L26 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 377 .loc 1 331 7 is_stmt 1 view .LVU70 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 378 .loc 1 331 18 is_stmt 0 view .LVU71 + 379 001c 014B ldr r3, .L29 + 380 001e 1C70 strb r4, [r3] + 381 0020 F4E7 b .L26 + 382 .L30: + 383 0022 C046 .align 2 + 384 .L29: + 385 0024 00000000 .word uwTickFreq + 386 0028 00000000 .word uwTickPrio + 387 .cfi_endproc + 388 .LFE48: + 390 .section .text.HAL_GetTickFreq,"ax",%progbits + 391 .align 1 + 392 .global HAL_GetTickFreq + ARM GAS /tmp/cc5acslE.s page 14 + + + 393 .syntax unified + 394 .code 16 + 395 .thumb_func + 397 HAL_GetTickFreq: + 398 .LFB49: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief return tick frequency. + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Tick frequency. + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Value of @ref HAL_TickFreqTypeDef. + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef HAL_GetTickFreq(void) + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 399 .loc 1 344 1 is_stmt 1 view -0 + 400 .cfi_startproc + 401 @ args = 0, pretend = 0, frame = 0 + 402 @ frame_needed = 0, uses_anonymous_args = 0 + 403 @ link register save eliminated. + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTickFreq; + 404 .loc 1 345 3 view .LVU73 + 405 .loc 1 345 10 is_stmt 0 view .LVU74 + 406 0000 014B ldr r3, .L32 + 407 .loc 1 345 10 discriminator 1 view .LVU75 + 408 0002 1878 ldrb r0, [r3] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 409 .loc 1 346 1 view .LVU76 + 410 @ sp needed + 411 0004 7047 bx lr + 412 .L33: + 413 0006 C046 .align 2 + 414 .L32: + 415 0008 00000000 .word uwTickFreq + 416 .cfi_endproc + 417 .LFE49: + 419 .section .text.HAL_Delay,"ax",%progbits + 420 .align 1 + 421 .weak HAL_Delay + 422 .syntax unified + 423 .code 16 + 424 .thumb_func + 426 HAL_Delay: + 427 .LVL16: + 428 .LFB50: + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function provides accurate delay (in milliseconds) based + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * on variable incremented. + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * It is used to generate interrupts at regular time intervals where uwTick + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is incremented. + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note ThiS function is declared as __weak to be overwritten in case of other + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @param Delay specifies the delay time length, in milliseconds. + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_Delay(uint32_t Delay) + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + ARM GAS /tmp/cc5acslE.s page 15 + + + 429 .loc 1 360 1 is_stmt 1 view -0 + 430 .cfi_startproc + 431 @ args = 0, pretend = 0, frame = 0 + 432 @ frame_needed = 0, uses_anonymous_args = 0 + 433 .loc 1 360 1 is_stmt 0 view .LVU78 + 434 0000 70B5 push {r4, r5, r6, lr} + 435 .cfi_def_cfa_offset 16 + 436 .cfi_offset 4, -16 + 437 .cfi_offset 5, -12 + 438 .cfi_offset 6, -8 + 439 .cfi_offset 14, -4 + 440 0002 0400 movs r4, r0 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t tickstart = HAL_GetTick(); + 441 .loc 1 361 3 is_stmt 1 view .LVU79 + 442 .loc 1 361 24 is_stmt 0 view .LVU80 + 443 0004 FFF7FEFF bl HAL_GetTick + 444 .LVL17: + 445 .loc 1 361 24 view .LVU81 + 446 0008 0500 movs r5, r0 + 447 .LVL18: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t wait = Delay; + 448 .loc 1 362 3 is_stmt 1 view .LVU82 + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Add a freq to guarantee minimum wait */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (wait < HAL_MAX_DELAY) + 449 .loc 1 365 3 view .LVU83 + 450 .loc 1 365 6 is_stmt 0 view .LVU84 + 451 000a 631C adds r3, r4, #1 + 452 000c 02D0 beq .L36 + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** wait += (uint32_t)(uwTickFreq); + 453 .loc 1 367 5 is_stmt 1 view .LVU85 + 454 .loc 1 367 13 is_stmt 0 view .LVU86 + 455 000e 044B ldr r3, .L38 + 456 0010 1B78 ldrb r3, [r3] + 457 .loc 1 367 10 view .LVU87 + 458 0012 E418 adds r4, r4, r3 + 459 .LVL19: + 460 .L36: + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** while((HAL_GetTick() - tickstart) < wait) + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 461 .loc 1 372 3 is_stmt 1 view .LVU88 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 462 .loc 1 370 37 discriminator 1 view .LVU89 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 463 .loc 1 370 10 is_stmt 0 discriminator 1 view .LVU90 + 464 0014 FFF7FEFF bl HAL_GetTick + 465 .LVL20: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 466 .loc 1 370 24 discriminator 1 view .LVU91 + 467 0018 401B subs r0, r0, r5 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 468 .loc 1 370 37 discriminator 1 view .LVU92 + 469 001a A042 cmp r0, r4 + ARM GAS /tmp/cc5acslE.s page 16 + + + 470 001c FAD3 bcc .L36 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 471 .loc 1 373 1 view .LVU93 + 472 @ sp needed + 473 .LVL21: + 474 .LVL22: + 475 .loc 1 373 1 view .LVU94 + 476 001e 70BD pop {r4, r5, r6, pc} + 477 .L39: + 478 .align 2 + 479 .L38: + 480 0020 00000000 .word uwTickFreq + 481 .cfi_endproc + 482 .LFE50: + 484 .section .text.HAL_SuspendTick,"ax",%progbits + 485 .align 1 + 486 .weak HAL_SuspendTick + 487 .syntax unified + 488 .code 16 + 489 .thumb_func + 491 HAL_SuspendTick: + 492 .LFB51: + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Suspend Tick increment. + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_SuspendTick() + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is called, the the SysTick interrupt will be disabled and so Tick increment + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is suspended. + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_SuspendTick(void) + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 493 .loc 1 387 1 is_stmt 1 view -0 + 494 .cfi_startproc + 495 @ args = 0, pretend = 0, frame = 0 + 496 @ frame_needed = 0, uses_anonymous_args = 0 + 497 @ link register save eliminated. + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Disable SysTick Interrupt */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk); + 498 .loc 1 389 3 view .LVU96 + 499 0000 024A ldr r2, .L41 + 500 0002 1368 ldr r3, [r2] + 501 0004 0221 movs r1, #2 + 502 0006 8B43 bics r3, r1 + 503 0008 1360 str r3, [r2] + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 504 .loc 1 390 1 is_stmt 0 view .LVU97 + 505 @ sp needed + 506 000a 7047 bx lr + 507 .L42: + 508 .align 2 + 509 .L41: + 510 000c 10E000E0 .word -536813552 + ARM GAS /tmp/cc5acslE.s page 17 + + + 511 .cfi_endproc + 512 .LFE51: + 514 .section .text.HAL_ResumeTick,"ax",%progbits + 515 .align 1 + 516 .weak HAL_ResumeTick + 517 .syntax unified + 518 .code 16 + 519 .thumb_func + 521 HAL_ResumeTick: + 522 .LFB52: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Resume Tick increment. + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_ResumeTick() + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is called, the the SysTick interrupt will be enabled and so Tick increment + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is resumed. + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_ResumeTick(void) + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 523 .loc 1 403 1 is_stmt 1 view -0 + 524 .cfi_startproc + 525 @ args = 0, pretend = 0, frame = 0 + 526 @ frame_needed = 0, uses_anonymous_args = 0 + 527 @ link register save eliminated. + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Enable SysTick Interrupt */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk); + 528 .loc 1 405 3 view .LVU99 + 529 0000 024A ldr r2, .L44 + 530 0002 1368 ldr r3, [r2] + 531 0004 0221 movs r1, #2 + 532 0006 0B43 orrs r3, r1 + 533 0008 1360 str r3, [r2] + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 534 .loc 1 406 1 is_stmt 0 view .LVU100 + 535 @ sp needed + 536 000a 7047 bx lr + 537 .L45: + 538 .align 2 + 539 .L44: + 540 000c 10E000E0 .word -536813552 + 541 .cfi_endproc + 542 .LFE52: + 544 .section .text.HAL_GetHalVersion,"ax",%progbits + 545 .align 1 + 546 .global HAL_GetHalVersion + 547 .syntax unified + 548 .code 16 + 549 .thumb_func + 551 HAL_GetHalVersion: + 552 .LFB53: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This method returns the HAL revision + ARM GAS /tmp/cc5acslE.s page 18 + + + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval version 0xXYZR (8bits for each decimal, R for RC) + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetHalVersion(void) + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 553 .loc 1 413 1 is_stmt 1 view -0 + 554 .cfi_startproc + 555 @ args = 0, pretend = 0, frame = 0 + 556 @ frame_needed = 0, uses_anonymous_args = 0 + 557 @ link register save eliminated. + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return __STM32F0xx_HAL_VERSION; + 558 .loc 1 414 2 view .LVU102 + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 559 .loc 1 415 1 is_stmt 0 view .LVU103 + 560 0000 0048 ldr r0, .L47 + 561 @ sp needed + 562 0002 7047 bx lr + 563 .L48: + 564 .align 2 + 565 .L47: + 566 0004 00080701 .word 17238016 + 567 .cfi_endproc + 568 .LFE53: + 570 .section .text.HAL_GetREVID,"ax",%progbits + 571 .align 1 + 572 .global HAL_GetREVID + 573 .syntax unified + 574 .code 16 + 575 .thumb_func + 577 HAL_GetREVID: + 578 .LFB54: + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns the device revision identifier. + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device revision identifier + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetREVID(void) + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 579 .loc 1 422 1 is_stmt 1 view -0 + 580 .cfi_startproc + 581 @ args = 0, pretend = 0, frame = 0 + 582 @ frame_needed = 0, uses_anonymous_args = 0 + 583 @ link register save eliminated. + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return((DBGMCU->IDCODE) >> 16U); + 584 .loc 1 423 4 view .LVU105 + 585 .loc 1 423 18 is_stmt 0 view .LVU106 + 586 0000 014B ldr r3, .L50 + 587 0002 1868 ldr r0, [r3] + 588 .loc 1 423 28 view .LVU107 + 589 0004 000C lsrs r0, r0, #16 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 590 .loc 1 424 1 view .LVU108 + 591 @ sp needed + 592 0006 7047 bx lr + 593 .L51: + 594 .align 2 + 595 .L50: + 596 0008 00580140 .word 1073829888 + ARM GAS /tmp/cc5acslE.s page 19 + + + 597 .cfi_endproc + 598 .LFE54: + 600 .section .text.HAL_GetDEVID,"ax",%progbits + 601 .align 1 + 602 .global HAL_GetDEVID + 603 .syntax unified + 604 .code 16 + 605 .thumb_func + 607 HAL_GetDEVID: + 608 .LFB55: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns the device identifier. + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetDEVID(void) + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 609 .loc 1 431 1 is_stmt 1 view -0 + 610 .cfi_startproc + 611 @ args = 0, pretend = 0, frame = 0 + 612 @ frame_needed = 0, uses_anonymous_args = 0 + 613 @ link register save eliminated. + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK); + 614 .loc 1 432 4 view .LVU110 + 615 .loc 1 432 18 is_stmt 0 view .LVU111 + 616 0000 024B ldr r3, .L53 + 617 0002 1868 ldr r0, [r3] + 618 .loc 1 432 28 view .LVU112 + 619 0004 0005 lsls r0, r0, #20 + 620 0006 000D lsrs r0, r0, #20 + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 621 .loc 1 433 1 view .LVU113 + 622 @ sp needed + 623 0008 7047 bx lr + 624 .L54: + 625 000a C046 .align 2 + 626 .L53: + 627 000c 00580140 .word 1073829888 + 628 .cfi_endproc + 629 .LFE55: + 631 .section .text.HAL_GetUIDw0,"ax",%progbits + 632 .align 1 + 633 .global HAL_GetUIDw0 + 634 .syntax unified + 635 .code 16 + 636 .thumb_func + 638 HAL_GetUIDw0: + 639 .LFB56: + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns first word of the unique device identifier (UID based on 96 bits) + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw0(void) + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 640 .loc 1 440 1 is_stmt 1 view -0 + 641 .cfi_startproc + ARM GAS /tmp/cc5acslE.s page 20 + + + 642 @ args = 0, pretend = 0, frame = 0 + 643 @ frame_needed = 0, uses_anonymous_args = 0 + 644 @ link register save eliminated. + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)UID_BASE))); + 645 .loc 1 441 4 view .LVU115 + 646 .loc 1 441 11 is_stmt 0 view .LVU116 + 647 0000 014B ldr r3, .L56 + 648 .loc 1 441 11 discriminator 1 view .LVU117 + 649 0002 1868 ldr r0, [r3] + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 650 .loc 1 442 1 view .LVU118 + 651 @ sp needed + 652 0004 7047 bx lr + 653 .L57: + 654 0006 C046 .align 2 + 655 .L56: + 656 0008 ACF7FF1F .word 536868780 + 657 .cfi_endproc + 658 .LFE56: + 660 .section .text.HAL_GetUIDw1,"ax",%progbits + 661 .align 1 + 662 .global HAL_GetUIDw1 + 663 .syntax unified + 664 .code 16 + 665 .thumb_func + 667 HAL_GetUIDw1: + 668 .LFB57: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns second word of the unique device identifier (UID based on 96 bits) + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw1(void) + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 669 .loc 1 449 1 is_stmt 1 view -0 + 670 .cfi_startproc + 671 @ args = 0, pretend = 0, frame = 0 + 672 @ frame_needed = 0, uses_anonymous_args = 0 + 673 @ link register save eliminated. + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 4U)))); + 674 .loc 1 450 4 view .LVU120 + 675 .loc 1 450 11 is_stmt 0 view .LVU121 + 676 0000 014B ldr r3, .L59 + 677 .loc 1 450 11 discriminator 1 view .LVU122 + 678 0002 1868 ldr r0, [r3] + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 679 .loc 1 451 1 view .LVU123 + 680 @ sp needed + 681 0004 7047 bx lr + 682 .L60: + 683 0006 C046 .align 2 + 684 .L59: + 685 0008 B0F7FF1F .word 536868784 + 686 .cfi_endproc + 687 .LFE57: + 689 .section .text.HAL_GetUIDw2,"ax",%progbits + 690 .align 1 + ARM GAS /tmp/cc5acslE.s page 21 + + + 691 .global HAL_GetUIDw2 + 692 .syntax unified + 693 .code 16 + 694 .thumb_func + 696 HAL_GetUIDw2: + 697 .LFB58: + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns third word of the unique device identifier (UID based on 96 bits) + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw2(void) + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 698 .loc 1 458 1 is_stmt 1 view -0 + 699 .cfi_startproc + 700 @ args = 0, pretend = 0, frame = 0 + 701 @ frame_needed = 0, uses_anonymous_args = 0 + 702 @ link register save eliminated. + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 8U)))); + 703 .loc 1 459 4 view .LVU125 + 704 .loc 1 459 11 is_stmt 0 view .LVU126 + 705 0000 014B ldr r3, .L62 + 706 .loc 1 459 11 discriminator 1 view .LVU127 + 707 0002 1868 ldr r0, [r3] + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 708 .loc 1 460 1 view .LVU128 + 709 @ sp needed + 710 0004 7047 bx lr + 711 .L63: + 712 0006 C046 .align 2 + 713 .L62: + 714 0008 B4F7FF1F .word 536868788 + 715 .cfi_endproc + 716 .LFE58: + 718 .section .text.HAL_DBGMCU_EnableDBGStopMode,"ax",%progbits + 719 .align 1 + 720 .global HAL_DBGMCU_EnableDBGStopMode + 721 .syntax unified + 722 .code 16 + 723 .thumb_func + 725 HAL_DBGMCU_EnableDBGStopMode: + 726 .LFB59: + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Enable the Debug Module during STOP mode + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_EnableDBGStopMode(void) + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 727 .loc 1 467 1 is_stmt 1 view -0 + 728 .cfi_startproc + 729 @ args = 0, pretend = 0, frame = 0 + 730 @ frame_needed = 0, uses_anonymous_args = 0 + 731 @ link register save eliminated. + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 732 .loc 1 468 3 view .LVU130 + 733 0000 024A ldr r2, .L65 + ARM GAS /tmp/cc5acslE.s page 22 + + + 734 0002 5368 ldr r3, [r2, #4] + 735 0004 0221 movs r1, #2 + 736 0006 0B43 orrs r3, r1 + 737 0008 5360 str r3, [r2, #4] + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 738 .loc 1 469 1 is_stmt 0 view .LVU131 + 739 @ sp needed + 740 000a 7047 bx lr + 741 .L66: + 742 .align 2 + 743 .L65: + 744 000c 00580140 .word 1073829888 + 745 .cfi_endproc + 746 .LFE59: + 748 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits + 749 .align 1 + 750 .global HAL_DBGMCU_DisableDBGStopMode + 751 .syntax unified + 752 .code 16 + 753 .thumb_func + 755 HAL_DBGMCU_DisableDBGStopMode: + 756 .LFB60: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Disable the Debug Module during STOP mode + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_DisableDBGStopMode(void) + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 757 .loc 1 476 1 is_stmt 1 view -0 + 758 .cfi_startproc + 759 @ args = 0, pretend = 0, frame = 0 + 760 @ frame_needed = 0, uses_anonymous_args = 0 + 761 @ link register save eliminated. + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 762 .loc 1 477 3 view .LVU133 + 763 0000 024A ldr r2, .L68 + 764 0002 5368 ldr r3, [r2, #4] + 765 0004 0221 movs r1, #2 + 766 0006 8B43 bics r3, r1 + 767 0008 5360 str r3, [r2, #4] + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 768 .loc 1 478 1 is_stmt 0 view .LVU134 + 769 @ sp needed + 770 000a 7047 bx lr + 771 .L69: + 772 .align 2 + 773 .L68: + 774 000c 00580140 .word 1073829888 + 775 .cfi_endproc + 776 .LFE60: + 778 .section .text.HAL_DBGMCU_EnableDBGStandbyMode,"ax",%progbits + 779 .align 1 + 780 .global HAL_DBGMCU_EnableDBGStandbyMode + 781 .syntax unified + 782 .code 16 + 783 .thumb_func + ARM GAS /tmp/cc5acslE.s page 23 + + + 785 HAL_DBGMCU_EnableDBGStandbyMode: + 786 .LFB61: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Enable the Debug Module during STANDBY mode + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_EnableDBGStandbyMode(void) + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 787 .loc 1 485 1 is_stmt 1 view -0 + 788 .cfi_startproc + 789 @ args = 0, pretend = 0, frame = 0 + 790 @ frame_needed = 0, uses_anonymous_args = 0 + 791 @ link register save eliminated. + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 792 .loc 1 486 3 view .LVU136 + 793 0000 024A ldr r2, .L71 + 794 0002 5368 ldr r3, [r2, #4] + 795 0004 0421 movs r1, #4 + 796 0006 0B43 orrs r3, r1 + 797 0008 5360 str r3, [r2, #4] + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 798 .loc 1 487 1 is_stmt 0 view .LVU137 + 799 @ sp needed + 800 000a 7047 bx lr + 801 .L72: + 802 .align 2 + 803 .L71: + 804 000c 00580140 .word 1073829888 + 805 .cfi_endproc + 806 .LFE61: + 808 .section .text.HAL_DBGMCU_DisableDBGStandbyMode,"ax",%progbits + 809 .align 1 + 810 .global HAL_DBGMCU_DisableDBGStandbyMode + 811 .syntax unified + 812 .code 16 + 813 .thumb_func + 815 HAL_DBGMCU_DisableDBGStandbyMode: + 816 .LFB62: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Disable the Debug Module during STANDBY mode + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_DisableDBGStandbyMode(void) + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 817 .loc 1 494 1 is_stmt 1 view -0 + 818 .cfi_startproc + 819 @ args = 0, pretend = 0, frame = 0 + 820 @ frame_needed = 0, uses_anonymous_args = 0 + 821 @ link register save eliminated. + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 822 .loc 1 495 3 view .LVU139 + 823 0000 024A ldr r2, .L74 + 824 0002 5368 ldr r3, [r2, #4] + 825 0004 0421 movs r1, #4 + 826 0006 8B43 bics r3, r1 + ARM GAS /tmp/cc5acslE.s page 24 + + + 827 0008 5360 str r3, [r2, #4] + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 828 .loc 1 496 1 is_stmt 0 view .LVU140 + 829 @ sp needed + 830 000a 7047 bx lr + 831 .L75: + 832 .align 2 + 833 .L74: + 834 000c 00580140 .word 1073829888 + 835 .cfi_endproc + 836 .LFE62: + 838 .global uwTickFreq + 839 .section .data.uwTickFreq,"aw" + 842 uwTickFreq: + 843 0000 01 .byte 1 + 844 .global uwTickPrio + 845 .section .data.uwTickPrio,"aw" + 846 .align 2 + 849 uwTickPrio: + 850 0000 04000000 .word 4 + 851 .global uwTick + 852 .section .bss.uwTick,"aw",%nobits + 853 .align 2 + 856 uwTick: + 857 0000 00000000 .space 4 + 858 .text + 859 .Letext0: + 860 .file 2 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 861 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 862 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 863 .file 5 "Drivers/CMSIS/Include/core_cm0.h" + 864 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 865 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 866 .file 8 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 867 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h" + ARM GAS /tmp/cc5acslE.s page 25 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal.c + /tmp/cc5acslE.s:19 .text.HAL_MspInit:00000000 $t + /tmp/cc5acslE.s:25 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/cc5acslE.s:39 .text.HAL_MspDeInit:00000000 $t + /tmp/cc5acslE.s:45 .text.HAL_MspDeInit:00000000 HAL_MspDeInit + /tmp/cc5acslE.s:59 .text.HAL_DeInit:00000000 $t + /tmp/cc5acslE.s:65 .text.HAL_DeInit:00000000 HAL_DeInit + /tmp/cc5acslE.s:102 .text.HAL_DeInit:00000020 $d + /tmp/cc5acslE.s:108 .text.HAL_InitTick:00000000 $t + /tmp/cc5acslE.s:114 .text.HAL_InitTick:00000000 HAL_InitTick + /tmp/cc5acslE.s:183 .text.HAL_InitTick:00000044 $d + /tmp/cc5acslE.s:842 .data.uwTickFreq:00000000 uwTickFreq + /tmp/cc5acslE.s:849 .data.uwTickPrio:00000000 uwTickPrio + /tmp/cc5acslE.s:190 .text.HAL_Init:00000000 $t + /tmp/cc5acslE.s:196 .text.HAL_Init:00000000 HAL_Init + /tmp/cc5acslE.s:227 .text.HAL_Init:0000001c $d + /tmp/cc5acslE.s:232 .text.HAL_IncTick:00000000 $t + /tmp/cc5acslE.s:238 .text.HAL_IncTick:00000000 HAL_IncTick + /tmp/cc5acslE.s:259 .text.HAL_IncTick:00000010 $d + /tmp/cc5acslE.s:856 .bss.uwTick:00000000 uwTick + /tmp/cc5acslE.s:265 .text.HAL_GetTick:00000000 $t + /tmp/cc5acslE.s:271 .text.HAL_GetTick:00000000 HAL_GetTick + /tmp/cc5acslE.s:288 .text.HAL_GetTick:00000008 $d + /tmp/cc5acslE.s:293 .text.HAL_GetTickPrio:00000000 $t + /tmp/cc5acslE.s:299 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio + /tmp/cc5acslE.s:317 .text.HAL_GetTickPrio:00000008 $d + /tmp/cc5acslE.s:322 .text.HAL_SetTickFreq:00000000 $t + /tmp/cc5acslE.s:328 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq + /tmp/cc5acslE.s:385 .text.HAL_SetTickFreq:00000024 $d + /tmp/cc5acslE.s:391 .text.HAL_GetTickFreq:00000000 $t + /tmp/cc5acslE.s:397 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq + /tmp/cc5acslE.s:415 .text.HAL_GetTickFreq:00000008 $d + /tmp/cc5acslE.s:420 .text.HAL_Delay:00000000 $t + /tmp/cc5acslE.s:426 .text.HAL_Delay:00000000 HAL_Delay + /tmp/cc5acslE.s:480 .text.HAL_Delay:00000020 $d + /tmp/cc5acslE.s:485 .text.HAL_SuspendTick:00000000 $t + /tmp/cc5acslE.s:491 .text.HAL_SuspendTick:00000000 HAL_SuspendTick + /tmp/cc5acslE.s:510 .text.HAL_SuspendTick:0000000c $d + /tmp/cc5acslE.s:515 .text.HAL_ResumeTick:00000000 $t + /tmp/cc5acslE.s:521 .text.HAL_ResumeTick:00000000 HAL_ResumeTick + /tmp/cc5acslE.s:540 .text.HAL_ResumeTick:0000000c $d + /tmp/cc5acslE.s:545 .text.HAL_GetHalVersion:00000000 $t + /tmp/cc5acslE.s:551 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion + /tmp/cc5acslE.s:566 .text.HAL_GetHalVersion:00000004 $d + /tmp/cc5acslE.s:571 .text.HAL_GetREVID:00000000 $t + /tmp/cc5acslE.s:577 .text.HAL_GetREVID:00000000 HAL_GetREVID + /tmp/cc5acslE.s:596 .text.HAL_GetREVID:00000008 $d + /tmp/cc5acslE.s:601 .text.HAL_GetDEVID:00000000 $t + /tmp/cc5acslE.s:607 .text.HAL_GetDEVID:00000000 HAL_GetDEVID + /tmp/cc5acslE.s:627 .text.HAL_GetDEVID:0000000c $d + /tmp/cc5acslE.s:632 .text.HAL_GetUIDw0:00000000 $t + /tmp/cc5acslE.s:638 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0 + /tmp/cc5acslE.s:656 .text.HAL_GetUIDw0:00000008 $d + /tmp/cc5acslE.s:661 .text.HAL_GetUIDw1:00000000 $t + /tmp/cc5acslE.s:667 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1 + /tmp/cc5acslE.s:685 .text.HAL_GetUIDw1:00000008 $d + ARM GAS /tmp/cc5acslE.s page 26 + + + /tmp/cc5acslE.s:690 .text.HAL_GetUIDw2:00000000 $t + /tmp/cc5acslE.s:696 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2 + /tmp/cc5acslE.s:714 .text.HAL_GetUIDw2:00000008 $d + /tmp/cc5acslE.s:719 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t + /tmp/cc5acslE.s:725 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode + /tmp/cc5acslE.s:744 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d + /tmp/cc5acslE.s:749 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t + /tmp/cc5acslE.s:755 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode + /tmp/cc5acslE.s:774 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d + /tmp/cc5acslE.s:779 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t + /tmp/cc5acslE.s:785 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode + /tmp/cc5acslE.s:804 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d + /tmp/cc5acslE.s:809 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t + /tmp/cc5acslE.s:815 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zpWR}{%X=U1`{eoXxgH;Td~bt1jE|Kpe^XG{{XGqTtegJm$MW|c!}0K8xGu=``l)w8vaW z+~et+_1*38H;6(>=&WSVxazh z@E)`&a&refdwX}Ik$iqInstance)); + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */ + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* at RCC top level depending on both possible clock sources: */ + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* APB clock or HSI clock. */ + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Refer to header of this file for more details on clock enabling procedure*/ + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Actions performed only if ADC is coming from state reset: */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Initialization of ADC MSP */ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC voltage regulator enable */ + ARM GAS /tmp/ccPDyDzP.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->State == HAL_ADC_STATE_RESET) + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Initialize ADC error code */ + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allocate lock resource and initialize it */ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Lock = HAL_UNLOCKED; + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the ADC Callback settings */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->MspInitCallback == NULL) + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the low level hardware */ + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback(hadc); + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the low level hardware */ + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_MspInit(hadc); + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* correctly completed. */ + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* and if there is no conversion on going on regular group (ADC can be */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enabled anyway, in case of call of this function to update a parameter */ + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* on the fly). */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL); + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated only when ADC is disabled: */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC clock mode */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC clock prescaler */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC resolution */ + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET) + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Some parameters of this register are not reset, since they are set */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by other functions and must be kept in case of usage of this */ + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* function on the fly (update of a parameter of ADC_InitTypeDef */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* without needing to reconfigure all other ADC groups/channels */ + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameters): */ + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - internal measurement paths: Vbat, temperature sensor, Vref */ + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (set into HAL_ADC_ConfigChannel() ) */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC resolution */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR1, + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_RES , + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.Resolution ); + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC clock mode: clock source AHB or HSI with */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* selectable prescaler */ + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR2 , + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR2_CKMODE , + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ClockPrescaler ); + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC: */ + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - discontinuous mode */ + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - LowPowerAutoWait mode */ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - LowPowerAutoPowerOff mode */ + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - continuous conversion mode */ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - overrun */ + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - external trigger to start conversion */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - external trigger polarity */ + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - data alignment */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - resolution */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - scan direction */ + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - DMA continuous request */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN | + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTDLY | + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONT | + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVRMOD | + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTSEL | + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTEN | + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_ALIGN | + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACFG ); + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable discontinuous mode only if continuous mode is disabled */ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.DiscontinuousConvMode == ENABLE) + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.ContinuousConvMode == DISABLE) + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the selected ADC group regular discontinuous mode */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= ADC_CFGR1_DISCEN; + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC regular group discontinuous was intended to be enabled, */ + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* but ADC regular group modes continuous and sequencer discontinuous */ + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* cannot be enabled simultaneously. */ + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable external trigger if trigger selection is different of software */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* start. */ + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: This configuration keeps the hardware feature of parameter */ + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ExternalTrigConvEdge "trigger edge none" equivalent to */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* software start. */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= ( hadc->Init.ExternalTrigConv | + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC configuration register with previous settings */ + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= tmpCFGR1; + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (obsolete): sampling time set in this function if parameter */ + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "SamplingTimeCommon" has been set to a valid sampling time. */ + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Otherwise, sampling time is set into ADC channel initialization */ + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* structure with parameter "SamplingTime" (obsolete). */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the old sample time */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the new sample time */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon); + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check back that ADC registers have effectively been configured to */ + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ensure of no potential problem of ADC core IP clocking. */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check through register CFGR1 (excluding analog watchdog configuration: */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* set into separate dedicated function, and bits of ADC resolution set */ + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* out of temporary variable 'tmpCFGR1'). */ + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1 + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to none */ + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the ADC state */ + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + ARM GAS /tmp/ccPDyDzP.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_ERROR_INTERNAL); + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Deinitialize the ADC peripheral registers to their default reset + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * values, with deinitialization of the ADC MSP. + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note For devices with several ADCs: reset of ADC common registers is done + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * only if all ADCs sharing the same common group are disabled. + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * If this is not the case, reset of these common parameters reset is + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * bypassed without error reporting: it can be the intended behaviour in + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * case of reset of a single ADC while the other ADCs sharing the same + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * common group is still running. + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check ADC handle */ + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(hadc == NULL) + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop potential conversion on going, on regular group */ + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) + ARM GAS /tmp/ccPDyDzP.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC peripheral */ + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR) + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_READY; + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* correctly completed. */ + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR) + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Reset ADC registers ========== */ + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register IER */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC | + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOSMP | ADC_IT_RDY ) ); + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register ISR */ + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR | + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC | + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOSMP | ADC_FLAG_RDY ) ); + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CR */ + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */ + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "read-set": no direct reset applicable. */ + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CFGR1 */ + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_ + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_ + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CFGR2 */ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Update of ADC clock mode is conditioned to ADC state disabled: */ + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* already done above. */ + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE; + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register SMPR */ + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~ADC_SMPR_SMP; + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register TR1 */ + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CHSELR */ + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 | + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_ + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_ + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_ + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register DR */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* bits in access mode read only, no direct reset applicable*/ + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CCR */ + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR &= ~(ADC_CCR_ALL); + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Hard reset ADC peripheral ========== */ + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Performs a global reset of the entire ADC peripheral: ADC state is */ + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* forced to a similar state after device power-on. */ + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If needed, copy-paste and uncomment the following reset code into */ + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */ + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* */ + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* __HAL_RCC_ADC1_FORCE_RESET() */ + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* __HAL_RCC_ADC1_RELEASE_RESET() */ + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->MspDeInitCallback == NULL) + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* DeInit the low level hardware */ + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback(hadc); + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* DeInit the low level hardware */ + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_MspDeInit(hadc); + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to none */ + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_RESET; + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initializes the ADC MSP. + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_MspInit must be implemented in the user file. + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DeInitializes the ADC MSP. + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_MspDeInit must be implemented in the user file. + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Register a User ADC Callback + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * To be used instead of the weak predefined callback + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the configuration information for the specified ADC. + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param CallbackID ID of the callback to be registered + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param pCallback pointer to the Callback function + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Callb + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK; + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (pCallback == NULL) + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0) + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID : + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = pCallback; + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID : + ARM GAS /tmp/ccPDyDzP.s page 16 + + + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = pCallback; + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = pCallback; + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = pCallback; + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = pCallback; + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback; + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State) + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = pCallback; + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback; + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 17 + + + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return status; + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Unregister a ADC Callback + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC callback is redirected to the weak predefined callback + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the configuration information for the specified ADC. + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param CallbackID ID of the callback to be unregistered + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Cal + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK; + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0) + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID : + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID : + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + ARM GAS /tmp/ccPDyDzP.s page 18 + + + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State) + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return status; + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group2 IO operation functions + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief IO operation functions + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### IO operation functions ##### + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to: + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group. + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group. +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Poll for conversion complete on regular group. +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Poll for conversion event. + ARM GAS /tmp/ccPDyDzP.s page 19 + + +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Get result of regular channel conversion. +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group and enable interruptions. +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group and disable interruptions. +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Handle ADC interrupt request +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group and enable DMA transfer. +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group and disable ADC DMA transfer. +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group. +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: None. +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ + ARM GAS /tmp/ccPDyDzP.s page 20 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable ADC peripheral. +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + ARM GAS /tmp/ccPDyDzP.s page 21 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Wait for regular group conversion to be completed. +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note ADC conversion flags EOS (end of sequence) and EOC (end of +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * conversion) are cleared by this function, with an exception: +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * if low power feature "LowPowerAutoWait" is enabled, flags are +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * not cleared to not interfere with this feature until data register +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * is read using function HAL_ADC_GetValue(). +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function cannot be used in a particular setup: ADC configured +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in DMA mode and polling for end of each conversion (ADC init +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV). +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * In this case, DMA resets the flag EOC and polling cannot be +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * performed on each conversion. Nevertheless, polling can still +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * be performed on the complete sequence (ADC init +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV). +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Timeout Timeout value in millisecond. +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart; +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_Flag_EOC; +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If end of conversion selected to end of sequence */ +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_Flag_EOC = ADC_FLAG_EOS; +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If end of conversion selected to end of each conversion */ +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else /* ADC_EOC_SINGLE_CONV */ +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification that ADC configuration is compliant with polling for */ +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* each conversion: */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Particular case is ADC configured in DMA mode and ADC sequencer with */ +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* several ranks and polling for end of each conversion. */ +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* For code simplicity sake, this particular case is generalized to */ +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC configured in DMA mode and and polling for end of each conversion. */ +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS); +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 22 + + +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait until End of Conversion flag is raised */ +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to timeout */ +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_TIMEOUT; +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine */ +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ + ARM GAS /tmp/ccPDyDzP.s page 23 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear end of conversion flag of regular group if low power feature */ +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* until data register is read using function HAL_ADC_GetValue(). */ +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoWait == DISABLE) +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag */ +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Poll for conversion event. +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param EventType the ADC event type. +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg ADC_AWD_EVENT: ADC Analog watchdog event +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg ADC_OVR_EVENT: ADC Overrun event +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Timeout Timeout value in millisecond. +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeou +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0; +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EVENT_TYPE(EventType)); +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check selected event flag */ +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to timeout */ +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ + ARM GAS /tmp/ccPDyDzP.s page 24 + + +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_TIMEOUT; +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch(EventType) +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Analog watchdog (level out of window) event */ +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case ADC_AWD_EVENT: +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Overrun event */ +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default: /* Case ADC_OVR_EVENT */ +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If overrun is set to overwrite previous data, overrun event is not */ +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* considered as an error. */ +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun ") */ +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to overrun */ +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC Overrun flag */ +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group with interruption. +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - EOC (end of conversion of regular group) or EOS (end of +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * sequence of regular group) depending on ADC initialization +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - overrun (if available) +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + ARM GAS /tmp/ccPDyDzP.s page 25 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC end of conversion interrupt */ +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC overrun interrupt */ +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch(hadc->Init.EOCSelection) +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case ADC_EOC_SEQ_CONV: +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default: +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ + ARM GAS /tmp/ccPDyDzP.s page 26 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable interruption of +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * end-of-conversion, disable ADC peripheral. +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of conversion interrupt for regular group */ +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC overrun interrupt */ +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 27 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group and transfers result +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * through DMA. +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - DMA transfer complete +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - DMA half transfer +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - overrun +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param pData The destination Buffer address. +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Length The length of data to be transferred from ADC peripheral to memory. +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA transfer complete callback */ + ARM GAS /tmp/ccPDyDzP.s page 28 + + +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA half transfer complete callback */ +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA error callback */ +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* start (in case of SW start): */ +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC overrun interrupt */ +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC DMA mode */ +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start the DMA channel */ +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC peripheral. +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ + ARM GAS /tmp/ccPDyDzP.s page 29 + + +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN; +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop while */ +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* while DMA transfer is on going) */ +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY) +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if DMA channel effectively disabled */ +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_OK) +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC overrun interrupt */ +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */ +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* in memory a potential failing status. */ +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_Disable(hadc); +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 30 + + +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Get ADC regular group conversion result. +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Reading register DR automatically clears ADC flag EOC +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC group regular end of unitary conversion). +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function does not clear ADC flag EOS +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC group regular end of sequence conversion). +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Occurrence of flag EOS rising: +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - If sequencer is composed of 1 rank, flag EOS is equivalent +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * to flag EOC. +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - If sequencer is composed of several ranks, during the scan +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * sequence flag EOC only is raised, at the end of the scan sequence +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * both flags EOC and EOS are raised. +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * To clear this flag, either use function: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * model polling: @ref HAL_ADC_PollForConversion() +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval ADC group regular conversion data +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: EOC flag is not cleared here by software because automatically */ +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* cleared by hardware when reading register DR. */ +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC converted value */ +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->Instance->DR; +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Handles ADC interrupt request. +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_isr = hadc->Instance->ISR; +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check End of Conversion flag for regular group ========== */ +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( (((tmp_isr & ADC_FLAG_EOC) == ADC_FLAG_EOC) && ((tmp_ier & ADC_IT_EOC) == ADC_IT_EOC)) || +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 31 + + +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: into callback, to determine if conversion has been triggered */ +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* from EOC or EOS, possibility to use: */ +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */ +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback(hadc); +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag */ +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */ +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion flags clear induces the release of the preserved data.*/ +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Therefore, if the preserved data value is needed, it must be */ +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* read preliminarily into HAL_ADC_ConvCpltCallback(). */ +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check Analog watchdog flags ========== */ +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(((tmp_isr & ADC_FLAG_AWD) == ADC_FLAG_AWD) && ((tmp_ier & ADC_IT_AWD) == ADC_IT_AWD)) +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + ARM GAS /tmp/ccPDyDzP.s page 32 + + +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback(hadc); +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_LevelOutOfWindowCallback(hadc); +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC Analog watchdog flag */ +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check Overrun flag ========== */ +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(((tmp_isr & ADC_FLAG_OVR) == ADC_FLAG_OVR) && ((tmp_ier & ADC_IT_OVR) == ADC_IT_OVR)) +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If overrun is set to overwrite previous data (default setting), */ +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun event is not considered as an error. */ +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun ") */ +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Exception for usage with DMA overrun event always considered as an */ +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* error. */ +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) || +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to overrun */ +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC overrun flag */ +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback(hadc); +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the Overrun flag */ +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Conversion complete callback in non blocking mode +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, + ARM GAS /tmp/ccPDyDzP.s page 33 + + +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ConvCpltCallback must be implemented in the user file. +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Conversion DMA half-transfer callback in non blocking mode +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Analog watchdog callback in non blocking mode. +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file. +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief ADC error callback in non blocking mode +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC conversion with interruption or transfer by DMA) +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ErrorCallback must be implemented in the user file. +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Peripheral Control functions + ARM GAS /tmp/ccPDyDzP.s page 34 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Peripheral Control functions ##### +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to: +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Configure channels on regular group +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Configure the analog watchdog +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Configures the the selected channel to be linked to the regular +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * group. +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note In case of usage of internal measurement channels: +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * VrefInt/Vbat/TempSensor. +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Sampling time constraints must be respected (sampling time can be +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * adjusted in function of ADC clock frequency and sampling time +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * setting). +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Refer to device datasheet for timings values, parameters TS_vrefint, +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * TS_vbat, TS_temp (values rough order: 5us to 17us). +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * These internal paths can be be disabled using function +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * HAL_ADC_DeInit(). +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes channel into regular group, following +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_ChannelConfTypeDef" on the fly, without resetting +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the ADC. +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_ChannelConfTypeDef". +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param sConfig Structure of ADC channel for regular group. +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(sConfig->Channel)); +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANK(sConfig->Rank)); +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ + ARM GAS /tmp/ccPDyDzP.s page 35 + + +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion on going on regular group: */ +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Channel number */ +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Channel sampling time */ +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configure channel: depending on rank setting, add it or remove it from */ +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC conversion sequencer. */ +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->Rank != ADC_RANK_NONE) +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Regular sequence configuration */ +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the channel selection register from the selected channel */ +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel); +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (obsolete): sampling time set in this function with */ +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameter "SamplingTime" (obsolete) only if not already set into */ +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC initialization structure with parameter "SamplingTimeCommon". */ +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Modify sampling time if needed (not needed in case of recurrence */ +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* for several channels programmed consecutively into the sequencer) */ +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc)) +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the old sample time */ +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the new sample time */ +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime); +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* internal measurement paths enable: If internal channel selected, */ +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enable dedicated internal buffers and path. */ +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: these internal measurement paths can be disabled using */ +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_ADC_DeInit() or removing the channel from sequencer with */ +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channel configuration parameter "Rank". */ +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_16 is selected, enable Temp. sensor measurement path. */ +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_17 is selected, enable VREFINT measurement path. */ +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_18 is selected, enable VBAT measurement path. */ +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Temp. sensor is selected, wait for stabilization delay */ +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time */ +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */ +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index--; +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 36 + + +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Regular sequence configuration */ +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset the channel selection register from the selected channel */ +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel); +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* internal measurement paths disable: If internal channel selected, */ +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* disable dedicated internal buffers and path. */ +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_16 is selected, disable Temp. sensor measurement path. */ +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_17 is selected, disable VREFINT measurement path. */ +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_18 is selected, disable VBAT measurement path. */ +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update on regular */ +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channel could be done on neither of the channel configuration structure */ +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameters. */ +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Configures the analog watchdog. +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes the selected analog watchdog, following +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the ADC. +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_AnalogWDGConfTypeDef". +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param AnalogWDGConfig Structure of ADC analog watchdog configuration +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* Analog + ARM GAS /tmp/ccPDyDzP.s page 37 + + +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDHighThresholdShifted; +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDLowThresholdShifted; +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verify if threshold is within the selected ADC resolution */ +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion on going on regular group: */ +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Analog watchdog channels */ +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Analog watchdog thresholds */ +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of analog watchdog: */ +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set the analog watchdog enable mode: one or overall group of */ +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channels. */ +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set the Analog watchdog channel (is not used if watchdog */ +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* mode "all channels": ADC_CFGR_AWD1SGL=0). */ +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL | +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDCH ); +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode | +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Shift the offset in function of the selected ADC resolution: Thresholds*/ +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThre +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the high and low thresholds */ +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the ADC Analog watchdog flag (in case of left enabled by */ +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* or HAL_ADC_PollForEvent(). */ +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD); +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 38 + + +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configure ADC Analog watchdog interrupt */ +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(AnalogWDGConfig->ITMode == ENABLE) +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC Analog watchdog interrupt */ +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC Analog watchdog interrupt */ +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update could be done */ +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* on neither of the AWD configuration structure parameters. */ +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Peripheral State functions +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Peripheral State and Errors functions ##### +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This subsection provides functions to get in run-time the status of the +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** peripheral. +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Check the ADC state +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Check the ADC error code +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Return the ADC state +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note ADC state machine is managed by bitfields, ADC status must be + ARM GAS /tmp/ccPDyDzP.s page 39 + + +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * compared with states bits. +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For example: +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) " +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) " +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL state +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc) +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->State; +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Return the ADC error code +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval ADC Error Code +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->ErrorCode; +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enable the selected ADC. +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC must be disabled +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * and voltage regulator must be enabled (done into HAL_ADC_Init()). +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note If low power mode AutoPowerOff is enabled, power-on/off phases are +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * performed automatically by hardware. +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * In this mode, this function is useless and must not be called because +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * flag ADC_FLAG_RDY is not usable. +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Therefore, this function must be called under condition of +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ + ARM GAS /tmp/ccPDyDzP.s page 40 + + +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enabling phase not yet completed: flag ADC ready not yet set). */ +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* causes: ADC clock not running, ...). */ +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET) +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if conditions to enable the ADC are fulfilled */ +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_ENABLING_CONDITIONS(hadc) == RESET) +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE(hadc); +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for ADC stabilization time */ +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */ +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index--; +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for ADC effectively enabled */ +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Disable the selected ADC. + ARM GAS /tmp/ccPDyDzP.s page 41 + + +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * stopped. +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification if ADC is not already disabled: */ +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* disabled. */ +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) != RESET) +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if conditions to disable the ADC are fulfilled */ +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_DISABLING_CONDITIONS(hadc) != RESET) +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC peripheral */ +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE(hadc); +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for ADC effectively disabled */ +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 42 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion. +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * stopped to disable the ADC. +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc) +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 27 .loc 1 2323 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 .loc 1 2323 1 is_stmt 0 view .LVU1 + 32 0000 70B5 push {r4, r5, r6, lr} + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 4, -16 + 35 .cfi_offset 5, -12 + 36 .cfi_offset 6, -8 + 37 .cfi_offset 14, -4 + 38 0002 0400 movs r4, r0 +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 39 .loc 1 2324 3 is_stmt 1 view .LVU2 + 40 .LVL1: +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 41 .loc 1 2327 3 view .LVU3 +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification if ADC is not already stopped on regular group to bypass */ +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* this function if not needed. */ +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) + 42 .loc 1 2331 3 view .LVU4 + 43 .loc 1 2331 7 is_stmt 0 view .LVU5 + 44 0004 0268 ldr r2, [r0] + 45 0006 9368 ldr r3, [r2, #8] + 46 .loc 1 2331 6 view .LVU6 + 47 0008 5B07 lsls r3, r3, #29 + 48 000a 25D5 bpl .L6 +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop potential conversion on going on regular group */ +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && + 49 .loc 1 2336 5 is_stmt 1 view .LVU7 + 50 .loc 1 2336 9 is_stmt 0 view .LVU8 + 51 000c 9368 ldr r3, [r2, #8] + 52 .loc 1 2336 8 view .LVU9 + 53 000e 5B07 lsls r3, r3, #29 + 54 0010 06D5 bpl .L3 +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + 55 .loc 1 2337 9 view .LVU10 + 56 0012 9368 ldr r3, [r2, #8] +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + 57 .loc 1 2336 60 discriminator 1 view .LVU11 + ARM GAS /tmp/ccPDyDzP.s page 43 + + + 58 0014 9B07 lsls r3, r3, #30 + 59 0016 03D4 bmi .L3 +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop conversions on regular group */ +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTP; + 60 .loc 1 2340 7 is_stmt 1 view .LVU12 + 61 .loc 1 2340 21 is_stmt 0 view .LVU13 + 62 0018 9368 ldr r3, [r2, #8] + 63 .loc 1 2340 26 view .LVU14 + 64 001a 1021 movs r1, #16 + 65 001c 0B43 orrs r3, r1 + 66 001e 9360 str r3, [r2, #8] + 67 .L3: +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for conversion effectively stopped */ +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); + 68 .loc 1 2345 5 is_stmt 1 view .LVU15 + 69 .loc 1 2345 17 is_stmt 0 view .LVU16 + 70 0020 FFF7FEFF bl HAL_GetTick + 71 .LVL2: + 72 .loc 1 2345 17 view .LVU17 + 73 0024 0500 movs r5, r0 + 74 .LVL3: +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 75 .loc 1 2347 5 is_stmt 1 view .LVU18 + 76 .L4: + 77 .loc 1 2347 49 view .LVU19 + 78 .loc 1 2347 16 is_stmt 0 view .LVU20 + 79 0026 2368 ldr r3, [r4] + 80 .loc 1 2347 26 view .LVU21 + 81 0028 9B68 ldr r3, [r3, #8] + 82 .loc 1 2347 49 view .LVU22 + 83 002a 5B07 lsls r3, r3, #29 + 84 002c 12D5 bpl .L10 +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) + 85 .loc 1 2349 7 is_stmt 1 view .LVU23 + 86 .loc 1 2349 11 is_stmt 0 view .LVU24 + 87 002e FFF7FEFF bl HAL_GetTick + 88 .LVL4: + 89 .loc 1 2349 25 discriminator 1 view .LVU25 + 90 0032 401B subs r0, r0, r5 + 91 .loc 1 2349 9 discriminator 1 view .LVU26 + 92 0034 0228 cmp r0, #2 + 93 0036 F6D9 bls .L4 +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 94 .loc 1 2352 9 is_stmt 1 view .LVU27 + 95 .loc 1 2352 17 is_stmt 0 view .LVU28 + 96 0038 2368 ldr r3, [r4] + 97 .loc 1 2352 27 view .LVU29 + 98 003a 9B68 ldr r3, [r3, #8] + 99 .loc 1 2352 11 view .LVU30 + ARM GAS /tmp/ccPDyDzP.s page 44 + + + 100 003c 5B07 lsls r3, r3, #29 + 101 003e F2D5 bpl .L4 +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 102 .loc 1 2355 11 is_stmt 1 view .LVU31 + 103 0040 A36B ldr r3, [r4, #56] + 104 0042 1022 movs r2, #16 + 105 0044 1343 orrs r3, r2 + 106 0046 A363 str r3, [r4, #56] +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 107 .loc 1 2358 11 view .LVU32 + 108 0048 E36B ldr r3, [r4, #60] + 109 004a 0F3A subs r2, r2, #15 + 110 004c 1343 orrs r3, r2 + 111 004e E363 str r3, [r4, #60] +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 112 .loc 1 2360 11 view .LVU33 + 113 .loc 1 2360 18 is_stmt 0 view .LVU34 + 114 0050 0120 movs r0, #1 + 115 0052 02E0 b .L2 + 116 .L10: +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; + 117 .loc 1 2367 10 view .LVU35 + 118 0054 0020 movs r0, #0 + 119 0056 00E0 b .L2 + 120 .LVL5: + 121 .L6: + 122 .loc 1 2367 10 view .LVU36 + 123 0058 0020 movs r0, #0 + 124 .LVL6: + 125 .L2: +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 126 .loc 1 2368 1 view .LVU37 + 127 @ sp needed + 128 .LVL7: + 129 .loc 1 2368 1 view .LVU38 + 130 005a 70BD pop {r4, r5, r6, pc} + 131 .cfi_endproc + 132 .LFE64: + 134 .section .text.ADC_Disable,"ax",%progbits + 135 .align 1 + 136 .syntax unified + 137 .code 16 + 138 .thumb_func + 140 ADC_Disable: + 141 .LVL8: + 142 .LFB63: + ARM GAS /tmp/ccPDyDzP.s page 45 + + +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 143 .loc 1 2262 1 is_stmt 1 view -0 + 144 .cfi_startproc + 145 @ args = 0, pretend = 0, frame = 0 + 146 @ frame_needed = 0, uses_anonymous_args = 0 +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 147 .loc 1 2262 1 is_stmt 0 view .LVU40 + 148 0000 70B5 push {r4, r5, r6, lr} + 149 .cfi_def_cfa_offset 16 + 150 .cfi_offset 4, -16 + 151 .cfi_offset 5, -12 + 152 .cfi_offset 6, -8 + 153 .cfi_offset 14, -4 + 154 0002 0400 movs r4, r0 +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 155 .loc 1 2263 3 is_stmt 1 view .LVU41 + 156 .LVL9: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 157 .loc 1 2268 3 view .LVU42 +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 158 .loc 1 2268 7 is_stmt 0 view .LVU43 + 159 0004 0268 ldr r2, [r0] + 160 0006 9168 ldr r1, [r2, #8] + 161 0008 0323 movs r3, #3 + 162 000a 0B40 ands r3, r1 + 163 000c 012B cmp r3, #1 + 164 000e 01D0 beq .L21 +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 165 .loc 1 2311 10 view .LVU44 + 166 0010 0020 movs r0, #0 + 167 .LVL10: + 168 .L12: +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 169 .loc 1 2312 1 view .LVU45 + 170 @ sp needed + 171 .LVL11: +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 172 .loc 1 2312 1 view .LVU46 + 173 0012 70BD pop {r4, r5, r6, pc} + 174 .LVL12: + 175 .L21: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 176 .loc 1 2268 7 discriminator 1 view .LVU47 + 177 0014 1368 ldr r3, [r2] + 178 0016 DB07 lsls r3, r3, #31 + 179 0018 02D4 bmi .L13 +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 180 .loc 1 2268 7 discriminator 4 view .LVU48 + 181 001a D368 ldr r3, [r2, #12] + 182 001c 1B04 lsls r3, r3, #16 + 183 001e 31D5 bpl .L18 + 184 .L13: +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 185 .loc 1 2271 5 is_stmt 1 view .LVU49 +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 186 .loc 1 2271 9 is_stmt 0 view .LVU50 + 187 0020 9168 ldr r1, [r2, #8] + ARM GAS /tmp/ccPDyDzP.s page 46 + + + 188 0022 0523 movs r3, #5 + 189 0024 0B40 ands r3, r1 +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 190 .loc 1 2271 8 view .LVU51 + 191 0026 012B cmp r3, #1 + 192 0028 09D0 beq .L22 +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 193 .loc 1 2279 7 is_stmt 1 view .LVU52 + 194 002a A36B ldr r3, [r4, #56] + 195 002c 1022 movs r2, #16 + 196 002e 1343 orrs r3, r2 + 197 0030 A363 str r3, [r4, #56] +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 198 .loc 1 2282 7 view .LVU53 + 199 0032 E36B ldr r3, [r4, #60] + 200 0034 0F3A subs r2, r2, #15 + 201 0036 1343 orrs r3, r2 + 202 0038 E363 str r3, [r4, #60] +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 203 .loc 1 2284 7 view .LVU54 +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 204 .loc 1 2284 14 is_stmt 0 view .LVU55 + 205 003a 0120 movs r0, #1 + 206 .LVL13: +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 207 .loc 1 2284 14 view .LVU56 + 208 003c E9E7 b .L12 + 209 .LVL14: + 210 .L22: +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 211 .loc 1 2274 7 is_stmt 1 view .LVU57 +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 212 .loc 1 2274 7 view .LVU58 + 213 003e 9368 ldr r3, [r2, #8] + 214 0040 0221 movs r1, #2 + 215 0042 0B43 orrs r3, r1 + 216 0044 9360 str r3, [r2, #8] +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 217 .loc 1 2274 7 view .LVU59 + 218 0046 2368 ldr r3, [r4] + 219 0048 0322 movs r2, #3 + 220 004a 1A60 str r2, [r3] +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 221 .loc 1 2274 7 view .LVU60 +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 222 .loc 1 2289 5 view .LVU61 +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 223 .loc 1 2289 17 is_stmt 0 view .LVU62 + 224 004c FFF7FEFF bl HAL_GetTick + 225 .LVL15: +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 226 .loc 1 2289 17 view .LVU63 + 227 0050 0500 movs r5, r0 + 228 .LVL16: +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 229 .loc 1 2291 5 is_stmt 1 view .LVU64 + 230 .L15: + ARM GAS /tmp/ccPDyDzP.s page 47 + + +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 231 .loc 1 2291 11 view .LVU65 + 232 0052 2368 ldr r3, [r4] + 233 0054 9B68 ldr r3, [r3, #8] + 234 0056 DB07 lsls r3, r3, #31 + 235 0058 12D5 bpl .L23 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 236 .loc 1 2293 7 view .LVU66 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 237 .loc 1 2293 11 is_stmt 0 view .LVU67 + 238 005a FFF7FEFF bl HAL_GetTick + 239 .LVL17: +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 240 .loc 1 2293 25 discriminator 1 view .LVU68 + 241 005e 401B subs r0, r0, r5 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 242 .loc 1 2293 9 discriminator 1 view .LVU69 + 243 0060 0228 cmp r0, #2 + 244 0062 F6D9 bls .L15 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 245 .loc 1 2296 9 is_stmt 1 view .LVU70 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 246 .loc 1 2296 12 is_stmt 0 view .LVU71 + 247 0064 2368 ldr r3, [r4] + 248 0066 9B68 ldr r3, [r3, #8] +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 249 .loc 1 2296 11 view .LVU72 + 250 0068 DB07 lsls r3, r3, #31 + 251 006a F2D5 bpl .L15 +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 252 .loc 1 2299 11 is_stmt 1 view .LVU73 + 253 006c A36B ldr r3, [r4, #56] + 254 006e 1022 movs r2, #16 + 255 0070 1343 orrs r3, r2 + 256 0072 A363 str r3, [r4, #56] +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 257 .loc 1 2302 11 view .LVU74 + 258 0074 E36B ldr r3, [r4, #60] + 259 0076 0F3A subs r2, r2, #15 + 260 0078 1343 orrs r3, r2 + 261 007a E363 str r3, [r4, #60] +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 262 .loc 1 2304 11 view .LVU75 +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 263 .loc 1 2304 18 is_stmt 0 view .LVU76 + 264 007c 0120 movs r0, #1 + 265 007e C8E7 b .L12 + 266 .L23: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 267 .loc 1 2311 10 view .LVU77 + 268 0080 0020 movs r0, #0 + 269 0082 C6E7 b .L12 + 270 .LVL18: + 271 .L18: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 272 .loc 1 2311 10 view .LVU78 + 273 0084 0020 movs r0, #0 + ARM GAS /tmp/ccPDyDzP.s page 48 + + + 274 .LVL19: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 275 .loc 1 2311 10 view .LVU79 + 276 0086 C4E7 b .L12 + 277 .cfi_endproc + 278 .LFE63: + 280 .global __aeabi_uidiv + 281 .section .text.ADC_Enable,"ax",%progbits + 282 .align 1 + 283 .syntax unified + 284 .code 16 + 285 .thumb_func + 287 ADC_Enable: + 288 .LVL20: + 289 .LFB62: +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 290 .loc 1 2194 1 is_stmt 1 view -0 + 291 .cfi_startproc + 292 @ args = 0, pretend = 0, frame = 8 + 293 @ frame_needed = 0, uses_anonymous_args = 0 +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 294 .loc 1 2194 1 is_stmt 0 view .LVU81 + 295 0000 30B5 push {r4, r5, lr} + 296 .cfi_def_cfa_offset 12 + 297 .cfi_offset 4, -12 + 298 .cfi_offset 5, -8 + 299 .cfi_offset 14, -4 + 300 0002 83B0 sub sp, sp, #12 + 301 .cfi_def_cfa_offset 24 + 302 0004 0400 movs r4, r0 +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 303 .loc 1 2195 3 is_stmt 1 view .LVU82 + 304 .LVL21: +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 305 .loc 1 2196 3 view .LVU83 +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 306 .loc 1 2196 17 is_stmt 0 view .LVU84 + 307 0006 0023 movs r3, #0 + 308 0008 0193 str r3, [sp, #4] +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 309 .loc 1 2202 3 is_stmt 1 view .LVU85 +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 310 .loc 1 2202 7 is_stmt 0 view .LVU86 + 311 000a 0368 ldr r3, [r0] + 312 000c 9968 ldr r1, [r3, #8] + 313 000e 0322 movs r2, #3 + 314 0010 0A40 ands r2, r1 + 315 0012 012A cmp r2, #1 + 316 0014 14D0 beq .L35 + 317 .L25: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 318 .loc 1 2205 5 is_stmt 1 view .LVU87 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 319 .loc 1 2205 9 is_stmt 0 view .LVU88 + 320 0016 9968 ldr r1, [r3, #8] + 321 0018 224A ldr r2, .L39 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccPDyDzP.s page 49 + + + 322 .loc 1 2205 8 view .LVU89 + 323 001a 1142 tst r1, r2 + 324 001c 18D1 bne .L36 +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 325 .loc 1 2217 5 is_stmt 1 view .LVU90 + 326 001e 9A68 ldr r2, [r3, #8] + 327 0020 0121 movs r1, #1 + 328 0022 0A43 orrs r2, r1 + 329 0024 9A60 str r2, [r3, #8] +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 330 .loc 1 2221 5 view .LVU91 +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 331 .loc 1 2221 42 is_stmt 0 view .LVU92 + 332 0026 204B ldr r3, .L39+4 + 333 0028 1868 ldr r0, [r3] + 334 .LVL22: +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 335 .loc 1 2221 42 view .LVU93 + 336 002a 2049 ldr r1, .L39+8 + 337 002c FFF7FEFF bl __aeabi_uidiv + 338 .LVL23: +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 339 .loc 1 2221 21 view .LVU94 + 340 0030 0190 str r0, [sp, #4] +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 341 .loc 1 2222 5 is_stmt 1 view .LVU95 + 342 .L28: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 343 .loc 1 2222 27 view .LVU96 + 344 0032 019B ldr r3, [sp, #4] + 345 0034 002B cmp r3, #0 + 346 0036 15D0 beq .L37 +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 347 .loc 1 2224 7 view .LVU97 +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 348 .loc 1 2224 22 is_stmt 0 view .LVU98 + 349 0038 019B ldr r3, [sp, #4] + 350 003a 013B subs r3, r3, #1 + 351 003c 0193 str r3, [sp, #4] + 352 003e F8E7 b .L28 + 353 .LVL24: + 354 .L35: +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 355 .loc 1 2202 7 discriminator 1 view .LVU99 + 356 0040 1A68 ldr r2, [r3] + 357 0042 D207 lsls r2, r2, #31 + 358 0044 2BD4 bmi .L32 +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 359 .loc 1 2202 7 discriminator 4 view .LVU100 + 360 0046 DA68 ldr r2, [r3, #12] + 361 0048 1204 lsls r2, r2, #16 + 362 004a E4D5 bpl .L25 +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 363 .loc 1 2251 10 view .LVU101 + 364 004c 0020 movs r0, #0 + 365 .LVL25: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 50 + + + 366 .loc 1 2251 10 view .LVU102 + 367 004e 24E0 b .L26 + 368 .LVL26: + 369 .L36: +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 370 .loc 1 2208 7 is_stmt 1 view .LVU103 + 371 0050 A36B ldr r3, [r4, #56] + 372 0052 1022 movs r2, #16 + 373 0054 1343 orrs r3, r2 + 374 0056 A363 str r3, [r4, #56] +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 375 .loc 1 2211 7 view .LVU104 + 376 0058 E36B ldr r3, [r4, #60] + 377 005a 0F3A subs r2, r2, #15 + 378 005c 1343 orrs r3, r2 + 379 005e E363 str r3, [r4, #60] +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 380 .loc 1 2213 7 view .LVU105 +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 381 .loc 1 2213 14 is_stmt 0 view .LVU106 + 382 0060 0120 movs r0, #1 + 383 .LVL27: +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 384 .loc 1 2213 14 view .LVU107 + 385 0062 1AE0 b .L26 + 386 .L37: +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 387 .loc 1 2228 5 is_stmt 1 view .LVU108 +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 388 .loc 1 2228 17 is_stmt 0 view .LVU109 + 389 0064 FFF7FEFF bl HAL_GetTick + 390 .LVL28: + 391 0068 0500 movs r5, r0 + 392 .LVL29: +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 393 .loc 1 2231 5 is_stmt 1 view .LVU110 + 394 .L30: +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 395 .loc 1 2231 50 view .LVU111 +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 396 .loc 1 2231 11 is_stmt 0 view .LVU112 + 397 006a 2368 ldr r3, [r4] + 398 006c 1B68 ldr r3, [r3] +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 399 .loc 1 2231 50 view .LVU113 + 400 006e DB07 lsls r3, r3, #31 + 401 0070 12D4 bmi .L38 +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 402 .loc 1 2233 7 is_stmt 1 view .LVU114 +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 403 .loc 1 2233 11 is_stmt 0 view .LVU115 + 404 0072 FFF7FEFF bl HAL_GetTick + 405 .LVL30: +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 406 .loc 1 2233 25 discriminator 1 view .LVU116 + 407 0076 401B subs r0, r0, r5 +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccPDyDzP.s page 51 + + + 408 .loc 1 2233 9 discriminator 1 view .LVU117 + 409 0078 0228 cmp r0, #2 + 410 007a F6D9 bls .L30 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 411 .loc 1 2236 9 is_stmt 1 view .LVU118 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 412 .loc 1 2236 12 is_stmt 0 view .LVU119 + 413 007c 2368 ldr r3, [r4] + 414 007e 1B68 ldr r3, [r3] +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 415 .loc 1 2236 11 view .LVU120 + 416 0080 DB07 lsls r3, r3, #31 + 417 0082 F2D4 bmi .L30 +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 418 .loc 1 2239 11 is_stmt 1 view .LVU121 + 419 0084 A36B ldr r3, [r4, #56] + 420 0086 1022 movs r2, #16 + 421 0088 1343 orrs r3, r2 + 422 008a A363 str r3, [r4, #56] +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 423 .loc 1 2242 11 view .LVU122 + 424 008c E36B ldr r3, [r4, #60] + 425 008e 0F3A subs r2, r2, #15 + 426 0090 1343 orrs r3, r2 + 427 0092 E363 str r3, [r4, #60] +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 428 .loc 1 2244 11 view .LVU123 +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 429 .loc 1 2244 18 is_stmt 0 view .LVU124 + 430 0094 0120 movs r0, #1 + 431 0096 00E0 b .L26 + 432 .L38: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 433 .loc 1 2251 10 view .LVU125 + 434 0098 0020 movs r0, #0 + 435 .LVL31: + 436 .L26: +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 437 .loc 1 2252 1 view .LVU126 + 438 009a 03B0 add sp, sp, #12 + 439 @ sp needed + 440 .LVL32: +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 441 .loc 1 2252 1 view .LVU127 + 442 009c 30BD pop {r4, r5, pc} + 443 .LVL33: + 444 .L32: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 445 .loc 1 2251 10 view .LVU128 + 446 009e 0020 movs r0, #0 + 447 .LVL34: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 448 .loc 1 2251 10 view .LVU129 + 449 00a0 FBE7 b .L26 + 450 .L40: + 451 00a2 C046 .align 2 + 452 .L39: + ARM GAS /tmp/ccPDyDzP.s page 52 + + + 453 00a4 17000080 .word -2147483625 + 454 00a8 00000000 .word SystemCoreClock + 455 00ac 40420F00 .word 1000000 + 456 .cfi_endproc + 457 .LFE62: + 459 .section .text.HAL_ADC_MspInit,"ax",%progbits + 460 .align 1 + 461 .weak HAL_ADC_MspInit + 462 .syntax unified + 463 .code 16 + 464 .thumb_func + 466 HAL_ADC_MspInit: + 467 .LVL35: + 468 .LFB42: + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 469 .loc 1 766 1 is_stmt 1 view -0 + 470 .cfi_startproc + 471 @ args = 0, pretend = 0, frame = 0 + 472 @ frame_needed = 0, uses_anonymous_args = 0 + 473 @ link register save eliminated. + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 474 .loc 1 768 3 view .LVU131 + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 475 .loc 1 773 1 is_stmt 0 view .LVU132 + 476 @ sp needed + 477 0000 7047 bx lr + 478 .cfi_endproc + 479 .LFE42: + 481 .section .text.HAL_ADC_Init,"ax",%progbits + 482 .align 1 + 483 .global HAL_ADC_Init + 484 .syntax unified + 485 .code 16 + 486 .thumb_func + 488 HAL_ADC_Init: + 489 .LVL36: + 490 .LFB40: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 491 .loc 1 398 1 is_stmt 1 view -0 + 492 .cfi_startproc + 493 @ args = 0, pretend = 0, frame = 0 + 494 @ frame_needed = 0, uses_anonymous_args = 0 + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 495 .loc 1 398 1 is_stmt 0 view .LVU134 + 496 0000 70B5 push {r4, r5, r6, lr} + 497 .cfi_def_cfa_offset 16 + 498 .cfi_offset 4, -16 + 499 .cfi_offset 5, -12 + 500 .cfi_offset 6, -8 + 501 .cfi_offset 14, -4 + 502 0002 041E subs r4, r0, #0 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U; + 503 .loc 1 399 3 is_stmt 1 view .LVU135 + 504 .LVL37: + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 505 .loc 1 400 3 view .LVU136 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccPDyDzP.s page 53 + + + 506 .loc 1 403 3 view .LVU137 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 507 .loc 1 403 5 is_stmt 0 view .LVU138 + 508 0004 00D1 bne .LCB451 + 509 0006 B4E0 b .L56 @long jump + 510 .LCB451: + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); + 511 .loc 1 409 3 is_stmt 1 view .LVU139 + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); + 512 .loc 1 410 3 view .LVU140 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); + 513 .loc 1 411 3 view .LVU141 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); + 514 .loc 1 412 3 view .LVU142 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + 515 .loc 1 413 3 view .LVU143 + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); + 516 .loc 1 414 3 view .LVU144 + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); + 517 .loc 1 415 3 view .LVU145 + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); + 518 .loc 1 416 3 view .LVU146 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); + 519 .loc 1 417 3 view .LVU147 + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + 520 .loc 1 418 3 view .LVU148 + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); + 521 .loc 1 419 3 view .LVU149 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); + 522 .loc 1 420 3 view .LVU150 + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); + 523 .loc 1 421 3 view .LVU151 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 524 .loc 1 422 3 view .LVU152 + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 525 .loc 1 432 3 view .LVU153 + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 526 .loc 1 432 11 is_stmt 0 view .LVU154 + 527 0008 836B ldr r3, [r0, #56] + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 528 .loc 1 432 6 view .LVU155 + 529 000a 002B cmp r3, #0 + 530 000c 00D1 bne .LCB469 + 531 000e 80E0 b .L61 @long jump + 532 .LCB469: + 533 .LVL38: + 534 .L44: + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 535 .loc 1 465 3 is_stmt 1 view .LVU156 + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 536 .loc 1 465 7 is_stmt 0 view .LVU157 + 537 0010 A36B ldr r3, [r4, #56] + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 538 .loc 1 465 6 view .LVU158 + 539 0012 DB06 lsls r3, r3, #27 + 540 0014 00D5 bpl .LCB477 + 541 0016 A6E0 b .L45 @long jump + ARM GAS /tmp/ccPDyDzP.s page 54 + + + 542 .LCB477: + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 543 .loc 1 467 8 view .LVU159 + 544 0018 2368 ldr r3, [r4] + 545 001a 9A68 ldr r2, [r3, #8] + 546 001c 0421 movs r1, #4 + 547 001e 0800 movs r0, r1 + 548 0020 1040 ands r0, r2 + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) + 549 .loc 1 466 65 view .LVU160 + 550 0022 1142 tst r1, r2 + 551 0024 00D0 beq .LCB484 + 552 0026 9EE0 b .L45 @long jump + 553 .LCB484: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 554 .loc 1 470 5 is_stmt 1 view .LVU161 + 555 0028 A26B ldr r2, [r4, #56] + 556 002a 5349 ldr r1, .L66 + 557 002c 0A40 ands r2, r1 + 558 002e 0631 adds r1, r1, #6 + 559 0030 FF31 adds r1, r1, #255 + 560 0032 0A43 orrs r2, r1 + 561 0034 A263 str r2, [r4, #56] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 562 .loc 1 479 5 view .LVU162 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 563 .loc 1 479 9 is_stmt 0 view .LVU163 + 564 0036 9968 ldr r1, [r3, #8] + 565 0038 0322 movs r2, #3 + 566 003a 0A40 ands r2, r1 + 567 003c 012A cmp r2, #1 + 568 003e 6ED0 beq .L62 + 569 .L46: + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_RES , + 570 .loc 1 490 7 is_stmt 1 view .LVU164 + 571 0040 DA68 ldr r2, [r3, #12] + 572 0042 1821 movs r1, #24 + 573 0044 8A43 bics r2, r1 + 574 0046 A168 ldr r1, [r4, #8] + 575 0048 0A43 orrs r2, r1 + 576 004a DA60 str r2, [r3, #12] + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR2_CKMODE , + 577 .loc 1 496 7 view .LVU165 + 578 004c 2268 ldr r2, [r4] + 579 004e 1369 ldr r3, [r2, #16] + 580 0050 9B00 lsls r3, r3, #2 + 581 0052 9B08 lsrs r3, r3, #2 + 582 0054 6168 ldr r1, [r4, #4] + 583 0056 0B43 orrs r3, r1 + 584 0058 1361 str r3, [r2, #16] + 585 .L47: + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 586 .loc 1 513 5 view .LVU166 + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 587 .loc 1 513 9 is_stmt 0 view .LVU167 + 588 005a 2268 ldr r2, [r4] + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + ARM GAS /tmp/ccPDyDzP.s page 55 + + + 589 .loc 1 513 19 view .LVU168 + 590 005c D368 ldr r3, [r2, #12] + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 591 .loc 1 513 27 view .LVU169 + 592 005e 4749 ldr r1, .L66+4 + 593 0060 0B40 ands r3, r1 + 594 0062 D360 str r3, [r2, #12] + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 595 .loc 1 524 5 is_stmt 1 view .LVU170 + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 596 .loc 1 524 18 is_stmt 0 view .LVU171 + 597 0064 237E ldrb r3, [r4, #24] + 598 0066 9B03 lsls r3, r3, #14 + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 599 .loc 1 525 18 view .LVU172 + 600 0068 627E ldrb r2, [r4, #25] + 601 006a D203 lsls r2, r2, #15 + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 602 .loc 1 524 83 view .LVU173 + 603 006c 1343 orrs r3, r2 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 604 .loc 1 526 18 view .LVU174 + 605 006e A17E ldrb r1, [r4, #26] + 606 0070 4A03 lsls r2, r1, #13 + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 607 .loc 1 525 83 view .LVU175 + 608 0072 1343 orrs r3, r2 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 609 .loc 1 527 18 view .LVU176 + 610 0074 A26A ldr r2, [r4, #40] + 611 0076 012A cmp r2, #1 + 612 0078 58D0 beq .L57 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 613 .loc 1 527 18 discriminator 1 view .LVU177 + 614 007a 8022 movs r2, #128 + 615 007c 5201 lsls r2, r2, #5 + 616 .L48: + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 617 .loc 1 526 83 view .LVU178 + 618 007e 1343 orrs r3, r2 + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | + 619 .loc 1 528 28 view .LVU179 + 620 0080 E268 ldr r2, [r4, #12] + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 621 .loc 1 527 83 view .LVU180 + 622 0082 1343 orrs r3, r2 + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 623 .loc 1 529 18 view .LVU181 + 624 0084 2269 ldr r2, [r4, #16] + 625 0086 022A cmp r2, #2 + 626 0088 52D0 beq .L63 + 627 .L49: + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | + 628 .loc 1 528 83 view .LVU182 + 629 008a 0343 orrs r3, r0 + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 630 .loc 1 530 18 view .LVU183 + ARM GAS /tmp/ccPDyDzP.s page 56 + + + 631 008c 2422 movs r2, #36 + 632 008e A25C ldrb r2, [r4, r2] + 633 0090 5200 lsls r2, r2, #1 + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 634 .loc 1 529 83 view .LVU184 + 635 0092 1343 orrs r3, r2 + 636 .LVL39: + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 637 .loc 1 533 5 is_stmt 1 view .LVU185 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 638 .loc 1 533 19 is_stmt 0 view .LVU186 + 639 0094 E27E ldrb r2, [r4, #27] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 640 .loc 1 533 8 view .LVU187 + 641 0096 012A cmp r2, #1 + 642 0098 4CD0 beq .L64 + 643 .L50: + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 644 .loc 1 559 5 is_stmt 1 view .LVU188 + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 645 .loc 1 559 19 is_stmt 0 view .LVU189 + 646 009a E269 ldr r2, [r4, #28] + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 647 .loc 1 559 8 view .LVU190 + 648 009c C221 movs r1, #194 + 649 009e FF31 adds r1, r1, #255 + 650 00a0 8A42 cmp r2, r1 + 651 00a2 02D0 beq .L52 + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 652 .loc 1 561 7 is_stmt 1 view .LVU191 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 653 .loc 1 562 31 is_stmt 0 view .LVU192 + 654 00a4 216A ldr r1, [r4, #32] + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 655 .loc 1 561 52 view .LVU193 + 656 00a6 0A43 orrs r2, r1 + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 657 .loc 1 561 16 view .LVU194 + 658 00a8 1343 orrs r3, r2 + 659 .LVL40: + 660 .L52: + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 661 .loc 1 566 5 is_stmt 1 view .LVU195 + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 662 .loc 1 566 9 is_stmt 0 view .LVU196 + 663 00aa 2168 ldr r1, [r4] + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 664 .loc 1 566 19 view .LVU197 + 665 00ac CA68 ldr r2, [r1, #12] + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 666 .loc 1 566 27 view .LVU198 + 667 00ae 1A43 orrs r2, r3 + 668 00b0 CA60 str r2, [r1, #12] + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 669 .loc 1 574 5 is_stmt 1 view .LVU199 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 670 .loc 1 574 9 is_stmt 0 view .LVU200 + ARM GAS /tmp/ccPDyDzP.s page 57 + + + 671 00b2 E26A ldr r2, [r4, #44] + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 672 .loc 1 574 8 view .LVU201 + 673 00b4 8021 movs r1, #128 + 674 00b6 4905 lsls r1, r1, #21 + 675 00b8 8A42 cmp r2, r1 + 676 00ba 0DD0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 677 .loc 1 574 9 discriminator 1 view .LVU202 + 678 00bc 012A cmp r2, #1 + 679 00be 0BD0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 680 .loc 1 574 9 discriminator 2 view .LVU203 + 681 00c0 022A cmp r2, #2 + 682 00c2 09D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 683 .loc 1 574 9 discriminator 3 view .LVU204 + 684 00c4 032A cmp r2, #3 + 685 00c6 07D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 686 .loc 1 574 9 discriminator 4 view .LVU205 + 687 00c8 042A cmp r2, #4 + 688 00ca 05D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 689 .loc 1 574 9 discriminator 5 view .LVU206 + 690 00cc 052A cmp r2, #5 + 691 00ce 03D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 692 .loc 1 574 9 discriminator 6 view .LVU207 + 693 00d0 062A cmp r2, #6 + 694 00d2 01D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 695 .loc 1 574 9 discriminator 7 view .LVU208 + 696 00d4 072A cmp r2, #7 + 697 00d6 0AD1 bne .L54 + 698 .L53: + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 699 .loc 1 578 7 is_stmt 1 view .LVU209 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 700 .loc 1 578 11 is_stmt 0 view .LVU210 + 701 00d8 2068 ldr r0, [r4] + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 702 .loc 1 578 21 view .LVU211 + 703 00da 4169 ldr r1, [r0, #20] + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 704 .loc 1 578 28 view .LVU212 + 705 00dc 0722 movs r2, #7 + 706 00de 9143 bics r1, r2 + 707 00e0 4161 str r1, [r0, #20] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 708 .loc 1 581 7 is_stmt 1 view .LVU213 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 709 .loc 1 581 11 is_stmt 0 view .LVU214 + 710 00e2 2068 ldr r0, [r4] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 711 .loc 1 581 21 view .LVU215 + 712 00e4 4169 ldr r1, [r0, #20] + ARM GAS /tmp/ccPDyDzP.s page 58 + + + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 713 .loc 1 581 31 view .LVU216 + 714 00e6 E56A ldr r5, [r4, #44] + 715 00e8 2A40 ands r2, r5 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 716 .loc 1 581 28 view .LVU217 + 717 00ea 0A43 orrs r2, r1 + 718 00ec 4261 str r2, [r0, #20] + 719 .L54: + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 720 .loc 1 589 5 is_stmt 1 view .LVU218 + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 721 .loc 1 589 14 is_stmt 0 view .LVU219 + 722 00ee 2268 ldr r2, [r4] + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 723 .loc 1 589 24 view .LVU220 + 724 00f0 D268 ldr r2, [r2, #12] + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 725 .loc 1 589 32 view .LVU221 + 726 00f2 2349 ldr r1, .L66+8 + 727 00f4 0A40 ands r2, r1 + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 728 .loc 1 589 8 view .LVU222 + 729 00f6 9A42 cmp r2, r3 + 730 00f8 2BD0 beq .L65 + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 731 .loc 1 603 7 is_stmt 1 view .LVU223 + 732 00fa A36B ldr r3, [r4, #56] + 733 .LVL41: + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 734 .loc 1 603 7 is_stmt 0 view .LVU224 + 735 00fc 1222 movs r2, #18 + 736 00fe 9343 bics r3, r2 + 737 0100 023A subs r2, r2, #2 + 738 0102 1343 orrs r3, r2 + 739 0104 A363 str r3, [r4, #56] + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 740 .loc 1 608 7 is_stmt 1 view .LVU225 + 741 0106 E36B ldr r3, [r4, #60] + 742 0108 0F3A subs r2, r2, #15 + 743 010a 1343 orrs r3, r2 + 744 010c E363 str r3, [r4, #60] + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 745 .loc 1 610 7 view .LVU226 + 746 .LVL42: + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 747 .loc 1 610 22 is_stmt 0 view .LVU227 + 748 010e 0120 movs r0, #1 + 749 0110 2EE0 b .L43 + 750 .LVL43: + 751 .L61: + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 752 .loc 1 435 5 is_stmt 1 view .LVU228 + 753 0112 C363 str r3, [r0, #60] + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 754 .loc 1 438 5 view .LVU229 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 59 + + + 755 .loc 1 438 16 is_stmt 0 view .LVU230 + 756 0114 3422 movs r2, #52 + 757 0116 8354 strb r3, [r0, r2] + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 758 .loc 1 456 5 is_stmt 1 view .LVU231 + 759 0118 FFF7FEFF bl HAL_ADC_MspInit + 760 .LVL44: + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 761 .loc 1 456 5 is_stmt 0 view .LVU232 + 762 011c 78E7 b .L44 + 763 .L62: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 764 .loc 1 479 9 discriminator 1 view .LVU233 + 765 011e 1A68 ldr r2, [r3] + 766 0120 D207 lsls r2, r2, #31 + 767 0122 9AD4 bmi .L47 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 768 .loc 1 479 9 discriminator 4 view .LVU234 + 769 0124 DA68 ldr r2, [r3, #12] + 770 0126 1204 lsls r2, r2, #16 + 771 0128 97D4 bmi .L47 + 772 012a 89E7 b .L46 + 773 .L57: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 774 .loc 1 527 18 discriminator 2 view .LVU235 + 775 012c 0200 movs r2, r0 + 776 012e A6E7 b .L48 + 777 .L63: + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 778 .loc 1 529 18 discriminator 1 view .LVU236 + 779 0130 0420 movs r0, #4 + 780 0132 AAE7 b .L49 + 781 .LVL45: + 782 .L64: + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 783 .loc 1 535 7 is_stmt 1 view .LVU237 + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 784 .loc 1 535 10 is_stmt 0 view .LVU238 + 785 0134 0029 cmp r1, #0 + 786 0136 03D1 bne .L51 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 787 .loc 1 538 9 is_stmt 1 view .LVU239 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 788 .loc 1 538 18 is_stmt 0 view .LVU240 + 789 0138 8022 movs r2, #128 + 790 013a 5202 lsls r2, r2, #9 + 791 013c 1343 orrs r3, r2 + 792 .LVL46: + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 793 .loc 1 538 18 view .LVU241 + 794 013e ACE7 b .L50 + 795 .L51: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 796 .loc 1 547 9 is_stmt 1 view .LVU242 + 797 0140 A26B ldr r2, [r4, #56] + 798 0142 2021 movs r1, #32 + 799 0144 0A43 orrs r2, r1 + ARM GAS /tmp/ccPDyDzP.s page 60 + + + 800 0146 A263 str r2, [r4, #56] + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 801 .loc 1 550 9 view .LVU243 + 802 0148 E26B ldr r2, [r4, #60] + 803 014a 1F39 subs r1, r1, #31 + 804 014c 0A43 orrs r2, r1 + 805 014e E263 str r2, [r4, #60] + 806 0150 A3E7 b .L50 + 807 .L65: + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 808 .loc 1 593 7 view .LVU244 + 809 0152 0023 movs r3, #0 + 810 .LVL47: + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 811 .loc 1 593 7 is_stmt 0 view .LVU245 + 812 0154 E363 str r3, [r4, #60] + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 813 .loc 1 596 7 is_stmt 1 view .LVU246 + 814 0156 A36B ldr r3, [r4, #56] + 815 0158 0322 movs r2, #3 + 816 015a 9343 bics r3, r2 + 817 015c 023A subs r2, r2, #2 + 818 015e 1343 orrs r3, r2 + 819 0160 A363 str r3, [r4, #56] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U; + 820 .loc 1 399 21 is_stmt 0 view .LVU247 + 821 0162 0020 movs r0, #0 + 822 0164 04E0 b .L43 + 823 .LVL48: + 824 .L45: + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 825 .loc 1 617 5 is_stmt 1 view .LVU248 + 826 0166 A36B ldr r3, [r4, #56] + 827 0168 1022 movs r2, #16 + 828 016a 1343 orrs r3, r2 + 829 016c A363 str r3, [r4, #56] + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 830 .loc 1 619 5 view .LVU249 + 831 .LVL49: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 832 .loc 1 619 20 is_stmt 0 view .LVU250 + 833 016e 0120 movs r0, #1 + 834 .LVL50: + 835 .L43: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 836 .loc 1 624 1 view .LVU251 + 837 @ sp needed + 838 .LVL51: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 839 .loc 1 624 1 view .LVU252 + 840 0170 70BD pop {r4, r5, r6, pc} + 841 .LVL52: + 842 .L56: + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 843 .loc 1 405 12 view .LVU253 + 844 0172 0120 movs r0, #1 + 845 .LVL53: + ARM GAS /tmp/ccPDyDzP.s page 61 + + + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 846 .loc 1 405 12 view .LVU254 + 847 0174 FCE7 b .L43 + 848 .L67: + 849 0176 C046 .align 2 + 850 .L66: + 851 0178 FDFEFFFF .word -259 + 852 017c 1902FEFF .word -130535 + 853 0180 E7FF3F83 .word -2092957721 + 854 .cfi_endproc + 855 .LFE40: + 857 .section .text.HAL_ADC_MspDeInit,"ax",%progbits + 858 .align 1 + 859 .weak HAL_ADC_MspDeInit + 860 .syntax unified + 861 .code 16 + 862 .thumb_func + 864 HAL_ADC_MspDeInit: + 865 .LVL54: + 866 .LFB43: + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 867 .loc 1 781 1 is_stmt 1 view -0 + 868 .cfi_startproc + 869 @ args = 0, pretend = 0, frame = 0 + 870 @ frame_needed = 0, uses_anonymous_args = 0 + 871 @ link register save eliminated. + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 872 .loc 1 783 3 view .LVU256 + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 873 .loc 1 788 1 is_stmt 0 view .LVU257 + 874 @ sp needed + 875 0000 7047 bx lr + 876 .cfi_endproc + 877 .LFE43: + 879 .section .text.HAL_ADC_DeInit,"ax",%progbits + 880 .align 1 + 881 .global HAL_ADC_DeInit + 882 .syntax unified + 883 .code 16 + 884 .thumb_func + 886 HAL_ADC_DeInit: + 887 .LVL55: + 888 .LFB41: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 889 .loc 1 640 1 is_stmt 1 view -0 + 890 .cfi_startproc + 891 @ args = 0, pretend = 0, frame = 0 + 892 @ frame_needed = 0, uses_anonymous_args = 0 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 893 .loc 1 640 1 is_stmt 0 view .LVU259 + 894 0000 70B5 push {r4, r5, r6, lr} + 895 .cfi_def_cfa_offset 16 + 896 .cfi_offset 4, -16 + 897 .cfi_offset 5, -12 + 898 .cfi_offset 6, -8 + 899 .cfi_offset 14, -4 + 900 0002 041E subs r4, r0, #0 + ARM GAS /tmp/ccPDyDzP.s page 62 + + + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 901 .loc 1 641 3 is_stmt 1 view .LVU260 + 902 .LVL56: + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 903 .loc 1 644 3 view .LVU261 + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 904 .loc 1 644 5 is_stmt 0 view .LVU262 + 905 0004 42D0 beq .L74 + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 906 .loc 1 650 3 is_stmt 1 view .LVU263 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 907 .loc 1 653 3 view .LVU264 + 908 0006 836B ldr r3, [r0, #56] + 909 0008 0222 movs r2, #2 + 910 000a 1343 orrs r3, r2 + 911 000c 8363 str r3, [r0, #56] + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 912 .loc 1 656 3 view .LVU265 + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 913 .loc 1 656 20 is_stmt 0 view .LVU266 + 914 000e FFF7FEFF bl ADC_ConversionStop + 915 .LVL57: + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 916 .loc 1 656 20 view .LVU267 + 917 0012 051E subs r5, r0, #0 + 918 .LVL58: + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 919 .loc 1 659 3 is_stmt 1 view .LVU268 + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 920 .loc 1 659 6 is_stmt 0 view .LVU269 + 921 0014 31D0 beq .L75 + 922 .LVL59: + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 923 .loc 1 675 3 is_stmt 1 view .LVU270 + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 924 .loc 1 675 6 is_stmt 0 view .LVU271 + 925 0016 0128 cmp r0, #1 + 926 0018 2AD0 beq .L72 + 927 .L73: + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC | + 928 .loc 1 680 5 is_stmt 1 view .LVU272 + 929 001a 2168 ldr r1, [r4] + 930 001c 4B68 ldr r3, [r1, #4] + 931 001e 9F22 movs r2, #159 + 932 0020 9343 bics r3, r2 + 933 0022 4B60 str r3, [r1, #4] + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC | + 934 .loc 1 685 5 view .LVU273 + 935 0024 2368 ldr r3, [r4] + 936 0026 1A60 str r2, [r3] + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 937 .loc 1 694 5 view .LVU274 + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 938 .loc 1 694 9 is_stmt 0 view .LVU275 + 939 0028 2268 ldr r2, [r4] + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 940 .loc 1 694 19 view .LVU276 + ARM GAS /tmp/ccPDyDzP.s page 63 + + + 941 002a D368 ldr r3, [r2, #12] + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 942 .loc 1 694 27 view .LVU277 + 943 002c 1849 ldr r1, .L76 + 944 002e 0B40 ands r3, r1 + 945 0030 D360 str r3, [r2, #12] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 946 .loc 1 702 5 is_stmt 1 view .LVU278 + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 947 .loc 1 702 9 is_stmt 0 view .LVU279 + 948 0032 2268 ldr r2, [r4] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 949 .loc 1 702 19 view .LVU280 + 950 0034 1369 ldr r3, [r2, #16] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 951 .loc 1 702 27 view .LVU281 + 952 0036 9B00 lsls r3, r3, #2 + 953 0038 9B08 lsrs r3, r3, #2 + 954 003a 1361 str r3, [r2, #16] + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 955 .loc 1 705 5 is_stmt 1 view .LVU282 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 956 .loc 1 705 9 is_stmt 0 view .LVU283 + 957 003c 2268 ldr r2, [r4] + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 958 .loc 1 705 19 view .LVU284 + 959 003e 5369 ldr r3, [r2, #20] + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 960 .loc 1 705 26 view .LVU285 + 961 0040 0721 movs r1, #7 + 962 0042 8B43 bics r3, r1 + 963 0044 5361 str r3, [r2, #20] + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 964 .loc 1 708 5 is_stmt 1 view .LVU286 + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 965 .loc 1 708 9 is_stmt 0 view .LVU287 + 966 0046 2268 ldr r2, [r4] + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 967 .loc 1 708 19 view .LVU288 + 968 0048 136A ldr r3, [r2, #32] + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 969 .loc 1 708 24 view .LVU289 + 970 004a 1249 ldr r1, .L76+4 + 971 004c 0B40 ands r3, r1 + 972 004e 1362 str r3, [r2, #32] + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 973 .loc 1 711 5 is_stmt 1 view .LVU290 + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 974 .loc 1 711 9 is_stmt 0 view .LVU291 + 975 0050 2268 ldr r2, [r4] + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 976 .loc 1 711 19 view .LVU292 + 977 0052 936A ldr r3, [r2, #40] + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 978 .loc 1 711 28 view .LVU293 + 979 0054 DB0C lsrs r3, r3, #19 + 980 0056 DB04 lsls r3, r3, #19 + ARM GAS /tmp/ccPDyDzP.s page 64 + + + 981 0058 9362 str r3, [r2, #40] + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 982 .loc 1 721 5 is_stmt 1 view .LVU294 + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 983 .loc 1 721 8 is_stmt 0 view .LVU295 + 984 005a 0F4A ldr r2, .L76+8 + 985 005c 1368 ldr r3, [r2] + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 986 .loc 1 721 14 view .LVU296 + 987 005e 0F49 ldr r1, .L76+12 + 988 0060 0B40 ands r3, r1 + 989 0062 1360 str r3, [r2] + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 990 .loc 1 742 5 is_stmt 1 view .LVU297 + 991 0064 2000 movs r0, r4 + 992 0066 FFF7FEFF bl HAL_ADC_MspDeInit + 993 .LVL60: + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 994 .loc 1 746 5 view .LVU298 + 995 006a 0023 movs r3, #0 + 996 006c E363 str r3, [r4, #60] + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 997 .loc 1 749 5 view .LVU299 + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 998 .loc 1 749 17 is_stmt 0 view .LVU300 + 999 006e A363 str r3, [r4, #56] + 1000 .L72: + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1001 .loc 1 753 3 is_stmt 1 view .LVU301 + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1002 .loc 1 753 3 view .LVU302 + 1003 0070 3423 movs r3, #52 + 1004 0072 0022 movs r2, #0 + 1005 0074 E254 strb r2, [r4, r3] + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1006 .loc 1 753 3 view .LVU303 + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1007 .loc 1 756 3 view .LVU304 + 1008 .L70: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1009 .loc 1 757 1 is_stmt 0 view .LVU305 + 1010 0076 2800 movs r0, r5 + 1011 @ sp needed + 1012 .LVL61: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1013 .loc 1 757 1 view .LVU306 + 1014 0078 70BD pop {r4, r5, r6, pc} + 1015 .LVL62: + 1016 .L75: + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1017 .loc 1 662 5 is_stmt 1 view .LVU307 + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1018 .loc 1 662 22 is_stmt 0 view .LVU308 + 1019 007a 2000 movs r0, r4 + 1020 .LVL63: + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1021 .loc 1 662 22 view .LVU309 + ARM GAS /tmp/ccPDyDzP.s page 65 + + + 1022 007c FFF7FEFF bl ADC_Disable + 1023 .LVL64: + 1024 0080 0500 movs r5, r0 + 1025 .LVL65: + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1026 .loc 1 665 5 is_stmt 1 view .LVU310 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1027 .loc 1 665 8 is_stmt 0 view .LVU311 + 1028 0082 0128 cmp r0, #1 + 1029 0084 F4D0 beq .L72 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1030 .loc 1 668 7 is_stmt 1 view .LVU312 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1031 .loc 1 668 19 is_stmt 0 view .LVU313 + 1032 0086 0123 movs r3, #1 + 1033 0088 A363 str r3, [r4, #56] + 1034 .LVL66: + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1035 .loc 1 675 3 is_stmt 1 view .LVU314 + 1036 008a C6E7 b .L73 + 1037 .LVL67: + 1038 .L74: + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1039 .loc 1 646 13 is_stmt 0 view .LVU315 + 1040 008c 0125 movs r5, #1 + 1041 008e F2E7 b .L70 + 1042 .L77: + 1043 .align 2 + 1044 .L76: + 1045 0090 00023E83 .word -2093088256 + 1046 0094 00F000F0 .word -268374016 + 1047 0098 08270140 .word 1073817352 + 1048 009c FFFF3FFE .word -29360129 + 1049 .cfi_endproc + 1050 .LFE41: + 1052 .section .text.HAL_ADC_Start,"ax",%progbits + 1053 .align 1 + 1054 .global HAL_ADC_Start + 1055 .syntax unified + 1056 .code 16 + 1057 .thumb_func + 1059 HAL_ADC_Start: + 1060 .LVL68: + 1061 .LFB44: +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1062 .loc 1 1019 1 is_stmt 1 view -0 + 1063 .cfi_startproc + 1064 @ args = 0, pretend = 0, frame = 0 + 1065 @ frame_needed = 0, uses_anonymous_args = 0 +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1066 .loc 1 1019 1 is_stmt 0 view .LVU317 + 1067 0000 10B5 push {r4, lr} + 1068 .cfi_def_cfa_offset 8 + 1069 .cfi_offset 4, -8 + 1070 .cfi_offset 14, -4 + 1071 0002 0400 movs r4, r0 +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 66 + + + 1072 .loc 1 1020 3 is_stmt 1 view .LVU318 + 1073 .LVL69: +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1074 .loc 1 1023 3 view .LVU319 +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1075 .loc 1 1026 3 view .LVU320 +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1076 .loc 1 1026 7 is_stmt 0 view .LVU321 + 1077 0004 0368 ldr r3, [r0] + 1078 0006 9B68 ldr r3, [r3, #8] +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1079 .loc 1 1026 6 view .LVU322 + 1080 0008 5B07 lsls r3, r3, #29 + 1081 000a 23D4 bmi .L81 +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1082 .loc 1 1029 5 is_stmt 1 view .LVU323 +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1083 .loc 1 1029 5 view .LVU324 + 1084 000c 3423 movs r3, #52 + 1085 000e C35C ldrb r3, [r0, r3] + 1086 0010 012B cmp r3, #1 + 1087 0012 21D0 beq .L82 +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1088 .loc 1 1029 5 discriminator 2 view .LVU325 + 1089 0014 3423 movs r3, #52 + 1090 0016 0122 movs r2, #1 + 1091 0018 C254 strb r2, [r0, r3] +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1092 .loc 1 1029 5 discriminator 2 view .LVU326 +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1093 .loc 1 1034 5 view .LVU327 +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1094 .loc 1 1034 19 is_stmt 0 view .LVU328 + 1095 001a 437E ldrb r3, [r0, #25] +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1096 .loc 1 1034 8 view .LVU329 + 1097 001c 012B cmp r3, #1 + 1098 001e 14D1 bne .L84 +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1099 .loc 1 1020 21 view .LVU330 + 1100 0020 0020 movs r0, #0 + 1101 .LVL70: + 1102 .L80: +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 1103 .loc 1 1045 7 is_stmt 1 view .LVU331 + 1104 0022 A26B ldr r2, [r4, #56] + 1105 0024 0D4B ldr r3, .L85 + 1106 0026 1A40 ands r2, r3 + 1107 0028 8023 movs r3, #128 + 1108 002a 5B00 lsls r3, r3, #1 + 1109 002c 1343 orrs r3, r2 + 1110 002e A363 str r3, [r4, #56] +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1111 .loc 1 1050 7 view .LVU332 + 1112 0030 0023 movs r3, #0 + 1113 0032 E363 str r3, [r4, #60] +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 67 + + + 1114 .loc 1 1055 7 view .LVU333 +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1115 .loc 1 1055 7 view .LVU334 + 1116 0034 3422 movs r2, #52 + 1117 0036 A354 strb r3, [r4, r2] +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1118 .loc 1 1055 7 view .LVU335 +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1119 .loc 1 1060 7 view .LVU336 + 1120 0038 2368 ldr r3, [r4] + 1121 003a 183A subs r2, r2, #24 + 1122 003c 1A60 str r2, [r3] +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1123 .loc 1 1066 7 view .LVU337 +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1124 .loc 1 1066 11 is_stmt 0 view .LVU338 + 1125 003e 2268 ldr r2, [r4] +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1126 .loc 1 1066 21 view .LVU339 + 1127 0040 9368 ldr r3, [r2, #8] +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1128 .loc 1 1066 26 view .LVU340 + 1129 0042 0421 movs r1, #4 + 1130 0044 0B43 orrs r3, r1 + 1131 0046 9360 str r3, [r2, #8] + 1132 .L79: +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1133 .loc 1 1076 1 view .LVU341 + 1134 @ sp needed + 1135 .LVL71: +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1136 .loc 1 1076 1 view .LVU342 + 1137 0048 10BD pop {r4, pc} + 1138 .LVL72: + 1139 .L84: +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1140 .loc 1 1036 7 is_stmt 1 view .LVU343 +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1141 .loc 1 1036 24 is_stmt 0 view .LVU344 + 1142 004a FFF7FEFF bl ADC_Enable + 1143 .LVL73: +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1144 .loc 1 1040 5 is_stmt 1 view .LVU345 +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1145 .loc 1 1040 8 is_stmt 0 view .LVU346 + 1146 004e 0028 cmp r0, #0 + 1147 0050 FAD1 bne .L79 + 1148 0052 E6E7 b .L80 + 1149 .LVL74: + 1150 .L81: +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1151 .loc 1 1071 20 view .LVU347 + 1152 0054 0220 movs r0, #2 + 1153 .LVL75: +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1154 .loc 1 1071 20 view .LVU348 + 1155 0056 F7E7 b .L79 + ARM GAS /tmp/ccPDyDzP.s page 68 + + + 1156 .LVL76: + 1157 .L82: +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1158 .loc 1 1029 5 discriminator 1 view .LVU349 + 1159 0058 0220 movs r0, #2 + 1160 .LVL77: +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1161 .loc 1 1029 5 discriminator 1 view .LVU350 + 1162 005a F5E7 b .L79 + 1163 .L86: + 1164 .align 2 + 1165 .L85: + 1166 005c FEF0FFFF .word -3842 + 1167 .cfi_endproc + 1168 .LFE44: + 1170 .section .text.HAL_ADC_Stop,"ax",%progbits + 1171 .align 1 + 1172 .global HAL_ADC_Stop + 1173 .syntax unified + 1174 .code 16 + 1175 .thumb_func + 1177 HAL_ADC_Stop: + 1178 .LVL78: + 1179 .LFB45: +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1180 .loc 1 1084 1 is_stmt 1 view -0 + 1181 .cfi_startproc + 1182 @ args = 0, pretend = 0, frame = 0 + 1183 @ frame_needed = 0, uses_anonymous_args = 0 +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1184 .loc 1 1084 1 is_stmt 0 view .LVU352 + 1185 0000 10B5 push {r4, lr} + 1186 .cfi_def_cfa_offset 8 + 1187 .cfi_offset 4, -8 + 1188 .cfi_offset 14, -4 + 1189 0002 0400 movs r4, r0 +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1190 .loc 1 1085 3 is_stmt 1 view .LVU353 + 1191 .LVL79: +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1192 .loc 1 1088 3 view .LVU354 +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1193 .loc 1 1091 3 view .LVU355 +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1194 .loc 1 1091 3 view .LVU356 + 1195 0004 3423 movs r3, #52 + 1196 0006 C35C ldrb r3, [r0, r3] + 1197 0008 012B cmp r3, #1 + 1198 000a 17D0 beq .L90 +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1199 .loc 1 1091 3 discriminator 2 view .LVU357 + 1200 000c 3423 movs r3, #52 + 1201 000e 0122 movs r2, #1 + 1202 0010 C254 strb r2, [r0, r3] +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1203 .loc 1 1091 3 discriminator 2 view .LVU358 +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 69 + + + 1204 .loc 1 1094 3 view .LVU359 +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1205 .loc 1 1094 20 is_stmt 0 view .LVU360 + 1206 0012 FFF7FEFF bl ADC_ConversionStop + 1207 .LVL80: +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1208 .loc 1 1097 3 is_stmt 1 view .LVU361 +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1209 .loc 1 1097 6 is_stmt 0 view .LVU362 + 1210 0016 0028 cmp r0, #0 + 1211 0018 03D0 beq .L91 + 1212 .LVL81: + 1213 .L89: +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1214 .loc 1 1113 3 is_stmt 1 view .LVU363 +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1215 .loc 1 1113 3 view .LVU364 + 1216 001a 3423 movs r3, #52 + 1217 001c 0022 movs r2, #0 + 1218 001e E254 strb r2, [r4, r3] +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1219 .loc 1 1113 3 view .LVU365 +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1220 .loc 1 1116 3 view .LVU366 + 1221 .LVL82: + 1222 .L88: +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1223 .loc 1 1117 1 is_stmt 0 view .LVU367 + 1224 @ sp needed + 1225 .LVL83: +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1226 .loc 1 1117 1 view .LVU368 + 1227 0020 10BD pop {r4, pc} + 1228 .LVL84: + 1229 .L91: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1230 .loc 1 1100 5 is_stmt 1 view .LVU369 +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1231 .loc 1 1100 22 is_stmt 0 view .LVU370 + 1232 0022 2000 movs r0, r4 + 1233 .LVL85: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1234 .loc 1 1100 22 view .LVU371 + 1235 0024 FFF7FEFF bl ADC_Disable + 1236 .LVL86: +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1237 .loc 1 1103 5 is_stmt 1 view .LVU372 +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1238 .loc 1 1103 8 is_stmt 0 view .LVU373 + 1239 0028 0028 cmp r0, #0 + 1240 002a F6D1 bne .L89 +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1241 .loc 1 1106 7 is_stmt 1 view .LVU374 + 1242 002c A36B ldr r3, [r4, #56] + 1243 002e 044A ldr r2, .L92 + 1244 0030 1340 ands r3, r2 + 1245 0032 0432 adds r2, r2, #4 + ARM GAS /tmp/ccPDyDzP.s page 70 + + + 1246 0034 FF32 adds r2, r2, #255 + 1247 0036 1343 orrs r3, r2 + 1248 0038 A363 str r3, [r4, #56] + 1249 003a EEE7 b .L89 + 1250 .LVL87: + 1251 .L90: +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1252 .loc 1 1091 3 is_stmt 0 discriminator 1 view .LVU375 + 1253 003c 0220 movs r0, #2 + 1254 .LVL88: +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1255 .loc 1 1091 3 discriminator 1 view .LVU376 + 1256 003e EFE7 b .L88 + 1257 .L93: + 1258 .align 2 + 1259 .L92: + 1260 0040 FEFEFFFF .word -258 + 1261 .cfi_endproc + 1262 .LFE45: + 1264 .section .text.HAL_ADC_PollForConversion,"ax",%progbits + 1265 .align 1 + 1266 .global HAL_ADC_PollForConversion + 1267 .syntax unified + 1268 .code 16 + 1269 .thumb_func + 1271 HAL_ADC_PollForConversion: + 1272 .LVL89: + 1273 .LFB46: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart; + 1274 .loc 1 1138 1 is_stmt 1 view -0 + 1275 .cfi_startproc + 1276 @ args = 0, pretend = 0, frame = 0 + 1277 @ frame_needed = 0, uses_anonymous_args = 0 +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart; + 1278 .loc 1 1138 1 is_stmt 0 view .LVU378 + 1279 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1280 .cfi_def_cfa_offset 24 + 1281 .cfi_offset 3, -24 + 1282 .cfi_offset 4, -20 + 1283 .cfi_offset 5, -16 + 1284 .cfi_offset 6, -12 + 1285 .cfi_offset 7, -8 + 1286 .cfi_offset 14, -4 + 1287 0002 0400 movs r4, r0 + 1288 0004 0E00 movs r6, r1 +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_Flag_EOC; + 1289 .loc 1 1139 3 is_stmt 1 view .LVU379 +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1290 .loc 1 1140 3 view .LVU380 +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1291 .loc 1 1143 3 view .LVU381 +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1292 .loc 1 1146 3 view .LVU382 +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1293 .loc 1 1146 17 is_stmt 0 view .LVU383 + 1294 0006 4769 ldr r7, [r0, #20] +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccPDyDzP.s page 71 + + + 1295 .loc 1 1146 6 view .LVU384 + 1296 0008 082F cmp r7, #8 + 1297 000a 04D0 beq .L95 +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1298 .loc 1 1159 5 is_stmt 1 view .LVU385 +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1299 .loc 1 1159 9 is_stmt 0 view .LVU386 + 1300 000c 0368 ldr r3, [r0] + 1301 000e DB68 ldr r3, [r3, #12] +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1302 .loc 1 1159 8 view .LVU387 + 1303 0010 DB07 lsls r3, r3, #31 + 1304 0012 18D4 bmi .L108 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1305 .loc 1 1171 20 view .LVU388 + 1306 0014 0C27 movs r7, #12 + 1307 .L95: + 1308 .LVL90: +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1309 .loc 1 1176 3 is_stmt 1 view .LVU389 +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1310 .loc 1 1176 15 is_stmt 0 view .LVU390 + 1311 0016 FFF7FEFF bl HAL_GetTick + 1312 .LVL91: +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1313 .loc 1 1176 15 view .LVU391 + 1314 001a 0500 movs r5, r0 + 1315 .LVL92: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1316 .loc 1 1179 3 is_stmt 1 view .LVU392 + 1317 .L98: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1318 .loc 1 1179 9 view .LVU393 + 1319 001c 2368 ldr r3, [r4] + 1320 001e 1A68 ldr r2, [r3] + 1321 0020 1742 tst r7, r2 + 1322 0022 1FD1 bne .L109 +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1323 .loc 1 1182 5 view .LVU394 +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1324 .loc 1 1182 7 is_stmt 0 view .LVU395 + 1325 0024 731C adds r3, r6, #1 + 1326 0026 F9D0 beq .L98 +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1327 .loc 1 1184 7 is_stmt 1 view .LVU396 +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1328 .loc 1 1184 9 is_stmt 0 view .LVU397 + 1329 0028 002E cmp r6, #0 + 1330 002a 15D1 bne .L110 + 1331 .L99: +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1332 .loc 1 1187 9 is_stmt 1 view .LVU398 +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1333 .loc 1 1187 12 is_stmt 0 view .LVU399 + 1334 002c 2368 ldr r3, [r4] + 1335 002e 1B68 ldr r3, [r3] +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccPDyDzP.s page 72 + + + 1336 .loc 1 1187 11 view .LVU400 + 1337 0030 1F42 tst r7, r3 + 1338 0032 F3D1 bne .L98 +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1339 .loc 1 1190 11 is_stmt 1 view .LVU401 + 1340 0034 A36B ldr r3, [r4, #56] + 1341 0036 0422 movs r2, #4 + 1342 0038 1343 orrs r3, r2 + 1343 003a A363 str r3, [r4, #56] +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1344 .loc 1 1193 11 view .LVU402 +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1345 .loc 1 1193 11 view .LVU403 + 1346 003c 3423 movs r3, #52 + 1347 003e 0022 movs r2, #0 + 1348 0040 E254 strb r2, [r4, r3] +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1349 .loc 1 1193 11 view .LVU404 +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1350 .loc 1 1195 11 view .LVU405 +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1351 .loc 1 1195 18 is_stmt 0 view .LVU406 + 1352 0042 0320 movs r0, #3 + 1353 0044 32E0 b .L96 + 1354 .LVL93: + 1355 .L108: +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1356 .loc 1 1162 7 is_stmt 1 view .LVU407 + 1357 0046 836B ldr r3, [r0, #56] + 1358 0048 2022 movs r2, #32 + 1359 004a 1343 orrs r3, r2 + 1360 004c 8363 str r3, [r0, #56] +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1361 .loc 1 1165 7 view .LVU408 +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1362 .loc 1 1165 7 view .LVU409 + 1363 004e 3423 movs r3, #52 + 1364 0050 0022 movs r2, #0 + 1365 0052 C254 strb r2, [r0, r3] +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1366 .loc 1 1165 7 view .LVU410 +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1367 .loc 1 1167 7 view .LVU411 +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1368 .loc 1 1167 14 is_stmt 0 view .LVU412 + 1369 0054 0120 movs r0, #1 + 1370 .LVL94: +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1371 .loc 1 1167 14 view .LVU413 + 1372 0056 29E0 b .L96 + 1373 .LVL95: + 1374 .L110: +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1375 .loc 1 1184 30 discriminator 1 view .LVU414 + 1376 0058 FFF7FEFF bl HAL_GetTick + 1377 .LVL96: +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccPDyDzP.s page 73 + + + 1378 .loc 1 1184 43 discriminator 1 view .LVU415 + 1379 005c 401B subs r0, r0, r5 +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1380 .loc 1 1184 25 discriminator 1 view .LVU416 + 1381 005e B042 cmp r0, r6 + 1382 0060 DCD9 bls .L98 + 1383 0062 E3E7 b .L99 + 1384 .L109: +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1385 .loc 1 1202 3 is_stmt 1 view .LVU417 + 1386 0064 A16B ldr r1, [r4, #56] + 1387 0066 8022 movs r2, #128 + 1388 0068 9200 lsls r2, r2, #2 + 1389 006a 0A43 orrs r2, r1 + 1390 006c A263 str r2, [r4, #56] +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1391 .loc 1 1206 3 view .LVU418 +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1392 .loc 1 1206 6 is_stmt 0 view .LVU419 + 1393 006e D968 ldr r1, [r3, #12] + 1394 0070 C022 movs r2, #192 + 1395 0072 1201 lsls r2, r2, #4 +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1396 .loc 1 1206 5 view .LVU420 + 1397 0074 1142 tst r1, r2 + 1398 0076 13D1 bne .L102 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1399 .loc 1 1207 17 view .LVU421 + 1400 0078 A27E ldrb r2, [r4, #26] +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1401 .loc 1 1206 49 discriminator 1 view .LVU422 + 1402 007a 002A cmp r2, #0 + 1403 007c 10D1 bne .L102 +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1404 .loc 1 1210 5 is_stmt 1 view .LVU423 +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1405 .loc 1 1210 9 is_stmt 0 view .LVU424 + 1406 007e 1A68 ldr r2, [r3] +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1407 .loc 1 1210 7 view .LVU425 + 1408 0080 1207 lsls r2, r2, #28 + 1409 0082 0DD5 bpl .L102 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1410 .loc 1 1214 7 is_stmt 1 view .LVU426 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1411 .loc 1 1214 11 is_stmt 0 view .LVU427 + 1412 0084 9A68 ldr r2, [r3, #8] +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1413 .loc 1 1214 10 view .LVU428 + 1414 0086 5207 lsls r2, r2, #29 + 1415 0088 11D4 bmi .L103 +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1416 .loc 1 1220 9 is_stmt 1 view .LVU429 + 1417 008a 5A68 ldr r2, [r3, #4] + 1418 008c 0C21 movs r1, #12 + 1419 008e 8A43 bics r2, r1 + 1420 0090 5A60 str r2, [r3, #4] + ARM GAS /tmp/ccPDyDzP.s page 74 + + +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1421 .loc 1 1223 9 view .LVU430 + 1422 0092 A36B ldr r3, [r4, #56] + 1423 0094 0B4A ldr r2, .L111 + 1424 0096 1340 ands r3, r2 + 1425 0098 0432 adds r2, r2, #4 + 1426 009a FF32 adds r2, r2, #255 + 1427 009c 1343 orrs r3, r2 + 1428 009e A363 str r3, [r4, #56] + 1429 .L102: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1430 .loc 1 1241 3 view .LVU431 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1431 .loc 1 1241 17 is_stmt 0 view .LVU432 + 1432 00a0 207E ldrb r0, [r4, #24] +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1433 .loc 1 1241 6 view .LVU433 + 1434 00a2 0028 cmp r0, #0 + 1435 00a4 0CD1 bne .L105 +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1436 .loc 1 1244 5 is_stmt 1 view .LVU434 + 1437 00a6 2368 ldr r3, [r4] + 1438 00a8 0C22 movs r2, #12 + 1439 00aa 1A60 str r2, [r3] + 1440 .LVL97: + 1441 .L96: +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1442 .loc 1 1249 1 is_stmt 0 view .LVU435 + 1443 @ sp needed + 1444 .LVL98: + 1445 .LVL99: +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1446 .loc 1 1249 1 view .LVU436 + 1447 00ac F8BD pop {r3, r4, r5, r6, r7, pc} + 1448 .LVL100: + 1449 .L103: +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1450 .loc 1 1230 9 is_stmt 1 view .LVU437 + 1451 00ae A36B ldr r3, [r4, #56] + 1452 00b0 2022 movs r2, #32 + 1453 00b2 1343 orrs r3, r2 + 1454 00b4 A363 str r3, [r4, #56] +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1455 .loc 1 1233 9 view .LVU438 + 1456 00b6 E36B ldr r3, [r4, #60] + 1457 00b8 1F3A subs r2, r2, #31 + 1458 00ba 1343 orrs r3, r2 + 1459 00bc E363 str r3, [r4, #60] + 1460 00be EFE7 b .L102 + 1461 .L105: +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1462 .loc 1 1248 10 is_stmt 0 view .LVU439 + 1463 00c0 0020 movs r0, #0 + 1464 00c2 F3E7 b .L96 + 1465 .L112: + 1466 .align 2 + 1467 .L111: + ARM GAS /tmp/ccPDyDzP.s page 75 + + + 1468 00c4 FEFEFFFF .word -258 + 1469 .cfi_endproc + 1470 .LFE46: + 1472 .section .text.HAL_ADC_PollForEvent,"ax",%progbits + 1473 .align 1 + 1474 .global HAL_ADC_PollForEvent + 1475 .syntax unified + 1476 .code 16 + 1477 .thumb_func + 1479 HAL_ADC_PollForEvent: + 1480 .LVL101: + 1481 .LFB47: +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0; + 1482 .loc 1 1262 1 is_stmt 1 view -0 + 1483 .cfi_startproc + 1484 @ args = 0, pretend = 0, frame = 0 + 1485 @ frame_needed = 0, uses_anonymous_args = 0 +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0; + 1486 .loc 1 1262 1 is_stmt 0 view .LVU441 + 1487 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1488 .cfi_def_cfa_offset 24 + 1489 .cfi_offset 3, -24 + 1490 .cfi_offset 4, -20 + 1491 .cfi_offset 5, -16 + 1492 .cfi_offset 6, -12 + 1493 .cfi_offset 7, -8 + 1494 .cfi_offset 14, -4 + 1495 0002 0600 movs r6, r0 + 1496 0004 0C00 movs r4, r1 + 1497 0006 1700 movs r7, r2 +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1498 .loc 1 1263 3 is_stmt 1 view .LVU442 + 1499 .LVL102: +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EVENT_TYPE(EventType)); + 1500 .loc 1 1266 3 view .LVU443 +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1501 .loc 1 1267 3 view .LVU444 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1502 .loc 1 1270 3 view .LVU445 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1503 .loc 1 1270 15 is_stmt 0 view .LVU446 + 1504 0008 FFF7FEFF bl HAL_GetTick + 1505 .LVL103: +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1506 .loc 1 1270 15 view .LVU447 + 1507 000c 0500 movs r5, r0 + 1508 .LVL104: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1509 .loc 1 1273 3 is_stmt 1 view .LVU448 + 1510 .L115: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1511 .loc 1 1273 45 view .LVU449 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1512 .loc 1 1273 9 is_stmt 0 view .LVU450 + 1513 000e 3168 ldr r1, [r6] + 1514 0010 0B68 ldr r3, [r1] + 1515 0012 2340 ands r3, r4 + ARM GAS /tmp/ccPDyDzP.s page 76 + + +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1516 .loc 1 1273 45 view .LVU451 + 1517 0014 A342 cmp r3, r4 + 1518 0016 17D0 beq .L123 +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1519 .loc 1 1276 5 is_stmt 1 view .LVU452 +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1520 .loc 1 1276 7 is_stmt 0 view .LVU453 + 1521 0018 7B1C adds r3, r7, #1 + 1522 001a F8D0 beq .L115 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1523 .loc 1 1278 7 is_stmt 1 view .LVU454 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1524 .loc 1 1278 9 is_stmt 0 view .LVU455 + 1525 001c 002F cmp r7, #0 + 1526 001e 0DD1 bne .L124 + 1527 .L116: +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1528 .loc 1 1281 9 is_stmt 1 view .LVU456 +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1529 .loc 1 1281 12 is_stmt 0 view .LVU457 + 1530 0020 3368 ldr r3, [r6] + 1531 0022 1B68 ldr r3, [r3] + 1532 0024 2340 ands r3, r4 +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1533 .loc 1 1281 11 view .LVU458 + 1534 0026 A342 cmp r3, r4 + 1535 0028 F1D0 beq .L115 +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1536 .loc 1 1284 11 is_stmt 1 view .LVU459 + 1537 002a B36B ldr r3, [r6, #56] + 1538 002c 0422 movs r2, #4 + 1539 002e 1343 orrs r3, r2 + 1540 0030 B363 str r3, [r6, #56] +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1541 .loc 1 1287 11 view .LVU460 +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1542 .loc 1 1287 11 view .LVU461 + 1543 0032 3423 movs r3, #52 + 1544 0034 0022 movs r2, #0 + 1545 0036 F254 strb r2, [r6, r3] +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1546 .loc 1 1287 11 view .LVU462 +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1547 .loc 1 1289 11 view .LVU463 +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1548 .loc 1 1289 18 is_stmt 0 view .LVU464 + 1549 0038 0320 movs r0, #3 + 1550 003a 0DE0 b .L118 + 1551 .L124: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1552 .loc 1 1278 31 discriminator 1 view .LVU465 + 1553 003c FFF7FEFF bl HAL_GetTick + 1554 .LVL105: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1555 .loc 1 1278 44 discriminator 1 view .LVU466 + 1556 0040 401B subs r0, r0, r5 + ARM GAS /tmp/ccPDyDzP.s page 77 + + +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1557 .loc 1 1278 26 discriminator 1 view .LVU467 + 1558 0042 B842 cmp r0, r7 + 1559 0044 E3D9 bls .L115 + 1560 0046 EBE7 b .L116 + 1561 .L123: +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1562 .loc 1 1295 3 is_stmt 1 view .LVU468 + 1563 0048 802C cmp r4, #128 + 1564 004a 06D0 beq .L125 +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1565 .loc 1 1312 5 view .LVU469 +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1566 .loc 1 1312 19 is_stmt 0 view .LVU470 + 1567 004c B36A ldr r3, [r6, #40] +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1568 .loc 1 1312 8 view .LVU471 + 1569 004e 012B cmp r3, #1 + 1570 0050 0CD0 beq .L126 + 1571 .L121: +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1572 .loc 1 1322 5 is_stmt 1 view .LVU472 + 1573 0052 1023 movs r3, #16 + 1574 0054 0B60 str r3, [r1] +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1575 .loc 1 1323 5 view .LVU473 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1576 .loc 1 1327 10 is_stmt 0 view .LVU474 + 1577 0056 0020 movs r0, #0 + 1578 .L118: +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1579 .loc 1 1328 1 view .LVU475 + 1580 @ sp needed + 1581 .LVL106: + 1582 .LVL107: + 1583 .LVL108: + 1584 .LVL109: +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1585 .loc 1 1328 1 view .LVU476 + 1586 0058 F8BD pop {r3, r4, r5, r6, r7, pc} + 1587 .LVL110: + 1588 .L125: +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1589 .loc 1 1300 5 is_stmt 1 view .LVU477 + 1590 005a B26B ldr r2, [r6, #56] + 1591 005c 8023 movs r3, #128 + 1592 005e 5B02 lsls r3, r3, #9 + 1593 0060 1343 orrs r3, r2 + 1594 0062 B363 str r3, [r6, #56] +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1595 .loc 1 1303 5 view .LVU478 + 1596 0064 8023 movs r3, #128 + 1597 0066 0B60 str r3, [r1] +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1598 .loc 1 1304 5 view .LVU479 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1599 .loc 1 1327 10 is_stmt 0 view .LVU480 + ARM GAS /tmp/ccPDyDzP.s page 78 + + + 1600 0068 0020 movs r0, #0 +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1601 .loc 1 1304 5 view .LVU481 + 1602 006a F5E7 b .L118 + 1603 .L126: +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1604 .loc 1 1315 7 is_stmt 1 view .LVU482 + 1605 006c B26B ldr r2, [r6, #56] + 1606 006e 8023 movs r3, #128 + 1607 0070 DB00 lsls r3, r3, #3 + 1608 0072 1343 orrs r3, r2 + 1609 0074 B363 str r3, [r6, #56] +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1610 .loc 1 1318 7 view .LVU483 + 1611 0076 F36B ldr r3, [r6, #60] + 1612 0078 0222 movs r2, #2 + 1613 007a 1343 orrs r3, r2 + 1614 007c F363 str r3, [r6, #60] + 1615 007e E8E7 b .L121 + 1616 .cfi_endproc + 1617 .LFE47: + 1619 .section .text.HAL_ADC_Start_IT,"ax",%progbits + 1620 .align 1 + 1621 .global HAL_ADC_Start_IT + 1622 .syntax unified + 1623 .code 16 + 1624 .thumb_func + 1626 HAL_ADC_Start_IT: + 1627 .LVL111: + 1628 .LFB48: +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1629 .loc 1 1342 1 view -0 + 1630 .cfi_startproc + 1631 @ args = 0, pretend = 0, frame = 0 + 1632 @ frame_needed = 0, uses_anonymous_args = 0 +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1633 .loc 1 1342 1 is_stmt 0 view .LVU485 + 1634 0000 10B5 push {r4, lr} + 1635 .cfi_def_cfa_offset 8 + 1636 .cfi_offset 4, -8 + 1637 .cfi_offset 14, -4 + 1638 0002 0400 movs r4, r0 +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1639 .loc 1 1343 3 is_stmt 1 view .LVU486 + 1640 .LVL112: +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1641 .loc 1 1346 3 view .LVU487 +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1642 .loc 1 1349 3 view .LVU488 +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1643 .loc 1 1349 7 is_stmt 0 view .LVU489 + 1644 0004 0368 ldr r3, [r0] + 1645 0006 9B68 ldr r3, [r3, #8] +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1646 .loc 1 1349 6 view .LVU490 + 1647 0008 5B07 lsls r3, r3, #29 + 1648 000a 36D4 bmi .L132 + ARM GAS /tmp/ccPDyDzP.s page 79 + + +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1649 .loc 1 1352 5 is_stmt 1 view .LVU491 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1650 .loc 1 1352 5 view .LVU492 + 1651 000c 3423 movs r3, #52 + 1652 000e C35C ldrb r3, [r0, r3] + 1653 0010 012B cmp r3, #1 + 1654 0012 34D0 beq .L133 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1655 .loc 1 1352 5 discriminator 2 view .LVU493 + 1656 0014 3423 movs r3, #52 + 1657 0016 0122 movs r2, #1 + 1658 0018 C254 strb r2, [r0, r3] +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1659 .loc 1 1352 5 discriminator 2 view .LVU494 +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1660 .loc 1 1357 5 view .LVU495 +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1661 .loc 1 1357 19 is_stmt 0 view .LVU496 + 1662 001a 437E ldrb r3, [r0, #25] +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1663 .loc 1 1357 8 view .LVU497 + 1664 001c 012B cmp r3, #1 + 1665 001e 1CD1 bne .L135 +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1666 .loc 1 1343 21 view .LVU498 + 1667 0020 0020 movs r0, #0 + 1668 .LVL113: + 1669 .L129: +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 1670 .loc 1 1368 7 is_stmt 1 view .LVU499 + 1671 0022 A26B ldr r2, [r4, #56] + 1672 0024 174B ldr r3, .L137 + 1673 0026 1A40 ands r2, r3 + 1674 0028 8023 movs r3, #128 + 1675 002a 5B00 lsls r3, r3, #1 + 1676 002c 1343 orrs r3, r2 + 1677 002e A363 str r3, [r4, #56] +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1678 .loc 1 1373 7 view .LVU500 + 1679 0030 0023 movs r3, #0 + 1680 0032 E363 str r3, [r4, #60] +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1681 .loc 1 1378 7 view .LVU501 +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1682 .loc 1 1378 7 view .LVU502 + 1683 0034 3422 movs r2, #52 + 1684 0036 A354 strb r3, [r4, r2] +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1685 .loc 1 1378 7 view .LVU503 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1686 .loc 1 1383 7 view .LVU504 + 1687 0038 2368 ldr r3, [r4] + 1688 003a 183A subs r2, r2, #24 + 1689 003c 1A60 str r2, [r3] +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1690 .loc 1 1387 7 view .LVU505 + ARM GAS /tmp/ccPDyDzP.s page 80 + + +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1691 .loc 1 1387 24 is_stmt 0 view .LVU506 + 1692 003e 6369 ldr r3, [r4, #20] +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1693 .loc 1 1387 7 view .LVU507 + 1694 0040 082B cmp r3, #8 + 1695 0042 0FD0 beq .L136 +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1696 .loc 1 1395 11 is_stmt 1 view .LVU508 + 1697 0044 2268 ldr r2, [r4] + 1698 0046 5368 ldr r3, [r2, #4] + 1699 0048 1C21 movs r1, #28 + 1700 004a 0B43 orrs r3, r1 + 1701 004c 5360 str r3, [r2, #4] +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1702 .loc 1 1396 11 view .LVU509 + 1703 .L131: +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1704 .loc 1 1403 7 view .LVU510 +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1705 .loc 1 1403 11 is_stmt 0 view .LVU511 + 1706 004e 2268 ldr r2, [r4] +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1707 .loc 1 1403 21 view .LVU512 + 1708 0050 9368 ldr r3, [r2, #8] +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1709 .loc 1 1403 26 view .LVU513 + 1710 0052 0421 movs r1, #4 + 1711 0054 0B43 orrs r3, r1 + 1712 0056 9360 str r3, [r2, #8] + 1713 .L128: +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1714 .loc 1 1413 1 view .LVU514 + 1715 @ sp needed + 1716 .LVL114: +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1717 .loc 1 1413 1 view .LVU515 + 1718 0058 10BD pop {r4, pc} + 1719 .LVL115: + 1720 .L135: +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1721 .loc 1 1359 7 is_stmt 1 view .LVU516 +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1722 .loc 1 1359 24 is_stmt 0 view .LVU517 + 1723 005a FFF7FEFF bl ADC_Enable + 1724 .LVL116: +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1725 .loc 1 1363 5 is_stmt 1 view .LVU518 +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1726 .loc 1 1363 8 is_stmt 0 view .LVU519 + 1727 005e 0028 cmp r0, #0 + 1728 0060 FAD1 bne .L128 + 1729 0062 DEE7 b .L129 + 1730 .LVL117: + 1731 .L136: +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); + 1732 .loc 1 1390 11 is_stmt 1 view .LVU520 + ARM GAS /tmp/ccPDyDzP.s page 81 + + + 1733 0064 2268 ldr r2, [r4] + 1734 0066 5368 ldr r3, [r2, #4] + 1735 0068 0421 movs r1, #4 + 1736 006a 8B43 bics r3, r1 + 1737 006c 5360 str r3, [r2, #4] +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1738 .loc 1 1391 11 view .LVU521 + 1739 006e 2268 ldr r2, [r4] + 1740 0070 5368 ldr r3, [r2, #4] + 1741 0072 1431 adds r1, r1, #20 + 1742 0074 0B43 orrs r3, r1 + 1743 0076 5360 str r3, [r2, #4] +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ + 1744 .loc 1 1392 11 view .LVU522 + 1745 0078 E9E7 b .L131 + 1746 .LVL118: + 1747 .L132: +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1748 .loc 1 1408 20 is_stmt 0 view .LVU523 + 1749 007a 0220 movs r0, #2 + 1750 .LVL119: +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1751 .loc 1 1408 20 view .LVU524 + 1752 007c ECE7 b .L128 + 1753 .LVL120: + 1754 .L133: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1755 .loc 1 1352 5 discriminator 1 view .LVU525 + 1756 007e 0220 movs r0, #2 + 1757 .LVL121: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1758 .loc 1 1352 5 discriminator 1 view .LVU526 + 1759 0080 EAE7 b .L128 + 1760 .L138: + 1761 0082 C046 .align 2 + 1762 .L137: + 1763 0084 FEF0FFFF .word -3842 + 1764 .cfi_endproc + 1765 .LFE48: + 1767 .section .text.HAL_ADC_Stop_IT,"ax",%progbits + 1768 .align 1 + 1769 .global HAL_ADC_Stop_IT + 1770 .syntax unified + 1771 .code 16 + 1772 .thumb_func + 1774 HAL_ADC_Stop_IT: + 1775 .LVL122: + 1776 .LFB49: +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1777 .loc 1 1423 1 is_stmt 1 view -0 + 1778 .cfi_startproc + 1779 @ args = 0, pretend = 0, frame = 0 + 1780 @ frame_needed = 0, uses_anonymous_args = 0 +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1781 .loc 1 1423 1 is_stmt 0 view .LVU528 + 1782 0000 10B5 push {r4, lr} + 1783 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccPDyDzP.s page 82 + + + 1784 .cfi_offset 4, -8 + 1785 .cfi_offset 14, -4 + 1786 0002 0400 movs r4, r0 +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1787 .loc 1 1424 3 is_stmt 1 view .LVU529 + 1788 .LVL123: +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1789 .loc 1 1427 3 view .LVU530 +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1790 .loc 1 1430 3 view .LVU531 +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1791 .loc 1 1430 3 view .LVU532 + 1792 0004 3423 movs r3, #52 + 1793 0006 C35C ldrb r3, [r0, r3] + 1794 0008 012B cmp r3, #1 + 1795 000a 1CD0 beq .L142 +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1796 .loc 1 1430 3 discriminator 2 view .LVU533 + 1797 000c 3423 movs r3, #52 + 1798 000e 0122 movs r2, #1 + 1799 0010 C254 strb r2, [r0, r3] +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1800 .loc 1 1430 3 discriminator 2 view .LVU534 +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1801 .loc 1 1433 3 view .LVU535 +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1802 .loc 1 1433 20 is_stmt 0 view .LVU536 + 1803 0012 FFF7FEFF bl ADC_ConversionStop + 1804 .LVL124: +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1805 .loc 1 1436 3 is_stmt 1 view .LVU537 +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1806 .loc 1 1436 6 is_stmt 0 view .LVU538 + 1807 0016 0028 cmp r0, #0 + 1808 0018 03D0 beq .L143 + 1809 .LVL125: + 1810 .L141: +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1811 .loc 1 1456 3 is_stmt 1 view .LVU539 +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1812 .loc 1 1456 3 view .LVU540 + 1813 001a 3423 movs r3, #52 + 1814 001c 0022 movs r2, #0 + 1815 001e E254 strb r2, [r4, r3] +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1816 .loc 1 1456 3 view .LVU541 +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1817 .loc 1 1459 3 view .LVU542 + 1818 .LVL126: + 1819 .L140: +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1820 .loc 1 1460 1 is_stmt 0 view .LVU543 + 1821 @ sp needed + 1822 .LVL127: +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1823 .loc 1 1460 1 view .LVU544 + 1824 0020 10BD pop {r4, pc} + ARM GAS /tmp/ccPDyDzP.s page 83 + + + 1825 .LVL128: + 1826 .L143: +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1827 .loc 1 1440 5 is_stmt 1 view .LVU545 + 1828 0022 2268 ldr r2, [r4] + 1829 0024 5368 ldr r3, [r2, #4] + 1830 0026 1C21 movs r1, #28 + 1831 0028 8B43 bics r3, r1 + 1832 002a 5360 str r3, [r2, #4] +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1833 .loc 1 1443 5 view .LVU546 +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1834 .loc 1 1443 22 is_stmt 0 view .LVU547 + 1835 002c 2000 movs r0, r4 + 1836 .LVL129: +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1837 .loc 1 1443 22 view .LVU548 + 1838 002e FFF7FEFF bl ADC_Disable + 1839 .LVL130: +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1840 .loc 1 1446 5 is_stmt 1 view .LVU549 +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1841 .loc 1 1446 8 is_stmt 0 view .LVU550 + 1842 0032 0028 cmp r0, #0 + 1843 0034 F1D1 bne .L141 +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1844 .loc 1 1449 7 is_stmt 1 view .LVU551 + 1845 0036 A36B ldr r3, [r4, #56] + 1846 0038 044A ldr r2, .L144 + 1847 003a 1340 ands r3, r2 + 1848 003c 0432 adds r2, r2, #4 + 1849 003e FF32 adds r2, r2, #255 + 1850 0040 1343 orrs r3, r2 + 1851 0042 A363 str r3, [r4, #56] + 1852 0044 E9E7 b .L141 + 1853 .LVL131: + 1854 .L142: +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1855 .loc 1 1430 3 is_stmt 0 discriminator 1 view .LVU552 + 1856 0046 0220 movs r0, #2 + 1857 .LVL132: +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1858 .loc 1 1430 3 discriminator 1 view .LVU553 + 1859 0048 EAE7 b .L140 + 1860 .L145: + 1861 004a C046 .align 2 + 1862 .L144: + 1863 004c FEFEFFFF .word -258 + 1864 .cfi_endproc + 1865 .LFE49: + 1867 .section .text.HAL_ADC_Start_DMA,"ax",%progbits + 1868 .align 1 + 1869 .global HAL_ADC_Start_DMA + 1870 .syntax unified + 1871 .code 16 + 1872 .thumb_func + 1874 HAL_ADC_Start_DMA: + ARM GAS /tmp/ccPDyDzP.s page 84 + + + 1875 .LVL133: + 1876 .LFB50: +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1877 .loc 1 1476 1 is_stmt 1 view -0 + 1878 .cfi_startproc + 1879 @ args = 0, pretend = 0, frame = 0 + 1880 @ frame_needed = 0, uses_anonymous_args = 0 +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1881 .loc 1 1476 1 is_stmt 0 view .LVU555 + 1882 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1883 .cfi_def_cfa_offset 24 + 1884 .cfi_offset 3, -24 + 1885 .cfi_offset 4, -20 + 1886 .cfi_offset 5, -16 + 1887 .cfi_offset 6, -12 + 1888 .cfi_offset 7, -8 + 1889 .cfi_offset 14, -4 + 1890 0002 0400 movs r4, r0 + 1891 0004 0D00 movs r5, r1 + 1892 0006 1600 movs r6, r2 +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1893 .loc 1 1477 3 is_stmt 1 view .LVU556 + 1894 .LVL134: +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1895 .loc 1 1480 3 view .LVU557 +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1896 .loc 1 1483 3 view .LVU558 +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1897 .loc 1 1483 7 is_stmt 0 view .LVU559 + 1898 0008 0368 ldr r3, [r0] + 1899 000a 9B68 ldr r3, [r3, #8] +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1900 .loc 1 1483 6 view .LVU560 + 1901 000c 5B07 lsls r3, r3, #29 + 1902 000e 3ED4 bmi .L149 +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1903 .loc 1 1486 5 is_stmt 1 view .LVU561 +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1904 .loc 1 1486 5 view .LVU562 + 1905 0010 3423 movs r3, #52 + 1906 0012 C35C ldrb r3, [r0, r3] + 1907 0014 012B cmp r3, #1 + 1908 0016 3CD0 beq .L150 +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1909 .loc 1 1486 5 discriminator 2 view .LVU563 + 1910 0018 3423 movs r3, #52 + 1911 001a 0122 movs r2, #1 + 1912 .LVL135: +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1913 .loc 1 1486 5 is_stmt 0 discriminator 2 view .LVU564 + 1914 001c C254 strb r2, [r0, r3] +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1915 .loc 1 1486 5 is_stmt 1 discriminator 2 view .LVU565 +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1916 .loc 1 1491 5 view .LVU566 +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1917 .loc 1 1491 19 is_stmt 0 view .LVU567 + ARM GAS /tmp/ccPDyDzP.s page 85 + + + 1918 001e 437E ldrb r3, [r0, #25] +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1919 .loc 1 1491 8 view .LVU568 + 1920 0020 012B cmp r3, #1 + 1921 0022 04D0 beq .L151 +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1922 .loc 1 1493 7 is_stmt 1 view .LVU569 +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1923 .loc 1 1493 24 is_stmt 0 view .LVU570 + 1924 0024 FFF7FEFF bl ADC_Enable + 1925 .LVL136: +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1926 .loc 1 1493 24 view .LVU571 + 1927 0028 071E subs r7, r0, #0 + 1928 .LVL137: +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1929 .loc 1 1497 5 is_stmt 1 view .LVU572 +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1930 .loc 1 1497 8 is_stmt 0 view .LVU573 + 1931 002a 2ED1 bne .L147 + 1932 002c 00E0 b .L148 + 1933 .LVL138: + 1934 .L151: +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1935 .loc 1 1477 21 view .LVU574 + 1936 002e 0027 movs r7, #0 + 1937 .LVL139: + 1938 .L148: +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 1939 .loc 1 1502 7 is_stmt 1 view .LVU575 + 1940 0030 A26B ldr r2, [r4, #56] + 1941 0032 194B ldr r3, .L152 + 1942 0034 1A40 ands r2, r3 + 1943 0036 8023 movs r3, #128 + 1944 0038 5B00 lsls r3, r3, #1 + 1945 003a 1343 orrs r3, r2 + 1946 003c A363 str r3, [r4, #56] +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1947 .loc 1 1507 7 view .LVU576 + 1948 003e 0023 movs r3, #0 + 1949 0040 E363 str r3, [r4, #60] +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1950 .loc 1 1512 7 view .LVU577 +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1951 .loc 1 1512 7 view .LVU578 + 1952 0042 3422 movs r2, #52 + 1953 0044 A354 strb r3, [r4, r2] +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1954 .loc 1 1512 7 view .LVU579 +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1955 .loc 1 1515 7 view .LVU580 +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1956 .loc 1 1515 11 is_stmt 0 view .LVU581 + 1957 0046 236B ldr r3, [r4, #48] +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1958 .loc 1 1515 42 view .LVU582 + 1959 0048 144A ldr r2, .L152+4 + ARM GAS /tmp/ccPDyDzP.s page 86 + + + 1960 004a 9A62 str r2, [r3, #40] +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1961 .loc 1 1518 7 is_stmt 1 view .LVU583 +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1962 .loc 1 1518 11 is_stmt 0 view .LVU584 + 1963 004c 236B ldr r3, [r4, #48] +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1964 .loc 1 1518 46 view .LVU585 + 1965 004e 144A ldr r2, .L152+8 + 1966 0050 DA62 str r2, [r3, #44] +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1967 .loc 1 1521 7 is_stmt 1 view .LVU586 +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1968 .loc 1 1521 11 is_stmt 0 view .LVU587 + 1969 0052 236B ldr r3, [r4, #48] +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1970 .loc 1 1521 43 view .LVU588 + 1971 0054 134A ldr r2, .L152+12 + 1972 0056 1A63 str r2, [r3, #48] +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1973 .loc 1 1530 7 is_stmt 1 view .LVU589 + 1974 0058 2368 ldr r3, [r4] + 1975 005a 1C22 movs r2, #28 + 1976 005c 1A60 str r2, [r3] +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1977 .loc 1 1533 7 view .LVU590 + 1978 005e 2268 ldr r2, [r4] + 1979 0060 5368 ldr r3, [r2, #4] + 1980 0062 1021 movs r1, #16 + 1981 0064 0B43 orrs r3, r1 + 1982 0066 5360 str r3, [r2, #4] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1983 .loc 1 1536 7 view .LVU591 +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1984 .loc 1 1536 11 is_stmt 0 view .LVU592 + 1985 0068 2268 ldr r2, [r4] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1986 .loc 1 1536 21 view .LVU593 + 1987 006a D368 ldr r3, [r2, #12] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1988 .loc 1 1536 29 view .LVU594 + 1989 006c 0F39 subs r1, r1, #15 + 1990 006e 0B43 orrs r3, r1 + 1991 0070 D360 str r3, [r2, #12] +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1992 .loc 1 1539 7 is_stmt 1 view .LVU595 +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1993 .loc 1 1539 57 is_stmt 0 view .LVU596 + 1994 0072 2168 ldr r1, [r4] +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1995 .loc 1 1539 52 view .LVU597 + 1996 0074 4031 adds r1, r1, #64 +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1997 .loc 1 1539 7 view .LVU598 + 1998 0076 206B ldr r0, [r4, #48] + 1999 0078 3300 movs r3, r6 + 2000 007a 2A00 movs r2, r5 + ARM GAS /tmp/ccPDyDzP.s page 87 + + + 2001 007c FFF7FEFF bl HAL_DMA_Start_IT + 2002 .LVL140: +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2003 .loc 1 1545 7 is_stmt 1 view .LVU599 +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2004 .loc 1 1545 11 is_stmt 0 view .LVU600 + 2005 0080 2268 ldr r2, [r4] +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2006 .loc 1 1545 21 view .LVU601 + 2007 0082 9368 ldr r3, [r2, #8] +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2008 .loc 1 1545 26 view .LVU602 + 2009 0084 0421 movs r1, #4 + 2010 0086 0B43 orrs r3, r1 + 2011 0088 9360 str r3, [r2, #8] + 2012 .L147: +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2013 .loc 1 1555 1 view .LVU603 + 2014 008a 3800 movs r0, r7 + 2015 @ sp needed + 2016 .LVL141: + 2017 .LVL142: + 2018 .LVL143: +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2019 .loc 1 1555 1 view .LVU604 + 2020 008c F8BD pop {r3, r4, r5, r6, r7, pc} + 2021 .LVL144: + 2022 .L149: +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2023 .loc 1 1550 20 view .LVU605 + 2024 008e 0227 movs r7, #2 + 2025 0090 FBE7 b .L147 + 2026 .L150: +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2027 .loc 1 1486 5 discriminator 1 view .LVU606 + 2028 0092 0227 movs r7, #2 + 2029 0094 F9E7 b .L147 + 2030 .L153: + 2031 0096 C046 .align 2 + 2032 .L152: + 2033 0098 FEF0FFFF .word -3842 + 2034 009c 00000000 .word ADC_DMAConvCplt + 2035 00a0 00000000 .word ADC_DMAHalfConvCplt + 2036 00a4 00000000 .word ADC_DMAError + 2037 .cfi_endproc + 2038 .LFE50: + 2040 .section .text.HAL_ADC_Stop_DMA,"ax",%progbits + 2041 .align 1 + 2042 .global HAL_ADC_Stop_DMA + 2043 .syntax unified + 2044 .code 16 + 2045 .thumb_func + 2047 HAL_ADC_Stop_DMA: + 2048 .LVL145: + 2049 .LFB51: +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2050 .loc 1 1565 1 is_stmt 1 view -0 + ARM GAS /tmp/ccPDyDzP.s page 88 + + + 2051 .cfi_startproc + 2052 @ args = 0, pretend = 0, frame = 0 + 2053 @ frame_needed = 0, uses_anonymous_args = 0 +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2054 .loc 1 1565 1 is_stmt 0 view .LVU608 + 2055 0000 70B5 push {r4, r5, r6, lr} + 2056 .cfi_def_cfa_offset 16 + 2057 .cfi_offset 4, -16 + 2058 .cfi_offset 5, -12 + 2059 .cfi_offset 6, -8 + 2060 .cfi_offset 14, -4 + 2061 0002 0400 movs r4, r0 +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2062 .loc 1 1566 3 is_stmt 1 view .LVU609 + 2063 .LVL146: +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2064 .loc 1 1569 3 view .LVU610 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2065 .loc 1 1572 3 view .LVU611 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2066 .loc 1 1572 3 view .LVU612 + 2067 0004 3423 movs r3, #52 + 2068 0006 C35C ldrb r3, [r0, r3] + 2069 0008 012B cmp r3, #1 + 2070 000a 36D0 beq .L160 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2071 .loc 1 1572 3 discriminator 2 view .LVU613 + 2072 000c 3423 movs r3, #52 + 2073 000e 0122 movs r2, #1 + 2074 0010 C254 strb r2, [r0, r3] +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2075 .loc 1 1572 3 discriminator 2 view .LVU614 +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2076 .loc 1 1575 3 view .LVU615 +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2077 .loc 1 1575 20 is_stmt 0 view .LVU616 + 2078 0012 FFF7FEFF bl ADC_ConversionStop + 2079 .LVL147: +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2080 .loc 1 1575 20 view .LVU617 + 2081 0016 051E subs r5, r0, #0 + 2082 .LVL148: +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2083 .loc 1 1578 3 is_stmt 1 view .LVU618 +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2084 .loc 1 1578 6 is_stmt 0 view .LVU619 + 2085 0018 1DD1 bne .L156 +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2086 .loc 1 1581 5 is_stmt 1 view .LVU620 +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2087 .loc 1 1581 9 is_stmt 0 view .LVU621 + 2088 001a 2268 ldr r2, [r4] +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2089 .loc 1 1581 19 view .LVU622 + 2090 001c D368 ldr r3, [r2, #12] +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2091 .loc 1 1581 27 view .LVU623 + ARM GAS /tmp/ccPDyDzP.s page 89 + + + 2092 001e 0121 movs r1, #1 + 2093 0020 8B43 bics r3, r1 + 2094 0022 D360 str r3, [r2, #12] +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2095 .loc 1 1585 5 is_stmt 1 view .LVU624 +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2096 .loc 1 1585 13 is_stmt 0 view .LVU625 + 2097 0024 206B ldr r0, [r4, #48] + 2098 .LVL149: +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2099 .loc 1 1585 25 view .LVU626 + 2100 0026 2123 movs r3, #33 + 2101 0028 C35C ldrb r3, [r0, r3] +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2102 .loc 1 1585 8 view .LVU627 + 2103 002a 022B cmp r3, #2 + 2104 002c 18D0 beq .L161 + 2105 .LVL150: + 2106 .L157: +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2107 .loc 1 1598 5 is_stmt 1 view .LVU628 + 2108 002e 2268 ldr r2, [r4] + 2109 0030 5368 ldr r3, [r2, #4] + 2110 0032 1021 movs r1, #16 + 2111 0034 8B43 bics r3, r1 + 2112 0036 5360 str r3, [r2, #4] +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2113 .loc 1 1603 5 view .LVU629 +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2114 .loc 1 1603 8 is_stmt 0 view .LVU630 + 2115 0038 002D cmp r5, #0 + 2116 003a 1AD1 bne .L158 +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2117 .loc 1 1605 7 is_stmt 1 view .LVU631 +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2118 .loc 1 1605 24 is_stmt 0 view .LVU632 + 2119 003c 2000 movs r0, r4 + 2120 003e FFF7FEFF bl ADC_Disable + 2121 .LVL151: + 2122 0042 0500 movs r5, r0 + 2123 .LVL152: + 2124 .L159: +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2125 .loc 1 1613 5 is_stmt 1 view .LVU633 +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2126 .loc 1 1613 8 is_stmt 0 view .LVU634 + 2127 0044 002D cmp r5, #0 + 2128 0046 06D1 bne .L156 +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 2129 .loc 1 1616 7 is_stmt 1 view .LVU635 + 2130 0048 A36B ldr r3, [r4, #56] + 2131 004a 0D4A ldr r2, .L162 + 2132 004c 1340 ands r3, r2 + 2133 004e 0432 adds r2, r2, #4 + 2134 0050 FF32 adds r2, r2, #255 + 2135 0052 1343 orrs r3, r2 + 2136 0054 A363 str r3, [r4, #56] + ARM GAS /tmp/ccPDyDzP.s page 90 + + + 2137 .LVL153: + 2138 .L156: +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2139 .loc 1 1624 3 view .LVU636 +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2140 .loc 1 1624 3 view .LVU637 + 2141 0056 3423 movs r3, #52 + 2142 0058 0022 movs r2, #0 + 2143 005a E254 strb r2, [r4, r3] +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2144 .loc 1 1624 3 view .LVU638 +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2145 .loc 1 1627 3 view .LVU639 + 2146 .LVL154: + 2147 .L155: +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2148 .loc 1 1628 1 is_stmt 0 view .LVU640 + 2149 005c 2800 movs r0, r5 + 2150 @ sp needed + 2151 .LVL155: +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2152 .loc 1 1628 1 view .LVU641 + 2153 005e 70BD pop {r4, r5, r6, pc} + 2154 .LVL156: + 2155 .L161: +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2156 .loc 1 1587 7 is_stmt 1 view .LVU642 +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2157 .loc 1 1587 24 is_stmt 0 view .LVU643 + 2158 0060 FFF7FEFF bl HAL_DMA_Abort + 2159 .LVL157: + 2160 0064 051E subs r5, r0, #0 + 2161 .LVL158: +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2162 .loc 1 1590 7 is_stmt 1 view .LVU644 +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2163 .loc 1 1590 10 is_stmt 0 view .LVU645 + 2164 0066 E2D0 beq .L157 +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2165 .loc 1 1593 9 is_stmt 1 view .LVU646 + 2166 0068 A36B ldr r3, [r4, #56] + 2167 006a 4022 movs r2, #64 + 2168 006c 1343 orrs r3, r2 + 2169 006e A363 str r3, [r4, #56] + 2170 0070 DDE7 b .L157 + 2171 .LVL159: + 2172 .L158: +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2173 .loc 1 1609 7 view .LVU647 + 2174 0072 2000 movs r0, r4 + 2175 0074 FFF7FEFF bl ADC_Disable + 2176 .LVL160: + 2177 0078 E4E7 b .L159 + 2178 .LVL161: + 2179 .L160: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2180 .loc 1 1572 3 is_stmt 0 discriminator 1 view .LVU648 + ARM GAS /tmp/ccPDyDzP.s page 91 + + + 2181 007a 0225 movs r5, #2 + 2182 007c EEE7 b .L155 + 2183 .L163: + 2184 007e C046 .align 2 + 2185 .L162: + 2186 0080 FEFEFFFF .word -258 + 2187 .cfi_endproc + 2188 .LFE51: + 2190 .section .text.HAL_ADC_GetValue,"ax",%progbits + 2191 .align 1 + 2192 .global HAL_ADC_GetValue + 2193 .syntax unified + 2194 .code 16 + 2195 .thumb_func + 2197 HAL_ADC_GetValue: + 2198 .LVL162: + 2199 .LFB52: +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 2200 .loc 1 1650 1 is_stmt 1 view -0 + 2201 .cfi_startproc + 2202 @ args = 0, pretend = 0, frame = 0 + 2203 @ frame_needed = 0, uses_anonymous_args = 0 + 2204 @ link register save eliminated. +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2205 .loc 1 1652 3 view .LVU650 +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2206 .loc 1 1658 3 view .LVU651 +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2207 .loc 1 1658 14 is_stmt 0 view .LVU652 + 2208 0000 0368 ldr r3, [r0] +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2209 .loc 1 1658 24 view .LVU653 + 2210 0002 186C ldr r0, [r3, #64] + 2211 .LVL163: +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2212 .loc 1 1659 1 view .LVU654 + 2213 @ sp needed + 2214 0004 7047 bx lr + 2215 .cfi_endproc + 2216 .LFE52: + 2218 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits + 2219 .align 1 + 2220 .weak HAL_ADC_ConvCpltCallback + 2221 .syntax unified + 2222 .code 16 + 2223 .thumb_func + 2225 HAL_ADC_ConvCpltCallback: + 2226 .LVL164: + 2227 .LFB54: +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2228 .loc 1 1795 1 is_stmt 1 view -0 + 2229 .cfi_startproc + 2230 @ args = 0, pretend = 0, frame = 0 + 2231 @ frame_needed = 0, uses_anonymous_args = 0 + 2232 @ link register save eliminated. +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2233 .loc 1 1797 3 view .LVU656 + ARM GAS /tmp/ccPDyDzP.s page 92 + + +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2234 .loc 1 1802 1 is_stmt 0 view .LVU657 + 2235 @ sp needed + 2236 0000 7047 bx lr + 2237 .cfi_endproc + 2238 .LFE54: + 2240 .section .text.ADC_DMAConvCplt,"ax",%progbits + 2241 .align 1 + 2242 .syntax unified + 2243 .code 16 + 2244 .thumb_func + 2246 ADC_DMAConvCplt: + 2247 .LVL165: + 2248 .LFB65: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA transfer complete callback. +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2249 .loc 1 2377 1 is_stmt 1 view -0 + 2250 .cfi_startproc + 2251 @ args = 0, pretend = 0, frame = 0 + 2252 @ frame_needed = 0, uses_anonymous_args = 0 + 2253 .loc 1 2377 1 is_stmt 0 view .LVU659 + 2254 0000 10B5 push {r4, lr} + 2255 .cfi_def_cfa_offset 8 + 2256 .cfi_offset 4, -8 + 2257 .cfi_offset 14, -4 +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 2258 .loc 1 2379 3 is_stmt 1 view .LVU660 + 2259 .loc 1 2379 22 is_stmt 0 view .LVU661 + 2260 0002 436A ldr r3, [r0, #36] + 2261 .LVL166: +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) + 2262 .loc 1 2382 3 is_stmt 1 view .LVU662 + 2263 .loc 1 2382 7 is_stmt 0 view .LVU663 + 2264 0004 9A6B ldr r2, [r3, #56] + 2265 0006 5021 movs r1, #80 + 2266 .loc 1 2382 6 view .LVU664 + 2267 0008 1142 tst r1, r2 + 2268 000a 2BD1 bne .L167 +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); + 2269 .loc 1 2385 5 is_stmt 1 view .LVU665 + 2270 000c 996B ldr r1, [r3, #56] + 2271 000e 8022 movs r2, #128 + 2272 0010 9200 lsls r2, r2, #2 + 2273 0012 0A43 orrs r2, r1 + 2274 0014 9A63 str r2, [r3, #56] + ARM GAS /tmp/ccPDyDzP.s page 93 + + +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && + 2275 .loc 1 2389 5 view .LVU666 + 2276 .loc 1 2389 8 is_stmt 0 view .LVU667 + 2277 0016 1A68 ldr r2, [r3] + 2278 0018 D068 ldr r0, [r2, #12] + 2279 .LVL167: + 2280 .loc 1 2389 8 view .LVU668 + 2281 001a C021 movs r1, #192 + 2282 001c 0901 lsls r1, r1, #4 + 2283 .loc 1 2389 7 view .LVU669 + 2284 001e 0842 tst r0, r1 + 2285 0020 13D1 bne .L168 +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2286 .loc 1 2390 19 view .LVU670 + 2287 0022 997E ldrb r1, [r3, #26] +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2288 .loc 1 2389 51 discriminator 1 view .LVU671 + 2289 0024 0029 cmp r1, #0 + 2290 0026 10D1 bne .L168 +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) + 2291 .loc 1 2393 7 is_stmt 1 view .LVU672 + 2292 .loc 1 2393 11 is_stmt 0 view .LVU673 + 2293 0028 1168 ldr r1, [r2] + 2294 .loc 1 2393 9 view .LVU674 + 2295 002a 0907 lsls r1, r1, #28 + 2296 002c 0DD5 bpl .L168 +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + 2297 .loc 1 2397 9 is_stmt 1 view .LVU675 + 2298 .loc 1 2397 13 is_stmt 0 view .LVU676 + 2299 002e 9168 ldr r1, [r2, #8] + 2300 .loc 1 2397 12 view .LVU677 + 2301 0030 4907 lsls r1, r1, #29 + 2302 0032 0ED4 bmi .L169 +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); + 2303 .loc 1 2403 11 is_stmt 1 view .LVU678 + 2304 0034 5168 ldr r1, [r2, #4] + 2305 0036 0C20 movs r0, #12 + 2306 0038 8143 bics r1, r0 + 2307 003a 5160 str r1, [r2, #4] +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 2308 .loc 1 2406 11 view .LVU679 + 2309 003c 9A6B ldr r2, [r3, #56] + ARM GAS /tmp/ccPDyDzP.s page 94 + + + 2310 003e 0B49 ldr r1, .L172 + 2311 0040 0A40 ands r2, r1 + 2312 0042 0431 adds r1, r1, #4 + 2313 0044 FF31 adds r1, r1, #255 + 2314 0046 0A43 orrs r2, r1 + 2315 0048 9A63 str r2, [r3, #56] + 2316 .L168: +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Conversion complete callback */ +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback(hadc); +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); + 2317 .loc 1 2425 5 view .LVU680 + 2318 004a 1800 movs r0, r3 + 2319 004c FFF7FEFF bl HAL_ADC_ConvCpltCallback + 2320 .LVL168: + 2321 .L166: +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Call DMA error callback */ +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback(hdma); +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2322 .loc 1 2434 1 is_stmt 0 view .LVU681 + 2323 @ sp needed + 2324 0050 10BD pop {r4, pc} + 2325 .LVL169: + 2326 .L169: +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2327 .loc 1 2413 11 is_stmt 1 view .LVU682 + 2328 0052 9A6B ldr r2, [r3, #56] + 2329 0054 2021 movs r1, #32 + 2330 0056 0A43 orrs r2, r1 + 2331 0058 9A63 str r2, [r3, #56] +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2332 .loc 1 2416 11 view .LVU683 + 2333 005a DA6B ldr r2, [r3, #60] + 2334 005c 1F39 subs r1, r1, #31 + 2335 005e 0A43 orrs r2, r1 + 2336 0060 DA63 str r2, [r3, #60] + ARM GAS /tmp/ccPDyDzP.s page 95 + + + 2337 0062 F2E7 b .L168 + 2338 .LVL170: + 2339 .L167: +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2340 .loc 1 2431 5 view .LVU684 +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2341 .loc 1 2431 9 is_stmt 0 view .LVU685 + 2342 0064 1B6B ldr r3, [r3, #48] + 2343 .LVL171: +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2344 .loc 1 2431 21 view .LVU686 + 2345 0066 1B6B ldr r3, [r3, #48] +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2346 .loc 1 2431 5 view .LVU687 + 2347 0068 9847 blx r3 + 2348 .LVL172: + 2349 .loc 1 2434 1 view .LVU688 + 2350 006a F1E7 b .L166 + 2351 .L173: + 2352 .align 2 + 2353 .L172: + 2354 006c FEFEFFFF .word -258 + 2355 .cfi_endproc + 2356 .LFE65: + 2358 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits + 2359 .align 1 + 2360 .weak HAL_ADC_ConvHalfCpltCallback + 2361 .syntax unified + 2362 .code 16 + 2363 .thumb_func + 2365 HAL_ADC_ConvHalfCpltCallback: + 2366 .LVL173: + 2367 .LFB55: +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2368 .loc 1 1810 1 is_stmt 1 view -0 + 2369 .cfi_startproc + 2370 @ args = 0, pretend = 0, frame = 0 + 2371 @ frame_needed = 0, uses_anonymous_args = 0 + 2372 @ link register save eliminated. +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2373 .loc 1 1812 3 view .LVU690 +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2374 .loc 1 1817 1 is_stmt 0 view .LVU691 + 2375 @ sp needed + 2376 0000 7047 bx lr + 2377 .cfi_endproc + 2378 .LFE55: + 2380 .section .text.ADC_DMAHalfConvCplt,"ax",%progbits + 2381 .align 1 + 2382 .syntax unified + 2383 .code 16 + 2384 .thumb_func + 2386 ADC_DMAHalfConvCplt: + 2387 .LVL174: + 2388 .LFB66: +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + ARM GAS /tmp/ccPDyDzP.s page 96 + + +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA half transfer complete callback. +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2389 .loc 1 2442 1 is_stmt 1 view -0 + 2390 .cfi_startproc + 2391 @ args = 0, pretend = 0, frame = 0 + 2392 @ frame_needed = 0, uses_anonymous_args = 0 + 2393 .loc 1 2442 1 is_stmt 0 view .LVU693 + 2394 0000 10B5 push {r4, lr} + 2395 .cfi_def_cfa_offset 8 + 2396 .cfi_offset 4, -8 + 2397 .cfi_offset 14, -4 +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 2398 .loc 1 2444 3 is_stmt 1 view .LVU694 + 2399 .loc 1 2444 22 is_stmt 0 view .LVU695 + 2400 0002 406A ldr r0, [r0, #36] + 2401 .LVL175: +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Half conversion callback */ +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback(hadc); +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvHalfCpltCallback(hadc); + 2402 .loc 1 2450 3 is_stmt 1 view .LVU696 + 2403 0004 FFF7FEFF bl HAL_ADC_ConvHalfCpltCallback + 2404 .LVL176: +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2405 .loc 1 2452 1 is_stmt 0 view .LVU697 + 2406 @ sp needed + 2407 0008 10BD pop {r4, pc} + 2408 .cfi_endproc + 2409 .LFE66: + 2411 .section .text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits + 2412 .align 1 + 2413 .weak HAL_ADC_LevelOutOfWindowCallback + 2414 .syntax unified + 2415 .code 16 + 2416 .thumb_func + 2418 HAL_ADC_LevelOutOfWindowCallback: + 2419 .LVL177: + 2420 .LFB56: +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2421 .loc 1 1825 1 is_stmt 1 view -0 + 2422 .cfi_startproc + 2423 @ args = 0, pretend = 0, frame = 0 + 2424 @ frame_needed = 0, uses_anonymous_args = 0 + 2425 @ link register save eliminated. +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2426 .loc 1 1827 3 view .LVU699 +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2427 .loc 1 1832 1 is_stmt 0 view .LVU700 + 2428 @ sp needed + ARM GAS /tmp/ccPDyDzP.s page 97 + + + 2429 0000 7047 bx lr + 2430 .cfi_endproc + 2431 .LFE56: + 2433 .section .text.HAL_ADC_ErrorCallback,"ax",%progbits + 2434 .align 1 + 2435 .weak HAL_ADC_ErrorCallback + 2436 .syntax unified + 2437 .code 16 + 2438 .thumb_func + 2440 HAL_ADC_ErrorCallback: + 2441 .LVL178: + 2442 .LFB57: +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2443 .loc 1 1841 1 is_stmt 1 view -0 + 2444 .cfi_startproc + 2445 @ args = 0, pretend = 0, frame = 0 + 2446 @ frame_needed = 0, uses_anonymous_args = 0 + 2447 @ link register save eliminated. +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2448 .loc 1 1843 3 view .LVU702 +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2449 .loc 1 1848 1 is_stmt 0 view .LVU703 + 2450 @ sp needed + 2451 0000 7047 bx lr + 2452 .cfi_endproc + 2453 .LFE57: + 2455 .section .text.ADC_DMAError,"ax",%progbits + 2456 .align 1 + 2457 .syntax unified + 2458 .code 16 + 2459 .thumb_func + 2461 ADC_DMAError: + 2462 .LVL179: + 2463 .LFB67: +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA error callback +2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma) +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2464 .loc 1 2460 1 is_stmt 1 view -0 + 2465 .cfi_startproc + 2466 @ args = 0, pretend = 0, frame = 0 + 2467 @ frame_needed = 0, uses_anonymous_args = 0 + 2468 .loc 1 2460 1 is_stmt 0 view .LVU705 + 2469 0000 10B5 push {r4, lr} + 2470 .cfi_def_cfa_offset 8 + 2471 .cfi_offset 4, -8 + 2472 .cfi_offset 14, -4 +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 2473 .loc 1 2462 3 is_stmt 1 view .LVU706 + 2474 .loc 1 2462 22 is_stmt 0 view .LVU707 + 2475 0002 406A ldr r0, [r0, #36] + 2476 .LVL180: + ARM GAS /tmp/ccPDyDzP.s page 98 + + +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); + 2477 .loc 1 2465 3 is_stmt 1 view .LVU708 + 2478 0004 836B ldr r3, [r0, #56] + 2479 0006 4022 movs r2, #64 + 2480 0008 1343 orrs r3, r2 + 2481 000a 8363 str r3, [r0, #56] +2466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to DMA error */ +2468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); + 2482 .loc 1 2468 3 view .LVU709 + 2483 000c C36B ldr r3, [r0, #60] + 2484 000e 3C3A subs r2, r2, #60 + 2485 0010 1343 orrs r3, r2 + 2486 0012 C363 str r3, [r0, #60] +2469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Error callback */ +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback(hadc); +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); + 2487 .loc 1 2474 3 view .LVU710 + 2488 0014 FFF7FEFF bl HAL_ADC_ErrorCallback + 2489 .LVL181: +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2490 .loc 1 2476 1 is_stmt 0 view .LVU711 + 2491 @ sp needed + 2492 0018 10BD pop {r4, pc} + 2493 .cfi_endproc + 2494 .LFE67: + 2496 .section .text.HAL_ADC_IRQHandler,"ax",%progbits + 2497 .align 1 + 2498 .global HAL_ADC_IRQHandler + 2499 .syntax unified + 2500 .code 16 + 2501 .thumb_func + 2503 HAL_ADC_IRQHandler: + 2504 .LVL182: + 2505 .LFB53: +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_isr = hadc->Instance->ISR; + 2506 .loc 1 1667 1 is_stmt 1 view -0 + 2507 .cfi_startproc + 2508 @ args = 0, pretend = 0, frame = 0 + 2509 @ frame_needed = 0, uses_anonymous_args = 0 +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_isr = hadc->Instance->ISR; + 2510 .loc 1 1667 1 is_stmt 0 view .LVU713 + 2511 0000 70B5 push {r4, r5, r6, lr} + 2512 .cfi_def_cfa_offset 16 + 2513 .cfi_offset 4, -16 + 2514 .cfi_offset 5, -12 + 2515 .cfi_offset 6, -8 + 2516 .cfi_offset 14, -4 + 2517 0002 0400 movs r4, r0 +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; + 2518 .loc 1 1668 3 is_stmt 1 view .LVU714 + ARM GAS /tmp/ccPDyDzP.s page 99 + + +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; + 2519 .loc 1 1668 26 is_stmt 0 view .LVU715 + 2520 0004 0368 ldr r3, [r0] +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; + 2521 .loc 1 1668 12 view .LVU716 + 2522 0006 1D68 ldr r5, [r3] + 2523 .LVL183: +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2524 .loc 1 1669 3 is_stmt 1 view .LVU717 +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2525 .loc 1 1669 12 is_stmt 0 view .LVU718 + 2526 0008 5E68 ldr r6, [r3, #4] + 2527 .LVL184: +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + 2528 .loc 1 1672 3 is_stmt 1 view .LVU719 +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + 2529 .loc 1 1673 3 view .LVU720 +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2530 .loc 1 1674 3 view .LVU721 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) + 2531 .loc 1 1677 3 view .LVU722 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) + 2532 .loc 1 1677 5 is_stmt 0 view .LVU723 + 2533 000a 6A07 lsls r2, r5, #29 + 2534 000c 01D5 bpl .L180 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) + 2535 .loc 1 1677 51 discriminator 1 view .LVU724 + 2536 000e 7207 lsls r2, r6, #29 + 2537 0010 03D4 bmi .L181 + 2538 .L180: +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) + 2539 .loc 1 1677 94 discriminator 3 view .LVU725 + 2540 0012 2A07 lsls r2, r5, #28 + 2541 0014 27D5 bpl .L182 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2542 .loc 1 1678 51 view .LVU726 + 2543 0016 3207 lsls r2, r6, #28 + 2544 0018 25D5 bpl .L182 + 2545 .L181: +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2546 .loc 1 1681 5 is_stmt 1 view .LVU727 +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2547 .loc 1 1681 9 is_stmt 0 view .LVU728 + 2548 001a A26B ldr r2, [r4, #56] +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2549 .loc 1 1681 8 view .LVU729 + 2550 001c D206 lsls r2, r2, #27 + 2551 001e 04D4 bmi .L183 +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2552 .loc 1 1684 7 is_stmt 1 view .LVU730 + 2553 0020 A16B ldr r1, [r4, #56] + 2554 0022 8022 movs r2, #128 + 2555 0024 9200 lsls r2, r2, #2 + 2556 0026 0A43 orrs r2, r1 + 2557 0028 A263 str r2, [r4, #56] + 2558 .L183: +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + ARM GAS /tmp/ccPDyDzP.s page 100 + + + 2559 .loc 1 1689 5 view .LVU731 +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2560 .loc 1 1689 8 is_stmt 0 view .LVU732 + 2561 002a D968 ldr r1, [r3, #12] + 2562 002c C022 movs r2, #192 + 2563 002e 1201 lsls r2, r2, #4 +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2564 .loc 1 1689 7 view .LVU733 + 2565 0030 1142 tst r1, r2 + 2566 0032 12D1 bne .L184 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2567 .loc 1 1690 19 view .LVU734 + 2568 0034 A27E ldrb r2, [r4, #26] +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2569 .loc 1 1689 51 discriminator 1 view .LVU735 + 2570 0036 002A cmp r2, #0 + 2571 0038 0FD1 bne .L184 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2572 .loc 1 1693 7 is_stmt 1 view .LVU736 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2573 .loc 1 1693 9 is_stmt 0 view .LVU737 + 2574 003a 2A07 lsls r2, r5, #28 + 2575 003c 0DD5 bpl .L184 +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2576 .loc 1 1697 9 is_stmt 1 view .LVU738 +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2577 .loc 1 1697 13 is_stmt 0 view .LVU739 + 2578 003e 9A68 ldr r2, [r3, #8] +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2579 .loc 1 1697 12 view .LVU740 + 2580 0040 5207 lsls r2, r2, #29 + 2581 0042 2DD4 bmi .L185 +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2582 .loc 1 1703 11 is_stmt 1 view .LVU741 + 2583 0044 5A68 ldr r2, [r3, #4] + 2584 0046 0C21 movs r1, #12 + 2585 0048 8A43 bics r2, r1 + 2586 004a 5A60 str r2, [r3, #4] +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 2587 .loc 1 1706 11 view .LVU742 + 2588 004c A36B ldr r3, [r4, #56] + 2589 004e 1F4A ldr r2, .L202 + 2590 0050 1340 ands r3, r2 + 2591 0052 0432 adds r2, r2, #4 + 2592 0054 FF32 adds r2, r2, #255 + 2593 0056 1343 orrs r3, r2 + 2594 0058 A363 str r3, [r4, #56] + 2595 .L184: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2596 .loc 1 1727 5 view .LVU743 + 2597 005a 2000 movs r0, r4 + 2598 .LVL185: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2599 .loc 1 1727 5 is_stmt 0 view .LVU744 + 2600 005c FFF7FEFF bl HAL_ADC_ConvCpltCallback + 2601 .LVL186: +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccPDyDzP.s page 101 + + + 2602 .loc 1 1736 5 is_stmt 1 view .LVU745 + 2603 0060 2368 ldr r3, [r4] + 2604 0062 0C22 movs r2, #12 + 2605 0064 1A60 str r2, [r3] + 2606 .L182: +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2607 .loc 1 1740 3 view .LVU746 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2608 .loc 1 1740 5 is_stmt 0 view .LVU747 + 2609 0066 2B06 lsls r3, r5, #24 + 2610 0068 01D5 bpl .L186 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2611 .loc 1 1740 49 discriminator 1 view .LVU748 + 2612 006a 3306 lsls r3, r6, #24 + 2613 006c 21D4 bmi .L201 + 2614 .L186: +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2615 .loc 1 1758 3 is_stmt 1 view .LVU749 +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2616 .loc 1 1758 5 is_stmt 0 view .LVU750 + 2617 006e ED06 lsls r5, r5, #27 + 2618 0070 15D5 bpl .L179 + 2619 .LVL187: +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2620 .loc 1 1758 49 discriminator 1 view .LVU751 + 2621 0072 F606 lsls r6, r6, #27 + 2622 0074 13D5 bpl .L179 + 2623 .LVL188: +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2624 .loc 1 1766 5 is_stmt 1 view .LVU752 +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2625 .loc 1 1766 20 is_stmt 0 view .LVU753 + 2626 0076 A36A ldr r3, [r4, #40] +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2627 .loc 1 1766 8 view .LVU754 + 2628 0078 012B cmp r3, #1 + 2629 007a 03D0 beq .L188 +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2630 .loc 1 1767 9 view .LVU755 + 2631 007c 2368 ldr r3, [r4] + 2632 007e DB68 ldr r3, [r3, #12] +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2633 .loc 1 1766 67 discriminator 1 view .LVU756 + 2634 0080 DB07 lsls r3, r3, #31 + 2635 0082 09D5 bpl .L189 + 2636 .L188: +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2637 .loc 1 1770 7 is_stmt 1 view .LVU757 + 2638 0084 E36B ldr r3, [r4, #60] + 2639 0086 0222 movs r2, #2 + 2640 0088 1343 orrs r3, r2 + 2641 008a E363 str r3, [r4, #60] +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2642 .loc 1 1773 7 view .LVU758 + 2643 008c 2368 ldr r3, [r4] + 2644 008e 0E32 adds r2, r2, #14 + 2645 0090 1A60 str r2, [r3] + ARM GAS /tmp/ccPDyDzP.s page 102 + + +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2646 .loc 1 1778 7 view .LVU759 + 2647 0092 2000 movs r0, r4 + 2648 0094 FFF7FEFF bl HAL_ADC_ErrorCallback + 2649 .LVL189: + 2650 .L189: +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2651 .loc 1 1783 5 view .LVU760 + 2652 0098 2368 ldr r3, [r4] + 2653 009a 1022 movs r2, #16 + 2654 009c 1A60 str r2, [r3] + 2655 .L179: +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2656 .loc 1 1786 1 is_stmt 0 view .LVU761 + 2657 @ sp needed + 2658 .LVL190: +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2659 .loc 1 1786 1 view .LVU762 + 2660 009e 70BD pop {r4, r5, r6, pc} + 2661 .LVL191: + 2662 .L185: +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2663 .loc 1 1713 11 is_stmt 1 view .LVU763 + 2664 00a0 A36B ldr r3, [r4, #56] + 2665 00a2 2022 movs r2, #32 + 2666 00a4 1343 orrs r3, r2 + 2667 00a6 A363 str r3, [r4, #56] +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2668 .loc 1 1716 11 view .LVU764 + 2669 00a8 E36B ldr r3, [r4, #60] + 2670 00aa 1F3A subs r2, r2, #31 + 2671 00ac 1343 orrs r3, r2 + 2672 00ae E363 str r3, [r4, #60] + 2673 00b0 D3E7 b .L184 + 2674 .LVL192: + 2675 .L201: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2676 .loc 1 1743 7 view .LVU765 + 2677 00b2 A26B ldr r2, [r4, #56] + 2678 00b4 8023 movs r3, #128 + 2679 00b6 5B02 lsls r3, r3, #9 + 2680 00b8 1343 orrs r3, r2 + 2681 00ba A363 str r3, [r4, #56] +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2682 .loc 1 1748 5 view .LVU766 + 2683 00bc 2000 movs r0, r4 + 2684 00be FFF7FEFF bl HAL_ADC_LevelOutOfWindowCallback + 2685 .LVL193: +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2686 .loc 1 1752 5 view .LVU767 + 2687 00c2 2368 ldr r3, [r4] + 2688 00c4 8022 movs r2, #128 + 2689 00c6 1A60 str r2, [r3] + 2690 00c8 D1E7 b .L186 + 2691 .L203: + 2692 00ca C046 .align 2 + 2693 .L202: + ARM GAS /tmp/ccPDyDzP.s page 103 + + + 2694 00cc FEFEFFFF .word -258 + 2695 .cfi_endproc + 2696 .LFE53: + 2698 .section .text.HAL_ADC_ConfigChannel,"ax",%progbits + 2699 .align 1 + 2700 .global HAL_ADC_ConfigChannel + 2701 .syntax unified + 2702 .code 16 + 2703 .thumb_func + 2705 HAL_ADC_ConfigChannel: + 2706 .LVL194: + 2707 .LFB58: +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2708 .loc 1 1895 1 view -0 + 2709 .cfi_startproc + 2710 @ args = 0, pretend = 0, frame = 8 + 2711 @ frame_needed = 0, uses_anonymous_args = 0 +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2712 .loc 1 1895 1 is_stmt 0 view .LVU769 + 2713 0000 30B5 push {r4, r5, lr} + 2714 .cfi_def_cfa_offset 12 + 2715 .cfi_offset 4, -12 + 2716 .cfi_offset 5, -8 + 2717 .cfi_offset 14, -4 + 2718 0002 83B0 sub sp, sp, #12 + 2719 .cfi_def_cfa_offset 24 + 2720 0004 0400 movs r4, r0 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2721 .loc 1 1896 3 is_stmt 1 view .LVU770 + 2722 .LVL195: +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2723 .loc 1 1897 3 view .LVU771 +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2724 .loc 1 1897 17 is_stmt 0 view .LVU772 + 2725 0006 0023 movs r3, #0 + 2726 0008 0193 str r3, [sp, #4] +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(sConfig->Channel)); + 2727 .loc 1 1900 3 is_stmt 1 view .LVU773 +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANK(sConfig->Rank)); + 2728 .loc 1 1901 3 view .LVU774 +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2729 .loc 1 1902 3 view .LVU775 +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2730 .loc 1 1904 3 view .LVU776 +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2731 .loc 1 1906 5 view .LVU777 +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2732 .loc 1 1910 3 view .LVU778 +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2733 .loc 1 1910 3 view .LVU779 + 2734 000a 3433 adds r3, r3, #52 + 2735 000c C35C ldrb r3, [r0, r3] + 2736 000e 012B cmp r3, #1 + 2737 0010 00D1 bne .LCB2528 + 2738 0012 81E0 b .L216 @long jump + 2739 .LCB2528: +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 104 + + + 2740 .loc 1 1910 3 discriminator 2 view .LVU780 + 2741 0014 3423 movs r3, #52 + 2742 0016 0122 movs r2, #1 + 2743 0018 C254 strb r2, [r0, r3] +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2744 .loc 1 1910 3 discriminator 2 view .LVU781 +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2745 .loc 1 1918 3 view .LVU782 +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2746 .loc 1 1918 7 is_stmt 0 view .LVU783 + 2747 001a 0268 ldr r2, [r0] + 2748 001c 9368 ldr r3, [r2, #8] +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2749 .loc 1 1918 6 view .LVU784 + 2750 001e 5B07 lsls r3, r3, #29 + 2751 0020 6CD4 bmi .L206 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2752 .loc 1 1922 5 is_stmt 1 view .LVU785 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2753 .loc 1 1922 16 is_stmt 0 view .LVU786 + 2754 0022 4868 ldr r0, [r1, #4] + 2755 .LVL196: +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2756 .loc 1 1922 8 view .LVU787 + 2757 0024 3D4B ldr r3, .L227 + 2758 0026 9842 cmp r0, r3 + 2759 0028 4DD0 beq .L207 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2760 .loc 1 1926 7 is_stmt 1 view .LVU788 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2761 .loc 1 1926 21 is_stmt 0 view .LVU789 + 2762 002a 936A ldr r3, [r2, #40] +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2763 .loc 1 1926 33 view .LVU790 + 2764 002c 0D68 ldr r5, [r1] + 2765 002e 0120 movs r0, #1 + 2766 0030 A840 lsls r0, r0, r5 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2767 .loc 1 1926 30 view .LVU791 + 2768 0032 0343 orrs r3, r0 + 2769 0034 9362 str r3, [r2, #40] +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2770 .loc 1 1933 7 is_stmt 1 view .LVU792 +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2771 .loc 1 1933 13 is_stmt 0 view .LVU793 + 2772 0036 E36A ldr r3, [r4, #44] + 2773 0038 072B cmp r3, #7 + 2774 003a 27D8 bhi .L208 + 2775 003c 002B cmp r3, #0 + 2776 003e 10D1 bne .L209 + 2777 .L210: +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2778 .loc 1 1937 9 is_stmt 1 view .LVU794 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2779 .loc 1 1937 20 is_stmt 0 view .LVU795 + 2780 0040 8868 ldr r0, [r1, #8] +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccPDyDzP.s page 105 + + + 2781 .loc 1 1937 38 view .LVU796 + 2782 0042 2268 ldr r2, [r4] + 2783 0044 5569 ldr r5, [r2, #20] + 2784 0046 0723 movs r3, #7 + 2785 0048 2B40 ands r3, r5 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2786 .loc 1 1937 12 view .LVU797 + 2787 004a 9842 cmp r0, r3 + 2788 004c 09D0 beq .L209 +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2789 .loc 1 1941 11 is_stmt 1 view .LVU798 +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2790 .loc 1 1941 25 is_stmt 0 view .LVU799 + 2791 004e 5069 ldr r0, [r2, #20] +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2792 .loc 1 1941 32 view .LVU800 + 2793 0050 0723 movs r3, #7 + 2794 0052 9843 bics r0, r3 + 2795 0054 5061 str r0, [r2, #20] +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2796 .loc 1 1944 11 is_stmt 1 view .LVU801 +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2797 .loc 1 1944 15 is_stmt 0 view .LVU802 + 2798 0056 2068 ldr r0, [r4] +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2799 .loc 1 1944 25 view .LVU803 + 2800 0058 4269 ldr r2, [r0, #20] +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2801 .loc 1 1944 35 view .LVU804 + 2802 005a 8D68 ldr r5, [r1, #8] + 2803 005c 2B40 ands r3, r5 +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2804 .loc 1 1944 32 view .LVU805 + 2805 005e 1343 orrs r3, r2 + 2806 0060 4361 str r3, [r0, #20] + 2807 .L209: +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2808 .loc 1 1954 7 is_stmt 1 view .LVU806 +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2809 .loc 1 1954 10 is_stmt 0 view .LVU807 + 2810 0062 0B68 ldr r3, [r1] + 2811 0064 1A00 movs r2, r3 + 2812 0066 103A subs r2, r2, #16 +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2813 .loc 1 1954 9 view .LVU808 + 2814 0068 022A cmp r2, #2 + 2815 006a 51D8 bhi .L217 +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2816 .loc 1 1959 9 is_stmt 1 view .LVU809 +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2817 .loc 1 1959 12 is_stmt 0 view .LVU810 + 2818 006c 2C4A ldr r2, .L227+4 + 2819 006e 1268 ldr r2, [r2] +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2820 .loc 1 1959 21 view .LVU811 + 2821 0070 102B cmp r3, #16 + 2822 0072 13D0 beq .L218 + ARM GAS /tmp/ccPDyDzP.s page 106 + + +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2823 .loc 1 1959 21 discriminator 1 view .LVU812 + 2824 0074 112B cmp r3, #17 + 2825 0076 0ED0 beq .L224 +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2826 .loc 1 1959 21 discriminator 4 view .LVU813 + 2827 0078 8023 movs r3, #128 + 2828 007a 5B04 lsls r3, r3, #17 + 2829 .L212: +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2830 .loc 1 1959 18 discriminator 8 view .LVU814 + 2831 007c 1343 orrs r3, r2 + 2832 007e 284A ldr r2, .L227+4 + 2833 0080 1360 str r3, [r2] +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2834 .loc 1 1962 9 is_stmt 1 view .LVU815 +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2835 .loc 1 1962 20 is_stmt 0 view .LVU816 + 2836 0082 0B68 ldr r3, [r1] +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2837 .loc 1 1962 12 view .LVU817 + 2838 0084 102B cmp r3, #16 + 2839 0086 0CD0 beq .L225 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2840 .loc 1 1896 21 view .LVU818 + 2841 0088 0020 movs r0, #0 + 2842 008a 3CE0 b .L211 + 2843 .L208: +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2844 .loc 1 1896 21 view .LVU819 + 2845 008c 8022 movs r2, #128 + 2846 008e 5205 lsls r2, r2, #21 + 2847 0090 9342 cmp r3, r2 + 2848 0092 E6D0 beq .L209 + 2849 0094 D4E7 b .L210 + 2850 .L224: +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2851 .loc 1 1959 21 discriminator 3 view .LVU820 + 2852 0096 8023 movs r3, #128 + 2853 0098 DB03 lsls r3, r3, #15 + 2854 009a EFE7 b .L212 + 2855 .L218: +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2856 .loc 1 1959 21 discriminator 2 view .LVU821 + 2857 009c 8023 movs r3, #128 + 2858 009e 1B04 lsls r3, r3, #16 + 2859 00a0 ECE7 b .L212 + 2860 .L225: +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2861 .loc 1 1966 11 is_stmt 1 view .LVU822 +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2862 .loc 1 1966 73 is_stmt 0 view .LVU823 + 2863 00a2 204B ldr r3, .L227+8 + 2864 00a4 1868 ldr r0, [r3] + 2865 00a6 2049 ldr r1, .L227+12 + 2866 .LVL197: +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + ARM GAS /tmp/ccPDyDzP.s page 107 + + + 2867 .loc 1 1966 73 view .LVU824 + 2868 00a8 FFF7FEFF bl __aeabi_uidiv + 2869 .LVL198: +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2870 .loc 1 1966 54 view .LVU825 + 2871 00ac 8300 lsls r3, r0, #2 + 2872 00ae 1B18 adds r3, r3, r0 + 2873 00b0 5B00 lsls r3, r3, #1 +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2874 .loc 1 1966 27 view .LVU826 + 2875 00b2 0193 str r3, [sp, #4] +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2876 .loc 1 1967 11 is_stmt 1 view .LVU827 +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2877 .loc 1 1967 16 is_stmt 0 view .LVU828 + 2878 00b4 02E0 b .L213 + 2879 .L214: +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2880 .loc 1 1969 13 is_stmt 1 view .LVU829 +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2881 .loc 1 1969 28 is_stmt 0 view .LVU830 + 2882 00b6 019B ldr r3, [sp, #4] + 2883 00b8 013B subs r3, r3, #1 + 2884 00ba 0193 str r3, [sp, #4] + 2885 .L213: +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2886 .loc 1 1967 33 is_stmt 1 view .LVU831 + 2887 00bc 019B ldr r3, [sp, #4] + 2888 00be 002B cmp r3, #0 + 2889 00c0 F9D1 bne .L214 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2890 .loc 1 1896 21 is_stmt 0 view .LVU832 + 2891 00c2 0020 movs r0, #0 + 2892 00c4 1FE0 b .L211 + 2893 .LVL199: + 2894 .L207: +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2895 .loc 1 1978 7 is_stmt 1 view .LVU833 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2896 .loc 1 1978 21 is_stmt 0 view .LVU834 + 2897 00c6 936A ldr r3, [r2, #40] +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2898 .loc 1 1978 34 view .LVU835 + 2899 00c8 0D68 ldr r5, [r1] + 2900 00ca 0120 movs r0, #1 + 2901 00cc A840 lsls r0, r0, r5 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2902 .loc 1 1978 30 view .LVU836 + 2903 00ce 8343 bics r3, r0 + 2904 00d0 9362 str r3, [r2, #40] +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2905 .loc 1 1983 7 is_stmt 1 view .LVU837 +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2906 .loc 1 1983 10 is_stmt 0 view .LVU838 + 2907 00d2 0B68 ldr r3, [r1] + 2908 00d4 1A00 movs r2, r3 + 2909 00d6 103A subs r2, r2, #16 + ARM GAS /tmp/ccPDyDzP.s page 108 + + +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2910 .loc 1 1983 9 view .LVU839 + 2911 00d8 022A cmp r2, #2 + 2912 00da 1BD8 bhi .L221 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2913 .loc 1 1988 9 is_stmt 1 view .LVU840 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2914 .loc 1 1988 12 is_stmt 0 view .LVU841 + 2915 00dc 104A ldr r2, .L227+4 + 2916 00de 1268 ldr r2, [r2] +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2917 .loc 1 1988 21 view .LVU842 + 2918 00e0 102B cmp r3, #16 + 2919 00e2 09D0 beq .L222 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2920 .loc 1 1988 21 discriminator 1 view .LVU843 + 2921 00e4 112B cmp r3, #17 + 2922 00e6 05D0 beq .L226 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2923 .loc 1 1988 21 discriminator 4 view .LVU844 + 2924 00e8 104B ldr r3, .L227+16 + 2925 .L215: +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2926 .loc 1 1988 18 discriminator 8 view .LVU845 + 2927 00ea 1340 ands r3, r2 + 2928 00ec 0C4A ldr r2, .L227+4 + 2929 00ee 1360 str r3, [r2] +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2930 .loc 1 1896 21 view .LVU846 + 2931 00f0 0020 movs r0, #0 + 2932 00f2 08E0 b .L211 + 2933 .L226: +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2934 .loc 1 1988 21 discriminator 3 view .LVU847 + 2935 00f4 0E4B ldr r3, .L227+20 + 2936 00f6 F8E7 b .L215 + 2937 .L222: +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2938 .loc 1 1988 21 discriminator 2 view .LVU848 + 2939 00f8 0E4B ldr r3, .L227+24 + 2940 00fa F6E7 b .L215 + 2941 .LVL200: + 2942 .L206: +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2943 .loc 1 2000 5 is_stmt 1 view .LVU849 + 2944 00fc 836B ldr r3, [r0, #56] + 2945 00fe 2022 movs r2, #32 + 2946 0100 1343 orrs r3, r2 + 2947 0102 8363 str r3, [r0, #56] +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2948 .loc 1 2002 5 view .LVU850 + 2949 .LVL201: +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2950 .loc 1 2002 20 is_stmt 0 view .LVU851 + 2951 0104 0120 movs r0, #1 + 2952 .LVL202: + 2953 .L211: + ARM GAS /tmp/ccPDyDzP.s page 109 + + +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2954 .loc 1 2006 3 is_stmt 1 view .LVU852 +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2955 .loc 1 2006 3 view .LVU853 + 2956 0106 3423 movs r3, #52 + 2957 0108 0022 movs r2, #0 + 2958 010a E254 strb r2, [r4, r3] +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2959 .loc 1 2006 3 view .LVU854 +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2960 .loc 1 2009 3 view .LVU855 + 2961 .LVL203: + 2962 .L205: +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2963 .loc 1 2010 1 is_stmt 0 view .LVU856 + 2964 010c 03B0 add sp, sp, #12 + 2965 @ sp needed + 2966 .LVL204: +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2967 .loc 1 2010 1 view .LVU857 + 2968 010e 30BD pop {r4, r5, pc} + 2969 .LVL205: + 2970 .L217: +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2971 .loc 1 1896 21 view .LVU858 + 2972 0110 0020 movs r0, #0 + 2973 0112 F8E7 b .L211 + 2974 .L221: +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2975 .loc 1 1896 21 view .LVU859 + 2976 0114 0020 movs r0, #0 + 2977 0116 F6E7 b .L211 + 2978 .LVL206: + 2979 .L216: +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2980 .loc 1 1910 3 discriminator 1 view .LVU860 + 2981 0118 0220 movs r0, #2 + 2982 .LVL207: +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2983 .loc 1 1910 3 discriminator 1 view .LVU861 + 2984 011a F7E7 b .L205 + 2985 .L228: + 2986 .align 2 + 2987 .L227: + 2988 011c 01100000 .word 4097 + 2989 0120 08270140 .word 1073817352 + 2990 0124 00000000 .word SystemCoreClock + 2991 0128 40420F00 .word 1000000 + 2992 012c FFFFFFFE .word -16777217 + 2993 0130 FFFFBFFF .word -4194305 + 2994 0134 FFFF7FFF .word -8388609 + 2995 .cfi_endproc + 2996 .LFE58: + 2998 .section .text.HAL_ADC_AnalogWDGConfig,"ax",%progbits + 2999 .align 1 + 3000 .global HAL_ADC_AnalogWDGConfig + 3001 .syntax unified + ARM GAS /tmp/ccPDyDzP.s page 110 + + + 3002 .code 16 + 3003 .thumb_func + 3005 HAL_ADC_AnalogWDGConfig: + 3006 .LVL208: + 3007 .LFB59: +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 3008 .loc 1 2028 1 is_stmt 1 view -0 + 3009 .cfi_startproc + 3010 @ args = 0, pretend = 0, frame = 0 + 3011 @ frame_needed = 0, uses_anonymous_args = 0 +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 3012 .loc 1 2028 1 is_stmt 0 view .LVU863 + 3013 0000 70B5 push {r4, r5, r6, lr} + 3014 .cfi_def_cfa_offset 16 + 3015 .cfi_offset 4, -16 + 3016 .cfi_offset 5, -12 + 3017 .cfi_offset 6, -8 + 3018 .cfi_offset 14, -4 + 3019 0002 0300 movs r3, r0 +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3020 .loc 1 2029 3 is_stmt 1 view .LVU864 + 3021 .LVL209: +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDLowThresholdShifted; + 3022 .loc 1 2031 3 view .LVU865 +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3023 .loc 1 2032 3 view .LVU866 +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); + 3024 .loc 1 2035 3 view .LVU867 +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); + 3025 .loc 1 2036 3 view .LVU868 +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3026 .loc 1 2037 3 view .LVU869 +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); + 3027 .loc 1 2040 3 view .LVU870 +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3028 .loc 1 2041 3 view .LVU871 +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3029 .loc 1 2043 3 view .LVU872 +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3030 .loc 1 2045 5 view .LVU873 +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3031 .loc 1 2049 3 view .LVU874 +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3032 .loc 1 2049 3 view .LVU875 + 3033 0004 3422 movs r2, #52 + 3034 0006 825C ldrb r2, [r0, r2] + 3035 0008 012A cmp r2, #1 + 3036 000a 47D0 beq .L234 +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3037 .loc 1 2049 3 discriminator 2 view .LVU876 + 3038 000c 3422 movs r2, #52 + 3039 000e 0120 movs r0, #1 + 3040 .LVL210: +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3041 .loc 1 2049 3 is_stmt 0 discriminator 2 view .LVU877 + 3042 0010 9854 strb r0, [r3, r2] +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 111 + + + 3043 .loc 1 2049 3 is_stmt 1 discriminator 2 view .LVU878 +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3044 .loc 1 2056 3 view .LVU879 +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3045 .loc 1 2056 7 is_stmt 0 view .LVU880 + 3046 0012 1868 ldr r0, [r3] + 3047 0014 8268 ldr r2, [r0, #8] +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3048 .loc 1 2056 6 view .LVU881 + 3049 0016 5207 lsls r2, r2, #29 + 3050 0018 37D4 bmi .L231 +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | + 3051 .loc 1 2063 5 is_stmt 1 view .LVU882 +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | + 3052 .loc 1 2063 19 is_stmt 0 view .LVU883 + 3053 001a C268 ldr r2, [r0, #12] +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | + 3054 .loc 1 2063 27 view .LVU884 + 3055 001c 204C ldr r4, .L236 + 3056 001e 2240 ands r2, r4 + 3057 0020 C260 str r2, [r0, #12] +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3058 .loc 1 2067 5 is_stmt 1 view .LVU885 +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3059 .loc 1 2067 9 is_stmt 0 view .LVU886 + 3060 0022 1D68 ldr r5, [r3] +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3061 .loc 1 2067 19 view .LVU887 + 3062 0024 EA68 ldr r2, [r5, #12] +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3063 .loc 1 2067 47 view .LVU888 + 3064 0026 0868 ldr r0, [r1] +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3065 .loc 1 2068 32 view .LVU889 + 3066 0028 4C68 ldr r4, [r1, #4] + 3067 002a A406 lsls r4, r4, #26 +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3068 .loc 1 2067 73 view .LVU890 + 3069 002c 2043 orrs r0, r4 +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3070 .loc 1 2067 27 view .LVU891 + 3071 002e 0243 orrs r2, r0 + 3072 0030 EA60 str r2, [r5, #12] +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres + 3073 .loc 1 2072 5 is_stmt 1 view .LVU892 +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres + 3074 .loc 1 2072 34 is_stmt 0 view .LVU893 + 3075 0032 CD68 ldr r5, [r1, #12] + 3076 0034 1C68 ldr r4, [r3] + 3077 0036 E268 ldr r2, [r4, #12] + 3078 0038 D208 lsrs r2, r2, #3 + 3079 003a 0320 movs r0, #3 + 3080 003c 0240 ands r2, r0 + 3081 003e 5200 lsls r2, r2, #1 +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres + 3082 .loc 1 2072 32 view .LVU894 + 3083 0040 9540 lsls r5, r5, r2 + ARM GAS /tmp/ccPDyDzP.s page 112 + + + 3084 0042 2A00 movs r2, r5 + 3085 .LVL211: +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3086 .loc 1 2073 5 is_stmt 1 view .LVU895 +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3087 .loc 1 2073 34 is_stmt 0 view .LVU896 + 3088 0044 0D69 ldr r5, [r1, #16] + 3089 0046 E668 ldr r6, [r4, #12] + 3090 0048 F608 lsrs r6, r6, #3 + 3091 004a 3040 ands r0, r6 + 3092 004c 4000 lsls r0, r0, #1 +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3093 .loc 1 2073 32 view .LVU897 + 3094 004e 8540 lsls r5, r5, r0 + 3095 .LVL212: +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | + 3096 .loc 1 2076 5 is_stmt 1 view .LVU898 +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | + 3097 .loc 1 2076 19 is_stmt 0 view .LVU899 + 3098 0050 206A ldr r0, [r4, #32] +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | + 3099 .loc 1 2076 24 view .LVU900 + 3100 0052 144E ldr r6, .L236+4 + 3101 0054 3040 ands r0, r6 + 3102 0056 2062 str r0, [r4, #32] +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3103 .loc 1 2077 5 is_stmt 1 view .LVU901 +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3104 .loc 1 2077 9 is_stmt 0 view .LVU902 + 3105 0058 1C68 ldr r4, [r3] +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3106 .loc 1 2077 19 view .LVU903 + 3107 005a 206A ldr r0, [r4, #32] +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3108 .loc 1 2077 30 view .LVU904 + 3109 005c 1204 lsls r2, r2, #16 + 3110 .LVL213: +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3111 .loc 1 2077 81 view .LVU905 + 3112 005e 2A43 orrs r2, r5 +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3113 .loc 1 2077 24 view .LVU906 + 3114 0060 0243 orrs r2, r0 + 3115 0062 2262 str r2, [r4, #32] +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3116 .loc 1 2083 5 is_stmt 1 view .LVU907 + 3117 0064 1A68 ldr r2, [r3] + 3118 0066 8020 movs r0, #128 + 3119 0068 1060 str r0, [r2] +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3120 .loc 1 2086 5 view .LVU908 +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3121 .loc 1 2086 23 is_stmt 0 view .LVU909 + 3122 006a 0A7A ldrb r2, [r1, #8] +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3123 .loc 1 2086 7 view .LVU910 + 3124 006c 012A cmp r2, #1 + ARM GAS /tmp/ccPDyDzP.s page 113 + + + 3125 006e 06D0 beq .L235 +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3126 .loc 1 2094 7 is_stmt 1 view .LVU911 + 3127 0070 1968 ldr r1, [r3] + 3128 .LVL214: +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3129 .loc 1 2094 7 is_stmt 0 view .LVU912 + 3130 0072 4A68 ldr r2, [r1, #4] + 3131 0074 8020 movs r0, #128 + 3132 0076 8243 bics r2, r0 + 3133 0078 4A60 str r2, [r1, #4] +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3134 .loc 1 2029 21 view .LVU913 + 3135 007a 0020 movs r0, #0 + 3136 007c 0AE0 b .L233 + 3137 .LVL215: + 3138 .L235: +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3139 .loc 1 2089 7 is_stmt 1 view .LVU914 + 3140 007e 1968 ldr r1, [r3] + 3141 .LVL216: +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3142 .loc 1 2089 7 is_stmt 0 view .LVU915 + 3143 0080 4A68 ldr r2, [r1, #4] + 3144 0082 0243 orrs r2, r0 + 3145 0084 4A60 str r2, [r1, #4] +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3146 .loc 1 2029 21 view .LVU916 + 3147 0086 0020 movs r0, #0 + 3148 0088 04E0 b .L233 + 3149 .LVL217: + 3150 .L231: +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3151 .loc 1 2103 5 is_stmt 1 view .LVU917 + 3152 008a 9A6B ldr r2, [r3, #56] + 3153 008c 2021 movs r1, #32 + 3154 .LVL218: +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3155 .loc 1 2103 5 is_stmt 0 view .LVU918 + 3156 008e 0A43 orrs r2, r1 + 3157 0090 9A63 str r2, [r3, #56] +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3158 .loc 1 2105 5 is_stmt 1 view .LVU919 + 3159 .LVL219: +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3160 .loc 1 2105 20 is_stmt 0 view .LVU920 + 3161 0092 0120 movs r0, #1 + 3162 .LVL220: + 3163 .L233: +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3164 .loc 1 2110 3 is_stmt 1 view .LVU921 +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3165 .loc 1 2110 3 view .LVU922 + 3166 0094 3422 movs r2, #52 + 3167 0096 0021 movs r1, #0 + 3168 0098 9954 strb r1, [r3, r2] +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccPDyDzP.s page 114 + + + 3169 .loc 1 2110 3 view .LVU923 +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3170 .loc 1 2113 3 view .LVU924 + 3171 .LVL221: + 3172 .L230: +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3173 .loc 1 2114 1 is_stmt 0 view .LVU925 + 3174 @ sp needed + 3175 009a 70BD pop {r4, r5, r6, pc} + 3176 .LVL222: + 3177 .L234: +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3178 .loc 1 2049 3 discriminator 1 view .LVU926 + 3179 009c 0220 movs r0, #2 + 3180 .LVL223: +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3181 .loc 1 2049 3 discriminator 1 view .LVU927 + 3182 009e FCE7 b .L230 + 3183 .L237: + 3184 .align 2 + 3185 .L236: + 3186 00a0 FFFF3F83 .word -2092957697 + 3187 00a4 00F000F0 .word -268374016 + 3188 .cfi_endproc + 3189 .LFE59: + 3191 .section .text.HAL_ADC_GetState,"ax",%progbits + 3192 .align 1 + 3193 .global HAL_ADC_GetState + 3194 .syntax unified + 3195 .code 16 + 3196 .thumb_func + 3198 HAL_ADC_GetState: + 3199 .LVL224: + 3200 .LFB60: +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 3201 .loc 1 2150 1 is_stmt 1 view -0 + 3202 .cfi_startproc + 3203 @ args = 0, pretend = 0, frame = 0 + 3204 @ frame_needed = 0, uses_anonymous_args = 0 + 3205 @ link register save eliminated. +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3206 .loc 1 2152 3 view .LVU929 +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3207 .loc 1 2155 3 view .LVU930 +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3208 .loc 1 2155 14 is_stmt 0 view .LVU931 + 3209 0000 806B ldr r0, [r0, #56] + 3210 .LVL225: +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3211 .loc 1 2156 1 view .LVU932 + 3212 @ sp needed + 3213 0002 7047 bx lr + 3214 .cfi_endproc + 3215 .LFE60: + 3217 .section .text.HAL_ADC_GetError,"ax",%progbits + 3218 .align 1 + 3219 .global HAL_ADC_GetError + ARM GAS /tmp/ccPDyDzP.s page 115 + + + 3220 .syntax unified + 3221 .code 16 + 3222 .thumb_func + 3224 HAL_ADC_GetError: + 3225 .LVL226: + 3226 .LFB61: +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->ErrorCode; + 3227 .loc 1 2164 1 is_stmt 1 view -0 + 3228 .cfi_startproc + 3229 @ args = 0, pretend = 0, frame = 0 + 3230 @ frame_needed = 0, uses_anonymous_args = 0 + 3231 @ link register save eliminated. +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3232 .loc 1 2165 3 view .LVU934 +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3233 .loc 1 2165 14 is_stmt 0 view .LVU935 + 3234 0000 C06B ldr r0, [r0, #60] + 3235 .LVL227: +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3236 .loc 1 2166 1 view .LVU936 + 3237 @ sp needed + 3238 0002 7047 bx lr + 3239 .cfi_endproc + 3240 .LFE61: + 3242 .text + 3243 .Letext0: + 3244 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 3245 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 3246 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 3247 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 3248 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 3249 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 3250 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 3251 .file 9 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 3252 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccPDyDzP.s page 116 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_adc.c + /tmp/ccPDyDzP.s:19 .text.ADC_ConversionStop:00000000 $t + /tmp/ccPDyDzP.s:24 .text.ADC_ConversionStop:00000000 ADC_ConversionStop + /tmp/ccPDyDzP.s:135 .text.ADC_Disable:00000000 $t + /tmp/ccPDyDzP.s:140 .text.ADC_Disable:00000000 ADC_Disable + /tmp/ccPDyDzP.s:282 .text.ADC_Enable:00000000 $t + /tmp/ccPDyDzP.s:287 .text.ADC_Enable:00000000 ADC_Enable + /tmp/ccPDyDzP.s:453 .text.ADC_Enable:000000a4 $d + /tmp/ccPDyDzP.s:460 .text.HAL_ADC_MspInit:00000000 $t + /tmp/ccPDyDzP.s:466 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit + /tmp/ccPDyDzP.s:482 .text.HAL_ADC_Init:00000000 $t + /tmp/ccPDyDzP.s:488 .text.HAL_ADC_Init:00000000 HAL_ADC_Init + /tmp/ccPDyDzP.s:851 .text.HAL_ADC_Init:00000178 $d + /tmp/ccPDyDzP.s:858 .text.HAL_ADC_MspDeInit:00000000 $t + /tmp/ccPDyDzP.s:864 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit + /tmp/ccPDyDzP.s:880 .text.HAL_ADC_DeInit:00000000 $t + /tmp/ccPDyDzP.s:886 .text.HAL_ADC_DeInit:00000000 HAL_ADC_DeInit + /tmp/ccPDyDzP.s:1045 .text.HAL_ADC_DeInit:00000090 $d + /tmp/ccPDyDzP.s:1053 .text.HAL_ADC_Start:00000000 $t + /tmp/ccPDyDzP.s:1059 .text.HAL_ADC_Start:00000000 HAL_ADC_Start + /tmp/ccPDyDzP.s:1166 .text.HAL_ADC_Start:0000005c $d + /tmp/ccPDyDzP.s:1171 .text.HAL_ADC_Stop:00000000 $t + /tmp/ccPDyDzP.s:1177 .text.HAL_ADC_Stop:00000000 HAL_ADC_Stop + /tmp/ccPDyDzP.s:1260 .text.HAL_ADC_Stop:00000040 $d + /tmp/ccPDyDzP.s:1265 .text.HAL_ADC_PollForConversion:00000000 $t + /tmp/ccPDyDzP.s:1271 .text.HAL_ADC_PollForConversion:00000000 HAL_ADC_PollForConversion + /tmp/ccPDyDzP.s:1468 .text.HAL_ADC_PollForConversion:000000c4 $d + /tmp/ccPDyDzP.s:1473 .text.HAL_ADC_PollForEvent:00000000 $t + /tmp/ccPDyDzP.s:1479 .text.HAL_ADC_PollForEvent:00000000 HAL_ADC_PollForEvent + /tmp/ccPDyDzP.s:1620 .text.HAL_ADC_Start_IT:00000000 $t + /tmp/ccPDyDzP.s:1626 .text.HAL_ADC_Start_IT:00000000 HAL_ADC_Start_IT + /tmp/ccPDyDzP.s:1763 .text.HAL_ADC_Start_IT:00000084 $d + /tmp/ccPDyDzP.s:1768 .text.HAL_ADC_Stop_IT:00000000 $t + /tmp/ccPDyDzP.s:1774 .text.HAL_ADC_Stop_IT:00000000 HAL_ADC_Stop_IT + /tmp/ccPDyDzP.s:1863 .text.HAL_ADC_Stop_IT:0000004c $d + /tmp/ccPDyDzP.s:1868 .text.HAL_ADC_Start_DMA:00000000 $t + /tmp/ccPDyDzP.s:1874 .text.HAL_ADC_Start_DMA:00000000 HAL_ADC_Start_DMA + /tmp/ccPDyDzP.s:2033 .text.HAL_ADC_Start_DMA:00000098 $d + /tmp/ccPDyDzP.s:2246 .text.ADC_DMAConvCplt:00000000 ADC_DMAConvCplt + /tmp/ccPDyDzP.s:2386 .text.ADC_DMAHalfConvCplt:00000000 ADC_DMAHalfConvCplt + /tmp/ccPDyDzP.s:2461 .text.ADC_DMAError:00000000 ADC_DMAError + /tmp/ccPDyDzP.s:2041 .text.HAL_ADC_Stop_DMA:00000000 $t + /tmp/ccPDyDzP.s:2047 .text.HAL_ADC_Stop_DMA:00000000 HAL_ADC_Stop_DMA + /tmp/ccPDyDzP.s:2186 .text.HAL_ADC_Stop_DMA:00000080 $d + /tmp/ccPDyDzP.s:2191 .text.HAL_ADC_GetValue:00000000 $t + /tmp/ccPDyDzP.s:2197 .text.HAL_ADC_GetValue:00000000 HAL_ADC_GetValue + /tmp/ccPDyDzP.s:2219 .text.HAL_ADC_ConvCpltCallback:00000000 $t + /tmp/ccPDyDzP.s:2225 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback + /tmp/ccPDyDzP.s:2241 .text.ADC_DMAConvCplt:00000000 $t + /tmp/ccPDyDzP.s:2354 .text.ADC_DMAConvCplt:0000006c $d + /tmp/ccPDyDzP.s:2359 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t + /tmp/ccPDyDzP.s:2365 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback + /tmp/ccPDyDzP.s:2381 .text.ADC_DMAHalfConvCplt:00000000 $t + /tmp/ccPDyDzP.s:2412 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 $t + /tmp/ccPDyDzP.s:2418 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 HAL_ADC_LevelOutOfWindowCallback + /tmp/ccPDyDzP.s:2434 .text.HAL_ADC_ErrorCallback:00000000 $t + ARM GAS /tmp/ccPDyDzP.s page 117 + + + /tmp/ccPDyDzP.s:2440 .text.HAL_ADC_ErrorCallback:00000000 HAL_ADC_ErrorCallback + /tmp/ccPDyDzP.s:2456 .text.ADC_DMAError:00000000 $t + /tmp/ccPDyDzP.s:2497 .text.HAL_ADC_IRQHandler:00000000 $t + /tmp/ccPDyDzP.s:2503 .text.HAL_ADC_IRQHandler:00000000 HAL_ADC_IRQHandler + /tmp/ccPDyDzP.s:2694 .text.HAL_ADC_IRQHandler:000000cc $d + /tmp/ccPDyDzP.s:2699 .text.HAL_ADC_ConfigChannel:00000000 $t + /tmp/ccPDyDzP.s:2705 .text.HAL_ADC_ConfigChannel:00000000 HAL_ADC_ConfigChannel + /tmp/ccPDyDzP.s:2988 .text.HAL_ADC_ConfigChannel:0000011c $d + /tmp/ccPDyDzP.s:2999 .text.HAL_ADC_AnalogWDGConfig:00000000 $t + /tmp/ccPDyDzP.s:3005 .text.HAL_ADC_AnalogWDGConfig:00000000 HAL_ADC_AnalogWDGConfig + /tmp/ccPDyDzP.s:3186 .text.HAL_ADC_AnalogWDGConfig:000000a0 $d + /tmp/ccPDyDzP.s:3192 .text.HAL_ADC_GetState:00000000 $t + /tmp/ccPDyDzP.s:3198 .text.HAL_ADC_GetState:00000000 HAL_ADC_GetState + /tmp/ccPDyDzP.s:3218 .text.HAL_ADC_GetError:00000000 $t + /tmp/ccPDyDzP.s:3224 .text.HAL_ADC_GetError:00000000 HAL_ADC_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +__aeabi_uidiv +SystemCoreClock +HAL_DMA_Start_IT +HAL_DMA_Abort diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o new file mode 100644 index 0000000000000000000000000000000000000000..44a8fad7b58499d297b3ecd99e50f9baa6976988 GIT binary patch literal 28704 zcmd6Pdtg-6wf8=A=9LE_Pe?+9NrDmyc|kRjel6Ck)_VI43ayW}m+PZxwYI)$X{&O7zkSx3IWvLwe*b+3 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zt}emu9(*o+9EG%tN1&+PbqV@@b{XE!*~);nzSRl(X5jPU-=duQ@CX&v*OQ>{2h)`L zca+Instance)); + 44 .loc 1 102 3 view .LVU5 + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process locked */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_LOCK(hadc); + 45 .loc 1 105 3 view .LVU6 + 46 .loc 1 105 3 view .LVU7 + 47 0004 3423 movs r3, #52 + 48 0006 C35C ldrb r3, [r0, r3] + 49 0008 012B cmp r3, #1 + 50 000a 50D0 beq .L8 + 51 .loc 1 105 3 discriminator 2 view .LVU8 + 52 000c 3423 movs r3, #52 + 53 000e 0122 movs r2, #1 + 54 0010 C254 strb r2, [r0, r3] + 55 .loc 1 105 3 discriminator 2 view .LVU9 + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Calibration prerequisite: ADC must be disabled. */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** if (ADC_IS_ENABLE(hadc) == RESET) + 56 .loc 1 108 3 view .LVU10 + 57 .loc 1 108 7 is_stmt 0 view .LVU11 + 58 0012 0368 ldr r3, [r0] + 59 0014 9968 ldr r1, [r3, #8] + 60 0016 0232 adds r2, r2, #2 + 61 0018 0A40 ands r2, r1 + 62 001a 012A cmp r2, #1 + 63 001c 05D1 bne .L3 + 64 .loc 1 108 7 discriminator 1 view .LVU12 + ARM GAS /tmp/ccEY3dIY.s page 4 + + + 65 001e 1A68 ldr r2, [r3] + 66 0020 D207 lsls r2, r2, #31 + 67 0022 3ED4 bmi .L4 + 68 .loc 1 108 7 discriminator 4 view .LVU13 + 69 0024 DA68 ldr r2, [r3, #12] + 70 0026 1204 lsls r2, r2, #16 + 71 0028 3BD4 bmi .L4 + 72 .L3: + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Set ADC state */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 73 .loc 1 111 5 is_stmt 1 view .LVU14 + 74 002a A26B ldr r2, [r4, #56] + 75 002c 2149 ldr r1, .L12 + 76 002e 0A40 ands r2, r1 + 77 0030 0631 adds r1, r1, #6 + 78 0032 FF31 adds r1, r1, #255 + 79 0034 0A43 orrs r2, r1 + 80 0036 A263 str r2, [r4, #56] + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY, + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL); + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Disable ADC DMA transfer request during calibration */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Note: Specificity of this STM32 series: Calibration factor is */ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* available in data register and also transferred by DMA. */ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* To not insert ADC calibration factor among ADC conversion data */ + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* in array variable, DMA transfer must be disabled during */ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* calibration. */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_D + 81 .loc 1 121 5 view .LVU15 + 82 .loc 1 121 39 is_stmt 0 view .LVU16 + 83 0038 DE68 ldr r6, [r3, #12] + 84 .loc 1 121 37 view .LVU17 + 85 003a 0131 adds r1, r1, #1 + 86 003c 0E40 ands r6, r1 + 87 .LVL2: + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); + 88 .loc 1 122 5 is_stmt 1 view .LVU18 + 89 003e DA68 ldr r2, [r3, #12] + 90 0040 8A43 bics r2, r1 + 91 0042 DA60 str r2, [r3, #12] + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Start ADC calibration */ + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** hadc->Instance->CR |= ADC_CR_ADCAL; + 92 .loc 1 125 5 view .LVU19 + 93 .loc 1 125 9 is_stmt 0 view .LVU20 + 94 0044 2268 ldr r2, [r4] + 95 .loc 1 125 19 view .LVU21 + 96 0046 9168 ldr r1, [r2, #8] + 97 .loc 1 125 24 view .LVU22 + 98 0048 8023 movs r3, #128 + 99 004a 1B06 lsls r3, r3, #24 + 100 004c 0B43 orrs r3, r1 + 101 004e 9360 str r3, [r2, #8] + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); + 102 .loc 1 127 5 is_stmt 1 view .LVU23 + ARM GAS /tmp/ccEY3dIY.s page 5 + + + 103 .loc 1 127 17 is_stmt 0 view .LVU24 + 104 0050 FFF7FEFF bl HAL_GetTick + 105 .LVL3: + 106 .loc 1 127 17 view .LVU25 + 107 0054 0500 movs r5, r0 + 108 .LVL4: + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Wait for calibration completion */ + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) + 109 .loc 1 130 5 is_stmt 1 view .LVU26 + 110 .L5: + 111 .loc 1 130 11 view .LVU27 + 112 0056 2368 ldr r3, [r4] + 113 0058 9A68 ldr r2, [r3, #8] + 114 005a 002A cmp r2, #0 + 115 005c 13DA bge .L11 + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) + 116 .loc 1 132 7 view .LVU28 + 117 .loc 1 132 11 is_stmt 0 view .LVU29 + 118 005e FFF7FEFF bl HAL_GetTick + 119 .LVL5: + 120 .loc 1 132 25 discriminator 1 view .LVU30 + 121 0062 401B subs r0, r0, r5 + 122 .loc 1 132 9 discriminator 1 view .LVU31 + 123 0064 0228 cmp r0, #2 + 124 0066 F6D9 bls .L5 + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) + 125 .loc 1 135 9 is_stmt 1 view .LVU32 + 126 .loc 1 135 12 is_stmt 0 view .LVU33 + 127 0068 2368 ldr r3, [r4] + 128 006a 9B68 ldr r3, [r3, #8] + 129 .loc 1 135 11 view .LVU34 + 130 006c 002B cmp r3, #0 + 131 006e F2DA bge .L5 + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 132 .loc 1 138 11 is_stmt 1 view .LVU35 + 133 0070 A36B ldr r3, [r4, #56] + 134 0072 1222 movs r2, #18 + 135 0074 9343 bics r3, r2 + 136 0076 023A subs r2, r2, #2 + 137 0078 1343 orrs r3, r2 + 138 007a A363 str r3, [r4, #56] + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_ERROR_INTERNAL); + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process unlocked */ + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); + 139 .loc 1 143 11 view .LVU36 + 140 .loc 1 143 11 view .LVU37 + 141 007c 3423 movs r3, #52 + 142 007e 0022 movs r2, #0 + 143 0080 E254 strb r2, [r4, r3] + ARM GAS /tmp/ccEY3dIY.s page 6 + + + 144 .loc 1 143 11 view .LVU38 + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** return HAL_ERROR; + 145 .loc 1 145 11 view .LVU39 + 146 .loc 1 145 18 is_stmt 0 view .LVU40 + 147 0082 0120 movs r0, #1 + 148 0084 0CE0 b .L2 + 149 .L11: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Restore ADC DMA transfer request after calibration */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer); + 150 .loc 1 151 5 is_stmt 1 view .LVU41 + 151 0086 DA68 ldr r2, [r3, #12] + 152 0088 3243 orrs r2, r6 + 153 008a DA60 str r2, [r3, #12] + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Set ADC state */ + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 154 .loc 1 154 5 view .LVU42 + 155 008c A36B ldr r3, [r4, #56] + 156 008e 0322 movs r2, #3 + 157 0090 9343 bics r3, r2 + 158 0092 023A subs r2, r2, #2 + 159 0094 1343 orrs r3, r2 + 160 0096 A363 str r3, [r4, #56] + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; + 161 .loc 1 97 21 is_stmt 0 view .LVU43 + 162 0098 0020 movs r0, #0 + 163 .LVL6: + 164 .L7: + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** else + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process unlocked */ + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); + 165 .loc 1 167 3 is_stmt 1 view .LVU44 + 166 .loc 1 167 3 view .LVU45 + 167 009a 3423 movs r3, #52 + 168 009c 0022 movs r2, #0 + 169 009e E254 strb r2, [r4, r3] + 170 .loc 1 167 3 view .LVU46 + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Return function status */ + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** return tmp_hal_status; + 171 .loc 1 170 3 view .LVU47 + 172 .LVL7: + ARM GAS /tmp/ccEY3dIY.s page 7 + + + 173 .L2: + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 174 .loc 1 171 1 is_stmt 0 view .LVU48 + 175 @ sp needed + 176 .LVL8: + 177 .loc 1 171 1 view .LVU49 + 178 00a0 70BD pop {r4, r5, r6, pc} + 179 .LVL9: + 180 .L4: + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 181 .loc 1 161 5 is_stmt 1 view .LVU50 + 182 00a2 A36B ldr r3, [r4, #56] + 183 00a4 2022 movs r2, #32 + 184 00a6 1343 orrs r3, r2 + 185 00a8 A363 str r3, [r4, #56] + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 186 .loc 1 163 5 view .LVU51 + 187 .LVL10: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 188 .loc 1 163 20 is_stmt 0 view .LVU52 + 189 00aa 0120 movs r0, #1 + 190 .LVL11: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 191 .loc 1 163 20 view .LVU53 + 192 00ac F5E7 b .L7 + 193 .LVL12: + 194 .L8: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 195 .loc 1 105 3 discriminator 1 view .LVU54 + 196 00ae 0220 movs r0, #2 + 197 .LVL13: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 198 .loc 1 105 3 discriminator 1 view .LVU55 + 199 00b0 F6E7 b .L2 + 200 .L13: + 201 00b2 C046 .align 2 + 202 .L12: + 203 00b4 FDFEFFFF .word -259 + 204 .cfi_endproc + 205 .LFE40: + 207 .text + 208 .Letext0: + 209 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 210 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 211 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 212 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 213 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 214 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 215 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 216 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccEY3dIY.s page 8 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_adc_ex.c + /tmp/ccEY3dIY.s:19 .text.HAL_ADCEx_Calibration_Start:00000000 $t + /tmp/ccEY3dIY.s:25 .text.HAL_ADCEx_Calibration_Start:00000000 HAL_ADCEx_Calibration_Start + /tmp/ccEY3dIY.s:203 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Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.lst new file mode 100644 index 0000000..faf5c1c --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.lst @@ -0,0 +1,6702 @@ +ARM GAS /tmp/ccZqSNsg.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_can.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c" + 18 .section .text.HAL_CAN_MspInit,"ax",%progbits + 19 .align 1 + 20 .weak HAL_CAN_MspInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_CAN_MspInit: + 26 .LVL0: + 27 .LFB42: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @file stm32f0xx_hal_can.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief CAN HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * functionalities of the Controller Area Network (CAN) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Configuration functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Control functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Interrupts management + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Callbacks functions + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Peripheral State and Error functions + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ****************************************************************************** + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @attention + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * Copyright (c) 2016 STMicroelectronics. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * All rights reserved. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This software is licensed under terms that can be found in the LICENSE file + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * in the root directory of this software component. + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ****************************************************************************** + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### How to use this driver ##### + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Initialize the CAN low level resources by implementing the + ARM GAS /tmp/ccZqSNsg.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_MspInit(): + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Configure CAN pins + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) Enable the clock for the CAN GPIOs + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) Configure CAN pins as alternate function + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) Configure the CAN interrupt priority using + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_NVIC_SetPriority() + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ() + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler() + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** function resorts to HAL_CAN_MspInit() for low-level initialization. + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Configure the reception filters using the following configuration + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** functions: + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_ConfigFilter() + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Start the CAN module using HAL_CAN_Start() function. At this level + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the node is active on the bus: it receive messages, and can send + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** messages. + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) To manage messages transmission, the following Tx control functions + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can be used: + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_AddTxMessage() to request transmission of a new + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** message. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** message. + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** mailboxes. + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_IsTxMessagePending() to check if a message is pending + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** in a Tx mailbox. + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** sent, if time triggered communication mode is enabled. + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) When a message is received into the CAN Rx FIFOs, it can be retrieved + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** using the HAL_CAN_GetRxMessage() function. The function + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** stored in the Rx Fifo. + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Calling the HAL_CAN_Stop() function stops the CAN module. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) The deinitialization is achieved with HAL_CAN_DeInit() function. + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *** Polling mode operation *** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================== + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Reception: + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel() + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** until at least one message is received. + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Then get the message using HAL_CAN_GetRxMessage(). + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Transmission: + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Monitor the Tx mailboxes availability until at least one Tx + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel(). + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Then request transmission of a message using + ARM GAS /tmp/ccZqSNsg.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_AddTxMessage(). + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *** Interrupt mode operation *** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ================================ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Notifications are activated using HAL_CAN_ActivateNotification() + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** function. Then, the process can be controlled through the + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** available user callbacks: HAL_CAN_xxxCallback(), using same APIs + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage(). + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Notifications can be deactivated using + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_DeactivateNotification() function. + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** here. + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Directly get the Rx message in the callback, using + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_GetRxMessage(). + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Or deactivate the notification in the callback without + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** getting the Rx message. The Rx message can then be got later + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** using HAL_CAN_GetRxMessage(). Once the Rx message have been + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** read, the notification can be activated again. + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *** Sleep mode *** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ================== + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) The CAN peripheral can be put in sleep mode (low power), using + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** current CAN activity (transmission or reception of a CAN frame) will + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** be completed. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) A notification can be activated to be informed when the sleep mode + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** will be entered. + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) It can be checked if the sleep mode is entered using + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_IsSleepActive(). + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Note that the CAN state (accessible from the API HAL_CAN_GetState()) + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** submitted (the sleep mode is not yet entered), and become + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) The wake-up from sleep mode can be triggered by two ways: + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Using HAL_CAN_WakeUp(). When returning from this function, + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the sleep mode is exited (if return status is HAL_OK). + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) When a start of Rx CAN frame is detected by the CAN peripheral, + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if automatic wake up mode is enabled. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *** Callback registration *** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================= + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1 + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** allows the user to configure dynamically the driver callbacks. + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Use Function HAL_CAN_RegisterCallback() to register an interrupt callback. + ARM GAS /tmp/ccZqSNsg.s page 4 + + + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Function HAL_CAN_RegisterCallback() allows to register following callbacks: + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) SleepCallback : Sleep Callback. + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) ErrorCallback : Error Callback. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) MspInitCallback : CAN MspInit. + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** and a pointer to the user callback function. + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Use function HAL_CAN_UnRegisterCallback() to reset a callback to the default + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** weak function. + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle, + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** and the Callback ID. + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** This function allows to reset following callbacks: + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) SleepCallback : Sleep Callback. + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) ErrorCallback : Error Callback. + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) MspInitCallback : CAN MspInit. + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit. + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** By default, after the HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET, + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** all callbacks are set to the corresponding weak functions: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** example HAL_CAN_ErrorCallback(). + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Exception done for MspInit and MspDeInit functions that are + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** reset to the legacy weak function in the HAL_CAN_Init()/ HAL_CAN_DeInit() only when + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** these callbacks are null (not registered beforehand). + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if not, MspInit or MspDeInit are not null, the HAL_CAN_Init()/ HAL_CAN_DeInit() + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only. + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Exception done MspInit/MspDeInit that can be registered/unregistered + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state, + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** In that case first register the MspInit/MspDeInit user callbacks + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** using HAL_CAN_RegisterCallback() before calling HAL_CAN_DeInit() + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** or HAL_CAN_Init() function. + ARM GAS /tmp/ccZqSNsg.s page 5 + + + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** not defined, the callback registration feature is not available and all callbacks + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** are set to the corresponding weak functions. + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ****************************************************************************** + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Includes ------------------------------------------------------------------*/ + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #include "stm32f0xx_hal.h" + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @addtogroup STM32F0xx_HAL_Driver + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if defined(CAN) + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN CAN + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief CAN driver modules + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #ifdef HAL_CAN_MODULE_ENABLED + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #ifdef HAL_CAN_LEGACY_MODULE_ENABLED + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once" + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private typedef -----------------------------------------------------------*/ + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private define ------------------------------------------------------------*/ + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Private_Constants CAN Private Constants + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #define CAN_TIMEOUT_VALUE 10U + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #define CAN_WAKEUP_TIMEOUT_COUNTER 1000000U + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private macro -------------------------------------------------------------*/ + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private variables ---------------------------------------------------------*/ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private function prototypes -----------------------------------------------*/ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Exported functions --------------------------------------------------------*/ + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions CAN Exported Functions + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Initialization and Configuration functions + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Initialization and de-initialization functions ##### + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] This section provides functions allowing to: + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_Init : Initialize and configure the CAN. + ARM GAS /tmp/ccZqSNsg.s page 6 + + + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_DeInit : De-initialize the CAN. + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_MspInit : Initialize the CAN MSP. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP. + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Initializes the CAN peripheral according to the specified + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * parameters in the CAN_InitStruct. + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check CAN handle */ + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan == NULL) + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode)); + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET) + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset callbacks to legacy functions */ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0M + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0F + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1M + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1F + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbo + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbo + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbo + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbo + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbo + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbo + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCal + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFr + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCal + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccZqSNsg.s page 7 + + + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->MspInitCallback == NULL) + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback(hcan); + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET) + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */ + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_MspInit(hcan); + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request initialisation */ + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get tick */ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** tickstart = HAL_GetTick(); + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wait initialisation acknowledge */ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Exit from sleep mode */ + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get tick */ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** tickstart = HAL_GetTick(); + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Sleep mode leave acknowledge */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccZqSNsg.s page 8 + + + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the time triggered communication mode */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.TimeTriggeredMode == ENABLE) + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the automatic bus-off management */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.AutoBusOff == ENABLE) + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the automatic wake-up mode */ + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.AutoWakeUp == ENABLE) + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the automatic retransmission */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.AutoRetransmission == ENABLE) + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the receive FIFO locked mode */ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.ReceiveFifoLocked == ENABLE) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the transmit FIFO priority */ + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.TransmitFifoPriority == ENABLE) + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccZqSNsg.s page 9 + + + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the bit timing register */ + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Init.SyncJumpWidth | + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Init.TimeSeg1 | + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Init.TimeSeg2 | + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (hcan->Init.Prescaler - 1U))); + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Initialize the error code */ + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Initialize the CAN state */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY; + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Deinitializes the CAN peripheral registers to their default + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * reset values. + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check CAN handle */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan == NULL) + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Stop the CAN module */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (void)HAL_CAN_Stop(hcan); + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->MspDeInitCallback == NULL) + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */ + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback(hcan); + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */ + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_MspDeInit(hcan); + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccZqSNsg.s page 10 + + + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset the CAN peripheral */ + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset the CAN ErrorCode */ + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_RESET; + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Initializes the CAN MSP. + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan) + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 28 .loc 1 508 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 33 .loc 1 510 3 view .LVU1 + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_MspInit could be implemented in the user file + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 34 .loc 1 515 1 is_stmt 0 view .LVU2 + 35 @ sp needed + 36 0000 7047 bx lr + 37 .cfi_endproc + 38 .LFE42: + 40 .section .text.HAL_CAN_Init,"ax",%progbits + 41 .align 1 + 42 .global HAL_CAN_Init + 43 .syntax unified + 44 .code 16 + 45 .thumb_func + 47 HAL_CAN_Init: + 48 .LVL1: + 49 .LFB40: + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 50 .loc 1 276 1 is_stmt 1 view -0 + 51 .cfi_startproc + 52 @ args = 0, pretend = 0, frame = 0 + 53 @ frame_needed = 0, uses_anonymous_args = 0 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 54 .loc 1 276 1 is_stmt 0 view .LVU4 + 55 0000 70B5 push {r4, r5, r6, lr} + 56 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccZqSNsg.s page 11 + + + 57 .cfi_offset 4, -16 + 58 .cfi_offset 5, -12 + 59 .cfi_offset 6, -8 + 60 .cfi_offset 14, -4 + 61 0002 041E subs r4, r0, #0 + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 62 .loc 1 277 3 is_stmt 1 view .LVU5 + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 63 .loc 1 280 3 view .LVU6 + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 64 .loc 1 280 6 is_stmt 0 view .LVU7 + 65 0004 00D1 bne .LCB27 + 66 0006 A0E0 b .L21 @long jump + 67 .LCB27: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); + 68 .loc 1 286 3 is_stmt 1 view .LVU8 + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); + 69 .loc 1 287 3 view .LVU9 + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); + 70 .loc 1 288 3 view .LVU10 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); + 71 .loc 1 289 3 view .LVU11 + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); + 72 .loc 1 290 3 view .LVU12 + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); + 73 .loc 1 291 3 view .LVU13 + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode)); + 74 .loc 1 292 3 view .LVU14 + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); + 75 .loc 1 293 3 view .LVU15 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); + 76 .loc 1 294 3 view .LVU16 + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); + 77 .loc 1 295 3 view .LVU17 + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); + 78 .loc 1 296 3 view .LVU18 + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 79 .loc 1 297 3 view .LVU19 + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 80 .loc 1 327 3 view .LVU20 + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 81 .loc 1 327 11 is_stmt 0 view .LVU21 + 82 0008 2023 movs r3, #32 + 83 000a C35C ldrb r3, [r0, r3] + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 84 .loc 1 327 6 view .LVU22 + 85 000c 002B cmp r3, #0 + 86 000e 1AD0 beq .L22 + 87 .LVL2: + 88 .L4: + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 89 .loc 1 335 3 is_stmt 1 view .LVU23 + 90 0010 2268 ldr r2, [r4] + 91 0012 1368 ldr r3, [r2] + 92 0014 0121 movs r1, #1 + 93 0016 0B43 orrs r3, r1 + 94 0018 1360 str r3, [r2] + ARM GAS /tmp/ccZqSNsg.s page 12 + + + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 95 .loc 1 338 3 view .LVU24 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 96 .loc 1 338 15 is_stmt 0 view .LVU25 + 97 001a FFF7FEFF bl HAL_GetTick + 98 .LVL3: + 99 001e 0500 movs r5, r0 + 100 .LVL4: + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 101 .loc 1 341 3 is_stmt 1 view .LVU26 + 102 .L5: + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 103 .loc 1 341 47 view .LVU27 + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 104 .loc 1 341 15 is_stmt 0 view .LVU28 + 105 0020 2268 ldr r2, [r4] + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 106 .loc 1 341 25 view .LVU29 + 107 0022 5368 ldr r3, [r2, #4] + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 108 .loc 1 341 47 view .LVU30 + 109 0024 DB07 lsls r3, r3, #31 + 110 0026 11D4 bmi .L23 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 111 .loc 1 343 5 is_stmt 1 view .LVU31 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 112 .loc 1 343 10 is_stmt 0 view .LVU32 + 113 0028 FFF7FEFF bl HAL_GetTick + 114 .LVL5: + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 115 .loc 1 343 24 discriminator 1 view .LVU33 + 116 002c 401B subs r0, r0, r5 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 117 .loc 1 343 8 discriminator 1 view .LVU34 + 118 002e 0A28 cmp r0, #10 + 119 0030 F6D9 bls .L5 + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 120 .loc 1 346 7 is_stmt 1 view .LVU35 + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 121 .loc 1 346 11 is_stmt 0 view .LVU36 + 122 0032 626A ldr r2, [r4, #36] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 123 .loc 1 346 23 view .LVU37 + 124 0034 8023 movs r3, #128 + 125 0036 9B02 lsls r3, r3, #10 + 126 0038 1343 orrs r3, r2 + 127 003a 6362 str r3, [r4, #36] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 128 .loc 1 349 7 is_stmt 1 view .LVU38 + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 129 .loc 1 349 19 is_stmt 0 view .LVU39 + 130 003c 2023 movs r3, #32 + 131 003e 0522 movs r2, #5 + 132 0040 E254 strb r2, [r4, r3] + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 133 .loc 1 351 7 is_stmt 1 view .LVU40 + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccZqSNsg.s page 13 + + + 134 .loc 1 351 14 is_stmt 0 view .LVU41 + 135 0042 0120 movs r0, #1 + 136 .LVL6: + 137 .L3: + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 138 .loc 1 451 1 view .LVU42 + 139 @ sp needed + 140 .LVL7: + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 141 .loc 1 451 1 view .LVU43 + 142 0044 70BD pop {r4, r5, r6, pc} + 143 .LVL8: + 144 .L22: + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 145 .loc 1 330 5 is_stmt 1 view .LVU44 + 146 0046 FFF7FEFF bl HAL_CAN_MspInit + 147 .LVL9: + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 148 .loc 1 330 5 is_stmt 0 view .LVU45 + 149 004a E1E7 b .L4 + 150 .LVL10: + 151 .L23: + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 152 .loc 1 356 3 is_stmt 1 view .LVU46 + 153 004c 1368 ldr r3, [r2] + 154 004e 0221 movs r1, #2 + 155 0050 8B43 bics r3, r1 + 156 0052 1360 str r3, [r2] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 157 .loc 1 359 3 view .LVU47 + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 158 .loc 1 359 15 is_stmt 0 view .LVU48 + 159 0054 FFF7FEFF bl HAL_GetTick + 160 .LVL11: + 161 0058 0500 movs r5, r0 + 162 .LVL12: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 163 .loc 1 362 3 is_stmt 1 view .LVU49 + 164 .L7: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 165 .loc 1 362 47 view .LVU50 + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 166 .loc 1 362 15 is_stmt 0 view .LVU51 + 167 005a 2268 ldr r2, [r4] + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 168 .loc 1 362 25 view .LVU52 + 169 005c 5368 ldr r3, [r2, #4] + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 170 .loc 1 362 47 view .LVU53 + 171 005e 9B07 lsls r3, r3, #30 + 172 0060 0ED5 bpl .L24 + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 173 .loc 1 364 5 is_stmt 1 view .LVU54 + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 174 .loc 1 364 10 is_stmt 0 view .LVU55 + 175 0062 FFF7FEFF bl HAL_GetTick + 176 .LVL13: + ARM GAS /tmp/ccZqSNsg.s page 14 + + + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 177 .loc 1 364 24 discriminator 1 view .LVU56 + 178 0066 401B subs r0, r0, r5 + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 179 .loc 1 364 8 discriminator 1 view .LVU57 + 180 0068 0A28 cmp r0, #10 + 181 006a F6D9 bls .L7 + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 182 .loc 1 367 7 is_stmt 1 view .LVU58 + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 183 .loc 1 367 11 is_stmt 0 view .LVU59 + 184 006c 626A ldr r2, [r4, #36] + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 185 .loc 1 367 23 view .LVU60 + 186 006e 8023 movs r3, #128 + 187 0070 9B02 lsls r3, r3, #10 + 188 0072 1343 orrs r3, r2 + 189 0074 6362 str r3, [r4, #36] + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 190 .loc 1 370 7 is_stmt 1 view .LVU61 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 191 .loc 1 370 19 is_stmt 0 view .LVU62 + 192 0076 2023 movs r3, #32 + 193 0078 0522 movs r2, #5 + 194 007a E254 strb r2, [r4, r3] + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 195 .loc 1 372 7 is_stmt 1 view .LVU63 + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 196 .loc 1 372 14 is_stmt 0 view .LVU64 + 197 007c 0120 movs r0, #1 + 198 007e E1E7 b .L3 + 199 .L24: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 200 .loc 1 377 3 is_stmt 1 view .LVU65 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 201 .loc 1 377 17 is_stmt 0 view .LVU66 + 202 0080 237E ldrb r3, [r4, #24] + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 203 .loc 1 377 6 view .LVU67 + 204 0082 012B cmp r3, #1 + 205 0084 3ED0 beq .L25 + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 206 .loc 1 383 5 is_stmt 1 view .LVU68 + 207 0086 1368 ldr r3, [r2] + 208 0088 8021 movs r1, #128 + 209 008a 8B43 bics r3, r1 + 210 008c 1360 str r3, [r2] + 211 .L10: + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 212 .loc 1 387 3 view .LVU69 + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 213 .loc 1 387 17 is_stmt 0 view .LVU70 + 214 008e 637E ldrb r3, [r4, #25] + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 215 .loc 1 387 6 view .LVU71 + 216 0090 012B cmp r3, #1 + 217 0092 3CD0 beq .L26 + ARM GAS /tmp/ccZqSNsg.s page 15 + + + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 218 .loc 1 393 5 is_stmt 1 view .LVU72 + 219 0094 2268 ldr r2, [r4] + 220 0096 1368 ldr r3, [r2] + 221 0098 4021 movs r1, #64 + 222 009a 8B43 bics r3, r1 + 223 009c 1360 str r3, [r2] + 224 .L12: + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 225 .loc 1 397 3 view .LVU73 + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 226 .loc 1 397 17 is_stmt 0 view .LVU74 + 227 009e A37E ldrb r3, [r4, #26] + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 228 .loc 1 397 6 view .LVU75 + 229 00a0 012B cmp r3, #1 + 230 00a2 3AD0 beq .L27 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 231 .loc 1 403 5 is_stmt 1 view .LVU76 + 232 00a4 2268 ldr r2, [r4] + 233 00a6 1368 ldr r3, [r2] + 234 00a8 2021 movs r1, #32 + 235 00aa 8B43 bics r3, r1 + 236 00ac 1360 str r3, [r2] + 237 .L14: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 238 .loc 1 407 3 view .LVU77 + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 239 .loc 1 407 17 is_stmt 0 view .LVU78 + 240 00ae E37E ldrb r3, [r4, #27] + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 241 .loc 1 407 6 view .LVU79 + 242 00b0 012B cmp r3, #1 + 243 00b2 38D0 beq .L28 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 244 .loc 1 413 5 is_stmt 1 view .LVU80 + 245 00b4 2268 ldr r2, [r4] + 246 00b6 1368 ldr r3, [r2] + 247 00b8 1021 movs r1, #16 + 248 00ba 0B43 orrs r3, r1 + 249 00bc 1360 str r3, [r2] + 250 .L16: + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 251 .loc 1 417 3 view .LVU81 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 252 .loc 1 417 17 is_stmt 0 view .LVU82 + 253 00be 237F ldrb r3, [r4, #28] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 254 .loc 1 417 6 view .LVU83 + 255 00c0 012B cmp r3, #1 + 256 00c2 36D0 beq .L29 + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 257 .loc 1 423 5 is_stmt 1 view .LVU84 + 258 00c4 2268 ldr r2, [r4] + 259 00c6 1368 ldr r3, [r2] + 260 00c8 0821 movs r1, #8 + 261 00ca 8B43 bics r3, r1 + ARM GAS /tmp/ccZqSNsg.s page 16 + + + 262 00cc 1360 str r3, [r2] + 263 .L18: + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 264 .loc 1 427 3 view .LVU85 + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 265 .loc 1 427 17 is_stmt 0 view .LVU86 + 266 00ce 637F ldrb r3, [r4, #29] + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 267 .loc 1 427 6 view .LVU87 + 268 00d0 012B cmp r3, #1 + 269 00d2 34D0 beq .L30 + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 270 .loc 1 433 5 is_stmt 1 view .LVU88 + 271 00d4 2268 ldr r2, [r4] + 272 00d6 1368 ldr r3, [r2] + 273 00d8 0421 movs r1, #4 + 274 00da 8B43 bics r3, r1 + 275 00dc 1360 str r3, [r2] + 276 .L20: + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Init.SyncJumpWidth | + 277 .loc 1 437 3 view .LVU89 + 278 00de A368 ldr r3, [r4, #8] + 279 00e0 E268 ldr r2, [r4, #12] + 280 00e2 1343 orrs r3, r2 + 281 00e4 2269 ldr r2, [r4, #16] + 282 00e6 1343 orrs r3, r2 + 283 00e8 6269 ldr r2, [r4, #20] + 284 00ea 1343 orrs r3, r2 + 285 00ec 6268 ldr r2, [r4, #4] + 286 00ee 013A subs r2, r2, #1 + 287 00f0 2168 ldr r1, [r4] + 288 00f2 1343 orrs r3, r2 + 289 00f4 CB61 str r3, [r1, #28] + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 290 .loc 1 444 3 view .LVU90 + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 291 .loc 1 444 19 is_stmt 0 view .LVU91 + 292 00f6 0023 movs r3, #0 + 293 00f8 6362 str r3, [r4, #36] + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 294 .loc 1 447 3 is_stmt 1 view .LVU92 + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 295 .loc 1 447 15 is_stmt 0 view .LVU93 + 296 00fa 2033 adds r3, r3, #32 + 297 00fc 0122 movs r2, #1 + 298 00fe E254 strb r2, [r4, r3] + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 299 .loc 1 450 3 is_stmt 1 view .LVU94 + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 300 .loc 1 450 10 is_stmt 0 view .LVU95 + 301 0100 0020 movs r0, #0 + 302 0102 9FE7 b .L3 + 303 .L25: + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 304 .loc 1 379 5 is_stmt 1 view .LVU96 + 305 0104 1368 ldr r3, [r2] + 306 0106 8021 movs r1, #128 + ARM GAS /tmp/ccZqSNsg.s page 17 + + + 307 0108 0B43 orrs r3, r1 + 308 010a 1360 str r3, [r2] + 309 010c BFE7 b .L10 + 310 .L26: + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 311 .loc 1 389 5 view .LVU97 + 312 010e 2268 ldr r2, [r4] + 313 0110 1368 ldr r3, [r2] + 314 0112 4021 movs r1, #64 + 315 0114 0B43 orrs r3, r1 + 316 0116 1360 str r3, [r2] + 317 0118 C1E7 b .L12 + 318 .L27: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 319 .loc 1 399 5 view .LVU98 + 320 011a 2268 ldr r2, [r4] + 321 011c 1368 ldr r3, [r2] + 322 011e 2021 movs r1, #32 + 323 0120 0B43 orrs r3, r1 + 324 0122 1360 str r3, [r2] + 325 0124 C3E7 b .L14 + 326 .L28: + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 327 .loc 1 409 5 view .LVU99 + 328 0126 2268 ldr r2, [r4] + 329 0128 1368 ldr r3, [r2] + 330 012a 1021 movs r1, #16 + 331 012c 8B43 bics r3, r1 + 332 012e 1360 str r3, [r2] + 333 0130 C5E7 b .L16 + 334 .L29: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 335 .loc 1 419 5 view .LVU100 + 336 0132 2268 ldr r2, [r4] + 337 0134 1368 ldr r3, [r2] + 338 0136 0821 movs r1, #8 + 339 0138 0B43 orrs r3, r1 + 340 013a 1360 str r3, [r2] + 341 013c C7E7 b .L18 + 342 .L30: + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 343 .loc 1 429 5 view .LVU101 + 344 013e 2268 ldr r2, [r4] + 345 0140 1368 ldr r3, [r2] + 346 0142 0421 movs r1, #4 + 347 0144 0B43 orrs r3, r1 + 348 0146 1360 str r3, [r2] + 349 0148 C9E7 b .L20 + 350 .LVL14: + 351 .L21: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 352 .loc 1 282 12 is_stmt 0 view .LVU102 + 353 014a 0120 movs r0, #1 + 354 .LVL15: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 355 .loc 1 282 12 view .LVU103 + 356 014c 7AE7 b .L3 + ARM GAS /tmp/ccZqSNsg.s page 18 + + + 357 .cfi_endproc + 358 .LFE40: + 360 .section .text.HAL_CAN_MspDeInit,"ax",%progbits + 361 .align 1 + 362 .weak HAL_CAN_MspDeInit + 363 .syntax unified + 364 .code 16 + 365 .thumb_func + 367 HAL_CAN_MspDeInit: + 368 .LVL16: + 369 .LFB43: + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief DeInitializes the CAN MSP. + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan) + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 370 .loc 1 524 1 is_stmt 1 view -0 + 371 .cfi_startproc + 372 @ args = 0, pretend = 0, frame = 0 + 373 @ frame_needed = 0, uses_anonymous_args = 0 + 374 @ link register save eliminated. + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 375 .loc 1 526 3 view .LVU105 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_MspDeInit could be implemented in the user file + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 376 .loc 1 531 1 is_stmt 0 view .LVU106 + 377 @ sp needed + 378 0000 7047 bx lr + 379 .cfi_endproc + 380 .LFE43: + 382 .section .text.HAL_CAN_ConfigFilter,"ax",%progbits + 383 .align 1 + 384 .global HAL_CAN_ConfigFilter + 385 .syntax unified + 386 .code 16 + 387 .thumb_func + 389 HAL_CAN_ConfigFilter: + 390 .LVL17: + 391 .LFB44: + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Register a CAN CallBack. + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * To be used instead of the weak predefined callback + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for CAN module + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param CallbackID ID of the callback to be registered + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be one of the following values: + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID + ARM GAS /tmp/ccZqSNsg.s page 19 + + + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param pCallback pointer to the Callback function + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Callb + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** void (* pCallback)(CAN_HandleTypeDef *_hcan)) + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pCallback == NULL) + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (CallbackID) + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = pCallback; + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = pCallback; + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = pCallback; + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0AbortCallback = pCallback; + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1AbortCallback = pCallback; + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2AbortCallback = pCallback; + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + ARM GAS /tmp/ccZqSNsg.s page 20 + + + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = pCallback; + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID : + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0FullCallback = pCallback; + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = pCallback; + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID : + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1FullCallback = pCallback; + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID : + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->SleepCallback = pCallback; + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = pCallback; + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID : + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCallback = pCallback; + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = pCallback; + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = pCallback; + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default : + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET) + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (CallbackID) + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = pCallback; + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = pCallback; + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + ARM GAS /tmp/ccZqSNsg.s page 21 + + + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default : + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Unregister a CAN CallBack. + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * CAN callback is redirected to the weak predefined callback + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for CAN module + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param CallbackID ID of the callback to be unregistered + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be one of the following values: + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Cal + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (CallbackID) + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + ARM GAS /tmp/ccZqSNsg.s page 22 + + + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID : + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID : + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID : + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID : + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccZqSNsg.s page 23 + + + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default : + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET) + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (CallbackID) + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default : + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group2 Configuration functions + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Configuration functions. + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Configuration functions ##### + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] This section provides functions allowing to: + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccZqSNsg.s page 24 + + + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Configures the CAN reception filter according to the specified + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * parameters in the CAN_FilterInitStruct. + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * contains the filter configuration information. + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterCon + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 392 .loc 1 841 1 is_stmt 1 view -0 + 393 .cfi_startproc + 394 @ args = 0, pretend = 0, frame = 0 + 395 @ frame_needed = 0, uses_anonymous_args = 0 + 396 .loc 1 841 1 is_stmt 0 view .LVU108 + 397 0000 70B5 push {r4, r5, r6, lr} + 398 .cfi_def_cfa_offset 16 + 399 .cfi_offset 4, -16 + 400 .cfi_offset 5, -12 + 401 .cfi_offset 6, -8 + 402 .cfi_offset 14, -4 + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t filternbrbitpos; + 403 .loc 1 842 3 is_stmt 1 view .LVU109 + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CAN_TypeDef *can_ip = hcan->Instance; + 404 .loc 1 843 3 view .LVU110 + 405 .loc 1 843 16 is_stmt 0 view .LVU111 + 406 0002 0268 ldr r2, [r0] + 407 .LVL18: + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 408 .loc 1 844 3 is_stmt 1 view .LVU112 + 409 .loc 1 844 24 is_stmt 0 view .LVU113 + 410 0004 2023 movs r3, #32 + 411 0006 C35C ldrb r3, [r0, r3] + 412 .LVL19: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 413 .loc 1 846 3 is_stmt 1 view .LVU114 + 414 .loc 1 846 38 is_stmt 0 view .LVU115 + 415 0008 013B subs r3, r3, #1 + 416 .LVL20: + 417 .loc 1 846 38 view .LVU116 + 418 000a DBB2 uxtb r3, r3 + 419 .LVL21: + 420 .loc 1 846 6 view .LVU117 + 421 000c 012B cmp r3, #1 + 422 000e 06D9 bls .L42 + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh)); + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); + ARM GAS /tmp/ccZqSNsg.s page 25 + + + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* CAN is single instance with 14 dedicated filters banks */ + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Initialisation mode for the filter */ + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FMR, CAN_FMR_FINIT); + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Convert filter number into bit position */ + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter Deactivation */ + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FA1R, filternbrbitpos); + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter Scale */ + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* 16-bit scale for the filter */ + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FS1R, filternbrbitpos); + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* First 16-bit identifier and First 16-bit mask */ + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Or First 16-bit identifier and Second 16-bit identifier */ + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Second 16-bit identifier and Second 16-bit mask */ + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Or Third 16-bit identifier and Fourth 16-bit identifier */ + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* 32-bit scale for the filter */ + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FS1R, filternbrbitpos); + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* 32-bit identifier or First 32-bit identifier */ + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* 32-bit mask or Second 32-bit identifier */ + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter Mode */ + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) + ARM GAS /tmp/ccZqSNsg.s page 26 + + + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Id/Mask mode for the filter*/ + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FM1R, filternbrbitpos); + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Identifier list mode for the filter*/ + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FM1R, filternbrbitpos); + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter FIFO assignment */ + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* FIFO 0 assignation for the filter */ + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* FIFO 1 assignation for the filter */ + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FFA1R, filternbrbitpos); + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter activation */ + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FA1R, filternbrbitpos); + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Leave the initialisation mode for the filter */ + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 423 .loc 1 947 5 is_stmt 1 view .LVU118 + 424 .loc 1 947 9 is_stmt 0 view .LVU119 + 425 0010 426A ldr r2, [r0, #36] + 426 .LVL22: + 427 .loc 1 947 21 view .LVU120 + 428 0012 8023 movs r3, #128 + 429 0014 DB02 lsls r3, r3, #11 + 430 0016 1343 orrs r3, r2 + 431 0018 4362 str r3, [r0, #36] + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 432 .loc 1 949 5 is_stmt 1 view .LVU121 + 433 .loc 1 949 12 is_stmt 0 view .LVU122 + 434 001a 0120 movs r0, #1 + 435 .LVL23: + 436 .L41: + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 437 .loc 1 951 1 view .LVU123 + ARM GAS /tmp/ccZqSNsg.s page 27 + + + 438 @ sp needed + 439 001c 70BD pop {r4, r5, r6, pc} + 440 .LVL24: + 441 .L42: + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); + 442 .loc 1 850 5 is_stmt 1 view .LVU124 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); + 443 .loc 1 851 5 view .LVU125 + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); + 444 .loc 1 852 5 view .LVU126 + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); + 445 .loc 1 853 5 view .LVU127 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); + 446 .loc 1 854 5 view .LVU128 + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); + 447 .loc 1 855 5 view .LVU129 + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); + 448 .loc 1 856 5 view .LVU130 + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 449 .loc 1 857 5 view .LVU131 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 450 .loc 1 862 5 view .LVU132 + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 451 .loc 1 865 5 view .LVU133 + 452 001e 8024 movs r4, #128 + 453 0020 A400 lsls r4, r4, #2 + 454 0022 1059 ldr r0, [r2, r4] + 455 .LVL25: + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 456 .loc 1 865 5 is_stmt 0 view .LVU134 + 457 0024 0123 movs r3, #1 + 458 0026 1843 orrs r0, r3 + 459 0028 1051 str r0, [r2, r4] + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 460 .loc 1 868 5 is_stmt 1 view .LVU135 + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 461 .loc 1 868 52 is_stmt 0 view .LVU136 + 462 002a 4C69 ldr r4, [r1, #20] + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 463 .loc 1 868 65 view .LVU137 + 464 002c 1F20 movs r0, #31 + 465 002e 2040 ands r0, r4 + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 466 .loc 1 868 21 view .LVU138 + 467 0030 8340 lsls r3, r3, r0 + 468 .LVL26: + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 469 .loc 1 871 5 is_stmt 1 view .LVU139 + 470 0032 8724 movs r4, #135 + 471 0034 A400 lsls r4, r4, #2 + 472 0036 1059 ldr r0, [r2, r4] + 473 0038 DD43 mvns r5, r3 + 474 003a 9843 bics r0, r3 + 475 003c 1051 str r0, [r2, r4] + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 476 .loc 1 874 5 view .LVU140 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccZqSNsg.s page 28 + + + 477 .loc 1 874 22 is_stmt 0 view .LVU141 + 478 003e C869 ldr r0, [r1, #28] + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 479 .loc 1 874 8 view .LVU142 + 480 0040 0028 cmp r0, #0 + 481 0042 18D1 bne .L34 + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 482 .loc 1 877 7 is_stmt 1 view .LVU143 + 483 0044 103C subs r4, r4, #16 + 484 0046 1059 ldr r0, [r2, r4] + 485 0048 2840 ands r0, r5 + 486 004a 1051 str r0, [r2, r4] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 487 .loc 1 881 7 view .LVU144 + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 488 .loc 1 882 48 is_stmt 0 view .LVU145 + 489 004c CC68 ldr r4, [r1, #12] + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 490 .loc 1 882 67 view .LVU146 + 491 004e 2404 lsls r4, r4, #16 + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 492 .loc 1 883 47 view .LVU147 + 493 0050 4E68 ldr r6, [r1, #4] + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 494 .loc 1 883 22 view .LVU148 + 495 0052 3604 lsls r6, r6, #16 + 496 0054 360C lsrs r6, r6, #16 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 497 .loc 1 881 44 view .LVU149 + 498 0056 4869 ldr r0, [r1, #20] + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 499 .loc 1 882 75 view .LVU150 + 500 0058 3443 orrs r4, r6 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 501 .loc 1 881 62 view .LVU151 + 502 005a 4830 adds r0, r0, #72 + 503 005c C000 lsls r0, r0, #3 + 504 005e 8450 str r4, [r0, r2] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 505 .loc 1 887 7 is_stmt 1 view .LVU152 + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 506 .loc 1 888 48 is_stmt 0 view .LVU153 + 507 0060 8C68 ldr r4, [r1, #8] + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 508 .loc 1 888 68 view .LVU154 + 509 0062 2404 lsls r4, r4, #16 + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 510 .loc 1 889 47 view .LVU155 + 511 0064 0E68 ldr r6, [r1] + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 512 .loc 1 889 22 view .LVU156 + 513 0066 3604 lsls r6, r6, #16 + 514 0068 360C lsrs r6, r6, #16 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 515 .loc 1 887 44 view .LVU157 + 516 006a 4869 ldr r0, [r1, #20] + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + ARM GAS /tmp/ccZqSNsg.s page 29 + + + 517 .loc 1 888 76 view .LVU158 + 518 006c 3443 orrs r4, r6 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 519 .loc 1 887 62 view .LVU159 + 520 006e 4830 adds r0, r0, #72 + 521 0070 C000 lsls r0, r0, #3 + 522 0072 1018 adds r0, r2, r0 + 523 0074 4460 str r4, [r0, #4] + 524 .L34: + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 525 .loc 1 892 5 is_stmt 1 view .LVU160 + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 526 .loc 1 892 22 is_stmt 0 view .LVU161 + 527 0076 C869 ldr r0, [r1, #28] + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 528 .loc 1 892 8 view .LVU162 + 529 0078 0128 cmp r0, #1 + 530 007a 1AD0 beq .L43 + 531 .L35: + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 532 .loc 1 909 5 is_stmt 1 view .LVU163 + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 533 .loc 1 909 22 is_stmt 0 view .LVU164 + 534 007c 8869 ldr r0, [r1, #24] + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 535 .loc 1 909 8 view .LVU165 + 536 007e 0028 cmp r0, #0 + 537 0080 32D1 bne .L36 + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 538 .loc 1 912 7 is_stmt 1 view .LVU166 + 539 0082 8124 movs r4, #129 + 540 0084 A400 lsls r4, r4, #2 + 541 0086 1059 ldr r0, [r2, r4] + 542 0088 2840 ands r0, r5 + 543 008a 1051 str r0, [r2, r4] + 544 .L37: + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 545 .loc 1 921 5 view .LVU167 + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 546 .loc 1 921 22 is_stmt 0 view .LVU168 + 547 008c 0869 ldr r0, [r1, #16] + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 548 .loc 1 921 8 view .LVU169 + 549 008e 0028 cmp r0, #0 + 550 0090 30D1 bne .L38 + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 551 .loc 1 924 7 is_stmt 1 view .LVU170 + 552 0092 8524 movs r4, #133 + 553 0094 A400 lsls r4, r4, #2 + 554 0096 1059 ldr r0, [r2, r4] + 555 0098 2840 ands r0, r5 + 556 009a 1051 str r0, [r2, r4] + 557 .L39: + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 558 .loc 1 933 5 view .LVU171 + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 559 .loc 1 933 22 is_stmt 0 view .LVU172 + ARM GAS /tmp/ccZqSNsg.s page 30 + + + 560 009c 096A ldr r1, [r1, #32] + 561 .LVL27: + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 562 .loc 1 933 8 view .LVU173 + 563 009e 0129 cmp r1, #1 + 564 00a0 2ED0 beq .L44 + 565 .LVL28: + 566 .L40: + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 567 .loc 1 939 5 is_stmt 1 view .LVU174 + 568 00a2 8021 movs r1, #128 + 569 00a4 8900 lsls r1, r1, #2 + 570 00a6 5358 ldr r3, [r2, r1] + 571 00a8 0120 movs r0, #1 + 572 00aa 8343 bics r3, r0 + 573 00ac 5350 str r3, [r2, r1] + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 574 .loc 1 942 5 view .LVU175 + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 575 .loc 1 942 12 is_stmt 0 view .LVU176 + 576 00ae 0020 movs r0, #0 + 577 00b0 B4E7 b .L41 + 578 .LVL29: + 579 .L43: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 580 .loc 1 895 7 is_stmt 1 view .LVU177 + 581 00b2 8324 movs r4, #131 + 582 00b4 A400 lsls r4, r4, #2 + 583 00b6 1059 ldr r0, [r2, r4] + 584 00b8 1843 orrs r0, r3 + 585 00ba 1051 str r0, [r2, r4] + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 586 .loc 1 898 7 view .LVU178 + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 587 .loc 1 899 48 is_stmt 0 view .LVU179 + 588 00bc 0C68 ldr r4, [r1] + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 589 .loc 1 899 64 view .LVU180 + 590 00be 2404 lsls r4, r4, #16 + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 591 .loc 1 900 47 view .LVU181 + 592 00c0 4E68 ldr r6, [r1, #4] + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 593 .loc 1 900 22 view .LVU182 + 594 00c2 3604 lsls r6, r6, #16 + 595 00c4 360C lsrs r6, r6, #16 + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 596 .loc 1 898 44 view .LVU183 + 597 00c6 4869 ldr r0, [r1, #20] + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 598 .loc 1 899 72 view .LVU184 + 599 00c8 3443 orrs r4, r6 + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 600 .loc 1 898 62 view .LVU185 + 601 00ca 4830 adds r0, r0, #72 + 602 00cc C000 lsls r0, r0, #3 + 603 00ce 8450 str r4, [r0, r2] + ARM GAS /tmp/ccZqSNsg.s page 31 + + + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 604 .loc 1 903 7 is_stmt 1 view .LVU186 + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 605 .loc 1 904 48 is_stmt 0 view .LVU187 + 606 00d0 8C68 ldr r4, [r1, #8] + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 607 .loc 1 904 68 view .LVU188 + 608 00d2 2404 lsls r4, r4, #16 + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 609 .loc 1 905 47 view .LVU189 + 610 00d4 CE68 ldr r6, [r1, #12] + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 611 .loc 1 905 22 view .LVU190 + 612 00d6 3604 lsls r6, r6, #16 + 613 00d8 360C lsrs r6, r6, #16 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 614 .loc 1 903 44 view .LVU191 + 615 00da 4869 ldr r0, [r1, #20] + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 616 .loc 1 904 76 view .LVU192 + 617 00dc 3443 orrs r4, r6 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 618 .loc 1 903 62 view .LVU193 + 619 00de 4830 adds r0, r0, #72 + 620 00e0 C000 lsls r0, r0, #3 + 621 00e2 1018 adds r0, r2, r0 + 622 00e4 4460 str r4, [r0, #4] + 623 00e6 C9E7 b .L35 + 624 .L36: + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 625 .loc 1 917 7 is_stmt 1 view .LVU194 + 626 00e8 8124 movs r4, #129 + 627 00ea A400 lsls r4, r4, #2 + 628 00ec 1059 ldr r0, [r2, r4] + 629 00ee 1843 orrs r0, r3 + 630 00f0 1051 str r0, [r2, r4] + 631 00f2 CBE7 b .L37 + 632 .L38: + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 633 .loc 1 929 7 view .LVU195 + 634 00f4 8524 movs r4, #133 + 635 00f6 A400 lsls r4, r4, #2 + 636 00f8 1059 ldr r0, [r2, r4] + 637 00fa 1843 orrs r0, r3 + 638 00fc 1051 str r0, [r2, r4] + 639 00fe CDE7 b .L39 + 640 .LVL30: + 641 .L44: + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 642 .loc 1 935 7 view .LVU196 + 643 0100 8720 movs r0, #135 + 644 0102 8000 lsls r0, r0, #2 + 645 0104 1158 ldr r1, [r2, r0] + 646 0106 0B43 orrs r3, r1 + 647 .LVL31: + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 648 .loc 1 935 7 is_stmt 0 view .LVU197 + ARM GAS /tmp/ccZqSNsg.s page 32 + + + 649 0108 1350 str r3, [r2, r0] + 650 010a CAE7 b .L40 + 651 .cfi_endproc + 652 .LFE44: + 654 .section .text.HAL_CAN_Start,"ax",%progbits + 655 .align 1 + 656 .global HAL_CAN_Start + 657 .syntax unified + 658 .code 16 + 659 .thumb_func + 661 HAL_CAN_Start: + 662 .LVL32: + 663 .LFB45: + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group3 Control functions + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Control functions + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Control functions ##### + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] This section provides functions allowing to: + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_Start : Start the CAN module + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_Stop : Stop the CAN module + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RequestSleep : Request sleep mode entry. + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_WakeUp : Wake up from sleep mode. + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_IsSleepActive : Check is sleep mode is active. + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** and activate the corresponding + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmission request + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_AbortTxRequest : Abort transmission request + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pending on the selected Tx mailbox + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Start the CAN module. + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 664 .loc 1 991 1 is_stmt 1 view -0 + 665 .cfi_startproc + 666 @ args = 0, pretend = 0, frame = 0 + 667 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccZqSNsg.s page 33 + + + 668 .loc 1 991 1 is_stmt 0 view .LVU199 + 669 0000 70B5 push {r4, r5, r6, lr} + 670 .cfi_def_cfa_offset 16 + 671 .cfi_offset 4, -16 + 672 .cfi_offset 5, -12 + 673 .cfi_offset 6, -8 + 674 .cfi_offset 14, -4 + 675 0002 0400 movs r4, r0 + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 676 .loc 1 992 3 is_stmt 1 view .LVU200 + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 677 .loc 1 994 3 view .LVU201 + 678 .loc 1 994 11 is_stmt 0 view .LVU202 + 679 0004 2023 movs r3, #32 + 680 0006 C35C ldrb r3, [r0, r3] + 681 0008 DEB2 uxtb r6, r3 + 682 .loc 1 994 6 view .LVU203 + 683 000a 012B cmp r3, #1 + 684 000c 07D0 beq .L50 + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN peripheral state */ + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_LISTENING; + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request leave initialisation */ +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get tick */ +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** tickstart = HAL_GetTick(); +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wait the acknowledge */ +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check for the Timeout */ +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset the CAN ErrorCode */ +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; + 685 .loc 1 1030 5 is_stmt 1 view .LVU204 + ARM GAS /tmp/ccZqSNsg.s page 34 + + + 686 .loc 1 1030 9 is_stmt 0 view .LVU205 + 687 000e 426A ldr r2, [r0, #36] + 688 .loc 1 1030 21 view .LVU206 + 689 0010 8023 movs r3, #128 + 690 0012 1B03 lsls r3, r3, #12 + 691 0014 1343 orrs r3, r2 + 692 0016 4362 str r3, [r0, #36] +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 693 .loc 1 1032 5 is_stmt 1 view .LVU207 + 694 .loc 1 1032 12 is_stmt 0 view .LVU208 + 695 0018 0126 movs r6, #1 + 696 .LVL33: + 697 .L48: +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 698 .loc 1 1034 1 view .LVU209 + 699 001a 3000 movs r0, r6 + 700 @ sp needed + 701 .LVL34: + 702 .loc 1 1034 1 view .LVU210 + 703 001c 70BD pop {r4, r5, r6, pc} + 704 .LVL35: + 705 .L50: + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 706 .loc 1 997 5 is_stmt 1 view .LVU211 + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 707 .loc 1 997 17 is_stmt 0 view .LVU212 + 708 001e 1F33 adds r3, r3, #31 + 709 0020 0222 movs r2, #2 + 710 0022 C254 strb r2, [r0, r3] +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 711 .loc 1 1000 5 is_stmt 1 view .LVU213 + 712 0024 0268 ldr r2, [r0] + 713 0026 1368 ldr r3, [r2] + 714 0028 0121 movs r1, #1 + 715 002a 8B43 bics r3, r1 + 716 002c 1360 str r3, [r2] +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 717 .loc 1 1003 5 view .LVU214 +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 718 .loc 1 1003 17 is_stmt 0 view .LVU215 + 719 002e FFF7FEFF bl HAL_GetTick + 720 .LVL36: +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 721 .loc 1 1003 17 view .LVU216 + 722 0032 0500 movs r5, r0 + 723 .LVL37: +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 724 .loc 1 1006 5 is_stmt 1 view .LVU217 + 725 .L47: +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 726 .loc 1 1006 49 view .LVU218 +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 727 .loc 1 1006 17 is_stmt 0 view .LVU219 + 728 0034 2368 ldr r3, [r4] +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccZqSNsg.s page 35 + + + 729 .loc 1 1006 27 view .LVU220 + 730 0036 5B68 ldr r3, [r3, #4] +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 731 .loc 1 1006 49 view .LVU221 + 732 0038 DB07 lsls r3, r3, #31 + 733 003a 0DD5 bpl .L51 +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 734 .loc 1 1009 7 is_stmt 1 view .LVU222 +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 735 .loc 1 1009 12 is_stmt 0 view .LVU223 + 736 003c FFF7FEFF bl HAL_GetTick + 737 .LVL38: +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 738 .loc 1 1009 26 discriminator 1 view .LVU224 + 739 0040 401B subs r0, r0, r5 +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 740 .loc 1 1009 10 discriminator 1 view .LVU225 + 741 0042 0A28 cmp r0, #10 + 742 0044 F6D9 bls .L47 +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 743 .loc 1 1012 9 is_stmt 1 view .LVU226 +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 744 .loc 1 1012 13 is_stmt 0 view .LVU227 + 745 0046 626A ldr r2, [r4, #36] +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 746 .loc 1 1012 25 view .LVU228 + 747 0048 8023 movs r3, #128 + 748 004a 9B02 lsls r3, r3, #10 + 749 004c 1343 orrs r3, r2 + 750 004e 6362 str r3, [r4, #36] +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 751 .loc 1 1015 9 is_stmt 1 view .LVU229 +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 752 .loc 1 1015 21 is_stmt 0 view .LVU230 + 753 0050 2023 movs r3, #32 + 754 0052 0522 movs r2, #5 + 755 0054 E254 strb r2, [r4, r3] +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 756 .loc 1 1017 9 is_stmt 1 view .LVU231 +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 757 .loc 1 1017 16 is_stmt 0 view .LVU232 + 758 0056 E0E7 b .L48 + 759 .L51: +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 760 .loc 1 1022 5 is_stmt 1 view .LVU233 +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 761 .loc 1 1022 21 is_stmt 0 view .LVU234 + 762 0058 0023 movs r3, #0 + 763 005a 6362 str r3, [r4, #36] +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 764 .loc 1 1025 5 is_stmt 1 view .LVU235 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 765 .loc 1 1025 12 is_stmt 0 view .LVU236 + 766 005c 0026 movs r6, #0 + 767 005e DCE7 b .L48 + 768 .cfi_endproc + 769 .LFE45: + ARM GAS /tmp/ccZqSNsg.s page 36 + + + 771 .section .text.HAL_CAN_Stop,"ax",%progbits + 772 .align 1 + 773 .global HAL_CAN_Stop + 774 .syntax unified + 775 .code 16 + 776 .thumb_func + 778 HAL_CAN_Stop: + 779 .LVL39: + 780 .LFB46: +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Stop the CAN module and enable access to configuration registers. +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 781 .loc 1 1043 1 is_stmt 1 view -0 + 782 .cfi_startproc + 783 @ args = 0, pretend = 0, frame = 0 + 784 @ frame_needed = 0, uses_anonymous_args = 0 + 785 .loc 1 1043 1 is_stmt 0 view .LVU238 + 786 0000 70B5 push {r4, r5, r6, lr} + 787 .cfi_def_cfa_offset 16 + 788 .cfi_offset 4, -16 + 789 .cfi_offset 5, -12 + 790 .cfi_offset 6, -8 + 791 .cfi_offset 14, -4 + 792 0002 0400 movs r4, r0 +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 793 .loc 1 1044 3 is_stmt 1 view .LVU239 +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_LISTENING) + 794 .loc 1 1046 3 view .LVU240 + 795 .loc 1 1046 11 is_stmt 0 view .LVU241 + 796 0004 2023 movs r3, #32 + 797 0006 C35C ldrb r3, [r0, r3] + 798 .loc 1 1046 6 view .LVU242 + 799 0008 022B cmp r3, #2 + 800 000a 06D0 beq .L57 +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request initialisation */ +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get tick */ +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** tickstart = HAL_GetTick(); +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wait the acknowledge */ +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check for the Timeout */ +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccZqSNsg.s page 37 + + +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Exit from sleep mode */ +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN peripheral state */ +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY; +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; + 801 .loc 1 1082 5 is_stmt 1 view .LVU243 + 802 .loc 1 1082 9 is_stmt 0 view .LVU244 + 803 000c 426A ldr r2, [r0, #36] + 804 .loc 1 1082 21 view .LVU245 + 805 000e 8023 movs r3, #128 + 806 0010 5B03 lsls r3, r3, #13 + 807 0012 1343 orrs r3, r2 + 808 0014 4362 str r3, [r0, #36] +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 809 .loc 1 1084 5 is_stmt 1 view .LVU246 + 810 .loc 1 1084 12 is_stmt 0 view .LVU247 + 811 0016 0120 movs r0, #1 + 812 .LVL40: + 813 .L55: +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 814 .loc 1 1086 1 view .LVU248 + 815 @ sp needed + 816 .LVL41: + 817 .loc 1 1086 1 view .LVU249 + 818 0018 70BD pop {r4, r5, r6, pc} + 819 .LVL42: + 820 .L57: +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 821 .loc 1 1049 5 is_stmt 1 view .LVU250 + 822 001a 0268 ldr r2, [r0] + 823 001c 1368 ldr r3, [r2] + 824 001e 0121 movs r1, #1 + 825 0020 0B43 orrs r3, r1 + 826 0022 1360 str r3, [r2] +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 827 .loc 1 1052 5 view .LVU251 +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 828 .loc 1 1052 17 is_stmt 0 view .LVU252 + 829 0024 FFF7FEFF bl HAL_GetTick + 830 .LVL43: + ARM GAS /tmp/ccZqSNsg.s page 38 + + +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 831 .loc 1 1052 17 view .LVU253 + 832 0028 0500 movs r5, r0 + 833 .LVL44: +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 834 .loc 1 1055 5 is_stmt 1 view .LVU254 + 835 .L54: +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 836 .loc 1 1055 49 view .LVU255 +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 837 .loc 1 1055 17 is_stmt 0 view .LVU256 + 838 002a 2268 ldr r2, [r4] +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 839 .loc 1 1055 27 view .LVU257 + 840 002c 5368 ldr r3, [r2, #4] +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 841 .loc 1 1055 49 view .LVU258 + 842 002e DB07 lsls r3, r3, #31 + 843 0030 0ED4 bmi .L58 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 844 .loc 1 1058 7 is_stmt 1 view .LVU259 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 845 .loc 1 1058 12 is_stmt 0 view .LVU260 + 846 0032 FFF7FEFF bl HAL_GetTick + 847 .LVL45: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 848 .loc 1 1058 26 discriminator 1 view .LVU261 + 849 0036 401B subs r0, r0, r5 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 850 .loc 1 1058 10 discriminator 1 view .LVU262 + 851 0038 0A28 cmp r0, #10 + 852 003a F6D9 bls .L54 +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 853 .loc 1 1061 9 is_stmt 1 view .LVU263 +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 854 .loc 1 1061 13 is_stmt 0 view .LVU264 + 855 003c 626A ldr r2, [r4, #36] +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 856 .loc 1 1061 25 view .LVU265 + 857 003e 8023 movs r3, #128 + 858 0040 9B02 lsls r3, r3, #10 + 859 0042 1343 orrs r3, r2 + 860 0044 6362 str r3, [r4, #36] +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 861 .loc 1 1064 9 is_stmt 1 view .LVU266 +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 862 .loc 1 1064 21 is_stmt 0 view .LVU267 + 863 0046 2023 movs r3, #32 + 864 0048 0522 movs r2, #5 + 865 004a E254 strb r2, [r4, r3] +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 866 .loc 1 1066 9 is_stmt 1 view .LVU268 +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 867 .loc 1 1066 16 is_stmt 0 view .LVU269 + 868 004c 0120 movs r0, #1 + 869 004e E3E7 b .L55 + 870 .L58: + ARM GAS /tmp/ccZqSNsg.s page 39 + + +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 871 .loc 1 1071 5 is_stmt 1 view .LVU270 + 872 0050 1368 ldr r3, [r2] + 873 0052 0221 movs r1, #2 + 874 0054 8B43 bics r3, r1 + 875 0056 1360 str r3, [r2] +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 876 .loc 1 1074 5 view .LVU271 +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 877 .loc 1 1074 17 is_stmt 0 view .LVU272 + 878 0058 2023 movs r3, #32 + 879 005a 0122 movs r2, #1 + 880 005c E254 strb r2, [r4, r3] +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 881 .loc 1 1077 5 is_stmt 1 view .LVU273 +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 882 .loc 1 1077 12 is_stmt 0 view .LVU274 + 883 005e 0020 movs r0, #0 + 884 0060 DAE7 b .L55 + 885 .cfi_endproc + 886 .LFE46: + 888 .section .text.HAL_CAN_DeInit,"ax",%progbits + 889 .align 1 + 890 .global HAL_CAN_DeInit + 891 .syntax unified + 892 .code 16 + 893 .thumb_func + 895 HAL_CAN_DeInit: + 896 .LVL46: + 897 .LFB41: + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check CAN handle */ + 898 .loc 1 461 1 is_stmt 1 view -0 + 899 .cfi_startproc + 900 @ args = 0, pretend = 0, frame = 0 + 901 @ frame_needed = 0, uses_anonymous_args = 0 + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check CAN handle */ + 902 .loc 1 461 1 is_stmt 0 view .LVU276 + 903 0000 10B5 push {r4, lr} + 904 .cfi_def_cfa_offset 8 + 905 .cfi_offset 4, -8 + 906 .cfi_offset 14, -4 + 907 0002 041E subs r4, r0, #0 + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 908 .loc 1 463 3 is_stmt 1 view .LVU277 + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 909 .loc 1 463 6 is_stmt 0 view .LVU278 + 910 0004 10D0 beq .L61 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 911 .loc 1 469 3 is_stmt 1 view .LVU279 + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 912 .loc 1 472 3 view .LVU280 + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 913 .loc 1 472 9 is_stmt 0 view .LVU281 + 914 0006 FFF7FEFF bl HAL_CAN_Stop + 915 .LVL47: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 916 .loc 1 485 3 is_stmt 1 view .LVU282 + ARM GAS /tmp/ccZqSNsg.s page 40 + + + 917 000a 2000 movs r0, r4 + 918 000c FFF7FEFF bl HAL_CAN_MspDeInit + 919 .LVL48: + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 920 .loc 1 489 3 view .LVU283 + 921 0010 2268 ldr r2, [r4] + 922 0012 1168 ldr r1, [r2] + 923 0014 8023 movs r3, #128 + 924 0016 1B02 lsls r3, r3, #8 + 925 0018 0B43 orrs r3, r1 + 926 001a 1360 str r3, [r2] + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 927 .loc 1 492 3 view .LVU284 + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 928 .loc 1 492 19 is_stmt 0 view .LVU285 + 929 001c 0023 movs r3, #0 + 930 001e 6362 str r3, [r4, #36] + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 931 .loc 1 495 3 is_stmt 1 view .LVU286 + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 932 .loc 1 495 15 is_stmt 0 view .LVU287 + 933 0020 2022 movs r2, #32 + 934 0022 A354 strb r3, [r4, r2] + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 935 .loc 1 498 3 is_stmt 1 view .LVU288 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 936 .loc 1 498 10 is_stmt 0 view .LVU289 + 937 0024 0020 movs r0, #0 + 938 .L60: + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 939 .loc 1 499 1 view .LVU290 + 940 @ sp needed + 941 .LVL49: + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 942 .loc 1 499 1 view .LVU291 + 943 0026 10BD pop {r4, pc} + 944 .LVL50: + 945 .L61: + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 946 .loc 1 465 12 view .LVU292 + 947 0028 0120 movs r0, #1 + 948 .LVL51: + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 949 .loc 1 465 12 view .LVU293 + 950 002a FCE7 b .L60 + 951 .cfi_endproc + 952 .LFE41: + 954 .section .text.HAL_CAN_RequestSleep,"ax",%progbits + 955 .align 1 + 956 .global HAL_CAN_RequestSleep + 957 .syntax unified + 958 .code 16 + 959 .thumb_func + 961 HAL_CAN_RequestSleep: + 962 .LVL52: + 963 .LFB47: +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccZqSNsg.s page 41 + + +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Request the sleep mode (low power) entry. +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * When returning from this function, Sleep mode will be entered +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * as soon as the current CAN activity (transmission or reception +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * of a CAN frame) has been completed. +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status. +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 964 .loc 1 1098 1 is_stmt 1 view -0 + 965 .cfi_startproc + 966 @ args = 0, pretend = 0, frame = 0 + 967 @ frame_needed = 0, uses_anonymous_args = 0 + 968 @ link register save eliminated. +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 969 .loc 1 1099 3 view .LVU295 + 970 .loc 1 1099 24 is_stmt 0 view .LVU296 + 971 0000 2023 movs r3, #32 + 972 0002 C35C ldrb r3, [r0, r3] + 973 .LVL53: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 974 .loc 1 1101 3 is_stmt 1 view .LVU297 + 975 .loc 1 1101 38 is_stmt 0 view .LVU298 + 976 0004 013B subs r3, r3, #1 + 977 .LVL54: + 978 .loc 1 1101 38 view .LVU299 + 979 0006 DBB2 uxtb r3, r3 + 980 .LVL55: + 981 .loc 1 1101 6 view .LVU300 + 982 0008 012B cmp r3, #1 + 983 000a 06D9 bls .L65 +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request Sleep mode */ +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 984 .loc 1 1113 5 is_stmt 1 view .LVU301 + 985 .loc 1 1113 9 is_stmt 0 view .LVU302 + 986 000c 426A ldr r2, [r0, #36] + 987 .loc 1 1113 21 view .LVU303 + 988 000e 8023 movs r3, #128 + 989 0010 DB02 lsls r3, r3, #11 + 990 0012 1343 orrs r3, r2 + 991 0014 4362 str r3, [r0, #36] +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + ARM GAS /tmp/ccZqSNsg.s page 42 + + + 992 .loc 1 1116 5 is_stmt 1 view .LVU304 + 993 .loc 1 1116 12 is_stmt 0 view .LVU305 + 994 0016 0120 movs r0, #1 + 995 .LVL56: + 996 .L64: +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 997 .loc 1 1118 1 view .LVU306 + 998 @ sp needed + 999 0018 7047 bx lr + 1000 .LVL57: + 1001 .L65: +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 1002 .loc 1 1105 5 is_stmt 1 view .LVU307 + 1003 001a 0268 ldr r2, [r0] + 1004 001c 1368 ldr r3, [r2] + 1005 001e 0221 movs r1, #2 + 1006 0020 0B43 orrs r3, r1 + 1007 0022 1360 str r3, [r2] +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1008 .loc 1 1108 5 view .LVU308 +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1009 .loc 1 1108 12 is_stmt 0 view .LVU309 + 1010 0024 0020 movs r0, #0 + 1011 .LVL58: +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1012 .loc 1 1108 12 view .LVU310 + 1013 0026 F7E7 b .L64 + 1014 .cfi_endproc + 1015 .LFE47: + 1017 .section .text.HAL_CAN_WakeUp,"ax",%progbits + 1018 .align 1 + 1019 .global HAL_CAN_WakeUp + 1020 .syntax unified + 1021 .code 16 + 1022 .thumb_func + 1024 HAL_CAN_WakeUp: + 1025 .LVL59: + 1026 .LFB48: +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Wake up from sleep mode. +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * When returning with HAL_OK status from this function, Sleep mode +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * is exited. +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status. +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1027 .loc 1 1129 1 is_stmt 1 view -0 + 1028 .cfi_startproc + 1029 @ args = 0, pretend = 0, frame = 8 + 1030 @ frame_needed = 0, uses_anonymous_args = 0 + 1031 @ link register save eliminated. + 1032 .loc 1 1129 1 is_stmt 0 view .LVU312 + 1033 0000 82B0 sub sp, sp, #8 + ARM GAS /tmp/ccZqSNsg.s page 43 + + + 1034 .cfi_def_cfa_offset 8 +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __IO uint32_t count = 0; + 1035 .loc 1 1130 3 is_stmt 1 view .LVU313 + 1036 .loc 1 1130 17 is_stmt 0 view .LVU314 + 1037 0002 0023 movs r3, #0 + 1038 0004 0193 str r3, [sp, #4] +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1039 .loc 1 1131 3 is_stmt 1 view .LVU315 + 1040 .loc 1 1131 24 is_stmt 0 view .LVU316 + 1041 0006 2033 adds r3, r3, #32 + 1042 0008 C35C ldrb r3, [r0, r3] + 1043 .LVL60: +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1044 .loc 1 1133 3 is_stmt 1 view .LVU317 + 1045 .loc 1 1133 38 is_stmt 0 view .LVU318 + 1046 000a 013B subs r3, r3, #1 + 1047 .LVL61: + 1048 .loc 1 1133 38 view .LVU319 + 1049 000c DBB2 uxtb r3, r3 + 1050 .LVL62: + 1051 .loc 1 1133 6 view .LVU320 + 1052 000e 012B cmp r3, #1 + 1053 0010 18D8 bhi .L67 +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wake up request */ +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); + 1054 .loc 1 1137 5 is_stmt 1 view .LVU321 + 1055 0012 0268 ldr r2, [r0] + 1056 0014 1368 ldr r3, [r2] + 1057 0016 0221 movs r1, #2 + 1058 0018 8B43 bics r3, r1 + 1059 001a 1360 str r3, [r2] + 1060 .L70: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wait sleep mode is exited */ +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** do + 1061 .loc 1 1140 5 view .LVU322 +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Increment counter */ +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** count++; + 1062 .loc 1 1143 7 view .LVU323 + 1063 .loc 1 1143 12 is_stmt 0 view .LVU324 + 1064 001c 019B ldr r3, [sp, #4] + 1065 001e 0133 adds r3, r3, #1 + 1066 0020 0193 str r3, [sp, #4] +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check if timeout is reached */ +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (count > CAN_WAKEUP_TIMEOUT_COUNTER) + 1067 .loc 1 1146 7 is_stmt 1 view .LVU325 + 1068 .loc 1 1146 17 is_stmt 0 view .LVU326 + 1069 0022 019A ldr r2, [sp, #4] + 1070 .loc 1 1146 10 view .LVU327 + 1071 0024 0B4B ldr r3, .L73 + 1072 0026 9A42 cmp r2, r3 + 1073 0028 05D8 bhi .L72 + ARM GAS /tmp/ccZqSNsg.s page 44 + + +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); + 1074 .loc 1 1153 51 is_stmt 1 view .LVU328 + 1075 .loc 1 1153 19 is_stmt 0 view .LVU329 + 1076 002a 0368 ldr r3, [r0] + 1077 .loc 1 1153 29 view .LVU330 + 1078 002c 5B68 ldr r3, [r3, #4] + 1079 .loc 1 1153 51 view .LVU331 + 1080 002e 9B07 lsls r3, r3, #30 + 1081 0030 F4D4 bmi .L70 +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 1082 .loc 1 1156 12 view .LVU332 + 1083 0032 0020 movs r0, #0 + 1084 .LVL63: + 1085 .loc 1 1156 12 view .LVU333 + 1086 0034 0CE0 b .L69 + 1087 .LVL64: + 1088 .L72: +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 1089 .loc 1 1149 9 is_stmt 1 view .LVU334 +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 1090 .loc 1 1149 13 is_stmt 0 view .LVU335 + 1091 0036 426A ldr r2, [r0, #36] +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 1092 .loc 1 1149 25 view .LVU336 + 1093 0038 8023 movs r3, #128 + 1094 003a 9B02 lsls r3, r3, #10 + 1095 003c 1343 orrs r3, r2 + 1096 003e 4362 str r3, [r0, #36] +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1097 .loc 1 1151 9 is_stmt 1 view .LVU337 +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1098 .loc 1 1151 16 is_stmt 0 view .LVU338 + 1099 0040 0120 movs r0, #1 + 1100 .LVL65: +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1101 .loc 1 1151 16 view .LVU339 + 1102 0042 05E0 b .L69 + 1103 .LVL66: + 1104 .L67: +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1105 .loc 1 1161 5 is_stmt 1 view .LVU340 + 1106 .loc 1 1161 9 is_stmt 0 view .LVU341 + 1107 0044 426A ldr r2, [r0, #36] + 1108 .loc 1 1161 21 view .LVU342 + 1109 0046 8023 movs r3, #128 + ARM GAS /tmp/ccZqSNsg.s page 45 + + + 1110 0048 DB02 lsls r3, r3, #11 + 1111 004a 1343 orrs r3, r2 + 1112 004c 4362 str r3, [r0, #36] +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1113 .loc 1 1163 5 is_stmt 1 view .LVU343 + 1114 .loc 1 1163 12 is_stmt 0 view .LVU344 + 1115 004e 0120 movs r0, #1 + 1116 .LVL67: + 1117 .L69: +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1118 .loc 1 1165 1 view .LVU345 + 1119 0050 02B0 add sp, sp, #8 + 1120 @ sp needed + 1121 0052 7047 bx lr + 1122 .L74: + 1123 .align 2 + 1124 .L73: + 1125 0054 40420F00 .word 1000000 + 1126 .cfi_endproc + 1127 .LFE48: + 1129 .section .text.HAL_CAN_IsSleepActive,"ax",%progbits + 1130 .align 1 + 1131 .global HAL_CAN_IsSleepActive + 1132 .syntax unified + 1133 .code 16 + 1134 .thumb_func + 1136 HAL_CAN_IsSleepActive: + 1137 .LVL68: + 1138 .LFB49: +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Check is sleep mode is active. +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Status +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * - 0 : Sleep mode is not active. +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * - 1 : Sleep mode is active. +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan) +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1139 .loc 1 1176 1 is_stmt 1 view -0 + 1140 .cfi_startproc + 1141 @ args = 0, pretend = 0, frame = 0 + 1142 @ frame_needed = 0, uses_anonymous_args = 0 + 1143 @ link register save eliminated. +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t status = 0U; + 1144 .loc 1 1177 3 view .LVU347 +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1145 .loc 1 1178 3 view .LVU348 + 1146 .loc 1 1178 24 is_stmt 0 view .LVU349 + 1147 0000 2023 movs r3, #32 + 1148 0002 C35C ldrb r3, [r0, r3] + 1149 .LVL69: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + ARM GAS /tmp/ccZqSNsg.s page 46 + + + 1150 .loc 1 1180 3 is_stmt 1 view .LVU350 + 1151 .loc 1 1180 38 is_stmt 0 view .LVU351 + 1152 0004 013B subs r3, r3, #1 + 1153 .LVL70: + 1154 .loc 1 1180 38 view .LVU352 + 1155 0006 DBB2 uxtb r3, r3 + 1156 .LVL71: + 1157 .loc 1 1180 6 view .LVU353 + 1158 0008 012B cmp r3, #1 + 1159 000a 01D9 bls .L79 +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1160 .loc 1 1177 12 view .LVU354 + 1161 000c 0020 movs r0, #0 + 1162 .LVL72: + 1163 .L75: +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Sleep mode */ +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = 1U; +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1164 .loc 1 1192 1 view .LVU355 + 1165 @ sp needed + 1166 000e 7047 bx lr + 1167 .LVL73: + 1168 .L79: +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1169 .loc 1 1184 5 is_stmt 1 view .LVU356 +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1170 .loc 1 1184 14 is_stmt 0 view .LVU357 + 1171 0010 0368 ldr r3, [r0] +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1172 .loc 1 1184 24 view .LVU358 + 1173 0012 5B68 ldr r3, [r3, #4] +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1174 .loc 1 1184 30 view .LVU359 + 1175 0014 0222 movs r2, #2 + 1176 0016 1000 movs r0, r2 + 1177 .LVL74: +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1178 .loc 1 1184 30 view .LVU360 + 1179 0018 1840 ands r0, r3 +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1180 .loc 1 1184 8 view .LVU361 + 1181 001a 1A42 tst r2, r3 + 1182 001c F7D0 beq .L75 +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1183 .loc 1 1186 14 view .LVU362 + 1184 001e 0120 movs r0, #1 + 1185 .LVL75: +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccZqSNsg.s page 47 + + + 1186 .loc 1 1191 3 is_stmt 1 view .LVU363 +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1187 .loc 1 1191 10 is_stmt 0 view .LVU364 + 1188 0020 F5E7 b .L75 + 1189 .cfi_endproc + 1190 .LFE49: + 1192 .section .text.HAL_CAN_AddTxMessage,"ax",%progbits + 1193 .align 1 + 1194 .global HAL_CAN_AddTxMessage + 1195 .syntax unified + 1196 .code 16 + 1197 .thumb_func + 1199 HAL_CAN_AddTxMessage: + 1200 .LVL76: + 1201 .LFB50: +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Add a message to the first free Tx mailbox and activate the +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * corresponding transmission request. +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param pHeader pointer to a CAN_TxHeaderTypeDef structure. +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param aData array containing the payload of the Tx frame. +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param pTxMailbox pointer to a variable where the function will return +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the TxMailbox used to store the Tx message. +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be a value of @arg CAN_Tx_Mailboxes. +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** const uint8_t aData[], uint32_t *pTxMailbox) +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1202 .loc 1 1208 1 is_stmt 1 view -0 + 1203 .cfi_startproc + 1204 @ args = 0, pretend = 0, frame = 0 + 1205 @ frame_needed = 0, uses_anonymous_args = 0 + 1206 .loc 1 1208 1 is_stmt 0 view .LVU366 + 1207 0000 70B5 push {r4, r5, r6, lr} + 1208 .cfi_def_cfa_offset 16 + 1209 .cfi_offset 4, -16 + 1210 .cfi_offset 5, -12 + 1211 .cfi_offset 6, -8 + 1212 .cfi_offset 14, -4 +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t transmitmailbox; + 1213 .loc 1 1209 3 is_stmt 1 view .LVU367 +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1214 .loc 1 1210 3 view .LVU368 + 1215 .loc 1 1210 24 is_stmt 0 view .LVU369 + 1216 0002 2024 movs r4, #32 + 1217 0004 045D ldrb r4, [r0, r4] + 1218 .LVL77: +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tsr = READ_REG(hcan->Instance->TSR); + 1219 .loc 1 1211 3 is_stmt 1 view .LVU370 + 1220 .loc 1 1211 18 is_stmt 0 view .LVU371 + 1221 0006 0568 ldr r5, [r0] + 1222 .loc 1 1211 12 view .LVU372 + 1223 0008 AD68 ldr r5, [r5, #8] + 1224 .LVL78: + ARM GAS /tmp/ccZqSNsg.s page 48 + + +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_IDTYPE(pHeader->IDE)); + 1225 .loc 1 1214 3 is_stmt 1 view .LVU373 +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_RTR(pHeader->RTR)); + 1226 .loc 1 1215 3 view .LVU374 +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_DLC(pHeader->DLC)); + 1227 .loc 1 1216 3 view .LVU375 +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1228 .loc 1 1217 3 view .LVU376 +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_STDID(pHeader->StdId)); + 1229 .loc 1 1219 5 view .LVU377 +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_EXTID(pHeader->ExtId)); + 1230 .loc 1 1223 5 view .LVU378 +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); + 1231 .loc 1 1225 3 view .LVU379 +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1232 .loc 1 1227 3 view .LVU380 + 1233 .loc 1 1227 38 is_stmt 0 view .LVU381 + 1234 000a 013C subs r4, r4, #1 + 1235 .LVL79: + 1236 .loc 1 1227 38 view .LVU382 + 1237 000c E4B2 uxtb r4, r4 + 1238 .LVL80: + 1239 .loc 1 1227 6 view .LVU383 + 1240 000e 012C cmp r4, #1 + 1241 0010 61D8 bhi .L81 +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check that all the Tx mailboxes are not full */ +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((tsr & CAN_TSR_TME0) != 0U) || + 1242 .loc 1 1231 5 is_stmt 1 view .LVU384 +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) || + 1243 .loc 1 1232 38 is_stmt 0 view .LVU385 + 1244 0012 E024 movs r4, #224 + 1245 0014 6405 lsls r4, r4, #21 +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) || + 1246 .loc 1 1231 8 view .LVU386 + 1247 0016 2542 tst r5, r4 + 1248 0018 56D0 beq .L82 +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((tsr & CAN_TSR_TME2) != 0U)) +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Select an empty transmit mailbox */ +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; + 1249 .loc 1 1236 7 is_stmt 1 view .LVU387 + 1250 .loc 1 1236 46 is_stmt 0 view .LVU388 + 1251 001a 2D0E lsrs r5, r5, #24 + 1252 .LVL81: + 1253 .loc 1 1236 23 view .LVU389 + 1254 001c 0324 movs r4, #3 + 1255 001e 2C40 ands r4, r5 + ARM GAS /tmp/ccZqSNsg.s page 49 + + + 1256 .LVL82: +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Store the Tx mailbox */ +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *pTxMailbox = (uint32_t)1 << transmitmailbox; + 1257 .loc 1 1239 7 is_stmt 1 view .LVU390 + 1258 .loc 1 1239 33 is_stmt 0 view .LVU391 + 1259 0020 0125 movs r5, #1 + 1260 0022 A540 lsls r5, r5, r4 + 1261 .loc 1 1239 19 view .LVU392 + 1262 0024 1D60 str r5, [r3] +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set up the Id */ +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1263 .loc 1 1242 7 is_stmt 1 view .LVU393 + 1264 .loc 1 1242 18 is_stmt 0 view .LVU394 + 1265 0026 8B68 ldr r3, [r1, #8] + 1266 .LVL83: + 1267 .loc 1 1242 10 view .LVU395 + 1268 0028 002B cmp r3, #0 + 1269 002a 3AD1 bne .L83 +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | + 1270 .loc 1 1244 9 is_stmt 1 view .LVU396 + 1271 .loc 1 1244 68 is_stmt 0 view .LVU397 + 1272 002c 0B68 ldr r3, [r1] + 1273 .loc 1 1244 76 view .LVU398 + 1274 002e 5B05 lsls r3, r3, #21 +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1275 .loc 1 1245 67 view .LVU399 + 1276 0030 CD68 ldr r5, [r1, #12] +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1277 .loc 1 1244 13 view .LVU400 + 1278 0032 0668 ldr r6, [r0] +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1279 .loc 1 1244 98 view .LVU401 + 1280 0034 2B43 orrs r3, r5 +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1281 .loc 1 1244 57 view .LVU402 + 1282 0036 2500 movs r5, r4 + 1283 0038 1835 adds r5, r5, #24 + 1284 003a 2D01 lsls r5, r5, #4 + 1285 003c AB51 str r3, [r5, r6] + 1286 .L84: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set up the DLC */ +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); + 1287 .loc 1 1255 7 is_stmt 1 view .LVU403 + 1288 .loc 1 1255 11 is_stmt 0 view .LVU404 + 1289 003e 0368 ldr r3, [r0] + 1290 .loc 1 1255 66 view .LVU405 + ARM GAS /tmp/ccZqSNsg.s page 50 + + + 1291 0040 0E69 ldr r6, [r1, #16] + 1292 .loc 1 1255 56 view .LVU406 + 1293 0042 2500 movs r5, r4 + 1294 0044 1835 adds r5, r5, #24 + 1295 0046 2D01 lsls r5, r5, #4 + 1296 0048 5B19 adds r3, r3, r5 + 1297 004a 5E60 str r6, [r3, #4] +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set up the Transmit Global Time mode */ +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pHeader->TransmitGlobalTime == ENABLE) + 1298 .loc 1 1258 7 is_stmt 1 view .LVU407 + 1299 .loc 1 1258 18 is_stmt 0 view .LVU408 + 1300 004c 0B7D ldrb r3, [r1, #20] + 1301 .loc 1 1258 10 view .LVU409 + 1302 004e 012B cmp r3, #1 + 1303 0050 32D0 beq .L87 + 1304 .LVL84: + 1305 .L85: +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set up the data field */ +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, + 1306 .loc 1 1264 7 is_stmt 1 view .LVU410 + 1307 0052 D379 ldrb r3, [r2, #7] + 1308 0054 1B06 lsls r3, r3, #24 + 1309 0056 9179 ldrb r1, [r2, #6] + 1310 0058 0904 lsls r1, r1, #16 + 1311 005a 0B43 orrs r3, r1 + 1312 005c 5179 ldrb r1, [r2, #5] + 1313 005e 0902 lsls r1, r1, #8 + 1314 0060 0B43 orrs r3, r1 + 1315 0062 1579 ldrb r5, [r2, #4] + 1316 0064 0168 ldr r1, [r0] + 1317 0066 2B43 orrs r3, r5 + 1318 0068 2501 lsls r5, r4, #4 + 1319 006a 4919 adds r1, r1, r5 + 1320 006c 8D31 adds r1, r1, #141 + 1321 006e FF31 adds r1, r1, #255 + 1322 0070 0B60 str r3, [r1] +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, + 1323 .loc 1 1269 7 view .LVU411 + 1324 0072 D378 ldrb r3, [r2, #3] + 1325 0074 1B06 lsls r3, r3, #24 + 1326 0076 9178 ldrb r1, [r2, #2] + 1327 0078 0904 lsls r1, r1, #16 + 1328 007a 0B43 orrs r3, r1 + 1329 007c 5178 ldrb r1, [r2, #1] + 1330 007e 0902 lsls r1, r1, #8 + 1331 0080 0B43 orrs r3, r1 + 1332 0082 1178 ldrb r1, [r2] + 1333 0084 0268 ldr r2, [r0] + ARM GAS /tmp/ccZqSNsg.s page 51 + + + 1334 .LVL85: + 1335 .loc 1 1269 7 is_stmt 0 view .LVU412 + 1336 0086 0B43 orrs r3, r1 + 1337 0088 5219 adds r2, r2, r5 + 1338 008a 8932 adds r2, r2, #137 + 1339 008c FF32 adds r2, r2, #255 + 1340 008e 1360 str r3, [r2] +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) | +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request transmission */ +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); + 1341 .loc 1 1276 7 is_stmt 1 view .LVU413 + 1342 0090 0268 ldr r2, [r0] + 1343 0092 1834 adds r4, r4, #24 + 1344 .LVL86: + 1345 .loc 1 1276 7 is_stmt 0 view .LVU414 + 1346 0094 2401 lsls r4, r4, #4 + 1347 .LVL87: + 1348 .loc 1 1276 7 view .LVU415 + 1349 0096 A358 ldr r3, [r4, r2] + 1350 0098 0121 movs r1, #1 + 1351 009a 0B43 orrs r3, r1 + 1352 009c A350 str r3, [r4, r2] +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 1353 .loc 1 1279 7 is_stmt 1 view .LVU416 + 1354 .loc 1 1279 14 is_stmt 0 view .LVU417 + 1355 009e 0020 movs r0, #0 + 1356 .LVL88: + 1357 .loc 1 1279 14 view .LVU418 + 1358 00a0 1FE0 b .L86 + 1359 .LVL89: + 1360 .L83: +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1361 .loc 1 1249 9 is_stmt 1 view .LVU419 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1362 .loc 1 1249 68 is_stmt 0 view .LVU420 + 1363 00a2 4D68 ldr r5, [r1, #4] +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1364 .loc 1 1249 76 view .LVU421 + 1365 00a4 ED00 lsls r5, r5, #3 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1366 .loc 1 1249 98 view .LVU422 + 1367 00a6 2B43 orrs r3, r5 +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1368 .loc 1 1251 67 view .LVU423 + 1369 00a8 CD68 ldr r5, [r1, #12] +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1370 .loc 1 1249 13 view .LVU424 + 1371 00aa 0668 ldr r6, [r0] +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1372 .loc 1 1250 73 view .LVU425 + 1373 00ac 2B43 orrs r3, r5 + ARM GAS /tmp/ccZqSNsg.s page 52 + + +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1374 .loc 1 1249 57 view .LVU426 + 1375 00ae 2500 movs r5, r4 + 1376 00b0 1835 adds r5, r5, #24 + 1377 00b2 2D01 lsls r5, r5, #4 + 1378 00b4 AB51 str r3, [r5, r6] + 1379 00b6 C2E7 b .L84 + 1380 .L87: +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1381 .loc 1 1260 9 is_stmt 1 view .LVU427 + 1382 00b8 0368 ldr r3, [r0] + 1383 00ba 5B19 adds r3, r3, r5 + 1384 00bc 5D68 ldr r5, [r3, #4] + 1385 00be 8021 movs r1, #128 + 1386 .LVL90: +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1387 .loc 1 1260 9 is_stmt 0 view .LVU428 + 1388 00c0 4900 lsls r1, r1, #1 + 1389 00c2 2943 orrs r1, r5 + 1390 00c4 5960 str r1, [r3, #4] + 1391 00c6 C4E7 b .L85 + 1392 .LVL91: + 1393 .L82: +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1394 .loc 1 1284 7 is_stmt 1 view .LVU429 + 1395 .loc 1 1284 11 is_stmt 0 view .LVU430 + 1396 00c8 426A ldr r2, [r0, #36] + 1397 .LVL92: + 1398 .loc 1 1284 23 view .LVU431 + 1399 00ca 8023 movs r3, #128 + 1400 .LVL93: + 1401 .loc 1 1284 23 view .LVU432 + 1402 00cc 9B03 lsls r3, r3, #14 + 1403 00ce 1343 orrs r3, r2 + 1404 00d0 4362 str r3, [r0, #36] +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1405 .loc 1 1286 7 is_stmt 1 view .LVU433 + 1406 .loc 1 1286 14 is_stmt 0 view .LVU434 + 1407 00d2 0120 movs r0, #1 + 1408 .LVL94: + 1409 .loc 1 1286 14 view .LVU435 + 1410 00d4 05E0 b .L86 + 1411 .LVL95: + 1412 .L81: +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1413 .loc 1 1292 5 is_stmt 1 view .LVU436 + 1414 .loc 1 1292 9 is_stmt 0 view .LVU437 + ARM GAS /tmp/ccZqSNsg.s page 53 + + + 1415 00d6 426A ldr r2, [r0, #36] + 1416 .LVL96: + 1417 .loc 1 1292 21 view .LVU438 + 1418 00d8 8023 movs r3, #128 + 1419 .LVL97: + 1420 .loc 1 1292 21 view .LVU439 + 1421 00da DB02 lsls r3, r3, #11 + 1422 00dc 1343 orrs r3, r2 + 1423 00de 4362 str r3, [r0, #36] +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1424 .loc 1 1294 5 is_stmt 1 view .LVU440 + 1425 .loc 1 1294 12 is_stmt 0 view .LVU441 + 1426 00e0 0120 movs r0, #1 + 1427 .LVL98: + 1428 .L86: +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1429 .loc 1 1296 1 view .LVU442 + 1430 @ sp needed + 1431 00e2 70BD pop {r4, r5, r6, pc} + 1432 .cfi_endproc + 1433 .LFE50: + 1435 .section .text.HAL_CAN_AbortTxRequest,"ax",%progbits + 1436 .align 1 + 1437 .global HAL_CAN_AbortTxRequest + 1438 .syntax unified + 1439 .code 16 + 1440 .thumb_func + 1442 HAL_CAN_AbortTxRequest: + 1443 .LVL99: + 1444 .LFB51: +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Abort transmission requests +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param TxMailboxes List of the Tx Mailboxes to abort. +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes. +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1445 .loc 1 1307 1 is_stmt 1 view -0 + 1446 .cfi_startproc + 1447 @ args = 0, pretend = 0, frame = 0 + 1448 @ frame_needed = 0, uses_anonymous_args = 0 + 1449 .loc 1 1307 1 is_stmt 0 view .LVU444 + 1450 0000 10B5 push {r4, lr} + 1451 .cfi_def_cfa_offset 8 + 1452 .cfi_offset 4, -8 + 1453 .cfi_offset 14, -4 +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1454 .loc 1 1308 3 is_stmt 1 view .LVU445 + 1455 .loc 1 1308 24 is_stmt 0 view .LVU446 + 1456 0002 2023 movs r3, #32 + 1457 0004 C35C ldrb r3, [r0, r3] + ARM GAS /tmp/ccZqSNsg.s page 54 + + + 1458 .LVL100: +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); + 1459 .loc 1 1311 3 is_stmt 1 view .LVU447 +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1460 .loc 1 1313 3 view .LVU448 + 1461 .loc 1 1313 38 is_stmt 0 view .LVU449 + 1462 0006 013B subs r3, r3, #1 + 1463 .LVL101: + 1464 .loc 1 1313 38 view .LVU450 + 1465 0008 DBB2 uxtb r3, r3 + 1466 .LVL102: + 1467 .loc 1 1313 6 view .LVU451 + 1468 000a 012B cmp r3, #1 + 1469 000c 06D9 bls .L97 +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 0 */ +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U) +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 0 */ +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 1 */ +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U) +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 1 */ +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 2 */ +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U) +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 2 */ +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1470 .loc 1 1343 5 is_stmt 1 view .LVU452 + 1471 .loc 1 1343 9 is_stmt 0 view .LVU453 + 1472 000e 426A ldr r2, [r0, #36] + 1473 .loc 1 1343 21 view .LVU454 + 1474 0010 8023 movs r3, #128 + 1475 0012 DB02 lsls r3, r3, #11 + 1476 0014 1343 orrs r3, r2 + 1477 0016 4362 str r3, [r0, #36] +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + ARM GAS /tmp/ccZqSNsg.s page 55 + + + 1478 .loc 1 1345 5 is_stmt 1 view .LVU455 + 1479 .loc 1 1345 12 is_stmt 0 view .LVU456 + 1480 0018 0120 movs r0, #1 + 1481 .LVL103: + 1482 .L93: +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1483 .loc 1 1347 1 view .LVU457 + 1484 @ sp needed + 1485 001a 10BD pop {r4, pc} + 1486 .LVL104: + 1487 .L97: +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1488 .loc 1 1317 5 is_stmt 1 view .LVU458 +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1489 .loc 1 1317 8 is_stmt 0 view .LVU459 + 1490 001c CB07 lsls r3, r1, #31 + 1491 001e 04D5 bpl .L90 +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1492 .loc 1 1320 7 is_stmt 1 view .LVU460 + 1493 0020 0268 ldr r2, [r0] + 1494 0022 9368 ldr r3, [r2, #8] + 1495 0024 8024 movs r4, #128 + 1496 0026 2343 orrs r3, r4 + 1497 0028 9360 str r3, [r2, #8] + 1498 .L90: +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1499 .loc 1 1324 5 view .LVU461 +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1500 .loc 1 1324 8 is_stmt 0 view .LVU462 + 1501 002a 8B07 lsls r3, r1, #30 + 1502 002c 05D5 bpl .L91 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1503 .loc 1 1327 7 is_stmt 1 view .LVU463 + 1504 002e 0268 ldr r2, [r0] + 1505 0030 9468 ldr r4, [r2, #8] + 1506 0032 8023 movs r3, #128 + 1507 0034 1B02 lsls r3, r3, #8 + 1508 0036 2343 orrs r3, r4 + 1509 0038 9360 str r3, [r2, #8] + 1510 .L91: +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1511 .loc 1 1331 5 view .LVU464 +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1512 .loc 1 1331 8 is_stmt 0 view .LVU465 + 1513 003a 4907 lsls r1, r1, #29 + 1514 003c 05D5 bpl .L92 + 1515 .LVL105: +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1516 .loc 1 1334 7 is_stmt 1 view .LVU466 + 1517 003e 0268 ldr r2, [r0] + 1518 0040 9168 ldr r1, [r2, #8] + 1519 0042 8023 movs r3, #128 + 1520 0044 1B04 lsls r3, r3, #16 + 1521 0046 0B43 orrs r3, r1 + 1522 0048 9360 str r3, [r2, #8] + 1523 .L92: + ARM GAS /tmp/ccZqSNsg.s page 56 + + +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1524 .loc 1 1338 5 view .LVU467 +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1525 .loc 1 1338 12 is_stmt 0 view .LVU468 + 1526 004a 0020 movs r0, #0 + 1527 .LVL106: +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1528 .loc 1 1338 12 view .LVU469 + 1529 004c E5E7 b .L93 + 1530 .cfi_endproc + 1531 .LFE51: + 1533 .section .text.HAL_CAN_GetTxMailboxesFreeLevel,"ax",%progbits + 1534 .align 1 + 1535 .global HAL_CAN_GetTxMailboxesFreeLevel + 1536 .syntax unified + 1537 .code 16 + 1538 .thumb_func + 1540 HAL_CAN_GetTxMailboxesFreeLevel: + 1541 .LVL107: + 1542 .LFB52: +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes. +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Number of free Tx Mailboxes. +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1543 .loc 1 1356 1 is_stmt 1 view -0 + 1544 .cfi_startproc + 1545 @ args = 0, pretend = 0, frame = 0 + 1546 @ frame_needed = 0, uses_anonymous_args = 0 + 1547 @ link register save eliminated. +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t freelevel = 0U; + 1548 .loc 1 1357 3 view .LVU471 +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1549 .loc 1 1358 3 view .LVU472 + 1550 .loc 1 1358 24 is_stmt 0 view .LVU473 + 1551 0000 2023 movs r3, #32 + 1552 0002 C35C ldrb r3, [r0, r3] + 1553 .LVL108: +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1554 .loc 1 1360 3 is_stmt 1 view .LVU474 + 1555 .loc 1 1360 38 is_stmt 0 view .LVU475 + 1556 0004 013B subs r3, r3, #1 + 1557 .LVL109: + 1558 .loc 1 1360 38 view .LVU476 + 1559 0006 DBB2 uxtb r3, r3 + 1560 .LVL110: + 1561 .loc 1 1360 6 view .LVU477 + 1562 0008 012B cmp r3, #1 + 1563 000a 01D9 bls .L106 +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1564 .loc 1 1357 12 view .LVU478 + 1565 000c 0020 movs r0, #0 + ARM GAS /tmp/ccZqSNsg.s page 57 + + + 1566 .LVL111: +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 0 status */ +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** freelevel++; +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 1 status */ +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** freelevel++; +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 2 status */ +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** freelevel++; +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return Tx Mailboxes free level */ +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return freelevel; + 1567 .loc 1 1383 3 is_stmt 1 view .LVU479 + 1568 .L98: +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1569 .loc 1 1384 1 is_stmt 0 view .LVU480 + 1570 @ sp needed + 1571 000e 7047 bx lr + 1572 .LVL112: + 1573 .L106: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1574 .loc 1 1364 5 is_stmt 1 view .LVU481 +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1575 .loc 1 1364 14 is_stmt 0 view .LVU482 + 1576 0010 0368 ldr r3, [r0] +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1577 .loc 1 1364 24 view .LVU483 + 1578 0012 9968 ldr r1, [r3, #8] +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1579 .loc 1 1364 30 view .LVU484 + 1580 0014 8022 movs r2, #128 + 1581 0016 D204 lsls r2, r2, #19 + 1582 0018 0800 movs r0, r1 + 1583 .LVL113: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1584 .loc 1 1364 30 view .LVU485 + 1585 001a 1040 ands r0, r2 +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1586 .loc 1 1364 8 view .LVU486 + 1587 001c 1142 tst r1, r2 + 1588 001e 00D0 beq .L100 +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1589 .loc 1 1366 16 view .LVU487 + 1590 0020 0120 movs r0, #1 + 1591 .L100: + ARM GAS /tmp/ccZqSNsg.s page 58 + + + 1592 .LVL114: +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1593 .loc 1 1370 5 is_stmt 1 view .LVU488 +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1594 .loc 1 1370 24 is_stmt 0 view .LVU489 + 1595 0022 9A68 ldr r2, [r3, #8] +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1596 .loc 1 1370 8 view .LVU490 + 1597 0024 1201 lsls r2, r2, #4 + 1598 0026 00D5 bpl .L101 +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1599 .loc 1 1372 7 is_stmt 1 view .LVU491 +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1600 .loc 1 1372 16 is_stmt 0 view .LVU492 + 1601 0028 0130 adds r0, r0, #1 + 1602 .LVL115: + 1603 .L101: +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1604 .loc 1 1376 5 is_stmt 1 view .LVU493 +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1605 .loc 1 1376 24 is_stmt 0 view .LVU494 + 1606 002a 9B68 ldr r3, [r3, #8] +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1607 .loc 1 1376 8 view .LVU495 + 1608 002c DB00 lsls r3, r3, #3 + 1609 002e EED5 bpl .L98 +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1610 .loc 1 1378 7 is_stmt 1 view .LVU496 +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1611 .loc 1 1378 16 is_stmt 0 view .LVU497 + 1612 0030 0130 adds r0, r0, #1 + 1613 .LVL116: +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1614 .loc 1 1378 16 view .LVU498 + 1615 0032 ECE7 b .L98 + 1616 .cfi_endproc + 1617 .LFE52: + 1619 .section .text.HAL_CAN_IsTxMessagePending,"ax",%progbits + 1620 .align 1 + 1621 .global HAL_CAN_IsTxMessagePending + 1622 .syntax unified + 1623 .code 16 + 1624 .thumb_func + 1626 HAL_CAN_IsTxMessagePending: + 1627 .LVL117: + 1628 .LFB53: +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Check if a transmission request is pending on the selected Tx +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * Mailboxes. +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param TxMailboxes List of Tx Mailboxes to check. +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes. +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Status +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * - 0 : No pending transmission request on any selected Tx Mailboxes. +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * - 1 : Pending transmission request on at least one of the selected + ARM GAS /tmp/ccZqSNsg.s page 59 + + +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * Tx Mailbox. +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1629 .loc 1 1399 1 is_stmt 1 view -0 + 1630 .cfi_startproc + 1631 @ args = 0, pretend = 0, frame = 0 + 1632 @ frame_needed = 0, uses_anonymous_args = 0 + 1633 @ link register save eliminated. +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t status = 0U; + 1634 .loc 1 1400 3 view .LVU500 +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1635 .loc 1 1401 3 view .LVU501 + 1636 .loc 1 1401 24 is_stmt 0 view .LVU502 + 1637 0000 2023 movs r3, #32 + 1638 0002 C35C ldrb r3, [r0, r3] + 1639 .LVL118: +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); + 1640 .loc 1 1404 3 is_stmt 1 view .LVU503 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1641 .loc 1 1406 3 view .LVU504 + 1642 .loc 1 1406 38 is_stmt 0 view .LVU505 + 1643 0004 013B subs r3, r3, #1 + 1644 .LVL119: + 1645 .loc 1 1406 38 view .LVU506 + 1646 0006 DBB2 uxtb r3, r3 + 1647 .LVL120: + 1648 .loc 1 1406 6 view .LVU507 + 1649 0008 012B cmp r3, #1 + 1650 000a 01D9 bls .L111 +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1651 .loc 1 1400 12 view .LVU508 + 1652 000c 0020 movs r0, #0 + 1653 .LVL121: + 1654 .L107: +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check pending transmission request on the selected Tx Mailboxes */ +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_P +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = 1U; +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return status */ +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1655 .loc 1 1418 1 view .LVU509 + 1656 @ sp needed + 1657 000e 7047 bx lr + 1658 .LVL122: + 1659 .L111: +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1660 .loc 1 1410 5 is_stmt 1 view .LVU510 + ARM GAS /tmp/ccZqSNsg.s page 60 + + +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1661 .loc 1 1410 14 is_stmt 0 view .LVU511 + 1662 0010 0368 ldr r3, [r0] +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1663 .loc 1 1410 24 view .LVU512 + 1664 0012 9B68 ldr r3, [r3, #8] +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1665 .loc 1 1410 45 view .LVU513 + 1666 0014 8906 lsls r1, r1, #26 + 1667 .LVL123: +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1668 .loc 1 1410 30 view .LVU514 + 1669 0016 0B40 ands r3, r1 +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1670 .loc 1 1410 8 view .LVU515 + 1671 0018 9942 cmp r1, r3 + 1672 001a 01D0 beq .L112 +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1673 .loc 1 1412 14 view .LVU516 + 1674 001c 0120 movs r0, #1 + 1675 .LVL124: +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1676 .loc 1 1417 3 is_stmt 1 view .LVU517 +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1677 .loc 1 1417 10 is_stmt 0 view .LVU518 + 1678 001e F6E7 b .L107 + 1679 .LVL125: + 1680 .L112: +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1681 .loc 1 1400 12 view .LVU519 + 1682 0020 0020 movs r0, #0 + 1683 .LVL126: +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1684 .loc 1 1400 12 view .LVU520 + 1685 0022 F4E7 b .L107 + 1686 .cfi_endproc + 1687 .LFE53: + 1689 .section .text.HAL_CAN_GetTxTimestamp,"ax",%progbits + 1690 .align 1 + 1691 .global HAL_CAN_GetTxTimestamp + 1692 .syntax unified + 1693 .code 16 + 1694 .thumb_func + 1696 HAL_CAN_GetTxTimestamp: + 1697 .LVL127: + 1698 .LFB54: +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return timestamp of Tx message sent, if time triggered communication +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** mode is enabled. +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param TxMailbox Tx Mailbox where the timestamp of message sent will be +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * read. +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be one value of @arg CAN_Tx_Mailboxes. +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Timestamp of message sent from Tx Mailbox. +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + ARM GAS /tmp/ccZqSNsg.s page 61 + + +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox) +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1699 .loc 1 1431 1 is_stmt 1 view -0 + 1700 .cfi_startproc + 1701 @ args = 0, pretend = 0, frame = 0 + 1702 @ frame_needed = 0, uses_anonymous_args = 0 + 1703 @ link register save eliminated. +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t timestamp = 0U; + 1704 .loc 1 1432 3 view .LVU522 +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t transmitmailbox; + 1705 .loc 1 1433 3 view .LVU523 +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1706 .loc 1 1434 3 view .LVU524 + 1707 .loc 1 1434 24 is_stmt 0 view .LVU525 + 1708 0000 2023 movs r3, #32 + 1709 0002 C35C ldrb r3, [r0, r3] + 1710 .LVL128: +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX(TxMailbox)); + 1711 .loc 1 1437 3 is_stmt 1 view .LVU526 +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1712 .loc 1 1439 3 view .LVU527 + 1713 .loc 1 1439 38 is_stmt 0 view .LVU528 + 1714 0004 013B subs r3, r3, #1 + 1715 .LVL129: + 1716 .loc 1 1439 38 view .LVU529 + 1717 0006 DBB2 uxtb r3, r3 + 1718 .LVL130: + 1719 .loc 1 1439 6 view .LVU530 + 1720 0008 012B cmp r3, #1 + 1721 000a 01D9 bls .L119 +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t transmitmailbox; + 1722 .loc 1 1432 12 view .LVU531 + 1723 000c 0020 movs r0, #0 + 1724 .LVL131: +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Select the Tx mailbox */ +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Select the Tx mailbox */ +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (TxMailbox == CAN_TX_MAILBOX0) +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmitmailbox = 0U; +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if (TxMailbox == CAN_TX_MAILBOX1) +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmitmailbox = 1U; +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* (TxMailbox == CAN_TX_MAILBOX2) */ +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmitmailbox = 2U; +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get timestamp */ +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TI +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccZqSNsg.s page 62 + + +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return the timestamp */ +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return timestamp; + 1725 .loc 1 1462 3 is_stmt 1 view .LVU532 + 1726 .L113: +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1727 .loc 1 1463 1 is_stmt 0 view .LVU533 + 1728 @ sp needed + 1729 000e 7047 bx lr + 1730 .LVL132: + 1731 .L119: +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1732 .loc 1 1444 5 is_stmt 1 view .LVU534 +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1733 .loc 1 1444 8 is_stmt 0 view .LVU535 + 1734 0010 0129 cmp r1, #1 + 1735 0012 0BD0 beq .L117 +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1736 .loc 1 1448 10 is_stmt 1 view .LVU536 +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1737 .loc 1 1448 13 is_stmt 0 view .LVU537 + 1738 0014 0229 cmp r1, #2 + 1739 0016 07D0 beq .L120 +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1740 .loc 1 1454 23 view .LVU538 + 1741 0018 0223 movs r3, #2 + 1742 .L115: + 1743 .LVL133: +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1744 .loc 1 1458 5 is_stmt 1 view .LVU539 +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1745 .loc 1 1458 22 is_stmt 0 view .LVU540 + 1746 001a 0268 ldr r2, [r0] +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1747 .loc 1 1458 61 view .LVU541 + 1748 001c 1833 adds r3, r3, #24 + 1749 .LVL134: +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1750 .loc 1 1458 61 view .LVU542 + 1751 001e 1B01 lsls r3, r3, #4 + 1752 .LVL135: +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1753 .loc 1 1458 61 view .LVU543 + 1754 0020 D318 adds r3, r2, r3 + 1755 0022 5868 ldr r0, [r3, #4] + 1756 .LVL136: +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1757 .loc 1 1458 85 view .LVU544 + 1758 0024 000C lsrs r0, r0, #16 + 1759 .LVL137: +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1760 .loc 1 1458 85 view .LVU545 + 1761 0026 F2E7 b .L113 + 1762 .LVL138: + 1763 .L120: +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1764 .loc 1 1450 23 view .LVU546 + ARM GAS /tmp/ccZqSNsg.s page 63 + + + 1765 0028 0123 movs r3, #1 + 1766 002a F6E7 b .L115 + 1767 .L117: +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1768 .loc 1 1446 23 view .LVU547 + 1769 002c 0023 movs r3, #0 + 1770 002e F4E7 b .L115 + 1771 .cfi_endproc + 1772 .LFE54: + 1774 .section .text.HAL_CAN_GetRxMessage,"ax",%progbits + 1775 .align 1 + 1776 .global HAL_CAN_GetRxMessage + 1777 .syntax unified + 1778 .code 16 + 1779 .thumb_func + 1781 HAL_CAN_GetRxMessage: + 1782 .LVL139: + 1783 .LFB55: +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Get an CAN frame from the Rx FIFO zone into the message RAM. +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param RxFifo Fifo number of the received message to be read. +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number. +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * of the Rx frame will be stored. +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param aData array where the payload of the Rx frame will be stored. +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1784 .loc 1 1478 1 is_stmt 1 view -0 + 1785 .cfi_startproc + 1786 @ args = 0, pretend = 0, frame = 0 + 1787 @ frame_needed = 0, uses_anonymous_args = 0 + 1788 .loc 1 1478 1 is_stmt 0 view .LVU549 + 1789 0000 70B5 push {r4, r5, r6, lr} + 1790 .cfi_def_cfa_offset 16 + 1791 .cfi_offset 4, -16 + 1792 .cfi_offset 5, -12 + 1793 .cfi_offset 6, -8 + 1794 .cfi_offset 14, -4 +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1795 .loc 1 1479 3 is_stmt 1 view .LVU550 + 1796 .loc 1 1479 24 is_stmt 0 view .LVU551 + 1797 0002 2024 movs r4, #32 + 1798 0004 045D ldrb r4, [r0, r4] + 1799 .LVL140: +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo)); + 1800 .loc 1 1481 3 is_stmt 1 view .LVU552 +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1801 .loc 1 1483 3 view .LVU553 + 1802 .loc 1 1483 38 is_stmt 0 view .LVU554 + ARM GAS /tmp/ccZqSNsg.s page 64 + + + 1803 0006 013C subs r4, r4, #1 + 1804 .LVL141: + 1805 .loc 1 1483 38 view .LVU555 + 1806 0008 E4B2 uxtb r4, r4 + 1807 .LVL142: + 1808 .loc 1 1483 6 view .LVU556 + 1809 000a 012C cmp r4, #1 + 1810 000c 00D9 bls .LCB1585 + 1811 000e 9CE0 b .L122 @long jump + 1812 .LCB1585: +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the Rx FIFO */ +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ + 1813 .loc 1 1487 5 is_stmt 1 view .LVU557 + 1814 .loc 1 1487 8 is_stmt 0 view .LVU558 + 1815 0010 0029 cmp r1, #0 + 1816 0012 0AD1 bne .L123 +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check that the Rx FIFO 0 is not empty */ +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) + 1817 .loc 1 1490 7 is_stmt 1 view .LVU559 + 1818 .loc 1 1490 16 is_stmt 0 view .LVU560 + 1819 0014 0468 ldr r4, [r0] + 1820 .loc 1 1490 26 view .LVU561 + 1821 0016 E468 ldr r4, [r4, #12] + 1822 .loc 1 1490 10 view .LVU562 + 1823 0018 A407 lsls r4, r4, #30 + 1824 001a 11D1 bne .L124 +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1825 .loc 1 1493 9 is_stmt 1 view .LVU563 + 1826 .loc 1 1493 13 is_stmt 0 view .LVU564 + 1827 001c 426A ldr r2, [r0, #36] + 1828 .LVL143: + 1829 .loc 1 1493 25 view .LVU565 + 1830 001e 8023 movs r3, #128 + 1831 .LVL144: + 1832 .loc 1 1493 25 view .LVU566 + 1833 0020 9B03 lsls r3, r3, #14 + 1834 0022 1343 orrs r3, r2 + 1835 0024 4362 str r3, [r0, #36] +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1836 .loc 1 1495 9 is_stmt 1 view .LVU567 + 1837 .loc 1 1495 16 is_stmt 0 view .LVU568 + 1838 0026 0120 movs r0, #1 + 1839 .LVL145: + 1840 .loc 1 1495 16 view .LVU569 + 1841 0028 95E0 b .L125 + 1842 .LVL146: + 1843 .L123: +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */ +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccZqSNsg.s page 65 + + +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check that the Rx FIFO 1 is not empty */ +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) + 1844 .loc 1 1501 7 is_stmt 1 view .LVU570 + 1845 .loc 1 1501 16 is_stmt 0 view .LVU571 + 1846 002a 0468 ldr r4, [r0] + 1847 .loc 1 1501 26 view .LVU572 + 1848 002c 2469 ldr r4, [r4, #16] + 1849 .loc 1 1501 10 view .LVU573 + 1850 002e A407 lsls r4, r4, #30 + 1851 0030 06D1 bne .L124 +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1852 .loc 1 1504 9 is_stmt 1 view .LVU574 + 1853 .loc 1 1504 13 is_stmt 0 view .LVU575 + 1854 0032 426A ldr r2, [r0, #36] + 1855 .LVL147: + 1856 .loc 1 1504 25 view .LVU576 + 1857 0034 8023 movs r3, #128 + 1858 .LVL148: + 1859 .loc 1 1504 25 view .LVU577 + 1860 0036 9B03 lsls r3, r3, #14 + 1861 0038 1343 orrs r3, r2 + 1862 003a 4362 str r3, [r0, #36] +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1863 .loc 1 1506 9 is_stmt 1 view .LVU578 + 1864 .loc 1 1506 16 is_stmt 0 view .LVU579 + 1865 003c 0120 movs r0, #1 + 1866 .LVL149: + 1867 .loc 1 1506 16 view .LVU580 + 1868 003e 8AE0 b .L125 + 1869 .LVL150: + 1870 .L124: +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get the header */ +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; + 1871 .loc 1 1511 5 is_stmt 1 view .LVU581 + 1872 .loc 1 1511 39 is_stmt 0 view .LVU582 + 1873 0040 0568 ldr r5, [r0] + 1874 .loc 1 1511 71 view .LVU583 + 1875 0042 0C00 movs r4, r1 + 1876 0044 1B34 adds r4, r4, #27 + 1877 0046 2401 lsls r4, r4, #4 + 1878 0048 6559 ldr r5, [r4, r5] + 1879 .loc 1 1511 33 view .LVU584 + 1880 004a 0424 movs r4, #4 + 1881 004c 2C40 ands r4, r5 + 1882 .loc 1 1511 18 view .LVU585 + 1883 004e 9460 str r4, [r2, #8] +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1884 .loc 1 1512 5 is_stmt 1 view .LVU586 + 1885 .loc 1 1512 8 is_stmt 0 view .LVU587 + 1886 0050 64D1 bne .L126 +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccZqSNsg.s page 66 + + +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_ + 1887 .loc 1 1514 7 is_stmt 1 view .LVU588 + 1888 .loc 1 1514 45 is_stmt 0 view .LVU589 + 1889 0052 0568 ldr r5, [r0] + 1890 .loc 1 1514 77 view .LVU590 + 1891 0054 0C00 movs r4, r1 + 1892 0056 1B34 adds r4, r4, #27 + 1893 0058 2401 lsls r4, r4, #4 + 1894 005a 6459 ldr r4, [r4, r5] + 1895 .loc 1 1514 83 view .LVU591 + 1896 005c 640D lsrs r4, r4, #21 + 1897 .loc 1 1514 22 view .LVU592 + 1898 005e 1460 str r4, [r2] + 1899 .L127: +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); + 1900 .loc 1 1521 5 is_stmt 1 view .LVU593 + 1901 .loc 1 1521 40 is_stmt 0 view .LVU594 + 1902 0060 0568 ldr r5, [r0] + 1903 .loc 1 1521 72 view .LVU595 + 1904 0062 0C00 movs r4, r1 + 1905 0064 1B34 adds r4, r4, #27 + 1906 0066 2401 lsls r4, r4, #4 + 1907 0068 6659 ldr r6, [r4, r5] + 1908 .loc 1 1521 34 view .LVU596 + 1909 006a 0225 movs r5, #2 + 1910 006c 3540 ands r5, r6 + 1911 .loc 1 1521 18 view .LVU597 + 1912 006e D560 str r5, [r2, #12] +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) + 1913 .loc 1 1522 5 is_stmt 1 view .LVU598 + 1914 .loc 1 1522 31 is_stmt 0 view .LVU599 + 1915 0070 0568 ldr r5, [r0] + 1916 .loc 1 1522 63 view .LVU600 + 1917 0072 2C19 adds r4, r5, r4 + 1918 0074 6468 ldr r4, [r4, #4] + 1919 .loc 1 1522 8 view .LVU601 + 1920 0076 2407 lsls r4, r4, #28 + 1921 0078 58D5 bpl .L128 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Truncate DLC to 8 if received field is over range */ +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->DLC = 8U; + 1922 .loc 1 1525 7 is_stmt 1 view .LVU602 + 1923 .loc 1 1525 20 is_stmt 0 view .LVU603 + 1924 007a 0824 movs r4, #8 + 1925 007c 1461 str r4, [r2, #16] + 1926 .L129: +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_P +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccZqSNsg.s page 67 + + +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_ + 1927 .loc 1 1531 5 is_stmt 1 view .LVU604 + 1928 .loc 1 1531 54 is_stmt 0 view .LVU605 + 1929 007e 0568 ldr r5, [r0] + 1930 .loc 1 1531 86 view .LVU606 + 1931 0080 0C00 movs r4, r1 + 1932 0082 1B34 adds r4, r4, #27 + 1933 0084 2401 lsls r4, r4, #4 + 1934 0086 2D19 adds r5, r5, r4 + 1935 0088 6E68 ldr r6, [r5, #4] + 1936 .loc 1 1531 93 view .LVU607 + 1937 008a 360A lsrs r6, r6, #8 + 1938 008c FF25 movs r5, #255 + 1939 008e 3540 ands r5, r6 + 1940 .loc 1 1531 31 view .LVU608 + 1941 0090 9561 str r5, [r2, #24] +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_ + 1942 .loc 1 1532 5 is_stmt 1 view .LVU609 + 1943 .loc 1 1532 48 is_stmt 0 view .LVU610 + 1944 0092 0568 ldr r5, [r0] + 1945 .loc 1 1532 80 view .LVU611 + 1946 0094 2C19 adds r4, r5, r4 + 1947 0096 6468 ldr r4, [r4, #4] + 1948 .loc 1 1532 87 view .LVU612 + 1949 0098 240C lsrs r4, r4, #16 + 1950 .loc 1 1532 24 view .LVU613 + 1951 009a 5461 str r4, [r2, #20] +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get the data */ +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1952 .loc 1 1535 5 is_stmt 1 view .LVU614 + 1953 .loc 1 1535 49 is_stmt 0 view .LVU615 + 1954 009c 0468 ldr r4, [r0] + 1955 .loc 1 1535 81 view .LVU616 + 1956 009e 0A01 lsls r2, r1, #4 + 1957 .LVL151: + 1958 .loc 1 1535 81 view .LVU617 + 1959 00a0 A418 adds r4, r4, r2 + 1960 00a2 B934 adds r4, r4, #185 + 1961 00a4 FF34 adds r4, r4, #255 + 1962 00a6 2468 ldr r4, [r4] + 1963 .loc 1 1535 14 view .LVU618 + 1964 00a8 1C70 strb r4, [r3] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1965 .loc 1 1536 5 is_stmt 1 view .LVU619 + 1966 .loc 1 1536 49 is_stmt 0 view .LVU620 + 1967 00aa 0468 ldr r4, [r0] + 1968 .loc 1 1536 81 view .LVU621 + 1969 00ac A418 adds r4, r4, r2 + 1970 00ae B934 adds r4, r4, #185 + 1971 00b0 FF34 adds r4, r4, #255 + 1972 00b2 2468 ldr r4, [r4] + 1973 .loc 1 1536 88 view .LVU622 + 1974 00b4 240A lsrs r4, r4, #8 + 1975 .loc 1 1536 14 view .LVU623 + 1976 00b6 5C70 strb r4, [r3, #1] +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + ARM GAS /tmp/ccZqSNsg.s page 68 + + + 1977 .loc 1 1537 5 is_stmt 1 view .LVU624 + 1978 .loc 1 1537 49 is_stmt 0 view .LVU625 + 1979 00b8 0468 ldr r4, [r0] + 1980 .loc 1 1537 81 view .LVU626 + 1981 00ba A418 adds r4, r4, r2 + 1982 00bc B934 adds r4, r4, #185 + 1983 00be FF34 adds r4, r4, #255 + 1984 00c0 2468 ldr r4, [r4] + 1985 .loc 1 1537 88 view .LVU627 + 1986 00c2 240C lsrs r4, r4, #16 + 1987 .loc 1 1537 14 view .LVU628 + 1988 00c4 9C70 strb r4, [r3, #2] +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1989 .loc 1 1538 5 is_stmt 1 view .LVU629 + 1990 .loc 1 1538 49 is_stmt 0 view .LVU630 + 1991 00c6 0468 ldr r4, [r0] + 1992 .loc 1 1538 81 view .LVU631 + 1993 00c8 A418 adds r4, r4, r2 + 1994 00ca B934 adds r4, r4, #185 + 1995 00cc FF34 adds r4, r4, #255 + 1996 00ce 2468 ldr r4, [r4] + 1997 .loc 1 1538 16 view .LVU632 + 1998 00d0 240E lsrs r4, r4, #24 + 1999 .loc 1 1538 14 view .LVU633 + 2000 00d2 DC70 strb r4, [r3, #3] +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 2001 .loc 1 1539 5 is_stmt 1 view .LVU634 + 2002 .loc 1 1539 49 is_stmt 0 view .LVU635 + 2003 00d4 0468 ldr r4, [r0] + 2004 .loc 1 1539 81 view .LVU636 + 2005 00d6 A418 adds r4, r4, r2 + 2006 00d8 BD34 adds r4, r4, #189 + 2007 00da FF34 adds r4, r4, #255 + 2008 00dc 2468 ldr r4, [r4] + 2009 .loc 1 1539 14 view .LVU637 + 2010 00de 1C71 strb r4, [r3, #4] +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 2011 .loc 1 1540 5 is_stmt 1 view .LVU638 + 2012 .loc 1 1540 49 is_stmt 0 view .LVU639 + 2013 00e0 0468 ldr r4, [r0] + 2014 .loc 1 1540 81 view .LVU640 + 2015 00e2 A418 adds r4, r4, r2 + 2016 00e4 BD34 adds r4, r4, #189 + 2017 00e6 FF34 adds r4, r4, #255 + 2018 00e8 2468 ldr r4, [r4] + 2019 .loc 1 1540 88 view .LVU641 + 2020 00ea 240A lsrs r4, r4, #8 + 2021 .loc 1 1540 14 view .LVU642 + 2022 00ec 5C71 strb r4, [r3, #5] +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 2023 .loc 1 1541 5 is_stmt 1 view .LVU643 + 2024 .loc 1 1541 49 is_stmt 0 view .LVU644 + 2025 00ee 0468 ldr r4, [r0] + 2026 .loc 1 1541 81 view .LVU645 + 2027 00f0 A418 adds r4, r4, r2 + 2028 00f2 BD34 adds r4, r4, #189 + 2029 00f4 FF34 adds r4, r4, #255 + ARM GAS /tmp/ccZqSNsg.s page 69 + + + 2030 00f6 2468 ldr r4, [r4] + 2031 .loc 1 1541 88 view .LVU646 + 2032 00f8 240C lsrs r4, r4, #16 + 2033 .loc 1 1541 14 view .LVU647 + 2034 00fa 9C71 strb r4, [r3, #6] +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 2035 .loc 1 1542 5 is_stmt 1 view .LVU648 + 2036 .loc 1 1542 49 is_stmt 0 view .LVU649 + 2037 00fc 0468 ldr r4, [r0] + 2038 .loc 1 1542 81 view .LVU650 + 2039 00fe A218 adds r2, r4, r2 + 2040 0100 BD32 adds r2, r2, #189 + 2041 0102 FF32 adds r2, r2, #255 + 2042 0104 1268 ldr r2, [r2] + 2043 .loc 1 1542 16 view .LVU651 + 2044 0106 120E lsrs r2, r2, #24 + 2045 .loc 1 1542 14 view .LVU652 + 2046 0108 DA71 strb r2, [r3, #7] +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Release the FIFO */ +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ + 2047 .loc 1 1545 5 is_stmt 1 view .LVU653 + 2048 .loc 1 1545 8 is_stmt 0 view .LVU654 + 2049 010a 0029 cmp r1, #0 + 2050 010c 17D1 bne .L130 +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Release RX FIFO 0 */ +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); + 2051 .loc 1 1548 7 is_stmt 1 view .LVU655 + 2052 010e 0268 ldr r2, [r0] + 2053 0110 D368 ldr r3, [r2, #12] + 2054 .LVL152: + 2055 .loc 1 1548 7 is_stmt 0 view .LVU656 + 2056 0112 2031 adds r1, r1, #32 + 2057 .LVL153: + 2058 .loc 1 1548 7 view .LVU657 + 2059 0114 0B43 orrs r3, r1 + 2060 0116 D360 str r3, [r2, #12] + 2061 .LVL154: + 2062 .L131: +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */ +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Release RX FIFO 1 */ +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 2063 .loc 1 1557 5 is_stmt 1 view .LVU658 + 2064 .loc 1 1557 12 is_stmt 0 view .LVU659 + 2065 0118 0020 movs r0, #0 + 2066 .LVL155: + 2067 .loc 1 1557 12 view .LVU660 + 2068 011a 1CE0 b .L125 + 2069 .LVL156: + 2070 .L126: + ARM GAS /tmp/ccZqSNsg.s page 70 + + +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; + 2071 .loc 1 1518 7 is_stmt 1 view .LVU661 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2072 .loc 1 1519 29 is_stmt 0 view .LVU662 + 2073 011c 0568 ldr r5, [r0] +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2074 .loc 1 1519 61 view .LVU663 + 2075 011e 0C00 movs r4, r1 + 2076 0120 1B34 adds r4, r4, #27 + 2077 0122 2401 lsls r4, r4, #4 + 2078 0124 6459 ldr r4, [r4, r5] +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2079 .loc 1 1519 67 view .LVU664 + 2080 0126 E408 lsrs r4, r4, #3 +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; + 2081 .loc 1 1518 22 view .LVU665 + 2082 0128 5460 str r4, [r2, #4] + 2083 012a 99E7 b .L127 + 2084 .L128: +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2085 .loc 1 1529 7 is_stmt 1 view .LVU666 +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2086 .loc 1 1529 75 is_stmt 0 view .LVU667 + 2087 012c 0C00 movs r4, r1 + 2088 012e 1B34 adds r4, r4, #27 + 2089 0130 2401 lsls r4, r4, #4 + 2090 0132 2D19 adds r5, r5, r4 + 2091 0134 6D68 ldr r5, [r5, #4] +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2092 .loc 1 1529 82 view .LVU668 + 2093 0136 0F24 movs r4, #15 + 2094 0138 2C40 ands r4, r5 +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2095 .loc 1 1529 20 view .LVU669 + 2096 013a 1461 str r4, [r2, #16] + 2097 013c 9FE7 b .L129 + 2098 .LVL157: + 2099 .L130: +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2100 .loc 1 1553 7 is_stmt 1 view .LVU670 + 2101 013e 0268 ldr r2, [r0] + 2102 0140 1369 ldr r3, [r2, #16] + 2103 .LVL158: +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2104 .loc 1 1553 7 is_stmt 0 view .LVU671 + 2105 0142 2021 movs r1, #32 + 2106 .LVL159: +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2107 .loc 1 1553 7 view .LVU672 + 2108 0144 0B43 orrs r3, r1 + 2109 0146 1361 str r3, [r2, #16] + 2110 0148 E6E7 b .L131 + 2111 .LVL160: + 2112 .L122: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccZqSNsg.s page 71 + + +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 2113 .loc 1 1562 5 is_stmt 1 view .LVU673 + 2114 .loc 1 1562 9 is_stmt 0 view .LVU674 + 2115 014a 426A ldr r2, [r0, #36] + 2116 .LVL161: + 2117 .loc 1 1562 21 view .LVU675 + 2118 014c 8023 movs r3, #128 + 2119 .LVL162: + 2120 .loc 1 1562 21 view .LVU676 + 2121 014e DB02 lsls r3, r3, #11 + 2122 0150 1343 orrs r3, r2 + 2123 0152 4362 str r3, [r0, #36] +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 2124 .loc 1 1564 5 is_stmt 1 view .LVU677 + 2125 .loc 1 1564 12 is_stmt 0 view .LVU678 + 2126 0154 0120 movs r0, #1 + 2127 .LVL163: + 2128 .L125: +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2129 .loc 1 1566 1 view .LVU679 + 2130 @ sp needed + 2131 0156 70BD pop {r4, r5, r6, pc} + 2132 .cfi_endproc + 2133 .LFE55: + 2135 .section .text.HAL_CAN_GetRxFifoFillLevel,"ax",%progbits + 2136 .align 1 + 2137 .global HAL_CAN_GetRxFifoFillLevel + 2138 .syntax unified + 2139 .code 16 + 2140 .thumb_func + 2142 HAL_CAN_GetRxFifoFillLevel: + 2143 .LVL164: + 2144 .LFB56: +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return Rx FIFO fill level. +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param RxFifo Rx FIFO. +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number. +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Number of messages available in Rx FIFO. +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo) +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2145 .loc 1 1577 1 is_stmt 1 view -0 + 2146 .cfi_startproc + 2147 @ args = 0, pretend = 0, frame = 0 + 2148 @ frame_needed = 0, uses_anonymous_args = 0 + 2149 @ link register save eliminated. +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t filllevel = 0U; + 2150 .loc 1 1578 3 view .LVU681 +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2151 .loc 1 1579 3 view .LVU682 + 2152 .loc 1 1579 24 is_stmt 0 view .LVU683 + ARM GAS /tmp/ccZqSNsg.s page 72 + + + 2153 0000 2023 movs r3, #32 + 2154 0002 C35C ldrb r3, [r0, r3] + 2155 .LVL165: +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo)); + 2156 .loc 1 1582 3 is_stmt 1 view .LVU684 +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2157 .loc 1 1584 3 view .LVU685 + 2158 .loc 1 1584 38 is_stmt 0 view .LVU686 + 2159 0004 013B subs r3, r3, #1 + 2160 .LVL166: + 2161 .loc 1 1584 38 view .LVU687 + 2162 0006 DBB2 uxtb r3, r3 + 2163 .LVL167: + 2164 .loc 1 1584 6 view .LVU688 + 2165 0008 012B cmp r3, #1 + 2166 000a 01D9 bls .L138 +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2167 .loc 1 1578 12 view .LVU689 + 2168 000c 0020 movs r0, #0 + 2169 .LVL168: +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0; +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* RxFifo == CAN_RX_FIFO1 */ +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1; +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return Rx FIFO fill level */ +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return filllevel; + 2170 .loc 1 1598 3 is_stmt 1 view .LVU690 + 2171 .L134: +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2172 .loc 1 1599 1 is_stmt 0 view .LVU691 + 2173 @ sp needed + 2174 000e 7047 bx lr + 2175 .LVL169: + 2176 .L138: +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2177 .loc 1 1587 5 is_stmt 1 view .LVU692 +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2178 .loc 1 1587 8 is_stmt 0 view .LVU693 + 2179 0010 0029 cmp r1, #0 + 2180 0012 04D1 bne .L136 +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2181 .loc 1 1589 7 is_stmt 1 view .LVU694 +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2182 .loc 1 1589 23 is_stmt 0 view .LVU695 + 2183 0014 0368 ldr r3, [r0] +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccZqSNsg.s page 73 + + + 2184 .loc 1 1589 33 view .LVU696 + 2185 0016 DB68 ldr r3, [r3, #12] +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2186 .loc 1 1589 17 view .LVU697 + 2187 0018 0320 movs r0, #3 + 2188 .LVL170: +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2189 .loc 1 1589 17 view .LVU698 + 2190 001a 1840 ands r0, r3 + 2191 .LVL171: +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2192 .loc 1 1589 17 view .LVU699 + 2193 001c F7E7 b .L134 + 2194 .LVL172: + 2195 .L136: +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2196 .loc 1 1593 7 is_stmt 1 view .LVU700 +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2197 .loc 1 1593 23 is_stmt 0 view .LVU701 + 2198 001e 0368 ldr r3, [r0] +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2199 .loc 1 1593 33 view .LVU702 + 2200 0020 1B69 ldr r3, [r3, #16] +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2201 .loc 1 1593 17 view .LVU703 + 2202 0022 0320 movs r0, #3 + 2203 .LVL173: +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2204 .loc 1 1593 17 view .LVU704 + 2205 0024 1840 ands r0, r3 + 2206 .LVL174: +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2207 .loc 1 1593 17 view .LVU705 + 2208 0026 F2E7 b .L134 + 2209 .cfi_endproc + 2210 .LFE56: + 2212 .section .text.HAL_CAN_ActivateNotification,"ax",%progbits + 2213 .align 1 + 2214 .global HAL_CAN_ActivateNotification + 2215 .syntax unified + 2216 .code 16 + 2217 .thumb_func + 2219 HAL_CAN_ActivateNotification: + 2220 .LVL175: + 2221 .LFB57: +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group4 Interrupts management +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Interrupts management +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Interrupts management ##### +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + ARM GAS /tmp/ccZqSNsg.s page 74 + + +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] This section provides functions allowing to: +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_ActivateNotification : Enable interrupts +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_DeactivateNotification : Disable interrupts +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_IRQHandler : Handles CAN interrupt request +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Enable interrupts. +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param ActiveITs indicates which interrupts will be enabled. +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts. +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2222 .loc 1 1630 1 is_stmt 1 view -0 + 2223 .cfi_startproc + 2224 @ args = 0, pretend = 0, frame = 0 + 2225 @ frame_needed = 0, uses_anonymous_args = 0 + 2226 @ link register save eliminated. +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2227 .loc 1 1631 3 view .LVU707 + 2228 .loc 1 1631 24 is_stmt 0 view .LVU708 + 2229 0000 2023 movs r3, #32 + 2230 0002 C35C ldrb r3, [r0, r3] + 2231 .LVL176: +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_IT(ActiveITs)); + 2232 .loc 1 1634 3 is_stmt 1 view .LVU709 +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2233 .loc 1 1636 3 view .LVU710 + 2234 .loc 1 1636 38 is_stmt 0 view .LVU711 + 2235 0004 013B subs r3, r3, #1 + 2236 .LVL177: + 2237 .loc 1 1636 38 view .LVU712 + 2238 0006 DBB2 uxtb r3, r3 + 2239 .LVL178: + 2240 .loc 1 1636 6 view .LVU713 + 2241 0008 012B cmp r3, #1 + 2242 000a 06D9 bls .L142 +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Enable the selected interrupts */ +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_ENABLE_IT(hcan, ActiveITs); +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ + ARM GAS /tmp/ccZqSNsg.s page 75 + + +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 2243 .loc 1 1648 5 is_stmt 1 view .LVU714 + 2244 .loc 1 1648 9 is_stmt 0 view .LVU715 + 2245 000c 426A ldr r2, [r0, #36] + 2246 .loc 1 1648 21 view .LVU716 + 2247 000e 8023 movs r3, #128 + 2248 0010 DB02 lsls r3, r3, #11 + 2249 0012 1343 orrs r3, r2 + 2250 0014 4362 str r3, [r0, #36] +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 2251 .loc 1 1650 5 is_stmt 1 view .LVU717 + 2252 .loc 1 1650 12 is_stmt 0 view .LVU718 + 2253 0016 0120 movs r0, #1 + 2254 .LVL179: + 2255 .L141: +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2256 .loc 1 1652 1 view .LVU719 + 2257 @ sp needed + 2258 0018 7047 bx lr + 2259 .LVL180: + 2260 .L142: +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2261 .loc 1 1640 5 is_stmt 1 view .LVU720 + 2262 001a 0268 ldr r2, [r0] + 2263 001c 5369 ldr r3, [r2, #20] + 2264 001e 0B43 orrs r3, r1 + 2265 0020 5361 str r3, [r2, #20] +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2266 .loc 1 1643 5 view .LVU721 +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2267 .loc 1 1643 12 is_stmt 0 view .LVU722 + 2268 0022 0020 movs r0, #0 + 2269 .LVL181: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2270 .loc 1 1643 12 view .LVU723 + 2271 0024 F8E7 b .L141 + 2272 .cfi_endproc + 2273 .LFE57: + 2275 .section .text.HAL_CAN_DeactivateNotification,"ax",%progbits + 2276 .align 1 + 2277 .global HAL_CAN_DeactivateNotification + 2278 .syntax unified + 2279 .code 16 + 2280 .thumb_func + 2282 HAL_CAN_DeactivateNotification: + 2283 .LVL182: + 2284 .LFB58: +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Disable interrupts. +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param InactiveITs indicates which interrupts will be disabled. +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts. +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + ARM GAS /tmp/ccZqSNsg.s page 76 + + +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs) +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2285 .loc 1 1663 1 is_stmt 1 view -0 + 2286 .cfi_startproc + 2287 @ args = 0, pretend = 0, frame = 0 + 2288 @ frame_needed = 0, uses_anonymous_args = 0 + 2289 @ link register save eliminated. +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2290 .loc 1 1664 3 view .LVU725 + 2291 .loc 1 1664 24 is_stmt 0 view .LVU726 + 2292 0000 2023 movs r3, #32 + 2293 0002 C35C ldrb r3, [r0, r3] + 2294 .LVL183: +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_IT(InactiveITs)); + 2295 .loc 1 1667 3 is_stmt 1 view .LVU727 +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2296 .loc 1 1669 3 view .LVU728 + 2297 .loc 1 1669 38 is_stmt 0 view .LVU729 + 2298 0004 013B subs r3, r3, #1 + 2299 .LVL184: + 2300 .loc 1 1669 38 view .LVU730 + 2301 0006 DBB2 uxtb r3, r3 + 2302 .LVL185: + 2303 .loc 1 1669 6 view .LVU731 + 2304 0008 012B cmp r3, #1 + 2305 000a 06D9 bls .L146 +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Disable the selected interrupts */ +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_DISABLE_IT(hcan, InactiveITs); +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 2306 .loc 1 1681 5 is_stmt 1 view .LVU732 + 2307 .loc 1 1681 9 is_stmt 0 view .LVU733 + 2308 000c 426A ldr r2, [r0, #36] + 2309 .loc 1 1681 21 view .LVU734 + 2310 000e 8023 movs r3, #128 + 2311 0010 DB02 lsls r3, r3, #11 + 2312 0012 1343 orrs r3, r2 + 2313 0014 4362 str r3, [r0, #36] +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 2314 .loc 1 1683 5 is_stmt 1 view .LVU735 + 2315 .loc 1 1683 12 is_stmt 0 view .LVU736 + 2316 0016 0120 movs r0, #1 + 2317 .LVL186: + 2318 .L145: + ARM GAS /tmp/ccZqSNsg.s page 77 + + +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2319 .loc 1 1685 1 view .LVU737 + 2320 @ sp needed + 2321 0018 7047 bx lr + 2322 .LVL187: + 2323 .L146: +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2324 .loc 1 1673 5 is_stmt 1 view .LVU738 + 2325 001a 0268 ldr r2, [r0] + 2326 001c 5369 ldr r3, [r2, #20] + 2327 001e 8B43 bics r3, r1 + 2328 0020 5361 str r3, [r2, #20] +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2329 .loc 1 1676 5 view .LVU739 +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2330 .loc 1 1676 12 is_stmt 0 view .LVU740 + 2331 0022 0020 movs r0, #0 + 2332 .LVL188: +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2333 .loc 1 1676 12 view .LVU741 + 2334 0024 F8E7 b .L145 + 2335 .cfi_endproc + 2336 .LFE58: + 2338 .section .text.HAL_CAN_TxMailbox0CompleteCallback,"ax",%progbits + 2339 .align 1 + 2340 .weak HAL_CAN_TxMailbox0CompleteCallback + 2341 .syntax unified + 2342 .code 16 + 2343 .thumb_func + 2345 HAL_CAN_TxMailbox0CompleteCallback: + 2346 .LVL189: + 2347 .LFB60: +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Handles CAN interrupt request +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmit Mailbox empty interrupt management *****************************/ +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmit Mailbox 0 management *****************************************/ +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP0) != 0U) +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ + ARM GAS /tmp/ccZqSNsg.s page 78 + + +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK0) != 0U) +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 0 complete callback */ +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0CompleteCallback(hcan); +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox0CompleteCallback(hcan); +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST0) != 0U) +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST0; +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR0) != 0U) +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR0; +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 0 abort callback */ +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0AbortCallback(hcan); +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox0AbortCallback(hcan); +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmit Mailbox 1 management *****************************************/ +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP1) != 0U) +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK1) != 0U) +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 1 complete callback */ +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1CompleteCallback(hcan); +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox1CompleteCallback(hcan); +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + ARM GAS /tmp/ccZqSNsg.s page 79 + + +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST1) != 0U) +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST1; +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR1) != 0U) +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR1; +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 1 abort callback */ +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1AbortCallback(hcan); +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox1AbortCallback(hcan); +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmit Mailbox 2 management *****************************************/ +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP2) != 0U) +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK2) != 0U) +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 2 complete callback */ +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2CompleteCallback(hcan); +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox2CompleteCallback(hcan); +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST2) != 0U) +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST2; +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR2) != 0U) +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR2; +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 2 abort callback */ + ARM GAS /tmp/ccZqSNsg.s page 80 + + +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2AbortCallback(hcan); +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox2AbortCallback(hcan); +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 overrun interrupt management *****************************/ +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Rx Fifo 0 overrun error */ +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV0; +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear FIFO0 Overrun Flag */ +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 full interrupt management ********************************/ +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FULL0) != 0U) +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear FIFO 0 full Flag */ +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 full Callback */ +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0FullCallback(hcan); +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFifo0FullCallback(hcan); +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 message pending interrupt management *********************/ +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check if message is still pending */ +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 message pending Callback */ +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback(hcan); +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFifo0MsgPendingCallback(hcan); + ARM GAS /tmp/ccZqSNsg.s page 81 + + +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 overrun interrupt management *****************************/ +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Rx Fifo 1 overrun error */ +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV1; +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear FIFO1 Overrun Flag */ +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 full interrupt management ********************************/ +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FULL1) != 0U) +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear FIFO 1 full Flag */ +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 full Callback */ +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1FullCallback(hcan); +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFifo1FullCallback(hcan); +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 message pending interrupt management *********************/ +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check if message is still pending */ +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 message pending Callback */ +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback(hcan); +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFifo1MsgPendingCallback(hcan); +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Sleep interrupt management *********************************************/ +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((msrflags & CAN_MSR_SLAKI) != 0U) + ARM GAS /tmp/ccZqSNsg.s page 82 + + +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear Sleep interrupt Flag */ +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Sleep Callback */ +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->SleepCallback(hcan); +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_SleepCallback(hcan); +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* WakeUp interrupt management *********************************************/ +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_WAKEUP) != 0U) +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((msrflags & CAN_MSR_WKUI) != 0U) +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear WakeUp Flag */ +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* WakeUp Callback */ +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback(hcan); +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_WakeUpFromRxMsgCallback(hcan); +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Error interrupts management *********************************************/ +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_ERROR) != 0U) +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((msrflags & CAN_MSR_ERRI) != 0U) +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Error Warning Flag */ +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Error Warning */ +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EWG; +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* No need for clear of Error Warning Flag as read-only */ +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Error Passive Flag */ +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Error Passive */ +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EPV; +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* No need for clear of Error Passive Flag as read-only */ + ARM GAS /tmp/ccZqSNsg.s page 83 + + +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Bus-off Flag */ +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((interrupts & CAN_IT_BUSOFF) != 0U) && +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Bus-Off */ +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BOF; +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* No need for clear of Error Bus-Off as read-only */ +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Last Error Code Flag */ +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (esrflags & CAN_ESR_LEC) +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_0): +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Stuff error */ +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_STF; +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_1): +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Form error */ +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_FOR; +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Acknowledgement error */ +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_ACK; +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2): +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Bit recessive error */ +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BR; +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Bit Dominant error */ +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BD; +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to CRC error */ +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_CRC; +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default: +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear Last error code Flag */ +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear ERRI Flag */ +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call the Error call Back in case of Errors */ +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (errorcode != HAL_CAN_ERROR_NONE) + ARM GAS /tmp/ccZqSNsg.s page 84 + + +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code in handle */ +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= errorcode; +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call Error callback function */ +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCallback(hcan); +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_ErrorCallback(hcan); +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group5 Callback functions +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief CAN Callback functions +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Callback functions ##### +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** This subsection provides the following callback functions: +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox0CompleteCallback +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox1CompleteCallback +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox2CompleteCallback +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox0AbortCallback +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox1AbortCallback +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox2AbortCallback +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RxFifo0MsgPendingCallback +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RxFifo0FullCallback +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RxFifo1MsgPendingCallback +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RxFifo1FullCallback +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_SleepCallback +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_WakeUpFromRxMsgCallback +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_ErrorCallback +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 0 complete callback. +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2348 .loc 1 2105 1 is_stmt 1 view -0 + 2349 .cfi_startproc + 2350 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccZqSNsg.s page 85 + + + 2351 @ frame_needed = 0, uses_anonymous_args = 0 + 2352 @ link register save eliminated. +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2353 .loc 1 2107 3 view .LVU743 +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2354 .loc 1 2113 1 is_stmt 0 view .LVU744 + 2355 @ sp needed + 2356 0000 7047 bx lr + 2357 .cfi_endproc + 2358 .LFE60: + 2360 .section .text.HAL_CAN_TxMailbox1CompleteCallback,"ax",%progbits + 2361 .align 1 + 2362 .weak HAL_CAN_TxMailbox1CompleteCallback + 2363 .syntax unified + 2364 .code 16 + 2365 .thumb_func + 2367 HAL_CAN_TxMailbox1CompleteCallback: + 2368 .LVL190: + 2369 .LFB61: +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 1 complete callback. +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2370 .loc 1 2122 1 is_stmt 1 view -0 + 2371 .cfi_startproc + 2372 @ args = 0, pretend = 0, frame = 0 + 2373 @ frame_needed = 0, uses_anonymous_args = 0 + 2374 @ link register save eliminated. +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2375 .loc 1 2124 3 view .LVU746 +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2376 .loc 1 2130 1 is_stmt 0 view .LVU747 + 2377 @ sp needed + 2378 0000 7047 bx lr + 2379 .cfi_endproc + 2380 .LFE61: + 2382 .section .text.HAL_CAN_TxMailbox2CompleteCallback,"ax",%progbits + 2383 .align 1 + 2384 .weak HAL_CAN_TxMailbox2CompleteCallback + 2385 .syntax unified + ARM GAS /tmp/ccZqSNsg.s page 86 + + + 2386 .code 16 + 2387 .thumb_func + 2389 HAL_CAN_TxMailbox2CompleteCallback: + 2390 .LVL191: + 2391 .LFB62: +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 2 complete callback. +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2392 .loc 1 2139 1 is_stmt 1 view -0 + 2393 .cfi_startproc + 2394 @ args = 0, pretend = 0, frame = 0 + 2395 @ frame_needed = 0, uses_anonymous_args = 0 + 2396 @ link register save eliminated. +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2397 .loc 1 2141 3 view .LVU749 +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2398 .loc 1 2147 1 is_stmt 0 view .LVU750 + 2399 @ sp needed + 2400 0000 7047 bx lr + 2401 .cfi_endproc + 2402 .LFE62: + 2404 .section .text.HAL_CAN_TxMailbox0AbortCallback,"ax",%progbits + 2405 .align 1 + 2406 .weak HAL_CAN_TxMailbox0AbortCallback + 2407 .syntax unified + 2408 .code 16 + 2409 .thumb_func + 2411 HAL_CAN_TxMailbox0AbortCallback: + 2412 .LVL192: + 2413 .LFB63: +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 0 Cancellation callback. +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2414 .loc 1 2156 1 is_stmt 1 view -0 + 2415 .cfi_startproc + 2416 @ args = 0, pretend = 0, frame = 0 + 2417 @ frame_needed = 0, uses_anonymous_args = 0 + 2418 @ link register save eliminated. +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccZqSNsg.s page 87 + + +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2419 .loc 1 2158 3 view .LVU752 +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox0AbortCallback could be implemented in the +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2420 .loc 1 2164 1 is_stmt 0 view .LVU753 + 2421 @ sp needed + 2422 0000 7047 bx lr + 2423 .cfi_endproc + 2424 .LFE63: + 2426 .section .text.HAL_CAN_TxMailbox1AbortCallback,"ax",%progbits + 2427 .align 1 + 2428 .weak HAL_CAN_TxMailbox1AbortCallback + 2429 .syntax unified + 2430 .code 16 + 2431 .thumb_func + 2433 HAL_CAN_TxMailbox1AbortCallback: + 2434 .LVL193: + 2435 .LFB64: +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 1 Cancellation callback. +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2436 .loc 1 2173 1 is_stmt 1 view -0 + 2437 .cfi_startproc + 2438 @ args = 0, pretend = 0, frame = 0 + 2439 @ frame_needed = 0, uses_anonymous_args = 0 + 2440 @ link register save eliminated. +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2441 .loc 1 2175 3 view .LVU755 +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox1AbortCallback could be implemented in the +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2442 .loc 1 2181 1 is_stmt 0 view .LVU756 + 2443 @ sp needed + 2444 0000 7047 bx lr + 2445 .cfi_endproc + 2446 .LFE64: + 2448 .section .text.HAL_CAN_TxMailbox2AbortCallback,"ax",%progbits + 2449 .align 1 + 2450 .weak HAL_CAN_TxMailbox2AbortCallback + 2451 .syntax unified + 2452 .code 16 + 2453 .thumb_func + 2455 HAL_CAN_TxMailbox2AbortCallback: + ARM GAS /tmp/ccZqSNsg.s page 88 + + + 2456 .LVL194: + 2457 .LFB65: +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 2 Cancellation callback. +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2458 .loc 1 2190 1 is_stmt 1 view -0 + 2459 .cfi_startproc + 2460 @ args = 0, pretend = 0, frame = 0 + 2461 @ frame_needed = 0, uses_anonymous_args = 0 + 2462 @ link register save eliminated. +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2463 .loc 1 2192 3 view .LVU758 +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox2AbortCallback could be implemented in the +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2464 .loc 1 2198 1 is_stmt 0 view .LVU759 + 2465 @ sp needed + 2466 0000 7047 bx lr + 2467 .cfi_endproc + 2468 .LFE65: + 2470 .section .text.HAL_CAN_RxFifo0MsgPendingCallback,"ax",%progbits + 2471 .align 1 + 2472 .weak HAL_CAN_RxFifo0MsgPendingCallback + 2473 .syntax unified + 2474 .code 16 + 2475 .thumb_func + 2477 HAL_CAN_RxFifo0MsgPendingCallback: + 2478 .LVL195: + 2479 .LFB66: +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Rx FIFO 0 message pending callback. +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2480 .loc 1 2207 1 is_stmt 1 view -0 + 2481 .cfi_startproc + 2482 @ args = 0, pretend = 0, frame = 0 + 2483 @ frame_needed = 0, uses_anonymous_args = 0 + 2484 @ link register save eliminated. +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2485 .loc 1 2209 3 view .LVU761 +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccZqSNsg.s page 89 + + +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2486 .loc 1 2215 1 is_stmt 0 view .LVU762 + 2487 @ sp needed + 2488 0000 7047 bx lr + 2489 .cfi_endproc + 2490 .LFE66: + 2492 .section .text.HAL_CAN_RxFifo0FullCallback,"ax",%progbits + 2493 .align 1 + 2494 .weak HAL_CAN_RxFifo0FullCallback + 2495 .syntax unified + 2496 .code 16 + 2497 .thumb_func + 2499 HAL_CAN_RxFifo0FullCallback: + 2500 .LVL196: + 2501 .LFB67: +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Rx FIFO 0 full callback. +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2502 .loc 1 2224 1 is_stmt 1 view -0 + 2503 .cfi_startproc + 2504 @ args = 0, pretend = 0, frame = 0 + 2505 @ frame_needed = 0, uses_anonymous_args = 0 + 2506 @ link register save eliminated. +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2507 .loc 1 2226 3 view .LVU764 +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_RxFifo0FullCallback could be implemented in the user +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** file +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2508 .loc 1 2232 1 is_stmt 0 view .LVU765 + 2509 @ sp needed + 2510 0000 7047 bx lr + 2511 .cfi_endproc + 2512 .LFE67: + 2514 .section .text.HAL_CAN_RxFifo1MsgPendingCallback,"ax",%progbits + 2515 .align 1 + 2516 .weak HAL_CAN_RxFifo1MsgPendingCallback + 2517 .syntax unified + 2518 .code 16 + 2519 .thumb_func + 2521 HAL_CAN_RxFifo1MsgPendingCallback: + 2522 .LVL197: + 2523 .LFB68: +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccZqSNsg.s page 90 + + +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Rx FIFO 1 message pending callback. +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2524 .loc 1 2241 1 is_stmt 1 view -0 + 2525 .cfi_startproc + 2526 @ args = 0, pretend = 0, frame = 0 + 2527 @ frame_needed = 0, uses_anonymous_args = 0 + 2528 @ link register save eliminated. +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2529 .loc 1 2243 3 view .LVU767 +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2530 .loc 1 2249 1 is_stmt 0 view .LVU768 + 2531 @ sp needed + 2532 0000 7047 bx lr + 2533 .cfi_endproc + 2534 .LFE68: + 2536 .section .text.HAL_CAN_RxFifo1FullCallback,"ax",%progbits + 2537 .align 1 + 2538 .weak HAL_CAN_RxFifo1FullCallback + 2539 .syntax unified + 2540 .code 16 + 2541 .thumb_func + 2543 HAL_CAN_RxFifo1FullCallback: + 2544 .LVL198: + 2545 .LFB69: +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Rx FIFO 1 full callback. +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2546 .loc 1 2258 1 is_stmt 1 view -0 + 2547 .cfi_startproc + 2548 @ args = 0, pretend = 0, frame = 0 + 2549 @ frame_needed = 0, uses_anonymous_args = 0 + 2550 @ link register save eliminated. +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2551 .loc 1 2260 3 view .LVU770 +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_RxFifo1FullCallback could be implemented in the user +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** file + ARM GAS /tmp/ccZqSNsg.s page 91 + + +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2552 .loc 1 2266 1 is_stmt 0 view .LVU771 + 2553 @ sp needed + 2554 0000 7047 bx lr + 2555 .cfi_endproc + 2556 .LFE69: + 2558 .section .text.HAL_CAN_SleepCallback,"ax",%progbits + 2559 .align 1 + 2560 .weak HAL_CAN_SleepCallback + 2561 .syntax unified + 2562 .code 16 + 2563 .thumb_func + 2565 HAL_CAN_SleepCallback: + 2566 .LVL199: + 2567 .LFB70: +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Sleep callback. +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2568 .loc 1 2275 1 is_stmt 1 view -0 + 2569 .cfi_startproc + 2570 @ args = 0, pretend = 0, frame = 0 + 2571 @ frame_needed = 0, uses_anonymous_args = 0 + 2572 @ link register save eliminated. +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2573 .loc 1 2277 3 view .LVU773 +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_SleepCallback could be implemented in the user file +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2574 .loc 1 2282 1 is_stmt 0 view .LVU774 + 2575 @ sp needed + 2576 0000 7047 bx lr + 2577 .cfi_endproc + 2578 .LFE70: + 2580 .section .text.HAL_CAN_WakeUpFromRxMsgCallback,"ax",%progbits + 2581 .align 1 + 2582 .weak HAL_CAN_WakeUpFromRxMsgCallback + 2583 .syntax unified + 2584 .code 16 + 2585 .thumb_func + 2587 HAL_CAN_WakeUpFromRxMsgCallback: + 2588 .LVL200: + 2589 .LFB71: +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief WakeUp from Rx message callback. +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + ARM GAS /tmp/ccZqSNsg.s page 92 + + +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2590 .loc 1 2291 1 is_stmt 1 view -0 + 2591 .cfi_startproc + 2592 @ args = 0, pretend = 0, frame = 0 + 2593 @ frame_needed = 0, uses_anonymous_args = 0 + 2594 @ link register save eliminated. +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2595 .loc 1 2293 3 view .LVU776 +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2596 .loc 1 2299 1 is_stmt 0 view .LVU777 + 2597 @ sp needed + 2598 0000 7047 bx lr + 2599 .cfi_endproc + 2600 .LFE71: + 2602 .section .text.HAL_CAN_ErrorCallback,"ax",%progbits + 2603 .align 1 + 2604 .weak HAL_CAN_ErrorCallback + 2605 .syntax unified + 2606 .code 16 + 2607 .thumb_func + 2609 HAL_CAN_ErrorCallback: + 2610 .LVL201: + 2611 .LFB72: +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Error CAN callback. +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2612 .loc 1 2308 1 is_stmt 1 view -0 + 2613 .cfi_startproc + 2614 @ args = 0, pretend = 0, frame = 0 + 2615 @ frame_needed = 0, uses_anonymous_args = 0 + 2616 @ link register save eliminated. +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2617 .loc 1 2310 3 view .LVU779 +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_ErrorCallback could be implemented in the user file +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2618 .loc 1 2315 1 is_stmt 0 view .LVU780 + 2619 @ sp needed + 2620 0000 7047 bx lr + ARM GAS /tmp/ccZqSNsg.s page 93 + + + 2621 .cfi_endproc + 2622 .LFE72: + 2624 .section .text.HAL_CAN_IRQHandler,"ax",%progbits + 2625 .align 1 + 2626 .global HAL_CAN_IRQHandler + 2627 .syntax unified + 2628 .code 16 + 2629 .thumb_func + 2631 HAL_CAN_IRQHandler: + 2632 .LVL202: + 2633 .LFB59: +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; + 2634 .loc 1 1694 1 is_stmt 1 view -0 + 2635 .cfi_startproc + 2636 @ args = 0, pretend = 0, frame = 0 + 2637 @ frame_needed = 0, uses_anonymous_args = 0 +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; + 2638 .loc 1 1694 1 is_stmt 0 view .LVU782 + 2639 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 2640 .cfi_def_cfa_offset 24 + 2641 .cfi_offset 3, -24 + 2642 .cfi_offset 4, -20 + 2643 .cfi_offset 5, -16 + 2644 .cfi_offset 6, -12 + 2645 .cfi_offset 7, -8 + 2646 .cfi_offset 14, -4 + 2647 0002 DE46 mov lr, fp + 2648 0004 5746 mov r7, r10 + 2649 0006 4E46 mov r6, r9 + 2650 0008 4546 mov r5, r8 + 2651 000a E0B5 push {r5, r6, r7, lr} + 2652 .cfi_def_cfa_offset 40 + 2653 .cfi_offset 8, -40 + 2654 .cfi_offset 9, -36 + 2655 .cfi_offset 10, -32 + 2656 .cfi_offset 11, -28 + 2657 000c 0500 movs r5, r0 +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); + 2658 .loc 1 1695 3 is_stmt 1 view .LVU783 + 2659 .LVL203: +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2660 .loc 1 1696 3 view .LVU784 +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2661 .loc 1 1696 25 is_stmt 0 view .LVU785 + 2662 000e 0368 ldr r3, [r0] +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2663 .loc 1 1696 12 view .LVU786 + 2664 0010 5C69 ldr r4, [r3, #20] + 2665 .LVL204: +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); + 2666 .loc 1 1697 3 is_stmt 1 view .LVU787 +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); + 2667 .loc 1 1697 12 is_stmt 0 view .LVU788 + 2668 0012 5A68 ldr r2, [r3, #4] + 2669 0014 9046 mov r8, r2 + 2670 .LVL205: +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); + ARM GAS /tmp/ccZqSNsg.s page 94 + + + 2671 .loc 1 1698 3 is_stmt 1 view .LVU789 +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); + 2672 .loc 1 1698 12 is_stmt 0 view .LVU790 + 2673 0016 9F68 ldr r7, [r3, #8] + 2674 .LVL206: +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + 2675 .loc 1 1699 3 is_stmt 1 view .LVU791 +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + 2676 .loc 1 1699 12 is_stmt 0 view .LVU792 + 2677 0018 DA68 ldr r2, [r3, #12] + 2678 .LVL207: +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + 2679 .loc 1 1699 12 view .LVU793 + 2680 001a 9246 mov r10, r2 + 2681 .LVL208: +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); + 2682 .loc 1 1700 3 is_stmt 1 view .LVU794 +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); + 2683 .loc 1 1700 12 is_stmt 0 view .LVU795 + 2684 001c 1A69 ldr r2, [r3, #16] + 2685 .LVL209: +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); + 2686 .loc 1 1700 12 view .LVU796 + 2687 001e 9146 mov r9, r2 + 2688 .LVL210: +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2689 .loc 1 1701 3 is_stmt 1 view .LVU797 +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2690 .loc 1 1701 12 is_stmt 0 view .LVU798 + 2691 0020 9A69 ldr r2, [r3, #24] + 2692 .LVL211: +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2693 .loc 1 1701 12 view .LVU799 + 2694 0022 9346 mov fp, r2 + 2695 .LVL212: +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2696 .loc 1 1704 3 is_stmt 1 view .LVU800 +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2697 .loc 1 1704 19 is_stmt 0 view .LVU801 + 2698 0024 0122 movs r2, #1 + 2699 .LVL213: +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2700 .loc 1 1704 19 view .LVU802 + 2701 0026 1600 movs r6, r2 + 2702 0028 2640 ands r6, r4 +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2703 .loc 1 1704 6 view .LVU803 + 2704 002a 2242 tst r2, r4 + 2705 002c 37D0 beq .L161 +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2706 .loc 1 1707 5 is_stmt 1 view .LVU804 +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2707 .loc 1 1707 19 is_stmt 0 view .LVU805 + 2708 002e 1600 movs r6, r2 + 2709 0030 3E40 ands r6, r7 +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2710 .loc 1 1707 8 view .LVU806 + ARM GAS /tmp/ccZqSNsg.s page 95 + + + 2711 0032 3A42 tst r2, r7 + 2712 0034 15D0 beq .L162 +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2713 .loc 1 1710 7 is_stmt 1 view .LVU807 + 2714 0036 9A60 str r2, [r3, #8] +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2715 .loc 1 1712 7 view .LVU808 +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2716 .loc 1 1712 10 is_stmt 0 view .LVU809 + 2717 0038 BB07 lsls r3, r7, #30 + 2718 003a 09D4 bmi .L222 +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2719 .loc 1 1725 9 is_stmt 1 view .LVU810 +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2720 .loc 1 1725 12 is_stmt 0 view .LVU811 + 2721 003c 7B07 lsls r3, r7, #29 + 2722 003e 0ED4 bmi .L193 +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2723 .loc 1 1730 14 is_stmt 1 view .LVU812 +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2724 .loc 1 1730 28 is_stmt 0 view .LVU813 + 2725 0040 0823 movs r3, #8 + 2726 0042 1E00 movs r6, r3 + 2727 0044 3E40 ands r6, r7 +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2728 .loc 1 1730 17 view .LVU814 + 2729 0046 3B42 tst r3, r7 + 2730 0048 06D0 beq .L223 +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2731 .loc 1 1733 21 view .LVU815 + 2732 004a 8026 movs r6, #128 + 2733 004c 7601 lsls r6, r6, #5 + 2734 004e 08E0 b .L162 + 2735 .L222: +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2736 .loc 1 1720 9 is_stmt 1 view .LVU816 + 2737 0050 FFF7FEFF bl HAL_CAN_TxMailbox0CompleteCallback + 2738 .LVL214: +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); + 2739 .loc 1 1695 12 is_stmt 0 view .LVU817 + 2740 0054 0026 movs r6, #0 + 2741 0056 04E0 b .L162 + 2742 .LVL215: + 2743 .L223: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2744 .loc 1 1743 11 is_stmt 1 view .LVU818 + 2745 0058 FFF7FEFF bl HAL_CAN_TxMailbox0AbortCallback + 2746 .LVL216: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2747 .loc 1 1743 11 is_stmt 0 view .LVU819 + 2748 005c 01E0 b .L162 + 2749 .LVL217: + 2750 .L193: +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2751 .loc 1 1728 21 view .LVU820 + 2752 005e 8026 movs r6, #128 + 2753 0060 3601 lsls r6, r6, #4 + ARM GAS /tmp/ccZqSNsg.s page 96 + + + 2754 .LVL218: + 2755 .L162: +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2756 .loc 1 1750 5 is_stmt 1 view .LVU821 +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2757 .loc 1 1750 8 is_stmt 0 view .LVU822 + 2758 0062 FB05 lsls r3, r7, #23 + 2759 0064 0CD5 bpl .L164 +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2760 .loc 1 1753 7 is_stmt 1 view .LVU823 + 2761 0066 2B68 ldr r3, [r5] + 2762 0068 8022 movs r2, #128 + 2763 006a 5200 lsls r2, r2, #1 + 2764 006c 9A60 str r2, [r3, #8] +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2765 .loc 1 1755 7 view .LVU824 +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2766 .loc 1 1755 10 is_stmt 0 view .LVU825 + 2767 006e BB05 lsls r3, r7, #22 + 2768 0070 00D5 bpl .LCB2316 + 2769 0072 8DE0 b .L224 @long jump + 2770 .LCB2316: +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2771 .loc 1 1768 9 is_stmt 1 view .LVU826 +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2772 .loc 1 1768 12 is_stmt 0 view .LVU827 + 2773 0074 7B05 lsls r3, r7, #21 + 2774 0076 00D4 bmi .LCB2321 + 2775 0078 8EE0 b .L166 @long jump + 2776 .LCB2321: +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2777 .loc 1 1771 11 is_stmt 1 view .LVU828 +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2778 .loc 1 1771 21 is_stmt 0 view .LVU829 + 2779 007a 8023 movs r3, #128 + 2780 007c 9B01 lsls r3, r3, #6 + 2781 007e 1E43 orrs r6, r3 + 2782 .LVL219: + 2783 .L164: +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2784 .loc 1 1793 5 is_stmt 1 view .LVU830 +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2785 .loc 1 1793 8 is_stmt 0 view .LVU831 + 2786 0080 FB03 lsls r3, r7, #15 + 2787 0082 0CD5 bpl .L161 +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2788 .loc 1 1796 7 is_stmt 1 view .LVU832 + 2789 0084 2B68 ldr r3, [r5] + 2790 0086 8022 movs r2, #128 + 2791 0088 5202 lsls r2, r2, #9 + 2792 008a 9A60 str r2, [r3, #8] +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2793 .loc 1 1798 7 view .LVU833 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2794 .loc 1 1798 10 is_stmt 0 view .LVU834 + 2795 008c BB03 lsls r3, r7, #14 + 2796 008e 00D5 bpl .LCB2348 + ARM GAS /tmp/ccZqSNsg.s page 97 + + + 2797 0090 8CE0 b .L225 @long jump + 2798 .LCB2348: +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2799 .loc 1 1811 9 is_stmt 1 view .LVU835 +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2800 .loc 1 1811 12 is_stmt 0 view .LVU836 + 2801 0092 7B03 lsls r3, r7, #13 + 2802 0094 00D4 bmi .LCB2353 + 2803 0096 8DE0 b .L169 @long jump + 2804 .LCB2353: +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2805 .loc 1 1814 11 is_stmt 1 view .LVU837 +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2806 .loc 1 1814 21 is_stmt 0 view .LVU838 + 2807 0098 8023 movs r3, #128 + 2808 009a 1B02 lsls r3, r3, #8 + 2809 009c 1E43 orrs r6, r3 + 2810 .LVL220: + 2811 .L161: +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2812 .loc 1 1837 3 is_stmt 1 view .LVU839 +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2813 .loc 1 1837 6 is_stmt 0 view .LVU840 + 2814 009e 2307 lsls r3, r4, #28 + 2815 00a0 08D5 bpl .L171 +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2816 .loc 1 1839 5 is_stmt 1 view .LVU841 +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2817 .loc 1 1839 8 is_stmt 0 view .LVU842 + 2818 00a2 5346 mov r3, r10 + 2819 00a4 DB06 lsls r3, r3, #27 + 2820 00a6 05D5 bpl .L171 +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2821 .loc 1 1842 7 is_stmt 1 view .LVU843 +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2822 .loc 1 1842 17 is_stmt 0 view .LVU844 + 2823 00a8 8023 movs r3, #128 + 2824 00aa 9B00 lsls r3, r3, #2 + 2825 00ac 1E43 orrs r6, r3 + 2826 .LVL221: +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2827 .loc 1 1845 7 is_stmt 1 view .LVU845 + 2828 00ae 2B68 ldr r3, [r5] + 2829 00b0 1022 movs r2, #16 + 2830 00b2 DA60 str r2, [r3, #12] + 2831 .L171: +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2832 .loc 1 1850 3 view .LVU846 +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2833 .loc 1 1850 6 is_stmt 0 view .LVU847 + 2834 00b4 6307 lsls r3, r4, #29 + 2835 00b6 03D5 bpl .L172 +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2836 .loc 1 1852 5 is_stmt 1 view .LVU848 +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2837 .loc 1 1852 8 is_stmt 0 view .LVU849 + 2838 00b8 5346 mov r3, r10 + ARM GAS /tmp/ccZqSNsg.s page 98 + + + 2839 00ba 1B07 lsls r3, r3, #28 + 2840 00bc 00D5 bpl .LCB2404 + 2841 00be 83E0 b .L226 @long jump + 2842 .LCB2404: + 2843 .L172: +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2844 .loc 1 1869 3 is_stmt 1 view .LVU850 +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2845 .loc 1 1869 6 is_stmt 0 view .LVU851 + 2846 00c0 A307 lsls r3, r4, #30 + 2847 00c2 04D5 bpl .L173 +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2848 .loc 1 1872 5 is_stmt 1 view .LVU852 +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2849 .loc 1 1872 14 is_stmt 0 view .LVU853 + 2850 00c4 2B68 ldr r3, [r5] +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2851 .loc 1 1872 24 view .LVU854 + 2852 00c6 DB68 ldr r3, [r3, #12] +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2853 .loc 1 1872 8 view .LVU855 + 2854 00c8 9B07 lsls r3, r3, #30 + 2855 00ca 00D0 beq .LCB2418 + 2856 00cc 83E0 b .L227 @long jump + 2857 .LCB2418: + 2858 .L173: +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2859 .loc 1 1886 3 is_stmt 1 view .LVU856 +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2860 .loc 1 1886 6 is_stmt 0 view .LVU857 + 2861 00ce 6306 lsls r3, r4, #25 + 2862 00d0 08D5 bpl .L174 +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2863 .loc 1 1888 5 is_stmt 1 view .LVU858 +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2864 .loc 1 1888 8 is_stmt 0 view .LVU859 + 2865 00d2 4B46 mov r3, r9 + 2866 00d4 DB06 lsls r3, r3, #27 + 2867 00d6 05D5 bpl .L174 +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2868 .loc 1 1891 7 is_stmt 1 view .LVU860 +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2869 .loc 1 1891 17 is_stmt 0 view .LVU861 + 2870 00d8 8023 movs r3, #128 + 2871 00da DB00 lsls r3, r3, #3 + 2872 00dc 1E43 orrs r6, r3 + 2873 .LVL222: +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2874 .loc 1 1894 7 is_stmt 1 view .LVU862 + 2875 00de 2B68 ldr r3, [r5] + 2876 00e0 1022 movs r2, #16 + 2877 00e2 1A61 str r2, [r3, #16] + 2878 .L174: +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2879 .loc 1 1899 3 view .LVU863 +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2880 .loc 1 1899 6 is_stmt 0 view .LVU864 + ARM GAS /tmp/ccZqSNsg.s page 99 + + + 2881 00e4 A306 lsls r3, r4, #26 + 2882 00e6 03D5 bpl .L175 +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2883 .loc 1 1901 5 is_stmt 1 view .LVU865 +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2884 .loc 1 1901 8 is_stmt 0 view .LVU866 + 2885 00e8 4B46 mov r3, r9 + 2886 00ea 1B07 lsls r3, r3, #28 + 2887 00ec 00D5 bpl .LCB2459 + 2888 00ee 76E0 b .L228 @long jump + 2889 .LCB2459: + 2890 .L175: +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2891 .loc 1 1918 3 is_stmt 1 view .LVU867 +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2892 .loc 1 1918 6 is_stmt 0 view .LVU868 + 2893 00f0 E306 lsls r3, r4, #27 + 2894 00f2 04D5 bpl .L176 +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2895 .loc 1 1921 5 is_stmt 1 view .LVU869 +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2896 .loc 1 1921 14 is_stmt 0 view .LVU870 + 2897 00f4 2B68 ldr r3, [r5] +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2898 .loc 1 1921 24 view .LVU871 + 2899 00f6 1B69 ldr r3, [r3, #16] +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2900 .loc 1 1921 8 view .LVU872 + 2901 00f8 9B07 lsls r3, r3, #30 + 2902 00fa 00D0 beq .LCB2473 + 2903 00fc 76E0 b .L229 @long jump + 2904 .LCB2473: + 2905 .L176: +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2906 .loc 1 1935 3 is_stmt 1 view .LVU873 +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2907 .loc 1 1935 6 is_stmt 0 view .LVU874 + 2908 00fe A303 lsls r3, r4, #14 + 2909 0100 03D5 bpl .L177 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2910 .loc 1 1937 5 is_stmt 1 view .LVU875 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2911 .loc 1 1937 8 is_stmt 0 view .LVU876 + 2912 0102 4346 mov r3, r8 + 2913 0104 DB06 lsls r3, r3, #27 + 2914 0106 00D5 bpl .LCB2486 + 2915 0108 74E0 b .L230 @long jump + 2916 .LCB2486: + 2917 .L177: +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2918 .loc 1 1954 3 is_stmt 1 view .LVU877 +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2919 .loc 1 1954 6 is_stmt 0 view .LVU878 + 2920 010a E303 lsls r3, r4, #15 + 2921 010c 03D5 bpl .L178 +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2922 .loc 1 1956 5 is_stmt 1 view .LVU879 + ARM GAS /tmp/ccZqSNsg.s page 100 + + +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2923 .loc 1 1956 8 is_stmt 0 view .LVU880 + 2924 010e 4346 mov r3, r8 + 2925 0110 1B07 lsls r3, r3, #28 + 2926 0112 00D5 bpl .LCB2499 + 2927 0114 75E0 b .L231 @long jump + 2928 .LCB2499: + 2929 .L178: +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2930 .loc 1 1973 3 is_stmt 1 view .LVU881 +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2931 .loc 1 1973 6 is_stmt 0 view .LVU882 + 2932 0116 2304 lsls r3, r4, #16 + 2933 0118 32D5 bpl .L179 +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2934 .loc 1 1975 5 is_stmt 1 view .LVU883 +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2935 .loc 1 1975 8 is_stmt 0 view .LVU884 + 2936 011a 4346 mov r3, r8 + 2937 011c 5B07 lsls r3, r3, #29 + 2938 011e 2CD5 bpl .L180 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2939 .loc 1 1978 7 is_stmt 1 view .LVU885 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2940 .loc 1 1978 10 is_stmt 0 view .LVU886 + 2941 0120 E305 lsls r3, r4, #23 + 2942 0122 04D5 bpl .L181 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2943 .loc 1 1978 55 discriminator 1 view .LVU887 + 2944 0124 5B46 mov r3, fp + 2945 0126 DB07 lsls r3, r3, #31 + 2946 0128 01D5 bpl .L181 +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2947 .loc 1 1982 9 is_stmt 1 view .LVU888 +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2948 .loc 1 1982 19 is_stmt 0 view .LVU889 + 2949 012a 0123 movs r3, #1 + 2950 012c 1E43 orrs r6, r3 + 2951 .LVL223: + 2952 .L181: +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2953 .loc 1 1988 7 is_stmt 1 view .LVU890 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2954 .loc 1 1988 10 is_stmt 0 view .LVU891 + 2955 012e A305 lsls r3, r4, #22 + 2956 0130 04D5 bpl .L182 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2957 .loc 1 1988 55 discriminator 1 view .LVU892 + 2958 0132 5B46 mov r3, fp + 2959 0134 9B07 lsls r3, r3, #30 + 2960 0136 01D5 bpl .L182 +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2961 .loc 1 1992 9 is_stmt 1 view .LVU893 +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2962 .loc 1 1992 19 is_stmt 0 view .LVU894 + 2963 0138 0223 movs r3, #2 + 2964 013a 1E43 orrs r6, r3 + ARM GAS /tmp/ccZqSNsg.s page 101 + + + 2965 .LVL224: + 2966 .L182: +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2967 .loc 1 1998 7 is_stmt 1 view .LVU895 +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2968 .loc 1 1998 10 is_stmt 0 view .LVU896 + 2969 013c 6305 lsls r3, r4, #21 + 2970 013e 04D5 bpl .L183 +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2971 .loc 1 1998 48 discriminator 1 view .LVU897 + 2972 0140 5B46 mov r3, fp + 2973 0142 5B07 lsls r3, r3, #29 + 2974 0144 01D5 bpl .L183 +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2975 .loc 1 2002 9 is_stmt 1 view .LVU898 +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2976 .loc 1 2002 19 is_stmt 0 view .LVU899 + 2977 0146 0423 movs r3, #4 + 2978 0148 1E43 orrs r6, r3 + 2979 .LVL225: + 2980 .L183: +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2981 .loc 1 2008 7 is_stmt 1 view .LVU900 +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2982 .loc 1 2008 10 is_stmt 0 view .LVU901 + 2983 014a 2405 lsls r4, r4, #20 + 2984 014c 15D5 bpl .L180 + 2985 .LVL226: +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2986 .loc 1 2009 22 view .LVU902 + 2987 014e 7023 movs r3, #112 + 2988 0150 5A46 mov r2, fp + 2989 0152 1A40 ands r2, r3 +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2990 .loc 1 2008 57 discriminator 1 view .LVU903 + 2991 0154 5946 mov r1, fp + 2992 0156 0B42 tst r3, r1 + 2993 0158 0FD0 beq .L180 + 2994 .LVL227: +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2995 .loc 1 2011 9 is_stmt 1 view .LVU904 + 2996 015a 402A cmp r2, #64 + 2997 015c 66D0 beq .L184 + 2998 015e 57D8 bhi .L185 + 2999 0160 202A cmp r2, #32 + 3000 0162 5DD0 beq .L186 + 3001 0164 302A cmp r2, #48 + 3002 0166 5ED0 beq .L187 + 3003 0168 102A cmp r2, #16 + 3004 016a 01D1 bne .L189 +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3005 .loc 1 2015 13 view .LVU905 +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3006 .loc 1 2015 23 is_stmt 0 view .LVU906 + 3007 016c 0823 movs r3, #8 + 3008 016e 1E43 orrs r6, r3 + 3009 .LVL228: + ARM GAS /tmp/ccZqSNsg.s page 102 + + +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_1): + 3010 .loc 1 2016 13 is_stmt 1 view .LVU907 + 3011 .L189: +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3012 .loc 1 2042 9 view .LVU908 + 3013 0170 2A68 ldr r2, [r5] + 3014 0172 9369 ldr r3, [r2, #24] + 3015 0174 7021 movs r1, #112 + 3016 .LVL229: +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3017 .loc 1 2042 9 is_stmt 0 view .LVU909 + 3018 0176 8B43 bics r3, r1 + 3019 0178 9361 str r3, [r2, #24] + 3020 .L180: +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3021 .loc 1 2047 5 is_stmt 1 view .LVU910 + 3022 017a 2B68 ldr r3, [r5] + 3023 017c 0422 movs r2, #4 + 3024 017e 5A60 str r2, [r3, #4] + 3025 .L179: +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3026 .loc 1 2051 3 view .LVU911 +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3027 .loc 1 2051 6 is_stmt 0 view .LVU912 + 3028 0180 002E cmp r6, #0 + 3029 0182 59D1 bne .L232 + 3030 .L160: +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3031 .loc 1 2065 1 view .LVU913 + 3032 @ sp needed + 3033 .LVL230: + 3034 .LVL231: + 3035 .LVL232: + 3036 .LVL233: + 3037 .LVL234: + 3038 .LVL235: +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3039 .loc 1 2065 1 view .LVU914 + 3040 0184 F0BC pop {r4, r5, r6, r7} + 3041 0186 BB46 mov fp, r7 + 3042 0188 B246 mov r10, r6 + 3043 018a A946 mov r9, r5 + 3044 018c A046 mov r8, r4 + 3045 018e F8BD pop {r3, r4, r5, r6, r7, pc} + 3046 .LVL236: + 3047 .L224: +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3048 .loc 1 1763 9 is_stmt 1 view .LVU915 + 3049 0190 2800 movs r0, r5 + 3050 0192 FFF7FEFF bl HAL_CAN_TxMailbox1CompleteCallback + 3051 .LVL237: + 3052 0196 73E7 b .L164 + 3053 .L166: +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3054 .loc 1 1773 14 view .LVU916 +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3055 .loc 1 1773 17 is_stmt 0 view .LVU917 + ARM GAS /tmp/ccZqSNsg.s page 103 + + + 3056 0198 3B05 lsls r3, r7, #20 + 3057 019a 03D5 bpl .L167 +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3058 .loc 1 1776 11 is_stmt 1 view .LVU918 +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3059 .loc 1 1776 21 is_stmt 0 view .LVU919 + 3060 019c 8023 movs r3, #128 + 3061 019e DB01 lsls r3, r3, #7 + 3062 01a0 1E43 orrs r6, r3 + 3063 .LVL238: +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3064 .loc 1 1776 21 view .LVU920 + 3065 01a2 6DE7 b .L164 + 3066 .L167: +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3067 .loc 1 1786 11 is_stmt 1 view .LVU921 + 3068 01a4 2800 movs r0, r5 + 3069 01a6 FFF7FEFF bl HAL_CAN_TxMailbox1AbortCallback + 3070 .LVL239: + 3071 01aa 69E7 b .L164 + 3072 .L225: +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3073 .loc 1 1806 9 view .LVU922 + 3074 01ac 2800 movs r0, r5 + 3075 01ae FFF7FEFF bl HAL_CAN_TxMailbox2CompleteCallback + 3076 .LVL240: + 3077 01b2 74E7 b .L161 + 3078 .L169: +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3079 .loc 1 1816 14 view .LVU923 +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3080 .loc 1 1816 17 is_stmt 0 view .LVU924 + 3081 01b4 3F03 lsls r7, r7, #12 + 3082 01b6 03D5 bpl .L170 + 3083 .LVL241: +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3084 .loc 1 1819 11 is_stmt 1 view .LVU925 +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3085 .loc 1 1819 21 is_stmt 0 view .LVU926 + 3086 01b8 8023 movs r3, #128 + 3087 01ba 5B02 lsls r3, r3, #9 + 3088 01bc 1E43 orrs r6, r3 + 3089 .LVL242: +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3090 .loc 1 1819 21 view .LVU927 + 3091 01be 6EE7 b .L161 + 3092 .L170: +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3093 .loc 1 1829 11 is_stmt 1 view .LVU928 + 3094 01c0 2800 movs r0, r5 + 3095 01c2 FFF7FEFF bl HAL_CAN_TxMailbox2AbortCallback + 3096 .LVL243: + 3097 01c6 6AE7 b .L161 + 3098 .L226: +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3099 .loc 1 1855 7 view .LVU929 + 3100 01c8 2B68 ldr r3, [r5] + ARM GAS /tmp/ccZqSNsg.s page 104 + + + 3101 01ca 0822 movs r2, #8 + 3102 01cc DA60 str r2, [r3, #12] +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3103 .loc 1 1863 7 view .LVU930 + 3104 01ce 2800 movs r0, r5 + 3105 01d0 FFF7FEFF bl HAL_CAN_RxFifo0FullCallback + 3106 .LVL244: + 3107 01d4 74E7 b .L172 + 3108 .L227: +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3109 .loc 1 1880 7 view .LVU931 + 3110 01d6 2800 movs r0, r5 + 3111 01d8 FFF7FEFF bl HAL_CAN_RxFifo0MsgPendingCallback + 3112 .LVL245: + 3113 01dc 77E7 b .L173 + 3114 .L228: +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3115 .loc 1 1904 7 view .LVU932 + 3116 01de 2B68 ldr r3, [r5] + 3117 01e0 0822 movs r2, #8 + 3118 01e2 1A61 str r2, [r3, #16] +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3119 .loc 1 1912 7 view .LVU933 + 3120 01e4 2800 movs r0, r5 + 3121 01e6 FFF7FEFF bl HAL_CAN_RxFifo1FullCallback + 3122 .LVL246: + 3123 01ea 81E7 b .L175 + 3124 .L229: +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3125 .loc 1 1929 7 view .LVU934 + 3126 01ec 2800 movs r0, r5 + 3127 01ee FFF7FEFF bl HAL_CAN_RxFifo1MsgPendingCallback + 3128 .LVL247: + 3129 01f2 84E7 b .L176 + 3130 .L230: +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3131 .loc 1 1940 7 view .LVU935 + 3132 01f4 2B68 ldr r3, [r5] + 3133 01f6 1022 movs r2, #16 + 3134 01f8 5A60 str r2, [r3, #4] +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3135 .loc 1 1948 7 view .LVU936 + 3136 01fa 2800 movs r0, r5 + 3137 01fc FFF7FEFF bl HAL_CAN_SleepCallback + 3138 .LVL248: + 3139 0200 83E7 b .L177 + 3140 .L231: +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3141 .loc 1 1959 7 view .LVU937 + 3142 0202 2B68 ldr r3, [r5] + 3143 0204 0822 movs r2, #8 + 3144 0206 5A60 str r2, [r3, #4] +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3145 .loc 1 1967 7 view .LVU938 + 3146 0208 2800 movs r0, r5 + 3147 020a FFF7FEFF bl HAL_CAN_WakeUpFromRxMsgCallback + 3148 .LVL249: + ARM GAS /tmp/ccZqSNsg.s page 105 + + + 3149 020e 82E7 b .L178 + 3150 .LVL250: + 3151 .L185: +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3152 .loc 1 2011 9 is_stmt 0 view .LVU939 + 3153 0210 502A cmp r2, #80 + 3154 0212 0ED0 beq .L190 + 3155 0214 602A cmp r2, #96 + 3156 0216 ABD1 bne .L189 +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3157 .loc 1 2035 13 is_stmt 1 view .LVU940 +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3158 .loc 1 2035 23 is_stmt 0 view .LVU941 + 3159 0218 8023 movs r3, #128 + 3160 021a 5B00 lsls r3, r3, #1 + 3161 021c 1E43 orrs r6, r3 + 3162 .LVL251: +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default: + 3163 .loc 1 2036 13 is_stmt 1 view .LVU942 + 3164 021e A7E7 b .L189 + 3165 .L186: +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3166 .loc 1 2019 13 view .LVU943 +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3167 .loc 1 2019 23 is_stmt 0 view .LVU944 + 3168 0220 1023 movs r3, #16 + 3169 0222 1E43 orrs r6, r3 + 3170 .LVL252: +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): + 3171 .loc 1 2020 13 is_stmt 1 view .LVU945 + 3172 0224 A4E7 b .L189 + 3173 .L187: +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3174 .loc 1 2023 13 view .LVU946 +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3175 .loc 1 2023 23 is_stmt 0 view .LVU947 + 3176 0226 2023 movs r3, #32 + 3177 0228 1E43 orrs r6, r3 + 3178 .LVL253: +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2): + 3179 .loc 1 2024 13 is_stmt 1 view .LVU948 + 3180 022a A1E7 b .L189 + 3181 .L184: +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3182 .loc 1 2027 13 view .LVU949 +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3183 .loc 1 2027 23 is_stmt 0 view .LVU950 + 3184 022c 4023 movs r3, #64 + 3185 022e 1E43 orrs r6, r3 + 3186 .LVL254: +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): + 3187 .loc 1 2028 13 is_stmt 1 view .LVU951 + 3188 0230 9EE7 b .L189 + 3189 .L190: +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3190 .loc 1 2031 13 view .LVU952 +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + ARM GAS /tmp/ccZqSNsg.s page 106 + + + 3191 .loc 1 2031 23 is_stmt 0 view .LVU953 + 3192 0232 8023 movs r3, #128 + 3193 0234 1E43 orrs r6, r3 + 3194 .LVL255: +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): + 3195 .loc 1 2032 13 is_stmt 1 view .LVU954 + 3196 0236 9BE7 b .L189 + 3197 .LVL256: + 3198 .L232: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3199 .loc 1 2054 5 view .LVU955 +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3200 .loc 1 2054 9 is_stmt 0 view .LVU956 + 3201 0238 6B6A ldr r3, [r5, #36] +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3202 .loc 1 2054 21 view .LVU957 + 3203 023a 3343 orrs r3, r6 + 3204 023c 6B62 str r3, [r5, #36] +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3205 .loc 1 2062 5 is_stmt 1 view .LVU958 + 3206 023e 2800 movs r0, r5 + 3207 0240 FFF7FEFF bl HAL_CAN_ErrorCallback + 3208 .LVL257: +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3209 .loc 1 2065 1 is_stmt 0 view .LVU959 + 3210 0244 9EE7 b .L160 + 3211 .cfi_endproc + 3212 .LFE59: + 3214 .section .text.HAL_CAN_GetState,"ax",%progbits + 3215 .align 1 + 3216 .global HAL_CAN_GetState + 3217 .syntax unified + 3218 .code 16 + 3219 .thumb_func + 3221 HAL_CAN_GetState: + 3222 .LVL258: + 3223 .LFB73: +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief CAN Peripheral State functions +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Peripheral State and Error functions ##### +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** This subsection provides functions allowing to : +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetState() : Return the CAN state. +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetError() : Return the CAN error codes if any. +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_ResetError(): Reset the CAN error codes if any. +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + ARM GAS /tmp/ccZqSNsg.s page 107 + + +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return the CAN state. +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL state +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan) +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3224 .loc 1 2345 1 is_stmt 1 view -0 + 3225 .cfi_startproc + 3226 @ args = 0, pretend = 0, frame = 0 + 3227 @ frame_needed = 0, uses_anonymous_args = 0 + 3228 @ link register save eliminated. + 3229 .loc 1 2345 1 is_stmt 0 view .LVU961 + 3230 0000 0200 movs r2, r0 +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 3231 .loc 1 2346 3 is_stmt 1 view .LVU962 + 3232 .loc 1 2346 24 is_stmt 0 view .LVU963 + 3233 0002 2023 movs r3, #32 + 3234 0004 C35C ldrb r3, [r0, r3] + 3235 0006 D8B2 uxtb r0, r3 + 3236 .LVL259: +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 3237 .loc 1 2348 3 is_stmt 1 view .LVU964 + 3238 .loc 1 2348 38 is_stmt 0 view .LVU965 + 3239 0008 013B subs r3, r3, #1 + 3240 000a DBB2 uxtb r3, r3 + 3241 .loc 1 2348 6 view .LVU966 + 3242 000c 012B cmp r3, #1 + 3243 000e 00D9 bls .L238 + 3244 .LVL260: + 3245 .L234: +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check sleep mode acknowledge flag */ +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Sleep mode is active */ +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_ACTIVE; +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check sleep mode request flag */ +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U) +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Sleep mode request is pending */ +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_PENDING; +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Neither sleep mode request nor sleep mode acknowledge */ +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3246 .loc 1 2366 5 is_stmt 1 view .LVU967 +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return CAN state */ + ARM GAS /tmp/ccZqSNsg.s page 108 + + +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return state; + 3247 .loc 1 2370 3 view .LVU968 +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3248 .loc 1 2371 1 is_stmt 0 view .LVU969 + 3249 @ sp needed + 3250 0010 7047 bx lr + 3251 .LVL261: + 3252 .L238: +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3253 .loc 1 2352 5 is_stmt 1 view .LVU970 +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3254 .loc 1 2352 14 is_stmt 0 view .LVU971 + 3255 0012 1268 ldr r2, [r2] + 3256 .LVL262: +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3257 .loc 1 2352 24 view .LVU972 + 3258 0014 5368 ldr r3, [r2, #4] +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3259 .loc 1 2352 8 view .LVU973 + 3260 0016 9B07 lsls r3, r3, #30 + 3261 0018 04D4 bmi .L235 +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3262 .loc 1 2358 10 is_stmt 1 view .LVU974 +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3263 .loc 1 2358 29 is_stmt 0 view .LVU975 + 3264 001a 1368 ldr r3, [r2] +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3265 .loc 1 2358 13 view .LVU976 + 3266 001c 9B07 lsls r3, r3, #30 + 3267 001e F7D5 bpl .L234 +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3268 .loc 1 2361 13 view .LVU977 + 3269 0020 0320 movs r0, #3 + 3270 .LVL263: +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3271 .loc 1 2361 13 view .LVU978 + 3272 0022 F5E7 b .L234 + 3273 .LVL264: + 3274 .L235: +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3275 .loc 1 2355 13 view .LVU979 + 3276 0024 0420 movs r0, #4 + 3277 .LVL265: +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3278 .loc 1 2355 13 view .LVU980 + 3279 0026 F3E7 b .L234 + 3280 .cfi_endproc + 3281 .LFE73: + 3283 .section .text.HAL_CAN_GetError,"ax",%progbits + 3284 .align 1 + 3285 .global HAL_CAN_GetError + 3286 .syntax unified + 3287 .code 16 + 3288 .thumb_func + 3290 HAL_CAN_GetError: + 3291 .LVL266: + 3292 .LFB74: + ARM GAS /tmp/ccZqSNsg.s page 109 + + +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return the CAN error code. +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval CAN Error Code +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan) +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3293 .loc 1 2380 1 is_stmt 1 view -0 + 3294 .cfi_startproc + 3295 @ args = 0, pretend = 0, frame = 0 + 3296 @ frame_needed = 0, uses_anonymous_args = 0 + 3297 @ link register save eliminated. +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return CAN error code */ +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return hcan->ErrorCode; + 3298 .loc 1 2382 3 view .LVU982 + 3299 .loc 1 2382 14 is_stmt 0 view .LVU983 + 3300 0000 406A ldr r0, [r0, #36] + 3301 .LVL267: +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3302 .loc 1 2383 1 view .LVU984 + 3303 @ sp needed + 3304 0002 7047 bx lr + 3305 .cfi_endproc + 3306 .LFE74: + 3308 .section .text.HAL_CAN_ResetError,"ax",%progbits + 3309 .align 1 + 3310 .global HAL_CAN_ResetError + 3311 .syntax unified + 3312 .code 16 + 3313 .thumb_func + 3315 HAL_CAN_ResetError: + 3316 .LVL268: + 3317 .LFB75: +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Reset the CAN error code. +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan) +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3318 .loc 1 2392 1 is_stmt 1 view -0 + 3319 .cfi_startproc + 3320 @ args = 0, pretend = 0, frame = 0 + 3321 @ frame_needed = 0, uses_anonymous_args = 0 + 3322 @ link register save eliminated. +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 3323 .loc 1 2393 3 view .LVU986 +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 3324 .loc 1 2394 3 view .LVU987 + 3325 .loc 1 2394 24 is_stmt 0 view .LVU988 + 3326 0000 2023 movs r3, #32 + 3327 0002 C35C ldrb r3, [r0, r3] + 3328 .LVL269: + ARM GAS /tmp/ccZqSNsg.s page 110 + + +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 3329 .loc 1 2396 3 is_stmt 1 view .LVU989 + 3330 .loc 1 2396 38 is_stmt 0 view .LVU990 + 3331 0004 013B subs r3, r3, #1 + 3332 .LVL270: + 3333 .loc 1 2396 38 view .LVU991 + 3334 0006 DBB2 uxtb r3, r3 + 3335 .LVL271: + 3336 .loc 1 2396 6 view .LVU992 + 3337 0008 012B cmp r3, #1 + 3338 000a 06D9 bls .L243 +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset CAN error code */ +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode = 0U; +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 3339 .loc 1 2405 5 is_stmt 1 view .LVU993 + 3340 .loc 1 2405 9 is_stmt 0 view .LVU994 + 3341 000c 426A ldr r2, [r0, #36] + 3342 .loc 1 2405 21 view .LVU995 + 3343 000e 8023 movs r3, #128 + 3344 0010 DB02 lsls r3, r3, #11 + 3345 0012 1343 orrs r3, r2 + 3346 0014 4362 str r3, [r0, #36] +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 3347 .loc 1 2407 5 is_stmt 1 view .LVU996 + 3348 .LVL272: + 3349 .loc 1 2407 12 is_stmt 0 view .LVU997 + 3350 0016 0120 movs r0, #1 + 3351 .LVL273: + 3352 .L242: +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return the status */ +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; + 3353 .loc 1 2411 3 is_stmt 1 view .LVU998 +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3354 .loc 1 2412 1 is_stmt 0 view .LVU999 + 3355 @ sp needed + 3356 0018 7047 bx lr + 3357 .LVL274: + 3358 .L243: +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3359 .loc 1 2400 5 is_stmt 1 view .LVU1000 +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3360 .loc 1 2400 21 is_stmt 0 view .LVU1001 + 3361 001a 0023 movs r3, #0 + 3362 001c 4362 str r3, [r0, #36] +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 3363 .loc 1 2393 21 view .LVU1002 + 3364 001e 0020 movs r0, #0 + ARM GAS /tmp/ccZqSNsg.s page 111 + + + 3365 .LVL275: +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 3366 .loc 1 2393 21 view .LVU1003 + 3367 0020 FAE7 b .L242 + 3368 .cfi_endproc + 3369 .LFE75: + 3371 .text + 3372 .Letext0: + 3373 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 3374 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 3375 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 3376 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 3377 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 3378 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h" + 3379 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccZqSNsg.s page 112 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_can.c + /tmp/ccZqSNsg.s:19 .text.HAL_CAN_MspInit:00000000 $t + /tmp/ccZqSNsg.s:25 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit + /tmp/ccZqSNsg.s:41 .text.HAL_CAN_Init:00000000 $t + /tmp/ccZqSNsg.s:47 .text.HAL_CAN_Init:00000000 HAL_CAN_Init + /tmp/ccZqSNsg.s:361 .text.HAL_CAN_MspDeInit:00000000 $t + /tmp/ccZqSNsg.s:367 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit + /tmp/ccZqSNsg.s:383 .text.HAL_CAN_ConfigFilter:00000000 $t + /tmp/ccZqSNsg.s:389 .text.HAL_CAN_ConfigFilter:00000000 HAL_CAN_ConfigFilter + /tmp/ccZqSNsg.s:655 .text.HAL_CAN_Start:00000000 $t + /tmp/ccZqSNsg.s:661 .text.HAL_CAN_Start:00000000 HAL_CAN_Start + /tmp/ccZqSNsg.s:772 .text.HAL_CAN_Stop:00000000 $t + /tmp/ccZqSNsg.s:778 .text.HAL_CAN_Stop:00000000 HAL_CAN_Stop + /tmp/ccZqSNsg.s:889 .text.HAL_CAN_DeInit:00000000 $t + /tmp/ccZqSNsg.s:895 .text.HAL_CAN_DeInit:00000000 HAL_CAN_DeInit + /tmp/ccZqSNsg.s:955 .text.HAL_CAN_RequestSleep:00000000 $t + /tmp/ccZqSNsg.s:961 .text.HAL_CAN_RequestSleep:00000000 HAL_CAN_RequestSleep + /tmp/ccZqSNsg.s:1018 .text.HAL_CAN_WakeUp:00000000 $t + /tmp/ccZqSNsg.s:1024 .text.HAL_CAN_WakeUp:00000000 HAL_CAN_WakeUp + /tmp/ccZqSNsg.s:1125 .text.HAL_CAN_WakeUp:00000054 $d + /tmp/ccZqSNsg.s:1130 .text.HAL_CAN_IsSleepActive:00000000 $t + /tmp/ccZqSNsg.s:1136 .text.HAL_CAN_IsSleepActive:00000000 HAL_CAN_IsSleepActive + /tmp/ccZqSNsg.s:1193 .text.HAL_CAN_AddTxMessage:00000000 $t + /tmp/ccZqSNsg.s:1199 .text.HAL_CAN_AddTxMessage:00000000 HAL_CAN_AddTxMessage + /tmp/ccZqSNsg.s:1436 .text.HAL_CAN_AbortTxRequest:00000000 $t + /tmp/ccZqSNsg.s:1442 .text.HAL_CAN_AbortTxRequest:00000000 HAL_CAN_AbortTxRequest + /tmp/ccZqSNsg.s:1534 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 $t + /tmp/ccZqSNsg.s:1540 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 HAL_CAN_GetTxMailboxesFreeLevel + /tmp/ccZqSNsg.s:1620 .text.HAL_CAN_IsTxMessagePending:00000000 $t + /tmp/ccZqSNsg.s:1626 .text.HAL_CAN_IsTxMessagePending:00000000 HAL_CAN_IsTxMessagePending + /tmp/ccZqSNsg.s:1690 .text.HAL_CAN_GetTxTimestamp:00000000 $t + /tmp/ccZqSNsg.s:1696 .text.HAL_CAN_GetTxTimestamp:00000000 HAL_CAN_GetTxTimestamp + /tmp/ccZqSNsg.s:1775 .text.HAL_CAN_GetRxMessage:00000000 $t + /tmp/ccZqSNsg.s:1781 .text.HAL_CAN_GetRxMessage:00000000 HAL_CAN_GetRxMessage + /tmp/ccZqSNsg.s:2136 .text.HAL_CAN_GetRxFifoFillLevel:00000000 $t + /tmp/ccZqSNsg.s:2142 .text.HAL_CAN_GetRxFifoFillLevel:00000000 HAL_CAN_GetRxFifoFillLevel + /tmp/ccZqSNsg.s:2213 .text.HAL_CAN_ActivateNotification:00000000 $t + /tmp/ccZqSNsg.s:2219 .text.HAL_CAN_ActivateNotification:00000000 HAL_CAN_ActivateNotification + /tmp/ccZqSNsg.s:2276 .text.HAL_CAN_DeactivateNotification:00000000 $t + /tmp/ccZqSNsg.s:2282 .text.HAL_CAN_DeactivateNotification:00000000 HAL_CAN_DeactivateNotification + /tmp/ccZqSNsg.s:2339 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 $t + /tmp/ccZqSNsg.s:2345 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 HAL_CAN_TxMailbox0CompleteCallback + /tmp/ccZqSNsg.s:2361 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 $t + /tmp/ccZqSNsg.s:2367 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 HAL_CAN_TxMailbox1CompleteCallback + /tmp/ccZqSNsg.s:2383 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 $t + /tmp/ccZqSNsg.s:2389 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 HAL_CAN_TxMailbox2CompleteCallback + /tmp/ccZqSNsg.s:2405 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 $t + /tmp/ccZqSNsg.s:2411 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 HAL_CAN_TxMailbox0AbortCallback + /tmp/ccZqSNsg.s:2427 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 $t + /tmp/ccZqSNsg.s:2433 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 HAL_CAN_TxMailbox1AbortCallback + /tmp/ccZqSNsg.s:2449 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 $t + /tmp/ccZqSNsg.s:2455 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 HAL_CAN_TxMailbox2AbortCallback + /tmp/ccZqSNsg.s:2471 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 $t + /tmp/ccZqSNsg.s:2477 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 HAL_CAN_RxFifo0MsgPendingCallback + /tmp/ccZqSNsg.s:2493 .text.HAL_CAN_RxFifo0FullCallback:00000000 $t + /tmp/ccZqSNsg.s:2499 .text.HAL_CAN_RxFifo0FullCallback:00000000 HAL_CAN_RxFifo0FullCallback + ARM GAS /tmp/ccZqSNsg.s page 113 + + + /tmp/ccZqSNsg.s:2515 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 $t + /tmp/ccZqSNsg.s:2521 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 HAL_CAN_RxFifo1MsgPendingCallback + /tmp/ccZqSNsg.s:2537 .text.HAL_CAN_RxFifo1FullCallback:00000000 $t + /tmp/ccZqSNsg.s:2543 .text.HAL_CAN_RxFifo1FullCallback:00000000 HAL_CAN_RxFifo1FullCallback + /tmp/ccZqSNsg.s:2559 .text.HAL_CAN_SleepCallback:00000000 $t + /tmp/ccZqSNsg.s:2565 .text.HAL_CAN_SleepCallback:00000000 HAL_CAN_SleepCallback + /tmp/ccZqSNsg.s:2581 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 $t + /tmp/ccZqSNsg.s:2587 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 HAL_CAN_WakeUpFromRxMsgCallback + /tmp/ccZqSNsg.s:2603 .text.HAL_CAN_ErrorCallback:00000000 $t + /tmp/ccZqSNsg.s:2609 .text.HAL_CAN_ErrorCallback:00000000 HAL_CAN_ErrorCallback + /tmp/ccZqSNsg.s:2625 .text.HAL_CAN_IRQHandler:00000000 $t + /tmp/ccZqSNsg.s:2631 .text.HAL_CAN_IRQHandler:00000000 HAL_CAN_IRQHandler + /tmp/ccZqSNsg.s:3215 .text.HAL_CAN_GetState:00000000 $t + /tmp/ccZqSNsg.s:3221 .text.HAL_CAN_GetState:00000000 HAL_CAN_GetState + /tmp/ccZqSNsg.s:3284 .text.HAL_CAN_GetError:00000000 $t + /tmp/ccZqSNsg.s:3290 .text.HAL_CAN_GetError:00000000 HAL_CAN_GetError + /tmp/ccZqSNsg.s:3309 .text.HAL_CAN_ResetError:00000000 $t + /tmp/ccZqSNsg.s:3315 .text.HAL_CAN_ResetError:00000000 HAL_CAN_ResetError + +UNDEFINED SYMBOLS +HAL_GetTick diff --git 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40:Drivers/CMSIS/Include/core_cm0.h **** /** + 41:Drivers/CMSIS/Include/core_cm0.h **** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + 42:Drivers/CMSIS/Include/core_cm0.h **** CMSIS violates the following MISRA-C:2004 rules: + 43:Drivers/CMSIS/Include/core_cm0.h **** + 44:Drivers/CMSIS/Include/core_cm0.h **** \li Required Rule 8.5, object/function definition in header file.
+ 45:Drivers/CMSIS/Include/core_cm0.h **** Function definitions in header files are used to allow 'inlining'. + 46:Drivers/CMSIS/Include/core_cm0.h **** + 47:Drivers/CMSIS/Include/core_cm0.h **** \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ 48:Drivers/CMSIS/Include/core_cm0.h **** Unions are used for effective representation of core registers. + 49:Drivers/CMSIS/Include/core_cm0.h **** + 50:Drivers/CMSIS/Include/core_cm0.h **** \li Advisory Rule 19.7, Function-like macro defined.
+ 51:Drivers/CMSIS/Include/core_cm0.h **** Function-like macros are used to allow more efficient code. + 52:Drivers/CMSIS/Include/core_cm0.h **** */ + 53:Drivers/CMSIS/Include/core_cm0.h **** + 54:Drivers/CMSIS/Include/core_cm0.h **** + 55:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 56:Drivers/CMSIS/Include/core_cm0.h **** * CMSIS definitions + 57:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 58:Drivers/CMSIS/Include/core_cm0.h **** /** + 59:Drivers/CMSIS/Include/core_cm0.h **** \ingroup Cortex_M0 + 60:Drivers/CMSIS/Include/core_cm0.h **** @{ + 61:Drivers/CMSIS/Include/core_cm0.h **** */ + 62:Drivers/CMSIS/Include/core_cm0.h **** + 63:Drivers/CMSIS/Include/core_cm0.h **** #include "cmsis_version.h" + 64:Drivers/CMSIS/Include/core_cm0.h **** + 65:Drivers/CMSIS/Include/core_cm0.h **** /* CMSIS CM0 definitions */ + 66:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] C + 67:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] C + 68:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ + 69:Drivers/CMSIS/Include/core_cm0.h **** __CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL + 70:Drivers/CMSIS/Include/core_cm0.h **** + 71:Drivers/CMSIS/Include/core_cm0.h **** #define __CORTEX_M (0U) /*!< Cortex-M Core */ + 72:Drivers/CMSIS/Include/core_cm0.h **** + 73:Drivers/CMSIS/Include/core_cm0.h **** /** __FPU_USED indicates whether an FPU is used or not. + 74:Drivers/CMSIS/Include/core_cm0.h **** This core does not support an FPU at all + 75:Drivers/CMSIS/Include/core_cm0.h **** */ + 76:Drivers/CMSIS/Include/core_cm0.h **** #define __FPU_USED 0U + 77:Drivers/CMSIS/Include/core_cm0.h **** + 78:Drivers/CMSIS/Include/core_cm0.h **** #if defined ( __CC_ARM ) + 79:Drivers/CMSIS/Include/core_cm0.h **** #if defined __TARGET_FPU_VFP + 80:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 81:Drivers/CMSIS/Include/core_cm0.h **** #endif + 82:Drivers/CMSIS/Include/core_cm0.h **** + 83:Drivers/CMSIS/Include/core_cm0.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + 84:Drivers/CMSIS/Include/core_cm0.h **** #if defined __ARM_PCS_VFP + 85:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 86:Drivers/CMSIS/Include/core_cm0.h **** #endif + 87:Drivers/CMSIS/Include/core_cm0.h **** + 88:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __GNUC__ ) + ARM GAS /tmp/ccU3iDhL.s page 3 + + + 89:Drivers/CMSIS/Include/core_cm0.h **** #if defined (__VFP_FP__) && !defined(__SOFTFP__) + 90:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 91:Drivers/CMSIS/Include/core_cm0.h **** #endif + 92:Drivers/CMSIS/Include/core_cm0.h **** + 93:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __ICCARM__ ) + 94:Drivers/CMSIS/Include/core_cm0.h **** #if defined __ARMVFP__ + 95:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 96:Drivers/CMSIS/Include/core_cm0.h **** #endif + 97:Drivers/CMSIS/Include/core_cm0.h **** + 98:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __TI_ARM__ ) + 99:Drivers/CMSIS/Include/core_cm0.h **** #if defined __TI_VFP_SUPPORT__ + 100:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 101:Drivers/CMSIS/Include/core_cm0.h **** #endif + 102:Drivers/CMSIS/Include/core_cm0.h **** + 103:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __TASKING__ ) + 104:Drivers/CMSIS/Include/core_cm0.h **** #if defined __FPU_VFP__ + 105:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 106:Drivers/CMSIS/Include/core_cm0.h **** #endif + 107:Drivers/CMSIS/Include/core_cm0.h **** + 108:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __CSMC__ ) + 109:Drivers/CMSIS/Include/core_cm0.h **** #if ( __CSMC__ & 0x400U) + 110:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 111:Drivers/CMSIS/Include/core_cm0.h **** #endif + 112:Drivers/CMSIS/Include/core_cm0.h **** + 113:Drivers/CMSIS/Include/core_cm0.h **** #endif + 114:Drivers/CMSIS/Include/core_cm0.h **** + 115:Drivers/CMSIS/Include/core_cm0.h **** #include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + 116:Drivers/CMSIS/Include/core_cm0.h **** + 117:Drivers/CMSIS/Include/core_cm0.h **** + 118:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 119:Drivers/CMSIS/Include/core_cm0.h **** } + 120:Drivers/CMSIS/Include/core_cm0.h **** #endif + 121:Drivers/CMSIS/Include/core_cm0.h **** + 122:Drivers/CMSIS/Include/core_cm0.h **** #endif /* __CORE_CM0_H_GENERIC */ + 123:Drivers/CMSIS/Include/core_cm0.h **** + 124:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CMSIS_GENERIC + 125:Drivers/CMSIS/Include/core_cm0.h **** + 126:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CORE_CM0_H_DEPENDANT + 127:Drivers/CMSIS/Include/core_cm0.h **** #define __CORE_CM0_H_DEPENDANT + 128:Drivers/CMSIS/Include/core_cm0.h **** + 129:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 130:Drivers/CMSIS/Include/core_cm0.h **** extern "C" { + 131:Drivers/CMSIS/Include/core_cm0.h **** #endif + 132:Drivers/CMSIS/Include/core_cm0.h **** + 133:Drivers/CMSIS/Include/core_cm0.h **** /* check device defines and use defaults */ + 134:Drivers/CMSIS/Include/core_cm0.h **** #if defined __CHECK_DEVICE_DEFINES + 135:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CM0_REV + 136:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_REV 0x0000U + 137:Drivers/CMSIS/Include/core_cm0.h **** #warning "__CM0_REV not defined in device header file; using default!" + 138:Drivers/CMSIS/Include/core_cm0.h **** #endif + 139:Drivers/CMSIS/Include/core_cm0.h **** + 140:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __NVIC_PRIO_BITS + 141:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_PRIO_BITS 2U + 142:Drivers/CMSIS/Include/core_cm0.h **** #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + 143:Drivers/CMSIS/Include/core_cm0.h **** #endif + 144:Drivers/CMSIS/Include/core_cm0.h **** + 145:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __Vendor_SysTickConfig + ARM GAS /tmp/ccU3iDhL.s page 4 + + + 146:Drivers/CMSIS/Include/core_cm0.h **** #define __Vendor_SysTickConfig 0U + 147:Drivers/CMSIS/Include/core_cm0.h **** #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + 148:Drivers/CMSIS/Include/core_cm0.h **** #endif + 149:Drivers/CMSIS/Include/core_cm0.h **** #endif + 150:Drivers/CMSIS/Include/core_cm0.h **** + 151:Drivers/CMSIS/Include/core_cm0.h **** /* IO definitions (access restrictions to peripheral registers) */ + 152:Drivers/CMSIS/Include/core_cm0.h **** /** + 153:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_glob_defs CMSIS Global Defines + 154:Drivers/CMSIS/Include/core_cm0.h **** + 155:Drivers/CMSIS/Include/core_cm0.h **** IO Type Qualifiers are used + 156:Drivers/CMSIS/Include/core_cm0.h **** \li to specify the access to peripheral variables. + 157:Drivers/CMSIS/Include/core_cm0.h **** \li for automatic generation of peripheral register debug information. + 158:Drivers/CMSIS/Include/core_cm0.h **** */ + 159:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 160:Drivers/CMSIS/Include/core_cm0.h **** #define __I volatile /*!< Defines 'read only' permissions */ + 161:Drivers/CMSIS/Include/core_cm0.h **** #else + 162:Drivers/CMSIS/Include/core_cm0.h **** #define __I volatile const /*!< Defines 'read only' permissions */ + 163:Drivers/CMSIS/Include/core_cm0.h **** #endif + 164:Drivers/CMSIS/Include/core_cm0.h **** #define __O volatile /*!< Defines 'write only' permissions */ + 165:Drivers/CMSIS/Include/core_cm0.h **** #define __IO volatile /*!< Defines 'read / write' permissions */ + 166:Drivers/CMSIS/Include/core_cm0.h **** + 167:Drivers/CMSIS/Include/core_cm0.h **** /* following defines should be used for structure members */ + 168:Drivers/CMSIS/Include/core_cm0.h **** #define __IM volatile const /*! Defines 'read only' structure member permissions */ + 169:Drivers/CMSIS/Include/core_cm0.h **** #define __OM volatile /*! Defines 'write only' structure member permissions */ + 170:Drivers/CMSIS/Include/core_cm0.h **** #define __IOM volatile /*! Defines 'read / write' structure member permissions */ + 171:Drivers/CMSIS/Include/core_cm0.h **** + 172:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group Cortex_M0 */ + 173:Drivers/CMSIS/Include/core_cm0.h **** + 174:Drivers/CMSIS/Include/core_cm0.h **** + 175:Drivers/CMSIS/Include/core_cm0.h **** + 176:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 177:Drivers/CMSIS/Include/core_cm0.h **** * Register Abstraction + 178:Drivers/CMSIS/Include/core_cm0.h **** Core Register contain: + 179:Drivers/CMSIS/Include/core_cm0.h **** - Core Register + 180:Drivers/CMSIS/Include/core_cm0.h **** - Core NVIC Register + 181:Drivers/CMSIS/Include/core_cm0.h **** - Core SCB Register + 182:Drivers/CMSIS/Include/core_cm0.h **** - Core SysTick Register + 183:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 184:Drivers/CMSIS/Include/core_cm0.h **** /** + 185:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_register Defines and Type Definitions + 186:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions and defines for Cortex-M processor based devices. + 187:Drivers/CMSIS/Include/core_cm0.h **** */ + 188:Drivers/CMSIS/Include/core_cm0.h **** + 189:Drivers/CMSIS/Include/core_cm0.h **** /** + 190:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 191:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_CORE Status and Control Registers + 192:Drivers/CMSIS/Include/core_cm0.h **** \brief Core Register type definitions. + 193:Drivers/CMSIS/Include/core_cm0.h **** @{ + 194:Drivers/CMSIS/Include/core_cm0.h **** */ + 195:Drivers/CMSIS/Include/core_cm0.h **** + 196:Drivers/CMSIS/Include/core_cm0.h **** /** + 197:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Application Program Status Register (APSR). + 198:Drivers/CMSIS/Include/core_cm0.h **** */ + 199:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 200:Drivers/CMSIS/Include/core_cm0.h **** { + 201:Drivers/CMSIS/Include/core_cm0.h **** struct + 202:Drivers/CMSIS/Include/core_cm0.h **** { + ARM GAS /tmp/ccU3iDhL.s page 5 + + + 203:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + 204:Drivers/CMSIS/Include/core_cm0.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 205:Drivers/CMSIS/Include/core_cm0.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 206:Drivers/CMSIS/Include/core_cm0.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 207:Drivers/CMSIS/Include/core_cm0.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 208:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 209:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 210:Drivers/CMSIS/Include/core_cm0.h **** } APSR_Type; + 211:Drivers/CMSIS/Include/core_cm0.h **** + 212:Drivers/CMSIS/Include/core_cm0.h **** /* APSR Register Definitions */ + 213:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_N_Pos 31U /*!< APSR + 214:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR + 215:Drivers/CMSIS/Include/core_cm0.h **** + 216:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_Z_Pos 30U /*!< APSR + 217:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR + 218:Drivers/CMSIS/Include/core_cm0.h **** + 219:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_C_Pos 29U /*!< APSR + 220:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR + 221:Drivers/CMSIS/Include/core_cm0.h **** + 222:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_V_Pos 28U /*!< APSR + 223:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR + 224:Drivers/CMSIS/Include/core_cm0.h **** + 225:Drivers/CMSIS/Include/core_cm0.h **** + 226:Drivers/CMSIS/Include/core_cm0.h **** /** + 227:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Interrupt Program Status Register (IPSR). + 228:Drivers/CMSIS/Include/core_cm0.h **** */ + 229:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 230:Drivers/CMSIS/Include/core_cm0.h **** { + 231:Drivers/CMSIS/Include/core_cm0.h **** struct + 232:Drivers/CMSIS/Include/core_cm0.h **** { + 233:Drivers/CMSIS/Include/core_cm0.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 234:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + 235:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 236:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 237:Drivers/CMSIS/Include/core_cm0.h **** } IPSR_Type; + 238:Drivers/CMSIS/Include/core_cm0.h **** + 239:Drivers/CMSIS/Include/core_cm0.h **** /* IPSR Register Definitions */ + 240:Drivers/CMSIS/Include/core_cm0.h **** #define IPSR_ISR_Pos 0U /*!< IPSR + 241:Drivers/CMSIS/Include/core_cm0.h **** #define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR + 242:Drivers/CMSIS/Include/core_cm0.h **** + 243:Drivers/CMSIS/Include/core_cm0.h **** + 244:Drivers/CMSIS/Include/core_cm0.h **** /** + 245:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + 246:Drivers/CMSIS/Include/core_cm0.h **** */ + 247:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 248:Drivers/CMSIS/Include/core_cm0.h **** { + 249:Drivers/CMSIS/Include/core_cm0.h **** struct + 250:Drivers/CMSIS/Include/core_cm0.h **** { + 251:Drivers/CMSIS/Include/core_cm0.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 252:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + 253:Drivers/CMSIS/Include/core_cm0.h **** uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + 254:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + 255:Drivers/CMSIS/Include/core_cm0.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 256:Drivers/CMSIS/Include/core_cm0.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 257:Drivers/CMSIS/Include/core_cm0.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 258:Drivers/CMSIS/Include/core_cm0.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 259:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + ARM GAS /tmp/ccU3iDhL.s page 6 + + + 260:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 261:Drivers/CMSIS/Include/core_cm0.h **** } xPSR_Type; + 262:Drivers/CMSIS/Include/core_cm0.h **** + 263:Drivers/CMSIS/Include/core_cm0.h **** /* xPSR Register Definitions */ + 264:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_N_Pos 31U /*!< xPSR + 265:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR + 266:Drivers/CMSIS/Include/core_cm0.h **** + 267:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_Z_Pos 30U /*!< xPSR + 268:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR + 269:Drivers/CMSIS/Include/core_cm0.h **** + 270:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_C_Pos 29U /*!< xPSR + 271:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR + 272:Drivers/CMSIS/Include/core_cm0.h **** + 273:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_V_Pos 28U /*!< xPSR + 274:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR + 275:Drivers/CMSIS/Include/core_cm0.h **** + 276:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_T_Pos 24U /*!< xPSR + 277:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR + 278:Drivers/CMSIS/Include/core_cm0.h **** + 279:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_ISR_Pos 0U /*!< xPSR + 280:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR + 281:Drivers/CMSIS/Include/core_cm0.h **** + 282:Drivers/CMSIS/Include/core_cm0.h **** + 283:Drivers/CMSIS/Include/core_cm0.h **** /** + 284:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Control Registers (CONTROL). + 285:Drivers/CMSIS/Include/core_cm0.h **** */ + 286:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 287:Drivers/CMSIS/Include/core_cm0.h **** { + 288:Drivers/CMSIS/Include/core_cm0.h **** struct + 289:Drivers/CMSIS/Include/core_cm0.h **** { + 290:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + 291:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + 292:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + 293:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 294:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 295:Drivers/CMSIS/Include/core_cm0.h **** } CONTROL_Type; + 296:Drivers/CMSIS/Include/core_cm0.h **** + 297:Drivers/CMSIS/Include/core_cm0.h **** /* CONTROL Register Definitions */ + 298:Drivers/CMSIS/Include/core_cm0.h **** #define CONTROL_SPSEL_Pos 1U /*!< CONT + 299:Drivers/CMSIS/Include/core_cm0.h **** #define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONT + 300:Drivers/CMSIS/Include/core_cm0.h **** + 301:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_CORE */ + 302:Drivers/CMSIS/Include/core_cm0.h **** + 303:Drivers/CMSIS/Include/core_cm0.h **** + 304:Drivers/CMSIS/Include/core_cm0.h **** /** + 305:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 306:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + 307:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the NVIC Registers + 308:Drivers/CMSIS/Include/core_cm0.h **** @{ + 309:Drivers/CMSIS/Include/core_cm0.h **** */ + 310:Drivers/CMSIS/Include/core_cm0.h **** + 311:Drivers/CMSIS/Include/core_cm0.h **** /** + 312:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + 313:Drivers/CMSIS/Include/core_cm0.h **** */ + 314:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 315:Drivers/CMSIS/Include/core_cm0.h **** { + 316:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + ARM GAS /tmp/ccU3iDhL.s page 7 + + + 317:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED0[31U]; + 318:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register + 319:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RSERVED1[31U]; + 320:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * + 321:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED2[31U]; + 322:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register + 323:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED3[31U]; + 324:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED4[64U]; + 325:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ + 326:Drivers/CMSIS/Include/core_cm0.h **** } NVIC_Type; + 327:Drivers/CMSIS/Include/core_cm0.h **** + 328:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_NVIC */ + 329:Drivers/CMSIS/Include/core_cm0.h **** + 330:Drivers/CMSIS/Include/core_cm0.h **** + 331:Drivers/CMSIS/Include/core_cm0.h **** /** + 332:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 333:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_SCB System Control Block (SCB) + 334:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the System Control Block Registers + 335:Drivers/CMSIS/Include/core_cm0.h **** @{ + 336:Drivers/CMSIS/Include/core_cm0.h **** */ + 337:Drivers/CMSIS/Include/core_cm0.h **** + 338:Drivers/CMSIS/Include/core_cm0.h **** /** + 339:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the System Control Block (SCB). + 340:Drivers/CMSIS/Include/core_cm0.h **** */ + 341:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 342:Drivers/CMSIS/Include/core_cm0.h **** { + 343:Drivers/CMSIS/Include/core_cm0.h **** __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + 344:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regi + 345:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED0; + 346:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset + 347:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + 348:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register * + 349:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED1; + 350:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registe + 351:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State + 352:Drivers/CMSIS/Include/core_cm0.h **** } SCB_Type; + 353:Drivers/CMSIS/Include/core_cm0.h **** + 354:Drivers/CMSIS/Include/core_cm0.h **** /* SCB CPUID Register Definitions */ + 355:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB + 356:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB + 357:Drivers/CMSIS/Include/core_cm0.h **** + 358:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_VARIANT_Pos 20U /*!< SCB + 359:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB + 360:Drivers/CMSIS/Include/core_cm0.h **** + 361:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB + 362:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB + 363:Drivers/CMSIS/Include/core_cm0.h **** + 364:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_PARTNO_Pos 4U /*!< SCB + 365:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB + 366:Drivers/CMSIS/Include/core_cm0.h **** + 367:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_REVISION_Pos 0U /*!< SCB + 368:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB + 369:Drivers/CMSIS/Include/core_cm0.h **** + 370:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Interrupt Control State Register Definitions */ + 371:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB + 372:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB + 373:Drivers/CMSIS/Include/core_cm0.h **** + ARM GAS /tmp/ccU3iDhL.s page 8 + + + 374:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB + 375:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB + 376:Drivers/CMSIS/Include/core_cm0.h **** + 377:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB + 378:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB + 379:Drivers/CMSIS/Include/core_cm0.h **** + 380:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB + 381:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB + 382:Drivers/CMSIS/Include/core_cm0.h **** + 383:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB + 384:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB + 385:Drivers/CMSIS/Include/core_cm0.h **** + 386:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB + 387:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB + 388:Drivers/CMSIS/Include/core_cm0.h **** + 389:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB + 390:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB + 391:Drivers/CMSIS/Include/core_cm0.h **** + 392:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB + 393:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB + 394:Drivers/CMSIS/Include/core_cm0.h **** + 395:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB + 396:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB + 397:Drivers/CMSIS/Include/core_cm0.h **** + 398:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Application Interrupt and Reset Control Register Definitions */ + 399:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB + 400:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB + 401:Drivers/CMSIS/Include/core_cm0.h **** + 402:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB + 403:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB + 404:Drivers/CMSIS/Include/core_cm0.h **** + 405:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB + 406:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB + 407:Drivers/CMSIS/Include/core_cm0.h **** + 408:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB + 409:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB + 410:Drivers/CMSIS/Include/core_cm0.h **** + 411:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB + 412:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB + 413:Drivers/CMSIS/Include/core_cm0.h **** + 414:Drivers/CMSIS/Include/core_cm0.h **** /* SCB System Control Register Definitions */ + 415:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB + 416:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB + 417:Drivers/CMSIS/Include/core_cm0.h **** + 418:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB + 419:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB + 420:Drivers/CMSIS/Include/core_cm0.h **** + 421:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB + 422:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB + 423:Drivers/CMSIS/Include/core_cm0.h **** + 424:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Configuration Control Register Definitions */ + 425:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_STKALIGN_Pos 9U /*!< SCB + 426:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB + 427:Drivers/CMSIS/Include/core_cm0.h **** + 428:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB + 429:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB + 430:Drivers/CMSIS/Include/core_cm0.h **** + ARM GAS /tmp/ccU3iDhL.s page 9 + + + 431:Drivers/CMSIS/Include/core_cm0.h **** /* SCB System Handler Control and State Register Definitions */ + 432:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB + 433:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB + 434:Drivers/CMSIS/Include/core_cm0.h **** + 435:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_SCB */ + 436:Drivers/CMSIS/Include/core_cm0.h **** + 437:Drivers/CMSIS/Include/core_cm0.h **** + 438:Drivers/CMSIS/Include/core_cm0.h **** /** + 439:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 440:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_SysTick System Tick Timer (SysTick) + 441:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the System Timer Registers. + 442:Drivers/CMSIS/Include/core_cm0.h **** @{ + 443:Drivers/CMSIS/Include/core_cm0.h **** */ + 444:Drivers/CMSIS/Include/core_cm0.h **** + 445:Drivers/CMSIS/Include/core_cm0.h **** /** + 446:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the System Timer (SysTick). + 447:Drivers/CMSIS/Include/core_cm0.h **** */ + 448:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 449:Drivers/CMSIS/Include/core_cm0.h **** { + 450:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regis + 451:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + 452:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register * + 453:Drivers/CMSIS/Include/core_cm0.h **** __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ + 454:Drivers/CMSIS/Include/core_cm0.h **** } SysTick_Type; + 455:Drivers/CMSIS/Include/core_cm0.h **** + 456:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Control / Status Register Definitions */ + 457:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysT + 458:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysT + 459:Drivers/CMSIS/Include/core_cm0.h **** + 460:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysT + 461:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysT + 462:Drivers/CMSIS/Include/core_cm0.h **** + 463:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_TICKINT_Pos 1U /*!< SysT + 464:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysT + 465:Drivers/CMSIS/Include/core_cm0.h **** + 466:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_ENABLE_Pos 0U /*!< SysT + 467:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysT + 468:Drivers/CMSIS/Include/core_cm0.h **** + 469:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Reload Register Definitions */ + 470:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_LOAD_RELOAD_Pos 0U /*!< SysT + 471:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysT + 472:Drivers/CMSIS/Include/core_cm0.h **** + 473:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Current Register Definitions */ + 474:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_VAL_CURRENT_Pos 0U /*!< SysT + 475:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysT + 476:Drivers/CMSIS/Include/core_cm0.h **** + 477:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Calibration Register Definitions */ + 478:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_NOREF_Pos 31U /*!< SysT + 479:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysT + 480:Drivers/CMSIS/Include/core_cm0.h **** + 481:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_SKEW_Pos 30U /*!< SysT + 482:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysT + 483:Drivers/CMSIS/Include/core_cm0.h **** + 484:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT + 485:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT + 486:Drivers/CMSIS/Include/core_cm0.h **** + 487:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_SysTick */ + ARM GAS /tmp/ccU3iDhL.s page 10 + + + 488:Drivers/CMSIS/Include/core_cm0.h **** + 489:Drivers/CMSIS/Include/core_cm0.h **** + 490:Drivers/CMSIS/Include/core_cm0.h **** /** + 491:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 492:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + 493:Drivers/CMSIS/Include/core_cm0.h **** \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible ove + 494:Drivers/CMSIS/Include/core_cm0.h **** Therefore they are not covered by the Cortex-M0 header file. + 495:Drivers/CMSIS/Include/core_cm0.h **** @{ + 496:Drivers/CMSIS/Include/core_cm0.h **** */ + 497:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_CoreDebug */ + 498:Drivers/CMSIS/Include/core_cm0.h **** + 499:Drivers/CMSIS/Include/core_cm0.h **** + 500:Drivers/CMSIS/Include/core_cm0.h **** /** + 501:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 502:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_bitfield Core register bit field macros + 503:Drivers/CMSIS/Include/core_cm0.h **** \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + 504:Drivers/CMSIS/Include/core_cm0.h **** @{ + 505:Drivers/CMSIS/Include/core_cm0.h **** */ + 506:Drivers/CMSIS/Include/core_cm0.h **** + 507:Drivers/CMSIS/Include/core_cm0.h **** /** + 508:Drivers/CMSIS/Include/core_cm0.h **** \brief Mask and shift a bit field value for use in a register bit range. + 509:Drivers/CMSIS/Include/core_cm0.h **** \param[in] field Name of the register bit field. + 510:Drivers/CMSIS/Include/core_cm0.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + 511:Drivers/CMSIS/Include/core_cm0.h **** \return Masked and shifted value. + 512:Drivers/CMSIS/Include/core_cm0.h **** */ + 513:Drivers/CMSIS/Include/core_cm0.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + 514:Drivers/CMSIS/Include/core_cm0.h **** + 515:Drivers/CMSIS/Include/core_cm0.h **** /** + 516:Drivers/CMSIS/Include/core_cm0.h **** \brief Mask and shift a register value to extract a bit filed value. + 517:Drivers/CMSIS/Include/core_cm0.h **** \param[in] field Name of the register bit field. + 518:Drivers/CMSIS/Include/core_cm0.h **** \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + 519:Drivers/CMSIS/Include/core_cm0.h **** \return Masked and shifted bit field value. + 520:Drivers/CMSIS/Include/core_cm0.h **** */ + 521:Drivers/CMSIS/Include/core_cm0.h **** #define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + 522:Drivers/CMSIS/Include/core_cm0.h **** + 523:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_core_bitfield */ + 524:Drivers/CMSIS/Include/core_cm0.h **** + 525:Drivers/CMSIS/Include/core_cm0.h **** + 526:Drivers/CMSIS/Include/core_cm0.h **** /** + 527:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 528:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_base Core Definitions + 529:Drivers/CMSIS/Include/core_cm0.h **** \brief Definitions for base addresses, unions, and structures. + 530:Drivers/CMSIS/Include/core_cm0.h **** @{ + 531:Drivers/CMSIS/Include/core_cm0.h **** */ + 532:Drivers/CMSIS/Include/core_cm0.h **** + 533:Drivers/CMSIS/Include/core_cm0.h **** /* Memory mapping of Core Hardware */ + 534:Drivers/CMSIS/Include/core_cm0.h **** #define SCS_BASE (0xE000E000UL) /*!< System Control Space Bas + 535:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + 536:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + 537:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Bas + 538:Drivers/CMSIS/Include/core_cm0.h **** + 539:Drivers/CMSIS/Include/core_cm0.h **** #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct + 540:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration st + 541:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc + 542:Drivers/CMSIS/Include/core_cm0.h **** + 543:Drivers/CMSIS/Include/core_cm0.h **** + 544:Drivers/CMSIS/Include/core_cm0.h **** /*@} */ + ARM GAS /tmp/ccU3iDhL.s page 11 + + + 545:Drivers/CMSIS/Include/core_cm0.h **** + 546:Drivers/CMSIS/Include/core_cm0.h **** + 547:Drivers/CMSIS/Include/core_cm0.h **** + 548:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 549:Drivers/CMSIS/Include/core_cm0.h **** * Hardware Abstraction Layer + 550:Drivers/CMSIS/Include/core_cm0.h **** Core Function Interface contains: + 551:Drivers/CMSIS/Include/core_cm0.h **** - Core NVIC Functions + 552:Drivers/CMSIS/Include/core_cm0.h **** - Core SysTick Functions + 553:Drivers/CMSIS/Include/core_cm0.h **** - Core Register Access Functions + 554:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 555:Drivers/CMSIS/Include/core_cm0.h **** /** + 556:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference + 557:Drivers/CMSIS/Include/core_cm0.h **** */ + 558:Drivers/CMSIS/Include/core_cm0.h **** + 559:Drivers/CMSIS/Include/core_cm0.h **** + 560:Drivers/CMSIS/Include/core_cm0.h **** + 561:Drivers/CMSIS/Include/core_cm0.h **** /* ########################## NVIC functions #################################### */ + 562:Drivers/CMSIS/Include/core_cm0.h **** /** + 563:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 564:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_NVICFunctions NVIC Functions + 565:Drivers/CMSIS/Include/core_cm0.h **** \brief Functions that manage interrupts and exceptions via the NVIC. + 566:Drivers/CMSIS/Include/core_cm0.h **** @{ + 567:Drivers/CMSIS/Include/core_cm0.h **** */ + 568:Drivers/CMSIS/Include/core_cm0.h **** + 569:Drivers/CMSIS/Include/core_cm0.h **** #ifdef CMSIS_NVIC_VIRTUAL + 570:Drivers/CMSIS/Include/core_cm0.h **** #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + 571:Drivers/CMSIS/Include/core_cm0.h **** #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + 572:Drivers/CMSIS/Include/core_cm0.h **** #endif + 573:Drivers/CMSIS/Include/core_cm0.h **** #include CMSIS_NVIC_VIRTUAL_HEADER_FILE + 574:Drivers/CMSIS/Include/core_cm0.h **** #else + 575:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + 576:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + 577:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_EnableIRQ __NVIC_EnableIRQ + 578:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + 579:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_DisableIRQ __NVIC_DisableIRQ + 580:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + 581:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + 582:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + 583:Drivers/CMSIS/Include/core_cm0.h **** /*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */ + 584:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPriority __NVIC_SetPriority + 585:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPriority __NVIC_GetPriority + 586:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SystemReset __NVIC_SystemReset + 587:Drivers/CMSIS/Include/core_cm0.h **** #endif /* CMSIS_NVIC_VIRTUAL */ + 588:Drivers/CMSIS/Include/core_cm0.h **** + 589:Drivers/CMSIS/Include/core_cm0.h **** #ifdef CMSIS_VECTAB_VIRTUAL + 590:Drivers/CMSIS/Include/core_cm0.h **** #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + 591:Drivers/CMSIS/Include/core_cm0.h **** #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + 592:Drivers/CMSIS/Include/core_cm0.h **** #endif + 593:Drivers/CMSIS/Include/core_cm0.h **** #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE + 594:Drivers/CMSIS/Include/core_cm0.h **** #else + 595:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetVector __NVIC_SetVector + 596:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetVector __NVIC_GetVector + 597:Drivers/CMSIS/Include/core_cm0.h **** #endif /* (CMSIS_VECTAB_VIRTUAL) */ + 598:Drivers/CMSIS/Include/core_cm0.h **** + 599:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_USER_IRQ_OFFSET 16 + 600:Drivers/CMSIS/Include/core_cm0.h **** + 601:Drivers/CMSIS/Include/core_cm0.h **** + ARM GAS /tmp/ccU3iDhL.s page 12 + + + 602:Drivers/CMSIS/Include/core_cm0.h **** /* The following EXC_RETURN values are saved the LR on exception entry */ + 603:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after ret + 604:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after retu + 605:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after retu + 606:Drivers/CMSIS/Include/core_cm0.h **** + 607:Drivers/CMSIS/Include/core_cm0.h **** + 608:Drivers/CMSIS/Include/core_cm0.h **** /* Interrupt Priorities are WORD accessible only under Armv6-M */ + 609:Drivers/CMSIS/Include/core_cm0.h **** /* The following MACROS handle generation of the register offset and byte masks */ + 610:Drivers/CMSIS/Include/core_cm0.h **** #define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) + 611:Drivers/CMSIS/Include/core_cm0.h **** #define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) + 612:Drivers/CMSIS/Include/core_cm0.h **** #define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + 613:Drivers/CMSIS/Include/core_cm0.h **** + 614:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_SetPriorityGrouping(X) (void)(X) + 615:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_GetPriorityGrouping() (0U) + 616:Drivers/CMSIS/Include/core_cm0.h **** + 617:Drivers/CMSIS/Include/core_cm0.h **** /** + 618:Drivers/CMSIS/Include/core_cm0.h **** \brief Enable Interrupt + 619:Drivers/CMSIS/Include/core_cm0.h **** \details Enables a device specific interrupt in the NVIC interrupt controller. + 620:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 621:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 622:Drivers/CMSIS/Include/core_cm0.h **** */ + 623:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) + 624:Drivers/CMSIS/Include/core_cm0.h **** { + 625:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 626:Drivers/CMSIS/Include/core_cm0.h **** { + 627:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 628:Drivers/CMSIS/Include/core_cm0.h **** } + 629:Drivers/CMSIS/Include/core_cm0.h **** } + 630:Drivers/CMSIS/Include/core_cm0.h **** + 631:Drivers/CMSIS/Include/core_cm0.h **** + 632:Drivers/CMSIS/Include/core_cm0.h **** /** + 633:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Enable status + 634:Drivers/CMSIS/Include/core_cm0.h **** \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + 635:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 636:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Interrupt is not enabled. + 637:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Interrupt is enabled. + 638:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 639:Drivers/CMSIS/Include/core_cm0.h **** */ + 640:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) + 641:Drivers/CMSIS/Include/core_cm0.h **** { + 642:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 643:Drivers/CMSIS/Include/core_cm0.h **** { + 644:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL) + 645:Drivers/CMSIS/Include/core_cm0.h **** } + 646:Drivers/CMSIS/Include/core_cm0.h **** else + 647:Drivers/CMSIS/Include/core_cm0.h **** { + 648:Drivers/CMSIS/Include/core_cm0.h **** return(0U); + 649:Drivers/CMSIS/Include/core_cm0.h **** } + 650:Drivers/CMSIS/Include/core_cm0.h **** } + 651:Drivers/CMSIS/Include/core_cm0.h **** + 652:Drivers/CMSIS/Include/core_cm0.h **** + 653:Drivers/CMSIS/Include/core_cm0.h **** /** + 654:Drivers/CMSIS/Include/core_cm0.h **** \brief Disable Interrupt + 655:Drivers/CMSIS/Include/core_cm0.h **** \details Disables a device specific interrupt in the NVIC interrupt controller. + 656:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 657:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 658:Drivers/CMSIS/Include/core_cm0.h **** */ + ARM GAS /tmp/ccU3iDhL.s page 13 + + + 659:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) + 660:Drivers/CMSIS/Include/core_cm0.h **** { + 661:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 662:Drivers/CMSIS/Include/core_cm0.h **** { + 663:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 664:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 665:Drivers/CMSIS/Include/core_cm0.h **** __ISB(); + 666:Drivers/CMSIS/Include/core_cm0.h **** } + 667:Drivers/CMSIS/Include/core_cm0.h **** } + 668:Drivers/CMSIS/Include/core_cm0.h **** + 669:Drivers/CMSIS/Include/core_cm0.h **** + 670:Drivers/CMSIS/Include/core_cm0.h **** /** + 671:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Pending Interrupt + 672:Drivers/CMSIS/Include/core_cm0.h **** \details Reads the NVIC pending register and returns the pending bit for the specified device spe + 673:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 674:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Interrupt status is not pending. + 675:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Interrupt status is pending. + 676:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 677:Drivers/CMSIS/Include/core_cm0.h **** */ + 678:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) + 679:Drivers/CMSIS/Include/core_cm0.h **** { + 680:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 681:Drivers/CMSIS/Include/core_cm0.h **** { + 682:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL) + 683:Drivers/CMSIS/Include/core_cm0.h **** } + 684:Drivers/CMSIS/Include/core_cm0.h **** else + 685:Drivers/CMSIS/Include/core_cm0.h **** { + 686:Drivers/CMSIS/Include/core_cm0.h **** return(0U); + 687:Drivers/CMSIS/Include/core_cm0.h **** } + 688:Drivers/CMSIS/Include/core_cm0.h **** } + 689:Drivers/CMSIS/Include/core_cm0.h **** + 690:Drivers/CMSIS/Include/core_cm0.h **** + 691:Drivers/CMSIS/Include/core_cm0.h **** /** + 692:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Pending Interrupt + 693:Drivers/CMSIS/Include/core_cm0.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + 694:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 695:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 696:Drivers/CMSIS/Include/core_cm0.h **** */ + 697:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) + 698:Drivers/CMSIS/Include/core_cm0.h **** { + 699:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 700:Drivers/CMSIS/Include/core_cm0.h **** { + 701:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 702:Drivers/CMSIS/Include/core_cm0.h **** } + 703:Drivers/CMSIS/Include/core_cm0.h **** } + 704:Drivers/CMSIS/Include/core_cm0.h **** + 705:Drivers/CMSIS/Include/core_cm0.h **** + 706:Drivers/CMSIS/Include/core_cm0.h **** /** + 707:Drivers/CMSIS/Include/core_cm0.h **** \brief Clear Pending Interrupt + 708:Drivers/CMSIS/Include/core_cm0.h **** \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + 709:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 710:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 711:Drivers/CMSIS/Include/core_cm0.h **** */ + 712:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) + 713:Drivers/CMSIS/Include/core_cm0.h **** { + 714:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 715:Drivers/CMSIS/Include/core_cm0.h **** { + ARM GAS /tmp/ccU3iDhL.s page 14 + + + 716:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 717:Drivers/CMSIS/Include/core_cm0.h **** } + 718:Drivers/CMSIS/Include/core_cm0.h **** } + 719:Drivers/CMSIS/Include/core_cm0.h **** + 720:Drivers/CMSIS/Include/core_cm0.h **** + 721:Drivers/CMSIS/Include/core_cm0.h **** /** + 722:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Interrupt Priority + 723:Drivers/CMSIS/Include/core_cm0.h **** \details Sets the priority of a device specific interrupt or a processor exception. + 724:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 725:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 726:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 727:Drivers/CMSIS/Include/core_cm0.h **** \param [in] priority Priority to set. + 728:Drivers/CMSIS/Include/core_cm0.h **** \note The priority cannot be set for every processor exception. + 729:Drivers/CMSIS/Include/core_cm0.h **** */ + 730:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) + 731:Drivers/CMSIS/Include/core_cm0.h **** { + 28 .loc 2 731 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 2 731 1 is_stmt 0 view .LVU1 + 33 0000 70B5 push {r4, r5, r6, lr} + 34 .cfi_def_cfa_offset 16 + 35 .cfi_offset 4, -16 + 36 .cfi_offset 5, -12 + 37 .cfi_offset 6, -8 + 38 .cfi_offset 14, -4 + 732:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 39 .loc 2 732 3 is_stmt 1 view .LVU2 + 40 .loc 2 732 6 is_stmt 0 view .LVU3 + 41 0002 0028 cmp r0, #0 + 42 0004 11DB blt .L2 + 733:Drivers/CMSIS/Include/core_cm0.h **** { + 734:Drivers/CMSIS/Include/core_cm0.h **** NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn)) + 43 .loc 2 734 5 is_stmt 1 view .LVU4 + 44 .loc 2 734 53 is_stmt 0 view .LVU5 + 45 0006 8308 lsrs r3, r0, #2 + 46 .loc 2 734 52 view .LVU6 + 47 0008 134D ldr r5, .L4 + 48 000a C033 adds r3, r3, #192 + 49 000c 9B00 lsls r3, r3, #2 + 50 000e 5C59 ldr r4, [r3, r5] + 51 .loc 2 734 83 view .LVU7 + 52 0010 0322 movs r2, #3 + 53 0012 1040 ands r0, r2 + 54 .LVL1: + 55 .loc 2 734 83 view .LVU8 + 56 0014 C000 lsls r0, r0, #3 + 57 .loc 2 734 80 view .LVU9 + 58 0016 FC32 adds r2, r2, #252 + 59 0018 1600 movs r6, r2 + 60 001a 8640 lsls r6, r6, r0 + 61 .loc 2 734 33 view .LVU10 + 62 001c B443 bics r4, r6 + 735:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 63 .loc 2 735 20 view .LVU11 + 64 001e 8901 lsls r1, r1, #6 + ARM GAS /tmp/ccU3iDhL.s page 15 + + + 65 .LVL2: + 66 .loc 2 735 48 view .LVU12 + 67 0020 0A40 ands r2, r1 + 68 .loc 2 735 68 view .LVU13 + 69 0022 8240 lsls r2, r2, r0 + 734:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 70 .loc 2 734 102 view .LVU14 + 71 0024 2243 orrs r2, r4 + 734:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 72 .loc 2 734 30 view .LVU15 + 73 0026 5A51 str r2, [r3, r5] + 74 .L1: + 736:Drivers/CMSIS/Include/core_cm0.h **** } + 737:Drivers/CMSIS/Include/core_cm0.h **** else + 738:Drivers/CMSIS/Include/core_cm0.h **** { + 739:Drivers/CMSIS/Include/core_cm0.h **** SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn)) + 740:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 741:Drivers/CMSIS/Include/core_cm0.h **** } + 742:Drivers/CMSIS/Include/core_cm0.h **** } + 75 .loc 2 742 1 view .LVU16 + 76 @ sp needed + 77 0028 70BD pop {r4, r5, r6, pc} + 78 .LVL3: + 79 .L2: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 80 .loc 2 739 5 is_stmt 1 view .LVU17 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 81 .loc 2 739 53 is_stmt 0 view .LVU18 + 82 002a 0F23 movs r3, #15 + 83 002c 0340 ands r3, r0 + 84 002e 083B subs r3, r3, #8 + 85 0030 9B08 lsrs r3, r3, #2 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 86 .loc 2 739 52 view .LVU19 + 87 0032 0633 adds r3, r3, #6 + 88 0034 9B00 lsls r3, r3, #2 + 89 0036 094A ldr r2, .L4+4 + 90 0038 9446 mov ip, r2 + 91 003a 6344 add r3, r3, ip + 92 003c 5C68 ldr r4, [r3, #4] + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 93 .loc 2 739 83 view .LVU20 + 94 003e 0322 movs r2, #3 + 95 0040 1040 ands r0, r2 + 96 .LVL4: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 97 .loc 2 739 83 view .LVU21 + 98 0042 C000 lsls r0, r0, #3 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 99 .loc 2 739 80 view .LVU22 + 100 0044 FC32 adds r2, r2, #252 + 101 0046 1500 movs r5, r2 + 102 0048 8540 lsls r5, r5, r0 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 103 .loc 2 739 33 view .LVU23 + 104 004a AC43 bics r4, r5 + 740:Drivers/CMSIS/Include/core_cm0.h **** } + ARM GAS /tmp/ccU3iDhL.s page 16 + + + 105 .loc 2 740 20 view .LVU24 + 106 004c 8901 lsls r1, r1, #6 + 107 .LVL5: + 740:Drivers/CMSIS/Include/core_cm0.h **** } + 108 .loc 2 740 48 view .LVU25 + 109 004e 0A40 ands r2, r1 + 740:Drivers/CMSIS/Include/core_cm0.h **** } + 110 .loc 2 740 68 view .LVU26 + 111 0050 8240 lsls r2, r2, r0 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 112 .loc 2 739 102 view .LVU27 + 113 0052 2243 orrs r2, r4 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 114 .loc 2 739 30 view .LVU28 + 115 0054 5A60 str r2, [r3, #4] + 116 .loc 2 742 1 view .LVU29 + 117 0056 E7E7 b .L1 + 118 .L5: + 119 .align 2 + 120 .L4: + 121 0058 00E100E0 .word -536813312 + 122 005c 00ED00E0 .word -536810240 + 123 .cfi_endproc + 124 .LFE31: + 126 .section .text.__NVIC_GetPriority,"ax",%progbits + 127 .align 1 + 128 .syntax unified + 129 .code 16 + 130 .thumb_func + 132 __NVIC_GetPriority: + 133 .LVL6: + 134 .LFB32: + 743:Drivers/CMSIS/Include/core_cm0.h **** + 744:Drivers/CMSIS/Include/core_cm0.h **** + 745:Drivers/CMSIS/Include/core_cm0.h **** /** + 746:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Priority + 747:Drivers/CMSIS/Include/core_cm0.h **** \details Reads the priority of a device specific interrupt or a processor exception. + 748:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 749:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 750:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 751:Drivers/CMSIS/Include/core_cm0.h **** \return Interrupt Priority. + 752:Drivers/CMSIS/Include/core_cm0.h **** Value is aligned automatically to the implemented priority bits of the microc + 753:Drivers/CMSIS/Include/core_cm0.h **** */ + 754:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) + 755:Drivers/CMSIS/Include/core_cm0.h **** { + 135 .loc 2 755 1 is_stmt 1 view -0 + 136 .cfi_startproc + 137 @ args = 0, pretend = 0, frame = 0 + 138 @ frame_needed = 0, uses_anonymous_args = 0 + 139 @ link register save eliminated. + 756:Drivers/CMSIS/Include/core_cm0.h **** + 757:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 140 .loc 2 757 3 view .LVU31 + 141 .loc 2 757 6 is_stmt 0 view .LVU32 + 142 0000 0028 cmp r0, #0 + 143 0002 0CDB blt .L7 + 758:Drivers/CMSIS/Include/core_cm0.h **** { + ARM GAS /tmp/ccU3iDhL.s page 17 + + + 759:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - + 144 .loc 2 759 5 is_stmt 1 view .LVU33 + 145 .loc 2 759 35 is_stmt 0 view .LVU34 + 146 0004 8308 lsrs r3, r0, #2 + 147 .loc 2 759 33 view .LVU35 + 148 0006 C033 adds r3, r3, #192 + 149 0008 9B00 lsls r3, r3, #2 + 150 000a 0E4A ldr r2, .L9 + 151 000c 9B58 ldr r3, [r3, r2] + 152 .loc 2 759 53 view .LVU36 + 153 000e 0322 movs r2, #3 + 154 0010 0240 ands r2, r0 + 155 0012 D200 lsls r2, r2, #3 + 156 .loc 2 759 50 view .LVU37 + 157 0014 D340 lsrs r3, r3, r2 + 158 .loc 2 759 12 view .LVU38 + 159 0016 9B09 lsrs r3, r3, #6 + 160 0018 0320 movs r0, #3 + 161 .LVL7: + 162 .loc 2 759 12 view .LVU39 + 163 001a 1840 ands r0, r3 + 164 .L6: + 760:Drivers/CMSIS/Include/core_cm0.h **** } + 761:Drivers/CMSIS/Include/core_cm0.h **** else + 762:Drivers/CMSIS/Include/core_cm0.h **** { + 763:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - + 764:Drivers/CMSIS/Include/core_cm0.h **** } + 765:Drivers/CMSIS/Include/core_cm0.h **** } + 165 .loc 2 765 1 view .LVU40 + 166 @ sp needed + 167 001c 7047 bx lr + 168 .LVL8: + 169 .L7: + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 170 .loc 2 763 5 is_stmt 1 view .LVU41 + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 171 .loc 2 763 34 is_stmt 0 view .LVU42 + 172 001e 0F23 movs r3, #15 + 173 0020 0340 ands r3, r0 + 174 0022 083B subs r3, r3, #8 + 175 0024 9B08 lsrs r3, r3, #2 + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 176 .loc 2 763 33 view .LVU43 + 177 0026 0633 adds r3, r3, #6 + 178 0028 9B00 lsls r3, r3, #2 + 179 002a 074A ldr r2, .L9+4 + 180 002c 9446 mov ip, r2 + 181 002e 6344 add r3, r3, ip + 182 0030 5B68 ldr r3, [r3, #4] + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 183 .loc 2 763 53 view .LVU44 + 184 0032 0322 movs r2, #3 + 185 0034 0240 ands r2, r0 + 186 0036 D200 lsls r2, r2, #3 + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 187 .loc 2 763 50 view .LVU45 + 188 0038 D340 lsrs r3, r3, r2 + ARM GAS /tmp/ccU3iDhL.s page 18 + + + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 189 .loc 2 763 12 view .LVU46 + 190 003a 9B09 lsrs r3, r3, #6 + 191 003c 0320 movs r0, #3 + 192 .LVL9: + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 193 .loc 2 763 12 view .LVU47 + 194 003e 1840 ands r0, r3 + 195 0040 ECE7 b .L6 + 196 .L10: + 197 0042 C046 .align 2 + 198 .L9: + 199 0044 00E100E0 .word -536813312 + 200 0048 00ED00E0 .word -536810240 + 201 .cfi_endproc + 202 .LFE32: + 204 .section .text.__NVIC_SystemReset,"ax",%progbits + 205 .align 1 + 206 .syntax unified + 207 .code 16 + 208 .thumb_func + 210 __NVIC_SystemReset: + 211 .LFB37: + 766:Drivers/CMSIS/Include/core_cm0.h **** + 767:Drivers/CMSIS/Include/core_cm0.h **** + 768:Drivers/CMSIS/Include/core_cm0.h **** /** + 769:Drivers/CMSIS/Include/core_cm0.h **** \brief Encode Priority + 770:Drivers/CMSIS/Include/core_cm0.h **** \details Encodes the priority for an interrupt with the given priority group, + 771:Drivers/CMSIS/Include/core_cm0.h **** preemptive priority value, and subpriority value. + 772:Drivers/CMSIS/Include/core_cm0.h **** In case of a conflict between priority grouping and available + 773:Drivers/CMSIS/Include/core_cm0.h **** priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + 774:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PriorityGroup Used priority group. + 775:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PreemptPriority Preemptive priority value (starting from 0). + 776:Drivers/CMSIS/Include/core_cm0.h **** \param [in] SubPriority Subpriority value (starting from 0). + 777:Drivers/CMSIS/Include/core_cm0.h **** \return Encoded priority. Value can be used in the function \ref NVIC_SetP + 778:Drivers/CMSIS/Include/core_cm0.h **** */ + 779:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uin + 780:Drivers/CMSIS/Include/core_cm0.h **** { + 781:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 782:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PreemptPriorityBits; + 783:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SubPriorityBits; + 784:Drivers/CMSIS/Include/core_cm0.h **** + 785:Drivers/CMSIS/Include/core_cm0.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + 786:Drivers/CMSIS/Include/core_cm0.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 787:Drivers/CMSIS/Include/core_cm0.h **** + 788:Drivers/CMSIS/Include/core_cm0.h **** return ( + 789:Drivers/CMSIS/Include/core_cm0.h **** ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits + 790:Drivers/CMSIS/Include/core_cm0.h **** ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + 791:Drivers/CMSIS/Include/core_cm0.h **** ); + 792:Drivers/CMSIS/Include/core_cm0.h **** } + 793:Drivers/CMSIS/Include/core_cm0.h **** + 794:Drivers/CMSIS/Include/core_cm0.h **** + 795:Drivers/CMSIS/Include/core_cm0.h **** /** + 796:Drivers/CMSIS/Include/core_cm0.h **** \brief Decode Priority + 797:Drivers/CMSIS/Include/core_cm0.h **** \details Decodes an interrupt priority value with a given priority group to + 798:Drivers/CMSIS/Include/core_cm0.h **** preemptive priority value and subpriority value. + 799:Drivers/CMSIS/Include/core_cm0.h **** In case of a conflict between priority grouping and available + ARM GAS /tmp/ccU3iDhL.s page 19 + + + 800:Drivers/CMSIS/Include/core_cm0.h **** priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + 801:Drivers/CMSIS/Include/core_cm0.h **** \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC + 802:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PriorityGroup Used priority group. + 803:Drivers/CMSIS/Include/core_cm0.h **** \param [out] pPreemptPriority Preemptive priority value (starting from 0). + 804:Drivers/CMSIS/Include/core_cm0.h **** \param [out] pSubPriority Subpriority value (starting from 0). + 805:Drivers/CMSIS/Include/core_cm0.h **** */ + 806:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* cons + 807:Drivers/CMSIS/Include/core_cm0.h **** { + 808:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 809:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PreemptPriorityBits; + 810:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SubPriorityBits; + 811:Drivers/CMSIS/Include/core_cm0.h **** + 812:Drivers/CMSIS/Include/core_cm0.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + 813:Drivers/CMSIS/Include/core_cm0.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 814:Drivers/CMSIS/Include/core_cm0.h **** + 815:Drivers/CMSIS/Include/core_cm0.h **** *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1 + 816:Drivers/CMSIS/Include/core_cm0.h **** *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1 + 817:Drivers/CMSIS/Include/core_cm0.h **** } + 818:Drivers/CMSIS/Include/core_cm0.h **** + 819:Drivers/CMSIS/Include/core_cm0.h **** + 820:Drivers/CMSIS/Include/core_cm0.h **** + 821:Drivers/CMSIS/Include/core_cm0.h **** /** + 822:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Interrupt Vector + 823:Drivers/CMSIS/Include/core_cm0.h **** \details Sets an interrupt vector in SRAM based interrupt vector table. + 824:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 825:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 826:Drivers/CMSIS/Include/core_cm0.h **** Address 0 must be mapped to SRAM. + 827:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number + 828:Drivers/CMSIS/Include/core_cm0.h **** \param [in] vector Address of interrupt handler function + 829:Drivers/CMSIS/Include/core_cm0.h **** */ + 830:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) + 831:Drivers/CMSIS/Include/core_cm0.h **** { + 832:Drivers/CMSIS/Include/core_cm0.h **** uint32_t *vectors = (uint32_t *)0x0U; + 833:Drivers/CMSIS/Include/core_cm0.h **** vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + 834:Drivers/CMSIS/Include/core_cm0.h **** } + 835:Drivers/CMSIS/Include/core_cm0.h **** + 836:Drivers/CMSIS/Include/core_cm0.h **** + 837:Drivers/CMSIS/Include/core_cm0.h **** /** + 838:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Vector + 839:Drivers/CMSIS/Include/core_cm0.h **** \details Reads an interrupt vector from interrupt vector table. + 840:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 841:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 842:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 843:Drivers/CMSIS/Include/core_cm0.h **** \return Address of interrupt handler function + 844:Drivers/CMSIS/Include/core_cm0.h **** */ + 845:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) + 846:Drivers/CMSIS/Include/core_cm0.h **** { + 847:Drivers/CMSIS/Include/core_cm0.h **** uint32_t *vectors = (uint32_t *)0x0U; + 848:Drivers/CMSIS/Include/core_cm0.h **** return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; + 849:Drivers/CMSIS/Include/core_cm0.h **** } + 850:Drivers/CMSIS/Include/core_cm0.h **** + 851:Drivers/CMSIS/Include/core_cm0.h **** + 852:Drivers/CMSIS/Include/core_cm0.h **** /** + 853:Drivers/CMSIS/Include/core_cm0.h **** \brief System Reset + 854:Drivers/CMSIS/Include/core_cm0.h **** \details Initiates a system reset request to reset the MCU. + 855:Drivers/CMSIS/Include/core_cm0.h **** */ + 856:Drivers/CMSIS/Include/core_cm0.h **** __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) + ARM GAS /tmp/ccU3iDhL.s page 20 + + + 857:Drivers/CMSIS/Include/core_cm0.h **** { + 212 .loc 2 857 1 is_stmt 1 view -0 + 213 .cfi_startproc + 214 @ Volatile: function does not return. + 215 @ args = 0, pretend = 0, frame = 0 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 @ link register save eliminated. + 858:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); /* Ensure all outstanding memor + 218 .loc 2 858 3 view .LVU49 + 219 .LBB26: + 220 .LBI26: + 221 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccU3iDhL.s page 21 + + + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + ARM GAS /tmp/ccU3iDhL.s page 22 + + + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccU3iDhL.s page 23 + + + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + ARM GAS /tmp/ccU3iDhL.s page 24 + + + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + ARM GAS /tmp/ccU3iDhL.s page 25 + + + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccU3iDhL.s page 26 + + + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccU3iDhL.s page 27 + + + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccU3iDhL.s page 28 + + + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + ARM GAS /tmp/ccU3iDhL.s page 29 + + + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccU3iDhL.s page 30 + + + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccU3iDhL.s page 31 + + + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + ARM GAS /tmp/ccU3iDhL.s page 32 + + + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + ARM GAS /tmp/ccU3iDhL.s page 33 + + + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccU3iDhL.s page 34 + + + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccU3iDhL.s page 35 + + + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 222 .loc 3 877 27 view .LVU50 + 223 .LBB27: + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 224 .loc 3 879 3 view .LVU51 + 225 .syntax divided + 226 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 227 0000 BFF34F8F dsb 0xF + 228 @ 0 "" 2 + 229 .thumb + 230 .syntax unified + 231 .LBE27: + 232 .LBE26: + 859:Drivers/CMSIS/Include/core_cm0.h **** buffered write are completed + 860:Drivers/CMSIS/Include/core_cm0.h **** SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 233 .loc 2 860 3 view .LVU52 + 234 .loc 2 860 15 is_stmt 0 view .LVU53 + 235 0004 034B ldr r3, .L13 + 236 0006 044A ldr r2, .L13+4 + 237 0008 DA60 str r2, [r3, #12] + 861:Drivers/CMSIS/Include/core_cm0.h **** SCB_AIRCR_SYSRESETREQ_Msk); + 862:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); /* Ensure completion of memory + 238 .loc 2 862 3 is_stmt 1 view .LVU54 + ARM GAS /tmp/ccU3iDhL.s page 36 + + + 239 .LBB28: + 240 .LBI28: + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 241 .loc 3 877 27 view .LVU55 + 242 .LBB29: + 243 .loc 3 879 3 view .LVU56 + 244 .syntax divided + 245 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 246 000a BFF34F8F dsb 0xF + 247 @ 0 "" 2 + 248 .thumb + 249 .syntax unified + 250 .L12: + 251 .LBE29: + 252 .LBE28: + 863:Drivers/CMSIS/Include/core_cm0.h **** + 864:Drivers/CMSIS/Include/core_cm0.h **** for(;;) /* wait until reset */ + 253 .loc 2 864 3 view .LVU57 + 865:Drivers/CMSIS/Include/core_cm0.h **** { + 866:Drivers/CMSIS/Include/core_cm0.h **** __NOP(); + 254 .loc 2 866 5 discriminator 1 view .LVU58 + 255 .syntax divided + 256 @ 866 "Drivers/CMSIS/Include/core_cm0.h" 1 + 257 000e C046 nop + 258 @ 0 "" 2 + 864:Drivers/CMSIS/Include/core_cm0.h **** { + 259 .loc 2 864 3 view .LVU59 + 260 .thumb + 261 .syntax unified + 262 0010 FDE7 b .L12 + 263 .L14: + 264 0012 C046 .align 2 + 265 .L13: + 266 0014 00ED00E0 .word -536810240 + 267 0018 0400FA05 .word 100270084 + 268 .cfi_endproc + 269 .LFE37: + 271 .section .text.SysTick_Config,"ax",%progbits + 272 .align 1 + 273 .syntax unified + 274 .code 16 + 275 .thumb_func + 277 SysTick_Config: + 278 .LVL10: + 279 .LFB39: + 867:Drivers/CMSIS/Include/core_cm0.h **** } + 868:Drivers/CMSIS/Include/core_cm0.h **** } + 869:Drivers/CMSIS/Include/core_cm0.h **** + 870:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of CMSIS_Core_NVICFunctions */ + 871:Drivers/CMSIS/Include/core_cm0.h **** + 872:Drivers/CMSIS/Include/core_cm0.h **** + 873:Drivers/CMSIS/Include/core_cm0.h **** /* ########################## FPU functions #################################### */ + 874:Drivers/CMSIS/Include/core_cm0.h **** /** + 875:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 876:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_FpuFunctions FPU Functions + 877:Drivers/CMSIS/Include/core_cm0.h **** \brief Function that provides FPU type. + 878:Drivers/CMSIS/Include/core_cm0.h **** @{ + ARM GAS /tmp/ccU3iDhL.s page 37 + + + 879:Drivers/CMSIS/Include/core_cm0.h **** */ + 880:Drivers/CMSIS/Include/core_cm0.h **** + 881:Drivers/CMSIS/Include/core_cm0.h **** /** + 882:Drivers/CMSIS/Include/core_cm0.h **** \brief get FPU type + 883:Drivers/CMSIS/Include/core_cm0.h **** \details returns the FPU type + 884:Drivers/CMSIS/Include/core_cm0.h **** \returns + 885:Drivers/CMSIS/Include/core_cm0.h **** - \b 0: No FPU + 886:Drivers/CMSIS/Include/core_cm0.h **** - \b 1: Single precision FPU + 887:Drivers/CMSIS/Include/core_cm0.h **** - \b 2: Double + Single precision FPU + 888:Drivers/CMSIS/Include/core_cm0.h **** */ + 889:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t SCB_GetFPUType(void) + 890:Drivers/CMSIS/Include/core_cm0.h **** { + 891:Drivers/CMSIS/Include/core_cm0.h **** return 0U; /* No FPU */ + 892:Drivers/CMSIS/Include/core_cm0.h **** } + 893:Drivers/CMSIS/Include/core_cm0.h **** + 894:Drivers/CMSIS/Include/core_cm0.h **** + 895:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of CMSIS_Core_FpuFunctions */ + 896:Drivers/CMSIS/Include/core_cm0.h **** + 897:Drivers/CMSIS/Include/core_cm0.h **** + 898:Drivers/CMSIS/Include/core_cm0.h **** + 899:Drivers/CMSIS/Include/core_cm0.h **** /* ################################## SysTick function ######################################## + 900:Drivers/CMSIS/Include/core_cm0.h **** /** + 901:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 902:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + 903:Drivers/CMSIS/Include/core_cm0.h **** \brief Functions that configure the System. + 904:Drivers/CMSIS/Include/core_cm0.h **** @{ + 905:Drivers/CMSIS/Include/core_cm0.h **** */ + 906:Drivers/CMSIS/Include/core_cm0.h **** + 907:Drivers/CMSIS/Include/core_cm0.h **** #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + 908:Drivers/CMSIS/Include/core_cm0.h **** + 909:Drivers/CMSIS/Include/core_cm0.h **** /** + 910:Drivers/CMSIS/Include/core_cm0.h **** \brief System Tick Configuration + 911:Drivers/CMSIS/Include/core_cm0.h **** \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + 912:Drivers/CMSIS/Include/core_cm0.h **** Counter is in free running mode to generate periodic interrupts. + 913:Drivers/CMSIS/Include/core_cm0.h **** \param [in] ticks Number of ticks between two interrupts. + 914:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Function succeeded. + 915:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Function failed. + 916:Drivers/CMSIS/Include/core_cm0.h **** \note When the variable __Vendor_SysTickConfig is set to 1, then the + 917:Drivers/CMSIS/Include/core_cm0.h **** function SysTick_Config is not included. In this case, the file device. + 918:Drivers/CMSIS/Include/core_cm0.h **** must contain a vendor-specific implementation of this function. + 919:Drivers/CMSIS/Include/core_cm0.h **** */ + 920:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) + 921:Drivers/CMSIS/Include/core_cm0.h **** { + 280 .loc 2 921 1 view -0 + 281 .cfi_startproc + 282 @ args = 0, pretend = 0, frame = 0 + 283 @ frame_needed = 0, uses_anonymous_args = 0 + 284 @ link register save eliminated. + 922:Drivers/CMSIS/Include/core_cm0.h **** if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + 285 .loc 2 922 3 view .LVU61 + 286 .loc 2 922 14 is_stmt 0 view .LVU62 + 287 0000 0138 subs r0, r0, #1 + 288 .LVL11: + 289 .loc 2 922 6 view .LVU63 + 290 0002 8023 movs r3, #128 + 291 0004 5B04 lsls r3, r3, #17 + 292 0006 9842 cmp r0, r3 + ARM GAS /tmp/ccU3iDhL.s page 38 + + + 293 0008 0FD2 bcs .L17 + 923:Drivers/CMSIS/Include/core_cm0.h **** { + 924:Drivers/CMSIS/Include/core_cm0.h **** return (1UL); /* Reload value impossible */ + 925:Drivers/CMSIS/Include/core_cm0.h **** } + 926:Drivers/CMSIS/Include/core_cm0.h **** + 927:Drivers/CMSIS/Include/core_cm0.h **** SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + 294 .loc 2 927 3 is_stmt 1 view .LVU64 + 295 .loc 2 927 18 is_stmt 0 view .LVU65 + 296 000a 094A ldr r2, .L18 + 297 000c 5060 str r0, [r2, #4] + 928:Drivers/CMSIS/Include/core_cm0.h **** NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Int + 298 .loc 2 928 3 is_stmt 1 view .LVU66 + 299 .LVL12: + 300 .LBB30: + 301 .LBI30: + 730:Drivers/CMSIS/Include/core_cm0.h **** { + 302 .loc 2 730 22 view .LVU67 + 303 .LBB31: + 732:Drivers/CMSIS/Include/core_cm0.h **** { + 304 .loc 2 732 3 view .LVU68 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 305 .loc 2 739 5 view .LVU69 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 306 .loc 2 739 52 is_stmt 0 view .LVU70 + 307 000e 0948 ldr r0, .L18+4 + 308 .LVL13: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 309 .loc 2 739 52 view .LVU71 + 310 0010 036A ldr r3, [r0, #32] + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 311 .loc 2 739 33 view .LVU72 + 312 0012 1B02 lsls r3, r3, #8 + 313 0014 1B0A lsrs r3, r3, #8 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 314 .loc 2 739 102 view .LVU73 + 315 0016 C021 movs r1, #192 + 316 0018 0906 lsls r1, r1, #24 + 317 001a 0B43 orrs r3, r1 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 318 .loc 2 739 30 view .LVU74 + 319 001c 0362 str r3, [r0, #32] + 320 .LVL14: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 321 .loc 2 739 30 view .LVU75 + 322 .LBE31: + 323 .LBE30: + 929:Drivers/CMSIS/Include/core_cm0.h **** SysTick->VAL = 0UL; /* Load the SysTick Counter Val + 324 .loc 2 929 3 is_stmt 1 view .LVU76 + 325 .loc 2 929 18 is_stmt 0 view .LVU77 + 326 001e 0023 movs r3, #0 + 327 0020 9360 str r3, [r2, #8] + 930:Drivers/CMSIS/Include/core_cm0.h **** SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + 328 .loc 2 930 3 is_stmt 1 view .LVU78 + 329 .loc 2 930 18 is_stmt 0 view .LVU79 + 330 0022 0733 adds r3, r3, #7 + 331 0024 1360 str r3, [r2] + 931:Drivers/CMSIS/Include/core_cm0.h **** SysTick_CTRL_TICKINT_Msk | + ARM GAS /tmp/ccU3iDhL.s page 39 + + + 932:Drivers/CMSIS/Include/core_cm0.h **** SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTi + 933:Drivers/CMSIS/Include/core_cm0.h **** return (0UL); /* Function successful */ + 332 .loc 2 933 3 is_stmt 1 view .LVU80 + 333 .loc 2 933 10 is_stmt 0 view .LVU81 + 334 0026 0020 movs r0, #0 + 335 .L15: + 934:Drivers/CMSIS/Include/core_cm0.h **** } + 336 .loc 2 934 1 view .LVU82 + 337 @ sp needed + 338 0028 7047 bx lr + 339 .L17: + 924:Drivers/CMSIS/Include/core_cm0.h **** } + 340 .loc 2 924 12 view .LVU83 + 341 002a 0120 movs r0, #1 + 342 002c FCE7 b .L15 + 343 .L19: + 344 002e C046 .align 2 + 345 .L18: + 346 0030 10E000E0 .word -536813552 + 347 0034 00ED00E0 .word -536810240 + 348 .cfi_endproc + 349 .LFE39: + 351 .section .text.HAL_NVIC_SetPriority,"ax",%progbits + 352 .align 1 + 353 .global HAL_NVIC_SetPriority + 354 .syntax unified + 355 .code 16 + 356 .thumb_func + 358 HAL_NVIC_SetPriority: + 359 .LVL15: + 360 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @file stm32f0xx_hal_cortex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief CORTEX HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * functionalities of the CORTEX: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### How to use this driver ##### + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** *** How to configure Interrupts using CORTEX HAL driver *** + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** =========================================================== + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This section provides functions allowing to configure the NVIC interrupts (IRQ). + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** The Cortex-M0 exceptions are managed by CMSIS functions. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Enable and Configure the priority of the selected IRQ Channels. + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** The priority can be 0..3. + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Lower priority values gives higher priority. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Priority Order: + ARM GAS /tmp/ccU3iDhL.s page 40 + + + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#@) Lowest priority. + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#@) Lowest hardware priority (IRQn position). + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Negative value of IRQn_Type are not allowed. + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** *** How to configure Systick using CORTEX HAL driver *** + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ======================================================== + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Setup SysTick Timer for time base. + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** is a CMSIS function that: + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick Reload register with value passed as function parameter. + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick IRQ priority to the lowest value (0x03). + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Resets the SysTick Counter register. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Enables the SysTick Interrupt. + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Starts the SysTick Counter. + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() macro is defined + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** inside the stm32f0xx_hal_cortex.h file. + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) You can change the SysTick IRQ priority by calling the + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS funct + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) To adjust the SysTick time base, use the following formula: + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Reload Value should not exceed 0xFFFFFF + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @attention + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * Copyright (c) 2016 STMicroelectronics. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * All rights reserved. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * the root directory of this software component. + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Includes ------------------------------------------------------------------*/ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** #include "stm32f0xx_hal.h" + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + ARM GAS /tmp/ccU3iDhL.s page 41 + + + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX CORTEX + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief CORTEX CORTEX HAL module driver + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** #ifdef HAL_CORTEX_MODULE_ENABLED + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private typedef -----------------------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private define ------------------------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private macro -------------------------------------------------------------*/ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private variables ---------------------------------------------------------*/ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private function prototypes -----------------------------------------------*/ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Exported functions ---------------------------------------------------------*/ + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initialization and Configuration functions + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @verbatim + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### Initialization and de-initialization functions ##### + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This section provides the CORTEX HAL driver functions allowing to configure Interrupts + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Systick functionalities + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Sets the priority of an interrupt. + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number . + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32f0xx.h file) + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param PreemptPriority The preemption priority for the IRQn channel. + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be a value between 0 and 3. + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * A lower priority value indicates a higher priority + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param SubPriority the subpriority level for the IRQ channel. + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * no subpriority supported in Cortex M0 based products. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 361 .loc 1 136 1 is_stmt 1 view -0 + 362 .cfi_startproc + 363 @ args = 0, pretend = 0, frame = 0 + 364 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccU3iDhL.s page 42 + + + 365 .loc 1 136 1 is_stmt 0 view .LVU85 + 366 0000 10B5 push {r4, lr} + 367 .cfi_def_cfa_offset 8 + 368 .cfi_offset 4, -8 + 369 .cfi_offset 14, -4 + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); + 370 .loc 1 138 3 is_stmt 1 view .LVU86 + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SetPriority(IRQn,PreemptPriority); + 371 .loc 1 139 3 view .LVU87 + 372 0002 FFF7FEFF bl __NVIC_SetPriority + 373 .LVL16: + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Prevent unused argument(s) compilation warning */ + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** UNUSED(SubPriority); + 374 .loc 1 142 3 view .LVU88 + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 375 .loc 1 143 1 is_stmt 0 view .LVU89 + 376 @ sp needed + 377 0006 10BD pop {r4, pc} + 378 .cfi_endproc + 379 .LFE40: + 381 .section .text.HAL_NVIC_EnableIRQ,"ax",%progbits + 382 .align 1 + 383 .global HAL_NVIC_EnableIRQ + 384 .syntax unified + 385 .code 16 + 386 .thumb_func + 388 HAL_NVIC_EnableIRQ: + 389 .LVL17: + 390 .LFB41: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Enables a device specific interrupt in the NVIC interrupt controller. + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * function should be called before. + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 391 .loc 1 155 1 is_stmt 1 view -0 + 392 .cfi_startproc + 393 @ args = 0, pretend = 0, frame = 0 + 394 @ frame_needed = 0, uses_anonymous_args = 0 + 395 @ link register save eliminated. + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 396 .loc 1 157 3 view .LVU91 + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Enable interrupt */ + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_EnableIRQ(IRQn); + 397 .loc 1 160 3 view .LVU92 + 398 .LBB32: + 399 .LBI32: + ARM GAS /tmp/ccU3iDhL.s page 43 + + + 623:Drivers/CMSIS/Include/core_cm0.h **** { + 400 .loc 2 623 22 view .LVU93 + 401 .LBB33: + 625:Drivers/CMSIS/Include/core_cm0.h **** { + 402 .loc 2 625 3 view .LVU94 + 625:Drivers/CMSIS/Include/core_cm0.h **** { + 403 .loc 2 625 6 is_stmt 0 view .LVU95 + 404 0000 0028 cmp r0, #0 + 405 0002 05DB blt .L21 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 406 .loc 2 627 5 is_stmt 1 view .LVU96 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 407 .loc 2 627 58 is_stmt 0 view .LVU97 + 408 0004 1F22 movs r2, #31 + 409 0006 0240 ands r2, r0 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 410 .loc 2 627 22 view .LVU98 + 411 0008 0123 movs r3, #1 + 412 000a 9340 lsls r3, r3, r2 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 413 .loc 2 627 20 view .LVU99 + 414 000c 014A ldr r2, .L23 + 415 000e 1360 str r3, [r2] + 416 .LVL18: + 417 .L21: + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 418 .loc 2 627 20 view .LVU100 + 419 .LBE33: + 420 .LBE32: + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 421 .loc 1 161 1 view .LVU101 + 422 @ sp needed + 423 0010 7047 bx lr + 424 .L24: + 425 0012 C046 .align 2 + 426 .L23: + 427 0014 00E100E0 .word -536813312 + 428 .cfi_endproc + 429 .LFE41: + 431 .section .text.HAL_NVIC_DisableIRQ,"ax",%progbits + 432 .align 1 + 433 .global HAL_NVIC_DisableIRQ + 434 .syntax unified + 435 .code 16 + 436 .thumb_func + 438 HAL_NVIC_DisableIRQ: + 439 .LVL19: + 440 .LFB42: + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Disables a device specific interrupt in the NVIC interrupt controller. + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) + ARM GAS /tmp/ccU3iDhL.s page 44 + + + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 441 .loc 1 171 1 is_stmt 1 view -0 + 442 .cfi_startproc + 443 @ args = 0, pretend = 0, frame = 0 + 444 @ frame_needed = 0, uses_anonymous_args = 0 + 445 @ link register save eliminated. + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 446 .loc 1 173 3 view .LVU103 + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Disable interrupt */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_DisableIRQ(IRQn); + 447 .loc 1 176 3 view .LVU104 + 448 .LBB34: + 449 .LBI34: + 659:Drivers/CMSIS/Include/core_cm0.h **** { + 450 .loc 2 659 22 view .LVU105 + 451 .LBB35: + 661:Drivers/CMSIS/Include/core_cm0.h **** { + 452 .loc 2 661 3 view .LVU106 + 661:Drivers/CMSIS/Include/core_cm0.h **** { + 453 .loc 2 661 6 is_stmt 0 view .LVU107 + 454 0000 0028 cmp r0, #0 + 455 0002 0ADB blt .L25 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 456 .loc 2 663 5 is_stmt 1 view .LVU108 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 457 .loc 2 663 58 is_stmt 0 view .LVU109 + 458 0004 1F22 movs r2, #31 + 459 0006 0240 ands r2, r0 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 460 .loc 2 663 22 view .LVU110 + 461 0008 0123 movs r3, #1 + 462 000a 9340 lsls r3, r3, r2 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 463 .loc 2 663 20 view .LVU111 + 464 000c 0349 ldr r1, .L27 + 465 000e 8022 movs r2, #128 + 466 0010 8B50 str r3, [r1, r2] + 664:Drivers/CMSIS/Include/core_cm0.h **** __ISB(); + 467 .loc 2 664 5 is_stmt 1 view .LVU112 + 468 .LBB36: + 469 .LBI36: + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 470 .loc 3 877 27 view .LVU113 + 471 .LBB37: + 472 .loc 3 879 3 view .LVU114 + 473 .syntax divided + 474 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 475 0012 BFF34F8F dsb 0xF + 476 @ 0 "" 2 + 477 .thumb + 478 .syntax unified + 479 .LBE37: + 480 .LBE36: + 665:Drivers/CMSIS/Include/core_cm0.h **** } + 481 .loc 2 665 5 view .LVU115 + ARM GAS /tmp/ccU3iDhL.s page 45 + + + 482 .LBB38: + 483 .LBI38: + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 484 .loc 3 866 27 view .LVU116 + 485 .LBB39: + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 486 .loc 3 868 3 view .LVU117 + 487 .syntax divided + 488 @ 868 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 489 0016 BFF36F8F isb 0xF + 490 @ 0 "" 2 + 491 .LVL20: + 492 .thumb + 493 .syntax unified + 494 .L25: + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495 .loc 3 868 3 is_stmt 0 view .LVU118 + 496 .LBE39: + 497 .LBE38: + 498 .LBE35: + 499 .LBE34: + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 500 .loc 1 177 1 view .LVU119 + 501 @ sp needed + 502 001a 7047 bx lr + 503 .L28: + 504 .align 2 + 505 .L27: + 506 001c 00E100E0 .word -536813312 + 507 .cfi_endproc + 508 .LFE42: + 510 .section .text.HAL_NVIC_SystemReset,"ax",%progbits + 511 .align 1 + 512 .global HAL_NVIC_SystemReset + 513 .syntax unified + 514 .code 16 + 515 .thumb_func + 517 HAL_NVIC_SystemReset: + 518 .LFB43: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initiates a system reset request to reset the MCU. + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SystemReset(void) + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 519 .loc 1 184 1 is_stmt 1 view -0 + 520 .cfi_startproc + 521 @ Volatile: function does not return. + 522 @ args = 0, pretend = 0, frame = 0 + 523 @ frame_needed = 0, uses_anonymous_args = 0 + 524 0000 10B5 push {r4, lr} + 525 .cfi_def_cfa_offset 8 + 526 .cfi_offset 4, -8 + 527 .cfi_offset 14, -4 + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* System Reset */ + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SystemReset(); + ARM GAS /tmp/ccU3iDhL.s page 46 + + + 528 .loc 1 186 3 view .LVU121 + 529 0002 FFF7FEFF bl __NVIC_SystemReset + 530 .LVL21: + 531 .cfi_endproc + 532 .LFE43: + 534 .section .text.HAL_SYSTICK_Config,"ax",%progbits + 535 .align 1 + 536 .global HAL_SYSTICK_Config + 537 .syntax unified + 538 .code 16 + 539 .thumb_func + 541 HAL_SYSTICK_Config: + 542 .LVL22: + 543 .LFB44: + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * Counter is in free running mode to generate periodic interrupts. + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval status: - 0 Function succeeded. + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * - 1 Function failed. + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 544 .loc 1 197 1 view -0 + 545 .cfi_startproc + 546 @ args = 0, pretend = 0, frame = 0 + 547 @ frame_needed = 0, uses_anonymous_args = 0 + 548 .loc 1 197 1 is_stmt 0 view .LVU123 + 549 0000 10B5 push {r4, lr} + 550 .cfi_def_cfa_offset 8 + 551 .cfi_offset 4, -8 + 552 .cfi_offset 14, -4 + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return SysTick_Config(TicksNumb); + 553 .loc 1 198 4 is_stmt 1 view .LVU124 + 554 .loc 1 198 11 is_stmt 0 view .LVU125 + 555 0002 FFF7FEFF bl SysTick_Config + 556 .LVL23: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 557 .loc 1 199 1 view .LVU126 + 558 @ sp needed + 559 0006 10BD pop {r4, pc} + 560 .cfi_endproc + 561 .LFE44: + 563 .section .text.HAL_NVIC_GetPriority,"ax",%progbits + 564 .align 1 + 565 .global HAL_NVIC_GetPriority + 566 .syntax unified + 567 .code 16 + 568 .thumb_func + 570 HAL_NVIC_GetPriority: + 571 .LVL24: + 572 .LFB45: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @} + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + ARM GAS /tmp/ccU3iDhL.s page 47 + + + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Cortex control functions + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @verbatim + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### Peripheral Control functions ##### + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This subsection provides a set of functions allowing to control the CORTEX + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (NVIC, SYSTICK) functionalities. + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Gets the priority of an interrupt. + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn) + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 573 .loc 1 229 1 is_stmt 1 view -0 + 574 .cfi_startproc + 575 @ args = 0, pretend = 0, frame = 0 + 576 @ frame_needed = 0, uses_anonymous_args = 0 + 577 .loc 1 229 1 is_stmt 0 view .LVU128 + 578 0000 10B5 push {r4, lr} + 579 .cfi_def_cfa_offset 8 + 580 .cfi_offset 4, -8 + 581 .cfi_offset 14, -4 + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Get priority for Cortex-M system or device specific interrupts */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return NVIC_GetPriority(IRQn); + 582 .loc 1 231 3 is_stmt 1 view .LVU129 + 583 .loc 1 231 10 is_stmt 0 view .LVU130 + 584 0002 FFF7FEFF bl __NVIC_GetPriority + 585 .LVL25: + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 586 .loc 1 232 1 view .LVU131 + 587 @ sp needed + 588 0006 10BD pop {r4, pc} + 589 .cfi_endproc + 590 .LFE45: + 592 .section .text.HAL_NVIC_SetPendingIRQ,"ax",%progbits + 593 .align 1 + 594 .global HAL_NVIC_SetPendingIRQ + 595 .syntax unified + 596 .code 16 + 597 .thumb_func + 599 HAL_NVIC_SetPendingIRQ: + 600 .LVL26: + 601 .LFB46: + ARM GAS /tmp/ccU3iDhL.s page 48 + + + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Sets Pending bit of an external interrupt. + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 602 .loc 1 242 1 is_stmt 1 view -0 + 603 .cfi_startproc + 604 @ args = 0, pretend = 0, frame = 0 + 605 @ frame_needed = 0, uses_anonymous_args = 0 + 606 @ link register save eliminated. + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 607 .loc 1 244 3 view .LVU133 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Set interrupt pending */ + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SetPendingIRQ(IRQn); + 608 .loc 1 247 3 view .LVU134 + 609 .LBB40: + 610 .LBI40: + 697:Drivers/CMSIS/Include/core_cm0.h **** { + 611 .loc 2 697 22 view .LVU135 + 612 .LBB41: + 699:Drivers/CMSIS/Include/core_cm0.h **** { + 613 .loc 2 699 3 view .LVU136 + 699:Drivers/CMSIS/Include/core_cm0.h **** { + 614 .loc 2 699 6 is_stmt 0 view .LVU137 + 615 0000 0028 cmp r0, #0 + 616 0002 07DB blt .L32 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 617 .loc 2 701 5 is_stmt 1 view .LVU138 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 618 .loc 2 701 58 is_stmt 0 view .LVU139 + 619 0004 1F22 movs r2, #31 + 620 0006 0240 ands r2, r0 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 621 .loc 2 701 22 view .LVU140 + 622 0008 0123 movs r3, #1 + 623 000a 9340 lsls r3, r3, r2 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 624 .loc 2 701 20 view .LVU141 + 625 000c 0249 ldr r1, .L34 + 626 000e 8022 movs r2, #128 + 627 0010 5200 lsls r2, r2, #1 + 628 0012 8B50 str r3, [r1, r2] + 629 .LVL27: + 630 .L32: + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 631 .loc 2 701 20 view .LVU142 + 632 .LBE41: + 633 .LBE40: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 634 .loc 1 248 1 view .LVU143 + ARM GAS /tmp/ccU3iDhL.s page 49 + + + 635 @ sp needed + 636 0014 7047 bx lr + 637 .L35: + 638 0016 C046 .align 2 + 639 .L34: + 640 0018 00E100E0 .word -536813312 + 641 .cfi_endproc + 642 .LFE46: + 644 .section .text.HAL_NVIC_GetPendingIRQ,"ax",%progbits + 645 .align 1 + 646 .global HAL_NVIC_GetPendingIRQ + 647 .syntax unified + 648 .code 16 + 649 .thumb_func + 651 HAL_NVIC_GetPendingIRQ: + 652 .LVL28: + 653 .LFB47: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Gets Pending Interrupt (reads the pending register in the NVIC + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * and returns the pending bit for the specified interrupt). + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval status: - 0 Interrupt status is not pending. + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * - 1 Interrupt status is pending. + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 654 .loc 1 260 1 is_stmt 1 view -0 + 655 .cfi_startproc + 656 @ args = 0, pretend = 0, frame = 0 + 657 @ frame_needed = 0, uses_anonymous_args = 0 + 658 @ link register save eliminated. + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 659 .loc 1 262 3 view .LVU145 + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Return 1 if pending else 0 */ + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return NVIC_GetPendingIRQ(IRQn); + 660 .loc 1 265 3 view .LVU146 + 661 .LBB42: + 662 .LBI42: + 678:Drivers/CMSIS/Include/core_cm0.h **** { + 663 .loc 2 678 26 view .LVU147 + 664 .LBB43: + 680:Drivers/CMSIS/Include/core_cm0.h **** { + 665 .loc 2 680 3 view .LVU148 + 680:Drivers/CMSIS/Include/core_cm0.h **** { + 666 .loc 2 680 6 is_stmt 0 view .LVU149 + 667 0000 0028 cmp r0, #0 + 668 0002 09DB blt .L38 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 669 .loc 2 682 5 is_stmt 1 view .LVU150 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 670 .loc 2 682 35 is_stmt 0 view .LVU151 + 671 0004 054A ldr r2, .L39 + ARM GAS /tmp/ccU3iDhL.s page 50 + + + 672 0006 8023 movs r3, #128 + 673 0008 5B00 lsls r3, r3, #1 + 674 000a D358 ldr r3, [r2, r3] + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 675 .loc 2 682 68 view .LVU152 + 676 000c 1F22 movs r2, #31 + 677 000e 0240 ands r2, r0 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 678 .loc 2 682 80 view .LVU153 + 679 0010 D340 lsrs r3, r3, r2 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 680 .loc 2 682 12 view .LVU154 + 681 0012 0120 movs r0, #1 + 682 .LVL29: + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 683 .loc 2 682 12 view .LVU155 + 684 0014 1840 ands r0, r3 + 685 .LVL30: + 686 .L36: + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 687 .loc 2 682 12 view .LVU156 + 688 .LBE43: + 689 .LBE42: + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 690 .loc 1 266 1 view .LVU157 + 691 @ sp needed + 692 0016 7047 bx lr + 693 .LVL31: + 694 .L38: + 695 .LBB45: + 696 .LBB44: + 686:Drivers/CMSIS/Include/core_cm0.h **** } + 697 .loc 2 686 11 view .LVU158 + 698 0018 0020 movs r0, #0 + 699 .LVL32: + 686:Drivers/CMSIS/Include/core_cm0.h **** } + 700 .loc 2 686 11 view .LVU159 + 701 .LBE44: + 702 .LBE45: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 703 .loc 1 265 10 view .LVU160 + 704 001a FCE7 b .L36 + 705 .L40: + 706 .align 2 + 707 .L39: + 708 001c 00E100E0 .word -536813312 + 709 .cfi_endproc + 710 .LFE47: + 712 .section .text.HAL_NVIC_ClearPendingIRQ,"ax",%progbits + 713 .align 1 + 714 .global HAL_NVIC_ClearPendingIRQ + 715 .syntax unified + 716 .code 16 + 717 .thumb_func + 719 HAL_NVIC_ClearPendingIRQ: + 720 .LVL33: + 721 .LFB48: + ARM GAS /tmp/ccU3iDhL.s page 51 + + + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Clears the pending bit of an external interrupt. + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 722 .loc 1 276 1 is_stmt 1 view -0 + 723 .cfi_startproc + 724 @ args = 0, pretend = 0, frame = 0 + 725 @ frame_needed = 0, uses_anonymous_args = 0 + 726 @ link register save eliminated. + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 727 .loc 1 278 3 view .LVU162 + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Clear pending interrupt */ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_ClearPendingIRQ(IRQn); + 728 .loc 1 281 3 view .LVU163 + 729 .LBB46: + 730 .LBI46: + 712:Drivers/CMSIS/Include/core_cm0.h **** { + 731 .loc 2 712 22 view .LVU164 + 732 .LBB47: + 714:Drivers/CMSIS/Include/core_cm0.h **** { + 733 .loc 2 714 3 view .LVU165 + 714:Drivers/CMSIS/Include/core_cm0.h **** { + 734 .loc 2 714 6 is_stmt 0 view .LVU166 + 735 0000 0028 cmp r0, #0 + 736 0002 07DB blt .L41 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 737 .loc 2 716 5 is_stmt 1 view .LVU167 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 738 .loc 2 716 58 is_stmt 0 view .LVU168 + 739 0004 1F22 movs r2, #31 + 740 0006 0240 ands r2, r0 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 741 .loc 2 716 22 view .LVU169 + 742 0008 0123 movs r3, #1 + 743 000a 9340 lsls r3, r3, r2 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 744 .loc 2 716 20 view .LVU170 + 745 000c 0249 ldr r1, .L43 + 746 000e C022 movs r2, #192 + 747 0010 5200 lsls r2, r2, #1 + 748 0012 8B50 str r3, [r1, r2] + 749 .LVL34: + 750 .L41: + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 751 .loc 2 716 20 view .LVU171 + 752 .LBE47: + 753 .LBE46: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 754 .loc 1 282 1 view .LVU172 + ARM GAS /tmp/ccU3iDhL.s page 52 + + + 755 @ sp needed + 756 0014 7047 bx lr + 757 .L44: + 758 0016 C046 .align 2 + 759 .L43: + 760 0018 00E100E0 .word -536813312 + 761 .cfi_endproc + 762 .LFE48: + 764 .section .text.HAL_SYSTICK_CLKSourceConfig,"ax",%progbits + 765 .align 1 + 766 .global HAL_SYSTICK_CLKSourceConfig + 767 .syntax unified + 768 .code 16 + 769 .thumb_func + 771 HAL_SYSTICK_CLKSourceConfig: + 772 .LVL35: + 773 .LFB49: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Configures the SysTick clock source. + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param CLKSource specifies the SysTick clock source. + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be one of the following values: + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 774 .loc 1 293 1 is_stmt 1 view -0 + 775 .cfi_startproc + 776 @ args = 0, pretend = 0, frame = 0 + 777 @ frame_needed = 0, uses_anonymous_args = 0 + 778 @ link register save eliminated. + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); + 779 .loc 1 295 3 view .LVU174 + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** if (CLKSource == SYSTICK_CLKSOURCE_HCLK) + 780 .loc 1 296 3 view .LVU175 + 781 .loc 1 296 6 is_stmt 0 view .LVU176 + 782 0000 0428 cmp r0, #4 + 783 0002 05D0 beq .L48 + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** else + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; + 784 .loc 1 302 5 is_stmt 1 view .LVU177 + 785 .loc 1 302 12 is_stmt 0 view .LVU178 + 786 0004 054A ldr r2, .L49 + 787 0006 1368 ldr r3, [r2] + 788 .loc 1 302 19 view .LVU179 + 789 0008 0421 movs r1, #4 + 790 000a 8B43 bics r3, r1 + 791 000c 1360 str r3, [r2] + 792 .L45: + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + ARM GAS /tmp/ccU3iDhL.s page 53 + + + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 793 .loc 1 304 1 view .LVU180 + 794 @ sp needed + 795 000e 7047 bx lr + 796 .L48: + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 797 .loc 1 298 5 is_stmt 1 view .LVU181 + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 798 .loc 1 298 12 is_stmt 0 view .LVU182 + 799 0010 024A ldr r2, .L49 + 800 0012 1368 ldr r3, [r2] + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 801 .loc 1 298 19 view .LVU183 + 802 0014 0421 movs r1, #4 + 803 0016 0B43 orrs r3, r1 + 804 0018 1360 str r3, [r2] + 805 001a F8E7 b .L45 + 806 .L50: + 807 .align 2 + 808 .L49: + 809 001c 10E000E0 .word -536813552 + 810 .cfi_endproc + 811 .LFE49: + 813 .section .text.HAL_SYSTICK_Callback,"ax",%progbits + 814 .align 1 + 815 .weak HAL_SYSTICK_Callback + 816 .syntax unified + 817 .code 16 + 818 .thumb_func + 820 HAL_SYSTICK_Callback: + 821 .LFB51: + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief This function handles SYSTICK interrupt request. + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_SYSTICK_IRQHandler(void) + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief SYSTICK callback. + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** __weak void HAL_SYSTICK_Callback(void) + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 822 .loc 1 320 1 is_stmt 1 view -0 + 823 .cfi_startproc + 824 @ args = 0, pretend = 0, frame = 0 + 825 @ frame_needed = 0, uses_anonymous_args = 0 + 826 @ link register save eliminated. + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** the HAL_SYSTICK_Callback could be implemented in the user file + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 827 .loc 1 324 1 view .LVU185 + ARM GAS /tmp/ccU3iDhL.s page 54 + + + 828 @ sp needed + 829 0000 7047 bx lr + 830 .cfi_endproc + 831 .LFE51: + 833 .section .text.HAL_SYSTICK_IRQHandler,"ax",%progbits + 834 .align 1 + 835 .global HAL_SYSTICK_IRQHandler + 836 .syntax unified + 837 .code 16 + 838 .thumb_func + 840 HAL_SYSTICK_IRQHandler: + 841 .LFB50: + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 842 .loc 1 311 1 view -0 + 843 .cfi_startproc + 844 @ args = 0, pretend = 0, frame = 0 + 845 @ frame_needed = 0, uses_anonymous_args = 0 + 846 0000 10B5 push {r4, lr} + 847 .cfi_def_cfa_offset 8 + 848 .cfi_offset 4, -8 + 849 .cfi_offset 14, -4 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 850 .loc 1 312 3 view .LVU187 + 851 0002 FFF7FEFF bl HAL_SYSTICK_Callback + 852 .LVL36: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 853 .loc 1 313 1 is_stmt 0 view .LVU188 + 854 @ sp needed + 855 0006 10BD pop {r4, pc} + 856 .cfi_endproc + 857 .LFE50: + 859 .text + 860 .Letext0: + 861 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 862 .file 5 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 863 .file 6 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + ARM GAS /tmp/ccU3iDhL.s page 55 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_cortex.c + /tmp/ccU3iDhL.s:19 .text.__NVIC_SetPriority:00000000 $t + /tmp/ccU3iDhL.s:24 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority + /tmp/ccU3iDhL.s:121 .text.__NVIC_SetPriority:00000058 $d + /tmp/ccU3iDhL.s:127 .text.__NVIC_GetPriority:00000000 $t + /tmp/ccU3iDhL.s:132 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority + /tmp/ccU3iDhL.s:199 .text.__NVIC_GetPriority:00000044 $d + /tmp/ccU3iDhL.s:205 .text.__NVIC_SystemReset:00000000 $t + /tmp/ccU3iDhL.s:210 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset + /tmp/ccU3iDhL.s:266 .text.__NVIC_SystemReset:00000014 $d + /tmp/ccU3iDhL.s:272 .text.SysTick_Config:00000000 $t + /tmp/ccU3iDhL.s:277 .text.SysTick_Config:00000000 SysTick_Config + /tmp/ccU3iDhL.s:346 .text.SysTick_Config:00000030 $d + /tmp/ccU3iDhL.s:352 .text.HAL_NVIC_SetPriority:00000000 $t + /tmp/ccU3iDhL.s:358 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority + /tmp/ccU3iDhL.s:382 .text.HAL_NVIC_EnableIRQ:00000000 $t + /tmp/ccU3iDhL.s:388 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ + /tmp/ccU3iDhL.s:427 .text.HAL_NVIC_EnableIRQ:00000014 $d + /tmp/ccU3iDhL.s:432 .text.HAL_NVIC_DisableIRQ:00000000 $t + /tmp/ccU3iDhL.s:438 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ + /tmp/ccU3iDhL.s:506 .text.HAL_NVIC_DisableIRQ:0000001c $d + /tmp/ccU3iDhL.s:511 .text.HAL_NVIC_SystemReset:00000000 $t + /tmp/ccU3iDhL.s:517 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset + /tmp/ccU3iDhL.s:535 .text.HAL_SYSTICK_Config:00000000 $t + /tmp/ccU3iDhL.s:541 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config + /tmp/ccU3iDhL.s:564 .text.HAL_NVIC_GetPriority:00000000 $t + /tmp/ccU3iDhL.s:570 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority + /tmp/ccU3iDhL.s:593 .text.HAL_NVIC_SetPendingIRQ:00000000 $t + /tmp/ccU3iDhL.s:599 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ + /tmp/ccU3iDhL.s:640 .text.HAL_NVIC_SetPendingIRQ:00000018 $d + /tmp/ccU3iDhL.s:645 .text.HAL_NVIC_GetPendingIRQ:00000000 $t + /tmp/ccU3iDhL.s:651 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ + /tmp/ccU3iDhL.s:708 .text.HAL_NVIC_GetPendingIRQ:0000001c $d + /tmp/ccU3iDhL.s:713 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t + /tmp/ccU3iDhL.s:719 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ + /tmp/ccU3iDhL.s:760 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d + /tmp/ccU3iDhL.s:765 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t + /tmp/ccU3iDhL.s:771 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig + /tmp/ccU3iDhL.s:809 .text.HAL_SYSTICK_CLKSourceConfig:0000001c $d + /tmp/ccU3iDhL.s:814 .text.HAL_SYSTICK_Callback:00000000 $t + /tmp/ccU3iDhL.s:820 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback + /tmp/ccU3iDhL.s:834 .text.HAL_SYSTICK_IRQHandler:00000000 $t + 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Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.lst new file mode 100644 index 0000000..b2c4ee3 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.lst @@ -0,0 +1,3197 @@ +ARM GAS /tmp/ccjh2HTn.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_dma.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c" + 18 .section .text.DMA_SetConfig,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 DMA_SetConfig: + 25 .LVL0: + 26 .LFB52: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @file stm32f0xx_hal_dma.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DMA HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral: + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + Initialization and de-initialization functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + IO operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + Peripheral State and errors functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### How to use this driver ##### + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** necessary). Please refer to Reference manual for connection between peripherals + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** and DMA requests . + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters: + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Transfer Direction, Source and Destination data formats, + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Circular or Normal mode, Channel Priority level, Source and Destination Increment mode, + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** using HAL_DMA_Init() function. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** detection. + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. + ARM GAS /tmp/ccjh2HTn.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** Polling mode IO operation *** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ================================= + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** address and destination address and the Length of data to be transferred + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** Interrupt mode IO operation *** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =================================== + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** In this case the DMA interrupt is configured + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** add his own function by customization of function pointer XferCpltCallback and + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** XferErrorCallback (i.e a member of DMA handle structure). + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** DMA HAL driver macros list *** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================= + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Below the list of most used macros in DMA HAL driver. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (@) You can refer to the DMA HAL driver header file for more useful macros + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @attention + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * Copyright (c) 2016 STMicroelectronics. + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * All rights reserved. + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * This software is licensed under terms that can be found in the LICENSE file in + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the root directory of this software component. + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/ + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #include "stm32f0xx_hal.h" + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @addtogroup STM32F0xx_HAL_Driver + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA DMA + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DMA HAL module driver + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED + ARM GAS /tmp/ccjh2HTn.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/ + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private define ------------------------------------------------------------*/ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Private_Functions DMA Private Functions + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Exported functions ---------------------------------------------------------*/ + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions DMA Exported Functions + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Initialization and de-initialization functions + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### Initialization and de-initialization functions ##### + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** This section provides functions allowing to initialize the DMA Channel source + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** and destination addresses, incrementation and data sizes, transfer direction, + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** circular/normal mode selection, memory-to-memory mode selection and Channel priority value. + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** The HAL_DMA_Init() function follows the DMA configuration procedures as described in + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** reference manual. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Initialize the DMA according to the specified + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and initialize the associated handle. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma Pointer to a DMA_HandleTypeDef structure that contains + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (NULL == hdma) + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccjh2HTn.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get the CR register value */ + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp = hdma->Instance->CCR; + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_DIR)); + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Prepare the DMA Channel configuration */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp |= hdma->Init.Direction | + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Write to DMA Channel CR register */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR = tmp; + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialize DmaBaseAddress and ChannelIndex parameters used + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialise the error code */ + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialize the DMA state*/ + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Allocate lock resource and initialize it */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED; + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DeInitialize the DMA peripheral + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (NULL == hdma) + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + ARM GAS /tmp/ccjh2HTn.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the selected DMA Channelx */ + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel control register */ + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR = 0U; + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel Number of Data to Transfer register */ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CNDTR = 0U; + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel peripheral address register */ + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = 0U; + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel memory address register */ + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = 0U; + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get DMA Base Address */ + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clean callbacks */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset the error code */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset the DMA state */ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET; + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief I/O operation functions + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### IO operation functions ##### + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] This section provides functions allowing to: + ARM GAS /tmp/ccjh2HTn.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the source, destination address and data length and + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Start DMA transfer with interrupt + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Abort DMA transfer + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Poll for transfer complete + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Handle DMA interrupt request + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Start the DMA Transfer. + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State) + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the peripheral */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the Peripheral */ + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Remain BUSY */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_BUSY; + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccjh2HTn.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled. + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State) + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the peripheral */ + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the transfer complete, & transfer error interrupts */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half transfer interrupt is optional: enable it only if associated callback is available */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (NULL != hdma->XferHalfCpltCallback) + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the Peripheral */ + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Remain BUSY */ + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_BUSY; + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccjh2HTn.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Abort the DMA Transfer. + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->State != HAL_DMA_STATE_BUSY) + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable DMA IT */ + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the channel */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state*/ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Abort the DMA Transfer in Interrupt mode. + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_BUSY != hdma->State) + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + ARM GAS /tmp/ccjh2HTn.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable DMA IT */ + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the channel */ + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Call User Abort callback */ + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->XferAbortCallback != NULL) + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback(hdma); + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Polling for transfer complete. + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CompleteLevel Specifies the DMA level complete. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param Timeout Timeout duration. + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tickstart = 0U; + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_BUSY != hdma->State) + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Polling mode not supported in circular mode */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC)) + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get the level transfer complete flag */ + ARM GAS /tmp/ccjh2HTn.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_FULL_TRANSFER == CompleteLevel) + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Complete flag */ + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** temp = DMA_FLAG_TC1 << hdma->ChannelIndex; + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half Transfer Complete flag */ + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** temp = DMA_FLAG_HT1 << hdma->ChannelIndex; + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get tick */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tickstart = HAL_GetTick(); + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** while (RESET == (hdma->DmaBaseAddress->ISR & temp)) + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))) + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check for the Timeout */ + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (Timeout != HAL_MAX_DELAY) + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_FULL_TRANSFER == CompleteLevel) + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the transfer complete flag */ + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + ARM GAS /tmp/ccjh2HTn.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** all transfers are complete) */ + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process unlocked */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Handle DMA interrupt request. + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval None + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/ + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_ + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the half transfer interrupt */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA peripheral state is not updated in Half Transfer */ + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* State is updated only in Transfer Complete case */ + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->XferHalfCpltCallback != NULL) + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half transfer callback */ + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma); + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/ + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DM + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the transfer complete & transfer error interrupts */ + ARM GAS /tmp/ccjh2HTn.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* if the DMA mode is not CIRCULAR */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE); + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the transfer complete flag */ + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->XferCpltCallback != NULL) + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer complete callback */ + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback(hdma); + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Error Interrupt management ***************************************/ + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else if ((RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DM + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Then, disable all DMA interrupts */ + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->XferErrorCallback != NULL) + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer error callback */ + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback(hdma); + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Register callbacks + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CallbackID User Callback identifier + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param pCallback pointer to private callback function which has pointer to + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a DMA_HandleTypeDef structure as parameter. + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + ARM GAS /tmp/ccjh2HTn.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State) + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** switch (CallbackID) + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = pCallback; + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = pCallback; + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = pCallback; + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = pCallback; + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** default: + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief UnRegister callbacks + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CallbackID User Callback identifier + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + ARM GAS /tmp/ccjh2HTn.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State) + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** switch (CallbackID) + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ALL_CB_ID: + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** default: + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Peripheral State functions + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### State and Errors functions ##### + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + ARM GAS /tmp/ccjh2HTn.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** This subsection provides functions allowing to + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Check the DMA state + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Get error code + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Returns the DMA state. + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL state + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->State; + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Return the DMA error code + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval DMA Error Code + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->ErrorCode; + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @addtogroup DMA_Private_Functions + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Set the DMA Transfer parameters. + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 27 .loc 1 826 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccjh2HTn.s page 16 + + + 31 .loc 1 826 1 is_stmt 0 view .LVU1 + 32 0000 70B5 push {r4, r5, r6, lr} + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 4, -16 + 35 .cfi_offset 5, -12 + 36 .cfi_offset 6, -8 + 37 .cfi_offset 14, -4 + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 38 .loc 1 828 3 is_stmt 1 view .LVU2 + 39 .loc 1 828 54 is_stmt 0 view .LVU3 + 40 0002 066C ldr r6, [r0, #64] + 41 .loc 1 828 7 view .LVU4 + 42 0004 C56B ldr r5, [r0, #60] + 43 .loc 1 828 47 view .LVU5 + 44 0006 0124 movs r4, #1 + 45 0008 B440 lsls r4, r4, r6 + 46 .loc 1 828 31 view .LVU6 + 47 000a 6C60 str r4, [r5, #4] + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel data length */ + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength; + 48 .loc 1 831 3 is_stmt 1 view .LVU7 + 49 .loc 1 831 7 is_stmt 0 view .LVU8 + 50 000c 0468 ldr r4, [r0] + 51 .loc 1 831 25 view .LVU9 + 52 000e 6360 str r3, [r4, #4] + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Memory to Peripheral */ + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) + 53 .loc 1 834 3 is_stmt 1 view .LVU10 + 54 .loc 1 834 18 is_stmt 0 view .LVU11 + 55 0010 4368 ldr r3, [r0, #4] + 56 .LVL1: + 57 .loc 1 834 6 view .LVU12 + 58 0012 102B cmp r3, #16 + 59 0014 04D0 beq .L4 + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress; + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel source address */ + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Peripheral to Memory */ + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel source address */ + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress; + 60 .loc 1 846 5 is_stmt 1 view .LVU13 + 61 .loc 1 846 9 is_stmt 0 view .LVU14 + 62 0016 0368 ldr r3, [r0] + 63 .loc 1 846 26 view .LVU15 + 64 0018 9960 str r1, [r3, #8] + 65 .LVL2: + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel destination address */ + ARM GAS /tmp/ccjh2HTn.s page 17 + + + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress; + 66 .loc 1 849 5 is_stmt 1 view .LVU16 + 67 .loc 1 849 9 is_stmt 0 view .LVU17 + 68 001a 0368 ldr r3, [r0] + 69 .loc 1 849 26 view .LVU18 + 70 001c DA60 str r2, [r3, #12] + 71 .L1: + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 72 .loc 1 851 1 view .LVU19 + 73 @ sp needed + 74 001e 70BD pop {r4, r5, r6, pc} + 75 .LVL3: + 76 .L4: + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 77 .loc 1 837 5 is_stmt 1 view .LVU20 + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 78 .loc 1 837 9 is_stmt 0 view .LVU21 + 79 0020 0368 ldr r3, [r0] + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 80 .loc 1 837 26 view .LVU22 + 81 0022 9A60 str r2, [r3, #8] + 82 .LVL4: + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 83 .loc 1 840 5 is_stmt 1 view .LVU23 + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 84 .loc 1 840 9 is_stmt 0 view .LVU24 + 85 0024 0368 ldr r3, [r0] + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 86 .loc 1 840 26 view .LVU25 + 87 0026 D960 str r1, [r3, #12] + 88 0028 F9E7 b .L1 + 89 .cfi_endproc + 90 .LFE52: + 92 .global __aeabi_uidiv + 93 .section .text.DMA_CalcBaseAndBitshift,"ax",%progbits + 94 .align 1 + 95 .syntax unified + 96 .code 16 + 97 .thumb_func + 99 DMA_CalcBaseAndBitshift: + 100 .LVL5: + 101 .LFB53: + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief set the DMA base address and channel index depending on DMA instance + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval None + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 102 .loc 1 860 1 is_stmt 1 view -0 + 103 .cfi_startproc + 104 @ args = 0, pretend = 0, frame = 0 + 105 @ frame_needed = 0, uses_anonymous_args = 0 + 106 .loc 1 860 1 is_stmt 0 view .LVU27 + ARM GAS /tmp/ccjh2HTn.s page 18 + + + 107 0000 10B5 push {r4, lr} + 108 .cfi_def_cfa_offset 8 + 109 .cfi_offset 4, -8 + 110 .cfi_offset 14, -4 + 111 0002 0400 movs r4, r0 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #if defined (DMA2) + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* calculation of the channel index */ + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA1 */ + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA2 */ + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2; + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #else + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* calculation of the channel index */ + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA1 */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chan + 112 .loc 1 878 3 is_stmt 1 view .LVU28 + 113 .loc 1 878 40 is_stmt 0 view .LVU29 + 114 0004 0068 ldr r0, [r0] + 115 .LVL6: + 116 .loc 1 878 51 view .LVU30 + 117 0006 054B ldr r3, .L6 + 118 0008 9C46 mov ip, r3 + 119 000a 6044 add r0, r0, ip + 120 .loc 1 878 78 view .LVU31 + 121 000c 1421 movs r1, #20 + 122 000e FFF7FEFF bl __aeabi_uidiv + 123 .LVL7: + 124 .loc 1 878 133 view .LVU32 + 125 0012 8000 lsls r0, r0, #2 + 126 .loc 1 878 22 view .LVU33 + 127 0014 2064 str r0, [r4, #64] + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 128 .loc 1 879 3 is_stmt 1 view .LVU34 + 129 .loc 1 879 24 is_stmt 0 view .LVU35 + 130 0016 024B ldr r3, .L6+4 + 131 0018 E363 str r3, [r4, #60] + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #endif + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 132 .loc 1 881 1 view .LVU36 + 133 @ sp needed + 134 .LVL8: + 135 .loc 1 881 1 view .LVU37 + 136 001a 10BD pop {r4, pc} + 137 .L7: + 138 .align 2 + 139 .L6: + 140 001c F8FFFDBF .word -1073872904 + 141 0020 00000240 .word 1073872896 + 142 .cfi_endproc + ARM GAS /tmp/ccjh2HTn.s page 19 + + + 143 .LFE53: + 145 .section .text.HAL_DMA_Init,"ax",%progbits + 146 .align 1 + 147 .global HAL_DMA_Init + 148 .syntax unified + 149 .code 16 + 150 .thumb_func + 152 HAL_DMA_Init: + 153 .LVL9: + 154 .LFB40: + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 155 .loc 1 138 1 is_stmt 1 view -0 + 156 .cfi_startproc + 157 @ args = 0, pretend = 0, frame = 0 + 158 @ frame_needed = 0, uses_anonymous_args = 0 + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 159 .loc 1 138 1 is_stmt 0 view .LVU39 + 160 0000 70B5 push {r4, r5, r6, lr} + 161 .cfi_def_cfa_offset 16 + 162 .cfi_offset 4, -16 + 163 .cfi_offset 5, -12 + 164 .cfi_offset 6, -8 + 165 .cfi_offset 14, -4 + 166 0002 041E subs r4, r0, #0 + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 167 .loc 1 139 3 is_stmt 1 view .LVU40 + 168 .LVL10: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 169 .loc 1 142 3 view .LVU41 + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 170 .loc 1 142 6 is_stmt 0 view .LVU42 + 171 0004 20D0 beq .L10 + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 172 .loc 1 148 3 is_stmt 1 view .LVU43 + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 173 .loc 1 149 3 view .LVU44 + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 174 .loc 1 150 3 view .LVU45 + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 175 .loc 1 151 3 view .LVU46 + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 176 .loc 1 152 3 view .LVU47 + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 177 .loc 1 153 3 view .LVU48 + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 178 .loc 1 154 3 view .LVU49 + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 179 .loc 1 155 3 view .LVU50 + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 180 .loc 1 158 3 view .LVU51 + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 181 .loc 1 158 15 is_stmt 0 view .LVU52 + 182 0006 2125 movs r5, #33 + 183 0008 0223 movs r3, #2 + 184 000a 4355 strb r3, [r0, r5] + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 185 .loc 1 161 3 is_stmt 1 view .LVU53 + ARM GAS /tmp/ccjh2HTn.s page 20 + + + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 186 .loc 1 161 13 is_stmt 0 view .LVU54 + 187 000c 0168 ldr r1, [r0] + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 188 .loc 1 161 7 view .LVU55 + 189 000e 0A68 ldr r2, [r1] + 190 .LVL11: + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 191 .loc 1 164 3 is_stmt 1 view .LVU56 + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 192 .loc 1 164 7 is_stmt 0 view .LVU57 + 193 0010 0E4B ldr r3, .L11 + 194 0012 1A40 ands r2, r3 + 195 .LVL12: + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 196 .loc 1 169 3 is_stmt 1 view .LVU58 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 197 .loc 1 169 21 is_stmt 0 view .LVU59 + 198 0014 4368 ldr r3, [r0, #4] + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 199 .loc 1 170 21 view .LVU60 + 200 0016 8068 ldr r0, [r0, #8] + 201 .LVL13: + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 202 .loc 1 169 39 view .LVU61 + 203 0018 0343 orrs r3, r0 + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 204 .loc 1 170 54 view .LVU62 + 205 001a E068 ldr r0, [r4, #12] + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 206 .loc 1 170 42 view .LVU63 + 207 001c 0343 orrs r3, r0 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 208 .loc 1 171 21 view .LVU64 + 209 001e 2069 ldr r0, [r4, #16] + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 210 .loc 1 170 72 view .LVU65 + 211 0020 0343 orrs r3, r0 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 212 .loc 1 171 54 view .LVU66 + 213 0022 6069 ldr r0, [r4, #20] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 214 .loc 1 171 42 view .LVU67 + 215 0024 0343 orrs r3, r0 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 216 .loc 1 172 21 view .LVU68 + 217 0026 A069 ldr r0, [r4, #24] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 218 .loc 1 171 72 view .LVU69 + 219 0028 0343 orrs r3, r0 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 220 .loc 1 172 54 view .LVU70 + 221 002a E069 ldr r0, [r4, #28] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 222 .loc 1 172 42 view .LVU71 + 223 002c 0343 orrs r3, r0 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + ARM GAS /tmp/ccjh2HTn.s page 21 + + + 224 .loc 1 169 7 view .LVU72 + 225 002e 1343 orrs r3, r2 + 226 .LVL14: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 227 .loc 1 175 3 is_stmt 1 view .LVU73 + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 228 .loc 1 175 23 is_stmt 0 view .LVU74 + 229 0030 0B60 str r3, [r1] + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 230 .loc 1 179 3 is_stmt 1 view .LVU75 + 231 0032 2000 movs r0, r4 + 232 0034 FFF7FEFF bl DMA_CalcBaseAndBitshift + 233 .LVL15: + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 234 .loc 1 182 3 view .LVU76 + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 235 .loc 1 182 19 is_stmt 0 view .LVU77 + 236 0038 0023 movs r3, #0 + 237 003a A363 str r3, [r4, #56] + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 238 .loc 1 185 3 is_stmt 1 view .LVU78 + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 239 .loc 1 185 15 is_stmt 0 view .LVU79 + 240 003c 0122 movs r2, #1 + 241 003e 6255 strb r2, [r4, r5] + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 242 .loc 1 188 3 is_stmt 1 view .LVU80 + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 243 .loc 1 188 14 is_stmt 0 view .LVU81 + 244 0040 1F32 adds r2, r2, #31 + 245 0042 A354 strb r3, [r4, r2] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 246 .loc 1 190 3 is_stmt 1 view .LVU82 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 247 .loc 1 190 10 is_stmt 0 view .LVU83 + 248 0044 0020 movs r0, #0 + 249 .LVL16: + 250 .L9: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 251 .loc 1 191 1 view .LVU84 + 252 @ sp needed + 253 .LVL17: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 254 .loc 1 191 1 view .LVU85 + 255 0046 70BD pop {r4, r5, r6, pc} + 256 .LVL18: + 257 .L10: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 258 .loc 1 144 12 view .LVU86 + 259 0048 0120 movs r0, #1 + 260 .LVL19: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 261 .loc 1 144 12 view .LVU87 + 262 004a FCE7 b .L9 + 263 .L12: + 264 .align 2 + 265 .L11: + ARM GAS /tmp/ccjh2HTn.s page 22 + + + 266 004c 0FC0FFFF .word -16369 + 267 .cfi_endproc + 268 .LFE40: + 270 .section .text.HAL_DMA_DeInit,"ax",%progbits + 271 .align 1 + 272 .global HAL_DMA_DeInit + 273 .syntax unified + 274 .code 16 + 275 .thumb_func + 277 HAL_DMA_DeInit: + 278 .LVL20: + 279 .LFB41: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 280 .loc 1 200 1 is_stmt 1 view -0 + 281 .cfi_startproc + 282 @ args = 0, pretend = 0, frame = 0 + 283 @ frame_needed = 0, uses_anonymous_args = 0 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 284 .loc 1 200 1 is_stmt 0 view .LVU89 + 285 0000 70B5 push {r4, r5, r6, lr} + 286 .cfi_def_cfa_offset 16 + 287 .cfi_offset 4, -16 + 288 .cfi_offset 5, -12 + 289 .cfi_offset 6, -8 + 290 .cfi_offset 14, -4 + 291 0002 041E subs r4, r0, #0 + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 292 .loc 1 202 3 is_stmt 1 view .LVU90 + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 293 .loc 1 202 6 is_stmt 0 view .LVU91 + 294 0004 1ED0 beq .L15 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 295 .loc 1 208 3 is_stmt 1 view .LVU92 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 296 .loc 1 211 3 view .LVU93 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 297 .loc 1 211 7 is_stmt 0 view .LVU94 + 298 0006 0268 ldr r2, [r0] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 299 .loc 1 211 17 view .LVU95 + 300 0008 1368 ldr r3, [r2] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 301 .loc 1 211 23 view .LVU96 + 302 000a 0126 movs r6, #1 + 303 000c B343 bics r3, r6 + 304 000e 1360 str r3, [r2] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 305 .loc 1 214 3 is_stmt 1 view .LVU97 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 306 .loc 1 214 7 is_stmt 0 view .LVU98 + 307 0010 0368 ldr r3, [r0] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 308 .loc 1 214 24 view .LVU99 + 309 0012 0025 movs r5, #0 + 310 0014 1D60 str r5, [r3] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 311 .loc 1 217 3 is_stmt 1 view .LVU100 + ARM GAS /tmp/ccjh2HTn.s page 23 + + + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 312 .loc 1 217 7 is_stmt 0 view .LVU101 + 313 0016 0368 ldr r3, [r0] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 314 .loc 1 217 25 view .LVU102 + 315 0018 5D60 str r5, [r3, #4] + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 316 .loc 1 220 3 is_stmt 1 view .LVU103 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 317 .loc 1 220 7 is_stmt 0 view .LVU104 + 318 001a 0368 ldr r3, [r0] + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 319 .loc 1 220 25 view .LVU105 + 320 001c 9D60 str r5, [r3, #8] + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 321 .loc 1 223 3 is_stmt 1 view .LVU106 + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 322 .loc 1 223 7 is_stmt 0 view .LVU107 + 323 001e 0368 ldr r3, [r0] + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 324 .loc 1 223 24 view .LVU108 + 325 0020 DD60 str r5, [r3, #12] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 326 .loc 1 226 3 is_stmt 1 view .LVU109 + 327 0022 FFF7FEFF bl DMA_CalcBaseAndBitshift + 328 .LVL21: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 329 .loc 1 229 3 view .LVU110 + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 330 .loc 1 229 52 is_stmt 0 view .LVU111 + 331 0026 226C ldr r2, [r4, #64] + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 332 .loc 1 229 7 view .LVU112 + 333 0028 E36B ldr r3, [r4, #60] + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 334 .loc 1 229 45 view .LVU113 + 335 002a 9640 lsls r6, r6, r2 + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 336 .loc 1 229 30 view .LVU114 + 337 002c 5E60 str r6, [r3, #4] + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 338 .loc 1 232 3 is_stmt 1 view .LVU115 + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 339 .loc 1 232 26 is_stmt 0 view .LVU116 + 340 002e A562 str r5, [r4, #40] + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 341 .loc 1 233 3 is_stmt 1 view .LVU117 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 342 .loc 1 233 30 is_stmt 0 view .LVU118 + 343 0030 E562 str r5, [r4, #44] + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 344 .loc 1 234 3 is_stmt 1 view .LVU119 + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 345 .loc 1 234 27 is_stmt 0 view .LVU120 + 346 0032 2563 str r5, [r4, #48] + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 347 .loc 1 235 3 is_stmt 1 view .LVU121 + ARM GAS /tmp/ccjh2HTn.s page 24 + + + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 348 .loc 1 235 27 is_stmt 0 view .LVU122 + 349 0034 6563 str r5, [r4, #52] + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 350 .loc 1 238 3 is_stmt 1 view .LVU123 + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 351 .loc 1 238 19 is_stmt 0 view .LVU124 + 352 0036 A563 str r5, [r4, #56] + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 353 .loc 1 241 3 is_stmt 1 view .LVU125 + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 354 .loc 1 241 15 is_stmt 0 view .LVU126 + 355 0038 2123 movs r3, #33 + 356 003a E554 strb r5, [r4, r3] + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 357 .loc 1 244 3 is_stmt 1 view .LVU127 + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 358 .loc 1 244 3 view .LVU128 + 359 003c 013B subs r3, r3, #1 + 360 003e E554 strb r5, [r4, r3] + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 361 .loc 1 244 3 view .LVU129 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 362 .loc 1 246 3 view .LVU130 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 363 .loc 1 246 10 is_stmt 0 view .LVU131 + 364 0040 0020 movs r0, #0 + 365 .L14: + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 366 .loc 1 247 1 view .LVU132 + 367 @ sp needed + 368 .LVL22: + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 369 .loc 1 247 1 view .LVU133 + 370 0042 70BD pop {r4, r5, r6, pc} + 371 .LVL23: + 372 .L15: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 373 .loc 1 204 12 view .LVU134 + 374 0044 0120 movs r0, #1 + 375 .LVL24: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 376 .loc 1 204 12 view .LVU135 + 377 0046 FCE7 b .L14 + 378 .cfi_endproc + 379 .LFE41: + 381 .section .text.HAL_DMA_Start,"ax",%progbits + 382 .align 1 + 383 .global HAL_DMA_Start + 384 .syntax unified + 385 .code 16 + 386 .thumb_func + 388 HAL_DMA_Start: + 389 .LVL25: + 390 .LFB42: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 391 .loc 1 282 1 is_stmt 1 view -0 + ARM GAS /tmp/ccjh2HTn.s page 25 + + + 392 .cfi_startproc + 393 @ args = 0, pretend = 0, frame = 0 + 394 @ frame_needed = 0, uses_anonymous_args = 0 + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 395 .loc 1 282 1 is_stmt 0 view .LVU137 + 396 0000 70B5 push {r4, r5, r6, lr} + 397 .cfi_def_cfa_offset 16 + 398 .cfi_offset 4, -16 + 399 .cfi_offset 5, -12 + 400 .cfi_offset 6, -8 + 401 .cfi_offset 14, -4 + 402 0002 0400 movs r4, r0 + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 403 .loc 1 283 3 is_stmt 1 view .LVU138 + 404 .LVL26: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 405 .loc 1 286 3 view .LVU139 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 406 .loc 1 289 3 view .LVU140 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 407 .loc 1 289 3 view .LVU141 + 408 0004 2020 movs r0, #32 + 409 .LVL27: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 410 .loc 1 289 3 is_stmt 0 view .LVU142 + 411 0006 205C ldrb r0, [r4, r0] + 412 0008 0128 cmp r0, #1 + 413 000a 1ED0 beq .L19 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 414 .loc 1 289 3 is_stmt 1 discriminator 2 view .LVU143 + 415 000c 2020 movs r0, #32 + 416 000e 0125 movs r5, #1 + 417 0010 2554 strb r5, [r4, r0] + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 418 .loc 1 289 3 discriminator 2 view .LVU144 + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 419 .loc 1 291 3 view .LVU145 + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 420 .loc 1 291 34 is_stmt 0 view .LVU146 + 421 0012 0130 adds r0, r0, #1 + 422 0014 205C ldrb r0, [r4, r0] + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 423 .loc 1 291 6 view .LVU147 + 424 0016 0128 cmp r0, #1 + 425 0018 04D0 beq .L20 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 426 .loc 1 310 5 is_stmt 1 view .LVU148 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 427 .loc 1 310 5 view .LVU149 + 428 001a 2023 movs r3, #32 + 429 .LVL28: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 430 .loc 1 310 5 is_stmt 0 view .LVU150 + 431 001c 0022 movs r2, #0 + 432 .LVL29: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 433 .loc 1 310 5 view .LVU151 + ARM GAS /tmp/ccjh2HTn.s page 26 + + + 434 001e E254 strb r2, [r4, r3] + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 435 .loc 1 310 5 is_stmt 1 view .LVU152 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 436 .loc 1 313 5 view .LVU153 + 437 .LVL30: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 438 .loc 1 313 12 is_stmt 0 view .LVU154 + 439 0020 0220 movs r0, #2 + 440 .LVL31: + 441 .L17: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 442 .loc 1 317 1 view .LVU155 + 443 @ sp needed + 444 .LVL32: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 445 .loc 1 317 1 view .LVU156 + 446 0022 70BD pop {r4, r5, r6, pc} + 447 .LVL33: + 448 .L20: + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 449 .loc 1 294 5 is_stmt 1 view .LVU157 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 450 .loc 1 294 17 is_stmt 0 view .LVU158 + 451 0024 2030 adds r0, r0, #32 + 452 0026 0135 adds r5, r5, #1 + 453 0028 2554 strb r5, [r4, r0] + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 454 .loc 1 296 5 is_stmt 1 view .LVU159 + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 455 .loc 1 296 21 is_stmt 0 view .LVU160 + 456 002a 0020 movs r0, #0 + 457 002c A063 str r0, [r4, #56] + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 458 .loc 1 299 5 is_stmt 1 view .LVU161 + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 459 .loc 1 299 9 is_stmt 0 view .LVU162 + 460 002e 2668 ldr r6, [r4] + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 461 .loc 1 299 19 view .LVU163 + 462 0030 3068 ldr r0, [r6] + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 463 .loc 1 299 25 view .LVU164 + 464 0032 013D subs r5, r5, #1 + 465 0034 A843 bics r0, r5 + 466 0036 3060 str r0, [r6] + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 467 .loc 1 302 5 is_stmt 1 view .LVU165 + 468 0038 2000 movs r0, r4 + 469 003a FFF7FEFF bl DMA_SetConfig + 470 .LVL34: + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 471 .loc 1 305 5 view .LVU166 + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 472 .loc 1 305 9 is_stmt 0 view .LVU167 + 473 003e 2268 ldr r2, [r4] + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccjh2HTn.s page 27 + + + 474 .loc 1 305 19 view .LVU168 + 475 0040 1368 ldr r3, [r2] + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 476 .loc 1 305 25 view .LVU169 + 477 0042 2B43 orrs r3, r5 + 478 0044 1360 str r3, [r2] + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 479 .loc 1 283 21 view .LVU170 + 480 0046 0020 movs r0, #0 + 481 0048 EBE7 b .L17 + 482 .LVL35: + 483 .L19: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 484 .loc 1 289 3 discriminator 1 view .LVU171 + 485 004a 0220 movs r0, #2 + 486 004c E9E7 b .L17 + 487 .cfi_endproc + 488 .LFE42: + 490 .section .text.HAL_DMA_Start_IT,"ax",%progbits + 491 .align 1 + 492 .global HAL_DMA_Start_IT + 493 .syntax unified + 494 .code 16 + 495 .thumb_func + 497 HAL_DMA_Start_IT: + 498 .LVL36: + 499 .LFB43: + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 500 .loc 1 329 1 is_stmt 1 view -0 + 501 .cfi_startproc + 502 @ args = 0, pretend = 0, frame = 0 + 503 @ frame_needed = 0, uses_anonymous_args = 0 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 504 .loc 1 329 1 is_stmt 0 view .LVU173 + 505 0000 70B5 push {r4, r5, r6, lr} + 506 .cfi_def_cfa_offset 16 + 507 .cfi_offset 4, -16 + 508 .cfi_offset 5, -12 + 509 .cfi_offset 6, -8 + 510 .cfi_offset 14, -4 + 511 0002 0400 movs r4, r0 + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 512 .loc 1 330 3 is_stmt 1 view .LVU174 + 513 .LVL37: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 514 .loc 1 333 3 view .LVU175 + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 515 .loc 1 336 3 view .LVU176 + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 516 .loc 1 336 3 view .LVU177 + 517 0004 2020 movs r0, #32 + 518 .LVL38: + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 519 .loc 1 336 3 is_stmt 0 view .LVU178 + 520 0006 205C ldrb r0, [r4, r0] + 521 0008 0128 cmp r0, #1 + 522 000a 32D0 beq .L26 + ARM GAS /tmp/ccjh2HTn.s page 28 + + + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 523 .loc 1 336 3 is_stmt 1 discriminator 2 view .LVU179 + 524 000c 2020 movs r0, #32 + 525 000e 0125 movs r5, #1 + 526 0010 2554 strb r5, [r4, r0] + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 527 .loc 1 336 3 discriminator 2 view .LVU180 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 528 .loc 1 338 3 view .LVU181 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 529 .loc 1 338 34 is_stmt 0 view .LVU182 + 530 0012 0130 adds r0, r0, #1 + 531 0014 205C ldrb r0, [r4, r0] + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 532 .loc 1 338 6 view .LVU183 + 533 0016 0128 cmp r0, #1 + 534 0018 04D0 beq .L27 + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 535 .loc 1 369 5 is_stmt 1 view .LVU184 + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 536 .loc 1 369 5 view .LVU185 + 537 001a 2023 movs r3, #32 + 538 .LVL39: + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 539 .loc 1 369 5 is_stmt 0 view .LVU186 + 540 001c 0022 movs r2, #0 + 541 .LVL40: + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 542 .loc 1 369 5 view .LVU187 + 543 001e E254 strb r2, [r4, r3] + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 544 .loc 1 369 5 is_stmt 1 view .LVU188 + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 545 .loc 1 372 5 view .LVU189 + 546 .LVL41: + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 547 .loc 1 372 12 is_stmt 0 view .LVU190 + 548 0020 0220 movs r0, #2 + 549 .LVL42: + 550 .L22: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 551 .loc 1 376 1 view .LVU191 + 552 @ sp needed + 553 .LVL43: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 554 .loc 1 376 1 view .LVU192 + 555 0022 70BD pop {r4, r5, r6, pc} + 556 .LVL44: + 557 .L27: + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 558 .loc 1 341 5 is_stmt 1 view .LVU193 + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 559 .loc 1 341 17 is_stmt 0 view .LVU194 + 560 0024 2030 adds r0, r0, #32 + 561 0026 0135 adds r5, r5, #1 + 562 0028 2554 strb r5, [r4, r0] + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccjh2HTn.s page 29 + + + 563 .loc 1 343 5 is_stmt 1 view .LVU195 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 564 .loc 1 343 21 is_stmt 0 view .LVU196 + 565 002a 0020 movs r0, #0 + 566 002c A063 str r0, [r4, #56] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 567 .loc 1 346 5 is_stmt 1 view .LVU197 + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 568 .loc 1 346 9 is_stmt 0 view .LVU198 + 569 002e 2568 ldr r5, [r4] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 570 .loc 1 346 19 view .LVU199 + 571 0030 2868 ldr r0, [r5] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 572 .loc 1 346 25 view .LVU200 + 573 0032 0126 movs r6, #1 + 574 0034 B043 bics r0, r6 + 575 0036 2860 str r0, [r5] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 576 .loc 1 349 5 is_stmt 1 view .LVU201 + 577 0038 2000 movs r0, r4 + 578 003a FFF7FEFF bl DMA_SetConfig + 579 .LVL45: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 580 .loc 1 353 5 view .LVU202 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 581 .loc 1 353 21 is_stmt 0 view .LVU203 + 582 003e E36A ldr r3, [r4, #44] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 583 .loc 1 353 8 view .LVU204 + 584 0040 002B cmp r3, #0 + 585 0042 0BD0 beq .L24 + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 586 .loc 1 355 7 is_stmt 1 view .LVU205 + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 587 .loc 1 355 11 is_stmt 0 view .LVU206 + 588 0044 2268 ldr r2, [r4] + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 589 .loc 1 355 21 view .LVU207 + 590 0046 1368 ldr r3, [r2] + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 591 .loc 1 355 27 view .LVU208 + 592 0048 0E21 movs r1, #14 + 593 004a 0B43 orrs r3, r1 + 594 004c 1360 str r3, [r2] + 595 .L25: + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 596 .loc 1 364 5 is_stmt 1 view .LVU209 + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 597 .loc 1 364 9 is_stmt 0 view .LVU210 + 598 004e 2268 ldr r2, [r4] + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 599 .loc 1 364 19 view .LVU211 + 600 0050 1368 ldr r3, [r2] + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 601 .loc 1 364 25 view .LVU212 + 602 0052 0121 movs r1, #1 + ARM GAS /tmp/ccjh2HTn.s page 30 + + + 603 0054 0B43 orrs r3, r1 + 604 0056 1360 str r3, [r2] + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 605 .loc 1 330 21 view .LVU213 + 606 0058 0020 movs r0, #0 + 607 005a E2E7 b .L22 + 608 .L24: + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 609 .loc 1 359 7 is_stmt 1 view .LVU214 + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 610 .loc 1 359 11 is_stmt 0 view .LVU215 + 611 005c 2268 ldr r2, [r4] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 612 .loc 1 359 21 view .LVU216 + 613 005e 1368 ldr r3, [r2] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 614 .loc 1 359 27 view .LVU217 + 615 0060 0A21 movs r1, #10 + 616 0062 0B43 orrs r3, r1 + 617 0064 1360 str r3, [r2] + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 618 .loc 1 360 7 is_stmt 1 view .LVU218 + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 619 .loc 1 360 11 is_stmt 0 view .LVU219 + 620 0066 2268 ldr r2, [r4] + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 621 .loc 1 360 21 view .LVU220 + 622 0068 1368 ldr r3, [r2] + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 623 .loc 1 360 27 view .LVU221 + 624 006a 0639 subs r1, r1, #6 + 625 006c 8B43 bics r3, r1 + 626 006e 1360 str r3, [r2] + 627 0070 EDE7 b .L25 + 628 .LVL46: + 629 .L26: + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 630 .loc 1 336 3 discriminator 1 view .LVU222 + 631 0072 0220 movs r0, #2 + 632 0074 D5E7 b .L22 + 633 .cfi_endproc + 634 .LFE43: + 636 .section .text.HAL_DMA_Abort,"ax",%progbits + 637 .align 1 + 638 .global HAL_DMA_Abort + 639 .syntax unified + 640 .code 16 + 641 .thumb_func + 643 HAL_DMA_Abort: + 644 .LVL47: + 645 .LFB44: + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->State != HAL_DMA_STATE_BUSY) + 646 .loc 1 385 1 is_stmt 1 view -0 + 647 .cfi_startproc + 648 @ args = 0, pretend = 0, frame = 0 + 649 @ frame_needed = 0, uses_anonymous_args = 0 + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->State != HAL_DMA_STATE_BUSY) + ARM GAS /tmp/ccjh2HTn.s page 31 + + + 650 .loc 1 385 1 is_stmt 0 view .LVU224 + 651 0000 10B5 push {r4, lr} + 652 .cfi_def_cfa_offset 8 + 653 .cfi_offset 4, -8 + 654 .cfi_offset 14, -4 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 655 .loc 1 386 3 is_stmt 1 view .LVU225 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 656 .loc 1 386 11 is_stmt 0 view .LVU226 + 657 0002 2123 movs r3, #33 + 658 0004 C35C ldrb r3, [r0, r3] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 659 .loc 1 386 6 view .LVU227 + 660 0006 022B cmp r3, #2 + 661 0008 06D0 beq .L29 + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 662 .loc 1 389 5 is_stmt 1 view .LVU228 + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 663 .loc 1 389 21 is_stmt 0 view .LVU229 + 664 000a 0423 movs r3, #4 + 665 000c 8363 str r3, [r0, #56] + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 666 .loc 1 392 5 is_stmt 1 view .LVU230 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 667 .loc 1 392 5 view .LVU231 + 668 000e 1C33 adds r3, r3, #28 + 669 0010 0022 movs r2, #0 + 670 0012 C254 strb r2, [r0, r3] + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 671 .loc 1 392 5 view .LVU232 + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 672 .loc 1 394 5 view .LVU233 + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 673 .loc 1 394 12 is_stmt 0 view .LVU234 + 674 0014 0120 movs r0, #1 + 675 .LVL48: + 676 .L30: + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 677 .loc 1 414 1 view .LVU235 + 678 @ sp needed + 679 0016 10BD pop {r4, pc} + 680 .LVL49: + 681 .L29: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 682 .loc 1 399 5 is_stmt 1 view .LVU236 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 683 .loc 1 399 9 is_stmt 0 view .LVU237 + 684 0018 0268 ldr r2, [r0] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 685 .loc 1 399 19 view .LVU238 + 686 001a 1368 ldr r3, [r2] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 687 .loc 1 399 25 view .LVU239 + 688 001c 0E21 movs r1, #14 + 689 001e 8B43 bics r3, r1 + 690 0020 1360 str r3, [r2] + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccjh2HTn.s page 32 + + + 691 .loc 1 402 5 is_stmt 1 view .LVU240 + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 692 .loc 1 402 9 is_stmt 0 view .LVU241 + 693 0022 0168 ldr r1, [r0] + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 694 .loc 1 402 19 view .LVU242 + 695 0024 0A68 ldr r2, [r1] + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 696 .loc 1 402 25 view .LVU243 + 697 0026 0123 movs r3, #1 + 698 0028 9A43 bics r2, r3 + 699 002a 0A60 str r2, [r1] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 700 .loc 1 405 5 is_stmt 1 view .LVU244 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 701 .loc 1 405 55 is_stmt 0 view .LVU245 + 702 002c 016C ldr r1, [r0, #64] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 703 .loc 1 405 9 view .LVU246 + 704 002e C26B ldr r2, [r0, #60] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 705 .loc 1 405 48 view .LVU247 + 706 0030 1C00 movs r4, r3 + 707 0032 8C40 lsls r4, r4, r1 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 708 .loc 1 405 32 view .LVU248 + 709 0034 5460 str r4, [r2, #4] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 710 .loc 1 408 3 is_stmt 1 view .LVU249 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 711 .loc 1 408 15 is_stmt 0 view .LVU250 + 712 0036 2122 movs r2, #33 + 713 0038 8354 strb r3, [r0, r2] + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 714 .loc 1 411 3 is_stmt 1 view .LVU251 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 715 .loc 1 411 3 view .LVU252 + 716 003a 1F33 adds r3, r3, #31 + 717 003c 0022 movs r2, #0 + 718 003e C254 strb r2, [r0, r3] + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 719 .loc 1 411 3 view .LVU253 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 720 .loc 1 413 3 view .LVU254 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 721 .loc 1 413 10 is_stmt 0 view .LVU255 + 722 0040 0020 movs r0, #0 + 723 .LVL50: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 724 .loc 1 413 10 view .LVU256 + 725 0042 E8E7 b .L30 + 726 .cfi_endproc + 727 .LFE44: + 729 .section .text.HAL_DMA_Abort_IT,"ax",%progbits + 730 .align 1 + 731 .global HAL_DMA_Abort_IT + 732 .syntax unified + ARM GAS /tmp/ccjh2HTn.s page 33 + + + 733 .code 16 + 734 .thumb_func + 736 HAL_DMA_Abort_IT: + 737 .LVL51: + 738 .LFB45: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 739 .loc 1 423 1 is_stmt 1 view -0 + 740 .cfi_startproc + 741 @ args = 0, pretend = 0, frame = 0 + 742 @ frame_needed = 0, uses_anonymous_args = 0 + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 743 .loc 1 423 1 is_stmt 0 view .LVU258 + 744 0000 10B5 push {r4, lr} + 745 .cfi_def_cfa_offset 8 + 746 .cfi_offset 4, -8 + 747 .cfi_offset 14, -4 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 748 .loc 1 424 3 is_stmt 1 view .LVU259 + 749 .LVL52: + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 750 .loc 1 426 3 view .LVU260 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 751 .loc 1 426 33 is_stmt 0 view .LVU261 + 752 0002 2123 movs r3, #33 + 753 0004 C35C ldrb r3, [r0, r3] + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 754 .loc 1 426 6 view .LVU262 + 755 0006 022B cmp r3, #2 + 756 0008 03D0 beq .L32 + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 757 .loc 1 429 5 is_stmt 1 view .LVU263 + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 758 .loc 1 429 21 is_stmt 0 view .LVU264 + 759 000a 0423 movs r3, #4 + 760 000c 8363 str r3, [r0, #56] + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 761 .loc 1 431 5 is_stmt 1 view .LVU265 + 762 .LVL53: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 763 .loc 1 431 12 is_stmt 0 view .LVU266 + 764 000e 0120 movs r0, #1 + 765 .LVL54: + 766 .L33: + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 767 .loc 1 457 3 is_stmt 1 view .LVU267 + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 768 .loc 1 458 1 is_stmt 0 view .LVU268 + 769 @ sp needed + 770 0010 10BD pop {r4, pc} + 771 .LVL55: + 772 .L32: + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 773 .loc 1 437 5 is_stmt 1 view .LVU269 + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 774 .loc 1 437 9 is_stmt 0 view .LVU270 + 775 0012 0268 ldr r2, [r0] + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccjh2HTn.s page 34 + + + 776 .loc 1 437 19 view .LVU271 + 777 0014 1368 ldr r3, [r2] + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 778 .loc 1 437 25 view .LVU272 + 779 0016 0E21 movs r1, #14 + 780 0018 8B43 bics r3, r1 + 781 001a 1360 str r3, [r2] + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 782 .loc 1 440 5 is_stmt 1 view .LVU273 + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 783 .loc 1 440 9 is_stmt 0 view .LVU274 + 784 001c 0168 ldr r1, [r0] + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 785 .loc 1 440 19 view .LVU275 + 786 001e 0A68 ldr r2, [r1] + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 787 .loc 1 440 25 view .LVU276 + 788 0020 0123 movs r3, #1 + 789 0022 9A43 bics r2, r3 + 790 0024 0A60 str r2, [r1] + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 791 .loc 1 443 5 is_stmt 1 view .LVU277 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 792 .loc 1 443 54 is_stmt 0 view .LVU278 + 793 0026 016C ldr r1, [r0, #64] + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 794 .loc 1 443 9 view .LVU279 + 795 0028 C26B ldr r2, [r0, #60] + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 796 .loc 1 443 47 view .LVU280 + 797 002a 1C00 movs r4, r3 + 798 002c 8C40 lsls r4, r4, r1 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 799 .loc 1 443 32 view .LVU281 + 800 002e 5460 str r4, [r2, #4] + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 801 .loc 1 446 5 is_stmt 1 view .LVU282 + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 802 .loc 1 446 17 is_stmt 0 view .LVU283 + 803 0030 2122 movs r2, #33 + 804 0032 8354 strb r3, [r0, r2] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 805 .loc 1 449 5 is_stmt 1 view .LVU284 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 806 .loc 1 449 5 view .LVU285 + 807 0034 1F33 adds r3, r3, #31 + 808 0036 0022 movs r2, #0 + 809 0038 C254 strb r2, [r0, r3] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 810 .loc 1 449 5 view .LVU286 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 811 .loc 1 452 5 view .LVU287 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 812 .loc 1 452 13 is_stmt 0 view .LVU288 + 813 003a 436B ldr r3, [r0, #52] + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 814 .loc 1 452 8 view .LVU289 + ARM GAS /tmp/ccjh2HTn.s page 35 + + + 815 003c 002B cmp r3, #0 + 816 003e 02D0 beq .L34 + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 817 .loc 1 454 7 is_stmt 1 view .LVU290 + 818 0040 9847 blx r3 + 819 .LVL56: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 820 .loc 1 424 21 is_stmt 0 view .LVU291 + 821 0042 0020 movs r0, #0 + 822 0044 E4E7 b .L33 + 823 .LVL57: + 824 .L34: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 825 .loc 1 424 21 view .LVU292 + 826 0046 0020 movs r0, #0 + 827 .LVL58: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 828 .loc 1 424 21 view .LVU293 + 829 0048 E2E7 b .L33 + 830 .cfi_endproc + 831 .LFE45: + 833 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits + 834 .align 1 + 835 .global HAL_DMA_PollForTransfer + 836 .syntax unified + 837 .code 16 + 838 .thumb_func + 840 HAL_DMA_PollForTransfer: + 841 .LVL59: + 842 .LFB46: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 843 .loc 1 469 1 is_stmt 1 view -0 + 844 .cfi_startproc + 845 @ args = 0, pretend = 0, frame = 8 + 846 @ frame_needed = 0, uses_anonymous_args = 0 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 847 .loc 1 469 1 is_stmt 0 view .LVU295 + 848 0000 F0B5 push {r4, r5, r6, r7, lr} + 849 .cfi_def_cfa_offset 20 + 850 .cfi_offset 4, -20 + 851 .cfi_offset 5, -16 + 852 .cfi_offset 6, -12 + 853 .cfi_offset 7, -8 + 854 .cfi_offset 14, -4 + 855 0002 83B0 sub sp, sp, #12 + 856 .cfi_def_cfa_offset 32 + 857 0004 0600 movs r6, r0 + 858 0006 0C00 movs r4, r1 + 859 0008 1700 movs r7, r2 + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tickstart = 0U; + 860 .loc 1 470 3 is_stmt 1 view .LVU296 + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 861 .loc 1 471 3 view .LVU297 + 862 .LVL60: + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 863 .loc 1 473 3 view .LVU298 + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + ARM GAS /tmp/ccjh2HTn.s page 36 + + + 864 .loc 1 473 33 is_stmt 0 view .LVU299 + 865 000a 2123 movs r3, #33 + 866 000c C35C ldrb r3, [r0, r3] + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 867 .loc 1 473 6 view .LVU300 + 868 000e 022B cmp r3, #2 + 869 0010 07D0 beq .L36 + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 870 .loc 1 476 5 is_stmt 1 view .LVU301 + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 871 .loc 1 476 21 is_stmt 0 view .LVU302 + 872 0012 0423 movs r3, #4 + 873 0014 8363 str r3, [r0, #56] + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 874 .loc 1 477 5 is_stmt 1 view .LVU303 + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 875 .loc 1 477 5 view .LVU304 + 876 0016 1C33 adds r3, r3, #28 + 877 0018 0022 movs r2, #0 + 878 .LVL61: + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 879 .loc 1 477 5 is_stmt 0 view .LVU305 + 880 001a C254 strb r2, [r0, r3] + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 881 .loc 1 477 5 is_stmt 1 view .LVU306 + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 882 .loc 1 478 5 view .LVU307 + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 883 .loc 1 478 12 is_stmt 0 view .LVU308 + 884 001c 0120 movs r0, #1 + 885 .LVL62: + 886 .L37: + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 887 .loc 1 561 1 view .LVU309 + 888 001e 03B0 add sp, sp, #12 + 889 @ sp needed + 890 .LVL63: + 891 .LVL64: + 892 .LVL65: + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 893 .loc 1 561 1 view .LVU310 + 894 0020 F0BD pop {r4, r5, r6, r7, pc} + 895 .LVL66: + 896 .L36: + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 897 .loc 1 482 3 is_stmt 1 view .LVU311 + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 898 .loc 1 482 21 is_stmt 0 view .LVU312 + 899 0022 0368 ldr r3, [r0] + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 900 .loc 1 482 31 view .LVU313 + 901 0024 1B68 ldr r3, [r3] + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 902 .loc 1 482 6 view .LVU314 + 903 0026 9B06 lsls r3, r3, #26 + 904 0028 24D4 bmi .L49 + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + ARM GAS /tmp/ccjh2HTn.s page 37 + + + 905 .loc 1 489 3 is_stmt 1 view .LVU315 + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 906 .loc 1 489 6 is_stmt 0 view .LVU316 + 907 002a 0029 cmp r1, #0 + 908 002c 27D1 bne .L39 + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 909 .loc 1 492 5 is_stmt 1 view .LVU317 + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 910 .loc 1 492 32 is_stmt 0 view .LVU318 + 911 002e 036C ldr r3, [r0, #64] + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 912 .loc 1 492 10 view .LVU319 + 913 0030 0225 movs r5, #2 + 914 0032 9D40 lsls r5, r5, r3 + 915 .LVL67: + 916 .L40: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 917 .loc 1 501 3 is_stmt 1 view .LVU320 + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 918 .loc 1 501 15 is_stmt 0 view .LVU321 + 919 0034 FFF7FEFF bl HAL_GetTick + 920 .LVL68: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 921 .loc 1 501 15 view .LVU322 + 922 0038 0190 str r0, [sp, #4] + 923 .LVL69: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 924 .loc 1 503 3 is_stmt 1 view .LVU323 + 925 .L43: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 926 .loc 1 503 16 view .LVU324 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 927 .loc 1 503 24 is_stmt 0 view .LVU325 + 928 003a F16B ldr r1, [r6, #60] + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 929 .loc 1 503 40 view .LVU326 + 930 003c 0B68 ldr r3, [r1] + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 931 .loc 1 503 16 view .LVU327 + 932 003e 1D42 tst r5, r3 + 933 0040 2DD1 bne .L50 + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 934 .loc 1 505 5 is_stmt 1 view .LVU328 + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 935 .loc 1 505 39 is_stmt 0 view .LVU329 + 936 0042 0868 ldr r0, [r1] + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 937 .loc 1 505 68 view .LVU330 + 938 0044 326C ldr r2, [r6, #64] + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 939 .loc 1 505 61 view .LVU331 + 940 0046 0823 movs r3, #8 + 941 0048 9340 lsls r3, r3, r2 + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 942 .loc 1 505 8 view .LVU332 + 943 004a 0342 tst r3, r0 + 944 004c 1BD1 bne .L51 + ARM GAS /tmp/ccjh2HTn.s page 38 + + + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 945 .loc 1 524 5 is_stmt 1 view .LVU333 + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 946 .loc 1 524 8 is_stmt 0 view .LVU334 + 947 004e 7B1C adds r3, r7, #1 + 948 0050 F3D0 beq .L43 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 949 .loc 1 526 7 is_stmt 1 view .LVU335 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 950 .loc 1 526 10 is_stmt 0 view .LVU336 + 951 0052 002F cmp r7, #0 + 952 0054 05D0 beq .L44 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 953 .loc 1 526 32 discriminator 1 view .LVU337 + 954 0056 FFF7FEFF bl HAL_GetTick + 955 .LVL70: + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 956 .loc 1 526 46 discriminator 1 view .LVU338 + 957 005a 019B ldr r3, [sp, #4] + 958 005c C01A subs r0, r0, r3 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 959 .loc 1 526 27 discriminator 1 view .LVU339 + 960 005e B842 cmp r0, r7 + 961 0060 EBD9 bls .L43 + 962 .L44: + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 963 .loc 1 529 9 is_stmt 1 view .LVU340 + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 964 .loc 1 529 25 is_stmt 0 view .LVU341 + 965 0062 2023 movs r3, #32 + 966 0064 B363 str r3, [r6, #56] + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 967 .loc 1 532 9 is_stmt 1 view .LVU342 + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 968 .loc 1 532 21 is_stmt 0 view .LVU343 + 969 0066 2122 movs r2, #33 + 970 0068 0121 movs r1, #1 + 971 006a B154 strb r1, [r6, r2] + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 972 .loc 1 535 9 is_stmt 1 view .LVU344 + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 973 .loc 1 535 9 view .LVU345 + 974 006c 0022 movs r2, #0 + 975 006e F254 strb r2, [r6, r3] + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 976 .loc 1 535 9 view .LVU346 + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 977 .loc 1 537 9 view .LVU347 + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 978 .loc 1 537 16 is_stmt 0 view .LVU348 + 979 0070 0120 movs r0, #1 + 980 0072 D4E7 b .L37 + 981 .LVL71: + 982 .L49: + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 983 .loc 1 484 5 is_stmt 1 view .LVU349 + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + ARM GAS /tmp/ccjh2HTn.s page 39 + + + 984 .loc 1 484 21 is_stmt 0 view .LVU350 + 985 0074 8023 movs r3, #128 + 986 0076 5B00 lsls r3, r3, #1 + 987 0078 8363 str r3, [r0, #56] + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 988 .loc 1 485 5 is_stmt 1 view .LVU351 + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 989 .loc 1 485 12 is_stmt 0 view .LVU352 + 990 007a 0120 movs r0, #1 + 991 .LVL72: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 992 .loc 1 485 12 view .LVU353 + 993 007c CFE7 b .L37 + 994 .LVL73: + 995 .L39: + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 996 .loc 1 497 5 is_stmt 1 view .LVU354 + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 997 .loc 1 497 32 is_stmt 0 view .LVU355 + 998 007e 036C ldr r3, [r0, #64] + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 999 .loc 1 497 10 view .LVU356 + 1000 0080 0425 movs r5, #4 + 1001 0082 9D40 lsls r5, r5, r3 + 1002 .LVL74: + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1003 .loc 1 497 10 view .LVU357 + 1004 0084 D6E7 b .L40 + 1005 .LVL75: + 1006 .L51: + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1007 .loc 1 510 7 is_stmt 1 view .LVU358 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1008 .loc 1 510 49 is_stmt 0 view .LVU359 + 1009 0086 0123 movs r3, #1 + 1010 0088 1800 movs r0, r3 + 1011 008a 9040 lsls r0, r0, r2 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1012 .loc 1 510 34 view .LVU360 + 1013 008c 4860 str r0, [r1, #4] + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1014 .loc 1 513 7 is_stmt 1 view .LVU361 + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1015 .loc 1 513 23 is_stmt 0 view .LVU362 + 1016 008e B363 str r3, [r6, #56] + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1017 .loc 1 516 7 is_stmt 1 view .LVU363 + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1018 .loc 1 516 19 is_stmt 0 view .LVU364 + 1019 0090 2122 movs r2, #33 + 1020 0092 B354 strb r3, [r6, r2] + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1021 .loc 1 519 7 is_stmt 1 view .LVU365 + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1022 .loc 1 519 7 view .LVU366 + 1023 0094 1F33 adds r3, r3, #31 + 1024 0096 0022 movs r2, #0 + ARM GAS /tmp/ccjh2HTn.s page 40 + + + 1025 0098 F254 strb r2, [r6, r3] + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1026 .loc 1 519 7 view .LVU367 + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1027 .loc 1 521 7 view .LVU368 + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1028 .loc 1 521 14 is_stmt 0 view .LVU369 + 1029 009a 0120 movs r0, #1 + 1030 009c BFE7 b .L37 + 1031 .L50: + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1032 .loc 1 542 3 is_stmt 1 view .LVU370 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1033 .loc 1 542 6 is_stmt 0 view .LVU371 + 1034 009e 002C cmp r4, #0 + 1035 00a0 0BD1 bne .L46 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1036 .loc 1 545 5 is_stmt 1 view .LVU372 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1037 .loc 1 545 54 is_stmt 0 view .LVU373 + 1038 00a2 326C ldr r2, [r6, #64] + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1039 .loc 1 545 47 view .LVU374 + 1040 00a4 0223 movs r3, #2 + 1041 00a6 9340 lsls r3, r3, r2 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1042 .loc 1 545 32 view .LVU375 + 1043 00a8 4B60 str r3, [r1, #4] + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1044 .loc 1 549 5 is_stmt 1 view .LVU376 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1045 .loc 1 549 17 is_stmt 0 view .LVU377 + 1046 00aa 2123 movs r3, #33 + 1047 00ac 0122 movs r2, #1 + 1048 00ae F254 strb r2, [r6, r3] + 1049 .L47: + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1050 .loc 1 558 3 is_stmt 1 view .LVU378 + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1051 .loc 1 558 3 view .LVU379 + 1052 00b0 2023 movs r3, #32 + 1053 00b2 0022 movs r2, #0 + 1054 00b4 F254 strb r2, [r6, r3] + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1055 .loc 1 558 3 view .LVU380 + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1056 .loc 1 560 3 view .LVU381 + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1057 .loc 1 560 10 is_stmt 0 view .LVU382 + 1058 00b6 0020 movs r0, #0 + 1059 00b8 B1E7 b .L37 + 1060 .L46: + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1061 .loc 1 554 5 is_stmt 1 view .LVU383 + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1062 .loc 1 554 54 is_stmt 0 view .LVU384 + 1063 00ba 326C ldr r2, [r6, #64] + ARM GAS /tmp/ccjh2HTn.s page 41 + + + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1064 .loc 1 554 47 view .LVU385 + 1065 00bc 0423 movs r3, #4 + 1066 00be 9340 lsls r3, r3, r2 + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1067 .loc 1 554 32 view .LVU386 + 1068 00c0 4B60 str r3, [r1, #4] + 1069 00c2 F5E7 b .L47 + 1070 .cfi_endproc + 1071 .LFE46: + 1073 .section .text.HAL_DMA_IRQHandler,"ax",%progbits + 1074 .align 1 + 1075 .global HAL_DMA_IRQHandler + 1076 .syntax unified + 1077 .code 16 + 1078 .thumb_func + 1080 HAL_DMA_IRQHandler: + 1081 .LVL76: + 1082 .LFB47: + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 1083 .loc 1 570 1 is_stmt 1 view -0 + 1084 .cfi_startproc + 1085 @ args = 0, pretend = 0, frame = 0 + 1086 @ frame_needed = 0, uses_anonymous_args = 0 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 1087 .loc 1 570 1 is_stmt 0 view .LVU388 + 1088 0000 70B5 push {r4, r5, r6, lr} + 1089 .cfi_def_cfa_offset 16 + 1090 .cfi_offset 4, -16 + 1091 .cfi_offset 5, -12 + 1092 .cfi_offset 6, -8 + 1093 .cfi_offset 14, -4 + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1094 .loc 1 571 3 is_stmt 1 view .LVU389 + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1095 .loc 1 571 26 is_stmt 0 view .LVU390 + 1096 0002 C36B ldr r3, [r0, #60] + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1097 .loc 1 571 12 view .LVU391 + 1098 0004 1A68 ldr r2, [r3] + 1099 .LVL77: + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1100 .loc 1 572 3 is_stmt 1 view .LVU392 + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1101 .loc 1 572 28 is_stmt 0 view .LVU393 + 1102 0006 0468 ldr r4, [r0] + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1103 .loc 1 572 12 view .LVU394 + 1104 0008 2568 ldr r5, [r4] + 1105 .LVL78: + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1106 .loc 1 575 3 is_stmt 1 view .LVU395 + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1107 .loc 1 575 49 is_stmt 0 view .LVU396 + 1108 000a 016C ldr r1, [r0, #64] + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1109 .loc 1 575 42 view .LVU397 + ARM GAS /tmp/ccjh2HTn.s page 42 + + + 1110 000c 0423 movs r3, #4 + 1111 000e 8B40 lsls r3, r3, r1 + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1112 .loc 1 575 6 view .LVU398 + 1113 0010 1A42 tst r2, r3 + 1114 0012 12D0 beq .L53 + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1115 .loc 1 575 67 discriminator 1 view .LVU399 + 1116 0014 6B07 lsls r3, r5, #29 + 1117 0016 10D5 bpl .L53 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1118 .loc 1 578 5 is_stmt 1 view .LVU400 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1119 .loc 1 578 24 is_stmt 0 view .LVU401 + 1120 0018 2368 ldr r3, [r4] + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1121 .loc 1 578 8 view .LVU402 + 1122 001a 9B06 lsls r3, r3, #26 + 1123 001c 03D4 bmi .L54 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1124 .loc 1 581 7 is_stmt 1 view .LVU403 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1125 .loc 1 581 21 is_stmt 0 view .LVU404 + 1126 001e 2368 ldr r3, [r4] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1127 .loc 1 581 27 view .LVU405 + 1128 0020 0422 movs r2, #4 + 1129 .LVL79: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1130 .loc 1 581 27 view .LVU406 + 1131 0022 9343 bics r3, r2 + 1132 0024 2360 str r3, [r4] + 1133 .L54: + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1134 .loc 1 585 5 is_stmt 1 view .LVU407 + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1135 .loc 1 585 54 is_stmt 0 view .LVU408 + 1136 0026 016C ldr r1, [r0, #64] + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1137 .loc 1 585 9 view .LVU409 + 1138 0028 C26B ldr r2, [r0, #60] + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1139 .loc 1 585 47 view .LVU410 + 1140 002a 0423 movs r3, #4 + 1141 002c 8B40 lsls r3, r3, r1 + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1142 .loc 1 585 32 view .LVU411 + 1143 002e 5360 str r3, [r2, #4] + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1144 .loc 1 590 5 is_stmt 1 view .LVU412 + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1145 .loc 1 590 13 is_stmt 0 view .LVU413 + 1146 0030 C36A ldr r3, [r0, #44] + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1147 .loc 1 590 8 view .LVU414 + 1148 0032 002B cmp r3, #0 + 1149 0034 00D0 beq .L52 + ARM GAS /tmp/ccjh2HTn.s page 43 + + + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1150 .loc 1 593 7 is_stmt 1 view .LVU415 + 1151 0036 9847 blx r3 + 1152 .LVL80: + 1153 .L52: + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1154 .loc 1 649 1 is_stmt 0 view .LVU416 + 1155 @ sp needed + 1156 0038 70BD pop {r4, r5, r6, pc} + 1157 .LVL81: + 1158 .L53: + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1159 .loc 1 598 8 is_stmt 1 view .LVU417 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1160 .loc 1 598 47 is_stmt 0 view .LVU418 + 1161 003a 0223 movs r3, #2 + 1162 003c 8B40 lsls r3, r3, r1 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1163 .loc 1 598 11 view .LVU419 + 1164 003e 1A42 tst r2, r3 + 1165 0040 18D0 beq .L56 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1166 .loc 1 598 72 discriminator 1 view .LVU420 + 1167 0042 AB07 lsls r3, r5, #30 + 1168 0044 16D5 bpl .L56 + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1169 .loc 1 600 5 is_stmt 1 view .LVU421 + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1170 .loc 1 600 24 is_stmt 0 view .LVU422 + 1171 0046 2368 ldr r3, [r4] + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1172 .loc 1 600 8 view .LVU423 + 1173 0048 9B06 lsls r3, r3, #26 + 1174 004a 06D4 bmi .L57 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1175 .loc 1 604 7 is_stmt 1 view .LVU424 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1176 .loc 1 604 21 is_stmt 0 view .LVU425 + 1177 004c 2368 ldr r3, [r4] + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1178 .loc 1 604 27 view .LVU426 + 1179 004e 0A22 movs r2, #10 + 1180 .LVL82: + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1181 .loc 1 604 27 view .LVU427 + 1182 0050 9343 bics r3, r2 + 1183 0052 2360 str r3, [r4] + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1184 .loc 1 607 7 is_stmt 1 view .LVU428 + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1185 .loc 1 607 19 is_stmt 0 view .LVU429 + 1186 0054 2123 movs r3, #33 + 1187 0056 093A subs r2, r2, #9 + 1188 0058 C254 strb r2, [r0, r3] + 1189 .L57: + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1190 .loc 1 611 5 is_stmt 1 view .LVU430 + ARM GAS /tmp/ccjh2HTn.s page 44 + + + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1191 .loc 1 611 54 is_stmt 0 view .LVU431 + 1192 005a 016C ldr r1, [r0, #64] + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1193 .loc 1 611 9 view .LVU432 + 1194 005c C26B ldr r2, [r0, #60] + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1195 .loc 1 611 47 view .LVU433 + 1196 005e 0223 movs r3, #2 + 1197 0060 8B40 lsls r3, r3, r1 + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1198 .loc 1 611 32 view .LVU434 + 1199 0062 5360 str r3, [r2, #4] + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1200 .loc 1 614 5 is_stmt 1 view .LVU435 + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1201 .loc 1 614 5 view .LVU436 + 1202 0064 2023 movs r3, #32 + 1203 0066 0022 movs r2, #0 + 1204 0068 C254 strb r2, [r0, r3] + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1205 .loc 1 614 5 view .LVU437 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1206 .loc 1 616 5 view .LVU438 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1207 .loc 1 616 13 is_stmt 0 view .LVU439 + 1208 006a 836A ldr r3, [r0, #40] + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1209 .loc 1 616 8 view .LVU440 + 1210 006c 002B cmp r3, #0 + 1211 006e E3D0 beq .L52 + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1212 .loc 1 619 7 is_stmt 1 view .LVU441 + 1213 0070 9847 blx r3 + 1214 .LVL83: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1215 .loc 1 619 7 is_stmt 0 view .LVU442 + 1216 0072 E1E7 b .L52 + 1217 .LVL84: + 1218 .L56: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1219 .loc 1 624 8 is_stmt 1 view .LVU443 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1220 .loc 1 624 47 is_stmt 0 view .LVU444 + 1221 0074 0823 movs r3, #8 + 1222 0076 8B40 lsls r3, r3, r1 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1223 .loc 1 624 11 view .LVU445 + 1224 0078 1A42 tst r2, r3 + 1225 007a DDD0 beq .L52 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1226 .loc 1 624 72 discriminator 1 view .LVU446 + 1227 007c 2D07 lsls r5, r5, #28 + 1228 007e DBD5 bpl .L52 + 1229 .LVL85: + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1230 .loc 1 629 5 is_stmt 1 view .LVU447 + ARM GAS /tmp/ccjh2HTn.s page 45 + + + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1231 .loc 1 629 19 is_stmt 0 view .LVU448 + 1232 0080 2368 ldr r3, [r4] + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1233 .loc 1 629 25 view .LVU449 + 1234 0082 0E22 movs r2, #14 + 1235 .LVL86: + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1236 .loc 1 629 25 view .LVU450 + 1237 0084 9343 bics r3, r2 + 1238 0086 2360 str r3, [r4] + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1239 .loc 1 632 5 is_stmt 1 view .LVU451 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1240 .loc 1 632 54 is_stmt 0 view .LVU452 + 1241 0088 016C ldr r1, [r0, #64] + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1242 .loc 1 632 9 view .LVU453 + 1243 008a C26B ldr r2, [r0, #60] + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1244 .loc 1 632 47 view .LVU454 + 1245 008c 0123 movs r3, #1 + 1246 008e 1C00 movs r4, r3 + 1247 0090 8C40 lsls r4, r4, r1 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1248 .loc 1 632 32 view .LVU455 + 1249 0092 5460 str r4, [r2, #4] + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1250 .loc 1 635 5 is_stmt 1 view .LVU456 + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1251 .loc 1 635 21 is_stmt 0 view .LVU457 + 1252 0094 8363 str r3, [r0, #56] + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1253 .loc 1 638 5 is_stmt 1 view .LVU458 + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1254 .loc 1 638 17 is_stmt 0 view .LVU459 + 1255 0096 2122 movs r2, #33 + 1256 0098 8354 strb r3, [r0, r2] + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1257 .loc 1 641 5 is_stmt 1 view .LVU460 + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1258 .loc 1 641 5 view .LVU461 + 1259 009a 1F33 adds r3, r3, #31 + 1260 009c 0022 movs r2, #0 + 1261 009e C254 strb r2, [r0, r3] + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1262 .loc 1 641 5 view .LVU462 + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1263 .loc 1 643 5 view .LVU463 + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1264 .loc 1 643 13 is_stmt 0 view .LVU464 + 1265 00a0 036B ldr r3, [r0, #48] + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1266 .loc 1 643 8 view .LVU465 + 1267 00a2 002B cmp r3, #0 + 1268 00a4 C8D0 beq .L52 + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccjh2HTn.s page 46 + + + 1269 .loc 1 646 7 is_stmt 1 view .LVU466 + 1270 00a6 9847 blx r3 + 1271 .LVL87: + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1272 .loc 1 649 1 is_stmt 0 view .LVU467 + 1273 00a8 C6E7 b .L52 + 1274 .cfi_endproc + 1275 .LFE47: + 1277 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits + 1278 .align 1 + 1279 .global HAL_DMA_RegisterCallback + 1280 .syntax unified + 1281 .code 16 + 1282 .thumb_func + 1284 HAL_DMA_RegisterCallback: + 1285 .LVL88: + 1286 .LFB48: + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1287 .loc 1 662 1 is_stmt 1 view -0 + 1288 .cfi_startproc + 1289 @ args = 0, pretend = 0, frame = 0 + 1290 @ frame_needed = 0, uses_anonymous_args = 0 + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1291 .loc 1 662 1 is_stmt 0 view .LVU469 + 1292 0000 10B5 push {r4, lr} + 1293 .cfi_def_cfa_offset 8 + 1294 .cfi_offset 4, -8 + 1295 .cfi_offset 14, -4 + 1296 0002 0300 movs r3, r0 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1297 .loc 1 663 3 is_stmt 1 view .LVU470 + 1298 .LVL89: + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1299 .loc 1 666 3 view .LVU471 + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1300 .loc 1 666 3 view .LVU472 + 1301 0004 2020 movs r0, #32 + 1302 .LVL90: + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1303 .loc 1 666 3 is_stmt 0 view .LVU473 + 1304 0006 185C ldrb r0, [r3, r0] + 1305 0008 0128 cmp r0, #1 + 1306 000a 21D0 beq .L71 + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1307 .loc 1 666 3 is_stmt 1 discriminator 2 view .LVU474 + 1308 000c 2020 movs r0, #32 + 1309 000e 0124 movs r4, #1 + 1310 0010 1C54 strb r4, [r3, r0] + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1311 .loc 1 666 3 discriminator 2 view .LVU475 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1312 .loc 1 668 3 view .LVU476 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1313 .loc 1 668 34 is_stmt 0 view .LVU477 + 1314 0012 0130 adds r0, r0, #1 + 1315 0014 1C5C ldrb r4, [r3, r0] + 1316 0016 E0B2 uxtb r0, r4 + ARM GAS /tmp/ccjh2HTn.s page 47 + + + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1317 .loc 1 668 6 view .LVU478 + 1318 0018 012C cmp r4, #1 + 1319 001a 04D0 beq .L73 + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1320 .loc 1 695 12 view .LVU479 + 1321 001c 0120 movs r0, #1 + 1322 .L65: + 1323 .LVL91: + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1324 .loc 1 699 3 is_stmt 1 view .LVU480 + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1325 .loc 1 699 3 view .LVU481 + 1326 001e 2022 movs r2, #32 + 1327 .LVL92: + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1328 .loc 1 699 3 is_stmt 0 view .LVU482 + 1329 0020 0021 movs r1, #0 + 1330 .LVL93: + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1331 .loc 1 699 3 view .LVU483 + 1332 0022 9954 strb r1, [r3, r2] + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1333 .loc 1 699 3 is_stmt 1 view .LVU484 + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1334 .loc 1 701 3 view .LVU485 + 1335 .LVL94: + 1336 .L64: + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1337 .loc 1 702 1 is_stmt 0 view .LVU486 + 1338 @ sp needed + 1339 0024 10BD pop {r4, pc} + 1340 .LVL95: + 1341 .L73: + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1342 .loc 1 670 5 is_stmt 1 view .LVU487 + 1343 0026 0229 cmp r1, #2 + 1344 0028 0FD0 beq .L66 + 1345 002a 06D8 bhi .L67 + 1346 002c 0029 cmp r1, #0 + 1347 002e 09D0 beq .L68 + 1348 0030 0129 cmp r1, #1 + 1349 0032 F4D1 bne .L65 + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1350 .loc 1 677 9 view .LVU488 + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1351 .loc 1 677 36 is_stmt 0 view .LVU489 + 1352 0034 DA62 str r2, [r3, #44] + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1353 .loc 1 678 9 is_stmt 1 view .LVU490 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1354 .loc 1 663 21 is_stmt 0 view .LVU491 + 1355 0036 0020 movs r0, #0 + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1356 .loc 1 678 9 view .LVU492 + 1357 0038 F1E7 b .L65 + 1358 .L67: + ARM GAS /tmp/ccjh2HTn.s page 48 + + + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1359 .loc 1 670 5 view .LVU493 + 1360 003a 0329 cmp r1, #3 + 1361 003c EFD1 bne .L65 + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1362 .loc 1 685 9 is_stmt 1 view .LVU494 + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1363 .loc 1 685 33 is_stmt 0 view .LVU495 + 1364 003e 5A63 str r2, [r3, #52] + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1365 .loc 1 686 9 is_stmt 1 view .LVU496 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1366 .loc 1 663 21 is_stmt 0 view .LVU497 + 1367 0040 0020 movs r0, #0 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1368 .loc 1 686 9 view .LVU498 + 1369 0042 ECE7 b .L65 + 1370 .L68: + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1371 .loc 1 673 9 is_stmt 1 view .LVU499 + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1372 .loc 1 673 32 is_stmt 0 view .LVU500 + 1373 0044 9A62 str r2, [r3, #40] + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1374 .loc 1 674 9 is_stmt 1 view .LVU501 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1375 .loc 1 663 21 is_stmt 0 view .LVU502 + 1376 0046 0800 movs r0, r1 + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1377 .loc 1 674 9 view .LVU503 + 1378 0048 E9E7 b .L65 + 1379 .L66: + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1380 .loc 1 681 9 is_stmt 1 view .LVU504 + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1381 .loc 1 681 33 is_stmt 0 view .LVU505 + 1382 004a 1A63 str r2, [r3, #48] + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1383 .loc 1 682 9 is_stmt 1 view .LVU506 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1384 .loc 1 663 21 is_stmt 0 view .LVU507 + 1385 004c 0020 movs r0, #0 + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1386 .loc 1 682 9 view .LVU508 + 1387 004e E6E7 b .L65 + 1388 .L71: + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1389 .loc 1 666 3 discriminator 1 view .LVU509 + 1390 0050 0220 movs r0, #2 + 1391 0052 E7E7 b .L64 + 1392 .cfi_endproc + 1393 .LFE48: + 1395 .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits + 1396 .align 1 + 1397 .global HAL_DMA_UnRegisterCallback + 1398 .syntax unified + 1399 .code 16 + ARM GAS /tmp/ccjh2HTn.s page 49 + + + 1400 .thumb_func + 1402 HAL_DMA_UnRegisterCallback: + 1403 .LVL96: + 1404 .LFB49: + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1405 .loc 1 713 1 is_stmt 1 view -0 + 1406 .cfi_startproc + 1407 @ args = 0, pretend = 0, frame = 0 + 1408 @ frame_needed = 0, uses_anonymous_args = 0 + 1409 @ link register save eliminated. + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1410 .loc 1 713 1 is_stmt 0 view .LVU511 + 1411 0000 0300 movs r3, r0 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1412 .loc 1 714 3 is_stmt 1 view .LVU512 + 1413 .LVL97: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1414 .loc 1 717 3 view .LVU513 + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1415 .loc 1 717 3 view .LVU514 + 1416 0002 2022 movs r2, #32 + 1417 0004 825C ldrb r2, [r0, r2] + 1418 0006 012A cmp r2, #1 + 1419 0008 29D0 beq .L83 + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1420 .loc 1 717 3 discriminator 2 view .LVU515 + 1421 000a 2022 movs r2, #32 + 1422 000c 0120 movs r0, #1 + 1423 .LVL98: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1424 .loc 1 717 3 is_stmt 0 discriminator 2 view .LVU516 + 1425 000e 9854 strb r0, [r3, r2] + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1426 .loc 1 717 3 is_stmt 1 discriminator 2 view .LVU517 + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1427 .loc 1 719 3 view .LVU518 + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1428 .loc 1 719 34 is_stmt 0 view .LVU519 + 1429 0010 0132 adds r2, r2, #1 + 1430 0012 9A5C ldrb r2, [r3, r2] + 1431 0014 D0B2 uxtb r0, r2 + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1432 .loc 1 719 6 view .LVU520 + 1433 0016 012A cmp r2, #1 + 1434 0018 04D0 beq .L85 + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1435 .loc 1 753 12 view .LVU521 + 1436 001a 0120 movs r0, #1 + 1437 .L76: + 1438 .LVL99: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1439 .loc 1 757 3 is_stmt 1 view .LVU522 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1440 .loc 1 757 3 view .LVU523 + 1441 001c 2022 movs r2, #32 + 1442 001e 0021 movs r1, #0 + 1443 .LVL100: + ARM GAS /tmp/ccjh2HTn.s page 50 + + + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1444 .loc 1 757 3 is_stmt 0 view .LVU524 + 1445 0020 9954 strb r1, [r3, r2] + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1446 .loc 1 757 3 is_stmt 1 view .LVU525 + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1447 .loc 1 759 3 view .LVU526 + 1448 .LVL101: + 1449 .L75: + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1450 .loc 1 760 1 is_stmt 0 view .LVU527 + 1451 @ sp needed + 1452 0022 7047 bx lr + 1453 .LVL102: + 1454 .L85: + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1455 .loc 1 721 5 is_stmt 1 view .LVU528 + 1456 0024 0429 cmp r1, #4 + 1457 0026 F9D8 bhi .L76 + 1458 0028 8A00 lsls r2, r1, #2 + 1459 002a 0E48 ldr r0, .L86 + 1460 002c 8258 ldr r2, [r0, r2] + 1461 002e 9746 mov pc, r2 + 1462 .section .rodata.HAL_DMA_UnRegisterCallback,"a",%progbits + 1463 .align 2 + 1464 .L78: + 1465 0000 30000000 .word .L82 + 1466 0004 38000000 .word .L81 + 1467 0008 40000000 .word .L80 + 1468 000c 48000000 .word .L79 + 1469 0010 50000000 .word .L77 + 1470 .section .text.HAL_DMA_UnRegisterCallback + 1471 .L82: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1472 .loc 1 724 9 view .LVU529 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1473 .loc 1 724 32 is_stmt 0 view .LVU530 + 1474 0030 0022 movs r2, #0 + 1475 0032 9A62 str r2, [r3, #40] + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1476 .loc 1 725 9 is_stmt 1 view .LVU531 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1477 .loc 1 714 21 is_stmt 0 view .LVU532 + 1478 0034 0800 movs r0, r1 + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1479 .loc 1 725 9 view .LVU533 + 1480 0036 F1E7 b .L76 + 1481 .L81: + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1482 .loc 1 728 9 is_stmt 1 view .LVU534 + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1483 .loc 1 728 36 is_stmt 0 view .LVU535 + 1484 0038 0022 movs r2, #0 + 1485 003a DA62 str r2, [r3, #44] + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1486 .loc 1 729 9 is_stmt 1 view .LVU536 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccjh2HTn.s page 51 + + + 1487 .loc 1 714 21 is_stmt 0 view .LVU537 + 1488 003c 0020 movs r0, #0 + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1489 .loc 1 729 9 view .LVU538 + 1490 003e EDE7 b .L76 + 1491 .L80: + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1492 .loc 1 732 9 is_stmt 1 view .LVU539 + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1493 .loc 1 732 33 is_stmt 0 view .LVU540 + 1494 0040 0022 movs r2, #0 + 1495 0042 1A63 str r2, [r3, #48] + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1496 .loc 1 733 9 is_stmt 1 view .LVU541 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1497 .loc 1 714 21 is_stmt 0 view .LVU542 + 1498 0044 0020 movs r0, #0 + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1499 .loc 1 733 9 view .LVU543 + 1500 0046 E9E7 b .L76 + 1501 .L79: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1502 .loc 1 736 9 is_stmt 1 view .LVU544 + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1503 .loc 1 736 33 is_stmt 0 view .LVU545 + 1504 0048 0022 movs r2, #0 + 1505 004a 5A63 str r2, [r3, #52] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1506 .loc 1 737 9 is_stmt 1 view .LVU546 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1507 .loc 1 714 21 is_stmt 0 view .LVU547 + 1508 004c 0020 movs r0, #0 + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1509 .loc 1 737 9 view .LVU548 + 1510 004e E5E7 b .L76 + 1511 .L77: + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1512 .loc 1 740 9 is_stmt 1 view .LVU549 + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1513 .loc 1 740 32 is_stmt 0 view .LVU550 + 1514 0050 0022 movs r2, #0 + 1515 0052 9A62 str r2, [r3, #40] + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1516 .loc 1 741 9 is_stmt 1 view .LVU551 + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1517 .loc 1 741 36 is_stmt 0 view .LVU552 + 1518 0054 DA62 str r2, [r3, #44] + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1519 .loc 1 742 9 is_stmt 1 view .LVU553 + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1520 .loc 1 742 33 is_stmt 0 view .LVU554 + 1521 0056 1A63 str r2, [r3, #48] + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1522 .loc 1 743 9 is_stmt 1 view .LVU555 + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1523 .loc 1 743 33 is_stmt 0 view .LVU556 + 1524 0058 5A63 str r2, [r3, #52] + ARM GAS /tmp/ccjh2HTn.s page 52 + + + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1525 .loc 1 744 9 is_stmt 1 view .LVU557 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1526 .loc 1 714 21 is_stmt 0 view .LVU558 + 1527 005a 0020 movs r0, #0 + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1528 .loc 1 744 9 view .LVU559 + 1529 005c DEE7 b .L76 + 1530 .LVL103: + 1531 .L83: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1532 .loc 1 717 3 discriminator 1 view .LVU560 + 1533 005e 0220 movs r0, #2 + 1534 .LVL104: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1535 .loc 1 717 3 discriminator 1 view .LVU561 + 1536 0060 DFE7 b .L75 + 1537 .L87: + 1538 0062 C046 .align 2 + 1539 .L86: + 1540 0064 00000000 .word .L78 + 1541 .cfi_endproc + 1542 .LFE49: + 1544 .section .text.HAL_DMA_GetState,"ax",%progbits + 1545 .align 1 + 1546 .global HAL_DMA_GetState + 1547 .syntax unified + 1548 .code 16 + 1549 .thumb_func + 1551 HAL_DMA_GetState: + 1552 .LVL105: + 1553 .LFB50: + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->State; + 1554 .loc 1 789 1 is_stmt 1 view -0 + 1555 .cfi_startproc + 1556 @ args = 0, pretend = 0, frame = 0 + 1557 @ frame_needed = 0, uses_anonymous_args = 0 + 1558 @ link register save eliminated. + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1559 .loc 1 790 3 view .LVU563 + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1560 .loc 1 790 14 is_stmt 0 view .LVU564 + 1561 0000 2123 movs r3, #33 + 1562 0002 C05C ldrb r0, [r0, r3] + 1563 .LVL106: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1564 .loc 1 790 14 view .LVU565 + 1565 0004 C0B2 uxtb r0, r0 + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1566 .loc 1 791 1 view .LVU566 + 1567 @ sp needed + 1568 0006 7047 bx lr + 1569 .cfi_endproc + 1570 .LFE50: + 1572 .section .text.HAL_DMA_GetError,"ax",%progbits + 1573 .align 1 + 1574 .global HAL_DMA_GetError + ARM GAS /tmp/ccjh2HTn.s page 53 + + + 1575 .syntax unified + 1576 .code 16 + 1577 .thumb_func + 1579 HAL_DMA_GetError: + 1580 .LVL107: + 1581 .LFB51: + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->ErrorCode; + 1582 .loc 1 800 1 is_stmt 1 view -0 + 1583 .cfi_startproc + 1584 @ args = 0, pretend = 0, frame = 0 + 1585 @ frame_needed = 0, uses_anonymous_args = 0 + 1586 @ link register save eliminated. + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1587 .loc 1 801 3 view .LVU568 + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1588 .loc 1 801 14 is_stmt 0 view .LVU569 + 1589 0000 806B ldr r0, [r0, #56] + 1590 .LVL108: + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1591 .loc 1 802 1 view .LVU570 + 1592 @ sp needed + 1593 0002 7047 bx lr + 1594 .cfi_endproc + 1595 .LFE51: + 1597 .text + 1598 .Letext0: + 1599 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1600 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1601 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 1602 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 1603 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1604 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 1605 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccjh2HTn.s page 54 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_dma.c + /tmp/ccjh2HTn.s:19 .text.DMA_SetConfig:00000000 $t + /tmp/ccjh2HTn.s:24 .text.DMA_SetConfig:00000000 DMA_SetConfig + /tmp/ccjh2HTn.s:94 .text.DMA_CalcBaseAndBitshift:00000000 $t + /tmp/ccjh2HTn.s:99 .text.DMA_CalcBaseAndBitshift:00000000 DMA_CalcBaseAndBitshift + /tmp/ccjh2HTn.s:140 .text.DMA_CalcBaseAndBitshift:0000001c $d + /tmp/ccjh2HTn.s:146 .text.HAL_DMA_Init:00000000 $t + /tmp/ccjh2HTn.s:152 .text.HAL_DMA_Init:00000000 HAL_DMA_Init + /tmp/ccjh2HTn.s:266 .text.HAL_DMA_Init:0000004c $d + /tmp/ccjh2HTn.s:271 .text.HAL_DMA_DeInit:00000000 $t + /tmp/ccjh2HTn.s:277 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit + /tmp/ccjh2HTn.s:382 .text.HAL_DMA_Start:00000000 $t + /tmp/ccjh2HTn.s:388 .text.HAL_DMA_Start:00000000 HAL_DMA_Start + /tmp/ccjh2HTn.s:491 .text.HAL_DMA_Start_IT:00000000 $t + /tmp/ccjh2HTn.s:497 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT + /tmp/ccjh2HTn.s:637 .text.HAL_DMA_Abort:00000000 $t + /tmp/ccjh2HTn.s:643 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort + /tmp/ccjh2HTn.s:730 .text.HAL_DMA_Abort_IT:00000000 $t + /tmp/ccjh2HTn.s:736 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT + /tmp/ccjh2HTn.s:834 .text.HAL_DMA_PollForTransfer:00000000 $t + /tmp/ccjh2HTn.s:840 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer + /tmp/ccjh2HTn.s:1074 .text.HAL_DMA_IRQHandler:00000000 $t + /tmp/ccjh2HTn.s:1080 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler + /tmp/ccjh2HTn.s:1278 .text.HAL_DMA_RegisterCallback:00000000 $t + /tmp/ccjh2HTn.s:1284 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback + /tmp/ccjh2HTn.s:1396 .text.HAL_DMA_UnRegisterCallback:00000000 $t + /tmp/ccjh2HTn.s:1402 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback + /tmp/ccjh2HTn.s:1463 .rodata.HAL_DMA_UnRegisterCallback:00000000 $d + /tmp/ccjh2HTn.s:1540 .text.HAL_DMA_UnRegisterCallback:00000064 $d + /tmp/ccjh2HTn.s:1545 .text.HAL_DMA_GetState:00000000 $t + /tmp/ccjh2HTn.s:1551 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState + /tmp/ccjh2HTn.s:1573 .text.HAL_DMA_GetError:00000000 $t + /tmp/ccjh2HTn.s:1579 .text.HAL_DMA_GetError:00000000 HAL_DMA_GetError + +UNDEFINED SYMBOLS +__aeabi_uidiv +HAL_GetTick diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o new file mode 100644 index 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z0FV9h4Wrxde}d<>p^gbm!XL4qlUw(56ukQG-R7LLsLw`r^(}$TZX2q275btq=;YQF zK+dZ#f4g&jqrM=rt1pnFFN~K$UoUjE&G*GWEA#3*<Line)); + 49 .loc 1 155 3 is_stmt 1 view .LVU8 + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_MODE(pExtiConfig->Mode)); + 50 .loc 1 156 3 view .LVU9 + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Assign line number to handle */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->Line = pExtiConfig->Line; + 51 .loc 1 159 3 view .LVU10 + 52 .loc 1 159 28 is_stmt 0 view .LVU11 + 53 000a 0C68 ldr r4, [r1] + 54 .loc 1 159 15 view .LVU12 + 55 000c 0460 str r4, [r0] + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 56 .loc 1 162 3 is_stmt 1 view .LVU13 + 57 .loc 1 162 11 is_stmt 0 view .LVU14 + 58 000e 1F23 movs r3, #31 + 59 0010 2340 ands r3, r4 + 60 .LVL1: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 61 .loc 1 163 3 is_stmt 1 view .LVU15 + 62 .loc 1 163 12 is_stmt 0 view .LVU16 + 63 0012 0122 movs r2, #1 + 64 0014 9A40 lsls r2, r2, r3 + 65 .LVL2: + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + ARM GAS /tmp/cczp21Ju.s page 5 + + + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure triggers for configurable lines */ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 66 .loc 1 166 3 is_stmt 1 view .LVU17 + 67 .loc 1 166 6 is_stmt 0 view .LVU18 + 68 0016 A001 lsls r0, r4, #6 + 69 0018 13D5 bpl .L3 + 70 .LVL3: + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger)); + 71 .loc 1 168 5 is_stmt 1 view .LVU19 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure rising trigger */ + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u) + 72 .loc 1 172 5 view .LVU20 + 73 .loc 1 172 21 is_stmt 0 view .LVU21 + 74 001a 8868 ldr r0, [r1, #8] + 75 .loc 1 172 8 view .LVU22 + 76 001c C007 lsls r0, r0, #31 + 77 001e 20D5 bpl .L4 + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR |= maskline; + 78 .loc 1 174 7 is_stmt 1 view .LVU23 + 79 .loc 1 174 11 is_stmt 0 view .LVU24 + 80 0020 254D ldr r5, .L15 + 81 0022 A868 ldr r0, [r5, #8] + 82 .loc 1 174 18 view .LVU25 + 83 0024 1043 orrs r0, r2 + 84 0026 A860 str r0, [r5, #8] + 85 .L5: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR &= ~maskline; + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure falling trigger */ + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u) + 86 .loc 1 183 5 is_stmt 1 view .LVU26 + 87 .loc 1 183 21 is_stmt 0 view .LVU27 + 88 0028 8868 ldr r0, [r1, #8] + 89 .loc 1 183 8 view .LVU28 + 90 002a 8007 lsls r0, r0, #30 + 91 002c 1ED5 bpl .L6 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR |= maskline; + 92 .loc 1 185 7 is_stmt 1 view .LVU29 + 93 .loc 1 185 11 is_stmt 0 view .LVU30 + 94 002e 224D ldr r5, .L15 + 95 0030 E868 ldr r0, [r5, #12] + 96 .loc 1 185 18 view .LVU31 + 97 0032 1043 orrs r0, r2 + 98 0034 E860 str r0, [r5, #12] + 99 .L7: + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + ARM GAS /tmp/cczp21Ju.s page 6 + + + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR &= ~maskline; + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure gpio port selection in case of gpio exti line */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 100 .loc 1 194 5 is_stmt 1 view .LVU32 + 101 .loc 1 194 21 is_stmt 0 view .LVU33 + 102 0036 0868 ldr r0, [r1] + 103 .loc 1 194 28 view .LVU34 + 104 0038 C025 movs r5, #192 + 105 003a ED04 lsls r5, r5, #19 + 106 003c 2840 ands r0, r5 + 107 .loc 1 194 8 view .LVU35 + 108 003e A842 cmp r0, r5 + 109 0040 19D0 beq .L14 + 110 .LVL4: + 111 .L3: + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel)); + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure interrupt mode : read current mode */ + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u) + 112 .loc 1 208 3 is_stmt 1 view .LVU36 + 113 .loc 1 208 19 is_stmt 0 view .LVU37 + 114 0042 4B68 ldr r3, [r1, #4] + 115 .loc 1 208 6 view .LVU38 + 116 0044 DB07 lsls r3, r3, #31 + 117 0046 27D5 bpl .L8 + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR |= maskline; + 118 .loc 1 210 5 is_stmt 1 view .LVU39 + 119 .loc 1 210 9 is_stmt 0 view .LVU40 + 120 0048 1B48 ldr r0, .L15 + 121 004a 0368 ldr r3, [r0] + 122 .loc 1 210 15 view .LVU41 + 123 004c 1343 orrs r3, r2 + 124 004e 0360 str r3, [r0] + 125 .L9: + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR &= ~maskline; + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure event mode : read current mode */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + ARM GAS /tmp/cczp21Ju.s page 7 + + + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u) + 126 .loc 1 219 3 is_stmt 1 view .LVU42 + 127 .loc 1 219 19 is_stmt 0 view .LVU43 + 128 0050 4B68 ldr r3, [r1, #4] + 129 .loc 1 219 6 view .LVU44 + 130 0052 9B07 lsls r3, r3, #30 + 131 0054 25D5 bpl .L10 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR |= maskline; + 132 .loc 1 221 5 is_stmt 1 view .LVU45 + 133 .loc 1 221 9 is_stmt 0 view .LVU46 + 134 0056 1849 ldr r1, .L15 + 135 .LVL5: + 136 .loc 1 221 9 view .LVU47 + 137 0058 4B68 ldr r3, [r1, #4] + 138 .loc 1 221 15 view .LVU48 + 139 005a 1343 orrs r3, r2 + 140 005c 4B60 str r3, [r1, #4] + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR &= ~maskline; + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 141 .loc 1 228 10 view .LVU49 + 142 005e 0020 movs r0, #0 + 143 .LVL6: + 144 .L2: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 145 .loc 1 229 1 view .LVU50 + 146 @ sp needed + 147 0060 70BD pop {r4, r5, r6, pc} + 148 .LVL7: + 149 .L4: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 150 .loc 1 178 7 is_stmt 1 view .LVU51 + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 151 .loc 1 178 11 is_stmt 0 view .LVU52 + 152 0062 154D ldr r5, .L15 + 153 0064 A868 ldr r0, [r5, #8] + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 154 .loc 1 178 18 view .LVU53 + 155 0066 9043 bics r0, r2 + 156 0068 A860 str r0, [r5, #8] + 157 006a DDE7 b .L5 + 158 .L6: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 159 .loc 1 189 7 is_stmt 1 view .LVU54 + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 160 .loc 1 189 11 is_stmt 0 view .LVU55 + 161 006c 124D ldr r5, .L15 + 162 006e E868 ldr r0, [r5, #12] + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 163 .loc 1 189 18 view .LVU56 + 164 0070 9043 bics r0, r2 + 165 0072 E860 str r0, [r5, #12] + ARM GAS /tmp/cczp21Ju.s page 8 + + + 166 0074 DFE7 b .L7 + 167 .L14: + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 168 .loc 1 196 7 is_stmt 1 view .LVU57 + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 169 .loc 1 197 7 view .LVU58 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 170 .loc 1 199 7 view .LVU59 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 171 .loc 1 199 39 is_stmt 0 view .LVU60 + 172 0076 9B08 lsrs r3, r3, #2 + 173 .LVL8: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 174 .loc 1 199 14 view .LVU61 + 175 0078 104D ldr r5, .L15+4 + 176 007a 0233 adds r3, r3, #2 + 177 007c 9B00 lsls r3, r3, #2 + 178 007e 5E59 ldr r6, [r3, r5] + 179 .LVL9: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 180 .loc 1 200 7 is_stmt 1 view .LVU62 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 181 .loc 1 200 80 is_stmt 0 view .LVU63 + 182 0080 0320 movs r0, #3 + 183 0082 2040 ands r0, r4 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 184 .loc 1 200 69 view .LVU64 + 185 0084 8000 lsls r0, r0, #2 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 186 .loc 1 200 40 view .LVU65 + 187 0086 0F24 movs r4, #15 + 188 .LVL10: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 189 .loc 1 200 40 view .LVU66 + 190 0088 8440 lsls r4, r4, r0 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 191 .loc 1 200 14 view .LVU67 + 192 008a A643 bics r6, r4 + 193 .LVL11: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 194 .loc 1 201 7 is_stmt 1 view .LVU68 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 195 .loc 1 201 29 is_stmt 0 view .LVU69 + 196 008c CC68 ldr r4, [r1, #12] + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 197 .loc 1 201 39 view .LVU70 + 198 008e 8440 lsls r4, r4, r0 + 199 0090 2000 movs r0, r4 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 200 .loc 1 201 14 view .LVU71 + 201 0092 3043 orrs r0, r6 + 202 .LVL12: + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 203 .loc 1 202 7 is_stmt 1 view .LVU72 + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 204 .loc 1 202 37 is_stmt 0 view .LVU73 + 205 0094 5851 str r0, [r3, r5] + ARM GAS /tmp/cczp21Ju.s page 9 + + + 206 0096 D4E7 b .L3 + 207 .LVL13: + 208 .L8: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 209 .loc 1 214 5 is_stmt 1 view .LVU74 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 210 .loc 1 214 9 is_stmt 0 view .LVU75 + 211 0098 0748 ldr r0, .L15 + 212 009a 0368 ldr r3, [r0] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 213 .loc 1 214 15 view .LVU76 + 214 009c 9343 bics r3, r2 + 215 009e 0360 str r3, [r0] + 216 00a0 D6E7 b .L9 + 217 .L10: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 218 .loc 1 225 5 is_stmt 1 view .LVU77 + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 219 .loc 1 225 9 is_stmt 0 view .LVU78 + 220 00a2 0549 ldr r1, .L15 + 221 .LVL14: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 222 .loc 1 225 9 view .LVU79 + 223 00a4 4B68 ldr r3, [r1, #4] + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 224 .loc 1 225 15 view .LVU80 + 225 00a6 9343 bics r3, r2 + 226 00a8 4B60 str r3, [r1, #4] + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 227 .loc 1 228 10 view .LVU81 + 228 00aa 0020 movs r0, #0 + 229 00ac D8E7 b .L2 + 230 .LVL15: + 231 .L11: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 232 .loc 1 151 12 view .LVU82 + 233 00ae 0120 movs r0, #1 + 234 .LVL16: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 235 .loc 1 151 12 view .LVU83 + 236 00b0 D6E7 b .L2 + 237 .LVL17: + 238 .L12: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 239 .loc 1 151 12 view .LVU84 + 240 00b2 0120 movs r0, #1 + 241 .LVL18: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 242 .loc 1 151 12 view .LVU85 + 243 00b4 D4E7 b .L2 + 244 .L16: + 245 00b6 C046 .align 2 + 246 .L15: + 247 00b8 00040140 .word 1073808384 + 248 00bc 00000140 .word 1073807360 + 249 .cfi_endproc + 250 .LFE40: + ARM GAS /tmp/cczp21Ju.s page 10 + + + 252 .section .text.HAL_EXTI_GetConfigLine,"ax",%progbits + 253 .align 1 + 254 .global HAL_EXTI_GetConfigLine + 255 .syntax unified + 256 .code 16 + 257 .thumb_func + 259 HAL_EXTI_GetConfigLine: + 260 .LVL19: + 261 .LFB41: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Get configuration of a dedicated Exti line. + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param pExtiConfig Pointer on structure to store Exti configuration. + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 262 .loc 1 238 1 is_stmt 1 view -0 + 263 .cfi_startproc + 264 @ args = 0, pretend = 0, frame = 0 + 265 @ frame_needed = 0, uses_anonymous_args = 0 + 266 .loc 1 238 1 is_stmt 0 view .LVU87 + 267 0000 30B5 push {r4, r5, lr} + 268 .cfi_def_cfa_offset 12 + 269 .cfi_offset 4, -12 + 270 .cfi_offset 5, -8 + 271 .cfi_offset 14, -4 + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 272 .loc 1 239 3 is_stmt 1 view .LVU88 + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 273 .loc 1 240 3 view .LVU89 + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 274 .loc 1 241 3 view .LVU90 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 275 .loc 1 244 3 view .LVU91 + 276 .loc 1 244 6 is_stmt 0 view .LVU92 + 277 0002 0028 cmp r0, #0 + 278 0004 41D0 beq .L24 + 279 .loc 1 244 23 discriminator 1 view .LVU93 + 280 0006 0029 cmp r1, #0 + 281 0008 41D0 beq .L25 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameter */ + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 282 .loc 1 250 3 is_stmt 1 view .LVU94 + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Store handle line number to configuration structure */ + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Line = hexti->Line; + 283 .loc 1 253 3 view .LVU95 + 284 .loc 1 253 28 is_stmt 0 view .LVU96 + 285 000a 0268 ldr r2, [r0] + ARM GAS /tmp/cczp21Ju.s page 11 + + + 286 .loc 1 253 21 view .LVU97 + 287 000c 0A60 str r2, [r1] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 288 .loc 1 256 3 is_stmt 1 view .LVU98 + 289 .loc 1 256 11 is_stmt 0 view .LVU99 + 290 000e 1F24 movs r4, #31 + 291 0010 1440 ands r4, r2 + 292 .LVL20: + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 293 .loc 1 257 3 is_stmt 1 view .LVU100 + 294 .loc 1 257 12 is_stmt 0 view .LVU101 + 295 0012 0123 movs r3, #1 + 296 0014 A340 lsls r3, r3, r4 + 297 .LVL21: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 1] Get core mode : interrupt */ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if selected line is enable */ + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->IMR & maskline) != 0x00u) + 298 .loc 1 262 3 is_stmt 1 view .LVU102 + 299 .loc 1 262 12 is_stmt 0 view .LVU103 + 300 0016 2048 ldr r0, .L29 + 301 .LVL22: + 302 .loc 1 262 12 view .LVU104 + 303 0018 0068 ldr r0, [r0] + 304 .loc 1 262 6 view .LVU105 + 305 001a 0342 tst r3, r0 + 306 001c 24D0 beq .L19 + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_INTERRUPT; + 307 .loc 1 264 5 is_stmt 1 view .LVU106 + 308 .loc 1 264 23 is_stmt 0 view .LVU107 + 309 001e 0120 movs r0, #1 + 310 0020 4860 str r0, [r1, #4] + 311 .L20: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_NONE; + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get event mode */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if selected line is enable */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->EMR & maskline) != 0x00u) + 312 .loc 1 273 3 is_stmt 1 view .LVU108 + 313 .loc 1 273 12 is_stmt 0 view .LVU109 + 314 0022 1D48 ldr r0, .L29 + 315 0024 4068 ldr r0, [r0, #4] + 316 .loc 1 273 6 view .LVU110 + 317 0026 0342 tst r3, r0 + 318 0028 03D0 beq .L21 + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode |= EXTI_MODE_EVENT; + 319 .loc 1 275 5 is_stmt 1 view .LVU111 + 320 .loc 1 275 16 is_stmt 0 view .LVU112 + ARM GAS /tmp/cczp21Ju.s page 12 + + + 321 002a 4868 ldr r0, [r1, #4] + 322 .loc 1 275 23 view .LVU113 + 323 002c 0225 movs r5, #2 + 324 002e 2843 orrs r0, r5 + 325 0030 4860 str r0, [r1, #4] + 326 .L21: + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get default Trigger and GPIOSel configuration */ + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_NONE; + 327 .loc 1 279 3 is_stmt 1 view .LVU114 + 328 .loc 1 279 24 is_stmt 0 view .LVU115 + 329 0032 0020 movs r0, #0 + 330 0034 8860 str r0, [r1, #8] + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = 0x00u; + 331 .loc 1 280 3 is_stmt 1 view .LVU116 + 332 .loc 1 280 24 is_stmt 0 view .LVU117 + 333 0036 C860 str r0, [r1, #12] + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 2] Get trigger for configurable lines : rising */ + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 334 .loc 1 283 3 is_stmt 1 view .LVU118 + 335 .loc 1 283 6 is_stmt 0 view .LVU119 + 336 0038 9001 lsls r0, r2, #6 + 337 003a 2AD5 bpl .L26 + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->RTSR & maskline) != 0x00u) + 338 .loc 1 286 5 is_stmt 1 view .LVU120 + 339 .loc 1 286 14 is_stmt 0 view .LVU121 + 340 003c 1648 ldr r0, .L29 + 341 003e 8068 ldr r0, [r0, #8] + 342 .loc 1 286 8 view .LVU122 + 343 0040 0342 tst r3, r0 + 344 0042 01D0 beq .L22 + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_RISING; + 345 .loc 1 288 7 is_stmt 1 view .LVU123 + 346 .loc 1 288 28 is_stmt 0 view .LVU124 + 347 0044 0120 movs r0, #1 + 348 0046 8860 str r0, [r1, #8] + 349 .L22: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get falling configuration */ + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->FTSR & maskline) != 0x00u) + 350 .loc 1 293 5 is_stmt 1 view .LVU125 + 351 .loc 1 293 14 is_stmt 0 view .LVU126 + 352 0048 1348 ldr r0, .L29 + 353 004a C068 ldr r0, [r0, #12] + 354 .loc 1 293 8 view .LVU127 + 355 004c 0342 tst r3, r0 + 356 004e 03D0 beq .L23 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING; + 357 .loc 1 295 7 is_stmt 1 view .LVU128 + ARM GAS /tmp/cczp21Ju.s page 13 + + + 358 .loc 1 295 18 is_stmt 0 view .LVU129 + 359 0050 8B68 ldr r3, [r1, #8] + 360 .LVL23: + 361 .loc 1 295 28 view .LVU130 + 362 0052 0220 movs r0, #2 + 363 0054 0343 orrs r3, r0 + 364 0056 8B60 str r3, [r1, #8] + 365 .L23: + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 366 .loc 1 299 5 is_stmt 1 view .LVU131 + 367 .loc 1 299 28 is_stmt 0 view .LVU132 + 368 0058 C023 movs r3, #192 + 369 005a DB04 lsls r3, r3, #19 + 370 005c 1000 movs r0, r2 + 371 005e 1840 ands r0, r3 + 372 .loc 1 299 8 view .LVU133 + 373 0060 9842 cmp r0, r3 + 374 0062 04D0 beq .L28 + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 375 .loc 1 308 10 view .LVU134 + 376 0064 0020 movs r0, #0 + 377 0066 15E0 b .L18 + 378 .LVL24: + 379 .L19: + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 380 .loc 1 268 5 is_stmt 1 view .LVU135 + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 381 .loc 1 268 23 is_stmt 0 view .LVU136 + 382 0068 0020 movs r0, #0 + 383 006a 4860 str r0, [r1, #4] + 384 006c D9E7 b .L20 + 385 .LVL25: + 386 .L28: + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 387 .loc 1 301 7 is_stmt 1 view .LVU137 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 388 .loc 1 303 7 view .LVU138 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 389 .loc 1 303 39 is_stmt 0 view .LVU139 + 390 006e A308 lsrs r3, r4, #2 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 391 .loc 1 303 14 view .LVU140 + 392 0070 0233 adds r3, r3, #2 + 393 0072 9B00 lsls r3, r3, #2 + 394 0074 0948 ldr r0, .L29+4 + 395 0076 1858 ldr r0, [r3, r0] + ARM GAS /tmp/cczp21Ju.s page 14 + + + 396 .LVL26: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 397 .loc 1 304 7 is_stmt 1 view .LVU141 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 398 .loc 1 304 78 is_stmt 0 view .LVU142 + 399 0078 0323 movs r3, #3 + 400 007a 1340 ands r3, r2 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 401 .loc 1 304 67 view .LVU143 + 402 007c 9B00 lsls r3, r3, #2 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 403 .loc 1 304 38 view .LVU144 + 404 007e D840 lsrs r0, r0, r3 + 405 .LVL27: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 406 .loc 1 304 89 view .LVU145 + 407 0080 0F23 movs r3, #15 + 408 0082 0340 ands r3, r0 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 409 .loc 1 304 28 view .LVU146 + 410 0084 CB60 str r3, [r1, #12] + 411 .loc 1 308 10 view .LVU147 + 412 0086 0020 movs r0, #0 + 413 0088 04E0 b .L18 + 414 .LVL28: + 415 .L24: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 416 .loc 1 246 12 view .LVU148 + 417 008a 0120 movs r0, #1 + 418 .LVL29: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 419 .loc 1 246 12 view .LVU149 + 420 008c 02E0 b .L18 + 421 .LVL30: + 422 .L25: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 423 .loc 1 246 12 view .LVU150 + 424 008e 0120 movs r0, #1 + 425 .LVL31: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 426 .loc 1 246 12 view .LVU151 + 427 0090 00E0 b .L18 + 428 .LVL32: + 429 .L26: + 430 .loc 1 308 10 view .LVU152 + 431 0092 0020 movs r0, #0 + 432 .LVL33: + 433 .L18: + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 434 .loc 1 309 1 view .LVU153 + 435 @ sp needed + 436 0094 30BD pop {r4, r5, pc} + 437 .L30: + 438 0096 C046 .align 2 + 439 .L29: + 440 0098 00040140 .word 1073808384 + 441 009c 00000140 .word 1073807360 + ARM GAS /tmp/cczp21Ju.s page 15 + + + 442 .cfi_endproc + 443 .LFE41: + 445 .section .text.HAL_EXTI_ClearConfigLine,"ax",%progbits + 446 .align 1 + 447 .global HAL_EXTI_ClearConfigLine + 448 .syntax unified + 449 .code 16 + 450 .thumb_func + 452 HAL_EXTI_ClearConfigLine: + 453 .LVL34: + 454 .LFB42: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Clear whole configuration of a dedicated Exti line. + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti) + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 455 .loc 1 317 1 is_stmt 1 view -0 + 456 .cfi_startproc + 457 @ args = 0, pretend = 0, frame = 0 + 458 @ frame_needed = 0, uses_anonymous_args = 0 + 459 .loc 1 317 1 is_stmt 0 view .LVU155 + 460 0000 70B5 push {r4, r5, r6, lr} + 461 .cfi_def_cfa_offset 16 + 462 .cfi_offset 4, -16 + 463 .cfi_offset 5, -12 + 464 .cfi_offset 6, -8 + 465 .cfi_offset 14, -4 + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 466 .loc 1 318 3 is_stmt 1 view .LVU156 + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 467 .loc 1 319 3 view .LVU157 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 468 .loc 1 320 3 view .LVU158 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti == NULL) + 469 .loc 1 323 3 view .LVU159 + 470 .loc 1 323 6 is_stmt 0 view .LVU160 + 471 0002 0028 cmp r0, #0 + 472 0004 2CD0 beq .L33 + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameter */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 473 .loc 1 329 3 is_stmt 1 view .LVU161 + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* compute line mask */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 474 .loc 1 332 3 view .LVU162 + 475 .loc 1 332 19 is_stmt 0 view .LVU163 + 476 0006 0568 ldr r5, [r0] + 477 .loc 1 332 11 view .LVU164 + ARM GAS /tmp/cczp21Ju.s page 16 + + + 478 0008 1F22 movs r2, #31 + 479 000a 2A40 ands r2, r5 + 480 .LVL35: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 481 .loc 1 333 3 is_stmt 1 view .LVU165 + 482 .loc 1 333 12 is_stmt 0 view .LVU166 + 483 000c 0123 movs r3, #1 + 484 000e 9340 lsls r3, r3, r2 + 485 .LVL36: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 1] Clear interrupt mode */ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR = (EXTI->IMR & ~maskline); + 486 .loc 1 336 3 is_stmt 1 view .LVU167 + 487 .loc 1 336 20 is_stmt 0 view .LVU168 + 488 0010 1549 ldr r1, .L37 + 489 0012 0C68 ldr r4, [r1] + 490 .loc 1 336 28 view .LVU169 + 491 0014 DE43 mvns r6, r3 + 492 .loc 1 336 26 view .LVU170 + 493 0016 9C43 bics r4, r3 + 494 .loc 1 336 13 view .LVU171 + 495 0018 0C60 str r4, [r1] + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 2] Clear event mode */ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR = (EXTI->EMR & ~maskline); + 496 .loc 1 339 3 is_stmt 1 view .LVU172 + 497 .loc 1 339 20 is_stmt 0 view .LVU173 + 498 001a 4C68 ldr r4, [r1, #4] + 499 .loc 1 339 26 view .LVU174 + 500 001c 9C43 bics r4, r3 + 501 .loc 1 339 13 view .LVU175 + 502 001e 4C60 str r4, [r1, #4] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 3] Clear triggers in case of configurable lines */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti->Line & EXTI_CONFIG) != 0x00u) + 503 .loc 1 342 3 is_stmt 1 view .LVU176 + 504 .loc 1 342 13 is_stmt 0 view .LVU177 + 505 0020 0368 ldr r3, [r0] + 506 .LVL37: + 507 .loc 1 342 6 view .LVU178 + 508 0022 9B01 lsls r3, r3, #6 + 509 0024 1ED5 bpl .L34 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR = (EXTI->RTSR & ~maskline); + 510 .loc 1 344 5 is_stmt 1 view .LVU179 + 511 .loc 1 344 23 is_stmt 0 view .LVU180 + 512 0026 0B00 movs r3, r1 + 513 0028 8968 ldr r1, [r1, #8] + 514 .loc 1 344 30 view .LVU181 + 515 002a 3140 ands r1, r6 + 516 .loc 1 344 16 view .LVU182 + 517 002c 9960 str r1, [r3, #8] + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR = (EXTI->FTSR & ~maskline); + 518 .loc 1 345 5 is_stmt 1 view .LVU183 + 519 .loc 1 345 23 is_stmt 0 view .LVU184 + 520 002e D968 ldr r1, [r3, #12] + 521 .loc 1 345 30 view .LVU185 + ARM GAS /tmp/cczp21Ju.s page 17 + + + 522 0030 3140 ands r1, r6 + 523 .loc 1 345 16 view .LVU186 + 524 0032 D960 str r1, [r3, #12] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO) + 525 .loc 1 348 5 is_stmt 1 view .LVU187 + 526 .loc 1 348 15 is_stmt 0 view .LVU188 + 527 0034 0368 ldr r3, [r0] + 528 .loc 1 348 22 view .LVU189 + 529 0036 C021 movs r1, #192 + 530 0038 C904 lsls r1, r1, #19 + 531 003a 0B40 ands r3, r1 + 532 .loc 1 348 8 view .LVU190 + 533 003c 8B42 cmp r3, r1 + 534 003e 01D0 beq .L36 + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 535 .loc 1 358 10 view .LVU191 + 536 0040 0020 movs r0, #0 + 537 .LVL38: + 538 .loc 1 358 10 view .LVU192 + 539 0042 10E0 b .L32 + 540 .LVL39: + 541 .L36: + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 542 .loc 1 350 7 is_stmt 1 view .LVU193 + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 543 .loc 1 352 7 view .LVU194 + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 544 .loc 1 352 39 is_stmt 0 view .LVU195 + 545 0044 9208 lsrs r2, r2, #2 + 546 .LVL40: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 547 .loc 1 352 14 view .LVU196 + 548 0046 094C ldr r4, .L37+4 + 549 0048 0232 adds r2, r2, #2 + 550 004a 9200 lsls r2, r2, #2 + 551 004c 1159 ldr r1, [r2, r4] + 552 .LVL41: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 553 .loc 1 353 7 is_stmt 1 view .LVU197 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 554 .loc 1 353 80 is_stmt 0 view .LVU198 + 555 004e 0323 movs r3, #3 + 556 0050 2B40 ands r3, r5 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 557 .loc 1 353 69 view .LVU199 + 558 0052 9B00 lsls r3, r3, #2 + ARM GAS /tmp/cczp21Ju.s page 18 + + + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 559 .loc 1 353 40 view .LVU200 + 560 0054 0F20 movs r0, #15 + 561 .LVL42: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 562 .loc 1 353 40 view .LVU201 + 563 0056 9840 lsls r0, r0, r3 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 564 .loc 1 353 14 view .LVU202 + 565 0058 8143 bics r1, r0 + 566 .LVL43: + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 567 .loc 1 354 7 is_stmt 1 view .LVU203 + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 568 .loc 1 354 37 is_stmt 0 view .LVU204 + 569 005a 1151 str r1, [r2, r4] + 570 .loc 1 358 10 view .LVU205 + 571 005c 0020 movs r0, #0 + 572 005e 02E0 b .L32 + 573 .LVL44: + 574 .L33: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 575 .loc 1 325 12 view .LVU206 + 576 0060 0120 movs r0, #1 + 577 .LVL45: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 578 .loc 1 325 12 view .LVU207 + 579 0062 00E0 b .L32 + 580 .LVL46: + 581 .L34: + 582 .loc 1 358 10 view .LVU208 + 583 0064 0020 movs r0, #0 + 584 .LVL47: + 585 .L32: + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 586 .loc 1 359 1 view .LVU209 + 587 @ sp needed + 588 0066 70BD pop {r4, r5, r6, pc} + 589 .L38: + 590 .align 2 + 591 .L37: + 592 0068 00040140 .word 1073808384 + 593 006c 00000140 .word 1073807360 + 594 .cfi_endproc + 595 .LFE42: + 597 .section .text.HAL_EXTI_RegisterCallback,"ax",%progbits + 598 .align 1 + 599 .global HAL_EXTI_RegisterCallback + 600 .syntax unified + 601 .code 16 + 602 .thumb_func + 604 HAL_EXTI_RegisterCallback: + 605 .LVL48: + 606 .LFB43: + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Register callback for a dedicated Exti line. + ARM GAS /tmp/cczp21Ju.s page 19 + + + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param CallbackID User callback identifier. + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values. + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param pPendingCbfn function pointer to be stored as callback. + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef Callb + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 607 .loc 1 370 1 is_stmt 1 view -0 + 608 .cfi_startproc + 609 @ args = 0, pretend = 0, frame = 0 + 610 @ frame_needed = 0, uses_anonymous_args = 0 + 611 @ link register save eliminated. + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef status = HAL_OK; + 612 .loc 1 371 3 view .LVU211 + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** switch (CallbackID) + 613 .loc 1 373 3 view .LVU212 + 614 0000 0029 cmp r1, #0 + 615 0002 02D1 bne .L41 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** case HAL_EXTI_COMMON_CB_ID: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->PendingCallback = pPendingCbfn; + 616 .loc 1 376 7 view .LVU213 + 617 .loc 1 376 30 is_stmt 0 view .LVU214 + 618 0004 4260 str r2, [r0, #4] + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 619 .loc 1 377 7 is_stmt 1 view .LVU215 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 620 .loc 1 371 21 is_stmt 0 view .LVU216 + 621 0006 0800 movs r0, r1 + 622 .LVL49: + 623 .L40: + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** default: + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** status = HAL_ERROR; + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return status; + 624 .loc 1 384 3 is_stmt 1 view .LVU217 + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 625 .loc 1 385 1 is_stmt 0 view .LVU218 + 626 @ sp needed + 627 0008 7047 bx lr + 628 .LVL50: + 629 .L41: + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 630 .loc 1 380 14 view .LVU219 + 631 000a 0120 movs r0, #1 + 632 .LVL51: + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 633 .loc 1 380 14 view .LVU220 + 634 000c FCE7 b .L40 + 635 .cfi_endproc + 636 .LFE43: + 638 .section .text.HAL_EXTI_GetHandle,"ax",%progbits + ARM GAS /tmp/cczp21Ju.s page 20 + + + 639 .align 1 + 640 .global HAL_EXTI_GetHandle + 641 .syntax unified + 642 .code 16 + 643 .thumb_func + 645 HAL_EXTI_GetHandle: + 646 .LVL52: + 647 .LFB44: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Store line number as handle private field. + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param ExtiLine Exti line number. + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be from 0 to @ref EXTI_LINE_NB. + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine) + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 648 .loc 1 395 1 is_stmt 1 view -0 + 649 .cfi_startproc + 650 @ args = 0, pretend = 0, frame = 0 + 651 @ frame_needed = 0, uses_anonymous_args = 0 + 652 @ link register save eliminated. + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameters */ + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(ExtiLine)); + 653 .loc 1 397 3 view .LVU222 + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti == NULL) + 654 .loc 1 400 3 view .LVU223 + 655 .loc 1 400 6 is_stmt 0 view .LVU224 + 656 0000 0028 cmp r0, #0 + 657 0002 02D0 beq .L44 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Store line number as handle private field */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->Line = ExtiLine; + 658 .loc 1 407 5 is_stmt 1 view .LVU225 + 659 .loc 1 407 17 is_stmt 0 view .LVU226 + 660 0004 0160 str r1, [r0] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 661 .loc 1 409 5 is_stmt 1 view .LVU227 + 662 .loc 1 409 12 is_stmt 0 view .LVU228 + 663 0006 0020 movs r0, #0 + 664 .LVL53: + 665 .L43: + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 666 .loc 1 411 1 view .LVU229 + 667 @ sp needed + 668 0008 7047 bx lr + 669 .LVL54: + 670 .L44: + ARM GAS /tmp/cczp21Ju.s page 21 + + + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 671 .loc 1 402 12 view .LVU230 + 672 000a 0120 movs r0, #1 + 673 .LVL55: + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 674 .loc 1 402 12 view .LVU231 + 675 000c FCE7 b .L43 + 676 .cfi_endproc + 677 .LFE44: + 679 .section .text.HAL_EXTI_IRQHandler,"ax",%progbits + 680 .align 1 + 681 .global HAL_EXTI_IRQHandler + 682 .syntax unified + 683 .code 16 + 684 .thumb_func + 686 HAL_EXTI_IRQHandler: + 687 .LVL56: + 688 .LFB45: + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @} + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group2 + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief EXTI IO functions. + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @verbatim + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### IO operation functions ##### + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @endverbatim + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Handle EXTI interrupt request. + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval none. + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti) + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 689 .loc 1 435 1 is_stmt 1 view -0 + 690 .cfi_startproc + 691 @ args = 0, pretend = 0, frame = 0 + 692 @ frame_needed = 0, uses_anonymous_args = 0 + 693 .loc 1 435 1 is_stmt 0 view .LVU233 + 694 0000 10B5 push {r4, lr} + 695 .cfi_def_cfa_offset 8 + 696 .cfi_offset 4, -8 + 697 .cfi_offset 14, -4 + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 698 .loc 1 436 3 is_stmt 1 view .LVU234 + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 699 .loc 1 437 3 view .LVU235 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + ARM GAS /tmp/cczp21Ju.s page 22 + + + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 700 .loc 1 440 3 view .LVU236 + 701 .loc 1 440 28 is_stmt 0 view .LVU237 + 702 0002 0368 ldr r3, [r0] + 703 .loc 1 440 35 view .LVU238 + 704 0004 1F22 movs r2, #31 + 705 0006 1A40 ands r2, r3 + 706 .loc 1 440 12 view .LVU239 + 707 0008 0123 movs r3, #1 + 708 000a 9340 lsls r3, r3, r2 + 709 .LVL57: + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get pending bit */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = (EXTI->PR & maskline); + 710 .loc 1 443 3 is_stmt 1 view .LVU240 + 711 .loc 1 443 17 is_stmt 0 view .LVU241 + 712 000c 054A ldr r2, .L47 + 713 000e 5269 ldr r2, [r2, #20] + 714 .LVL58: + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (regval != 0x00u) + 715 .loc 1 444 3 is_stmt 1 view .LVU242 + 716 .loc 1 444 6 is_stmt 0 view .LVU243 + 717 0010 1342 tst r3, r2 + 718 0012 05D0 beq .L45 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Clear pending bit */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->PR = maskline; + 719 .loc 1 447 5 is_stmt 1 view .LVU244 + 720 .loc 1 447 14 is_stmt 0 view .LVU245 + 721 0014 034A ldr r2, .L47 + 722 .LVL59: + 723 .loc 1 447 14 view .LVU246 + 724 0016 5361 str r3, [r2, #20] + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Call callback */ + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti->PendingCallback != NULL) + 725 .loc 1 450 5 is_stmt 1 view .LVU247 + 726 .loc 1 450 14 is_stmt 0 view .LVU248 + 727 0018 4368 ldr r3, [r0, #4] + 728 .LVL60: + 729 .loc 1 450 8 view .LVU249 + 730 001a 002B cmp r3, #0 + 731 001c 00D0 beq .L45 + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->PendingCallback(); + 732 .loc 1 452 7 is_stmt 1 view .LVU250 + 733 001e 9847 blx r3 + 734 .LVL61: + 735 .L45: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 736 .loc 1 455 1 is_stmt 0 view .LVU251 + 737 @ sp needed + 738 0020 10BD pop {r4, pc} + 739 .L48: + 740 0022 C046 .align 2 + ARM GAS /tmp/cczp21Ju.s page 23 + + + 741 .L47: + 742 0024 00040140 .word 1073808384 + 743 .cfi_endproc + 744 .LFE45: + 746 .section .text.HAL_EXTI_GetPending,"ax",%progbits + 747 .align 1 + 748 .global HAL_EXTI_GetPending + 749 .syntax unified + 750 .code 16 + 751 .thumb_func + 753 HAL_EXTI_GetPending: + 754 .LVL62: + 755 .LFB46: + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Get interrupt pending bit of a dedicated line. + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param Edge Specify which pending edge as to be checked. + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of the following values: + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval 1 if interrupt is pending else 0. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 756 .loc 1 467 1 is_stmt 1 view -0 + 757 .cfi_startproc + 758 @ args = 0, pretend = 0, frame = 0 + 759 @ frame_needed = 0, uses_anonymous_args = 0 + 760 @ link register save eliminated. + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 761 .loc 1 468 3 view .LVU253 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 762 .loc 1 469 3 view .LVU254 + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 763 .loc 1 470 3 view .LVU255 + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 764 .loc 1 473 3 view .LVU256 + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 765 .loc 1 474 3 view .LVU257 + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 766 .loc 1 475 3 view .LVU258 + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 767 .loc 1 478 3 view .LVU259 + 768 .loc 1 478 19 is_stmt 0 view .LVU260 + 769 0000 0268 ldr r2, [r0] + 770 .loc 1 478 11 view .LVU261 + 771 0002 1F23 movs r3, #31 + 772 0004 1340 ands r3, r2 + 773 .LVL63: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 774 .loc 1 479 3 is_stmt 1 view .LVU262 + 775 .loc 1 479 12 is_stmt 0 view .LVU263 + ARM GAS /tmp/cczp21Ju.s page 24 + + + 776 0006 0120 movs r0, #1 + 777 .LVL64: + 778 .loc 1 479 12 view .LVU264 + 779 0008 9840 lsls r0, r0, r3 + 780 .LVL65: + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* return 1 if bit is set else 0 */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = ((EXTI->PR & maskline) >> linepos); + 781 .loc 1 482 3 is_stmt 1 view .LVU265 + 782 .loc 1 482 18 is_stmt 0 view .LVU266 + 783 000a 024A ldr r2, .L50 + 784 000c 5269 ldr r2, [r2, #20] + 785 .loc 1 482 23 view .LVU267 + 786 000e 1040 ands r0, r2 + 787 .LVL66: + 788 .loc 1 482 10 view .LVU268 + 789 0010 D840 lsrs r0, r0, r3 + 790 .LVL67: + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return regval; + 791 .loc 1 483 3 is_stmt 1 view .LVU269 + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 792 .loc 1 484 1 is_stmt 0 view .LVU270 + 793 @ sp needed + 794 0012 7047 bx lr + 795 .L51: + 796 .align 2 + 797 .L50: + 798 0014 00040140 .word 1073808384 + 799 .cfi_endproc + 800 .LFE46: + 802 .section .text.HAL_EXTI_ClearPending,"ax",%progbits + 803 .align 1 + 804 .global HAL_EXTI_ClearPending + 805 .syntax unified + 806 .code 16 + 807 .thumb_func + 809 HAL_EXTI_ClearPending: + 810 .LVL68: + 811 .LFB47: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Clear interrupt pending bit of a dedicated line. + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param Edge Specify which pending edge as to be clear. + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of the following values: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval None. + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 812 .loc 1 496 1 is_stmt 1 view -0 + 813 .cfi_startproc + 814 @ args = 0, pretend = 0, frame = 0 + 815 @ frame_needed = 0, uses_anonymous_args = 0 + 816 @ link register save eliminated. + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + ARM GAS /tmp/cczp21Ju.s page 25 + + + 817 .loc 1 497 3 view .LVU272 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 818 .loc 1 500 3 view .LVU273 + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 819 .loc 1 501 3 view .LVU274 + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 820 .loc 1 502 3 view .LVU275 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 821 .loc 1 505 3 view .LVU276 + 822 .loc 1 505 28 is_stmt 0 view .LVU277 + 823 0000 0368 ldr r3, [r0] + 824 .loc 1 505 35 view .LVU278 + 825 0002 1F22 movs r2, #31 + 826 0004 1A40 ands r2, r3 + 827 .loc 1 505 12 view .LVU279 + 828 0006 0123 movs r3, #1 + 829 0008 9340 lsls r3, r3, r2 + 830 .LVL69: + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Clear Pending bit */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->PR = maskline; + 831 .loc 1 508 3 is_stmt 1 view .LVU280 + 832 .loc 1 508 12 is_stmt 0 view .LVU281 + 833 000a 014A ldr r2, .L53 + 834 000c 5361 str r3, [r2, #20] + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 835 .loc 1 509 1 view .LVU282 + 836 @ sp needed + 837 000e 7047 bx lr + 838 .L54: + 839 .align 2 + 840 .L53: + 841 0010 00040140 .word 1073808384 + 842 .cfi_endproc + 843 .LFE47: + 845 .section .text.HAL_EXTI_GenerateSWI,"ax",%progbits + 846 .align 1 + 847 .global HAL_EXTI_GenerateSWI + 848 .syntax unified + 849 .code 16 + 850 .thumb_func + 852 HAL_EXTI_GenerateSWI: + 853 .LVL70: + 854 .LFB48: + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Generate a software interrupt for a dedicated line. + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval None. + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti) + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 855 .loc 1 517 1 is_stmt 1 view -0 + ARM GAS /tmp/cczp21Ju.s page 26 + + + 856 .cfi_startproc + 857 @ args = 0, pretend = 0, frame = 0 + 858 @ frame_needed = 0, uses_anonymous_args = 0 + 859 @ link register save eliminated. + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 860 .loc 1 518 3 view .LVU284 + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 861 .loc 1 521 3 view .LVU285 + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 862 .loc 1 522 3 view .LVU286 + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 863 .loc 1 525 3 view .LVU287 + 864 .loc 1 525 28 is_stmt 0 view .LVU288 + 865 0000 0368 ldr r3, [r0] + 866 .loc 1 525 35 view .LVU289 + 867 0002 1F22 movs r2, #31 + 868 0004 1A40 ands r2, r3 + 869 .loc 1 525 12 view .LVU290 + 870 0006 0123 movs r3, #1 + 871 0008 9340 lsls r3, r3, r2 + 872 .LVL71: + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Generate Software interrupt */ + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->SWIER = maskline; + 873 .loc 1 528 3 is_stmt 1 view .LVU291 + 874 .loc 1 528 15 is_stmt 0 view .LVU292 + 875 000a 014A ldr r2, .L56 + 876 000c 1361 str r3, [r2, #16] + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 877 .loc 1 529 1 view .LVU293 + 878 @ sp needed + 879 000e 7047 bx lr + 880 .L57: + 881 .align 2 + 882 .L56: + 883 0010 00040140 .word 1073808384 + 884 .cfi_endproc + 885 .LFE48: + 887 .text + 888 .Letext0: + 889 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 890 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 891 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 892 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 893 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h" + ARM GAS /tmp/cczp21Ju.s page 27 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_exti.c + /tmp/cczp21Ju.s:19 .text.HAL_EXTI_SetConfigLine:00000000 $t + /tmp/cczp21Ju.s:25 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine + /tmp/cczp21Ju.s:247 .text.HAL_EXTI_SetConfigLine:000000b8 $d + /tmp/cczp21Ju.s:253 .text.HAL_EXTI_GetConfigLine:00000000 $t + /tmp/cczp21Ju.s:259 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine + /tmp/cczp21Ju.s:440 .text.HAL_EXTI_GetConfigLine:00000098 $d + /tmp/cczp21Ju.s:446 .text.HAL_EXTI_ClearConfigLine:00000000 $t + /tmp/cczp21Ju.s:452 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine + /tmp/cczp21Ju.s:592 .text.HAL_EXTI_ClearConfigLine:00000068 $d + /tmp/cczp21Ju.s:598 .text.HAL_EXTI_RegisterCallback:00000000 $t + /tmp/cczp21Ju.s:604 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback + /tmp/cczp21Ju.s:639 .text.HAL_EXTI_GetHandle:00000000 $t + /tmp/cczp21Ju.s:645 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle + /tmp/cczp21Ju.s:680 .text.HAL_EXTI_IRQHandler:00000000 $t + /tmp/cczp21Ju.s:686 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler + /tmp/cczp21Ju.s:742 .text.HAL_EXTI_IRQHandler:00000024 $d + /tmp/cczp21Ju.s:747 .text.HAL_EXTI_GetPending:00000000 $t + /tmp/cczp21Ju.s:753 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending + /tmp/cczp21Ju.s:798 .text.HAL_EXTI_GetPending:00000014 $d + /tmp/cczp21Ju.s:803 .text.HAL_EXTI_ClearPending:00000000 $t + /tmp/cczp21Ju.s:809 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending + /tmp/cczp21Ju.s:841 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zy>oc2`wxc$ySlqX?oVNS%$_{3W6SMC#p!o3D8xHxC%@RvRQ|~CaEZMpY~&;0+r_qb zSBbqNYpuPL>|s01+sl;LI|6%MwlSb>FI8gi0_=68o$S%L*m+TZ+ydGze+7HLhCSXc zw!KG6?3s-Pd-P6V+oQjmBApgC&<|&SQ<6Vw|E&_aHJDUeSciaQ=%T-OBecuikbBoA zfaI47J(oMjBZ>HqgHQdXX9+vLHz0>_@=L4<9~)>*+r{=ph$)vZgOIC&B93&mPRJgO hGx>CMPmJSb^@rfu#kRK;45!?GHwr<|9Cop*{|6XB16}|C literal 0 HcmV?d00001 diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d new file mode 100644 index 0000000..c46e7eb --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d @@ -0,0 +1,60 @@ +build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.lst new file mode 100644 index 0000000..8b6eba3 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.lst @@ -0,0 +1,2253 @@ +ARM GAS /tmp/cczmGvTG.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_flash.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c" + 18 .section .text.FLASH_Program_HalfWord,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 FLASH_Program_HalfWord: + 25 .LVL0: + 26 .LFB51: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @file stm32f0xx_hal_flash.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * functionalities of the internal FLASH memory: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Program operations functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Memory Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Peripheral State functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### FLASH peripheral features ##### + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** to the Flash memory. It implements the erase and program Flash memory operations + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** and the read and write protection mechanisms. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The Flash memory interface accelerates code execution with a system of instruction + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** prefetch. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The FLASH main features are: + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Flash memory read operations + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Flash memory program/erase operations + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Read / write protections + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Prefetch on I-Code + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Option Bytes programming + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### How to use this driver ##### + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + ARM GAS /tmp/cczmGvTG.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This driver provides functions and macros to configure and program the FLASH + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** memory of all STM32F0xx devices. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) FLASH Memory I/O Programming functions: this group includes all needed + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** functions to erase and program the main memory: + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Lock and Unlock the FLASH interface + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Erase function: Erase page, erase all pages + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program functions: half word, word and doubleword + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) FLASH Option Bytes Programming functions: this group includes all needed + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** functions to manage the Option Bytes: + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Lock and Unlock the Option Bytes + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Set/Reset the write protection + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Set the Read protection Level + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program the user Option Bytes + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Launch the Option Bytes loader + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Erase Option Bytes + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program the data Option Bytes + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get the Write protection. + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get the user option bytes. + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) Interrupts and flags management functions : this group + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** includes all needed functions to: + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Handle FLASH interrupts + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Wait for last FLASH operation according to its status + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get error flag status + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] In addition to these function, this driver includes a set of macros allowing + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** to handle the following operations: + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Set/Get the latency + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Enable/Disable the prefetch buffer + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Enable/Disable the FLASH interrupts + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Monitor the FLASH flags status + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @attention + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * Copyright (c) 2016 STMicroelectronics. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * All rights reserved. + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This software is licensed under terms that can be found in the LICENSE file in + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the root directory of this software component. + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Includes ------------------------------------------------------------------*/ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** #include "stm32f0xx_hal.h" + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @addtogroup STM32F0xx_HAL_Driver + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH FLASH + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH HAL module driver + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private typedef -----------------------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private define ------------------------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Constants FLASH Private Constants + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private macro ---------------------------- ---------------------------------*/ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Macros FLASH Private Macros + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private variables ---------------------------------------------------------*/ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Variables FLASH Private Variables + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Variables used for Erase pages under interruption*/ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_ProcessTypeDef pFlash; + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private function prototypes -----------------------------------------------*/ + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Functions FLASH Private Functions + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data); + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_SetErrorCode(void); + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** extern void FLASH_PageErase(uint32_t PageAddress); + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Exported functions ---------------------------------------------------------*/ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions FLASH Exported Functions + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Programming operation functions + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the erase operation is performed before the program one. + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note FLASH should be previously erased before new programming (only exception to this + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * is when 0x0000 is programmed) + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t index = 0U; + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t nbiterations = 0U; + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Locked */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check the parameters */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(status == HAL_OK) + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 1U; + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit = 2*16-bit) at a specified address. */ + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 2U; + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit = 4*16-bit) at a specified address. */ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 4U; + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** for (index = 0U; index < nbiterations; index++) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + ARM GAS /tmp/cczmGvTG.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* If the program operation is completed, disable the PG Bit */ + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (status != HAL_OK) + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** break; + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Unlocked */ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address with interrupt enabled. + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the erase operation is performed before the program one. + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Locked */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check the parameters */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = Address; + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = Data; + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMHALFWORD; + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 1U; + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + ARM GAS /tmp/cczmGvTG.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMWORD; + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 2U; + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMDOUBLEWORD; + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 4U; + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord(Address, (uint16_t)Data); + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief This function handles FLASH interrupt request. + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** void HAL_FLASH_IRQHandler(void) + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t addresstmp = 0U; + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH operation error flags */ + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Return the faulty address */ + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset address */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Save the Error code */ + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_SetErrorCode(); + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH error interrupt user callback */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_OperationErrorCallback(addresstmp); + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Stop the procedure ongoing */ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process can continue only if no error detected */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE) + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Nb of pages to erased can be decreased */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining--; + ARM GAS /tmp/cczmGvTG.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check if there are still pages to erase */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Increment sector number*/ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address + FLASH_PAGE_SIZE; + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* If the erase operation is completed, disable the PER Bit */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_PageErase(addresstmp); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* No more pages to Erase, user callback can be called. */ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset Sector and stop Erase pages procedure */ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp = 0xFFFFFFFFU; + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE) + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the MER Bit */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* MassErase ended. Return the selected bank */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(0); + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Stop Mass Erase procedure*/ + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Nb of 16-bit data to program can be decreased */ + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining--; + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check if there are still 16-bit data to program */ + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Increment address to 16-bit */ + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address += 2; + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Shift to have next 16-bit data */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = (pFlash.Data >> 16U); + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the PG Bit */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Program halfword (16-bit) at a specified address.*/ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data); + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program ended. Return the selected address */ + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD) + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address); + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD) + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 2U); + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 6U); + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset Address and stop Program procedure */ + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE) + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the PG, PER and MER Bits */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_PER | FLASH_CR_MER)); + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Disable End of FLASH Operation and Error source interrupts */ + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Unlocked */ + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH end of operation interrupt callback + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Mass Erase: No return value expected + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Pages Erase: Address of the page which has been erased + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * (if 0xFFFFFFFF, it means that all the selected pages have been erased) + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Program: Address which was selected for data program + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval none + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue) + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** UNUSED(ReturnValue); + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + ARM GAS /tmp/cczmGvTG.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** the HAL_FLASH_EndOfOperationCallback could be implemented in the user file + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH operation error interrupt callback + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Mass Erase: No return value expected + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Pages Erase: Address of the page which returned an error + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Program: Address which was selected for data program + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval none + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue) + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** UNUSED(ReturnValue); + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** the HAL_FLASH_OperationErrorCallback could be implemented in the user file + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief management functions + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### Peripheral Control functions ##### + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This subsection provides a set of functions allowing to control the FLASH + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** memory operations. + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Unlock the FLASH control register access + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Unlock(void) + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Authorize the FLASH Registers access */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY1); + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Verify Flash is unlocked */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + ARM GAS /tmp/cczmGvTG.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = HAL_ERROR; + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Locks the FLASH control register access + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Lock(void) + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_LOCK); + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Unlock the FLASH Option Control Registers access. + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void) + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Authorizes the Option Byte register programming */ + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Lock the FLASH Option Control Registers access. + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Lock(void) + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTWRE); + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Launch the option byte loading. + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note This function will reset automatically the MCU. + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + ARM GAS /tmp/cczmGvTG.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Launch(void) + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return(FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE)); + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group3 Peripheral errors functions + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Peripheral errors functions + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### Peripheral Errors functions ##### + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This subsection permit to get in run-time errors of the FLASH peripheral. + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Get the specific FLASH error flag. + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval FLASH_ErrorCode The returned value can be: + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @ref FLASH_Error_Codes + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t HAL_FLASH_GetError(void) + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return pFlash.ErrorCode; + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @addtogroup FLASH_Private_Functions + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program a half-word (16-bit) at a specified address. + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address specify the address to be programmed. + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data specify the data to be programmed. + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + ARM GAS /tmp/cczmGvTG.s page 12 + + + 27 .loc 1 602 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 .loc 1 602 1 is_stmt 0 view .LVU1 + 32 0000 10B5 push {r4, lr} + 33 .cfi_def_cfa_offset 8 + 34 .cfi_offset 4, -8 + 35 .cfi_offset 14, -4 + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clean the error context */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 36 .loc 1 604 3 is_stmt 1 view .LVU2 + 37 .loc 1 604 20 is_stmt 0 view .LVU3 + 38 0002 054B ldr r3, .L2 + 39 0004 0022 movs r2, #0 + 40 0006 DA61 str r2, [r3, #28] + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Proceed to program the new data */ + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_PG); + 41 .loc 1 607 5 is_stmt 1 view .LVU4 + 42 0008 044A ldr r2, .L2+4 + 43 000a 1369 ldr r3, [r2, #16] + 44 000c 0124 movs r4, #1 + 45 000e 2343 orrs r3, r4 + 46 0010 1361 str r3, [r2, #16] + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Write data in the address */ + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** *(__IO uint16_t*)Address = Data; + 47 .loc 1 610 3 view .LVU5 + 48 .loc 1 610 28 is_stmt 0 view .LVU6 + 49 0012 0180 strh r1, [r0] + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 50 .loc 1 611 1 view .LVU7 + 51 @ sp needed + 52 0014 10BD pop {r4, pc} + 53 .L3: + 54 0016 C046 .align 2 + 55 .L2: + 56 0018 00000000 .word pFlash + 57 001c 00200240 .word 1073881088 + 58 .cfi_endproc + 59 .LFE51: + 61 .section .text.FLASH_SetErrorCode,"ax",%progbits + 62 .align 1 + 63 .syntax unified + 64 .code 16 + 65 .thumb_func + 67 FLASH_SetErrorCode: + 68 .LFB53: + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Wait for a FLASH operation to complete. + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Timeout maximum flash operation timeout + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + ARM GAS /tmp/cczmGvTG.s page 13 + + + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** Even if the FLASH operation fails, the BUSY flag will be reset and an error + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flag will be set */ + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t tickstart = HAL_GetTick(); + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (Timeout != HAL_MAX_DELAY) + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_TIMEOUT; + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Save the error code*/ + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_SetErrorCode(); + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* There is no error flag set */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Set the specific FLASH error flag. + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_SetErrorCode(void) + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 69 .loc 1 662 1 is_stmt 1 view -0 + 70 .cfi_startproc + 71 @ args = 0, pretend = 0, frame = 0 + 72 @ frame_needed = 0, uses_anonymous_args = 0 + 73 @ link register save eliminated. + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t flags = 0U; + 74 .loc 1 663 3 view .LVU9 + 75 .LVL1: + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) + 76 .loc 1 665 3 view .LVU10 + 77 .loc 1 665 6 is_stmt 0 view .LVU11 + 78 0000 0D4B ldr r3, .L8 + 79 0002 DA68 ldr r2, [r3, #12] + ARM GAS /tmp/cczmGvTG.s page 14 + + + 80 0004 1021 movs r1, #16 + 81 0006 0B00 movs r3, r1 + 82 0008 1340 ands r3, r2 + 83 .loc 1 665 5 view .LVU12 + 84 000a 1142 tst r1, r2 + 85 000c 05D0 beq .L5 + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; + 86 .loc 1 667 5 is_stmt 1 view .LVU13 + 87 .loc 1 667 11 is_stmt 0 view .LVU14 + 88 000e 0B4A ldr r2, .L8+4 + 89 0010 D369 ldr r3, [r2, #28] + 90 .loc 1 667 22 view .LVU15 + 91 0012 0E39 subs r1, r1, #14 + 92 0014 0B43 orrs r3, r1 + 93 0016 D361 str r3, [r2, #28] + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flags |= FLASH_FLAG_WRPERR; + 94 .loc 1 668 5 is_stmt 1 view .LVU16 + 95 .LVL2: + 96 .loc 1 668 11 is_stmt 0 view .LVU17 + 97 0018 1023 movs r3, #16 + 98 .LVL3: + 99 .L5: + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 100 .loc 1 670 3 is_stmt 1 view .LVU18 + 101 .loc 1 670 6 is_stmt 0 view .LVU19 + 102 001a 074A ldr r2, .L8 + 103 001c D268 ldr r2, [r2, #12] + 104 .loc 1 670 5 view .LVU20 + 105 001e 5207 lsls r2, r2, #29 + 106 0020 06D5 bpl .L6 + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; + 107 .loc 1 672 5 is_stmt 1 view .LVU21 + 108 .loc 1 672 11 is_stmt 0 view .LVU22 + 109 0022 0649 ldr r1, .L8+4 + 110 0024 CA69 ldr r2, [r1, #28] + 111 .loc 1 672 22 view .LVU23 + 112 0026 0120 movs r0, #1 + 113 0028 0243 orrs r2, r0 + 114 002a CA61 str r2, [r1, #28] + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flags |= FLASH_FLAG_PGERR; + 115 .loc 1 673 5 is_stmt 1 view .LVU24 + 116 .loc 1 673 11 is_stmt 0 view .LVU25 + 117 002c 0422 movs r2, #4 + 118 002e 1343 orrs r3, r2 + 119 .LVL4: + 120 .L6: + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH error pending bits */ + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(flags); + 121 .loc 1 676 3 is_stmt 1 view .LVU26 + 122 0030 014A ldr r2, .L8 + 123 0032 D360 str r3, [r2, #12] + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 124 .loc 1 677 1 is_stmt 0 view .LVU27 + ARM GAS /tmp/cczmGvTG.s page 15 + + + 125 @ sp needed + 126 0034 7047 bx lr + 127 .L9: + 128 0036 C046 .align 2 + 129 .L8: + 130 0038 00200240 .word 1073881088 + 131 003c 00000000 .word pFlash + 132 .cfi_endproc + 133 .LFE53: + 135 .section .text.HAL_FLASH_Program_IT,"ax",%progbits + 136 .align 1 + 137 .global HAL_FLASH_Program_IT + 138 .syntax unified + 139 .code 16 + 140 .thumb_func + 142 HAL_FLASH_Program_IT: + 143 .LVL5: + 144 .LFB41: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 145 .loc 1 238 1 is_stmt 1 view -0 + 146 .cfi_startproc + 147 @ args = 0, pretend = 0, frame = 0 + 148 @ frame_needed = 0, uses_anonymous_args = 0 + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 149 .loc 1 238 1 is_stmt 0 view .LVU29 + 150 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 151 .cfi_def_cfa_offset 24 + 152 .cfi_offset 3, -24 + 153 .cfi_offset 4, -20 + 154 .cfi_offset 5, -16 + 155 .cfi_offset 6, -12 + 156 .cfi_offset 7, -8 + 157 .cfi_offset 14, -4 + 158 0002 0600 movs r6, r0 + 159 0004 0800 movs r0, r1 + 160 .LVL6: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 161 .loc 1 238 1 view .LVU30 + 162 0006 1400 movs r4, r2 + 163 0008 1D00 movs r5, r3 + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 164 .loc 1 239 3 is_stmt 1 view .LVU31 + 165 .LVL7: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 166 .loc 1 242 3 view .LVU32 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 167 .loc 1 242 3 view .LVU33 + 168 000a 154B ldr r3, .L18 + 169 000c 1B7E ldrb r3, [r3, #24] + 170 000e 012B cmp r3, #1 + 171 0010 24D0 beq .L15 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 172 .loc 1 242 3 discriminator 2 view .LVU34 + 173 0012 134B ldr r3, .L18 + 174 0014 0122 movs r2, #1 + 175 .LVL8: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 16 + + + 176 .loc 1 242 3 is_stmt 0 discriminator 2 view .LVU35 + 177 0016 1A76 strb r2, [r3, #24] + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 178 .loc 1 242 3 is_stmt 1 discriminator 2 view .LVU36 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 179 .loc 1 245 3 view .LVU37 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 180 .loc 1 246 3 view .LVU38 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 181 .loc 1 249 3 view .LVU39 + 182 0018 1249 ldr r1, .L18+4 + 183 .LVL9: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 184 .loc 1 249 3 is_stmt 0 view .LVU40 + 185 001a 0F69 ldr r7, [r1, #16] + 186 001c A022 movs r2, #160 + 187 001e 5201 lsls r2, r2, #5 + 188 0020 3A43 orrs r2, r7 + 189 0022 0A61 str r2, [r1, #16] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = Data; + 190 .loc 1 251 3 is_stmt 1 view .LVU41 + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = Data; + 191 .loc 1 251 18 is_stmt 0 view .LVU42 + 192 0024 9860 str r0, [r3, #8] + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 193 .loc 1 252 3 is_stmt 1 view .LVU43 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 194 .loc 1 252 15 is_stmt 0 view .LVU44 + 195 0026 1C61 str r4, [r3, #16] + 196 0028 5D61 str r5, [r3, #20] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 197 .loc 1 254 3 is_stmt 1 view .LVU45 + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 198 .loc 1 254 5 is_stmt 0 view .LVU46 + 199 002a 012E cmp r6, #1 + 200 002c 0BD0 beq .L16 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 201 .loc 1 260 8 is_stmt 1 view .LVU47 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 202 .loc 1 260 10 is_stmt 0 view .LVU48 + 203 002e 022E cmp r6, #2 + 204 0030 0ED0 beq .L17 + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 205 .loc 1 268 5 is_stmt 1 view .LVU49 + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 206 .loc 1 268 29 is_stmt 0 view .LVU50 + 207 0032 0B4B ldr r3, .L18 + 208 0034 0522 movs r2, #5 + 209 0036 1A70 strb r2, [r3] + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 210 .loc 1 270 5 is_stmt 1 view .LVU51 + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 211 .loc 1 270 26 is_stmt 0 view .LVU52 + 212 0038 013A subs r2, r2, #1 + 213 003a 5A60 str r2, [r3, #4] + 214 .L13: + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 17 + + + 215 .loc 1 274 3 is_stmt 1 view .LVU53 + 216 003c A1B2 uxth r1, r4 + 217 003e FFF7FEFF bl FLASH_Program_HalfWord + 218 .LVL10: + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 219 .loc 1 276 3 view .LVU54 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 220 .loc 1 276 10 is_stmt 0 view .LVU55 + 221 0042 0020 movs r0, #0 + 222 .L11: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 223 .loc 1 277 1 view .LVU56 + 224 @ sp needed + 225 .LVL11: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 226 .loc 1 277 1 view .LVU57 + 227 0044 F8BD pop {r3, r4, r5, r6, r7, pc} + 228 .LVL12: + 229 .L16: + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 230 .loc 1 256 5 is_stmt 1 view .LVU58 + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 231 .loc 1 256 29 is_stmt 0 view .LVU59 + 232 0046 0322 movs r2, #3 + 233 0048 1A70 strb r2, [r3] + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 234 .loc 1 258 5 is_stmt 1 view .LVU60 + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 235 .loc 1 258 26 is_stmt 0 view .LVU61 + 236 004a 023A subs r2, r2, #2 + 237 004c 5A60 str r2, [r3, #4] + 238 004e F5E7 b .L13 + 239 .L17: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 240 .loc 1 262 5 is_stmt 1 view .LVU62 + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 241 .loc 1 262 29 is_stmt 0 view .LVU63 + 242 0050 034B ldr r3, .L18 + 243 0052 0422 movs r2, #4 + 244 0054 1A70 strb r2, [r3] + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 245 .loc 1 264 5 is_stmt 1 view .LVU64 + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 246 .loc 1 264 26 is_stmt 0 view .LVU65 + 247 0056 023A subs r2, r2, #2 + 248 0058 5A60 str r2, [r3, #4] + 249 005a EFE7 b .L13 + 250 .LVL13: + 251 .L15: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 252 .loc 1 242 3 discriminator 1 view .LVU66 + 253 005c 0220 movs r0, #2 + 254 .LVL14: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 255 .loc 1 242 3 discriminator 1 view .LVU67 + 256 005e F1E7 b .L11 + 257 .L19: + ARM GAS /tmp/cczmGvTG.s page 18 + + + 258 .align 2 + 259 .L18: + 260 0060 00000000 .word pFlash + 261 0064 00200240 .word 1073881088 + 262 .cfi_endproc + 263 .LFE41: + 265 .section .text.HAL_FLASH_EndOfOperationCallback,"ax",%progbits + 266 .align 1 + 267 .weak HAL_FLASH_EndOfOperationCallback + 268 .syntax unified + 269 .code 16 + 270 .thumb_func + 272 HAL_FLASH_EndOfOperationCallback: + 273 .LVL15: + 274 .LFB43: + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 275 .loc 1 427 1 is_stmt 1 view -0 + 276 .cfi_startproc + 277 @ args = 0, pretend = 0, frame = 0 + 278 @ frame_needed = 0, uses_anonymous_args = 0 + 279 @ link register save eliminated. + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 280 .loc 1 429 3 view .LVU69 + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 281 .loc 1 434 1 is_stmt 0 view .LVU70 + 282 @ sp needed + 283 0000 7047 bx lr + 284 .cfi_endproc + 285 .LFE43: + 287 .section .text.HAL_FLASH_OperationErrorCallback,"ax",%progbits + 288 .align 1 + 289 .weak HAL_FLASH_OperationErrorCallback + 290 .syntax unified + 291 .code 16 + 292 .thumb_func + 294 HAL_FLASH_OperationErrorCallback: + 295 .LVL16: + 296 .LFB44: + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 297 .loc 1 445 1 is_stmt 1 view -0 + 298 .cfi_startproc + 299 @ args = 0, pretend = 0, frame = 0 + 300 @ frame_needed = 0, uses_anonymous_args = 0 + 301 @ link register save eliminated. + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 302 .loc 1 447 3 view .LVU72 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 303 .loc 1 452 1 is_stmt 0 view .LVU73 + 304 @ sp needed + 305 0000 7047 bx lr + 306 .cfi_endproc + 307 .LFE44: + 309 .section .text.HAL_FLASH_IRQHandler,"ax",%progbits + 310 .align 1 + 311 .global HAL_FLASH_IRQHandler + 312 .syntax unified + 313 .code 16 + ARM GAS /tmp/cczmGvTG.s page 19 + + + 314 .thumb_func + 316 HAL_FLASH_IRQHandler: + 317 .LFB42: + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t addresstmp = 0U; + 318 .loc 1 284 1 is_stmt 1 view -0 + 319 .cfi_startproc + 320 @ args = 0, pretend = 0, frame = 0 + 321 @ frame_needed = 0, uses_anonymous_args = 0 + 322 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 323 .cfi_def_cfa_offset 24 + 324 .cfi_offset 3, -24 + 325 .cfi_offset 4, -20 + 326 .cfi_offset 5, -16 + 327 .cfi_offset 6, -12 + 328 .cfi_offset 7, -8 + 329 .cfi_offset 14, -4 + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 330 .loc 1 285 3 view .LVU75 + 331 .LVL17: + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 332 .loc 1 288 3 view .LVU76 + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 333 .loc 1 288 6 is_stmt 0 view .LVU77 + 334 0002 514B ldr r3, .L42 + 335 0004 DB68 ldr r3, [r3, #12] + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 336 .loc 1 288 5 view .LVU78 + 337 0006 DB06 lsls r3, r3, #27 + 338 0008 03D4 bmi .L23 + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 339 .loc 1 288 48 discriminator 1 view .LVU79 + 340 000a 4F4B ldr r3, .L42 + 341 000c DB68 ldr r3, [r3, #12] + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 342 .loc 1 288 46 discriminator 1 view .LVU80 + 343 000e 5B07 lsls r3, r3, #29 + 344 0010 0BD5 bpl .L24 + 345 .L23: + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset address */ + 346 .loc 1 291 5 is_stmt 1 view .LVU81 + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset address */ + 347 .loc 1 291 16 is_stmt 0 view .LVU82 + 348 0012 4E4C ldr r4, .L42+4 + 349 0014 A568 ldr r5, [r4, #8] + 350 .LVL18: + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 351 .loc 1 293 5 is_stmt 1 view .LVU83 + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 352 .loc 1 293 20 is_stmt 0 view .LVU84 + 353 0016 0123 movs r3, #1 + 354 0018 5B42 rsbs r3, r3, #0 + 355 001a A360 str r3, [r4, #8] + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 356 .loc 1 296 5 is_stmt 1 view .LVU85 + 357 001c FFF7FEFF bl FLASH_SetErrorCode + 358 .LVL19: + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 20 + + + 359 .loc 1 299 5 view .LVU86 + 360 0020 2800 movs r0, r5 + 361 0022 FFF7FEFF bl HAL_FLASH_OperationErrorCallback + 362 .LVL20: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 363 .loc 1 302 5 view .LVU87 + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 364 .loc 1 302 29 is_stmt 0 view .LVU88 + 365 0026 0023 movs r3, #0 + 366 0028 2370 strb r3, [r4] + 367 .LVL21: + 368 .L24: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 369 .loc 1 306 3 is_stmt 1 view .LVU89 + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 370 .loc 1 306 6 is_stmt 0 view .LVU90 + 371 002a 474B ldr r3, .L42 + 372 002c DB68 ldr r3, [r3, #12] + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 373 .loc 1 306 5 view .LVU91 + 374 002e 9B06 lsls r3, r3, #26 + 375 0030 28D5 bpl .L25 + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 376 .loc 1 309 5 is_stmt 1 view .LVU92 + 377 0032 454B ldr r3, .L42 + 378 0034 2022 movs r2, #32 + 379 0036 DA60 str r2, [r3, #12] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 380 .loc 1 312 5 view .LVU93 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 381 .loc 1 312 14 is_stmt 0 view .LVU94 + 382 0038 444B ldr r3, .L42+4 + 383 003a 1B78 ldrb r3, [r3] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 384 .loc 1 312 7 view .LVU95 + 385 003c 002B cmp r3, #0 + 386 003e 21D0 beq .L25 + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 387 .loc 1 314 7 is_stmt 1 view .LVU96 + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 388 .loc 1 314 16 is_stmt 0 view .LVU97 + 389 0040 424B ldr r3, .L42+4 + 390 0042 1B78 ldrb r3, [r3] + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 391 .loc 1 314 9 view .LVU98 + 392 0044 012B cmp r3, #1 + 393 0046 2ED0 beq .L37 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 394 .loc 1 345 12 is_stmt 1 view .LVU99 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 395 .loc 1 345 21 is_stmt 0 view .LVU100 + 396 0048 404B ldr r3, .L42+4 + 397 004a 1B78 ldrb r3, [r3] + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 398 .loc 1 345 14 view .LVU101 + 399 004c 022B cmp r3, #2 + 400 004e 4CD0 beq .L38 + ARM GAS /tmp/cczmGvTG.s page 21 + + + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 401 .loc 1 360 9 is_stmt 1 view .LVU102 + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 402 .loc 1 360 15 is_stmt 0 view .LVU103 + 403 0050 3E4B ldr r3, .L42+4 + 404 0052 5A68 ldr r2, [r3, #4] + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 405 .loc 1 360 29 view .LVU104 + 406 0054 013A subs r2, r2, #1 + 407 0056 5A60 str r2, [r3, #4] + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 408 .loc 1 363 9 is_stmt 1 view .LVU105 + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 409 .loc 1 363 18 is_stmt 0 view .LVU106 + 410 0058 5B68 ldr r3, [r3, #4] + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 411 .loc 1 363 11 view .LVU107 + 412 005a 002B cmp r3, #0 + 413 005c 51D1 bne .L39 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 414 .loc 1 382 11 is_stmt 1 view .LVU108 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 415 .loc 1 382 21 is_stmt 0 view .LVU109 + 416 005e 3B4B ldr r3, .L42+4 + 417 0060 1B78 ldrb r3, [r3] + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 418 .loc 1 382 14 view .LVU110 + 419 0062 032B cmp r3, #3 + 420 0064 65D0 beq .L40 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 421 .loc 1 386 16 is_stmt 1 view .LVU111 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 422 .loc 1 386 26 is_stmt 0 view .LVU112 + 423 0066 394B ldr r3, .L42+4 + 424 0068 1B78 ldrb r3, [r3] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 425 .loc 1 386 19 view .LVU113 + 426 006a 042B cmp r3, #4 + 427 006c 66D0 beq .L41 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 428 .loc 1 392 13 is_stmt 1 view .LVU114 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 429 .loc 1 392 52 is_stmt 0 view .LVU115 + 430 006e 374B ldr r3, .L42+4 + 431 0070 9868 ldr r0, [r3, #8] + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 432 .loc 1 392 13 view .LVU116 + 433 0072 0638 subs r0, r0, #6 + 434 0074 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 435 .LVL22: + 436 .L31: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 437 .loc 1 396 11 is_stmt 1 view .LVU117 + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 438 .loc 1 396 26 is_stmt 0 view .LVU118 + 439 0078 344B ldr r3, .L42+4 + 440 007a 0122 movs r2, #1 + ARM GAS /tmp/cczmGvTG.s page 22 + + + 441 007c 5242 rsbs r2, r2, #0 + 442 007e 9A60 str r2, [r3, #8] + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 443 .loc 1 397 11 is_stmt 1 view .LVU119 + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 444 .loc 1 397 35 is_stmt 0 view .LVU120 + 445 0080 0022 movs r2, #0 + 446 0082 1A70 strb r2, [r3] + 447 .L25: + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 448 .loc 1 404 3 is_stmt 1 view .LVU121 + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 449 .loc 1 404 12 is_stmt 0 view .LVU122 + 450 0084 314B ldr r3, .L42+4 + 451 0086 1B78 ldrb r3, [r3] + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 452 .loc 1 404 5 view .LVU123 + 453 0088 002B cmp r3, #0 + 454 008a 0BD1 bne .L22 + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 455 .loc 1 407 5 is_stmt 1 view .LVU124 + 456 008c 2E4B ldr r3, .L42 + 457 008e 1A69 ldr r2, [r3, #16] + 458 0090 0721 movs r1, #7 + 459 0092 8A43 bics r2, r1 + 460 0094 1A61 str r2, [r3, #16] + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 461 .loc 1 410 5 view .LVU125 + 462 0096 1A69 ldr r2, [r3, #16] + 463 0098 2D49 ldr r1, .L42+8 + 464 009a 0A40 ands r2, r1 + 465 009c 1A61 str r2, [r3, #16] + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 466 .loc 1 413 5 view .LVU126 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 467 .loc 1 413 5 view .LVU127 + 468 009e 2B4B ldr r3, .L42+4 + 469 00a0 0022 movs r2, #0 + 470 00a2 1A76 strb r2, [r3, #24] + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 471 .loc 1 413 5 discriminator 1 view .LVU128 + 472 .L22: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 473 .loc 1 415 1 is_stmt 0 view .LVU129 + 474 @ sp needed + 475 00a4 F8BD pop {r3, r4, r5, r6, r7, pc} + 476 .L37: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 477 .loc 1 317 9 is_stmt 1 view .LVU130 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 478 .loc 1 317 15 is_stmt 0 view .LVU131 + 479 00a6 294B ldr r3, .L42+4 + 480 00a8 5A68 ldr r2, [r3, #4] + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 481 .loc 1 317 29 view .LVU132 + 482 00aa 013A subs r2, r2, #1 + 483 00ac 5A60 str r2, [r3, #4] + ARM GAS /tmp/cczmGvTG.s page 23 + + + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 484 .loc 1 320 9 is_stmt 1 view .LVU133 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 485 .loc 1 320 18 is_stmt 0 view .LVU134 + 486 00ae 5B68 ldr r3, [r3, #4] + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 487 .loc 1 320 11 view .LVU135 + 488 00b0 002B cmp r3, #0 + 489 00b2 11D0 beq .L27 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 490 .loc 1 322 11 is_stmt 1 view .LVU136 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 491 .loc 1 322 22 is_stmt 0 view .LVU137 + 492 00b4 254C ldr r4, .L42+4 + 493 00b6 A068 ldr r0, [r4, #8] + 494 .LVL23: + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 495 .loc 1 324 11 is_stmt 1 view .LVU138 + 496 00b8 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 497 .LVL24: + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 498 .loc 1 327 11 view .LVU139 + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 499 .loc 1 327 30 is_stmt 0 view .LVU140 + 500 00bc A068 ldr r0, [r4, #8] + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 501 .loc 1 327 22 view .LVU141 + 502 00be 8023 movs r3, #128 + 503 00c0 DB00 lsls r3, r3, #3 + 504 00c2 9C46 mov ip, r3 + 505 00c4 6044 add r0, r0, ip + 506 .LVL25: + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 507 .loc 1 328 11 is_stmt 1 view .LVU142 + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 508 .loc 1 328 26 is_stmt 0 view .LVU143 + 509 00c6 A060 str r0, [r4, #8] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 510 .loc 1 331 11 is_stmt 1 view .LVU144 + 511 00c8 1F4A ldr r2, .L42 + 512 00ca 1369 ldr r3, [r2, #16] + 513 00cc 0221 movs r1, #2 + 514 00ce 8B43 bics r3, r1 + 515 00d0 1361 str r3, [r2, #16] + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 516 .loc 1 333 11 view .LVU145 + 517 00d2 FFF7FEFF bl FLASH_PageErase + 518 .LVL26: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 519 .loc 1 333 11 is_stmt 0 view .LVU146 + 520 00d6 D5E7 b .L25 + 521 .LVL27: + 522 .L27: + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 523 .loc 1 339 11 is_stmt 1 view .LVU147 + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 524 .loc 1 339 26 is_stmt 0 view .LVU148 + ARM GAS /tmp/cczmGvTG.s page 24 + + + 525 00d8 1C4B ldr r3, .L42+4 + 526 00da 0120 movs r0, #1 + 527 00dc 4042 rsbs r0, r0, #0 + 528 00de 9860 str r0, [r3, #8] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 529 .loc 1 340 11 is_stmt 1 view .LVU149 + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 530 .loc 1 340 35 is_stmt 0 view .LVU150 + 531 00e0 0022 movs r2, #0 + 532 00e2 1A70 strb r2, [r3] + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 533 .loc 1 342 11 is_stmt 1 view .LVU151 + 534 00e4 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 535 .LVL28: + 536 00e8 CCE7 b .L25 + 537 .LVL29: + 538 .L38: + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 539 .loc 1 348 9 view .LVU152 + 540 00ea 174A ldr r2, .L42 + 541 00ec 1369 ldr r3, [r2, #16] + 542 00ee 0421 movs r1, #4 + 543 00f0 8B43 bics r3, r1 + 544 00f2 1361 str r3, [r2, #16] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 545 .loc 1 352 11 view .LVU153 + 546 00f4 0020 movs r0, #0 + 547 00f6 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 548 .LVL30: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 549 .loc 1 355 11 view .LVU154 + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 550 .loc 1 355 35 is_stmt 0 view .LVU155 + 551 00fa 144B ldr r3, .L42+4 + 552 00fc 0022 movs r2, #0 + 553 00fe 1A70 strb r2, [r3] + 554 0100 C0E7 b .L25 + 555 .L39: + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 556 .loc 1 366 11 is_stmt 1 view .LVU156 + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 557 .loc 1 366 17 is_stmt 0 view .LVU157 + 558 0102 124B ldr r3, .L42+4 + 559 0104 9A68 ldr r2, [r3, #8] + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 560 .loc 1 366 26 view .LVU158 + 561 0106 0232 adds r2, r2, #2 + 562 0108 9A60 str r2, [r3, #8] + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 563 .loc 1 367 11 is_stmt 1 view .LVU159 + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 564 .loc 1 367 22 is_stmt 0 view .LVU160 + 565 010a 9868 ldr r0, [r3, #8] + 566 .LVL31: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 567 .loc 1 370 11 is_stmt 1 view .LVU161 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 25 + + + 568 .loc 1 370 32 is_stmt 0 view .LVU162 + 569 010c 1E69 ldr r6, [r3, #16] + 570 010e 5F69 ldr r7, [r3, #20] + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 571 .loc 1 370 38 view .LVU163 + 572 0110 3A04 lsls r2, r7, #16 + 573 0112 340C lsrs r4, r6, #16 + 574 0114 1443 orrs r4, r2 + 575 0116 3D0C lsrs r5, r7, #16 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 576 .loc 1 370 23 view .LVU164 + 577 0118 1C61 str r4, [r3, #16] + 578 011a 5D61 str r5, [r3, #20] + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 579 .loc 1 373 11 is_stmt 1 view .LVU165 + 580 011c 0A49 ldr r1, .L42 + 581 011e 0A69 ldr r2, [r1, #16] + 582 0120 0124 movs r4, #1 + 583 0122 A243 bics r2, r4 + 584 0124 0A61 str r2, [r1, #16] + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 585 .loc 1 376 11 view .LVU166 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 586 .loc 1 376 62 is_stmt 0 view .LVU167 + 587 0126 1A69 ldr r2, [r3, #16] + 588 0128 5B69 ldr r3, [r3, #20] + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 589 .loc 1 376 11 view .LVU168 + 590 012a 91B2 uxth r1, r2 + 591 012c FFF7FEFF bl FLASH_Program_HalfWord + 592 .LVL32: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 593 .loc 1 376 11 view .LVU169 + 594 0130 A8E7 b .L25 + 595 .LVL33: + 596 .L40: + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 597 .loc 1 384 13 is_stmt 1 view .LVU170 + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 598 .loc 1 384 52 is_stmt 0 view .LVU171 + 599 0132 064B ldr r3, .L42+4 + 600 0134 9868 ldr r0, [r3, #8] + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 601 .loc 1 384 13 view .LVU172 + 602 0136 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 603 .LVL34: + 604 013a 9DE7 b .L31 + 605 .L41: + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 606 .loc 1 388 13 is_stmt 1 view .LVU173 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 607 .loc 1 388 52 is_stmt 0 view .LVU174 + 608 013c 034B ldr r3, .L42+4 + 609 013e 9868 ldr r0, [r3, #8] + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 610 .loc 1 388 13 view .LVU175 + 611 0140 0238 subs r0, r0, #2 + ARM GAS /tmp/cczmGvTG.s page 26 + + + 612 0142 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 613 .LVL35: + 614 0146 97E7 b .L31 + 615 .L43: + 616 .align 2 + 617 .L42: + 618 0148 00200240 .word 1073881088 + 619 014c 00000000 .word pFlash + 620 0150 FFEBFFFF .word -5121 + 621 .cfi_endproc + 622 .LFE42: + 624 .section .text.HAL_FLASH_Unlock,"ax",%progbits + 625 .align 1 + 626 .global HAL_FLASH_Unlock + 627 .syntax unified + 628 .code 16 + 629 .thumb_func + 631 HAL_FLASH_Unlock: + 632 .LFB45: + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 633 .loc 1 478 1 is_stmt 1 view -0 + 634 .cfi_startproc + 635 @ args = 0, pretend = 0, frame = 0 + 636 @ frame_needed = 0, uses_anonymous_args = 0 + 637 @ link register save eliminated. + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 638 .loc 1 479 3 view .LVU177 + 639 .LVL36: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 640 .loc 1 481 3 view .LVU178 + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 641 .loc 1 481 6 is_stmt 0 view .LVU179 + 642 0000 084B ldr r3, .L48 + 643 0002 1B69 ldr r3, [r3, #16] + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 644 .loc 1 481 5 view .LVU180 + 645 0004 1B06 lsls r3, r3, #24 + 646 0006 09D5 bpl .L46 + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + 647 .loc 1 484 5 is_stmt 1 view .LVU181 + 648 0008 064B ldr r3, .L48 + 649 000a 074A ldr r2, .L48+4 + 650 000c 5A60 str r2, [r3, #4] + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 651 .loc 1 485 5 view .LVU182 + 652 000e 074A ldr r2, .L48+8 + 653 0010 5A60 str r2, [r3, #4] + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 654 .loc 1 488 5 view .LVU183 + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 655 .loc 1 488 8 is_stmt 0 view .LVU184 + 656 0012 1B69 ldr r3, [r3, #16] + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 657 .loc 1 488 7 view .LVU185 + 658 0014 1B06 lsls r3, r3, #24 + 659 0016 03D4 bmi .L47 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 27 + + + 660 .loc 1 479 21 view .LVU186 + 661 0018 0020 movs r0, #0 + 662 001a 00E0 b .L45 + 663 .L46: + 664 001c 0020 movs r0, #0 + 665 .L45: + 666 .LVL37: + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 667 .loc 1 494 3 is_stmt 1 view .LVU187 + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 668 .loc 1 495 1 is_stmt 0 view .LVU188 + 669 @ sp needed + 670 001e 7047 bx lr + 671 .LVL38: + 672 .L47: + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 673 .loc 1 490 14 view .LVU189 + 674 0020 0120 movs r0, #1 + 675 0022 FCE7 b .L45 + 676 .L49: + 677 .align 2 + 678 .L48: + 679 0024 00200240 .word 1073881088 + 680 0028 23016745 .word 1164378403 + 681 002c AB89EFCD .word -839939669 + 682 .cfi_endproc + 683 .LFE45: + 685 .section .text.HAL_FLASH_Lock,"ax",%progbits + 686 .align 1 + 687 .global HAL_FLASH_Lock + 688 .syntax unified + 689 .code 16 + 690 .thumb_func + 692 HAL_FLASH_Lock: + 693 .LFB46: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 694 .loc 1 502 1 is_stmt 1 view -0 + 695 .cfi_startproc + 696 @ args = 0, pretend = 0, frame = 0 + 697 @ frame_needed = 0, uses_anonymous_args = 0 + 698 @ link register save eliminated. + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 699 .loc 1 504 3 view .LVU191 + 700 0000 034A ldr r2, .L51 + 701 0002 1369 ldr r3, [r2, #16] + 702 0004 8021 movs r1, #128 + 703 0006 0B43 orrs r3, r1 + 704 0008 1361 str r3, [r2, #16] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 705 .loc 1 506 3 view .LVU192 + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 706 .loc 1 507 1 is_stmt 0 view .LVU193 + 707 000a 0020 movs r0, #0 + 708 @ sp needed + 709 000c 7047 bx lr + 710 .L52: + 711 000e C046 .align 2 + ARM GAS /tmp/cczmGvTG.s page 28 + + + 712 .L51: + 713 0010 00200240 .word 1073881088 + 714 .cfi_endproc + 715 .LFE46: + 717 .section .text.HAL_FLASH_OB_Unlock,"ax",%progbits + 718 .align 1 + 719 .global HAL_FLASH_OB_Unlock + 720 .syntax unified + 721 .code 16 + 722 .thumb_func + 724 HAL_FLASH_OB_Unlock: + 725 .LFB47: + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 726 .loc 1 514 1 is_stmt 1 view -0 + 727 .cfi_startproc + 728 @ args = 0, pretend = 0, frame = 0 + 729 @ frame_needed = 0, uses_anonymous_args = 0 + 730 @ link register save eliminated. + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 731 .loc 1 515 3 view .LVU195 + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 732 .loc 1 515 7 is_stmt 0 view .LVU196 + 733 0000 064B ldr r3, .L56 + 734 0002 1B69 ldr r3, [r3, #16] + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 735 .loc 1 515 6 view .LVU197 + 736 0004 9B05 lsls r3, r3, #22 + 737 0006 06D4 bmi .L55 + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 738 .loc 1 518 5 is_stmt 1 view .LVU198 + 739 0008 044B ldr r3, .L56 + 740 000a 054A ldr r2, .L56+4 + 741 000c 9A60 str r2, [r3, #8] + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 742 .loc 1 519 5 view .LVU199 + 743 000e 054A ldr r2, .L56+8 + 744 0010 9A60 str r2, [r3, #8] + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 745 .loc 1 526 3 view .LVU200 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 746 .loc 1 526 10 is_stmt 0 view .LVU201 + 747 0012 0020 movs r0, #0 + 748 .L54: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 749 .loc 1 527 1 view .LVU202 + 750 @ sp needed + 751 0014 7047 bx lr + 752 .L55: + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 753 .loc 1 523 12 view .LVU203 + 754 0016 0120 movs r0, #1 + 755 0018 FCE7 b .L54 + 756 .L57: + 757 001a C046 .align 2 + 758 .L56: + 759 001c 00200240 .word 1073881088 + 760 0020 23016745 .word 1164378403 + ARM GAS /tmp/cczmGvTG.s page 29 + + + 761 0024 AB89EFCD .word -839939669 + 762 .cfi_endproc + 763 .LFE47: + 765 .section .text.HAL_FLASH_OB_Lock,"ax",%progbits + 766 .align 1 + 767 .global HAL_FLASH_OB_Lock + 768 .syntax unified + 769 .code 16 + 770 .thumb_func + 772 HAL_FLASH_OB_Lock: + 773 .LFB48: + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 774 .loc 1 534 1 is_stmt 1 view -0 + 775 .cfi_startproc + 776 @ args = 0, pretend = 0, frame = 0 + 777 @ frame_needed = 0, uses_anonymous_args = 0 + 778 @ link register save eliminated. + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 779 .loc 1 536 3 view .LVU205 + 780 0000 034A ldr r2, .L59 + 781 0002 1369 ldr r3, [r2, #16] + 782 0004 0349 ldr r1, .L59+4 + 783 0006 0B40 ands r3, r1 + 784 0008 1361 str r3, [r2, #16] + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 785 .loc 1 538 3 view .LVU206 + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 786 .loc 1 539 1 is_stmt 0 view .LVU207 + 787 000a 0020 movs r0, #0 + 788 @ sp needed + 789 000c 7047 bx lr + 790 .L60: + 791 000e C046 .align 2 + 792 .L59: + 793 0010 00200240 .word 1073881088 + 794 0014 FFFDFFFF .word -513 + 795 .cfi_endproc + 796 .LFE48: + 798 .section .text.HAL_FLASH_GetError,"ax",%progbits + 799 .align 1 + 800 .global HAL_FLASH_GetError + 801 .syntax unified + 802 .code 16 + 803 .thumb_func + 805 HAL_FLASH_GetError: + 806 .LFB50: + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return pFlash.ErrorCode; + 807 .loc 1 579 1 is_stmt 1 view -0 + 808 .cfi_startproc + 809 @ args = 0, pretend = 0, frame = 0 + 810 @ frame_needed = 0, uses_anonymous_args = 0 + 811 @ link register save eliminated. + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 812 .loc 1 580 4 view .LVU209 + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 813 .loc 1 580 17 is_stmt 0 view .LVU210 + 814 0000 014B ldr r3, .L62 + ARM GAS /tmp/cczmGvTG.s page 30 + + + 815 0002 D869 ldr r0, [r3, #28] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 816 .loc 1 581 1 view .LVU211 + 817 @ sp needed + 818 0004 7047 bx lr + 819 .L63: + 820 0006 C046 .align 2 + 821 .L62: + 822 0008 00000000 .word pFlash + 823 .cfi_endproc + 824 .LFE50: + 826 .section .text.FLASH_WaitForLastOperation,"ax",%progbits + 827 .align 1 + 828 .global FLASH_WaitForLastOperation + 829 .syntax unified + 830 .code 16 + 831 .thumb_func + 833 FLASH_WaitForLastOperation: + 834 .LVL39: + 835 .LFB52: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 836 .loc 1 619 1 is_stmt 1 view -0 + 837 .cfi_startproc + 838 @ args = 0, pretend = 0, frame = 0 + 839 @ frame_needed = 0, uses_anonymous_args = 0 + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 840 .loc 1 619 1 is_stmt 0 view .LVU213 + 841 0000 70B5 push {r4, r5, r6, lr} + 842 .cfi_def_cfa_offset 16 + 843 .cfi_offset 4, -16 + 844 .cfi_offset 5, -12 + 845 .cfi_offset 6, -8 + 846 .cfi_offset 14, -4 + 847 0002 0400 movs r4, r0 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 848 .loc 1 624 3 is_stmt 1 view .LVU214 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 849 .loc 1 624 24 is_stmt 0 view .LVU215 + 850 0004 FFF7FEFF bl HAL_GetTick + 851 .LVL40: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 852 .loc 1 624 24 view .LVU216 + 853 0008 0500 movs r5, r0 + 854 .LVL41: + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 855 .loc 1 626 3 is_stmt 1 view .LVU217 + 856 .L66: + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 857 .loc 1 626 9 view .LVU218 + 858 000a 124B ldr r3, .L77 + 859 000c DB68 ldr r3, [r3, #12] + 860 000e DB07 lsls r3, r3, #31 + 861 0010 0AD5 bpl .L76 + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 862 .loc 1 628 5 view .LVU219 + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 863 .loc 1 628 8 is_stmt 0 view .LVU220 + ARM GAS /tmp/cczmGvTG.s page 31 + + + 864 0012 631C adds r3, r4, #1 + 865 0014 F9D0 beq .L66 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 866 .loc 1 630 7 is_stmt 1 view .LVU221 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 867 .loc 1 630 9 is_stmt 0 view .LVU222 + 868 0016 002C cmp r4, #0 + 869 0018 04D0 beq .L67 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 870 .loc 1 630 31 discriminator 1 view .LVU223 + 871 001a FFF7FEFF bl HAL_GetTick + 872 .LVL42: + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 873 .loc 1 630 44 discriminator 1 view .LVU224 + 874 001e 401B subs r0, r0, r5 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 875 .loc 1 630 26 discriminator 1 view .LVU225 + 876 0020 A042 cmp r0, r4 + 877 0022 F2D9 bls .L66 + 878 .L67: + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 879 .loc 1 632 9 is_stmt 1 view .LVU226 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 880 .loc 1 632 16 is_stmt 0 view .LVU227 + 881 0024 0320 movs r0, #3 + 882 0026 0FE0 b .L68 + 883 .L76: + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 884 .loc 1 638 3 is_stmt 1 view .LVU228 + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 885 .loc 1 638 7 is_stmt 0 view .LVU229 + 886 0028 0A4B ldr r3, .L77 + 887 002a DB68 ldr r3, [r3, #12] + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 888 .loc 1 638 6 view .LVU230 + 889 002c 9B06 lsls r3, r3, #26 + 890 002e 02D5 bpl .L70 + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 891 .loc 1 641 5 is_stmt 1 view .LVU231 + 892 0030 084B ldr r3, .L77 + 893 0032 2022 movs r2, #32 + 894 0034 DA60 str r2, [r3, #12] + 895 .L70: + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 896 .loc 1 644 3 view .LVU232 + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 897 .loc 1 644 6 is_stmt 0 view .LVU233 + 898 0036 074B ldr r3, .L77 + 899 0038 DB68 ldr r3, [r3, #12] + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 900 .loc 1 644 5 view .LVU234 + 901 003a DB06 lsls r3, r3, #27 + 902 003c 05D4 bmi .L71 + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 903 .loc 1 645 6 view .LVU235 + 904 003e 054B ldr r3, .L77 + 905 0040 DB68 ldr r3, [r3, #12] + ARM GAS /tmp/cczmGvTG.s page 32 + + + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 906 .loc 1 644 47 discriminator 1 view .LVU236 + 907 0042 5B07 lsls r3, r3, #29 + 908 0044 01D4 bmi .L71 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 909 .loc 1 653 10 view .LVU237 + 910 0046 0020 movs r0, #0 + 911 .L68: + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 912 .loc 1 654 1 view .LVU238 + 913 @ sp needed + 914 .LVL43: + 915 .LVL44: + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 916 .loc 1 654 1 view .LVU239 + 917 0048 70BD pop {r4, r5, r6, pc} + 918 .LVL45: + 919 .L71: + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 920 .loc 1 648 5 is_stmt 1 view .LVU240 + 921 004a FFF7FEFF bl FLASH_SetErrorCode + 922 .LVL46: + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 923 .loc 1 649 5 view .LVU241 + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 924 .loc 1 649 12 is_stmt 0 view .LVU242 + 925 004e 0120 movs r0, #1 + 926 0050 FAE7 b .L68 + 927 .L78: + 928 0052 C046 .align 2 + 929 .L77: + 930 0054 00200240 .word 1073881088 + 931 .cfi_endproc + 932 .LFE52: + 934 .section .text.HAL_FLASH_Program,"ax",%progbits + 935 .align 1 + 936 .global HAL_FLASH_Program + 937 .syntax unified + 938 .code 16 + 939 .thumb_func + 941 HAL_FLASH_Program: + 942 .LVL47: + 943 .LFB40: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 944 .loc 1 166 1 is_stmt 1 view -0 + 945 .cfi_startproc + 946 @ args = 0, pretend = 0, frame = 0 + 947 @ frame_needed = 0, uses_anonymous_args = 0 + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 948 .loc 1 166 1 is_stmt 0 view .LVU244 + 949 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 950 .cfi_def_cfa_offset 24 + 951 .cfi_offset 3, -24 + 952 .cfi_offset 4, -20 + 953 .cfi_offset 5, -16 + 954 .cfi_offset 6, -12 + 955 .cfi_offset 7, -8 + ARM GAS /tmp/cczmGvTG.s page 33 + + + 956 .cfi_offset 14, -4 + 957 0002 CE46 mov lr, r9 + 958 0004 4746 mov r7, r8 + 959 0006 80B5 push {r7, lr} + 960 .cfi_def_cfa_offset 32 + 961 .cfi_offset 8, -32 + 962 .cfi_offset 9, -28 + 963 0008 0500 movs r5, r0 + 964 000a 0E00 movs r6, r1 + 965 000c 9046 mov r8, r2 + 966 000e 1F00 movs r7, r3 + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t index = 0U; + 967 .loc 1 167 3 is_stmt 1 view .LVU245 + 968 .LVL48: + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t nbiterations = 0U; + 969 .loc 1 168 3 view .LVU246 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 970 .loc 1 169 3 view .LVU247 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 971 .loc 1 172 3 view .LVU248 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 972 .loc 1 172 3 view .LVU249 + 973 0010 214B ldr r3, .L91 + 974 0012 1B7E ldrb r3, [r3, #24] + 975 0014 012B cmp r3, #1 + 976 0016 3DD0 beq .L87 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 977 .loc 1 172 3 discriminator 2 view .LVU250 + 978 0018 1F4B ldr r3, .L91 + 979 001a 0122 movs r2, #1 + 980 .LVL49: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 981 .loc 1 172 3 is_stmt 0 discriminator 2 view .LVU251 + 982 001c 1A76 strb r2, [r3, #24] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 983 .loc 1 172 3 is_stmt 1 discriminator 2 view .LVU252 + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 984 .loc 1 175 3 view .LVU253 + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 985 .loc 1 176 3 view .LVU254 + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 986 .loc 1 179 5 view .LVU255 + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 987 .loc 1 179 14 is_stmt 0 view .LVU256 + 988 001e 1F48 ldr r0, .L91+4 + 989 .LVL50: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 990 .loc 1 179 14 view .LVU257 + 991 0020 FFF7FEFF bl FLASH_WaitForLastOperation + 992 .LVL51: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 993 .loc 1 179 14 view .LVU258 + 994 0024 041E subs r4, r0, #0 + 995 .LVL52: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 996 .loc 1 181 3 is_stmt 1 view .LVU259 + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + ARM GAS /tmp/cczmGvTG.s page 34 + + + 997 .loc 1 181 5 is_stmt 0 view .LVU260 + 998 0026 2ED1 bne .L81 + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 999 .loc 1 183 5 is_stmt 1 view .LVU261 + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1000 .loc 1 183 7 is_stmt 0 view .LVU262 + 1001 0028 012D cmp r5, #1 + 1002 002a 07D0 beq .L88 + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1003 .loc 1 188 10 is_stmt 1 view .LVU263 + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1004 .loc 1 188 12 is_stmt 0 view .LVU264 + 1005 002c 022D cmp r5, #2 + 1006 002e 02D0 beq .L90 + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1007 .loc 1 196 20 view .LVU265 + 1008 0030 0423 movs r3, #4 + 1009 0032 9946 mov r9, r3 + 1010 .LVL53: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1011 .loc 1 199 5 is_stmt 1 view .LVU266 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1012 .loc 1 199 5 is_stmt 0 view .LVU267 + 1013 0034 1DE0 b .L83 + 1014 .LVL54: + 1015 .L90: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1016 .loc 1 191 20 view .LVU268 + 1017 0036 0223 movs r3, #2 + 1018 0038 9946 mov r9, r3 + 1019 003a 1AE0 b .L83 + 1020 .L88: + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1021 .loc 1 186 20 view .LVU269 + 1022 003c 0123 movs r3, #1 + 1023 003e 9946 mov r9, r3 + 1024 0040 17E0 b .L83 + 1025 .LVL55: + 1026 .L84: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1027 .loc 1 201 70 view .LVU270 + 1028 0042 2022 movs r2, #32 + 1029 0044 D21A subs r2, r2, r3 + 1030 0046 3900 movs r1, r7 + 1031 0048 9140 lsls r1, r1, r2 + 1032 004a 0A00 movs r2, r1 + 1033 004c 4146 mov r1, r8 + 1034 004e D940 lsrs r1, r1, r3 + 1035 0050 1143 orrs r1, r2 + 1036 .L85: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1037 .loc 1 201 7 view .LVU271 + 1038 0052 89B2 uxth r1, r1 + 1039 0054 8019 adds r0, r0, r6 + 1040 0056 FFF7FEFF bl FLASH_Program_HalfWord + 1041 .LVL56: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cczmGvTG.s page 35 + + + 1042 .loc 1 204 9 is_stmt 1 view .LVU272 + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1043 .loc 1 204 18 is_stmt 0 view .LVU273 + 1044 005a 1048 ldr r0, .L91+4 + 1045 005c FFF7FEFF bl FLASH_WaitForLastOperation + 1046 .LVL57: + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 1047 .loc 1 207 9 is_stmt 1 view .LVU274 + 1048 0060 0F4A ldr r2, .L91+8 + 1049 0062 1369 ldr r3, [r2, #16] + 1050 0064 0121 movs r1, #1 + 1051 0066 8B43 bics r3, r1 + 1052 0068 1361 str r3, [r2, #16] + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1053 .loc 1 209 7 view .LVU275 + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1054 .loc 1 209 10 is_stmt 0 view .LVU276 + 1055 006a 0028 cmp r0, #0 + 1056 006c 0BD1 bne .L81 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1057 .loc 1 199 49 is_stmt 1 discriminator 2 view .LVU277 + 1058 006e 0134 adds r4, r4, #1 + 1059 .LVL58: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1060 .loc 1 199 49 is_stmt 0 discriminator 2 view .LVU278 + 1061 0070 E4B2 uxtb r4, r4 + 1062 .LVL59: + 1063 .L83: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1064 .loc 1 199 28 is_stmt 1 discriminator 1 view .LVU279 + 1065 0072 4C45 cmp r4, r9 + 1066 0074 07D2 bcs .L81 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1067 .loc 1 201 7 view .LVU280 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1068 .loc 1 201 44 is_stmt 0 view .LVU281 + 1069 0076 6000 lsls r0, r4, #1 + 1070 .LVL60: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1071 .loc 1 201 77 view .LVU282 + 1072 0078 2301 lsls r3, r4, #4 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1073 .loc 1 201 70 view .LVU283 + 1074 007a 1A00 movs r2, r3 + 1075 007c 203A subs r2, r2, #32 + 1076 007e E0D4 bmi .L84 + 1077 0080 3900 movs r1, r7 + 1078 0082 D140 lsrs r1, r1, r2 + 1079 0084 E5E7 b .L85 + 1080 .LVL61: + 1081 .L81: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1082 .loc 1 217 3 is_stmt 1 view .LVU284 + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1083 .loc 1 217 3 view .LVU285 + 1084 0086 044B ldr r3, .L91 + 1085 0088 0022 movs r2, #0 + ARM GAS /tmp/cczmGvTG.s page 36 + + + 1086 008a 1A76 strb r2, [r3, #24] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1087 .loc 1 217 3 view .LVU286 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1088 .loc 1 219 3 view .LVU287 + 1089 .LVL62: + 1090 .L80: + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1091 .loc 1 220 1 is_stmt 0 view .LVU288 + 1092 @ sp needed + 1093 .LVL63: + 1094 .LVL64: + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1095 .loc 1 220 1 view .LVU289 + 1096 008c C0BC pop {r6, r7} + 1097 008e B946 mov r9, r7 + 1098 0090 B046 mov r8, r6 + 1099 0092 F8BD pop {r3, r4, r5, r6, r7, pc} + 1100 .LVL65: + 1101 .L87: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1102 .loc 1 172 3 discriminator 1 view .LVU290 + 1103 0094 0220 movs r0, #2 + 1104 .LVL66: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1105 .loc 1 172 3 discriminator 1 view .LVU291 + 1106 0096 F9E7 b .L80 + 1107 .L92: + 1108 .align 2 + 1109 .L91: + 1110 0098 00000000 .word pFlash + 1111 009c 50C30000 .word 50000 + 1112 00a0 00200240 .word 1073881088 + 1113 .cfi_endproc + 1114 .LFE40: + 1116 .section .text.HAL_FLASH_OB_Launch,"ax",%progbits + 1117 .align 1 + 1118 .global HAL_FLASH_OB_Launch + 1119 .syntax unified + 1120 .code 16 + 1121 .thumb_func + 1123 HAL_FLASH_OB_Launch: + 1124 .LFB49: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 1125 .loc 1 547 1 is_stmt 1 view -0 + 1126 .cfi_startproc + 1127 @ args = 0, pretend = 0, frame = 0 + 1128 @ frame_needed = 0, uses_anonymous_args = 0 + 1129 0000 10B5 push {r4, lr} + 1130 .cfi_def_cfa_offset 8 + 1131 .cfi_offset 4, -8 + 1132 .cfi_offset 14, -4 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1133 .loc 1 549 3 view .LVU293 + 1134 0002 054A ldr r2, .L94 + 1135 0004 1169 ldr r1, [r2, #16] + 1136 0006 8023 movs r3, #128 + ARM GAS /tmp/cczmGvTG.s page 37 + + + 1137 0008 9B01 lsls r3, r3, #6 + 1138 000a 0B43 orrs r3, r1 + 1139 000c 1361 str r3, [r2, #16] + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1140 .loc 1 552 3 view .LVU294 + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1141 .loc 1 552 10 is_stmt 0 view .LVU295 + 1142 000e 0348 ldr r0, .L94+4 + 1143 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 1144 .LVL67: + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1145 .loc 1 553 1 view .LVU296 + 1146 @ sp needed + 1147 0014 10BD pop {r4, pc} + 1148 .L95: + 1149 0016 C046 .align 2 + 1150 .L94: + 1151 0018 00200240 .word 1073881088 + 1152 001c 50C30000 .word 50000 + 1153 .cfi_endproc + 1154 .LFE49: + 1156 .global pFlash + 1157 .section .bss.pFlash,"aw",%nobits + 1158 .align 3 + 1161 pFlash: + 1162 0000 00000000 .space 32 + 1162 00000000 + 1162 00000000 + 1162 00000000 + 1162 00000000 + 1163 .text + 1164 .Letext0: + 1165 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1166 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1167 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 1168 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 1169 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1170 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h" + 1171 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/cczmGvTG.s page 38 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_flash.c + /tmp/cczmGvTG.s:19 .text.FLASH_Program_HalfWord:00000000 $t + /tmp/cczmGvTG.s:24 .text.FLASH_Program_HalfWord:00000000 FLASH_Program_HalfWord + /tmp/cczmGvTG.s:56 .text.FLASH_Program_HalfWord:00000018 $d + /tmp/cczmGvTG.s:1161 .bss.pFlash:00000000 pFlash + /tmp/cczmGvTG.s:62 .text.FLASH_SetErrorCode:00000000 $t + /tmp/cczmGvTG.s:67 .text.FLASH_SetErrorCode:00000000 FLASH_SetErrorCode + /tmp/cczmGvTG.s:130 .text.FLASH_SetErrorCode:00000038 $d + /tmp/cczmGvTG.s:136 .text.HAL_FLASH_Program_IT:00000000 $t + /tmp/cczmGvTG.s:142 .text.HAL_FLASH_Program_IT:00000000 HAL_FLASH_Program_IT + /tmp/cczmGvTG.s:260 .text.HAL_FLASH_Program_IT:00000060 $d + /tmp/cczmGvTG.s:266 .text.HAL_FLASH_EndOfOperationCallback:00000000 $t + /tmp/cczmGvTG.s:272 .text.HAL_FLASH_EndOfOperationCallback:00000000 HAL_FLASH_EndOfOperationCallback + /tmp/cczmGvTG.s:288 .text.HAL_FLASH_OperationErrorCallback:00000000 $t + /tmp/cczmGvTG.s:294 .text.HAL_FLASH_OperationErrorCallback:00000000 HAL_FLASH_OperationErrorCallback + /tmp/cczmGvTG.s:310 .text.HAL_FLASH_IRQHandler:00000000 $t + /tmp/cczmGvTG.s:316 .text.HAL_FLASH_IRQHandler:00000000 HAL_FLASH_IRQHandler + /tmp/cczmGvTG.s:618 .text.HAL_FLASH_IRQHandler:00000148 $d + /tmp/cczmGvTG.s:625 .text.HAL_FLASH_Unlock:00000000 $t + /tmp/cczmGvTG.s:631 .text.HAL_FLASH_Unlock:00000000 HAL_FLASH_Unlock + /tmp/cczmGvTG.s:679 .text.HAL_FLASH_Unlock:00000024 $d + /tmp/cczmGvTG.s:686 .text.HAL_FLASH_Lock:00000000 $t + /tmp/cczmGvTG.s:692 .text.HAL_FLASH_Lock:00000000 HAL_FLASH_Lock + /tmp/cczmGvTG.s:713 .text.HAL_FLASH_Lock:00000010 $d + /tmp/cczmGvTG.s:718 .text.HAL_FLASH_OB_Unlock:00000000 $t + /tmp/cczmGvTG.s:724 .text.HAL_FLASH_OB_Unlock:00000000 HAL_FLASH_OB_Unlock + /tmp/cczmGvTG.s:759 .text.HAL_FLASH_OB_Unlock:0000001c $d + /tmp/cczmGvTG.s:766 .text.HAL_FLASH_OB_Lock:00000000 $t + /tmp/cczmGvTG.s:772 .text.HAL_FLASH_OB_Lock:00000000 HAL_FLASH_OB_Lock + /tmp/cczmGvTG.s:793 .text.HAL_FLASH_OB_Lock:00000010 $d + /tmp/cczmGvTG.s:799 .text.HAL_FLASH_GetError:00000000 $t + /tmp/cczmGvTG.s:805 .text.HAL_FLASH_GetError:00000000 HAL_FLASH_GetError + /tmp/cczmGvTG.s:822 .text.HAL_FLASH_GetError:00000008 $d + /tmp/cczmGvTG.s:827 .text.FLASH_WaitForLastOperation:00000000 $t + /tmp/cczmGvTG.s:833 .text.FLASH_WaitForLastOperation:00000000 FLASH_WaitForLastOperation + /tmp/cczmGvTG.s:930 .text.FLASH_WaitForLastOperation:00000054 $d + /tmp/cczmGvTG.s:935 .text.HAL_FLASH_Program:00000000 $t + /tmp/cczmGvTG.s:941 .text.HAL_FLASH_Program:00000000 HAL_FLASH_Program + /tmp/cczmGvTG.s:1110 .text.HAL_FLASH_Program:00000098 $d + /tmp/cczmGvTG.s:1117 .text.HAL_FLASH_OB_Launch:00000000 $t + /tmp/cczmGvTG.s:1123 .text.HAL_FLASH_OB_Launch:00000000 HAL_FLASH_OB_Launch + /tmp/cczmGvTG.s:1151 .text.HAL_FLASH_OB_Launch:00000018 $d + /tmp/cczmGvTG.s:1158 .bss.pFlash:00000000 $d + +UNDEFINED SYMBOLS +FLASH_PageErase +HAL_GetTick diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o new file mode 100644 index 0000000000000000000000000000000000000000..8eb8aaf992241bc6b54db40bc6d5d9d2e38b1eca GIT binary patch literal 13700 zcmd5@Yjhk(m9Fa7j5M;Ww`EDTTaP$OWX(vjqQvjf`)Ny-;k(vEGs)Pn~-quSsu;-Ocs`8osdNP-RkO@ z*4T#qxfOSRb#Hxj@2y+a-PJwH1MPhsoO5Ou&Z=2TVrgk=mFNa<>)ED}J`(2)kJNizBc;)_!{isoW zvAx%<_{nHnZ|MP6Q@+pwBv6Aqm&{*1dyB(r?!rxd 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a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d new file mode 100644 index 0000000..c9e1e54 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d @@ -0,0 +1,60 @@ +build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.lst new file mode 100644 index 0000000..a26cc95 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.lst @@ -0,0 +1,2940 @@ +ARM GAS /tmp/cc6zde14.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_flash_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c" + 18 .section .text.FLASH_MassErase,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 FLASH_MassErase: + 25 .LFB46: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @file stm32f0xx_hal_flash_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Extended FLASH HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * functionalities of the FLASH peripheral: + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended Initialization/de-initialization functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended I/O operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended Peripheral Control functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### Flash peripheral extended features ##### + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### How to use this driver ##### + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] This driver provides functions to configure and program the FLASH memory + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** of all STM32F0xxx devices. It includes + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Set/Reset the write protection + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Program the user Option Bytes + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Get the Read protection Level + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @attention + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * All rights reserved. + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + ARM GAS /tmp/cc6zde14.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * the root directory of this software component. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Includes ------------------------------------------------------------------*/ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #include "stm32f0xx_hal.h" + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Variables + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Variables used for Erase pages under interruption*/ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** extern FLASH_ProcessTypeDef pFlash; + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx FLASHEx + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief FLASH HAL Extension module driver + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private define ------------------------------------------------------------*/ + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_IWDGSW_BIT 8U + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA0_BIT 16U + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA1_BIT 24U + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private macro -------------------------------------------------------------*/ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private variables ---------------------------------------------------------*/ + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/ + ARM GAS /tmp/cc6zde14.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase operations */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static void FLASH_MassErase(void); + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress); + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Option bytes control */ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage); + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage); + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel); + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig); + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data); + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void); + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void); + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void); + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief FLASH Memory Erasing functions + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### FLASH Erasing Programming functions ##### + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] The FLASH Memory Erasing functions, includes the following functions: + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase: return only when erase has been done + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase_IT: end of erase is done when HAL_FLASH_EndOfOperationCallback + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** is called with parameter 0xFFFFFFFF + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] Any operation of erase should follow these steps: + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Unlock() function to enable the flash control register and + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** program memory access. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the desired function to erase page. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Lock() to disable the flash program memory access + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (recommended to protect the FLASH memory against possible unwanted operation). + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * must be called before. + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + ARM GAS /tmp/cc6zde14.s page 4 + + + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param[out] PageError pointer to variable that + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information on faulty page in case of error + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (0xFFFFFFFF means that all the pages have been correctly erased) + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Mass Erase requested for Bank1 */ + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Mass erase to be done*/ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the MER Bit */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Page Erase is requested */ + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Page Erase requested on address located on bank1 */ + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Initialization of PageError variable*/ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *PageError = 0xFFFFFFFFU; + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase page by page to be done*/ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** for(address = pEraseInit->PageAddress; + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_PageErase(address); + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc6zde14.s page 5 + + + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the PER Bit */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* In case of error, stop erase procedure and return the faulty address */ + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *PageError = address; + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** break; + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * must be called before. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If procedure already ongoing, reject the next one */ + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return HAL_ERROR; + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Mass erase to be done*/ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + ARM GAS /tmp/cc6zde14.s page 6 + + + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase by page to be done*/ + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE; + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Erase 1st page and wait for IT*/ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_PageErase(pEraseInit->PageAddress); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Option Bytes Programming functions + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### Option Bytes Programming functions ##### + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** This subsection provides a set of functions allowing to control the FLASH + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** option bytes operations. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Erases the FLASH option bytes. + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note This functions erases all option bytes except the Read protection (RDP). + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBErase(void) + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get the actual read protection Option Byte value */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** rdptmp = FLASH_OB_GetRDP(); + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc6zde14.s page 7 + + + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Restore the last read protection Option Byte value */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(rdptmp); + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the erase status */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Program option bytes + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Write protection configuration */ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_WRPSTATE(pOBInit->WRPState)); + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + ARM GAS /tmp/cc6zde14.s page 8 + + + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable of Write protection on the selected page */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_EnableWRP(pOBInit->WRPPage); + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Disable of Write protection on the selected page */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_DisableWRP(pOBInit->WRPPage); + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Read protection configuration */ + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* USER configuration */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig); + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* DATA configuration*/ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + ARM GAS /tmp/cc6zde14.s page 9 + + + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Get the Option byte configuration + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get WRP*/ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->WRPPage = FLASH_OB_GetWRP(); + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get RDP Level*/ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->RDPLevel = FLASH_OB_GetRDP(); + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get USER*/ + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->USERConfig = FLASH_OB_GetUser(); + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Get the Option byte user data + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param DATAAdress Address of the option byte DATA + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA0 + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA1 + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval Value programmed in USER data + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress) + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t value = 0U; + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (DATAAdress == OB_DATA_ADDRESS_DATA0) + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data0 */ + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA0) >> FLASH_POSITION_OB_USERDATA0_BIT; + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data1 */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA1) >> FLASH_POSITION_OB_USERDATA1_BIT; + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return value; + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Functions + ARM GAS /tmp/cc6zde14.s page 10 + + + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Full erase of FLASH memory Bank + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static void FLASH_MassErase(void) + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 26 .loc 1 499 1 view -0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 31 .loc 1 501 3 view .LVU1 + 32 .loc 1 501 20 is_stmt 0 view .LVU2 + 33 0000 064B ldr r3, .L2 + 34 0002 0022 movs r2, #0 + 35 0004 DA61 str r2, [r3, #28] + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Only bank1 will be erased*/ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_MER); + 36 .loc 1 504 5 is_stmt 1 view .LVU3 + 37 0006 064B ldr r3, .L2+4 + 38 0008 1A69 ldr r2, [r3, #16] + 39 000a 0421 movs r1, #4 + 40 000c 0A43 orrs r2, r1 + 41 000e 1A61 str r2, [r3, #16] + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 42 .loc 1 505 5 view .LVU4 + 43 0010 1A69 ldr r2, [r3, #16] + 44 0012 3C31 adds r1, r1, #60 + 45 0014 0A43 orrs r2, r1 + 46 0016 1A61 str r2, [r3, #16] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 47 .loc 1 506 1 is_stmt 0 view .LVU5 + 48 @ sp needed + 49 0018 7047 bx lr + 50 .L3: + 51 001a C046 .align 2 + 52 .L2: + 53 001c 00000000 .word pFlash + 54 0020 00200240 .word 1073881088 + 55 .cfi_endproc + 56 .LFE46: + 58 .section .text.FLASH_OB_GetWRP,"ax",%progbits + 59 .align 1 + 60 .syntax unified + 61 .code 16 + 62 .thumb_func + 64 FLASH_OB_GetWRP: + 65 .LFB52: + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + ARM GAS /tmp/cc6zde14.s page 11 + + + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Enable the write protection of the desired pages + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write protected. + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage) + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be protected ******/ + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WriteProtectPage = (uint32_t)(~((~FLASH_OB_GetWRP()) | WriteProtectPage)); + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES0TO31MASK) + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK); + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES32TO63MASK) + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U); + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO63MASK) + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO63MASK) >> 24U); + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO127MASK) + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + ARM GAS /tmp/cc6zde14.s page 12 + + + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable write protection */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP0 &= WRP0_Data; + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP1 &= WRP1_Data; + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP2 &= WRP2_Data; + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP3 &= WRP3_Data; + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + ARM GAS /tmp/cc6zde14.s page 13 + + + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Disable the write protection of the desired pages + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write unprotected. + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage) + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be unprotected ******/ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WriteProtectPage = (FLASH_OB_GetWRP() | WriteProtectPage); + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES0TO31MASK) + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK); + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES32TO63MASK) + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U); + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO63MASK) + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO63MASK) >> 24U); + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO127MASK) + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + ARM GAS /tmp/cc6zde14.s page 14 + + + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP0 &= WRP0_Data; + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP1 &= WRP1_Data; + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP2 &= WRP2_Data; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP3 &= WRP3_Data; + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + ARM GAS /tmp/cc6zde14.s page 15 + + + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Set the read protection level. + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param ReadProtectLevel specifies the read protection level. + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note Warning: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel) + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel)); + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRITE_REG(OB->RDP, ReadProtectLevel); + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Program the FLASH User Option Byte. + ARM GAS /tmp/cc6zde14.s page 16 + + + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param UserConfig The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * For few devices, following option bytes are available: nBOOT0(Bit3) & BOOT_SEL(Bit7). + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig) + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW))); + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(FLASH_OBR_BOOT_SEL) + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT_SEL((UserConfig&OB_BOOT_SEL_SET))); + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT0((UserConfig&OB_BOOT0_SET))); + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* FLASH_OBR_BOOT_SEL */ + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(FLASH_OBR_BOOT_SEL) + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->USER = UserConfig; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #else + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x88U); + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Programs a half word at a specified Option Byte Data address. + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param Address specifies the address to be programmed. + ARM GAS /tmp/cc6zde14.s page 17 + + + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be 0x1FFFF804 or 0x1FFFF806. + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param Data specifies the data to be programmed. + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data) + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_DATA_ADDRESS(Address)); + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enables the Option Bytes Programming operation */ + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the program operation is completed, disable the OPTPG Bit */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the Option Byte Data Program Status */ + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Return the FLASH Write Protection Option Bytes value. + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval The FLASH Write Protection Option Bytes value + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void) + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 66 .loc 1 889 1 is_stmt 1 view -0 + 67 .cfi_startproc + 68 @ args = 0, pretend = 0, frame = 0 + 69 @ frame_needed = 0, uses_anonymous_args = 0 + 70 @ link register save eliminated. + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return (uint32_t)(READ_REG(FLASH->WRPR)); + 71 .loc 1 891 3 view .LVU7 + 72 .loc 1 891 10 is_stmt 0 view .LVU8 + 73 0000 014B ldr r3, .L5 + 74 0002 186A ldr r0, [r3, #32] + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 75 .loc 1 892 1 view .LVU9 + 76 @ sp needed + 77 0004 7047 bx lr + 78 .L6: + 79 0006 C046 .align 2 + 80 .L5: + ARM GAS /tmp/cc6zde14.s page 18 + + + 81 0008 00200240 .word 1073881088 + 82 .cfi_endproc + 83 .LFE52: + 85 .section .text.FLASH_OB_GetRDP,"ax",%progbits + 86 .align 1 + 87 .syntax unified + 88 .code 16 + 89 .thumb_func + 91 FLASH_OB_GetRDP: + 92 .LFB53: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Returns the FLASH Read Protection level. + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval FLASH RDP level + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void) + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 93 .loc 1 903 1 is_stmt 1 view -0 + 94 .cfi_startproc + 95 @ args = 0, pretend = 0, frame = 0 + 96 @ frame_needed = 0, uses_anonymous_args = 0 + 97 @ link register save eliminated. + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t tmp_reg; + 98 .loc 1 904 3 view .LVU11 + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Read RDP level bits */ + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, (FLASH_OBR_RDPRT1 | FLASH_OBR_RDPRT2)); + 99 .loc 1 907 3 view .LVU12 + 100 .loc 1 907 13 is_stmt 0 view .LVU13 + 101 0000 064B ldr r3, .L11 + 102 0002 DB69 ldr r3, [r3, #28] + 103 .loc 1 907 11 view .LVU14 + 104 0004 0622 movs r2, #6 + 105 .LVL0: + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (tmp_reg == 0U) + 106 .loc 1 909 3 is_stmt 1 view .LVU15 + 107 .loc 1 909 6 is_stmt 0 view .LVU16 + 108 0006 1A42 tst r2, r3 + 109 0008 03D0 beq .L9 + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_0; + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else if ((tmp_reg & FLASH_OBR_RDPRT2) == FLASH_OBR_RDPRT2) + 110 .loc 1 913 8 is_stmt 1 view .LVU17 + 111 .loc 1 913 11 is_stmt 0 view .LVU18 + 112 000a 5B07 lsls r3, r3, #29 + 113 000c 03D5 bpl .L10 + 114 .LVL1: + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_2; + 115 .loc 1 915 12 view .LVU19 + 116 000e CC20 movs r0, #204 + ARM GAS /tmp/cc6zde14.s page 19 + + + 117 0010 00E0 b .L7 + 118 .LVL2: + 119 .L9: + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 120 .loc 1 911 12 view .LVU20 + 121 0012 AA20 movs r0, #170 + 122 .LVL3: + 123 .L7: + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_1; + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 124 .loc 1 921 1 view .LVU21 + 125 @ sp needed + 126 0014 7047 bx lr + 127 .L10: + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 128 .loc 1 919 12 view .LVU22 + 129 0016 BB20 movs r0, #187 + 130 0018 FCE7 b .L7 + 131 .L12: + 132 001a C046 .align 2 + 133 .L11: + 134 001c 00200240 .word 1073881088 + 135 .cfi_endproc + 136 .LFE53: + 138 .section .text.FLASH_OB_GetUser,"ax",%progbits + 139 .align 1 + 140 .syntax unified + 141 .code 16 + 142 .thumb_func + 144 FLASH_OB_GetUser: + 145 .LFB54: + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value. + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY(Bit2), nB + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * For few devices, following option bytes are available: nBOOT0(Bit3) & BOOT_SEL(Bit7). + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void) + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 146 .loc 1 930 1 is_stmt 1 view -0 + 147 .cfi_startproc + 148 @ args = 0, pretend = 0, frame = 0 + 149 @ frame_needed = 0, uses_anonymous_args = 0 + 150 @ link register save eliminated. + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the User Option Byte */ + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> FLASH_POSITION_IWDGSW_BIT); + 151 .loc 1 932 3 view .LVU24 + 152 .loc 1 932 21 is_stmt 0 view .LVU25 + 153 0000 024B ldr r3, .L14 + 154 0002 D869 ldr r0, [r3, #28] + 155 .loc 1 932 60 view .LVU26 + 156 0004 000A lsrs r0, r0, #8 + ARM GAS /tmp/cc6zde14.s page 20 + + + 157 .loc 1 932 10 discriminator 1 view .LVU27 + 158 0006 C0B2 uxtb r0, r0 + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 159 .loc 1 933 1 view .LVU28 + 160 @ sp needed + 161 0008 7047 bx lr + 162 .L15: + 163 000a C046 .align 2 + 164 .L14: + 165 000c 00200240 .word 1073881088 + 166 .cfi_endproc + 167 .LFE54: + 169 .section .text.FLASH_OB_RDP_LevelConfig,"ax",%progbits + 170 .align 1 + 171 .syntax unified + 172 .code 16 + 173 .thumb_func + 175 FLASH_OB_RDP_LevelConfig: + 176 .LVL4: + 177 .LFB49: + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 178 .loc 1 750 1 is_stmt 1 view -0 + 179 .cfi_startproc + 180 @ args = 0, pretend = 0, frame = 0 + 181 @ frame_needed = 0, uses_anonymous_args = 0 + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 182 .loc 1 750 1 is_stmt 0 view .LVU30 + 183 0000 70B5 push {r4, r5, r6, lr} + 184 .cfi_def_cfa_offset 16 + 185 .cfi_offset 4, -16 + 186 .cfi_offset 5, -12 + 187 .cfi_offset 6, -8 + 188 .cfi_offset 14, -4 + 189 0002 0400 movs r4, r0 + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 190 .loc 1 751 3 is_stmt 1 view .LVU31 + 191 .LVL5: + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 192 .loc 1 754 3 view .LVU32 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 193 .loc 1 757 3 view .LVU33 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 194 .loc 1 757 12 is_stmt 0 view .LVU34 + 195 0004 1348 ldr r0, .L19 + 196 .LVL6: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 197 .loc 1 757 12 view .LVU35 + 198 0006 FFF7FEFF bl FLASH_WaitForLastOperation + 199 .LVL7: + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 200 .loc 1 759 3 is_stmt 1 view .LVU36 + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 201 .loc 1 759 5 is_stmt 0 view .LVU37 + 202 000a 0028 cmp r0, #0 + 203 000c 00D0 beq .L18 + 204 .LVL8: + 205 .L17: + ARM GAS /tmp/cc6zde14.s page 21 + + + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 206 .loc 1 789 3 is_stmt 1 view .LVU38 + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 207 .loc 1 790 1 is_stmt 0 view .LVU39 + 208 @ sp needed + 209 .LVL9: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 210 .loc 1 790 1 view .LVU40 + 211 000e 70BD pop {r4, r5, r6, pc} + 212 .L18: + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 213 .loc 1 762 5 is_stmt 1 view .LVU41 + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 214 .loc 1 762 22 is_stmt 0 view .LVU42 + 215 0010 114B ldr r3, .L19+4 + 216 0012 0022 movs r2, #0 + 217 0014 DA61 str r2, [r3, #28] + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 218 .loc 1 765 5 is_stmt 1 view .LVU43 + 219 0016 114D ldr r5, .L19+8 + 220 0018 2B69 ldr r3, [r5, #16] + 221 001a 2026 movs r6, #32 + 222 001c 3343 orrs r3, r6 + 223 001e 2B61 str r3, [r5, #16] + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 224 .loc 1 766 5 view .LVU44 + 225 0020 2B69 ldr r3, [r5, #16] + 226 0022 4032 adds r2, r2, #64 + 227 0024 1343 orrs r3, r2 + 228 0026 2B61 str r3, [r5, #16] + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 229 .loc 1 769 5 view .LVU45 + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 230 .loc 1 769 14 is_stmt 0 view .LVU46 + 231 0028 0A48 ldr r0, .L19 + 232 .LVL10: + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 233 .loc 1 769 14 view .LVU47 + 234 002a FFF7FEFF bl FLASH_WaitForLastOperation + 235 .LVL11: + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 236 .loc 1 772 5 is_stmt 1 view .LVU48 + 237 002e 2B69 ldr r3, [r5, #16] + 238 0030 B343 bics r3, r6 + 239 0032 2B61 str r3, [r5, #16] + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 240 .loc 1 774 5 view .LVU49 + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 241 .loc 1 774 7 is_stmt 0 view .LVU50 + 242 0034 0028 cmp r0, #0 + 243 0036 EAD1 bne .L17 + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 244 .loc 1 777 7 is_stmt 1 view .LVU51 + 245 0038 2B69 ldr r3, [r5, #16] + 246 003a 103E subs r6, r6, #16 + 247 003c 3343 orrs r3, r6 + 248 003e 2B61 str r3, [r5, #16] + ARM GAS /tmp/cc6zde14.s page 22 + + + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 249 .loc 1 779 7 view .LVU52 + 250 0040 074B ldr r3, .L19+12 + 251 0042 1C80 strh r4, [r3] + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 252 .loc 1 782 7 view .LVU53 + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 253 .loc 1 782 16 is_stmt 0 view .LVU54 + 254 0044 0348 ldr r0, .L19 + 255 .LVL12: + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 256 .loc 1 782 16 view .LVU55 + 257 0046 FFF7FEFF bl FLASH_WaitForLastOperation + 258 .LVL13: + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 259 .loc 1 785 7 is_stmt 1 view .LVU56 + 260 004a 2B69 ldr r3, [r5, #16] + 261 004c B343 bics r3, r6 + 262 004e 2B61 str r3, [r5, #16] + 263 0050 DDE7 b .L17 + 264 .L20: + 265 0052 C046 .align 2 + 266 .L19: + 267 0054 50C30000 .word 50000 + 268 0058 00000000 .word pFlash + 269 005c 00200240 .word 1073881088 + 270 0060 00F8FF1F .word 536868864 + 271 .cfi_endproc + 272 .LFE49: + 274 .section .text.FLASH_OB_UserConfig,"ax",%progbits + 275 .align 1 + 276 .syntax unified + 277 .code 16 + 278 .thumb_func + 280 FLASH_OB_UserConfig: + 281 .LVL14: + 282 .LFB50: + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 283 .loc 1 801 1 view -0 + 284 .cfi_startproc + 285 @ args = 0, pretend = 0, frame = 0 + 286 @ frame_needed = 0, uses_anonymous_args = 0 + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 287 .loc 1 801 1 is_stmt 0 view .LVU58 + 288 0000 70B5 push {r4, r5, r6, lr} + 289 .cfi_def_cfa_offset 16 + 290 .cfi_offset 4, -16 + 291 .cfi_offset 5, -12 + 292 .cfi_offset 6, -8 + 293 .cfi_offset 14, -4 + 294 0002 0400 movs r4, r0 + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 295 .loc 1 802 3 is_stmt 1 view .LVU59 + 296 .LVL15: + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 297 .loc 1 805 3 view .LVU60 + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + ARM GAS /tmp/cc6zde14.s page 23 + + + 298 .loc 1 806 3 view .LVU61 + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 299 .loc 1 807 3 view .LVU62 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + 300 .loc 1 808 3 view .LVU63 + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 301 .loc 1 809 3 view .LVU64 + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(FLASH_OBR_BOOT_SEL) + 302 .loc 1 810 3 view .LVU65 + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT0((UserConfig&OB_BOOT0_SET))); + 303 .loc 1 812 3 view .LVU66 + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* FLASH_OBR_BOOT_SEL */ + 304 .loc 1 813 3 view .LVU67 + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 305 .loc 1 817 3 view .LVU68 + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 306 .loc 1 817 12 is_stmt 0 view .LVU69 + 307 0004 0B48 ldr r0, .L24 + 308 .LVL16: + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 309 .loc 1 817 12 view .LVU70 + 310 0006 FFF7FEFF bl FLASH_WaitForLastOperation + 311 .LVL17: + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 312 .loc 1 819 3 is_stmt 1 view .LVU71 + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 313 .loc 1 819 5 is_stmt 0 view .LVU72 + 314 000a 0028 cmp r0, #0 + 315 000c 00D0 beq .L23 + 316 .LVL18: + 317 .L22: + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 318 .loc 1 840 3 is_stmt 1 view .LVU73 + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 319 .loc 1 841 1 is_stmt 0 view .LVU74 + 320 @ sp needed + 321 .LVL19: + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 322 .loc 1 841 1 view .LVU75 + 323 000e 70BD pop {r4, r5, r6, pc} + 324 .L23: + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 325 .loc 1 822 5 is_stmt 1 view .LVU76 + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 326 .loc 1 822 22 is_stmt 0 view .LVU77 + 327 0010 094B ldr r3, .L24+4 + 328 0012 0022 movs r2, #0 + 329 0014 DA61 str r2, [r3, #28] + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 330 .loc 1 825 5 is_stmt 1 view .LVU78 + 331 0016 094D ldr r5, .L24+8 + 332 0018 2B69 ldr r3, [r5, #16] + 333 001a 1026 movs r6, #16 + 334 001c 3343 orrs r3, r6 + 335 001e 2B61 str r3, [r5, #16] + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #else + 336 .loc 1 828 5 view .LVU79 + ARM GAS /tmp/cc6zde14.s page 24 + + + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #else + 337 .loc 1 828 14 is_stmt 0 view .LVU80 + 338 0020 074B ldr r3, .L24+12 + 339 0022 5C80 strh r4, [r3, #2] + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 340 .loc 1 834 5 is_stmt 1 view .LVU81 + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 341 .loc 1 834 14 is_stmt 0 view .LVU82 + 342 0024 0348 ldr r0, .L24 + 343 .LVL20: + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 344 .loc 1 834 14 view .LVU83 + 345 0026 FFF7FEFF bl FLASH_WaitForLastOperation + 346 .LVL21: + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 347 .loc 1 837 5 is_stmt 1 view .LVU84 + 348 002a 2B69 ldr r3, [r5, #16] + 349 002c B343 bics r3, r6 + 350 002e 2B61 str r3, [r5, #16] + 351 0030 EDE7 b .L22 + 352 .L25: + 353 0032 C046 .align 2 + 354 .L24: + 355 0034 50C30000 .word 50000 + 356 0038 00000000 .word pFlash + 357 003c 00200240 .word 1073881088 + 358 0040 00F8FF1F .word 536868864 + 359 .cfi_endproc + 360 .LFE50: + 362 .section .text.FLASH_OB_ProgramData,"ax",%progbits + 363 .align 1 + 364 .syntax unified + 365 .code 16 + 366 .thumb_func + 368 FLASH_OB_ProgramData: + 369 .LVL22: + 370 .LFB51: + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 371 .loc 1 856 1 view -0 + 372 .cfi_startproc + 373 @ args = 0, pretend = 0, frame = 0 + 374 @ frame_needed = 0, uses_anonymous_args = 0 + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 375 .loc 1 856 1 is_stmt 0 view .LVU86 + 376 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 377 .cfi_def_cfa_offset 24 + 378 .cfi_offset 3, -24 + 379 .cfi_offset 4, -20 + 380 .cfi_offset 5, -16 + 381 .cfi_offset 6, -12 + 382 .cfi_offset 7, -8 + 383 .cfi_offset 14, -4 + 384 0002 0400 movs r4, r0 + 385 0004 0D00 movs r5, r1 + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 386 .loc 1 857 3 is_stmt 1 view .LVU87 + 387 .LVL23: + ARM GAS /tmp/cc6zde14.s page 25 + + + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 388 .loc 1 860 3 view .LVU88 + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 389 .loc 1 863 3 view .LVU89 + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 390 .loc 1 863 12 is_stmt 0 view .LVU90 + 391 0006 0B48 ldr r0, .L29 + 392 .LVL24: + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 393 .loc 1 863 12 view .LVU91 + 394 0008 FFF7FEFF bl FLASH_WaitForLastOperation + 395 .LVL25: + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 396 .loc 1 865 3 is_stmt 1 view .LVU92 + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 397 .loc 1 865 5 is_stmt 0 view .LVU93 + 398 000c 0028 cmp r0, #0 + 399 000e 00D0 beq .L28 + 400 .LVL26: + 401 .L27: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 402 .loc 1 881 3 is_stmt 1 view .LVU94 + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 403 .loc 1 882 1 is_stmt 0 view .LVU95 + 404 @ sp needed + 405 .LVL27: + 406 .LVL28: + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 407 .loc 1 882 1 view .LVU96 + 408 0010 F8BD pop {r3, r4, r5, r6, r7, pc} + 409 .LVL29: + 410 .L28: + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 411 .loc 1 868 5 is_stmt 1 view .LVU97 + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 412 .loc 1 868 22 is_stmt 0 view .LVU98 + 413 0012 094B ldr r3, .L29+4 + 414 0014 0022 movs r2, #0 + 415 0016 DA61 str r2, [r3, #28] + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 416 .loc 1 871 5 is_stmt 1 view .LVU99 + 417 0018 084E ldr r6, .L29+8 + 418 001a 3369 ldr r3, [r6, #16] + 419 001c 1027 movs r7, #16 + 420 001e 3B43 orrs r3, r7 + 421 0020 3361 str r3, [r6, #16] + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 422 .loc 1 872 5 view .LVU100 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 423 .loc 1 872 30 is_stmt 0 view .LVU101 + 424 0022 2580 strh r5, [r4] + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 425 .loc 1 875 5 is_stmt 1 view .LVU102 + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 426 .loc 1 875 14 is_stmt 0 view .LVU103 + 427 0024 0348 ldr r0, .L29 + 428 .LVL30: + ARM GAS /tmp/cc6zde14.s page 26 + + + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 429 .loc 1 875 14 view .LVU104 + 430 0026 FFF7FEFF bl FLASH_WaitForLastOperation + 431 .LVL31: + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 432 .loc 1 878 5 is_stmt 1 view .LVU105 + 433 002a 3369 ldr r3, [r6, #16] + 434 002c BB43 bics r3, r7 + 435 002e 3361 str r3, [r6, #16] + 436 0030 EEE7 b .L27 + 437 .L30: + 438 0032 C046 .align 2 + 439 .L29: + 440 0034 50C30000 .word 50000 + 441 0038 00000000 .word pFlash + 442 003c 00200240 .word 1073881088 + 443 .cfi_endproc + 444 .LFE51: + 446 .section .text.HAL_FLASHEx_OBErase,"ax",%progbits + 447 .align 1 + 448 .global HAL_FLASHEx_OBErase + 449 .syntax unified + 450 .code 16 + 451 .thumb_func + 453 HAL_FLASHEx_OBErase: + 454 .LFB42: + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 455 .loc 1 312 1 view -0 + 456 .cfi_startproc + 457 @ args = 0, pretend = 0, frame = 0 + 458 @ frame_needed = 0, uses_anonymous_args = 0 + 459 0000 70B5 push {r4, r5, r6, lr} + 460 .cfi_def_cfa_offset 16 + 461 .cfi_offset 4, -16 + 462 .cfi_offset 5, -12 + 463 .cfi_offset 6, -8 + 464 .cfi_offset 14, -4 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 465 .loc 1 313 3 view .LVU107 + 466 .LVL32: + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 467 .loc 1 314 3 view .LVU108 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 468 .loc 1 317 3 view .LVU109 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 469 .loc 1 317 12 is_stmt 0 view .LVU110 + 470 0002 FFF7FEFF bl FLASH_OB_GetRDP + 471 .LVL33: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 472 .loc 1 317 10 discriminator 1 view .LVU111 + 473 0006 C5B2 uxtb r5, r0 + 474 .LVL34: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 475 .loc 1 320 3 is_stmt 1 view .LVU112 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 476 .loc 1 320 12 is_stmt 0 view .LVU113 + 477 0008 0E48 ldr r0, .L34 + ARM GAS /tmp/cc6zde14.s page 27 + + + 478 000a FFF7FEFF bl FLASH_WaitForLastOperation + 479 .LVL35: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 480 .loc 1 322 3 is_stmt 1 view .LVU114 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 481 .loc 1 322 5 is_stmt 0 view .LVU115 + 482 000e 0028 cmp r0, #0 + 483 0010 00D0 beq .L33 + 484 .LVL36: + 485 .L32: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 486 .loc 1 345 3 is_stmt 1 view .LVU116 + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 487 .loc 1 346 1 is_stmt 0 view .LVU117 + 488 @ sp needed + 489 .LVL37: + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 490 .loc 1 346 1 view .LVU118 + 491 0012 70BD pop {r4, r5, r6, pc} + 492 .LVL38: + 493 .L33: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 494 .loc 1 325 5 is_stmt 1 view .LVU119 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 495 .loc 1 325 22 is_stmt 0 view .LVU120 + 496 0014 0C4B ldr r3, .L34+4 + 497 0016 0022 movs r2, #0 + 498 0018 DA61 str r2, [r3, #28] + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 499 .loc 1 328 5 is_stmt 1 view .LVU121 + 500 001a 0C4C ldr r4, .L34+8 + 501 001c 2369 ldr r3, [r4, #16] + 502 001e 2026 movs r6, #32 + 503 0020 3343 orrs r3, r6 + 504 0022 2361 str r3, [r4, #16] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 505 .loc 1 329 5 view .LVU122 + 506 0024 2369 ldr r3, [r4, #16] + 507 0026 4032 adds r2, r2, #64 + 508 0028 1343 orrs r3, r2 + 509 002a 2361 str r3, [r4, #16] + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 510 .loc 1 332 5 view .LVU123 + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 511 .loc 1 332 14 is_stmt 0 view .LVU124 + 512 002c 0548 ldr r0, .L34 + 513 .LVL39: + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 514 .loc 1 332 14 view .LVU125 + 515 002e FFF7FEFF bl FLASH_WaitForLastOperation + 516 .LVL40: + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 517 .loc 1 335 5 is_stmt 1 view .LVU126 + 518 0032 2369 ldr r3, [r4, #16] + 519 0034 B343 bics r3, r6 + 520 0036 2361 str r3, [r4, #16] + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + ARM GAS /tmp/cc6zde14.s page 28 + + + 521 .loc 1 337 5 view .LVU127 + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 522 .loc 1 337 7 is_stmt 0 view .LVU128 + 523 0038 0028 cmp r0, #0 + 524 003a EAD1 bne .L32 + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 525 .loc 1 340 7 is_stmt 1 view .LVU129 + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 526 .loc 1 340 16 is_stmt 0 view .LVU130 + 527 003c 2800 movs r0, r5 + 528 .LVL41: + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 529 .loc 1 340 16 view .LVU131 + 530 003e FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 531 .LVL42: + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 532 .loc 1 340 16 view .LVU132 + 533 0042 E6E7 b .L32 + 534 .L35: + 535 .align 2 + 536 .L34: + 537 0044 50C30000 .word 50000 + 538 0048 00000000 .word pFlash + 539 004c 00200240 .word 1073881088 + 540 .cfi_endproc + 541 .LFE42: + 543 .section .text.FLASH_OB_EnableWRP,"ax",%progbits + 544 .align 1 + 545 .syntax unified + 546 .code 16 + 547 .thumb_func + 549 FLASH_OB_EnableWRP: + 550 .LVL43: + 551 .LFB47: + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 552 .loc 1 520 1 is_stmt 1 view -0 + 553 .cfi_startproc + 554 @ args = 0, pretend = 0, frame = 0 + 555 @ frame_needed = 0, uses_anonymous_args = 0 + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 556 .loc 1 520 1 is_stmt 0 view .LVU134 + 557 0000 10B5 push {r4, lr} + 558 .cfi_def_cfa_offset 8 + 559 .cfi_offset 4, -8 + 560 .cfi_offset 14, -4 + 561 0002 0400 movs r4, r0 + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 562 .loc 1 521 3 is_stmt 1 view .LVU135 + 563 .LVL44: + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 564 .loc 1 522 3 view .LVU136 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 565 .loc 1 534 3 view .LVU137 + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 566 .loc 1 537 3 view .LVU138 + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 567 .loc 1 537 37 is_stmt 0 view .LVU139 + ARM GAS /tmp/cc6zde14.s page 29 + + + 568 0004 FFF7FEFF bl FLASH_OB_GetWRP + 569 .LVL45: + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 570 .loc 1 537 20 discriminator 1 view .LVU140 + 571 0008 A043 bics r0, r4 + 572 .LVL46: + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 573 .loc 1 542 3 is_stmt 1 view .LVU141 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 574 .loc 1 542 13 is_stmt 0 view .LVU142 + 575 000a FF24 movs r4, #255 + 576 000c 0440 ands r4, r0 + 577 .LVL47: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 578 .loc 1 562 3 is_stmt 1 view .LVU143 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 579 .loc 1 562 12 is_stmt 0 view .LVU144 + 580 000e 1148 ldr r0, .L41 + 581 .LVL48: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 582 .loc 1 562 12 view .LVU145 + 583 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 584 .LVL49: + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 585 .loc 1 564 3 is_stmt 1 view .LVU146 + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 586 .loc 1 564 5 is_stmt 0 view .LVU147 + 587 0014 0028 cmp r0, #0 + 588 0016 00D0 beq .L39 + 589 .LVL50: + 590 .L37: + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 591 .loc 1 621 3 is_stmt 1 view .LVU148 + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 592 .loc 1 622 1 is_stmt 0 view .LVU149 + 593 @ sp needed + 594 .LVL51: + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 595 .loc 1 622 1 view .LVU150 + 596 0018 10BD pop {r4, pc} + 597 .LVL52: + 598 .L39: + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 599 .loc 1 567 5 is_stmt 1 view .LVU151 + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 600 .loc 1 567 22 is_stmt 0 view .LVU152 + 601 001a 0F4B ldr r3, .L41+4 + 602 001c 0022 movs r2, #0 + 603 001e DA61 str r2, [r3, #28] + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 604 .loc 1 570 5 is_stmt 1 view .LVU153 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 605 .loc 1 570 14 is_stmt 0 view .LVU154 + 606 0020 FFF7FEFF bl HAL_FLASHEx_OBErase + 607 .LVL53: + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 608 .loc 1 571 5 is_stmt 1 view .LVU155 + ARM GAS /tmp/cc6zde14.s page 30 + + + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 609 .loc 1 571 8 is_stmt 0 view .LVU156 + 610 0024 0028 cmp r0, #0 + 611 0026 F7D1 bne .L37 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 612 .loc 1 574 7 is_stmt 1 view .LVU157 + 613 0028 0C4A ldr r2, .L41+8 + 614 002a 1369 ldr r3, [r2, #16] + 615 002c 1021 movs r1, #16 + 616 002e 0B43 orrs r3, r1 + 617 0030 1361 str r3, [r2, #16] + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 618 .loc 1 577 7 view .LVU158 + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 619 .loc 1 577 9 is_stmt 0 view .LVU159 + 620 0032 FF2C cmp r4, #255 + 621 0034 05D1 bne .L40 + 622 .LVL54: + 623 .L38: + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 624 .loc 1 617 7 is_stmt 1 view .LVU160 + 625 0036 094A ldr r2, .L41+8 + 626 0038 1369 ldr r3, [r2, #16] + 627 003a 1021 movs r1, #16 + 628 003c 8B43 bics r3, r1 + 629 003e 1361 str r3, [r2, #16] + 630 0040 EAE7 b .L37 + 631 .L40: + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 632 .loc 1 579 9 view .LVU161 + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 633 .loc 1 579 11 is_stmt 0 view .LVU162 + 634 0042 074A ldr r2, .L41+12 + 635 0044 1389 ldrh r3, [r2, #8] + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 636 .loc 1 579 18 view .LVU163 + 637 0046 2340 ands r3, r4 + 638 0048 1381 strh r3, [r2, #8] + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 639 .loc 1 582 9 is_stmt 1 view .LVU164 + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 640 .loc 1 582 18 is_stmt 0 view .LVU165 + 641 004a 0248 ldr r0, .L41 + 642 .LVL55: + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 643 .loc 1 582 18 view .LVU166 + 644 004c FFF7FEFF bl FLASH_WaitForLastOperation + 645 .LVL56: + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 646 .loc 1 582 18 view .LVU167 + 647 0050 F1E7 b .L38 + 648 .L42: + 649 0052 C046 .align 2 + 650 .L41: + 651 0054 50C30000 .word 50000 + 652 0058 00000000 .word pFlash + 653 005c 00200240 .word 1073881088 + ARM GAS /tmp/cc6zde14.s page 31 + + + 654 0060 00F8FF1F .word 536868864 + 655 .cfi_endproc + 656 .LFE47: + 658 .section .text.FLASH_OB_DisableWRP,"ax",%progbits + 659 .align 1 + 660 .syntax unified + 661 .code 16 + 662 .thumb_func + 664 FLASH_OB_DisableWRP: + 665 .LVL57: + 666 .LFB48: + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 667 .loc 1 636 1 is_stmt 1 view -0 + 668 .cfi_startproc + 669 @ args = 0, pretend = 0, frame = 0 + 670 @ frame_needed = 0, uses_anonymous_args = 0 + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 671 .loc 1 636 1 is_stmt 0 view .LVU169 + 672 0000 10B5 push {r4, lr} + 673 .cfi_def_cfa_offset 8 + 674 .cfi_offset 4, -8 + 675 .cfi_offset 14, -4 + 676 0002 0400 movs r4, r0 + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 677 .loc 1 637 3 is_stmt 1 view .LVU170 + 678 .LVL58: + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 679 .loc 1 638 3 view .LVU171 + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 680 .loc 1 650 3 view .LVU172 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 681 .loc 1 653 3 view .LVU173 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 682 .loc 1 653 23 is_stmt 0 view .LVU174 + 683 0004 FFF7FEFF bl FLASH_OB_GetWRP + 684 .LVL59: + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 685 .loc 1 653 20 discriminator 1 view .LVU175 + 686 0008 2043 orrs r0, r4 + 687 .LVL60: + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 688 .loc 1 658 3 is_stmt 1 view .LVU176 + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 689 .loc 1 658 13 is_stmt 0 view .LVU177 + 690 000a FF24 movs r4, #255 + 691 000c 0440 ands r4, r0 + 692 .LVL61: + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 693 .loc 1 679 3 is_stmt 1 view .LVU178 + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 694 .loc 1 679 12 is_stmt 0 view .LVU179 + 695 000e 1148 ldr r0, .L48 + 696 .LVL62: + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 697 .loc 1 679 12 view .LVU180 + 698 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 699 .LVL63: + ARM GAS /tmp/cc6zde14.s page 32 + + + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 700 .loc 1 681 3 is_stmt 1 view .LVU181 + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 701 .loc 1 681 5 is_stmt 0 view .LVU182 + 702 0014 0028 cmp r0, #0 + 703 0016 00D0 beq .L46 + 704 .LVL64: + 705 .L44: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 706 .loc 1 736 3 is_stmt 1 view .LVU183 + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 707 .loc 1 737 1 is_stmt 0 view .LVU184 + 708 @ sp needed + 709 .LVL65: + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 710 .loc 1 737 1 view .LVU185 + 711 0018 10BD pop {r4, pc} + 712 .LVL66: + 713 .L46: + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 714 .loc 1 684 5 is_stmt 1 view .LVU186 + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 715 .loc 1 684 22 is_stmt 0 view .LVU187 + 716 001a 0F4B ldr r3, .L48+4 + 717 001c 0022 movs r2, #0 + 718 001e DA61 str r2, [r3, #28] + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 719 .loc 1 687 5 is_stmt 1 view .LVU188 + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 720 .loc 1 687 14 is_stmt 0 view .LVU189 + 721 0020 FFF7FEFF bl HAL_FLASHEx_OBErase + 722 .LVL67: + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 723 .loc 1 688 5 is_stmt 1 view .LVU190 + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 724 .loc 1 688 8 is_stmt 0 view .LVU191 + 725 0024 0028 cmp r0, #0 + 726 0026 F7D1 bne .L44 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 727 .loc 1 690 7 is_stmt 1 view .LVU192 + 728 0028 0C4A ldr r2, .L48+8 + 729 002a 1369 ldr r3, [r2, #16] + 730 002c 1021 movs r1, #16 + 731 002e 0B43 orrs r3, r1 + 732 0030 1361 str r3, [r2, #16] + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 733 .loc 1 693 7 view .LVU193 + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 734 .loc 1 693 9 is_stmt 0 view .LVU194 + 735 0032 FF2C cmp r4, #255 + 736 0034 05D1 bne .L47 + 737 .LVL68: + 738 .L45: + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 739 .loc 1 733 7 is_stmt 1 view .LVU195 + 740 0036 094A ldr r2, .L48+8 + 741 0038 1369 ldr r3, [r2, #16] + ARM GAS /tmp/cc6zde14.s page 33 + + + 742 003a 1021 movs r1, #16 + 743 003c 8B43 bics r3, r1 + 744 003e 1361 str r3, [r2, #16] + 745 0040 EAE7 b .L44 + 746 .L47: + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 747 .loc 1 695 9 view .LVU196 + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 748 .loc 1 695 11 is_stmt 0 view .LVU197 + 749 0042 074A ldr r2, .L48+12 + 750 0044 1389 ldrh r3, [r2, #8] + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 751 .loc 1 695 18 view .LVU198 + 752 0046 2340 ands r3, r4 + 753 0048 1381 strh r3, [r2, #8] + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 754 .loc 1 698 9 is_stmt 1 view .LVU199 + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 755 .loc 1 698 18 is_stmt 0 view .LVU200 + 756 004a 0248 ldr r0, .L48 + 757 .LVL69: + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 758 .loc 1 698 18 view .LVU201 + 759 004c FFF7FEFF bl FLASH_WaitForLastOperation + 760 .LVL70: + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 761 .loc 1 698 18 view .LVU202 + 762 0050 F1E7 b .L45 + 763 .L49: + 764 0052 C046 .align 2 + 765 .L48: + 766 0054 50C30000 .word 50000 + 767 0058 00000000 .word pFlash + 768 005c 00200240 .word 1073881088 + 769 0060 00F8FF1F .word 536868864 + 770 .cfi_endproc + 771 .LFE48: + 773 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits + 774 .align 1 + 775 .global HAL_FLASHEx_OBProgram + 776 .syntax unified + 777 .code 16 + 778 .thumb_func + 780 HAL_FLASHEx_OBProgram: + 781 .LVL71: + 782 .LFB43: + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 783 .loc 1 361 1 is_stmt 1 view -0 + 784 .cfi_startproc + 785 @ args = 0, pretend = 0, frame = 0 + 786 @ frame_needed = 0, uses_anonymous_args = 0 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 787 .loc 1 361 1 is_stmt 0 view .LVU204 + 788 0000 10B5 push {r4, lr} + 789 .cfi_def_cfa_offset 8 + 790 .cfi_offset 4, -8 + 791 .cfi_offset 14, -4 + ARM GAS /tmp/cc6zde14.s page 34 + + + 792 0002 0400 movs r4, r0 + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 793 .loc 1 362 3 is_stmt 1 view .LVU205 + 794 .LVL72: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 795 .loc 1 365 3 view .LVU206 + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 796 .loc 1 365 3 view .LVU207 + 797 0004 224B ldr r3, .L67 + 798 0006 1B7E ldrb r3, [r3, #24] + 799 0008 012B cmp r3, #1 + 800 000a 3FD0 beq .L58 + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 801 .loc 1 365 3 discriminator 2 view .LVU208 + 802 000c 204B ldr r3, .L67 + 803 000e 0122 movs r2, #1 + 804 0010 1A76 strb r2, [r3, #24] + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 805 .loc 1 365 3 discriminator 2 view .LVU209 + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 806 .loc 1 368 3 view .LVU210 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 807 .loc 1 371 3 view .LVU211 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 808 .loc 1 371 14 is_stmt 0 view .LVU212 + 809 0012 0368 ldr r3, [r0] + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 810 .loc 1 371 5 view .LVU213 + 811 0014 1A42 tst r2, r3 + 812 0016 0FD0 beq .L59 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + 813 .loc 1 373 5 is_stmt 1 view .LVU214 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 814 .loc 1 374 5 view .LVU215 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 815 .loc 1 374 16 is_stmt 0 view .LVU216 + 816 0018 4368 ldr r3, [r0, #4] + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 817 .loc 1 374 8 view .LVU217 + 818 001a 012B cmp r3, #1 + 819 001c 08D0 beq .L63 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 820 .loc 1 382 7 is_stmt 1 view .LVU218 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 821 .loc 1 382 16 is_stmt 0 view .LVU219 + 822 001e 8068 ldr r0, [r0, #8] + 823 .LVL73: + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 824 .loc 1 382 16 view .LVU220 + 825 0020 FFF7FEFF bl FLASH_OB_DisableWRP + 826 .LVL74: + 827 .L54: + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 828 .loc 1 384 5 is_stmt 1 view .LVU221 + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 829 .loc 1 384 8 is_stmt 0 view .LVU222 + 830 0024 0028 cmp r0, #0 + ARM GAS /tmp/cc6zde14.s page 35 + + + 831 0026 08D0 beq .L52 + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 832 .loc 1 387 7 is_stmt 1 view .LVU223 + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 833 .loc 1 387 7 view .LVU224 + 834 0028 194B ldr r3, .L67 + 835 002a 0022 movs r2, #0 + 836 002c 1A76 strb r2, [r3, #24] + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 837 .loc 1 387 7 view .LVU225 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 838 .loc 1 388 7 view .LVU226 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 839 .loc 1 388 14 is_stmt 0 view .LVU227 + 840 002e 10E0 b .L51 + 841 .LVL75: + 842 .L63: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 843 .loc 1 377 7 is_stmt 1 view .LVU228 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 844 .loc 1 377 16 is_stmt 0 view .LVU229 + 845 0030 8068 ldr r0, [r0, #8] + 846 .LVL76: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 847 .loc 1 377 16 view .LVU230 + 848 0032 FFF7FEFF bl FLASH_OB_EnableWRP + 849 .LVL77: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 850 .loc 1 377 16 view .LVU231 + 851 0036 F5E7 b .L54 + 852 .LVL78: + 853 .L59: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 854 .loc 1 362 21 view .LVU232 + 855 0038 0120 movs r0, #1 + 856 .LVL79: + 857 .L52: + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 858 .loc 1 393 3 is_stmt 1 view .LVU233 + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 859 .loc 1 393 14 is_stmt 0 view .LVU234 + 860 003a 2368 ldr r3, [r4] + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 861 .loc 1 393 5 view .LVU235 + 862 003c 9B07 lsls r3, r3, #30 + 863 003e 09D4 bmi .L64 + 864 .LVL80: + 865 .L55: + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 866 .loc 1 405 3 is_stmt 1 view .LVU236 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 867 .loc 1 405 14 is_stmt 0 view .LVU237 + 868 0040 2368 ldr r3, [r4] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 869 .loc 1 405 5 view .LVU238 + 870 0042 5B07 lsls r3, r3, #29 + 871 0044 0FD4 bmi .L65 + ARM GAS /tmp/cc6zde14.s page 36 + + + 872 .LVL81: + 873 .L56: + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 874 .loc 1 417 3 is_stmt 1 view .LVU239 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 875 .loc 1 417 14 is_stmt 0 view .LVU240 + 876 0046 2368 ldr r3, [r4] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 877 .loc 1 417 5 view .LVU241 + 878 0048 1B07 lsls r3, r3, #28 + 879 004a 15D4 bmi .L66 + 880 .LVL82: + 881 .L57: + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 882 .loc 1 429 3 is_stmt 1 view .LVU242 + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 883 .loc 1 429 3 view .LVU243 + 884 004c 104B ldr r3, .L67 + 885 004e 0022 movs r2, #0 + 886 0050 1A76 strb r2, [r3, #24] + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 887 .loc 1 429 3 view .LVU244 + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 888 .loc 1 431 3 view .LVU245 + 889 .LVL83: + 890 .L51: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 891 .loc 1 432 1 is_stmt 0 view .LVU246 + 892 @ sp needed + 893 .LVL84: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 894 .loc 1 432 1 view .LVU247 + 895 0052 10BD pop {r4, pc} + 896 .LVL85: + 897 .L64: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 898 .loc 1 395 5 is_stmt 1 view .LVU248 + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 899 .loc 1 395 14 is_stmt 0 view .LVU249 + 900 0054 207B ldrb r0, [r4, #12] + 901 .LVL86: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 902 .loc 1 395 14 view .LVU250 + 903 0056 FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 904 .LVL87: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 905 .loc 1 396 5 is_stmt 1 view .LVU251 + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 906 .loc 1 396 8 is_stmt 0 view .LVU252 + 907 005a 0028 cmp r0, #0 + 908 005c F0D0 beq .L55 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 909 .loc 1 399 7 is_stmt 1 view .LVU253 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 910 .loc 1 399 7 view .LVU254 + 911 005e 0C4B ldr r3, .L67 + 912 0060 0022 movs r2, #0 + ARM GAS /tmp/cc6zde14.s page 37 + + + 913 0062 1A76 strb r2, [r3, #24] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 914 .loc 1 399 7 view .LVU255 + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 915 .loc 1 400 7 view .LVU256 + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 916 .loc 1 400 14 is_stmt 0 view .LVU257 + 917 0064 F5E7 b .L51 + 918 .L65: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 919 .loc 1 407 5 is_stmt 1 view .LVU258 + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 920 .loc 1 407 14 is_stmt 0 view .LVU259 + 921 0066 607B ldrb r0, [r4, #13] + 922 .LVL88: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 923 .loc 1 407 14 view .LVU260 + 924 0068 FFF7FEFF bl FLASH_OB_UserConfig + 925 .LVL89: + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 926 .loc 1 408 5 is_stmt 1 view .LVU261 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 927 .loc 1 408 8 is_stmt 0 view .LVU262 + 928 006c 0028 cmp r0, #0 + 929 006e EAD0 beq .L56 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 930 .loc 1 411 7 is_stmt 1 view .LVU263 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 931 .loc 1 411 7 view .LVU264 + 932 0070 074B ldr r3, .L67 + 933 0072 0022 movs r2, #0 + 934 0074 1A76 strb r2, [r3, #24] + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 935 .loc 1 411 7 view .LVU265 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 936 .loc 1 412 7 view .LVU266 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 937 .loc 1 412 14 is_stmt 0 view .LVU267 + 938 0076 ECE7 b .L51 + 939 .L66: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 940 .loc 1 419 5 is_stmt 1 view .LVU268 + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 941 .loc 1 419 14 is_stmt 0 view .LVU269 + 942 0078 217D ldrb r1, [r4, #20] + 943 007a 2069 ldr r0, [r4, #16] + 944 .LVL90: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 945 .loc 1 419 14 view .LVU270 + 946 007c FFF7FEFF bl FLASH_OB_ProgramData + 947 .LVL91: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 948 .loc 1 420 5 is_stmt 1 view .LVU271 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 949 .loc 1 420 8 is_stmt 0 view .LVU272 + 950 0080 0028 cmp r0, #0 + 951 0082 E3D0 beq .L57 + ARM GAS /tmp/cc6zde14.s page 38 + + + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 952 .loc 1 423 7 is_stmt 1 view .LVU273 + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 953 .loc 1 423 7 view .LVU274 + 954 0084 024B ldr r3, .L67 + 955 0086 0022 movs r2, #0 + 956 0088 1A76 strb r2, [r3, #24] + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 957 .loc 1 423 7 view .LVU275 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 958 .loc 1 424 7 view .LVU276 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 959 .loc 1 424 14 is_stmt 0 view .LVU277 + 960 008a E2E7 b .L51 + 961 .LVL92: + 962 .L58: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 963 .loc 1 365 3 discriminator 1 view .LVU278 + 964 008c 0220 movs r0, #2 + 965 .LVL93: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 966 .loc 1 365 3 discriminator 1 view .LVU279 + 967 008e E0E7 b .L51 + 968 .L68: + 969 .align 2 + 970 .L67: + 971 0090 00000000 .word pFlash + 972 .cfi_endproc + 973 .LFE43: + 975 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits + 976 .align 1 + 977 .global HAL_FLASHEx_OBGetConfig + 978 .syntax unified + 979 .code 16 + 980 .thumb_func + 982 HAL_FLASHEx_OBGetConfig: + 983 .LVL94: + 984 .LFB44: + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 985 .loc 1 442 1 is_stmt 1 view -0 + 986 .cfi_startproc + 987 @ args = 0, pretend = 0, frame = 0 + 988 @ frame_needed = 0, uses_anonymous_args = 0 + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 989 .loc 1 442 1 is_stmt 0 view .LVU281 + 990 0000 10B5 push {r4, lr} + 991 .cfi_def_cfa_offset 8 + 992 .cfi_offset 4, -8 + 993 .cfi_offset 14, -4 + 994 0002 0400 movs r4, r0 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 995 .loc 1 443 3 is_stmt 1 view .LVU282 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 996 .loc 1 443 23 is_stmt 0 view .LVU283 + 997 0004 0723 movs r3, #7 + 998 0006 0360 str r3, [r0] + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc6zde14.s page 39 + + + 999 .loc 1 446 3 is_stmt 1 view .LVU284 + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1000 .loc 1 446 22 is_stmt 0 view .LVU285 + 1001 0008 FFF7FEFF bl FLASH_OB_GetWRP + 1002 .LVL95: + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1003 .loc 1 446 20 discriminator 1 view .LVU286 + 1004 000c A060 str r0, [r4, #8] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1005 .loc 1 449 3 is_stmt 1 view .LVU287 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1006 .loc 1 449 23 is_stmt 0 view .LVU288 + 1007 000e FFF7FEFF bl FLASH_OB_GetRDP + 1008 .LVL96: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1009 .loc 1 449 21 discriminator 1 view .LVU289 + 1010 0012 2073 strb r0, [r4, #12] + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1011 .loc 1 452 3 is_stmt 1 view .LVU290 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1012 .loc 1 452 25 is_stmt 0 view .LVU291 + 1013 0014 FFF7FEFF bl FLASH_OB_GetUser + 1014 .LVL97: + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1015 .loc 1 452 23 discriminator 1 view .LVU292 + 1016 0018 6073 strb r0, [r4, #13] + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1017 .loc 1 453 1 view .LVU293 + 1018 @ sp needed + 1019 .LVL98: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1020 .loc 1 453 1 view .LVU294 + 1021 001a 10BD pop {r4, pc} + 1022 .cfi_endproc + 1023 .LFE44: + 1025 .section .text.HAL_FLASHEx_OBGetUserData,"ax",%progbits + 1026 .align 1 + 1027 .global HAL_FLASHEx_OBGetUserData + 1028 .syntax unified + 1029 .code 16 + 1030 .thumb_func + 1032 HAL_FLASHEx_OBGetUserData: + 1033 .LVL99: + 1034 .LFB45: + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t value = 0U; + 1035 .loc 1 464 1 is_stmt 1 view -0 + 1036 .cfi_startproc + 1037 @ args = 0, pretend = 0, frame = 0 + 1038 @ frame_needed = 0, uses_anonymous_args = 0 + 1039 @ link register save eliminated. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1040 .loc 1 465 3 view .LVU296 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1041 .loc 1 467 3 view .LVU297 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1042 .loc 1 467 6 is_stmt 0 view .LVU298 + 1043 0000 064B ldr r3, .L74 + ARM GAS /tmp/cc6zde14.s page 40 + + + 1044 0002 9842 cmp r0, r3 + 1045 0004 03D0 beq .L73 + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1046 .loc 1 475 5 is_stmt 1 view .LVU299 + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1047 .loc 1 475 13 is_stmt 0 view .LVU300 + 1048 0006 064B ldr r3, .L74+4 + 1049 0008 D869 ldr r0, [r3, #28] + 1050 .LVL100: + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1051 .loc 1 475 51 view .LVU301 + 1052 000a 000E lsrs r0, r0, #24 + 1053 .LVL101: + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1054 .loc 1 478 3 is_stmt 1 view .LVU302 + 1055 .L70: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1056 .loc 1 479 1 is_stmt 0 view .LVU303 + 1057 @ sp needed + 1058 000c 7047 bx lr + 1059 .LVL102: + 1060 .L73: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1061 .loc 1 470 5 is_stmt 1 view .LVU304 + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1062 .loc 1 470 13 is_stmt 0 view .LVU305 + 1063 000e 044B ldr r3, .L74+4 + 1064 0010 DB69 ldr r3, [r3, #28] + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1065 .loc 1 470 51 view .LVU306 + 1066 0012 1B0C lsrs r3, r3, #16 + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1067 .loc 1 470 11 view .LVU307 + 1068 0014 FF20 movs r0, #255 + 1069 .LVL103: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1070 .loc 1 470 11 view .LVU308 + 1071 0016 1840 ands r0, r3 + 1072 .LVL104: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1073 .loc 1 470 11 view .LVU309 + 1074 0018 F8E7 b .L70 + 1075 .L75: + 1076 001a C046 .align 2 + 1077 .L74: + 1078 001c 04F8FF1F .word 536868868 + 1079 0020 00200240 .word 1073881088 + 1080 .cfi_endproc + 1081 .LFE45: + 1083 .section .text.FLASH_PageErase,"ax",%progbits + 1084 .align 1 + 1085 .global FLASH_PageErase + 1086 .syntax unified + 1087 .code 16 + 1088 .thumb_func + 1090 FLASH_PageErase: + 1091 .LVL105: + ARM GAS /tmp/cc6zde14.s page 41 + + + 1092 .LFB55: + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Functions + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory page + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param PageAddress FLASH page to erase + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress) + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1093 .loc 1 959 1 is_stmt 1 view -0 + 1094 .cfi_startproc + 1095 @ args = 0, pretend = 0, frame = 0 + 1096 @ frame_needed = 0, uses_anonymous_args = 0 + 1097 @ link register save eliminated. + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 1098 .loc 1 961 3 view .LVU311 + 1099 .loc 1 961 20 is_stmt 0 view .LVU312 + 1100 0000 064B ldr r3, .L77 + 1101 0002 0022 movs r2, #0 + 1102 0004 DA61 str r2, [r3, #28] + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Proceed to erase the page */ + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_PER); + 1103 .loc 1 964 5 is_stmt 1 view .LVU313 + 1104 0006 064B ldr r3, .L77+4 + 1105 0008 1A69 ldr r2, [r3, #16] + 1106 000a 0221 movs r1, #2 + 1107 000c 0A43 orrs r2, r1 + 1108 000e 1A61 str r2, [r3, #16] + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRITE_REG(FLASH->AR, PageAddress); + 1109 .loc 1 965 5 view .LVU314 + 1110 0010 5861 str r0, [r3, #20] + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 1111 .loc 1 966 5 view .LVU315 + 1112 0012 1A69 ldr r2, [r3, #16] + 1113 0014 3E31 adds r1, r1, #62 + 1114 0016 0A43 orrs r2, r1 + 1115 0018 1A61 str r2, [r3, #16] + ARM GAS /tmp/cc6zde14.s page 42 + + + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1116 .loc 1 967 1 is_stmt 0 view .LVU316 + 1117 @ sp needed + 1118 001a 7047 bx lr + 1119 .L78: + 1120 .align 2 + 1121 .L77: + 1122 001c 00000000 .word pFlash + 1123 0020 00200240 .word 1073881088 + 1124 .cfi_endproc + 1125 .LFE55: + 1127 .section .text.HAL_FLASHEx_Erase,"ax",%progbits + 1128 .align 1 + 1129 .global HAL_FLASHEx_Erase + 1130 .syntax unified + 1131 .code 16 + 1132 .thumb_func + 1134 HAL_FLASHEx_Erase: + 1135 .LVL106: + 1136 .LFB40: + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1137 .loc 1 158 1 is_stmt 1 view -0 + 1138 .cfi_startproc + 1139 @ args = 0, pretend = 0, frame = 0 + 1140 @ frame_needed = 0, uses_anonymous_args = 0 + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1141 .loc 1 158 1 is_stmt 0 view .LVU318 + 1142 0000 70B5 push {r4, r5, r6, lr} + 1143 .cfi_def_cfa_offset 16 + 1144 .cfi_offset 4, -16 + 1145 .cfi_offset 5, -12 + 1146 .cfi_offset 6, -8 + 1147 .cfi_offset 14, -4 + 1148 0002 0500 movs r5, r0 + 1149 0004 0E00 movs r6, r1 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1150 .loc 1 159 3 is_stmt 1 view .LVU319 + 1151 .LVL107: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1152 .loc 1 160 3 view .LVU320 + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1153 .loc 1 163 3 view .LVU321 + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1154 .loc 1 163 3 view .LVU322 + 1155 0006 234B ldr r3, .L92 + 1156 0008 1B7E ldrb r3, [r3, #24] + 1157 000a 012B cmp r3, #1 + 1158 000c 40D0 beq .L86 + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1159 .loc 1 163 3 discriminator 2 view .LVU323 + 1160 000e 214B ldr r3, .L92 + 1161 0010 0122 movs r2, #1 + 1162 0012 1A76 strb r2, [r3, #24] + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1163 .loc 1 163 3 discriminator 2 view .LVU324 + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1164 .loc 1 166 3 view .LVU325 + ARM GAS /tmp/cc6zde14.s page 43 + + + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1165 .loc 1 168 3 view .LVU326 + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1166 .loc 1 168 17 is_stmt 0 view .LVU327 + 1167 0014 0368 ldr r3, [r0] + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1168 .loc 1 168 6 view .LVU328 + 1169 0016 012B cmp r3, #1 + 1170 0018 21D0 beq .L89 + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 1171 .loc 1 188 5 is_stmt 1 view .LVU329 + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1172 .loc 1 189 5 view .LVU330 + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1173 .loc 1 193 7 view .LVU331 + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1174 .loc 1 193 11 is_stmt 0 view .LVU332 + 1175 001a 1F48 ldr r0, .L92+4 + 1176 .LVL108: + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1177 .loc 1 193 11 view .LVU333 + 1178 001c FFF7FEFF bl FLASH_WaitForLastOperation + 1179 .LVL109: + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1180 .loc 1 193 10 discriminator 1 view .LVU334 + 1181 0020 0028 cmp r0, #0 + 1182 0022 30D1 bne .L88 + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1183 .loc 1 196 9 is_stmt 1 view .LVU335 + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1184 .loc 1 196 20 is_stmt 0 view .LVU336 + 1185 0024 0123 movs r3, #1 + 1186 0026 5B42 rsbs r3, r3, #0 + 1187 0028 3360 str r3, [r6] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1188 .loc 1 199 9 is_stmt 1 view .LVU337 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1189 .loc 1 199 21 is_stmt 0 view .LVU338 + 1190 002a 6C68 ldr r4, [r5, #4] + 1191 .LVL110: + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1192 .loc 1 159 21 view .LVU339 + 1193 002c 0130 adds r0, r0, #1 + 1194 .LVL111: + 1195 .L83: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1196 .loc 1 200 21 is_stmt 1 view .LVU340 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1197 .loc 1 200 35 is_stmt 0 view .LVU341 + 1198 002e AB68 ldr r3, [r5, #8] + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1199 .loc 1 200 45 view .LVU342 + 1200 0030 9B02 lsls r3, r3, #10 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1201 .loc 1 200 76 view .LVU343 + 1202 0032 6A68 ldr r2, [r5, #4] + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + ARM GAS /tmp/cc6zde14.s page 44 + + + 1203 .loc 1 200 64 view .LVU344 + 1204 0034 9B18 adds r3, r3, r2 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1205 .loc 1 200 21 view .LVU345 + 1206 0036 A342 cmp r3, r4 + 1207 0038 26D9 bls .L82 + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1208 .loc 1 203 11 is_stmt 1 view .LVU346 + 1209 003a 2000 movs r0, r4 + 1210 .LVL112: + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1211 .loc 1 203 11 is_stmt 0 view .LVU347 + 1212 003c FFF7FEFF bl FLASH_PageErase + 1213 .LVL113: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1214 .loc 1 206 11 is_stmt 1 view .LVU348 + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1215 .loc 1 206 20 is_stmt 0 view .LVU349 + 1216 0040 1548 ldr r0, .L92+4 + 1217 0042 FFF7FEFF bl FLASH_WaitForLastOperation + 1218 .LVL114: + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1219 .loc 1 209 11 is_stmt 1 view .LVU350 + 1220 0046 154A ldr r2, .L92+8 + 1221 0048 1369 ldr r3, [r2, #16] + 1222 004a 0221 movs r1, #2 + 1223 004c 8B43 bics r3, r1 + 1224 004e 1361 str r3, [r2, #16] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1225 .loc 1 211 11 view .LVU351 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1226 .loc 1 211 14 is_stmt 0 view .LVU352 + 1227 0050 0028 cmp r0, #0 + 1228 0052 16D1 bne .L90 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1229 .loc 1 201 21 is_stmt 1 view .LVU353 + 1230 0054 8023 movs r3, #128 + 1231 0056 DB00 lsls r3, r3, #3 + 1232 0058 9C46 mov ip, r3 + 1233 005a 6444 add r4, r4, ip + 1234 .LVL115: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1235 .loc 1 201 21 is_stmt 0 view .LVU354 + 1236 005c E7E7 b .L83 + 1237 .LVL116: + 1238 .L89: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1239 .loc 1 172 7 is_stmt 1 view .LVU355 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1240 .loc 1 172 11 is_stmt 0 view .LVU356 + 1241 005e 0E48 ldr r0, .L92+4 + 1242 .LVL117: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1243 .loc 1 172 11 view .LVU357 + 1244 0060 FFF7FEFF bl FLASH_WaitForLastOperation + 1245 .LVL118: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + ARM GAS /tmp/cc6zde14.s page 45 + + + 1246 .loc 1 172 10 discriminator 1 view .LVU358 + 1247 0064 0028 cmp r0, #0 + 1248 0066 01D0 beq .L91 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1249 .loc 1 159 21 view .LVU359 + 1250 0068 0120 movs r0, #1 + 1251 006a 0DE0 b .L82 + 1252 .L91: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1253 .loc 1 175 9 is_stmt 1 view .LVU360 + 1254 006c FFF7FEFF bl FLASH_MassErase + 1255 .LVL119: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1256 .loc 1 178 9 view .LVU361 + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1257 .loc 1 178 18 is_stmt 0 view .LVU362 + 1258 0070 0948 ldr r0, .L92+4 + 1259 0072 FFF7FEFF bl FLASH_WaitForLastOperation + 1260 .LVL120: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1261 .loc 1 181 9 is_stmt 1 view .LVU363 + 1262 0076 094A ldr r2, .L92+8 + 1263 0078 1369 ldr r3, [r2, #16] + 1264 007a 0421 movs r1, #4 + 1265 007c 8B43 bics r3, r1 + 1266 007e 1361 str r3, [r2, #16] + 1267 0080 02E0 b .L82 + 1268 .LVL121: + 1269 .L90: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** break; + 1270 .loc 1 214 13 view .LVU364 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** break; + 1271 .loc 1 214 24 is_stmt 0 view .LVU365 + 1272 0082 3460 str r4, [r6] + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1273 .loc 1 215 13 is_stmt 1 view .LVU366 + 1274 0084 00E0 b .L82 + 1275 .LVL122: + 1276 .L88: + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1277 .loc 1 159 21 is_stmt 0 view .LVU367 + 1278 0086 0120 movs r0, #1 + 1279 .LVL123: + 1280 .L82: + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1281 .loc 1 222 3 is_stmt 1 view .LVU368 + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1282 .loc 1 222 3 view .LVU369 + 1283 0088 024B ldr r3, .L92 + 1284 008a 0022 movs r2, #0 + 1285 008c 1A76 strb r2, [r3, #24] + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1286 .loc 1 222 3 view .LVU370 + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1287 .loc 1 224 3 view .LVU371 + 1288 .LVL124: + 1289 .L80: + ARM GAS /tmp/cc6zde14.s page 46 + + + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1290 .loc 1 225 1 is_stmt 0 view .LVU372 + 1291 @ sp needed + 1292 .LVL125: + 1293 .LVL126: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1294 .loc 1 225 1 view .LVU373 + 1295 008e 70BD pop {r4, r5, r6, pc} + 1296 .LVL127: + 1297 .L86: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1298 .loc 1 163 3 discriminator 1 view .LVU374 + 1299 0090 0220 movs r0, #2 + 1300 .LVL128: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1301 .loc 1 163 3 discriminator 1 view .LVU375 + 1302 0092 FCE7 b .L80 + 1303 .L93: + 1304 .align 2 + 1305 .L92: + 1306 0094 00000000 .word pFlash + 1307 0098 50C30000 .word 50000 + 1308 009c 00200240 .word 1073881088 + 1309 .cfi_endproc + 1310 .LFE40: + 1312 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits + 1313 .align 1 + 1314 .global HAL_FLASHEx_Erase_IT + 1315 .syntax unified + 1316 .code 16 + 1317 .thumb_func + 1319 HAL_FLASHEx_Erase_IT: + 1320 .LVL129: + 1321 .LFB41: + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1322 .loc 1 239 1 is_stmt 1 view -0 + 1323 .cfi_startproc + 1324 @ args = 0, pretend = 0, frame = 0 + 1325 @ frame_needed = 0, uses_anonymous_args = 0 + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1326 .loc 1 239 1 is_stmt 0 view .LVU377 + 1327 0000 10B5 push {r4, lr} + 1328 .cfi_def_cfa_offset 8 + 1329 .cfi_offset 4, -8 + 1330 .cfi_offset 14, -4 + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1331 .loc 1 240 3 is_stmt 1 view .LVU378 + 1332 .LVL130: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1333 .loc 1 243 3 view .LVU379 + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1334 .loc 1 243 3 view .LVU380 + 1335 0002 144B ldr r3, .L100 + 1336 0004 1B7E ldrb r3, [r3, #24] + 1337 0006 012B cmp r3, #1 + 1338 0008 20D0 beq .L97 + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc6zde14.s page 47 + + + 1339 .loc 1 243 3 discriminator 2 view .LVU381 + 1340 000a 124B ldr r3, .L100 + 1341 000c 0122 movs r2, #1 + 1342 000e 1A76 strb r2, [r3, #24] + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1343 .loc 1 243 3 discriminator 2 view .LVU382 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1344 .loc 1 246 3 view .LVU383 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1345 .loc 1 246 13 is_stmt 0 view .LVU384 + 1346 0010 1B78 ldrb r3, [r3] + 1347 0012 DCB2 uxtb r4, r3 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1348 .loc 1 246 6 view .LVU385 + 1349 0014 002B cmp r3, #0 + 1350 0016 1BD1 bne .L98 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1351 .loc 1 252 3 is_stmt 1 view .LVU386 + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1352 .loc 1 255 3 view .LVU387 + 1353 0018 0F4A ldr r2, .L100+4 + 1354 001a 1169 ldr r1, [r2, #16] + 1355 001c A023 movs r3, #160 + 1356 001e 5B01 lsls r3, r3, #5 + 1357 0020 0B43 orrs r3, r1 + 1358 0022 1361 str r3, [r2, #16] + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1359 .loc 1 257 3 view .LVU388 + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1360 .loc 1 257 17 is_stmt 0 view .LVU389 + 1361 0024 0368 ldr r3, [r0] + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1362 .loc 1 257 6 view .LVU390 + 1363 0026 012B cmp r3, #1 + 1364 0028 0AD0 beq .L99 + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 1365 .loc 1 268 5 is_stmt 1 view .LVU391 + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1366 .loc 1 269 5 view .LVU392 + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1367 .loc 1 271 5 view .LVU393 + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1368 .loc 1 271 29 is_stmt 0 view .LVU394 + 1369 002a 0A4B ldr r3, .L100 + 1370 002c 0122 movs r2, #1 + 1371 002e 1A70 strb r2, [r3] + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1372 .loc 1 272 5 is_stmt 1 view .LVU395 + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1373 .loc 1 272 38 is_stmt 0 view .LVU396 + 1374 0030 8268 ldr r2, [r0, #8] + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1375 .loc 1 272 26 view .LVU397 + 1376 0032 5A60 str r2, [r3, #4] + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1377 .loc 1 273 5 is_stmt 1 view .LVU398 + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc6zde14.s page 48 + + + 1378 .loc 1 273 32 is_stmt 0 view .LVU399 + 1379 0034 4068 ldr r0, [r0, #4] + 1380 .LVL131: + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1381 .loc 1 273 20 view .LVU400 + 1382 0036 9860 str r0, [r3, #8] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1383 .loc 1 276 5 is_stmt 1 view .LVU401 + 1384 0038 FFF7FEFF bl FLASH_PageErase + 1385 .LVL132: + 1386 .L95: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1387 .loc 1 280 1 is_stmt 0 view .LVU402 + 1388 003c 2000 movs r0, r4 + 1389 @ sp needed + 1390 003e 10BD pop {r4, pc} + 1391 .LVL133: + 1392 .L99: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 1393 .loc 1 260 5 is_stmt 1 view .LVU403 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 1394 .loc 1 260 29 is_stmt 0 view .LVU404 + 1395 0040 044B ldr r3, .L100 + 1396 0042 0222 movs r2, #2 + 1397 0044 1A70 strb r2, [r3] + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1398 .loc 1 261 9 is_stmt 1 view .LVU405 + 1399 0046 FFF7FEFF bl FLASH_MassErase + 1400 .LVL134: + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1401 .loc 1 261 9 is_stmt 0 view .LVU406 + 1402 004a F7E7 b .L95 + 1403 .LVL135: + 1404 .L97: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1405 .loc 1 243 3 discriminator 1 view .LVU407 + 1406 004c 0224 movs r4, #2 + 1407 004e F5E7 b .L95 + 1408 .L98: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1409 .loc 1 248 12 view .LVU408 + 1410 0050 0124 movs r4, #1 + 1411 0052 F3E7 b .L95 + 1412 .L101: + 1413 .align 2 + 1414 .L100: + 1415 0054 00000000 .word pFlash + 1416 0058 00200240 .word 1073881088 + 1417 .cfi_endproc + 1418 .LFE41: + 1420 .text + 1421 .Letext0: + 1422 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1423 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1424 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 1425 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1426 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h" + ARM GAS /tmp/cc6zde14.s page 49 + + + 1427 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h" + ARM GAS /tmp/cc6zde14.s page 50 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_flash_ex.c + /tmp/cc6zde14.s:19 .text.FLASH_MassErase:00000000 $t + /tmp/cc6zde14.s:24 .text.FLASH_MassErase:00000000 FLASH_MassErase + /tmp/cc6zde14.s:53 .text.FLASH_MassErase:0000001c $d + /tmp/cc6zde14.s:59 .text.FLASH_OB_GetWRP:00000000 $t + /tmp/cc6zde14.s:64 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP + /tmp/cc6zde14.s:81 .text.FLASH_OB_GetWRP:00000008 $d + /tmp/cc6zde14.s:86 .text.FLASH_OB_GetRDP:00000000 $t + /tmp/cc6zde14.s:91 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP + /tmp/cc6zde14.s:134 .text.FLASH_OB_GetRDP:0000001c $d + /tmp/cc6zde14.s:139 .text.FLASH_OB_GetUser:00000000 $t + /tmp/cc6zde14.s:144 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser + /tmp/cc6zde14.s:165 .text.FLASH_OB_GetUser:0000000c $d + /tmp/cc6zde14.s:170 .text.FLASH_OB_RDP_LevelConfig:00000000 $t + /tmp/cc6zde14.s:175 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig + /tmp/cc6zde14.s:267 .text.FLASH_OB_RDP_LevelConfig:00000054 $d + /tmp/cc6zde14.s:275 .text.FLASH_OB_UserConfig:00000000 $t + /tmp/cc6zde14.s:280 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig + /tmp/cc6zde14.s:355 .text.FLASH_OB_UserConfig:00000034 $d + /tmp/cc6zde14.s:363 .text.FLASH_OB_ProgramData:00000000 $t + /tmp/cc6zde14.s:368 .text.FLASH_OB_ProgramData:00000000 FLASH_OB_ProgramData + /tmp/cc6zde14.s:440 .text.FLASH_OB_ProgramData:00000034 $d + /tmp/cc6zde14.s:447 .text.HAL_FLASHEx_OBErase:00000000 $t + /tmp/cc6zde14.s:453 .text.HAL_FLASHEx_OBErase:00000000 HAL_FLASHEx_OBErase + /tmp/cc6zde14.s:537 .text.HAL_FLASHEx_OBErase:00000044 $d + /tmp/cc6zde14.s:544 .text.FLASH_OB_EnableWRP:00000000 $t + /tmp/cc6zde14.s:549 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP + /tmp/cc6zde14.s:651 .text.FLASH_OB_EnableWRP:00000054 $d + /tmp/cc6zde14.s:659 .text.FLASH_OB_DisableWRP:00000000 $t + /tmp/cc6zde14.s:664 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP + /tmp/cc6zde14.s:766 .text.FLASH_OB_DisableWRP:00000054 $d + /tmp/cc6zde14.s:774 .text.HAL_FLASHEx_OBProgram:00000000 $t + /tmp/cc6zde14.s:780 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram + /tmp/cc6zde14.s:971 .text.HAL_FLASHEx_OBProgram:00000090 $d + /tmp/cc6zde14.s:976 .text.HAL_FLASHEx_OBGetConfig:00000000 $t + /tmp/cc6zde14.s:982 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig + /tmp/cc6zde14.s:1026 .text.HAL_FLASHEx_OBGetUserData:00000000 $t + /tmp/cc6zde14.s:1032 .text.HAL_FLASHEx_OBGetUserData:00000000 HAL_FLASHEx_OBGetUserData + /tmp/cc6zde14.s:1078 .text.HAL_FLASHEx_OBGetUserData:0000001c $d + /tmp/cc6zde14.s:1084 .text.FLASH_PageErase:00000000 $t + /tmp/cc6zde14.s:1090 .text.FLASH_PageErase:00000000 FLASH_PageErase + /tmp/cc6zde14.s:1122 .text.FLASH_PageErase:0000001c $d + /tmp/cc6zde14.s:1128 .text.HAL_FLASHEx_Erase:00000000 $t + /tmp/cc6zde14.s:1134 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase + /tmp/cc6zde14.s:1306 .text.HAL_FLASHEx_Erase:00000094 $d + /tmp/cc6zde14.s:1313 .text.HAL_FLASHEx_Erase_IT:00000000 $t + /tmp/cc6zde14.s:1319 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT + /tmp/cc6zde14.s:1415 .text.HAL_FLASHEx_Erase_IT:00000054 $d + +UNDEFINED SYMBOLS +pFlash +FLASH_WaitForLastOperation diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o new file mode 100644 index 0000000000000000000000000000000000000000..4f769f64baafcafbb0e0732689007d410ed2cd35 GIT binary patch literal 17040 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zr*OS`3$_ngYH_C=whdYG<=Dou1y=#C|4ptLGWmY7d^5$TYFM&-&0BOTdI1dDr#@wP zk=}>PYmfU$F)p{b_PCFF<)WZ%R|x3J@%hjz_aNxt736*^PwsKhwCNVt-os#c`>~9E z*x<1r zu{WJ(kLRBCt}!6Y%QBf~Zvpn)@m&iEH$MKY82)G0Z!hfCJ0|4ajqjN}xtXiTeK61O zDfo5QTeZjUU*y^2dF|{K{JxN9?=jfh0XgP{{dW8D&w2K?p@D1FEp9*fXG7k3@C8p^ zHbB_5_X}mu)jx%X4l1gGW?6okXYT^+eF2*xy+~a@eJw)?~&u5V0!!U3^vpiw9{`L^>8uoO?mcCmE(*DzFS;hTl4HKU+SuQ z*Isv?JsXoV;Ti+F_W1Xi-uOg^5GT=2d)(t)d$;7-dl&3Iz`#{;?TzNyJL$1^Eo5DL zlgb|bu#{j>PU?=knxA>+u)1N`^ogUT?~aZxC|JZcu2aUzVl3_yo>+G{878 zB{K279delJ3t-9emq;$QqD*m36Cs)@uW=Ae=ls7PRr(F$Vvb=iQ(nV&q5RWfx42dA Pab7ttqW5|nxN`pkL^hDR literal 0 HcmV?d00001 diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d new file mode 100644 index 0000000..2a421c1 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d @@ -0,0 +1,60 @@ +build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.lst new file mode 100644 index 0000000..3775dc1 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.lst @@ -0,0 +1,1725 @@ +ARM GAS /tmp/ccgN8YUn.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_gpio.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c" + 18 .section .text.HAL_GPIO_Init,"ax",%progbits + 19 .align 1 + 20 .global HAL_GPIO_Init + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_GPIO_Init: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @file stm32f0xx_hal_gpio.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * functionalities of the General Purpose Input/Output (GPIO) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * All rights reserved. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * in the root directory of this software component. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### GPIO Peripheral features ##### + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** [..] + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** configured by software in several modes: + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Input mode + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Analog mode + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Output mode + ARM GAS /tmp/ccgN8YUn.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Alternate function mode + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) External interrupt/event lines + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) During and just after reset, the alternate functions and external interrupt + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** lines are not active and the I/O ports are configured in input floating mode. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** activated or not. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** type and the IO speed can be selected depending on the VDD value. + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) The microcontroller IO pins are connected to onboard peripherals/modules through a + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** multiplexer that allows only one peripheral alternate function (AF) connected + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** to an IO pin at a time. In this way, there can be no conflict between peripherals + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** sharing the same IO pin. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) All ports have external interrupt/event capability. To use external interrupt + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** lines, the port must be configured in input mode. All available GPIO pins are + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) The external interrupt/event controller consists of up to 28 edge detectors + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (16 lines are connected to GPIO) for generating event/interrupt requests (each + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** input line can be independently configured to select the type (interrupt or event) + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** and the corresponding trigger event (rising or falling or both). Each line can + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** also be masked independently. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### How to use this driver ##### + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** [..] + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) Enable the GPIO AHB clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE(). + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** structure. + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In case of Output or alternate function mode selection: the speed is + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** configured through "Speed" member from GPIO_InitTypeDef structure. + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In alternate mode is selection, the alternate function connected to the IO + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** is configured through "Alternate" member from GPIO_InitTypeDef structure. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Analog mode is required when a pin is to be used as ADC channel + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** or DAC output. + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In case of external interrupt/event selection the "Mode" member from + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_InitTypeDef structure select the type (interrupt or event) and + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both). + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_NVIC_EnableIRQ(). + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** recommended to use it to unconfigure pin which was used as an external interrupt + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** registers. + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + ARM GAS /tmp/ccgN8YUn.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) During and just after reset, the alternate functions are not + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** active and the GPIO pins are configured in input floating mode (except JTAG + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** pins). + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** priority over the GPIO function. + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** general purpose PF0 and PF1, respectively, when the HSE oscillator is off. + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** The HSE has priority over the GPIO function. + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Includes ------------------------------------------------------------------*/ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #include "stm32f0xx_hal.h" + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @addtogroup STM32F0xx_HAL_Driver + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO GPIO + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO HAL module driver + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** MISRA C:2012 deviation rule has been granted for following rules: + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * Rule-18.1_d - Medium: Array pointer `GPIOx' is accessed with index [..,..] + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * which may be out of array bounds [..,UNKNOWN] in following APIs: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * HAL_GPIO_Init + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * HAL_GPIO_DeInit + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #ifdef HAL_GPIO_MODULE_ENABLED + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private typedef -----------------------------------------------------------*/ + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private defines -----------------------------------------------------------*/ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @addtogroup GPIO_Private_Constants GPIO Private Constants + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_NUMBER 16U + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @} + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private macros ------------------------------------------------------------*/ + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private variables ---------------------------------------------------------*/ + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private function prototypes -----------------------------------------------*/ + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Exported functions --------------------------------------------------------*/ + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + ARM GAS /tmp/ccgN8YUn.s page 4 + + + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions GPIO Exported Functions + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Initialization and Configuration functions + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### Initialization and de-initialization functions ##### + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init. + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the configuration information for the specified GPIO peripheral. + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 28 .loc 1 170 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 8 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 170 1 is_stmt 0 view .LVU1 + 33 0000 F0B5 push {r4, r5, r6, r7, lr} + 34 .cfi_def_cfa_offset 20 + 35 .cfi_offset 4, -20 + 36 .cfi_offset 5, -16 + 37 .cfi_offset 6, -12 + 38 .cfi_offset 7, -8 + 39 .cfi_offset 14, -4 + 40 0002 83B0 sub sp, sp, #12 + 41 .cfi_def_cfa_offset 32 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t position = 0x00u; + 42 .loc 1 171 3 is_stmt 1 view .LVU2 + 43 .LVL1: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 44 .loc 1 172 3 view .LVU3 + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t temp; + 45 .loc 1 173 3 view .LVU4 + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 46 .loc 1 176 3 view .LVU5 + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + 47 .loc 1 177 3 view .LVU6 + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + 48 .loc 1 178 3 view .LVU7 + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the port pins */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0x00u) + ARM GAS /tmp/ccgN8YUn.s page 5 + + + 49 .loc 1 181 3 view .LVU8 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 50 .loc 1 171 12 is_stmt 0 view .LVU9 + 51 0004 0023 movs r3, #0 + 52 .loc 1 181 9 view .LVU10 + 53 0006 56E0 b .L2 + 54 .LVL2: + 55 .L21: + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Get current io position */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** iocurrent = (GPIO_Init->Pin) & (1uL << position); + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (iocurrent != 0x00u) + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* In case of Output or Alternate function mode selection */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Speed parameter */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + 56 .loc 1 194 9 is_stmt 1 view .LVU11 + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the IO Speed */ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->OSPEEDR; + 57 .loc 1 196 9 view .LVU12 + 58 .loc 1 196 14 is_stmt 0 view .LVU13 + 59 0008 8668 ldr r6, [r0, #8] + 60 .LVL3: + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 61 .loc 1 197 9 is_stmt 1 view .LVU14 + 62 .loc 1 197 55 is_stmt 0 view .LVU15 + 63 000a 5F00 lsls r7, r3, #1 + 64 .loc 1 197 42 view .LVU16 + 65 000c 0324 movs r4, #3 + 66 000e BC40 lsls r4, r4, r7 + 67 .loc 1 197 14 view .LVU17 + 68 0010 A643 bics r6, r4 + 69 .LVL4: + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2u)); + 70 .loc 1 198 9 is_stmt 1 view .LVU18 + 71 .loc 1 198 27 is_stmt 0 view .LVU19 + 72 0012 CC68 ldr r4, [r1, #12] + 73 .loc 1 198 35 view .LVU20 + 74 0014 BC40 lsls r4, r4, r7 + 75 .loc 1 198 14 view .LVU21 + 76 0016 3443 orrs r4, r6 + 77 .LVL5: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; + 78 .loc 1 199 9 is_stmt 1 view .LVU22 + 79 .loc 1 199 24 is_stmt 0 view .LVU23 + 80 0018 8460 str r4, [r0, #8] + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the IO Output Type */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->OTYPER; + 81 .loc 1 202 9 is_stmt 1 view .LVU24 + 82 .loc 1 202 14 is_stmt 0 view .LVU25 + 83 001a 4468 ldr r4, [r0, #4] + ARM GAS /tmp/ccgN8YUn.s page 6 + + + 84 .LVL6: + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 85 .loc 1 203 9 is_stmt 1 view .LVU26 + 86 .loc 1 203 14 is_stmt 0 view .LVU27 + 87 001c 9443 bics r4, r2 + 88 .LVL7: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); + 89 .loc 1 204 9 is_stmt 1 view .LVU28 + 90 .loc 1 204 29 is_stmt 0 view .LVU29 + 91 001e 4E68 ldr r6, [r1, #4] + 92 .loc 1 204 51 view .LVU30 + 93 0020 3609 lsrs r6, r6, #4 + 94 0022 0122 movs r2, #1 + 95 0024 3240 ands r2, r6 + 96 .loc 1 204 71 view .LVU31 + 97 0026 9A40 lsls r2, r2, r3 + 98 .loc 1 204 14 view .LVU32 + 99 0028 2243 orrs r2, r4 + 100 .LVL8: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER = temp; + 101 .loc 1 205 9 is_stmt 1 view .LVU33 + 102 .loc 1 205 23 is_stmt 0 view .LVU34 + 103 002a 4260 str r2, [r0, #4] + 104 002c 53E0 b .L4 + 105 .LVL9: + 106 .L22: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Pull parameter */ + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Activate the Pull-up or Pull down resistor for the current IO */ + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->PUPDR; + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* In case of Alternate function mode selection */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Alternate function parameters */ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + 107 .loc 1 224 9 is_stmt 1 view .LVU35 + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + 108 .loc 1 225 9 view .LVU36 + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure Alternate function mapped with the current IO */ + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->AFR[position >> 3u]; + 109 .loc 1 228 9 view .LVU37 + 110 .loc 1 228 36 is_stmt 0 view .LVU38 + 111 002e DE08 lsrs r6, r3, #3 + 112 .loc 1 228 14 view .LVU39 + 113 0030 0836 adds r6, r6, #8 + 114 0032 B600 lsls r6, r6, #2 + ARM GAS /tmp/ccgN8YUn.s page 7 + + + 115 0034 3758 ldr r7, [r6, r0] + 116 .LVL10: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 117 .loc 1 229 9 is_stmt 1 view .LVU40 + 118 .loc 1 229 38 is_stmt 0 view .LVU41 + 119 0036 0532 adds r2, r2, #5 + 120 0038 1A40 ands r2, r3 + 121 .loc 1 229 47 view .LVU42 + 122 003a 9200 lsls r2, r2, #2 + 123 .loc 1 229 24 view .LVU43 + 124 003c 0F24 movs r4, #15 + 125 003e 9440 lsls r4, r4, r2 + 126 .loc 1 229 14 view .LVU44 + 127 0040 A743 bics r7, r4 + 128 .LVL11: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 129 .loc 1 230 9 is_stmt 1 view .LVU45 + 130 .loc 1 230 28 is_stmt 0 view .LVU46 + 131 0042 0C69 ldr r4, [r1, #16] + 132 .loc 1 230 41 view .LVU47 + 133 0044 9440 lsls r4, r4, r2 + 134 0046 2200 movs r2, r4 + 135 .loc 1 230 14 view .LVU48 + 136 0048 3A43 orrs r2, r7 + 137 .LVL12: + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] = temp; + 138 .loc 1 231 9 is_stmt 1 view .LVU49 + 139 .loc 1 231 36 is_stmt 0 view .LVU50 + 140 004a 3250 str r2, [r6, r0] + 141 004c 56E0 b .L6 + 142 .LVL13: + 143 .L23: + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->MODER; + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Enable SYSCFG Clock */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = SYSCFG->EXTICR[position >> 2u]; + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 144 .loc 1 249 18 discriminator 5 view .LVU51 + 145 004e 0226 movs r6, #2 + 146 0050 00E0 b .L7 + 147 .L13: + 148 .loc 1 249 18 discriminator 2 view .LVU52 + 149 0052 0026 movs r6, #0 + 150 .L7: + ARM GAS /tmp/ccgN8YUn.s page 8 + + + 151 .loc 1 249 40 discriminator 12 view .LVU53 + 152 0054 A640 lsls r6, r6, r4 + 153 0056 3400 movs r4, r6 + 154 .loc 1 249 14 discriminator 12 view .LVU54 + 155 0058 3C43 orrs r4, r7 + 156 .LVL14: + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 157 .loc 1 250 9 is_stmt 1 view .LVU55 + 158 .loc 1 250 40 is_stmt 0 view .LVU56 + 159 005a 0232 adds r2, r2, #2 + 160 005c 9200 lsls r2, r2, #2 + 161 005e 424E ldr r6, .L24 + 162 0060 9451 str r4, [r2, r6] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->RTSR; + 163 .loc 1 253 9 is_stmt 1 view .LVU57 + 164 .loc 1 253 14 is_stmt 0 view .LVU58 + 165 0062 424A ldr r2, .L24+4 + 166 0064 9768 ldr r7, [r2, #8] + 167 .LVL15: + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 168 .loc 1 254 9 is_stmt 1 view .LVU59 + 169 .loc 1 254 17 is_stmt 0 view .LVU60 + 170 0066 EA43 mvns r2, r5 + 171 .loc 1 254 14 view .LVU61 + 172 0068 3E00 movs r6, r7 + 173 006a AE43 bics r6, r5 + 174 .LVL16: + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) + 175 .loc 1 255 9 is_stmt 1 view .LVU62 + 176 .loc 1 255 22 is_stmt 0 view .LVU63 + 177 006c 4C68 ldr r4, [r1, #4] + 178 .loc 1 255 11 view .LVU64 + 179 006e E402 lsls r4, r4, #11 + 180 0070 01D5 bpl .L8 + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 181 .loc 1 257 11 is_stmt 1 view .LVU65 + 182 .loc 1 257 16 is_stmt 0 view .LVU66 + 183 0072 3E00 movs r6, r7 + 184 .LVL17: + 185 .loc 1 257 16 view .LVU67 + 186 0074 2E43 orrs r6, r5 + 187 .LVL18: + 188 .L8: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR = temp; + 189 .loc 1 259 9 is_stmt 1 view .LVU68 + 190 .loc 1 259 20 is_stmt 0 view .LVU69 + 191 0076 3D4C ldr r4, .L24+4 + 192 0078 A660 str r6, [r4, #8] + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->FTSR; + 193 .loc 1 261 9 is_stmt 1 view .LVU70 + 194 .loc 1 261 14 is_stmt 0 view .LVU71 + 195 007a E768 ldr r7, [r4, #12] + ARM GAS /tmp/ccgN8YUn.s page 9 + + + 196 .LVL19: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 197 .loc 1 262 9 is_stmt 1 view .LVU72 + 198 .loc 1 262 14 is_stmt 0 view .LVU73 + 199 007c 3E00 movs r6, r7 + 200 007e 1640 ands r6, r2 + 201 .LVL20: + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) + 202 .loc 1 263 9 is_stmt 1 view .LVU74 + 203 .loc 1 263 22 is_stmt 0 view .LVU75 + 204 0080 4C68 ldr r4, [r1, #4] + 205 .loc 1 263 11 view .LVU76 + 206 0082 A402 lsls r4, r4, #10 + 207 0084 01D5 bpl .L9 + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 208 .loc 1 265 11 is_stmt 1 view .LVU77 + 209 .loc 1 265 16 is_stmt 0 view .LVU78 + 210 0086 3E00 movs r6, r7 + 211 .LVL21: + 212 .loc 1 265 16 view .LVU79 + 213 0088 2E43 orrs r6, r5 + 214 .LVL22: + 215 .L9: + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR = temp; + 216 .loc 1 267 9 is_stmt 1 view .LVU80 + 217 .loc 1 267 20 is_stmt 0 view .LVU81 + 218 008a 384C ldr r4, .L24+4 + 219 008c E660 str r6, [r4, #12] + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->EMR; + 220 .loc 1 270 9 is_stmt 1 view .LVU82 + 221 .loc 1 270 14 is_stmt 0 view .LVU83 + 222 008e 6768 ldr r7, [r4, #4] + 223 .LVL23: + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 224 .loc 1 271 9 is_stmt 1 view .LVU84 + 225 .loc 1 271 14 is_stmt 0 view .LVU85 + 226 0090 3E00 movs r6, r7 + 227 0092 1640 ands r6, r2 + 228 .LVL24: + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) + 229 .loc 1 272 9 is_stmt 1 view .LVU86 + 230 .loc 1 272 22 is_stmt 0 view .LVU87 + 231 0094 4C68 ldr r4, [r1, #4] + 232 .loc 1 272 11 view .LVU88 + 233 0096 A403 lsls r4, r4, #14 + 234 0098 01D5 bpl .L10 + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 235 .loc 1 274 11 is_stmt 1 view .LVU89 + 236 .loc 1 274 16 is_stmt 0 view .LVU90 + 237 009a 3E00 movs r6, r7 + 238 .LVL25: + 239 .loc 1 274 16 view .LVU91 + ARM GAS /tmp/ccgN8YUn.s page 10 + + + 240 009c 2E43 orrs r6, r5 + 241 .LVL26: + 242 .L10: + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR = temp; + 243 .loc 1 276 9 is_stmt 1 view .LVU92 + 244 .loc 1 276 19 is_stmt 0 view .LVU93 + 245 009e 334C ldr r4, .L24+4 + 246 00a0 6660 str r6, [r4, #4] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->IMR; + 247 .loc 1 278 9 is_stmt 1 view .LVU94 + 248 .loc 1 278 14 is_stmt 0 view .LVU95 + 249 00a2 2668 ldr r6, [r4] + 250 .LVL27: + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 251 .loc 1 279 9 is_stmt 1 view .LVU96 + 252 .loc 1 279 14 is_stmt 0 view .LVU97 + 253 00a4 3240 ands r2, r6 + 254 .LVL28: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_IT) != 0x00u) + 255 .loc 1 280 9 is_stmt 1 view .LVU98 + 256 .loc 1 280 22 is_stmt 0 view .LVU99 + 257 00a6 4C68 ldr r4, [r1, #4] + 258 .loc 1 280 11 view .LVU100 + 259 00a8 E403 lsls r4, r4, #15 + 260 00aa 01D5 bpl .L11 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 261 .loc 1 282 11 is_stmt 1 view .LVU101 + 262 .loc 1 282 16 is_stmt 0 view .LVU102 + 263 00ac 2A00 movs r2, r5 + 264 .LVL29: + 265 .loc 1 282 16 view .LVU103 + 266 00ae 3243 orrs r2, r6 + 267 .LVL30: + 268 .L11: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->IMR = temp; + 269 .loc 1 284 9 is_stmt 1 view .LVU104 + 270 .loc 1 284 19 is_stmt 0 view .LVU105 + 271 00b0 2E4C ldr r4, .L24+4 + 272 00b2 2260 str r2, [r4] + 273 .LVL31: + 274 .L3: + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** position++; + 275 .loc 1 288 5 is_stmt 1 view .LVU106 + 276 .loc 1 288 13 is_stmt 0 view .LVU107 + 277 00b4 0133 adds r3, r3, #1 + 278 .LVL32: + 279 .L2: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 280 .loc 1 181 41 is_stmt 1 view .LVU108 + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + ARM GAS /tmp/ccgN8YUn.s page 11 + + + 281 .loc 1 181 21 is_stmt 0 view .LVU109 + 282 00b6 0C68 ldr r4, [r1] + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 283 .loc 1 181 28 view .LVU110 + 284 00b8 2200 movs r2, r4 + 285 00ba DA40 lsrs r2, r2, r3 + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 286 .loc 1 181 41 view .LVU111 + 287 00bc 51D0 beq .L20 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 288 .loc 1 184 5 is_stmt 1 view .LVU112 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 289 .loc 1 184 41 is_stmt 0 view .LVU113 + 290 00be 0122 movs r2, #1 + 291 00c0 9A40 lsls r2, r2, r3 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 292 .loc 1 184 15 view .LVU114 + 293 00c2 2500 movs r5, r4 + 294 00c4 1540 ands r5, r2 + 295 .LVL33: + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 296 .loc 1 186 5 is_stmt 1 view .LVU115 + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 297 .loc 1 186 8 is_stmt 0 view .LVU116 + 298 00c6 1442 tst r4, r2 + 299 00c8 F4D0 beq .L3 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 300 .loc 1 190 7 is_stmt 1 view .LVU117 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 301 .loc 1 190 21 is_stmt 0 view .LVU118 + 302 00ca 4E68 ldr r6, [r1, #4] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 303 .loc 1 190 28 view .LVU119 + 304 00cc 0324 movs r4, #3 + 305 00ce 3440 ands r4, r6 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 306 .loc 1 190 57 view .LVU120 + 307 00d0 013C subs r4, r4, #1 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 308 .loc 1 190 9 view .LVU121 + 309 00d2 012C cmp r4, #1 + 310 00d4 98D9 bls .L21 + 311 .L4: + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 312 .loc 1 208 7 is_stmt 1 view .LVU122 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 313 .loc 1 208 20 is_stmt 0 view .LVU123 + 314 00d6 4C68 ldr r4, [r1, #4] + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 315 .loc 1 208 27 view .LVU124 + 316 00d8 0322 movs r2, #3 + 317 00da 2240 ands r2, r4 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 318 .loc 1 208 9 view .LVU125 + 319 00dc 032A cmp r2, #3 + 320 00de 08D0 beq .L5 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + ARM GAS /tmp/ccgN8YUn.s page 12 + + + 321 .loc 1 211 9 is_stmt 1 view .LVU126 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 322 .loc 1 214 9 view .LVU127 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 323 .loc 1 214 14 is_stmt 0 view .LVU128 + 324 00e0 C468 ldr r4, [r0, #12] + 325 .LVL34: + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 326 .loc 1 215 9 is_stmt 1 view .LVU129 + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 327 .loc 1 215 50 is_stmt 0 view .LVU130 + 328 00e2 5E00 lsls r6, r3, #1 + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 329 .loc 1 215 37 view .LVU131 + 330 00e4 0322 movs r2, #3 + 331 00e6 B240 lsls r2, r2, r6 + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 332 .loc 1 215 14 view .LVU132 + 333 00e8 9443 bics r4, r2 + 334 .LVL35: + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 335 .loc 1 216 9 is_stmt 1 view .LVU133 + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 336 .loc 1 216 28 is_stmt 0 view .LVU134 + 337 00ea 8A68 ldr r2, [r1, #8] + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 338 .loc 1 216 36 view .LVU135 + 339 00ec B240 lsls r2, r2, r6 + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 340 .loc 1 216 14 view .LVU136 + 341 00ee 2243 orrs r2, r4 + 342 .LVL36: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 343 .loc 1 217 9 is_stmt 1 view .LVU137 + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 344 .loc 1 217 22 is_stmt 0 view .LVU138 + 345 00f0 C260 str r2, [r0, #12] + 346 .LVL37: + 347 .L5: + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 348 .loc 1 221 7 is_stmt 1 view .LVU139 + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 349 .loc 1 221 20 is_stmt 0 view .LVU140 + 350 00f2 4C68 ldr r4, [r1, #4] + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 351 .loc 1 221 27 view .LVU141 + 352 00f4 0322 movs r2, #3 + 353 00f6 2240 ands r2, r4 + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 354 .loc 1 221 9 view .LVU142 + 355 00f8 022A cmp r2, #2 + 356 00fa 98D0 beq .L22 + 357 .L6: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 358 .loc 1 235 7 is_stmt 1 view .LVU143 + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 359 .loc 1 235 12 is_stmt 0 view .LVU144 + ARM GAS /tmp/ccgN8YUn.s page 13 + + + 360 00fc 0468 ldr r4, [r0] + 361 .LVL38: + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 362 .loc 1 236 7 is_stmt 1 view .LVU145 + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 363 .loc 1 236 48 is_stmt 0 view .LVU146 + 364 00fe 5E00 lsls r6, r3, #1 + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 365 .loc 1 236 35 view .LVU147 + 366 0100 0322 movs r2, #3 + 367 0102 1700 movs r7, r2 + 368 0104 B740 lsls r7, r7, r6 + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 369 .loc 1 236 12 view .LVU148 + 370 0106 BC43 bics r4, r7 + 371 .LVL39: + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 372 .loc 1 237 7 is_stmt 1 view .LVU149 + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 373 .loc 1 237 26 is_stmt 0 view .LVU150 + 374 0108 4F68 ldr r7, [r1, #4] + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 375 .loc 1 237 33 view .LVU151 + 376 010a 3A40 ands r2, r7 + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 377 .loc 1 237 46 view .LVU152 + 378 010c B240 lsls r2, r2, r6 + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 379 .loc 1 237 12 view .LVU153 + 380 010e 2243 orrs r2, r4 + 381 .LVL40: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 382 .loc 1 238 7 is_stmt 1 view .LVU154 + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 383 .loc 1 238 20 is_stmt 0 view .LVU155 + 384 0110 0260 str r2, [r0] + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 385 .loc 1 242 7 is_stmt 1 view .LVU156 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 386 .loc 1 242 20 is_stmt 0 view .LVU157 + 387 0112 4C68 ldr r4, [r1, #4] + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 388 .loc 1 242 27 view .LVU158 + 389 0114 C022 movs r2, #192 + 390 .LVL41: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 391 .loc 1 242 27 view .LVU159 + 392 0116 9202 lsls r2, r2, #10 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 393 .loc 1 242 9 view .LVU160 + 394 0118 1442 tst r4, r2 + 395 011a CBD0 beq .L3 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 396 .loc 1 245 9 is_stmt 1 view .LVU161 + 397 .LBB2: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 398 .loc 1 245 9 view .LVU162 + ARM GAS /tmp/ccgN8YUn.s page 14 + + + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 399 .loc 1 245 9 view .LVU163 + 400 011c 144C ldr r4, .L24+8 + 401 011e A669 ldr r6, [r4, #24] + 402 0120 0122 movs r2, #1 + 403 0122 1643 orrs r6, r2 + 404 0124 A661 str r6, [r4, #24] + 405 .LVL42: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 406 .loc 1 245 9 view .LVU164 + 407 0126 A469 ldr r4, [r4, #24] + 408 0128 2240 ands r2, r4 + 409 012a 0192 str r2, [sp, #4] + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 410 .loc 1 245 9 view .LVU165 + 411 012c 019A ldr r2, [sp, #4] + 412 .LBE2: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 413 .loc 1 245 9 view .LVU166 + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 414 .loc 1 247 9 view .LVU167 + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 415 .loc 1 247 40 is_stmt 0 view .LVU168 + 416 012e 9A08 lsrs r2, r3, #2 + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 417 .loc 1 247 14 view .LVU169 + 418 0130 941C adds r4, r2, #2 + 419 0132 A400 lsls r4, r4, #2 + 420 0134 0C4E ldr r6, .L24 + 421 0136 A759 ldr r7, [r4, r6] + 422 .LVL43: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 423 .loc 1 248 9 is_stmt 1 view .LVU170 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 424 .loc 1 248 45 is_stmt 0 view .LVU171 + 425 0138 0324 movs r4, #3 + 426 013a 1C40 ands r4, r3 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 427 .loc 1 248 33 view .LVU172 + 428 013c A400 lsls r4, r4, #2 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 429 .loc 1 248 26 view .LVU173 + 430 013e 0F26 movs r6, #15 + 431 0140 A640 lsls r6, r6, r4 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 432 .loc 1 248 14 view .LVU174 + 433 0142 B743 bics r7, r6 + 434 .LVL44: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 435 .loc 1 249 9 is_stmt 1 view .LVU175 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 436 .loc 1 249 18 is_stmt 0 view .LVU176 + 437 0144 9026 movs r6, #144 + 438 0146 F605 lsls r6, r6, #23 + 439 0148 B042 cmp r0, r6 + 440 014a 82D0 beq .L13 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + ARM GAS /tmp/ccgN8YUn.s page 15 + + + 441 .loc 1 249 18 discriminator 1 view .LVU177 + 442 014c 094E ldr r6, .L24+12 + 443 014e B042 cmp r0, r6 + 444 0150 05D0 beq .L14 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 445 .loc 1 249 18 discriminator 3 view .LVU178 + 446 0152 094E ldr r6, .L24+16 + 447 0154 B042 cmp r0, r6 + 448 0156 00D1 bne .LCB389 + 449 0158 79E7 b .L23 @long jump + 450 .LCB389: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 451 .loc 1 249 18 discriminator 6 view .LVU179 + 452 015a 0526 movs r6, #5 + 453 015c 7AE7 b .L7 + 454 .L14: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 455 .loc 1 249 18 discriminator 4 view .LVU180 + 456 015e 0126 movs r6, #1 + 457 0160 78E7 b .L7 + 458 .LVL45: + 459 .L20: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 460 .loc 1 290 1 view .LVU181 + 461 0162 03B0 add sp, sp, #12 + 462 @ sp needed + 463 0164 F0BD pop {r4, r5, r6, r7, pc} + 464 .L25: + 465 0166 C046 .align 2 + 466 .L24: + 467 0168 00000140 .word 1073807360 + 468 016c 00040140 .word 1073808384 + 469 0170 00100240 .word 1073876992 + 470 0174 00040048 .word 1207960576 + 471 0178 00080048 .word 1207961600 + 472 .cfi_endproc + 473 .LFE40: + 475 .section .text.HAL_GPIO_DeInit,"ax",%progbits + 476 .align 1 + 477 .global HAL_GPIO_DeInit + 478 .syntax unified + 479 .code 16 + 480 .thumb_func + 482 HAL_GPIO_DeInit: + 483 .LVL46: + 484 .LFB41: + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief De-initialize the GPIOx peripheral registers to their default reset values. + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + ARM GAS /tmp/ccgN8YUn.s page 16 + + + 485 .loc 1 300 1 is_stmt 1 view -0 + 486 .cfi_startproc + 487 @ args = 0, pretend = 0, frame = 0 + 488 @ frame_needed = 0, uses_anonymous_args = 0 + 489 .loc 1 300 1 is_stmt 0 view .LVU183 + 490 0000 F0B5 push {r4, r5, r6, r7, lr} + 491 .cfi_def_cfa_offset 20 + 492 .cfi_offset 4, -20 + 493 .cfi_offset 5, -16 + 494 .cfi_offset 6, -12 + 495 .cfi_offset 7, -8 + 496 .cfi_offset 14, -4 + 497 0002 CE46 mov lr, r9 + 498 0004 4746 mov r7, r8 + 499 0006 80B5 push {r7, lr} + 500 .cfi_def_cfa_offset 28 + 501 .cfi_offset 8, -28 + 502 .cfi_offset 9, -24 + 503 0008 8946 mov r9, r1 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t position = 0x00u; + 504 .loc 1 301 3 is_stmt 1 view .LVU184 + 505 .LVL47: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 506 .loc 1 302 3 view .LVU185 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t tmp; + 507 .loc 1 303 3 view .LVU186 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 508 .loc 1 306 3 view .LVU187 + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 509 .loc 1 307 3 view .LVU188 + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the port pins */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0x00u) + 510 .loc 1 310 3 view .LVU189 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 511 .loc 1 301 12 is_stmt 0 view .LVU190 + 512 000a 0023 movs r3, #0 + 513 .loc 1 310 9 view .LVU191 + 514 000c 23E0 b .L27 + 515 .LVL48: + 516 .L37: + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Get current io position */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1uL << position); + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (iocurrent != 0x00u) + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/ + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = SYSCFG->EXTICR[position >> 2u]; + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 517 .loc 1 322 19 discriminator 5 view .LVU192 + 518 000e 0221 movs r1, #2 + ARM GAS /tmp/ccgN8YUn.s page 17 + + + 519 0010 8846 mov r8, r1 + 520 0012 01E0 b .L29 + 521 .L32: + 522 .loc 1 322 19 discriminator 2 view .LVU193 + 523 0014 0021 movs r1, #0 + 524 0016 8846 mov r8, r1 + 525 .L29: + 526 .loc 1 322 41 discriminator 12 view .LVU194 + 527 0018 4146 mov r1, r8 + 528 001a A140 lsls r1, r1, r4 + 529 .loc 1 322 10 discriminator 12 view .LVU195 + 530 001c A942 cmp r1, r5 + 531 001e 40D0 beq .L35 + 532 .LVL49: + 533 .L30: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->IMR &= ~((uint32_t)iocurrent); + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = 0x0FuL << (4u * (position & 0x03u)); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure IO Direction in Input Floating Mode */ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 534 .loc 1 339 7 is_stmt 1 view .LVU196 + 535 .loc 1 339 12 is_stmt 0 view .LVU197 + 536 0020 0468 ldr r4, [r0] + 537 .loc 1 339 56 view .LVU198 + 538 0022 5E00 lsls r6, r3, #1 + 539 .loc 1 339 43 view .LVU199 + 540 0024 0325 movs r5, #3 + 541 0026 B540 lsls r5, r5, r6 + 542 .loc 1 339 20 view .LVU200 + 543 0028 AC43 bics r4, r5 + 544 002a 0460 str r4, [r0] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default Alternate Function in current IO */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ; + 545 .loc 1 342 7 is_stmt 1 view .LVU201 + 546 .loc 1 342 17 is_stmt 0 view .LVU202 + 547 002c DC08 lsrs r4, r3, #3 + 548 002e 0834 adds r4, r4, #8 + 549 0030 A400 lsls r4, r4, #2 + 550 0032 2758 ldr r7, [r4, r0] + 551 .loc 1 342 48 view .LVU203 + 552 0034 0726 movs r6, #7 + 553 0036 1E40 ands r6, r3 + 554 .loc 1 342 77 view .LVU204 + 555 0038 B600 lsls r6, r6, #2 + ARM GAS /tmp/ccgN8YUn.s page 18 + + + 556 .loc 1 342 44 view .LVU205 + 557 003a 0F21 movs r1, #15 + 558 003c B140 lsls r1, r1, r6 + 559 .loc 1 342 34 view .LVU206 + 560 003e 8F43 bics r7, r1 + 561 0040 2750 str r7, [r4, r0] + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Deactivate the Pull-up and Pull-down resistor for the current IO */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 562 .loc 1 345 7 is_stmt 1 view .LVU207 + 563 .loc 1 345 12 is_stmt 0 view .LVU208 + 564 0042 C468 ldr r4, [r0, #12] + 565 .loc 1 345 20 view .LVU209 + 566 0044 AC43 bics r4, r5 + 567 0046 C460 str r4, [r0, #12] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default value IO Output Type */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; + 568 .loc 1 348 7 is_stmt 1 view .LVU210 + 569 .loc 1 348 12 is_stmt 0 view .LVU211 + 570 0048 4468 ldr r4, [r0, #4] + 571 .loc 1 348 22 view .LVU212 + 572 004a 9443 bics r4, r2 + 573 004c 4460 str r4, [r0, #4] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default value for IO Speed */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 574 .loc 1 351 7 is_stmt 1 view .LVU213 + 575 .loc 1 351 12 is_stmt 0 view .LVU214 + 576 004e 8268 ldr r2, [r0, #8] + 577 .loc 1 351 22 view .LVU215 + 578 0050 AA43 bics r2, r5 + 579 0052 8260 str r2, [r0, #8] + 580 .L28: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** position++; + 581 .loc 1 355 5 is_stmt 1 view .LVU216 + 582 .loc 1 355 13 is_stmt 0 view .LVU217 + 583 0054 0133 adds r3, r3, #1 + 584 .LVL50: + 585 .L27: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 586 .loc 1 310 33 is_stmt 1 view .LVU218 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 587 .loc 1 310 20 is_stmt 0 view .LVU219 + 588 0056 4A46 mov r2, r9 + 589 0058 DA40 lsrs r2, r2, r3 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 590 .loc 1 310 33 view .LVU220 + 591 005a 37D0 beq .L36 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 592 .loc 1 313 5 is_stmt 1 view .LVU221 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 593 .loc 1 313 35 is_stmt 0 view .LVU222 + 594 005c 0122 movs r2, #1 + ARM GAS /tmp/ccgN8YUn.s page 19 + + + 595 005e 9A40 lsls r2, r2, r3 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 596 .loc 1 313 15 view .LVU223 + 597 0060 4C46 mov r4, r9 + 598 0062 1440 ands r4, r2 + 599 0064 A446 mov ip, r4 + 600 .LVL51: + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 601 .loc 1 315 5 is_stmt 1 view .LVU224 + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 602 .loc 1 315 8 is_stmt 0 view .LVU225 + 603 0066 4946 mov r1, r9 + 604 0068 1142 tst r1, r2 + 605 006a F3D0 beq .L28 + 606 .LVL52: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 607 .loc 1 320 7 is_stmt 1 view .LVU226 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 608 .loc 1 320 37 is_stmt 0 view .LVU227 + 609 006c 9F08 lsrs r7, r3, #2 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 610 .loc 1 320 11 view .LVU228 + 611 006e BC1C adds r4, r7, #2 + 612 .LVL53: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 613 .loc 1 320 11 view .LVU229 + 614 0070 A400 lsls r4, r4, #2 + 615 0072 184D ldr r5, .L38 + 616 0074 6559 ldr r5, [r4, r5] + 617 .LVL54: + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 618 .loc 1 321 7 is_stmt 1 view .LVU230 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 619 .loc 1 321 41 is_stmt 0 view .LVU231 + 620 0076 0326 movs r6, #3 + 621 0078 1E40 ands r6, r3 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 622 .loc 1 321 29 view .LVU232 + 623 007a B400 lsls r4, r6, #2 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 624 .loc 1 321 22 view .LVU233 + 625 007c 0F26 movs r6, #15 + 626 007e A640 lsls r6, r6, r4 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 627 .loc 1 321 11 view .LVU234 + 628 0080 3540 ands r5, r6 + 629 .LVL55: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 630 .loc 1 322 7 is_stmt 1 view .LVU235 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 631 .loc 1 322 19 is_stmt 0 view .LVU236 + 632 0082 9021 movs r1, #144 + 633 .LVL56: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 634 .loc 1 322 19 view .LVU237 + 635 0084 C905 lsls r1, r1, #23 + 636 0086 8842 cmp r0, r1 + ARM GAS /tmp/ccgN8YUn.s page 20 + + + 637 0088 C4D0 beq .L32 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 638 .loc 1 322 19 discriminator 1 view .LVU238 + 639 008a 1349 ldr r1, .L38+4 + 640 008c 8842 cmp r0, r1 + 641 008e 05D0 beq .L33 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 642 .loc 1 322 19 discriminator 3 view .LVU239 + 643 0090 1249 ldr r1, .L38+8 + 644 0092 8842 cmp r0, r1 + 645 0094 BBD0 beq .L37 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 646 .loc 1 322 19 discriminator 6 view .LVU240 + 647 0096 0521 movs r1, #5 + 648 0098 8846 mov r8, r1 + 649 009a BDE7 b .L29 + 650 .L33: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 651 .loc 1 322 19 discriminator 4 view .LVU241 + 652 009c 0121 movs r1, #1 + 653 009e 8846 mov r8, r1 + 654 00a0 BAE7 b .L29 + 655 .L35: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 656 .loc 1 325 9 is_stmt 1 view .LVU242 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 657 .loc 1 325 13 is_stmt 0 view .LVU243 + 658 00a2 0F4C ldr r4, .L38+12 + 659 00a4 2568 ldr r5, [r4] + 660 .LVL57: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 661 .loc 1 325 19 view .LVU244 + 662 00a6 6146 mov r1, ip + 663 00a8 8D43 bics r5, r1 + 664 00aa 2560 str r5, [r4] + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 665 .loc 1 326 9 is_stmt 1 view .LVU245 + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 666 .loc 1 326 13 is_stmt 0 view .LVU246 + 667 00ac 6568 ldr r5, [r4, #4] + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 668 .loc 1 326 19 view .LVU247 + 669 00ae 8D43 bics r5, r1 + 670 00b0 6560 str r5, [r4, #4] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 671 .loc 1 329 9 is_stmt 1 view .LVU248 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 672 .loc 1 329 13 is_stmt 0 view .LVU249 + 673 00b2 E568 ldr r5, [r4, #12] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 674 .loc 1 329 20 view .LVU250 + 675 00b4 8D43 bics r5, r1 + 676 00b6 E560 str r5, [r4, #12] + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 677 .loc 1 330 9 is_stmt 1 view .LVU251 + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 678 .loc 1 330 13 is_stmt 0 view .LVU252 + ARM GAS /tmp/ccgN8YUn.s page 21 + + + 679 00b8 A568 ldr r5, [r4, #8] + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 680 .loc 1 330 20 view .LVU253 + 681 00ba 8D43 bics r5, r1 + 682 00bc A560 str r5, [r4, #8] + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 683 .loc 1 333 9 is_stmt 1 view .LVU254 + 684 .LVL58: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 685 .loc 1 334 9 view .LVU255 + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 686 .loc 1 334 23 is_stmt 0 view .LVU256 + 687 00be 0549 ldr r1, .L38 + 688 00c0 0237 adds r7, r7, #2 + 689 00c2 BC00 lsls r4, r7, #2 + 690 00c4 6558 ldr r5, [r4, r1] + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 691 .loc 1 334 40 view .LVU257 + 692 00c6 B543 bics r5, r6 + 693 00c8 6550 str r5, [r4, r1] + 694 00ca A9E7 b .L30 + 695 .LVL59: + 696 .L36: + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 697 .loc 1 357 1 view .LVU258 + 698 @ sp needed + 699 .LVL60: + 700 .loc 1 357 1 view .LVU259 + 701 00cc C0BC pop {r6, r7} + 702 00ce B946 mov r9, r7 + 703 00d0 B046 mov r8, r6 + 704 00d2 F0BD pop {r4, r5, r6, r7, pc} + 705 .L39: + 706 .align 2 + 707 .L38: + 708 00d4 00000140 .word 1073807360 + 709 00d8 00040048 .word 1207960576 + 710 00dc 00080048 .word 1207961600 + 711 00e0 00040140 .word 1073808384 + 712 .cfi_endproc + 713 .LFE41: + 715 .section .text.HAL_GPIO_ReadPin,"ax",%progbits + 716 .align 1 + 717 .global HAL_GPIO_ReadPin + 718 .syntax unified + 719 .code 16 + 720 .thumb_func + 722 HAL_GPIO_ReadPin: + 723 .LVL61: + 724 .LFB42: + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @} + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions + ARM GAS /tmp/ccgN8YUn.s page 22 + + + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### IO operation functions ##### + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Read the specified input port pin. + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to read. + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15). + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval The input port pin value. + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 725 .loc 1 383 1 is_stmt 1 view -0 + 726 .cfi_startproc + 727 @ args = 0, pretend = 0, frame = 0 + 728 @ frame_needed = 0, uses_anonymous_args = 0 + 729 @ link register save eliminated. + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_PinState bitstatus; + 730 .loc 1 384 3 view .LVU261 + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 731 .loc 1 387 3 view .LVU262 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) + 732 .loc 1 389 3 view .LVU263 + 733 .loc 1 389 13 is_stmt 0 view .LVU264 + 734 0000 0369 ldr r3, [r0, #16] + 735 .loc 1 389 6 view .LVU265 + 736 0002 0B42 tst r3, r1 + 737 0004 01D0 beq .L42 + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET; + 738 .loc 1 391 15 view .LVU266 + 739 0006 0120 movs r0, #1 + 740 .LVL62: + 741 .L41: + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET; + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return bitstatus; + 742 .loc 1 397 3 is_stmt 1 view .LVU267 + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 743 .loc 1 398 3 is_stmt 0 view .LVU268 + 744 @ sp needed + 745 0008 7047 bx lr + 746 .LVL63: + ARM GAS /tmp/ccgN8YUn.s page 23 + + + 747 .L42: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 748 .loc 1 395 15 view .LVU269 + 749 000a 0020 movs r0, #0 + 750 .LVL64: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 751 .loc 1 395 15 view .LVU270 + 752 000c FCE7 b .L41 + 753 .cfi_endproc + 754 .LFE42: + 756 .section .text.HAL_GPIO_WritePin,"ax",%progbits + 757 .align 1 + 758 .global HAL_GPIO_WritePin + 759 .syntax unified + 760 .code 16 + 761 .thumb_func + 763 HAL_GPIO_WritePin: + 764 .LVL65: + 765 .LFB43: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Set or clear the selected data port bit. + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the read and the modify access. + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..H) to select the GPIO peripheral for STM32F0 family + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param PinState specifies the value to be written to the selected bit. + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values: + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @arg GPIO_PIN_RESET: to clear the port pin + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @arg GPIO_PIN_SET: to set the port pin + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 766 .loc 1 416 1 is_stmt 1 view -0 + 767 .cfi_startproc + 768 @ args = 0, pretend = 0, frame = 0 + 769 @ frame_needed = 0, uses_anonymous_args = 0 + 770 @ link register save eliminated. + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 771 .loc 1 418 3 view .LVU272 + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState)); + 772 .loc 1 419 3 view .LVU273 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (PinState != GPIO_PIN_RESET) + 773 .loc 1 421 3 view .LVU274 + 774 .loc 1 421 6 is_stmt 0 view .LVU275 + 775 0000 002A cmp r2, #0 + 776 0002 01D0 beq .L44 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin; + 777 .loc 1 423 5 is_stmt 1 view .LVU276 + 778 .loc 1 423 17 is_stmt 0 view .LVU277 + ARM GAS /tmp/ccgN8YUn.s page 24 + + + 779 0004 8161 str r1, [r0, #24] + 780 .L43: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BRR = (uint32_t)GPIO_Pin; + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 781 .loc 1 429 1 view .LVU278 + 782 @ sp needed + 783 0006 7047 bx lr + 784 .L44: + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 785 .loc 1 427 5 is_stmt 1 view .LVU279 + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 786 .loc 1 427 16 is_stmt 0 view .LVU280 + 787 0008 8162 str r1, [r0, #40] + 788 .loc 1 429 1 view .LVU281 + 789 000a FCE7 b .L43 + 790 .cfi_endproc + 791 .LFE43: + 793 .section .text.HAL_GPIO_TogglePin,"ax",%progbits + 794 .align 1 + 795 .global HAL_GPIO_TogglePin + 796 .syntax unified + 797 .code 16 + 798 .thumb_func + 800 HAL_GPIO_TogglePin: + 801 .LVL66: + 802 .LFB44: + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Toggle the specified GPIO pin. + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the pin to be toggled. + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 803 .loc 1 438 1 is_stmt 1 view -0 + 804 .cfi_startproc + 805 @ args = 0, pretend = 0, frame = 0 + 806 @ frame_needed = 0, uses_anonymous_args = 0 + 807 @ link register save eliminated. + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t odr; + 808 .loc 1 439 3 view .LVU283 + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 809 .loc 1 442 3 view .LVU284 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* get current Output Data Register value */ + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** odr = GPIOx->ODR; + 810 .loc 1 445 3 view .LVU285 + 811 .loc 1 445 7 is_stmt 0 view .LVU286 + 812 0000 4269 ldr r2, [r0, #20] + 813 .LVL67: + ARM GAS /tmp/ccgN8YUn.s page 25 + + + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set selected pins that were at low level, and reset ones that were high */ + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); + 814 .loc 1 448 3 is_stmt 1 view .LVU287 + 815 .loc 1 448 23 is_stmt 0 view .LVU288 + 816 0002 1300 movs r3, r2 + 817 0004 0B40 ands r3, r1 + 818 .loc 1 448 35 view .LVU289 + 819 0006 1B04 lsls r3, r3, #16 + 820 .loc 1 448 59 view .LVU290 + 821 0008 9143 bics r1, r2 + 822 .LVL68: + 823 .loc 1 448 51 view .LVU291 + 824 000a 0B43 orrs r3, r1 + 825 .loc 1 448 15 view .LVU292 + 826 000c 8361 str r3, [r0, #24] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 827 .loc 1 449 1 view .LVU293 + 828 @ sp needed + 829 000e 7047 bx lr + 830 .cfi_endproc + 831 .LFE44: + 833 .section .text.HAL_GPIO_LockPin,"ax",%progbits + 834 .align 1 + 835 .global HAL_GPIO_LockPin + 836 .syntax unified + 837 .code 16 + 838 .thumb_func + 840 HAL_GPIO_LockPin: + 841 .LVL69: + 842 .LFB45: + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Locks GPIO Pins configuration registers. + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note The configuration of the locked GPIO pins can no longer be modified + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * until the next reset. + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bits to be locked. + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be any combination of GPIO_PIN_x where x can be (0..15). + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 843 .loc 1 463 1 is_stmt 1 view -0 + 844 .cfi_startproc + 845 @ args = 0, pretend = 0, frame = 8 + 846 @ frame_needed = 0, uses_anonymous_args = 0 + 847 @ link register save eliminated. + 848 .loc 1 463 1 is_stmt 0 view .LVU295 + 849 0000 82B0 sub sp, sp, #8 + 850 .cfi_def_cfa_offset 8 + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK; + 851 .loc 1 464 3 is_stmt 1 view .LVU296 + 852 .loc 1 464 17 is_stmt 0 view .LVU297 + 853 0002 8022 movs r2, #128 + ARM GAS /tmp/ccgN8YUn.s page 26 + + + 854 0004 5202 lsls r2, r2, #9 + 855 0006 0192 str r2, [sp, #4] + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); + 856 .loc 1 467 3 is_stmt 1 view .LVU298 + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 857 .loc 1 468 3 view .LVU299 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Apply lock key write sequence */ + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SET_BIT(tmp, GPIO_Pin); + 858 .loc 1 471 3 view .LVU300 + 859 0008 019B ldr r3, [sp, #4] + 860 000a 0B43 orrs r3, r1 + 861 000c 0193 str r3, [sp, #4] + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 862 .loc 1 473 3 view .LVU301 + 863 .loc 1 473 15 is_stmt 0 view .LVU302 + 864 000e 019B ldr r3, [sp, #4] + 865 0010 C361 str r3, [r0, #28] + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin; + 866 .loc 1 475 3 is_stmt 1 view .LVU303 + 867 .loc 1 475 15 is_stmt 0 view .LVU304 + 868 0012 C161 str r1, [r0, #28] + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 869 .loc 1 477 3 is_stmt 1 view .LVU305 + 870 .loc 1 477 15 is_stmt 0 view .LVU306 + 871 0014 019B ldr r3, [sp, #4] + 872 0016 C361 str r3, [r0, #28] + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Read LCKK register. This read is mandatory to complete key lock sequence */ + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = GPIOx->LCKR; + 873 .loc 1 479 3 is_stmt 1 view .LVU307 + 874 .loc 1 479 14 is_stmt 0 view .LVU308 + 875 0018 C369 ldr r3, [r0, #28] + 876 .loc 1 479 7 view .LVU309 + 877 001a 0193 str r3, [sp, #4] + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* read again in order to confirm lock is active */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIOx->LCKR & GPIO_LCKR_LCKK) != 0x00u) + 878 .loc 1 482 2 is_stmt 1 view .LVU310 + 879 .loc 1 482 11 is_stmt 0 view .LVU311 + 880 001c C369 ldr r3, [r0, #28] + 881 .loc 1 482 4 view .LVU312 + 882 001e 1342 tst r3, r2 + 883 0020 02D0 beq .L49 + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return HAL_OK; + 884 .loc 1 484 12 view .LVU313 + 885 0022 0020 movs r0, #0 + 886 .LVL70: + 887 .L48: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + ARM GAS /tmp/ccgN8YUn.s page 27 + + + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return HAL_ERROR; + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 888 .loc 1 490 1 view .LVU314 + 889 0024 02B0 add sp, sp, #8 + 890 @ sp needed + 891 0026 7047 bx lr + 892 .LVL71: + 893 .L49: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 894 .loc 1 488 12 view .LVU315 + 895 0028 0120 movs r0, #1 + 896 .LVL72: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 897 .loc 1 488 12 view .LVU316 + 898 002a FBE7 b .L48 + 899 .cfi_endproc + 900 .LFE45: + 902 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits + 903 .align 1 + 904 .weak HAL_GPIO_EXTI_Callback + 905 .syntax unified + 906 .code 16 + 907 .thumb_func + 909 HAL_GPIO_EXTI_Callback: + 910 .LVL73: + 911 .LFB47: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Handle EXTI interrupt request. + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u) + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief EXTI line detection callback. + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 912 .loc 1 513 1 is_stmt 1 view -0 + 913 .cfi_startproc + 914 @ args = 0, pretend = 0, frame = 0 + 915 @ frame_needed = 0, uses_anonymous_args = 0 + 916 @ link register save eliminated. + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */ + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** UNUSED(GPIO_Pin); + ARM GAS /tmp/ccgN8YUn.s page 28 + + + 917 .loc 1 515 3 view .LVU318 + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* NOTE: This function should not be modified, when the callback is needed, + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 918 .loc 1 520 1 is_stmt 0 view .LVU319 + 919 @ sp needed + 920 0000 7047 bx lr + 921 .cfi_endproc + 922 .LFE47: + 924 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits + 925 .align 1 + 926 .global HAL_GPIO_EXTI_IRQHandler + 927 .syntax unified + 928 .code 16 + 929 .thumb_func + 931 HAL_GPIO_EXTI_IRQHandler: + 932 .LVL74: + 933 .LFB46: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 934 .loc 1 498 1 is_stmt 1 view -0 + 935 .cfi_startproc + 936 @ args = 0, pretend = 0, frame = 0 + 937 @ frame_needed = 0, uses_anonymous_args = 0 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 938 .loc 1 498 1 is_stmt 0 view .LVU321 + 939 0000 10B5 push {r4, lr} + 940 .cfi_def_cfa_offset 8 + 941 .cfi_offset 4, -8 + 942 .cfi_offset 14, -4 + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 943 .loc 1 500 3 is_stmt 1 view .LVU322 + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 944 .loc 1 500 6 is_stmt 0 view .LVU323 + 945 0002 054B ldr r3, .L54 + 946 0004 5B69 ldr r3, [r3, #20] + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 947 .loc 1 500 5 view .LVU324 + 948 0006 1842 tst r0, r3 + 949 0008 00D1 bne .L53 + 950 .LVL75: + 951 .L51: + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 952 .loc 1 505 1 view .LVU325 + 953 @ sp needed + 954 000a 10BD pop {r4, pc} + 955 .LVL76: + 956 .L53: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 957 .loc 1 502 5 is_stmt 1 view .LVU326 + 958 000c 024B ldr r3, .L54 + 959 000e 5861 str r0, [r3, #20] + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 960 .loc 1 503 5 view .LVU327 + 961 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback + 962 .LVL77: + ARM GAS /tmp/ccgN8YUn.s page 29 + + + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 963 .loc 1 505 1 is_stmt 0 view .LVU328 + 964 0014 F9E7 b .L51 + 965 .L55: + 966 0016 C046 .align 2 + 967 .L54: + 968 0018 00040140 .word 1073808384 + 969 .cfi_endproc + 970 .LFE46: + 972 .text + 973 .Letext0: + 974 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 975 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 976 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 977 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 978 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + ARM GAS /tmp/ccgN8YUn.s page 30 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_gpio.c + /tmp/ccgN8YUn.s:19 .text.HAL_GPIO_Init:00000000 $t + /tmp/ccgN8YUn.s:25 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init + /tmp/ccgN8YUn.s:467 .text.HAL_GPIO_Init:00000168 $d + /tmp/ccgN8YUn.s:476 .text.HAL_GPIO_DeInit:00000000 $t + /tmp/ccgN8YUn.s:482 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit + /tmp/ccgN8YUn.s:708 .text.HAL_GPIO_DeInit:000000d4 $d + /tmp/ccgN8YUn.s:716 .text.HAL_GPIO_ReadPin:00000000 $t + /tmp/ccgN8YUn.s:722 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin + /tmp/ccgN8YUn.s:757 .text.HAL_GPIO_WritePin:00000000 $t + /tmp/ccgN8YUn.s:763 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin + /tmp/ccgN8YUn.s:794 .text.HAL_GPIO_TogglePin:00000000 $t + /tmp/ccgN8YUn.s:800 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin + /tmp/ccgN8YUn.s:834 .text.HAL_GPIO_LockPin:00000000 $t + /tmp/ccgN8YUn.s:840 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin + /tmp/ccgN8YUn.s:903 .text.HAL_GPIO_EXTI_Callback:00000000 $t + /tmp/ccgN8YUn.s:909 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback + /tmp/ccgN8YUn.s:925 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t + /tmp/ccgN8YUn.s:931 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+ Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.lst new file mode 100644 index 0000000..31301dd --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.lst @@ -0,0 +1,30078 @@ +ARM GAS /tmp/cc4IUqI9.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_i2c.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c" + 18 .section .text.I2C_Flush_TXDR,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 I2C_Flush_TXDR: + 25 .LVL0: + 26 .LFB105: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @file stm32f0xx_hal_i2c.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * functionalities of the Inter Integrated Circuit (I2C) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + Peripheral State and Errors functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @attention + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * All rights reserved. + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in the root directory of this software component. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================================================== + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### How to use this driver ##### + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================================================== + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The I2C HAL driver can be used as follows: + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Declare a I2C_HandleTypeDef handle structure, for example: + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef hi2c; + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) Enable the I2Cx interface clock + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) I2C pins configuration + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the clock for the I2C GPIOs + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure I2C pins as alternate function open-drain + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) NVIC configuration if you need to use interrupt process + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the I2Cx interrupt priority + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the NVIC I2C IRQ Channel + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) DMA Configuration if you need to use DMA process + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Declare a DMA_HandleTypeDef handle structure for + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the transmit or receive channel + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the DMAx interface clock using + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the DMA handle parameters + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the DMA Tx or Rx channel + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the DMA Tx or Rx channel + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addres + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level H + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceRead + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Polling mode IO operation *** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================= + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit( + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Polling mode IO MEM operation *** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ===================================== + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_W + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode IO operation *** + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =================================== + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Trans + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receiv + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmi + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + ARM GAS /tmp/cc4IUqI9.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Ab + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode or DMA mode IO sequential operation *** + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ========================================================== + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (@) These interfaces allow to manage a sequential transfer with a repeated start condition + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** when a direction change during transfer + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) A specific option field manage the different steps of a sequential transfer + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Option field values are defined through I2C_XFEROPTIONS and are listed below: + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfac + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** no sequential mode + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start con + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and data to transfer without a final stop condition + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** start condition, address and data to transfer without a final stop cond + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** an then permit a call the same master sequential interface several time + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (like HAL_I2C_Master_Seq_Transmit_IT() then HAL_I2C_Master_Seq_Transmit + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA() then HAL_I2C_Master_Seq_Transmit_D + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transfer + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if no direction change and without a final stop condition in both cases + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transfer + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if no direction change and with a final stop condition in both cases + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a re + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** after several call of the same master sequential interface several time + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (link with option I2C_FIRST_AND_NEXT_FRAME). + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Usage can, transfer several bytes one by one using + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** with option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Receive sequence permit to call the opposite interface Receive or Tra + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** without stopping the communication and so generate a restart conditio + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart c + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** each call of the same master sequential + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** interface. + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Usage can, transfer several bytes one by one with a restart with slave + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** each bytes using + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** with option I2C_FIRST_FRAME then I2C_OTHER_FRAME. + ARM GAS /tmp/cc4IUqI9.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** generation of STOP condition. + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Different sequential I2C interfaces are listed below: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT() or using HAL_I2C_Master_Seq_Transmit_DMA() + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is execut + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** users can add their own code by customization of function pointer HAL_I2C_MasterTxCpltC + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA() + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Abort a master or memory IT or DMA I2C process communication with Interrupt using HAL_I2 + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_DisableListen_IT() + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and users can + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code to check the Address Match Code and the transmission direction reques + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (Write/Read). + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and users can + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ListenCpltCallback() + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Slave_Seq_Transmit_IT() or using HAL_I2C_Slave_Seq_Transmit_DMA() + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is execute + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** users can add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCa + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Slave_Seq_Receive_IT() or using HAL_I2C_Slave_Seq_Receive_DMA() + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed a + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode IO MEM operation *** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ======================================= + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Mem_Write_IT() + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Mem_Read_IT() + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** DMA mode IO operation *** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================== + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Transmit_DMA() + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode (DMA) using + ARM GAS /tmp/cc4IUqI9.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Receive_DMA() + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Slave_Transmit_DMA() + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Slave_Receive_DMA() + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Ab + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** DMA mode IO MEM operation *** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================= + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Mem_Write_DMA() + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Mem_Read_DMA() + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** I2C HAL driver macros list *** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================== + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Below the list of most used macros in I2C HAL driver. + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE: Enable the I2C peripheral + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE: Disable the I2C peripheral + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Callback registration *** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================= + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1 + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** allows the user to configure dynamically the driver callbacks. + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Use Functions HAL_I2C_RegisterCallback() or HAL_I2C_RegisterAddrCallback() + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to register an interrupt callback. + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Function HAL_I2C_RegisterCallback() allows to register following callbacks: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + ARM GAS /tmp/cc4IUqI9.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and a pointer to the user callback function. + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** For specific callback AddrCallback use dedicated register callbacks : HAL_I2C_RegisterAddrCall + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Use function HAL_I2C_UnRegisterCallback to reset a callback to the default + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** weak function. + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle, + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and the Callback ID. + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This function allows to reset following callbacks: + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** For callback AddrCallback use dedicated register callbacks : HAL_I2C_UnRegisterAddrCallback(). + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** By default, after the HAL_I2C_Init() and when the state is HAL_I2C_STATE_RESET + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** all callbacks are set to the corresponding weak functions: + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** examples HAL_I2C_MasterTxCpltCallback(), HAL_I2C_MasterRxCpltCallback(). + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Exception done for MspInit and MspDeInit functions that are + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** reset to the legacy weak functions in the HAL_I2C_Init()/ HAL_I2C_DeInit() only when + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** these callbacks are null (not registered beforehand). + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** If MspInit or MspDeInit are not null, the HAL_I2C_Init()/ HAL_I2C_DeInit() + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only. + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state, + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then, the user first registers the MspInit/MspDeInit user callbacks + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** using HAL_I2C_RegisterCallback() before calling HAL_I2C_DeInit() + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Init() function. + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** not defined, the callback registration feature is not available and all callbacks + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** are set to the corresponding weak functions. + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (@) You can refer to the I2C HAL driver header file for more useful macros + ARM GAS /tmp/cc4IUqI9.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Includes ------------------------------------------------------------------*/ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #include "stm32f0xx_hal.h" + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @addtogroup STM32F0xx_HAL_Driver + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C I2C + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C HAL module driver + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #ifdef HAL_I2C_MODULE_ENABLED + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private typedef -----------------------------------------------------------*/ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define ------------------------------------------------------------*/ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Private_Define I2C Private Define + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */ + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */ + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */ + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TC (25U) /*!< 25 ms */ + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */ + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define MAX_NBYTE_SIZE 255U + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define SLAVE_ADDR_SHIFT 7U + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define SLAVE_ADDR_MSK 0x06U + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define for @ref PreviousState usage */ + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | \ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_STATE_BUSY_RX) & \ + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Mask State define, keep only RX and TX bits */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Default Value */ + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MASTER)) + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Master Busy TX, combinaison of State LSB and Mode enum */ + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MASTER)) + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Master Busy RX, combinaison of State LSB and Mode enum */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) + ARM GAS /tmp/cc4IUqI9.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Slave Busy RX, combinaison of State LSB and Mode enum */ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MEM)) + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Memory Busy TX, combinaison of State LSB and Mode enum */ + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MEM)) + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Memory Busy RX, combinaison of State LSB and Mode enum */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define to centralize the enable/disable of Interrupts */ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_TX_IT (uint16_t)(0x0001U) /*!< Bit field can be combinated with + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref I2C_XFER_LISTEN_IT */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_RX_IT (uint16_t)(0x0002U) /*!< Bit field can be combinated with + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref I2C_XFER_LISTEN_IT */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_LISTEN_IT (uint16_t)(0x8000U) /*!< Bit field can be combinated with @ref I2 + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and @ref I2C_XFER_RX_IT */ + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_ERROR_IT (uint16_t)(0x0010U) /*!< Bit definition to manage addition of glo + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and NACK treatment */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_RELOAD_IT (uint16_t)(0x0040U) /*!< Bit definition to manage only Reload of + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define Sequential Transfer Options default/reset value */ + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_NO_OPTION_FRAME (0xFFFF0000U) + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private macros ------------------------------------------------------------*/ + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @addtogroup I2C_Private_Macro + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Macro to get remaining data to transfer on DMA side */ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) __HAL_DMA_GET_COUNTER(__HANDLE__) + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private variables ---------------------------------------------------------*/ + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function prototypes -----------------------------------------------*/ + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Private_Functions I2C Private Functions + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle DMA transfer */ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma); + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c); + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c); + ARM GAS /tmp/cc4IUqI9.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t T + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions for I2C transfer IRQ handler */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle flags during polling transfer */ + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout, uint32_t Tickstart); + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to centralize the enable/disable of Interrupts */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to treat different error callback */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c); + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to flush TXDR register */ + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c); + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to handle start, restart or stop a transfer */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Request); + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to Convert Specific options */ + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c); + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + ARM GAS /tmp/cc4IUqI9.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Exported functions --------------------------------------------------------*/ + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions I2C Exported Functions + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initialization and Configuration functions + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### Initialization and de-initialization functions ##### + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] This subsection provides a set of functions allowing to initialize and + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** deinitialize the I2Cx peripheral: + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) User must Implement HAL_I2C_MspInit() function in which he configures + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Call the function HAL_I2C_Init() to configure the selected device with + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the selected configuration: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Clock Timing + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 1 + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Addressing mode (Master, Slave) + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Dual Addressing mode + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 2 + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 2 Mask + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) General call mode + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Nostretch mode + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Call the function HAL_I2C_DeInit() to restore the default configuration + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** of the selected I2Cx peripheral. + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initializes the I2C according to the specified parameters + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in the I2C_InitTypeDef and initialize the associated handle. + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c == NULL) + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + ARM GAS /tmp/cc4IUqI9.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_RESET) + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Allocate lock resource and initialize it */ + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Lock = HAL_UNLOCKED; + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the I2C Callback settings */ + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->MspInitCallback == NULL) + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback(hi2c); + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MspInit(hi2c); + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the selected I2C peripheral */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Frequency range */ + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Own Address1 before set the Own Address1 configuration */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Own Address1 and ack own address1 mode */ + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else /* I2C_ADDRESSINGMODE_10BIT */ + ARM GAS /tmp/cc4IUqI9.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx CR2 Configuration ----------------------*/ + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Addressing Master mode */ + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear the I2C ADD10 bit */ + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Own Address2 before set the Own Address2 configuration */ + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Dual mode and Own Address2 */ + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx CR1 Configuration ----------------------*/ + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Generalcall and NoStretch mode */ + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the selected I2C peripheral */ + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_ENABLE(hi2c); + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DeInitialize the I2C peripheral. + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c == NULL) + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + ARM GAS /tmp/cc4IUqI9.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the I2C Peripheral Clock */ + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->MspDeInitCallback == NULL) + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */ + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback(hi2c); + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MspDeInit(hi2c); + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Release Lock */ + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initialize the I2C MSP. + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MspInit could be implemented in the user file + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DeInitialize the I2C MSP. + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MspDeInit could be implemented in the user file + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Register a User I2C Callback + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * To be used instead of the weak predefined callback + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note The HAL_I2C_RegisterCallback() may be called before HAL_I2C_Init() in HAL_I2C_STATE_RES + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * to register callbacks for HAL_I2C_MSPINIT_CB_ID and HAL_I2C_MSPDEINIT_CB_ID. + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param CallbackID ID of the callback to be registered + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pCallback pointer to the Callback function + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Callb + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** pI2C_CallbackTypeDef pCallback) + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (pCallback == NULL) + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = pCallback; + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = pCallback; + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = pCallback; + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + ARM GAS /tmp/cc4IUqI9.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = pCallback; + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = pCallback; + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = pCallback; + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = pCallback; + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = pCallback; + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = pCallback; + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + ARM GAS /tmp/cc4IUqI9.s page 16 + + + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Unregister an I2C Callback + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * I2C callback is redirected to the weak predefined callback + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note The HAL_I2C_UnRegisterCallback() may be called before HAL_I2C_Init() in HAL_I2C_STATE_R + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * to un-register callbacks for HAL_I2C_MSPINIT_CB_ID and HAL_I2C_MSPDEINIT_CB_ID. + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param CallbackID ID of the callback to be unregistered + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Cal + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallb + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallb + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 17 + + + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallba + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallba + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallbac + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 18 + + + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Register the Slave Address Match I2C Callback + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * To be used instead of the weak HAL_I2C_AddrCallback() predefined callback + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pCallback pointer to the Address Match Callback function + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pC + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (pCallback == NULL) + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = pCallback; + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 19 + + +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief UnRegister the Slave Address Match I2C Callback +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined cal +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c) +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */ +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Data transfers functions +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### IO operation functions ##### +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This subsection provides a set of functions allowing to manage the I2C data +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transfers. +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) There are two modes of transfer: +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Blocking mode : The communication is performed in the polling mode. +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The status of all data processing is returned by the same function +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** after finishing transfer. +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) No-Blocking mode : The communication is performed using Interrupts +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or DMA. These functions return the status of the transfer startup. +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The end of the data processing will be indicated through the +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** using DMA mode. +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Blocking mode functions are : +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit() +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive() + ARM GAS /tmp/cc4IUqI9.s page 20 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit() +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive() +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write() +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read() +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_IsDeviceReady() +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) No-Blocking mode functions with Interrupt are : +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_IT() +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_IT() +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_IT() +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_IT() +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_IT() +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_IT() +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_IT() +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_IT() +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_IT() +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_IT() +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_EnableListen_IT() +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_DisableListen_IT() +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Abort_IT() +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) No-Blocking mode functions with DMA are : +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_DMA() +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_DMA() +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_DMA() +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_DMA() +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_DMA() +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_DMA() +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_DMA() +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_DMA() +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_DMA() +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_DMA() +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MasterTxCpltCallback() +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MasterRxCpltCallback() +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_SlaveTxCpltCallback() +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_SlaveRxCpltCallback() +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MemTxCpltCallback() +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MemRxCpltCallback() +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_AddrCallback() +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_ListenCpltCallback() +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_ErrorCallback() +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_AbortCpltCallback() +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmits in master mode an amount of data in blocking mode. +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent + ARM GAS /tmp/cc4IUqI9.s page 21 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pD +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t Timeout) +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, + ARM GAS /tmp/cc4IUqI9.s page 22 + + +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ + ARM GAS /tmp/cc4IUqI9.s page 23 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receives in master mode an amount of data in blocking mode. +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pDa +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t Timeout) +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 24 + + +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set */ + ARM GAS /tmp/cc4IUqI9.s page 25 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmits in slave mode an amount of data in blocking mode. +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout) +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t tmpXferCount; +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef error; +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + ARM GAS /tmp/cc4IUqI9.s page 26 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If 10bit addressing mode is selected */ +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until DIR flag is set Transmitter mode */ + ARM GAS /tmp/cc4IUqI9.s page 27 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK) +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until AF flag is set */ +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error = I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart); +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (error != HAL_OK) +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check that I2C transfer finished */ +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean XferCount == 0 */ +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpXferCount = hi2c->XferCount; +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset ErrorCode to NONE */ +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 28 + + +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear AF flag */ +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP flag */ +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in blocking mode +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout) +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 29 + + +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until DIR flag is reset Receiver mode */ +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK) +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 30 + + +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP flag */ +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + ARM GAS /tmp/cc4IUqI9.s page 31 + + +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size) +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + ARM GAS /tmp/cc4IUqI9.s page 32 + + +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t * +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size) +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 33 + + +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + ARM GAS /tmp/cc4IUqI9.s page 34 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + ARM GAS /tmp/cc4IUqI9.s page 35 + + +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with DMA +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t + ARM GAS /tmp/cc4IUqI9.s page 36 + + +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size) +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** sizetoxfer = hi2c->XferSize; +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; + ARM GAS /tmp/cc4IUqI9.s page 37 + + +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; + ARM GAS /tmp/cc4IUqI9.s page 38 + + +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, I2C_AUTOEND_MODE, +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with DMA +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size) +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) + ARM GAS /tmp/cc4IUqI9.s page 39 + + +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/cc4IUqI9.s page 40 + + +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART * +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_ +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ + ARM GAS /tmp/cc4IUqI9.s page 41 + + +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 42 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 43 + + +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with DMA +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + ARM GAS /tmp/cc4IUqI9.s page 44 + + +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 45 + + +2484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in blocking mode to a specific memory address +2512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +2521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddre +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Ti +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + ARM GAS /tmp/cc4IUqI9.s page 46 + + +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +2558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL +2561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +2568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST +2572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +2595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 47 + + +2598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +2608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (hi2c->XferCount > 0U); +2619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +2628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Read an amount of data in blocking mode from a specific memory address +2649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address + ARM GAS /tmp/cc4IUqI9.s page 48 + + +2655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +2658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddres +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Tim +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +2695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_ +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +2709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 49 + + +2712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +2722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) +2723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +2747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, +2748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (hi2c->XferCount > 0U); +2758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +2767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 50 + + +2769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory addres +2787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 0U; +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; + ARM GAS /tmp/cc4IUqI9.s page 51 + + +2826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; +2829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address */ +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +2838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_W +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory addre +2875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent + ARM GAS /tmp/cc4IUqI9.s page 52 + + +2883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAdd +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; +2916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address */ +2922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +2925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_ +2938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/cc4IUqI9.s page 53 + + +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemA +2973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; + ARM GAS /tmp/cc4IUqI9.s page 54 + + +2997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; +3005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +3006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +3017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +3018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address */ +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +3021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +3024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +3029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +3030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +3033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +3042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +3049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ + ARM GAS /tmp/cc4IUqI9.s page 55 + + +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START +3070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value + ARM GAS /tmp/cc4IUqI9.s page 56 + + +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be read +3116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +3119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +3144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; +3151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +3152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +3164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address */ +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +3167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 57 + + +3168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +3170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +3176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +3178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +3179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +3185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +3196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_STAR +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ + ARM GAS /tmp/cc4IUqI9.s page 58 + + +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Checks if target device is ready for communication. +3254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This function is used with Memory devices +3255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Trials Number of trials +3260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +3261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Tria +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout) +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +3267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __IO uint32_t I2C_Trials = 0UL; +3269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp1; +3271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp2; +3272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + ARM GAS /tmp/cc4IUqI9.s page 59 + + +3282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; +3284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +3287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Start */ +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress); +3290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +3292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set or a NACK flag is set*/ +3293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +3294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while ((tmp1 == RESET) && (tmp2 == RESET)) +3299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +3301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) +3303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if the NACKF flag has not been set */ +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Device is ready */ +3334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 60 + + +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag, auto generated with autoend*/ +3353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Trials */ +3357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Trials++; +3358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (I2C_Trials < Trials); +3359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Inte +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; +3395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 61 + + +3396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ +3427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +3432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +3435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** sizetoxfer = hi2c->XferSize; +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +3439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do not generate Restart Condition */ +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); + ARM GAS /tmp/cc4IUqI9.s page 62 + + +3453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) +3463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); +3465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA. +3493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uin +3504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; +3508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + ARM GAS /tmp/cc4IUqI9.s page 63 + + +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ +3542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) +3543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +3549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** sizetoxfer = hi2c->XferSize; +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +3554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do not generate Restart Condition */ +3558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ +3560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ + ARM GAS /tmp/cc4IUqI9.s page 64 + + +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +3585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +3588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +3589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); +3593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) +3613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 65 + + +3624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +3635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +3657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +3658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) +3659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; + ARM GAS /tmp/cc4IUqI9.s page 66 + + +3681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Inter +3690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8 +3701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do not generate Restart Condition */ + ARM GAS /tmp/cc4IUqI9.s page 67 + + +3738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ +3740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +3766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with DMA +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + ARM GAS /tmp/cc4IUqI9.s page 68 + + +3795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do not generate Restart Condition */ +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +3850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ + ARM GAS /tmp/cc4IUqI9.s page 69 + + +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +3860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +3861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 70 + + +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +3918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +3920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t XferOptions) +3955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp; +3958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 71 + + +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +3972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +3979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +3982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +3985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +3987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +3993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +3996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +3999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +4005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +4014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) +4020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ + ARM GAS /tmp/cc4IUqI9.s page 72 + + +4023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t +4054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t XferOptions) +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp; +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +4059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +4076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +4079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) + ARM GAS /tmp/cc4IUqI9.s page 73 + + +4080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +4082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +4083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +4085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +4090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +4094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +4096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +4097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +4100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; + ARM GAS /tmp/cc4IUqI9.s page 74 + + +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +4141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +4160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset XferSize */ +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 0; +4183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +4192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/cc4IUqI9.s page 75 + + +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +4212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +4233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Si +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t XferOptions) +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp; +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +4244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; + ARM GAS /tmp/cc4IUqI9.s page 76 + + +4251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) +4304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); + ARM GAS /tmp/cc4IUqI9.s page 77 + + +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +4334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +4338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t XferOptions) +4339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp; +4342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +4363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 78 + + +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +4366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +4391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +4403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +4406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 79 + + +4422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +4425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +4433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +4436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +4440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, +4443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); +4444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset XferSize */ +4466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 0; +4467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +4476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/cc4IUqI9.s page 80 + + +4479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) +4485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +4496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Enable the Address listen mode with Interrupt. +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) +4518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +4520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the Address Match interrupt */ +4525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +4532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + ARM GAS /tmp/cc4IUqI9.s page 81 + + +4536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Disable the Address listen mode with Interrupt. +4537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C +4539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp; +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address listen mode only if a transfer is not ongoing */ +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +4548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +4554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the Address Match interrupt */ +4556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +4563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Abort a master or memory I2C IT or DMA process communication with Interrupt. +4568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +4571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; +4577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmp_mode == HAL_I2C_MODE_MASTER) || (tmp_mode == HAL_I2C_MODE_MEM)) +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +4584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +4585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +4588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +4592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + ARM GAS /tmp/cc4IUqI9.s page 82 + + +4593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set State at HAL_I2C_STATE_ABORT */ +4600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_ABORT; +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */ +4603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfe +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP); +4605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +4613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong usage of abort function */ +4619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This function should be used only in case of abort monitored by master device */ +4620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks +4629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C event interrupt request. +4634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) /* Derogation MISRAC2012-Rule-8.13 */ +4639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C events treatment -------------------------------------*/ +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferISR != NULL) +4646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR(hi2c, itflags, itsources); +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 83 + + +4650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C error interrupt request. +4653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Bus error interrupt occurred ------------------------------------*/ +4664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ +4665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; +4668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear BERR flag */ +4670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +4671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ +4674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ +4675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; +4678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear OVR flag */ +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ +4685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; +4688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ARLO flag */ +4690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +4691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +4694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +4695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Error Callback in case of Error detected */ +4697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_ +4698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, tmperror); +4700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master Tx Transfer completed callback. +4705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + ARM GAS /tmp/cc4IUqI9.s page 84 + + +4707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) +4710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MasterTxCpltCallback could be implemented in the user file +4716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master Rx Transfer completed callback. +4721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MasterRxCpltCallback could be implemented in the user file +4732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @brief Slave Tx Transfer completed callback. +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file +4747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Slave Rx Transfer completed callback. +4752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) +4757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file +4763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + ARM GAS /tmp/cc4IUqI9.s page 85 + + +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Slave Address Match callback. +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFE +4771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param AddrMatchCode Address Match Code +4772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrM +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(TransferDirection); +4779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(AddrMatchCode); +4780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_AddrCallback() could be implemented in the user file +4783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Listen Complete callback. +4788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) +4793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_ListenCpltCallback() could be implemented in the user file +4799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Memory Tx Transfer completed callback. +4804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) +4809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MemTxCpltCallback could be implemented in the user file +4815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Memory Rx Transfer completed callback. +4820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + ARM GAS /tmp/cc4IUqI9.s page 86 + + +4821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MemRxCpltCallback could be implemented in the user file +4831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C error callback. +4836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) +4841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_ErrorCallback could be implemented in the user file +4847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C abort callback. +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_AbortCpltCallback could be implemented in the user file +4863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Peripheral State, Mode and Error functions +4872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +4875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### Peripheral State, Mode and Error functions ##### +4876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +4877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + ARM GAS /tmp/cc4IUqI9.s page 87 + + +4878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This subsection permit to get in run-time the status of the peripheral +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and the data flow. +4880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim +4882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Return the I2C handle state. +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL state +4890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c) +4892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return I2C handle state */ +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->State; +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Returns the I2C Master, Slave, Memory or no mode. +4899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for I2C module +4901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL mode +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c) +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->Mode; +4906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Return the I2C error code. +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval I2C Error Code +4913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c) +4915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->ErrorCode; +4917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @addtogroup I2C_Private_Functions +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. +4933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + ARM GAS /tmp/cc4IUqI9.s page 88 + + +4935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +4941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +4944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +4949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +4952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +4955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +4956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +4958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +4963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +4966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +4967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +4970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) == RESET) && \ +4978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))) +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + ARM GAS /tmp/cc4IUqI9.s page 89 + + +4992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ +4995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +4996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +4998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Errata workaround 170323 */ +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +5007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START +5013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, +5020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, +5025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +5032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ +5046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) + ARM GAS /tmp/cc4IUqI9.s page 90 + + +5049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +5054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +5057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +5068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Memory Mode with Interrupt. +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; +5102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + ARM GAS /tmp/cc4IUqI9.s page 91 + + +5106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +5108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +5122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +5125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +5126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +5129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +5137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Memaddress == 0xFFFFFFFFU) +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +5143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write LSB part of Memory Address */ +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = hi2c->Memaddress; +5154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +5156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ +5160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) + ARM GAS /tmp/cc4IUqI9.s page 92 + + +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Errata workaround 170323 */ +5167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +5170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ +5193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupt related to address step */ +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** direction = I2C_GENERATE_START_READ; +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Errata workaround 170323 */ +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + ARM GAS /tmp/cc4IUqI9.s page 93 + + +5220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate RESTART */ +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); +5229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +5241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt. +5251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if STOPF is set */ +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave complete process */ +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, tmpITFlags); +5272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +5274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check that I2C transfer finished */ + ARM GAS /tmp/cc4IUqI9.s page 94 + + +5277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +5278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean XferCount == 0*/ +5279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So clear Flag NACKF only */ +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +5283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +5284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +5285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME) +5290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +5310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +5325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 95 + + +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount == 0U) && \ +5339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +5340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, tmpITFlags); +5349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +5351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR only if XferCount not reach "0" */ +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* A TXIS flag can be set, during STOP treatment */ +5355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if all Data have already been sent */ +5356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +5361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. + ARM GAS /tmp/cc4IUqI9.s page 96 + + +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; +5401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +5402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +5417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ +5424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC interrupt */ +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Recover Slave address */ +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +5435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Errata workaround 170323 */ +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 97 + + +5448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +5452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +5454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +5458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the new XferSize in Nbytes register */ +5462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); +5463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +5480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ +5494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +5501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; + ARM GAS /tmp/cc4IUqI9.s page 98 + + +5505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +5516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Memory Mode with DMA. +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 99 + + +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TXIS) != RESET) && \ +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write LSB part of Memory Address */ +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = hi2c->Memaddress; +5575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +5578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ +5580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupt related to address step */ +5583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable only Error interrupt */ +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +5587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Errata workaround 170323 */ +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +5597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); +5604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +5616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; + ARM GAS /tmp/cc4IUqI9.s page 100 + + +5619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ +5633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupt related to address step */ +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable only Error and NACK interrupt for data transfer */ +5639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +5640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** direction = I2C_GENERATE_START_READ; +5644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Errata workaround 170323 */ +5649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +5652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); +5661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate RESTART */ +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); +5669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +5675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) + ARM GAS /tmp/cc4IUqI9.s page 101 + + +5676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +5688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +5689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA. +5703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t treatdmanack = 0U; +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; +5715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if STOPF is set */ +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave complete process */ +5724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, ITFlags); +5725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check that I2C transfer finished */ +5730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +5731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean XferCount == 0 */ +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So clear Flag NACKF only */ + ARM GAS /tmp/cc4IUqI9.s page 102 + + +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || +5734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Split check of hdmarx, for MISRA compliance */ +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +5738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET) +5740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) +5742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** treatdmanack = 1U; +5744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Split check of hdmatx, for MISRA compliance */ +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +5750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) +5752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx) == 0U) +5754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** treatdmanack = 1U; +5756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (treatdmanack == 1U) +5761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +5763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +5764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +5765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, ITFlags); +5768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAM +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ + ARM GAS /tmp/cc4IUqI9.s page 103 + + +5790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store current hi2c->State, solve MISRA2012-Rule-13.5 */ +5797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpstate = hi2c->State; +5798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) +5802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +5804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN +5806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +5808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +5812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Only Clear NACK Flag, no DMA treatment is pending */ +5822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && \ +5826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) +5827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, ITFlags); +5829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for write reques +5843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface + ARM GAS /tmp/cc4IUqI9.s page 104 + + +5847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +5848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +5850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +5851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, +5854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t +5855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +5856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI +5858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Memory Address */ +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) +5889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for read request +5898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +5902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +5903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address + ARM GAS /tmp/cc4IUqI9.s page 105 + + +5904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +5905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +5906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, +5909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t T +5910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +5911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR +5913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Memory Address */ +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TC flag is set */ +5943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) +5944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Address complete process callback. +5953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint8_t transferdirection; +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t slaveaddrcode; + ARM GAS /tmp/cc4IUqI9.s page 106 + + +5961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd1code; +5962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd2code; +5963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +5965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(ITFlags); +5966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* In case of Listen state, need to inform upper layer of address match code event */ +5968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +5969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transferdirection = I2C_GET_DIR(hi2c); +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); +5974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If 10bits addressing mode is selected */ +5976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +5977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK)) +5979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = ownadd1code; +5981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrEventCount++; +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) +5983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Address Event counter */ +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrEventCount = 0U; +5986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +5988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +5989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +5994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = ownadd2code; +6004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +6006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +6007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +6012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +6014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +6016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 107 + + +6018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else 7 bits addressing mode is selected */ +6020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +6024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +6029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +6031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +6033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Else clear address flag only */ +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +6041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Master sequential complete process. +6049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c) +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ +6055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No Generate Stop, to permit restart mode */ +6058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +6060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +6063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +6066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +6067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +6074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else + ARM GAS /tmp/cc4IUqI9.s page 108 + + +6075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +6076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +6079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +6086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +6087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +6094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +6096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Slave sequential complete process. +6102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c) +6106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +6108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ +6110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +6113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +6114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +6119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +6129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; + ARM GAS /tmp/cc4IUqI9.s page 109 + + +6132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +6133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +6135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +6136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +6143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +6145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +6149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */ +6151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +6152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +6153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +6155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +6156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +6163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +6165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +6170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Master complete process. +6175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; +6182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +6183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __IO uint32_t tmpreg; +6184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ + ARM GAS /tmp/cc4IUqI9.s page 110 + + +6189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +6190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +6192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +6193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +6197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +6198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +6202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +6208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) +6212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +6214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set acknowledge error code */ +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Fetch Last receive data if any */ +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) && (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET)) +6222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpreg = (uint8_t)hi2c->Instance->RXDR; +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); +6226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +6229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +6233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE)) +6236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_TX */ +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +6242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 111 + + +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +6247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback(hi2c); +6256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MemTxCpltCallback(hi2c); +6258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +6270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +6272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +6282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback(hi2c); +6291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MemRxCpltCallback(hi2c); +6293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ + ARM GAS /tmp/cc4IUqI9.s page 112 + + +6303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +6305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +6307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +6313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Slave complete process. +6318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +6325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +6328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) +6334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +6337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +6339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +6342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (tmpstate == HAL_I2C_STATE_LISTEN) +6344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +6351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ + ARM GAS /tmp/cc4IUqI9.s page 113 + + +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +6364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +6369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx); +6371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +6374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +6379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx); +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) +6390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +6392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +6393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +6396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +6399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +6401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +6404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* All data are not transferred, so set error code accordingly */ +6408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +6409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +6415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 114 + + +6417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check that I2C transfer finished */ +6418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +6419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean XferCount == 0*/ +6420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So clear Flag NACKF only */ +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +6424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +6426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME) +6431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +6436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +6439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +6445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +6451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +6452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +6458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ + ARM GAS /tmp/cc4IUqI9.s page 115 + + +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +6475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +6478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +6481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Sequential Complete callback, to inform upper layer of the end of Transfer */ +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +6495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +6497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +6511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +6513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +6526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +6528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 116 + + +6531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Listen complete process. +6534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +6541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +6548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET) +6549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +6552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +6554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +6557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +6560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all Interrupts*/ +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +6570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +6580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C interrupts error process. +6585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ErrorCode Error code to handle. +6587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + ARM GAS /tmp/cc4IUqI9.s page 117 + + +6588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) +6590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +6592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmppreviousstate; +6594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +6596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = 0U; +6599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set new error code */ +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= ErrorCode; +6602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +6604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_LISTEN) || +6605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || +6606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +6607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all interrupts, except interrupts related to LISTEN state */ +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* keep HAL_I2C_STATE_LISTEN if set */ +6612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +6614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all interrupts */ +6618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +6621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If state is an abort treatment on going, don't change state */ +6624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This change will be do later */ +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State != HAL_I2C_STATE_ABORT) +6626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set HAL_I2C_STATE_READY */ +6628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a STOPF is detected */ +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) +6632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +6634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + ARM GAS /tmp/cc4IUqI9.s page 118 + + +6645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX transfer if any */ +6648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmppreviousstate = hi2c->PreviousState; +6649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->hdmatx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_TX) || \ +6651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) +6652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +6654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) +6659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +6662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +6663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +6668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +6669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +6671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +6672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX transfer if any */ +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->hdmarx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_RX) || \ +6681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) +6682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) +6689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +6691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +6692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +6693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +6698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +6699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ +6701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); + ARM GAS /tmp/cc4IUqI9.s page 119 + + +6702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Error callback treatment. +6717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c) +6721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) +6723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback(hi2c); +6733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AbortCpltCallback(hi2c); +6735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback(hi2c); +6747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ErrorCallback(hi2c); +6749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Tx data register flush process. +6755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) + ARM GAS /tmp/cc4IUqI9.s page 120 + + +6759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 27 .loc 1 6759 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. +6760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If a pending TXIS flag is set */ +6761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write a dummy data in TXDR to clear it */ +6762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) + 32 .loc 1 6762 3 view .LVU1 + 33 .loc 1 6762 7 is_stmt 0 view .LVU2 + 34 0000 0268 ldr r2, [r0] + 35 0002 9369 ldr r3, [r2, #24] + 36 .loc 1 6762 6 view .LVU3 + 37 0004 9B07 lsls r3, r3, #30 + 38 0006 01D5 bpl .L2 +6763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = 0x00U; + 39 .loc 1 6764 5 is_stmt 1 view .LVU4 + 40 .loc 1 6764 26 is_stmt 0 view .LVU5 + 41 0008 0023 movs r3, #0 + 42 000a 9362 str r3, [r2, #40] + 43 .L2: +6765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register if not empty */ +6768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) + 44 .loc 1 6768 3 is_stmt 1 view .LVU6 + 45 .loc 1 6768 7 is_stmt 0 view .LVU7 + 46 000c 0368 ldr r3, [r0] + 47 000e 9A69 ldr r2, [r3, #24] + 48 .loc 1 6768 6 view .LVU8 + 49 0010 D207 lsls r2, r2, #31 + 50 0012 03D4 bmi .L1 +6769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); + 51 .loc 1 6770 5 is_stmt 1 view .LVU9 + 52 0014 9A69 ldr r2, [r3, #24] + 53 0016 0121 movs r1, #1 + 54 0018 0A43 orrs r2, r1 + 55 001a 9A61 str r2, [r3, #24] + 56 .L1: +6771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 57 .loc 1 6772 1 is_stmt 0 view .LVU10 + 58 @ sp needed + 59 001c 7047 bx lr + 60 .cfi_endproc + 61 .LFE105: + 63 .section .text.I2C_TransferConfig,"ax",%progbits + 64 .align 1 + 65 .syntax unified + 66 .code 16 + 67 .thumb_func + 69 I2C_TransferConfig: + 70 .LVL1: + 71 .LFB117: + ARM GAS /tmp/cc4IUqI9.s page 121 + + +6773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C master transmit process complete callback. +6776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) +6780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupt */ +6791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +6794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Buffer pointer */ +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +6798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the XferSize to transfer */ +6800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +6801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +6807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) +6812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +6819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C slave transmit process complete callback. +6827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + ARM GAS /tmp/cc4IUqI9.s page 122 + + +6830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +6837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +6842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C master receive process complete callback. +6856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) +6860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +6868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupt */ +6871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +6872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +6874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Buffer pointer */ +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +6878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the XferSize to transfer */ +6880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +6881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Errata workaround 170323 */ +6883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +6884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 1U; +6886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 123 + + +6887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +6890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +6895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, +6899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) +6900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +6907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +6908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C slave receive process complete callback. +6915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) +6919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) && \ +6925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +6926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C communication error callback. + ARM GAS /tmp/cc4IUqI9.s page 124 + + +6944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma) +6948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Acknowledge */ +6953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C communication abort callback +6962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * (To be called at end of DMA Abort procedure). +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle. +6964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset AbortCpltCallback */ +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +6973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +6975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +6977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +6979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout. It waits +6987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * until a flag is no longer in the specified status. +6988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Flag Specifies the I2C flag to check. +6991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Status The actual Flag status (SET or RESET). +6992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta +6997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout, uint32_t Tickstart) +6998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) +7000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 125 + + +7001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an error is detected */ +7002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +7003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +7005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +7008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +7009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +7011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) +7013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +7015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +7019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +7021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +7026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. +7030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +7032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +7033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +7034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +7035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +7037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) +7040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an error is detected */ +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +7043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +7045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +7048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +7049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +7051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) +7053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +7055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 126 + + +7058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +7059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +7062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +7067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. +7071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +7073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +7074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +7075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +7076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +7078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +7079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +7081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an error is detected */ +7083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +7084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +7086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +7090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) +7092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +7094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +7098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +7101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +7105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. +7109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +7111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +7112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +7113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +7114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + ARM GAS /tmp/cc4IUqI9.s page 127 + + +7115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +7116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +7117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +7119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) && (status == HAL_OK)) +7121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an error is detected */ +7123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +7124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a STOPF is detected */ +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) && (status == HAL_OK)) +7130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an RXNE is pending */ +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +7133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && (hi2c->XferSize > 0U)) +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return HAL_OK */ +7136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* The Reading of data from RXDR will be done in caller function */ +7137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_OK; +7138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check a no-acknowledge have been detected */ +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +7142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +7144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; +7145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +7147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +7148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +7150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +7151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +7156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +7161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +7163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK)) +7168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) +7170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; + ARM GAS /tmp/cc4IUqI9.s page 128 + + +7172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; +7182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles errors detection during an I2C Communication. +7186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +7188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +7189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +7190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +7191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Ti +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +7195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; +7196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t error_code = 0; +7197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart = Tickstart; +7198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp1; +7199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp2; +7200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) +7202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACKF Flag */ +7204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP Flag is set or timeout occurred */ +7207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* AutoEnd should be initiate after AF */ +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) +7209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +7211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +7212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) +7214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); +7216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; +7217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* In case of I2C still busy, try to regenerate a STOP manually */ +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ +7220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ +7221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp2 != HAL_I2C_MODE_SLAVE)) +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +7225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Tick with new reference */ +7227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +7228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 129 + + +7229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +7231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +7233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) +7234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_TIMEOUT; +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; +7240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* In case STOP Flag is detected, clear it */ +7247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (status == HAL_OK) +7248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +7250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +7251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_AF; +7254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Refresh Content of Status register */ +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** itflag = hi2c->Instance->ISR; +7260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Then verify if an additional errors occurs */ +7262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a Bus error occurred */ +7263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) +7264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_BERR; +7266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear BERR flag */ +7268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +7269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an Over-Run/Under-Run error occurred */ +7274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) +7275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_OVR; +7277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear OVR flag */ +7279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +7280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an Arbitration Loss error occurred */ +7285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) + ARM GAS /tmp/cc4IUqI9.s page 130 + + +7286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_ARLO; +7288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ARLO flag */ +7290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +7291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (status != HAL_OK) +7296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +7298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +7299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +7301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +7302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= error_code; +7304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +7308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; +7312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag ar +7316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +7317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Specifies the slave address to be programmed. +7318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Specifies the number of bytes to be programmed. +7319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter must be a value between 0 and 255. +7320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Mode New state of the I2C START condition generation. +7321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: +7322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_RELOAD_MODE Enable Reload mode . +7323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. +7324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_SOFTEND_MODE Enable Software end mode. +7325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Request New state of the I2C START condition generation. +7326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: +7327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition. +7328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0). +7329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request. +7330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. +7331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +7332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t +7334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Request) +7335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 72 .loc 1 7335 1 is_stmt 1 view -0 + 73 .cfi_startproc + 74 @ args = 4, pretend = 0, frame = 0 + 75 @ frame_needed = 0, uses_anonymous_args = 0 + 76 .loc 1 7335 1 is_stmt 0 view .LVU12 + 77 0000 10B5 push {r4, lr} + 78 .cfi_def_cfa_offset 8 + ARM GAS /tmp/cc4IUqI9.s page 131 + + + 79 .cfi_offset 4, -8 + 80 .cfi_offset 14, -4 +7336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +7337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 81 .loc 1 7337 3 is_stmt 1 view .LVU13 +7338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_TRANSFER_MODE(Mode)); + 82 .loc 1 7338 3 view .LVU14 +7339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_TRANSFER_REQUEST(Request)); + 83 .loc 1 7339 3 view .LVU15 +7340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +7342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + 84 .loc 1 7342 3 view .LVU16 + 85 .loc 1 7342 52 is_stmt 0 view .LVU17 + 86 0002 8905 lsls r1, r1, #22 + 87 .LVL2: + 88 .loc 1 7342 52 view .LVU18 + 89 0004 890D lsrs r1, r1, #22 +7343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 90 .loc 1 7343 70 view .LVU19 + 91 0006 1204 lsls r2, r2, #16 + 92 .LVL3: +7342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 93 .loc 1 7342 68 view .LVU20 + 94 0008 1143 orrs r1, r2 + 95 .loc 1 7343 88 view .LVU21 + 96 000a 1943 orrs r1, r3 +7342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 97 .loc 1 7342 19 view .LVU22 + 98 000c 029B ldr r3, [sp, #8] + 99 .LVL4: +7342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 100 .loc 1 7342 19 view .LVU23 + 101 000e 1943 orrs r1, r3 +7342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 102 .loc 1 7342 12 view .LVU24 + 103 0010 4900 lsls r1, r1, #1 + 104 0012 4908 lsrs r1, r1, #1 + 105 .LVL5: +7344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); +7345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* update CR2 register */ +7347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** MODIFY_REG(hi2c->Instance->CR2, \ + 106 .loc 1 7347 3 is_stmt 1 view .LVU25 + 107 0014 0468 ldr r4, [r0] + 108 0016 6268 ldr r2, [r4, #4] + 109 0018 5B0D lsrs r3, r3, #21 + 110 001a 8020 movs r0, #128 + 111 .LVL6: + 112 .loc 1 7347 3 is_stmt 0 view .LVU26 + 113 001c C000 lsls r0, r0, #3 + 114 001e 0340 ands r3, r0 + 115 0020 0348 ldr r0, .L7 + 116 0022 0343 orrs r3, r0 + 117 0024 9A43 bics r2, r3 + 118 0026 1300 movs r3, r2 + 119 0028 0B43 orrs r3, r1 + ARM GAS /tmp/cc4IUqI9.s page 132 + + + 120 002a 6360 str r3, [r4, #4] +7348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ +7349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ +7350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_CR2_START | I2C_CR2_STOP)), tmp); +7351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 121 .loc 1 7351 1 view .LVU27 + 122 @ sp needed + 123 002c 10BD pop {r4, pc} + 124 .L8: + 125 002e C046 .align 2 + 126 .L7: + 127 0030 FF63FF03 .word 67068927 + 128 .cfi_endproc + 129 .LFE117: + 131 .section .text.I2C_Enable_IRQ,"ax",%progbits + 132 .align 1 + 133 .syntax unified + 134 .code 16 + 135 .thumb_func + 137 I2C_Enable_IRQ: + 138 .LVL7: + 139 .LFB118: +7352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Manage the enabling of Interrupts. +7355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +7357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +7358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +7359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +7361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 140 .loc 1 7361 1 is_stmt 1 view -0 + 141 .cfi_startproc + 142 @ args = 0, pretend = 0, frame = 0 + 143 @ frame_needed = 0, uses_anonymous_args = 0 + 144 @ link register save eliminated. +7362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpisr = 0U; + 145 .loc 1 7362 3 view .LVU29 +7363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferISR != I2C_Master_ISR_DMA) && \ + 146 .loc 1 7364 3 view .LVU30 + 147 .loc 1 7364 12 is_stmt 0 view .LVU31 + 148 0000 436B ldr r3, [r0, #52] + 149 .loc 1 7364 6 view .LVU32 + 150 0002 214A ldr r2, .L31 + 151 0004 9342 cmp r3, r2 + 152 0006 1DD0 beq .L10 + 153 .loc 1 7364 45 discriminator 1 view .LVU33 + 154 0008 204A ldr r2, .L31+4 + 155 000a 9342 cmp r3, r2 + 156 000c 1AD0 beq .L10 +7365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->XferISR != I2C_Slave_ISR_DMA) && \ + 157 .loc 1 7365 44 view .LVU34 + 158 000e 204A ldr r2, .L31+8 + 159 0010 9342 cmp r3, r2 + 160 0012 17D0 beq .L10 + ARM GAS /tmp/cc4IUqI9.s page 133 + + +7366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->XferISR != I2C_Mem_ISR_DMA)) +7367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 161 .loc 1 7368 5 is_stmt 1 view .LVU35 + 162 .loc 1 7368 49 is_stmt 0 view .LVU36 + 163 0014 0BB2 sxth r3, r1 + 164 .loc 1 7368 8 view .LVU37 + 165 0016 002B cmp r3, #0 + 166 0018 0FDB blt .L21 +7362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 167 .loc 1 7362 12 view .LVU38 + 168 001a 0023 movs r3, #0 + 169 .L11: + 170 .LVL8: +7369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +7371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 171 .loc 1 7374 5 is_stmt 1 view .LVU39 + 172 .loc 1 7374 8 is_stmt 0 view .LVU40 + 173 001c CA07 lsls r2, r1, #31 + 174 001e 01D5 bpl .L12 +7375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +7377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; + 175 .loc 1 7377 7 is_stmt 1 view .LVU41 + 176 .loc 1 7377 14 is_stmt 0 view .LVU42 + 177 0020 F222 movs r2, #242 + 178 0022 1343 orrs r3, r2 + 179 .LVL9: + 180 .L12: +7378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 181 .loc 1 7380 5 is_stmt 1 view .LVU43 + 182 .loc 1 7380 8 is_stmt 0 view .LVU44 + 183 0024 8A07 lsls r2, r1, #30 + 184 0026 01D5 bpl .L13 +7381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +7383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; + 185 .loc 1 7383 7 is_stmt 1 view .LVU45 + 186 .loc 1 7383 14 is_stmt 0 view .LVU46 + 187 0028 F422 movs r2, #244 + 188 002a 1343 orrs r3, r2 + 189 .LVL10: + 190 .L13: +7384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 191 .loc 1 7386 5 is_stmt 1 view .LVU47 + 192 .loc 1 7386 8 is_stmt 0 view .LVU48 + 193 002c 1029 cmp r1, #16 + 194 002e 06D0 beq .L27 + 195 .L14: + ARM GAS /tmp/cc4IUqI9.s page 134 + + +7387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 196 .loc 1 7392 5 is_stmt 1 view .LVU49 + 197 .loc 1 7392 8 is_stmt 0 view .LVU50 + 198 0030 2029 cmp r1, #32 + 199 0032 19D1 bne .L15 +7393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +7395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; + 200 .loc 1 7395 7 is_stmt 1 view .LVU51 + 201 .loc 1 7395 14 is_stmt 0 view .LVU52 + 202 0034 2022 movs r2, #32 + 203 0036 1343 orrs r3, r2 + 204 .LVL11: + 205 .loc 1 7395 14 view .LVU53 + 206 0038 16E0 b .L15 + 207 .LVL12: + 208 .L21: +7371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 209 .loc 1 7371 14 view .LVU54 + 210 003a B823 movs r3, #184 + 211 003c EEE7 b .L11 + 212 .LVL13: + 213 .L27: +7389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 214 .loc 1 7389 7 is_stmt 1 view .LVU55 +7389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 215 .loc 1 7389 14 is_stmt 0 view .LVU56 + 216 003e 9022 movs r2, #144 + 217 0040 1343 orrs r3, r2 + 218 .LVL14: +7389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 219 .loc 1 7389 14 view .LVU57 + 220 0042 F5E7 b .L14 + 221 .LVL15: + 222 .L10: +7396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +7400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 223 .loc 1 7401 5 is_stmt 1 view .LVU58 + 224 .loc 1 7401 49 is_stmt 0 view .LVU59 + 225 0044 0BB2 sxth r3, r1 + 226 .loc 1 7401 8 view .LVU60 + 227 0046 002B cmp r3, #0 + 228 0048 13DB blt .L22 +7362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 229 .loc 1 7362 12 view .LVU61 + 230 004a 0023 movs r3, #0 + 231 .L16: + 232 .LVL16: + ARM GAS /tmp/cc4IUqI9.s page 135 + + +7402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +7404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 233 .loc 1 7407 5 is_stmt 1 view .LVU62 + 234 .loc 1 7407 8 is_stmt 0 view .LVU63 + 235 004c CA07 lsls r2, r1, #31 + 236 004e 01D5 bpl .L17 +7408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +7410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; + 237 .loc 1 7410 7 is_stmt 1 view .LVU64 + 238 .loc 1 7410 14 is_stmt 0 view .LVU65 + 239 0050 F222 movs r2, #242 + 240 0052 1343 orrs r3, r2 + 241 .LVL17: + 242 .L17: +7411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 243 .loc 1 7413 5 is_stmt 1 view .LVU66 + 244 .loc 1 7413 8 is_stmt 0 view .LVU67 + 245 0054 8A07 lsls r2, r1, #30 + 246 0056 01D5 bpl .L18 +7414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +7416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; + 247 .loc 1 7416 7 is_stmt 1 view .LVU68 + 248 .loc 1 7416 14 is_stmt 0 view .LVU69 + 249 0058 F422 movs r2, #244 + 250 005a 1343 orrs r3, r2 + 251 .LVL18: + 252 .L18: +7417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 253 .loc 1 7419 5 is_stmt 1 view .LVU70 + 254 .loc 1 7419 8 is_stmt 0 view .LVU71 + 255 005c 1029 cmp r1, #16 + 256 005e 0AD0 beq .L28 + 257 .L19: +7420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 258 .loc 1 7425 5 is_stmt 1 view .LVU72 + 259 .loc 1 7425 8 is_stmt 0 view .LVU73 + 260 0060 2029 cmp r1, #32 + 261 0062 0BD0 beq .L29 + 262 .L20: +7426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +7428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI); + ARM GAS /tmp/cc4IUqI9.s page 136 + + +7429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_RELOAD_IT) + 263 .loc 1 7431 5 is_stmt 1 view .LVU74 + 264 .loc 1 7431 8 is_stmt 0 view .LVU75 + 265 0064 4029 cmp r1, #64 + 266 0066 0CD0 beq .L30 + 267 .L15: +7432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +7434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +7435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable interrupts only at the end */ +7439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* to avoid the risk of I2C interrupt handle execution before */ +7440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* all interrupts requested done */ +7441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_ENABLE_IT(hi2c, tmpisr); + 268 .loc 1 7441 3 is_stmt 1 view .LVU76 + 269 0068 0168 ldr r1, [r0] + 270 .LVL19: + 271 .loc 1 7441 3 is_stmt 0 view .LVU77 + 272 006a 0A68 ldr r2, [r1] + 273 006c 1343 orrs r3, r2 + 274 .LVL20: + 275 .loc 1 7441 3 view .LVU78 + 276 006e 0B60 str r3, [r1] +7442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 277 .loc 1 7442 1 view .LVU79 + 278 @ sp needed + 279 0070 7047 bx lr + 280 .LVL21: + 281 .L22: +7404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 282 .loc 1 7404 14 view .LVU80 + 283 0072 B823 movs r3, #184 + 284 0074 EAE7 b .L16 + 285 .LVL22: + 286 .L28: +7422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 287 .loc 1 7422 7 is_stmt 1 view .LVU81 +7422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 288 .loc 1 7422 14 is_stmt 0 view .LVU82 + 289 0076 9022 movs r2, #144 + 290 0078 1343 orrs r3, r2 + 291 .LVL23: +7422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 292 .loc 1 7422 14 view .LVU83 + 293 007a F1E7 b .L19 + 294 .L29: +7428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 295 .loc 1 7428 7 is_stmt 1 view .LVU84 +7428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 296 .loc 1 7428 14 is_stmt 0 view .LVU85 + 297 007c 6022 movs r2, #96 + 298 007e 1343 orrs r3, r2 + 299 .LVL24: + ARM GAS /tmp/cc4IUqI9.s page 137 + + +7428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 300 .loc 1 7428 14 view .LVU86 + 301 0080 F0E7 b .L20 + 302 .L30: +7434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 303 .loc 1 7434 7 is_stmt 1 view .LVU87 +7434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 304 .loc 1 7434 14 is_stmt 0 view .LVU88 + 305 0082 4022 movs r2, #64 + 306 0084 1343 orrs r3, r2 + 307 .LVL25: +7434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 308 .loc 1 7434 14 view .LVU89 + 309 0086 EFE7 b .L15 + 310 .L32: + 311 .align 2 + 312 .L31: + 313 0088 00000000 .word I2C_Master_ISR_DMA + 314 008c 00000000 .word I2C_Slave_ISR_DMA + 315 0090 00000000 .word I2C_Mem_ISR_DMA + 316 .cfi_endproc + 317 .LFE118: + 319 .section .text.I2C_Disable_IRQ,"ax",%progbits + 320 .align 1 + 321 .syntax unified + 322 .code 16 + 323 .thumb_func + 325 I2C_Disable_IRQ: + 326 .LVL26: + 327 .LFB119: +7443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Manage the disabling of Interrupts. +7446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +7448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +7449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +7450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +7452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 328 .loc 1 7452 1 is_stmt 1 view -0 + 329 .cfi_startproc + 330 @ args = 0, pretend = 0, frame = 0 + 331 @ frame_needed = 0, uses_anonymous_args = 0 + 332 .loc 1 7452 1 is_stmt 0 view .LVU91 + 333 0000 30B5 push {r4, r5, lr} + 334 .cfi_def_cfa_offset 12 + 335 .cfi_offset 4, -12 + 336 .cfi_offset 5, -8 + 337 .cfi_offset 14, -4 +7453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpisr = 0U; + 338 .loc 1 7453 3 is_stmt 1 view .LVU92 + 339 .LVL27: +7454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 340 .loc 1 7455 3 view .LVU93 + 341 .loc 1 7455 6 is_stmt 0 view .LVU94 + ARM GAS /tmp/cc4IUqI9.s page 138 + + + 342 0002 CB07 lsls r3, r1, #31 + 343 0004 09D5 bpl .L40 +7456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC and TXI interrupts */ +7458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_TXI; + 344 .loc 1 7458 5 is_stmt 1 view .LVU95 + 345 .LVL28: +7459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 346 .loc 1 7460 5 view .LVU96 + 347 .loc 1 7460 24 is_stmt 0 view .LVU97 + 348 0006 4123 movs r3, #65 + 349 0008 C35C ldrb r3, [r0, r3] + 350 .loc 1 7460 8 view .LVU98 + 351 000a 2822 movs r2, #40 + 352 000c 1340 ands r3, r2 + 353 000e 282B cmp r3, #40 + 354 0010 01D0 beq .L44 +7461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +7463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 355 .loc 1 7463 14 view .LVU99 + 356 0012 F223 movs r3, #242 + 357 0014 02E0 b .L34 + 358 .L44: +7458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 359 .loc 1 7458 12 view .LVU100 + 360 0016 1A33 adds r3, r3, #26 + 361 0018 00E0 b .L34 + 362 .LVL29: + 363 .L40: +7453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 364 .loc 1 7453 12 view .LVU101 + 365 001a 0023 movs r3, #0 + 366 .LVL30: + 367 .L34: +7464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 368 .loc 1 7467 3 is_stmt 1 view .LVU102 + 369 .loc 1 7467 6 is_stmt 0 view .LVU103 + 370 001c 8A07 lsls r2, r1, #30 + 371 001e 09D5 bpl .L35 +7468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC and RXI interrupts */ +7470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_RXI; + 372 .loc 1 7470 5 is_stmt 1 view .LVU104 + 373 .loc 1 7470 12 is_stmt 0 view .LVU105 + 374 0020 4424 movs r4, #68 + 375 0022 1C43 orrs r4, r3 + 376 .LVL31: +7471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 377 .loc 1 7472 5 is_stmt 1 view .LVU106 + 378 .loc 1 7472 24 is_stmt 0 view .LVU107 + 379 0024 4122 movs r2, #65 + ARM GAS /tmp/cc4IUqI9.s page 139 + + + 380 0026 825C ldrb r2, [r0, r2] + 381 .loc 1 7472 8 view .LVU108 + 382 0028 2825 movs r5, #40 + 383 002a 2A40 ands r2, r5 + 384 002c 282A cmp r2, #40 + 385 002e 0FD0 beq .L42 +7473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +7475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 386 .loc 1 7475 7 is_stmt 1 view .LVU109 + 387 .loc 1 7475 14 is_stmt 0 view .LVU110 + 388 0030 F422 movs r2, #244 + 389 0032 1343 orrs r3, r2 + 390 .LVL32: + 391 .L35: +7476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 392 .loc 1 7479 3 is_stmt 1 view .LVU111 + 393 .loc 1 7479 47 is_stmt 0 view .LVU112 + 394 0034 0AB2 sxth r2, r1 + 395 .loc 1 7479 6 view .LVU113 + 396 0036 002A cmp r2, #0 + 397 0038 0CDB blt .L45 + 398 .L36: +7480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR, NACK and STOP interrupts */ +7482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 399 .loc 1 7485 3 is_stmt 1 view .LVU114 + 400 .loc 1 7485 6 is_stmt 0 view .LVU115 + 401 003a 1029 cmp r1, #16 + 402 003c 0DD0 beq .L46 + 403 .L37: +7486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 404 .loc 1 7491 3 is_stmt 1 view .LVU116 + 405 .loc 1 7491 6 is_stmt 0 view .LVU117 + 406 003e 2029 cmp r1, #32 + 407 0040 0ED0 beq .L47 + 408 .L38: +7492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +7494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; +7495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_RELOAD_IT) + 409 .loc 1 7497 3 is_stmt 1 view .LVU118 + 410 .loc 1 7497 6 is_stmt 0 view .LVU119 + 411 0042 4029 cmp r1, #64 + ARM GAS /tmp/cc4IUqI9.s page 140 + + + 412 0044 0FD0 beq .L48 + 413 .L39: +7498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +7500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +7501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable interrupts only at the end */ +7504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* to avoid a breaking situation like at "t" time */ +7505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* all disable interrupts request are not done */ +7506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, tmpisr); + 414 .loc 1 7506 3 is_stmt 1 view .LVU120 + 415 0046 0168 ldr r1, [r0] + 416 .LVL33: + 417 .loc 1 7506 3 is_stmt 0 view .LVU121 + 418 0048 0A68 ldr r2, [r1] + 419 004a 9A43 bics r2, r3 + 420 004c 0A60 str r2, [r1] +7507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 421 .loc 1 7507 1 view .LVU122 + 422 @ sp needed + 423 004e 30BD pop {r4, r5, pc} + 424 .LVL34: + 425 .L42: +7470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 426 .loc 1 7470 12 view .LVU123 + 427 0050 2300 movs r3, r4 + 428 0052 EFE7 b .L35 + 429 .LVL35: + 430 .L45: +7482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 431 .loc 1 7482 5 is_stmt 1 view .LVU124 +7482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 432 .loc 1 7482 12 is_stmt 0 view .LVU125 + 433 0054 B822 movs r2, #184 + 434 0056 1343 orrs r3, r2 + 435 .LVL36: +7482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 436 .loc 1 7482 12 view .LVU126 + 437 0058 EFE7 b .L36 + 438 .L46: +7488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 439 .loc 1 7488 5 is_stmt 1 view .LVU127 +7488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 440 .loc 1 7488 12 is_stmt 0 view .LVU128 + 441 005a 9022 movs r2, #144 + 442 005c 1343 orrs r3, r2 + 443 .LVL37: +7488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 444 .loc 1 7488 12 view .LVU129 + 445 005e EEE7 b .L37 + 446 .L47: +7494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 447 .loc 1 7494 5 is_stmt 1 view .LVU130 +7494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 448 .loc 1 7494 12 is_stmt 0 view .LVU131 + 449 0060 2022 movs r2, #32 + ARM GAS /tmp/cc4IUqI9.s page 141 + + + 450 0062 1343 orrs r3, r2 + 451 .LVL38: +7494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 452 .loc 1 7494 12 view .LVU132 + 453 0064 EDE7 b .L38 + 454 .L48: +7500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 455 .loc 1 7500 5 is_stmt 1 view .LVU133 +7500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 456 .loc 1 7500 12 is_stmt 0 view .LVU134 + 457 0066 4022 movs r2, #64 + 458 0068 1343 orrs r3, r2 + 459 .LVL39: +7500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 460 .loc 1 7500 12 view .LVU135 + 461 006a ECE7 b .L39 + 462 .cfi_endproc + 463 .LFE119: + 465 .section .text.I2C_ConvertOtherXferOptions,"ax",%progbits + 466 .align 1 + 467 .syntax unified + 468 .code 16 + 469 .thumb_func + 471 I2C_ConvertOtherXferOptions: + 472 .LVL40: + 473 .LFB120: +7508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Convert I2Cx OTHER_xxx XferOptions to functional XferOptions. +7511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +7512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +7513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c) +7515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 474 .loc 1 7515 1 is_stmt 1 view -0 + 475 .cfi_startproc + 476 @ args = 0, pretend = 0, frame = 0 + 477 @ frame_needed = 0, uses_anonymous_args = 0 + 478 @ link register save eliminated. +7516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if user set XferOptions to I2C_OTHER_FRAME */ +7517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +7518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_FRAME */ +7519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_OTHER_FRAME) + 479 .loc 1 7519 3 view .LVU137 + 480 .loc 1 7519 11 is_stmt 0 view .LVU138 + 481 0000 C36A ldr r3, [r0, #44] + 482 .loc 1 7519 6 view .LVU139 + 483 0002 AA2B cmp r3, #170 + 484 0004 05D0 beq .L52 +7520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_FRAME; +7522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */ +7524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +7525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* then generate a stop condition at the end of transfer */ +7526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_AND_LAST_FRAME */ +7527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME) + ARM GAS /tmp/cc4IUqI9.s page 142 + + + 485 .loc 1 7527 8 is_stmt 1 view .LVU140 + 486 .loc 1 7527 16 is_stmt 0 view .LVU141 + 487 0006 C26A ldr r2, [r0, #44] + 488 .loc 1 7527 11 view .LVU142 + 489 0008 AA23 movs r3, #170 + 490 000a 1B02 lsls r3, r3, #8 + 491 000c 9A42 cmp r2, r3 + 492 000e 03D0 beq .L53 + 493 .L49: +7528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME; +7530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +7532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +7534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 494 .loc 1 7535 1 view .LVU143 + 495 @ sp needed + 496 0010 7047 bx lr + 497 .L52: +7521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 498 .loc 1 7521 5 is_stmt 1 view .LVU144 +7521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 499 .loc 1 7521 23 is_stmt 0 view .LVU145 + 500 0012 0023 movs r3, #0 + 501 0014 C362 str r3, [r0, #44] + 502 0016 FBE7 b .L49 + 503 .L53: +7529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 504 .loc 1 7529 5 is_stmt 1 view .LVU146 +7529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 505 .loc 1 7529 23 is_stmt 0 view .LVU147 + 506 0018 8023 movs r3, #128 + 507 001a 9B04 lsls r3, r3, #18 + 508 001c C362 str r3, [r0, #44] +7534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 509 .loc 1 7534 3 is_stmt 1 view .LVU148 + 510 .loc 1 7535 1 is_stmt 0 view .LVU149 + 511 001e F7E7 b .L49 + 512 .cfi_endproc + 513 .LFE120: + 515 .section .text.I2C_IsErrorOccurred,"ax",%progbits + 516 .align 1 + 517 .syntax unified + 518 .code 16 + 519 .thumb_func + 521 I2C_IsErrorOccurred: + 522 .LVL41: + 523 .LFB116: +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 524 .loc 1 7193 1 is_stmt 1 view -0 + 525 .cfi_startproc + 526 @ args = 0, pretend = 0, frame = 0 + 527 @ frame_needed = 0, uses_anonymous_args = 0 +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 528 .loc 1 7193 1 is_stmt 0 view .LVU151 + ARM GAS /tmp/cc4IUqI9.s page 143 + + + 529 0000 F0B5 push {r4, r5, r6, r7, lr} + 530 .cfi_def_cfa_offset 20 + 531 .cfi_offset 4, -20 + 532 .cfi_offset 5, -16 + 533 .cfi_offset 6, -12 + 534 .cfi_offset 7, -8 + 535 .cfi_offset 14, -4 + 536 0002 C646 mov lr, r8 + 537 0004 00B5 push {lr} + 538 .cfi_def_cfa_offset 24 + 539 .cfi_offset 8, -24 + 540 0006 0400 movs r4, r0 + 541 0008 0D00 movs r5, r1 + 542 000a 1700 movs r7, r2 +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 543 .loc 1 7194 3 is_stmt 1 view .LVU152 + 544 .LVL42: +7195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t error_code = 0; + 545 .loc 1 7195 3 view .LVU153 +7195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t error_code = 0; + 546 .loc 1 7195 27 is_stmt 0 view .LVU154 + 547 000c 0168 ldr r1, [r0] + 548 .LVL43: +7195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t error_code = 0; + 549 .loc 1 7195 12 view .LVU155 + 550 000e 8B69 ldr r3, [r1, #24] + 551 .LVL44: +7196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart = Tickstart; + 552 .loc 1 7196 3 is_stmt 1 view .LVU156 +7197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp1; + 553 .loc 1 7197 3 view .LVU157 +7198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp2; + 554 .loc 1 7198 3 view .LVU158 +7199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 555 .loc 1 7199 3 view .LVU159 +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 556 .loc 1 7201 3 view .LVU160 +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 557 .loc 1 7201 7 is_stmt 0 view .LVU161 + 558 0010 1022 movs r2, #16 + 559 .LVL45: +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 560 .loc 1 7201 7 view .LVU162 + 561 0012 1600 movs r6, r2 + 562 0014 1E40 ands r6, r3 +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 563 .loc 1 7201 6 view .LVU163 + 564 0016 1A42 tst r2, r3 + 565 0018 00D1 bne .LCB556 + 566 001a 75E0 b .L71 @long jump + 567 .LCB556: +7204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 568 .loc 1 7204 5 is_stmt 1 view .LVU164 + 569 001c 1023 movs r3, #16 + 570 .LVL46: +7204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 571 .loc 1 7204 5 is_stmt 0 view .LVU165 + ARM GAS /tmp/cc4IUqI9.s page 144 + + + 572 001e CB61 str r3, [r1, #28] +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 573 .loc 1 7208 5 is_stmt 1 view .LVU166 +7196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart = Tickstart; + 574 .loc 1 7196 12 is_stmt 0 view .LVU167 + 575 0020 0023 movs r3, #0 + 576 0022 9846 mov r8, r3 +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 577 .loc 1 7194 21 view .LVU168 + 578 0024 0026 movs r6, #0 + 579 .LVL47: + 580 .L57: +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 581 .loc 1 7208 64 is_stmt 1 view .LVU169 +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 582 .loc 1 7208 13 is_stmt 0 view .LVU170 + 583 0026 2068 ldr r0, [r4] + 584 0028 8369 ldr r3, [r0, #24] +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 585 .loc 1 7208 64 view .LVU171 + 586 002a 9B06 lsls r3, r3, #26 + 587 002c 31D4 bmi .L63 +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 588 .loc 1 7208 64 discriminator 1 view .LVU172 + 589 002e 002E cmp r6, #0 + 590 0030 2FD1 bne .L63 +7211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 591 .loc 1 7211 7 is_stmt 1 view .LVU173 +7211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 592 .loc 1 7211 10 is_stmt 0 view .LVU174 + 593 0032 6B1C adds r3, r5, #1 + 594 0034 F7D0 beq .L57 +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 595 .loc 1 7213 9 is_stmt 1 view .LVU175 +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 596 .loc 1 7213 15 is_stmt 0 view .LVU176 + 597 0036 FFF7FEFF bl HAL_GetTick + 598 .LVL48: +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 599 .loc 1 7213 29 discriminator 1 view .LVU177 + 600 003a C01B subs r0, r0, r7 +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 601 .loc 1 7213 12 discriminator 1 view .LVU178 + 602 003c A842 cmp r0, r5 + 603 003e 01D8 bhi .L58 +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 604 .loc 1 7213 53 discriminator 1 view .LVU179 + 605 0040 002D cmp r5, #0 + 606 0042 F0D1 bne .L57 + 607 .L58: +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 608 .loc 1 7215 11 is_stmt 1 view .LVU180 +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 609 .loc 1 7215 33 is_stmt 0 view .LVU181 + 610 0044 2168 ldr r1, [r4] +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 611 .loc 1 7215 43 view .LVU182 + ARM GAS /tmp/cc4IUqI9.s page 145 + + + 612 0046 4B68 ldr r3, [r1, #4] +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 613 .loc 1 7215 16 view .LVU183 + 614 0048 8022 movs r2, #128 + 615 004a D201 lsls r2, r2, #7 + 616 004c 1340 ands r3, r2 + 617 .LVL49: +7216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 618 .loc 1 7216 11 is_stmt 1 view .LVU184 +7216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 619 .loc 1 7216 16 is_stmt 0 view .LVU185 + 620 004e 4222 movs r2, #66 + 621 0050 A25C ldrb r2, [r4, r2] + 622 0052 D2B2 uxtb r2, r2 + 623 .LVL50: +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 624 .loc 1 7219 11 is_stmt 1 view .LVU186 +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 625 .loc 1 7219 16 is_stmt 0 view .LVU187 + 626 0054 8869 ldr r0, [r1, #24] +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 627 .loc 1 7219 14 view .LVU188 + 628 0056 0004 lsls r0, r0, #16 + 629 0058 03D5 bpl .L61 +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 630 .loc 1 7219 66 discriminator 1 view .LVU189 + 631 005a 002B cmp r3, #0 + 632 005c 01D1 bne .L61 +7220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp2 != HAL_I2C_MODE_SLAVE)) + 633 .loc 1 7220 38 view .LVU190 + 634 005e 202A cmp r2, #32 + 635 0060 0ED1 bne .L77 + 636 .LVL51: + 637 .L61: +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 638 .loc 1 7230 59 is_stmt 1 view .LVU191 +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 639 .loc 1 7230 18 is_stmt 0 view .LVU192 + 640 0062 2368 ldr r3, [r4] + 641 0064 9B69 ldr r3, [r3, #24] +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 642 .loc 1 7230 59 view .LVU193 + 643 0066 9B06 lsls r3, r3, #26 + 644 0068 DDD4 bmi .L57 +7233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 645 .loc 1 7233 13 is_stmt 1 view .LVU194 +7233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 646 .loc 1 7233 18 is_stmt 0 view .LVU195 + 647 006a FFF7FEFF bl HAL_GetTick + 648 .LVL52: +7233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 649 .loc 1 7233 32 discriminator 1 view .LVU196 + 650 006e C01B subs r0, r0, r7 +7233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 651 .loc 1 7233 16 discriminator 1 view .LVU197 + 652 0070 1928 cmp r0, #25 + 653 0072 F6D9 bls .L61 + ARM GAS /tmp/cc4IUqI9.s page 146 + + +7235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 654 .loc 1 7235 15 is_stmt 1 view .LVU198 +7235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 655 .loc 1 7235 26 is_stmt 0 view .LVU199 + 656 0074 2023 movs r3, #32 + 657 0076 4246 mov r2, r8 + 658 0078 1A43 orrs r2, r3 + 659 007a 9046 mov r8, r2 + 660 .LVL53: +7237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 661 .loc 1 7237 15 is_stmt 1 view .LVU200 +7239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 662 .loc 1 7239 15 view .LVU201 +7237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 663 .loc 1 7237 22 is_stmt 0 view .LVU202 + 664 007c 0126 movs r6, #1 +7239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 665 .loc 1 7239 15 view .LVU203 + 666 007e D2E7 b .L57 + 667 .LVL54: + 668 .L77: +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 669 .loc 1 7224 13 is_stmt 1 view .LVU204 +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 670 .loc 1 7224 27 is_stmt 0 view .LVU205 + 671 0080 4A68 ldr r2, [r1, #4] + 672 .LVL55: +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 673 .loc 1 7224 33 view .LVU206 + 674 0082 8023 movs r3, #128 + 675 .LVL56: +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 676 .loc 1 7224 33 view .LVU207 + 677 0084 DB01 lsls r3, r3, #7 + 678 0086 1343 orrs r3, r2 + 679 0088 4B60 str r3, [r1, #4] +7227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 680 .loc 1 7227 13 is_stmt 1 view .LVU208 +7227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 681 .loc 1 7227 25 is_stmt 0 view .LVU209 + 682 008a FFF7FEFF bl HAL_GetTick + 683 .LVL57: + 684 008e 0700 movs r7, r0 + 685 .LVL58: +7227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 686 .loc 1 7227 25 view .LVU210 + 687 0090 E7E7 b .L61 + 688 .LVL59: + 689 .L63: +7247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 690 .loc 1 7247 5 is_stmt 1 view .LVU211 +7247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 691 .loc 1 7247 8 is_stmt 0 view .LVU212 + 692 0092 002E cmp r6, #0 + 693 0094 01D1 bne .L65 +7250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 694 .loc 1 7250 7 is_stmt 1 view .LVU213 + ARM GAS /tmp/cc4IUqI9.s page 147 + + + 695 0096 2023 movs r3, #32 + 696 0098 C361 str r3, [r0, #28] + 697 .L65: +7253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 698 .loc 1 7253 5 view .LVU214 +7253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 699 .loc 1 7253 16 is_stmt 0 view .LVU215 + 700 009a 0426 movs r6, #4 + 701 .LVL60: +7253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 702 .loc 1 7253 16 view .LVU216 + 703 009c 4346 mov r3, r8 + 704 009e 3343 orrs r3, r6 + 705 00a0 1E00 movs r6, r3 + 706 .LVL61: +7255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 707 .loc 1 7255 5 is_stmt 1 view .LVU217 +7255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 708 .loc 1 7255 12 is_stmt 0 view .LVU218 + 709 00a2 0125 movs r5, #1 + 710 .LVL62: + 711 .L55: +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 712 .loc 1 7259 3 is_stmt 1 view .LVU219 +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 713 .loc 1 7259 16 is_stmt 0 view .LVU220 + 714 00a4 2268 ldr r2, [r4] +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 715 .loc 1 7259 10 view .LVU221 + 716 00a6 9369 ldr r3, [r2, #24] + 717 .LVL63: +7263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 718 .loc 1 7263 3 is_stmt 1 view .LVU222 +7263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 719 .loc 1 7263 6 is_stmt 0 view .LVU223 + 720 00a8 D905 lsls r1, r3, #23 + 721 00aa 04D5 bpl .L66 +7265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 722 .loc 1 7265 5 is_stmt 1 view .LVU224 +7265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 723 .loc 1 7265 16 is_stmt 0 view .LVU225 + 724 00ac 0121 movs r1, #1 + 725 00ae 0E43 orrs r6, r1 + 726 .LVL64: +7268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 727 .loc 1 7268 5 is_stmt 1 view .LVU226 + 728 00b0 FF31 adds r1, r1, #255 + 729 00b2 D161 str r1, [r2, #28] +7270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 730 .loc 1 7270 5 view .LVU227 + 731 .LVL65: +7270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 732 .loc 1 7270 12 is_stmt 0 view .LVU228 + 733 00b4 0125 movs r5, #1 + 734 .LVL66: + 735 .L66: +7274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 148 + + + 736 .loc 1 7274 3 is_stmt 1 view .LVU229 +7274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 737 .loc 1 7274 6 is_stmt 0 view .LVU230 + 738 00b6 5A05 lsls r2, r3, #21 + 739 00b8 06D5 bpl .L67 +7276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 740 .loc 1 7276 5 is_stmt 1 view .LVU231 +7276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 741 .loc 1 7276 16 is_stmt 0 view .LVU232 + 742 00ba 0822 movs r2, #8 + 743 00bc 1643 orrs r6, r2 + 744 .LVL67: +7279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 745 .loc 1 7279 5 is_stmt 1 view .LVU233 + 746 00be 2268 ldr r2, [r4] + 747 00c0 8021 movs r1, #128 + 748 00c2 C900 lsls r1, r1, #3 + 749 00c4 D161 str r1, [r2, #28] +7281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 750 .loc 1 7281 5 view .LVU234 + 751 .LVL68: +7281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 752 .loc 1 7281 12 is_stmt 0 view .LVU235 + 753 00c6 0125 movs r5, #1 + 754 .LVL69: + 755 .L67: +7285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 756 .loc 1 7285 3 is_stmt 1 view .LVU236 +7285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 757 .loc 1 7285 6 is_stmt 0 view .LVU237 + 758 00c8 9B05 lsls r3, r3, #22 + 759 00ca 1FD5 bpl .L68 + 760 .LVL70: +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 761 .loc 1 7287 5 is_stmt 1 view .LVU238 +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 762 .loc 1 7287 16 is_stmt 0 view .LVU239 + 763 00cc 0223 movs r3, #2 + 764 00ce 1E43 orrs r6, r3 + 765 .LVL71: +7290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 766 .loc 1 7290 5 is_stmt 1 view .LVU240 + 767 00d0 2368 ldr r3, [r4] + 768 00d2 8022 movs r2, #128 + 769 00d4 9200 lsls r2, r2, #2 + 770 00d6 DA61 str r2, [r3, #28] +7292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 771 .loc 1 7292 5 view .LVU241 + 772 .LVL72: +7295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 773 .loc 1 7295 3 view .LVU242 +7292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 774 .loc 1 7292 12 is_stmt 0 view .LVU243 + 775 00d8 0125 movs r5, #1 + 776 .LVL73: + 777 .L69: +7298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 149 + + + 778 .loc 1 7298 5 is_stmt 1 view .LVU244 + 779 00da 2000 movs r0, r4 + 780 00dc FFF7FEFF bl I2C_Flush_TXDR + 781 .LVL74: +7301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 782 .loc 1 7301 5 view .LVU245 + 783 00e0 2268 ldr r2, [r4] + 784 00e2 5368 ldr r3, [r2, #4] + 785 00e4 0B49 ldr r1, .L78 + 786 00e6 0B40 ands r3, r1 + 787 00e8 5360 str r3, [r2, #4] +7303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 788 .loc 1 7303 5 view .LVU246 +7303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 789 .loc 1 7303 9 is_stmt 0 view .LVU247 + 790 00ea 636C ldr r3, [r4, #68] +7303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 791 .loc 1 7303 21 view .LVU248 + 792 00ec 3343 orrs r3, r6 + 793 00ee 6364 str r3, [r4, #68] +7304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 794 .loc 1 7304 5 is_stmt 1 view .LVU249 +7304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 795 .loc 1 7304 17 is_stmt 0 view .LVU250 + 796 00f0 4123 movs r3, #65 + 797 00f2 2022 movs r2, #32 + 798 00f4 E254 strb r2, [r4, r3] +7305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 799 .loc 1 7305 5 is_stmt 1 view .LVU251 +7305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 800 .loc 1 7305 16 is_stmt 0 view .LVU252 + 801 00f6 0023 movs r3, #0 + 802 00f8 2232 adds r2, r2, #34 + 803 00fa A354 strb r3, [r4, r2] +7308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 804 .loc 1 7308 5 is_stmt 1 view .LVU253 +7308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 805 .loc 1 7308 5 view .LVU254 + 806 00fc 023A subs r2, r2, #2 + 807 00fe A354 strb r3, [r4, r2] + 808 .L70: +7308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 809 .loc 1 7308 5 discriminator 1 view .LVU255 +7311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 810 .loc 1 7311 3 view .LVU256 +7312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 811 .loc 1 7312 1 is_stmt 0 view .LVU257 + 812 0100 2800 movs r0, r5 + 813 @ sp needed + 814 .LVL75: + 815 .LVL76: + 816 .LVL77: +7312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 817 .loc 1 7312 1 view .LVU258 + 818 0102 80BC pop {r7} + 819 0104 B846 mov r8, r7 + 820 0106 F0BD pop {r4, r5, r6, r7, pc} + ARM GAS /tmp/cc4IUqI9.s page 150 + + + 821 .LVL78: + 822 .L71: +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 823 .loc 1 7194 21 view .LVU259 + 824 0108 0025 movs r5, #0 + 825 .LVL79: +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 826 .loc 1 7194 21 view .LVU260 + 827 010a CBE7 b .L55 + 828 .LVL80: + 829 .L68: +7295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 830 .loc 1 7295 3 is_stmt 1 view .LVU261 +7295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 831 .loc 1 7295 6 is_stmt 0 view .LVU262 + 832 010c 002D cmp r5, #0 + 833 010e F7D0 beq .L70 + 834 0110 E3E7 b .L69 + 835 .L79: + 836 0112 C046 .align 2 + 837 .L78: + 838 0114 00E800FE .word -33495040 + 839 .cfi_endproc + 840 .LFE116: + 842 .section .text.I2C_WaitOnTXISFlagUntilTimeout,"ax",%progbits + 843 .align 1 + 844 .syntax unified + 845 .code 16 + 846 .thumb_func + 848 I2C_WaitOnTXISFlagUntilTimeout: + 849 .LVL81: + 850 .LFB113: +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 851 .loc 1 7038 1 is_stmt 1 view -0 + 852 .cfi_startproc + 853 @ args = 0, pretend = 0, frame = 0 + 854 @ frame_needed = 0, uses_anonymous_args = 0 +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 855 .loc 1 7038 1 is_stmt 0 view .LVU264 + 856 0000 70B5 push {r4, r5, r6, lr} + 857 .cfi_def_cfa_offset 16 + 858 .cfi_offset 4, -16 + 859 .cfi_offset 5, -12 + 860 .cfi_offset 6, -8 + 861 .cfi_offset 14, -4 + 862 0002 0400 movs r4, r0 + 863 0004 0D00 movs r5, r1 + 864 0006 1600 movs r6, r2 +7039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 865 .loc 1 7039 3 is_stmt 1 view .LVU265 + 866 .LVL82: + 867 .L83: +7039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 868 .loc 1 7039 50 view .LVU266 +7039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 869 .loc 1 7039 10 is_stmt 0 view .LVU267 + 870 0008 2368 ldr r3, [r4] + ARM GAS /tmp/cc4IUqI9.s page 151 + + + 871 000a 9B69 ldr r3, [r3, #24] +7039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 872 .loc 1 7039 50 view .LVU268 + 873 000c 9B07 lsls r3, r3, #30 + 874 000e 20D4 bmi .L89 +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 875 .loc 1 7042 5 is_stmt 1 view .LVU269 +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 876 .loc 1 7042 9 is_stmt 0 view .LVU270 + 877 0010 3200 movs r2, r6 + 878 0012 2900 movs r1, r5 + 879 0014 2000 movs r0, r4 + 880 0016 FFF7FEFF bl I2C_IsErrorOccurred + 881 .LVL83: +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 882 .loc 1 7042 8 discriminator 1 view .LVU271 + 883 001a 0028 cmp r0, #0 + 884 001c 1BD1 bne .L86 +7048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 885 .loc 1 7048 5 is_stmt 1 view .LVU272 +7048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 886 .loc 1 7048 8 is_stmt 0 view .LVU273 + 887 001e 6B1C adds r3, r5, #1 + 888 0020 F2D0 beq .L83 +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 889 .loc 1 7050 7 is_stmt 1 view .LVU274 +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 890 .loc 1 7050 13 is_stmt 0 view .LVU275 + 891 0022 FFF7FEFF bl HAL_GetTick + 892 .LVL84: +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 893 .loc 1 7050 27 discriminator 1 view .LVU276 + 894 0026 801B subs r0, r0, r6 +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 895 .loc 1 7050 10 discriminator 1 view .LVU277 + 896 0028 A842 cmp r0, r5 + 897 002a 01D8 bhi .L84 +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 898 .loc 1 7050 51 discriminator 1 view .LVU278 + 899 002c 002D cmp r5, #0 + 900 002e EBD1 bne .L83 + 901 .L84: +7052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 902 .loc 1 7052 9 is_stmt 1 view .LVU279 +7052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 903 .loc 1 7052 14 is_stmt 0 view .LVU280 + 904 0030 2368 ldr r3, [r4] + 905 0032 9B69 ldr r3, [r3, #24] +7052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 906 .loc 1 7052 12 view .LVU281 + 907 0034 9B07 lsls r3, r3, #30 + 908 0036 E7D4 bmi .L83 +7054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 909 .loc 1 7054 11 is_stmt 1 view .LVU282 +7054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 910 .loc 1 7054 15 is_stmt 0 view .LVU283 + 911 0038 636C ldr r3, [r4, #68] + ARM GAS /tmp/cc4IUqI9.s page 152 + + +7054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 912 .loc 1 7054 27 view .LVU284 + 913 003a 2022 movs r2, #32 + 914 003c 1343 orrs r3, r2 + 915 003e 6364 str r3, [r4, #68] +7055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 916 .loc 1 7055 11 is_stmt 1 view .LVU285 +7055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 917 .loc 1 7055 23 is_stmt 0 view .LVU286 + 918 0040 4123 movs r3, #65 + 919 0042 E254 strb r2, [r4, r3] +7056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 920 .loc 1 7056 11 is_stmt 1 view .LVU287 +7056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 921 .loc 1 7056 22 is_stmt 0 view .LVU288 + 922 0044 0023 movs r3, #0 + 923 0046 2232 adds r2, r2, #34 + 924 0048 A354 strb r3, [r4, r2] +7059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 925 .loc 1 7059 11 is_stmt 1 view .LVU289 +7059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 926 .loc 1 7059 11 view .LVU290 + 927 004a 023A subs r2, r2, #2 + 928 004c A354 strb r3, [r4, r2] +7059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 929 .loc 1 7059 11 view .LVU291 +7061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 930 .loc 1 7061 11 view .LVU292 +7061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 931 .loc 1 7061 18 is_stmt 0 view .LVU293 + 932 004e 0120 movs r0, #1 + 933 0050 00E0 b .L82 + 934 .L89: +7066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 935 .loc 1 7066 10 view .LVU294 + 936 0052 0020 movs r0, #0 + 937 .L82: +7067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 938 .loc 1 7067 1 view .LVU295 + 939 @ sp needed + 940 .LVL85: + 941 .LVL86: + 942 .LVL87: +7067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 943 .loc 1 7067 1 view .LVU296 + 944 0054 70BD pop {r4, r5, r6, pc} + 945 .LVL88: + 946 .L86: +7044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 947 .loc 1 7044 14 view .LVU297 + 948 0056 0120 movs r0, #1 + 949 0058 FCE7 b .L82 + 950 .cfi_endproc + 951 .LFE113: + 953 .section .text.I2C_WaitOnFlagUntilTimeout,"ax",%progbits + 954 .align 1 + 955 .syntax unified + ARM GAS /tmp/cc4IUqI9.s page 153 + + + 956 .code 16 + 957 .thumb_func + 959 I2C_WaitOnFlagUntilTimeout: + 960 .LVL89: + 961 .LFB112: +6998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 962 .loc 1 6998 1 is_stmt 1 view -0 + 963 .cfi_startproc + 964 @ args = 4, pretend = 0, frame = 8 + 965 @ frame_needed = 0, uses_anonymous_args = 0 +6998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 966 .loc 1 6998 1 is_stmt 0 view .LVU299 + 967 0000 F0B5 push {r4, r5, r6, r7, lr} + 968 .cfi_def_cfa_offset 20 + 969 .cfi_offset 4, -20 + 970 .cfi_offset 5, -16 + 971 .cfi_offset 6, -12 + 972 .cfi_offset 7, -8 + 973 .cfi_offset 14, -4 + 974 0002 D646 mov lr, r10 + 975 0004 4F46 mov r7, r9 + 976 0006 80B5 push {r7, lr} + 977 .cfi_def_cfa_offset 28 + 978 .cfi_offset 9, -28 + 979 .cfi_offset 10, -24 + 980 0008 83B0 sub sp, sp, #12 + 981 .cfi_def_cfa_offset 40 + 982 000a 0700 movs r7, r0 + 983 000c 0D00 movs r5, r1 + 984 000e 1600 movs r6, r2 + 985 0010 9946 mov r9, r3 + 986 0012 0A9B ldr r3, [sp, #40] + 987 .LVL90: +6998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 988 .loc 1 6998 1 view .LVU300 + 989 0014 9A46 mov r10, r3 +6999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 990 .loc 1 6999 3 is_stmt 1 view .LVU301 + 991 .LVL91: + 992 .L93: +6999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 993 .loc 1 6999 41 view .LVU302 +6999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 994 .loc 1 6999 10 is_stmt 0 view .LVU303 + 995 0016 3B68 ldr r3, [r7] + 996 0018 9C69 ldr r4, [r3, #24] + 997 001a 2C40 ands r4, r5 + 998 001c 641B subs r4, r4, r5 + 999 001e 6342 rsbs r3, r4, #0 + 1000 0020 5C41 adcs r4, r4, r3 +6999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1001 .loc 1 6999 41 view .LVU304 + 1002 0022 0196 str r6, [sp, #4] + 1003 0024 B442 cmp r4, r6 + 1004 0026 28D1 bne .L98 +7002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1005 .loc 1 7002 5 is_stmt 1 view .LVU305 + ARM GAS /tmp/cc4IUqI9.s page 154 + + +7002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1006 .loc 1 7002 9 is_stmt 0 view .LVU306 + 1007 0028 5246 mov r2, r10 + 1008 002a 4946 mov r1, r9 + 1009 002c 3800 movs r0, r7 + 1010 002e FFF7FEFF bl I2C_IsErrorOccurred + 1011 .LVL92: +7002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1012 .loc 1 7002 8 discriminator 1 view .LVU307 + 1013 0032 0028 cmp r0, #0 + 1014 0034 27D1 bne .L96 +7008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1015 .loc 1 7008 5 is_stmt 1 view .LVU308 +7008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1016 .loc 1 7008 8 is_stmt 0 view .LVU309 + 1017 0036 4B46 mov r3, r9 + 1018 0038 0133 adds r3, r3, #1 + 1019 003a ECD0 beq .L93 +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1020 .loc 1 7010 7 is_stmt 1 view .LVU310 +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1021 .loc 1 7010 13 is_stmt 0 view .LVU311 + 1022 003c FFF7FEFF bl HAL_GetTick + 1023 .LVL93: +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1024 .loc 1 7010 27 discriminator 1 view .LVU312 + 1025 0040 5346 mov r3, r10 + 1026 0042 C01A subs r0, r0, r3 +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1027 .loc 1 7010 10 discriminator 1 view .LVU313 + 1028 0044 4845 cmp r0, r9 + 1029 0046 02D8 bhi .L94 +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1030 .loc 1 7010 51 discriminator 1 view .LVU314 + 1031 0048 4B46 mov r3, r9 + 1032 004a 002B cmp r3, #0 + 1033 004c E3D1 bne .L93 + 1034 .L94: +7012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1035 .loc 1 7012 9 is_stmt 1 view .LVU315 +7012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1036 .loc 1 7012 14 is_stmt 0 view .LVU316 + 1037 004e 3B68 ldr r3, [r7] + 1038 0050 9B69 ldr r3, [r3, #24] + 1039 0052 2B40 ands r3, r5 + 1040 0054 5B1B subs r3, r3, r5 + 1041 0056 5A42 rsbs r2, r3, #0 + 1042 0058 5341 adcs r3, r3, r2 +7012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1043 .loc 1 7012 12 view .LVU317 + 1044 005a 019A ldr r2, [sp, #4] + 1045 005c 9342 cmp r3, r2 + 1046 005e DAD1 bne .L93 +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1047 .loc 1 7014 11 is_stmt 1 view .LVU318 +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1048 .loc 1 7014 15 is_stmt 0 view .LVU319 + ARM GAS /tmp/cc4IUqI9.s page 155 + + + 1049 0060 7B6C ldr r3, [r7, #68] +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1050 .loc 1 7014 27 view .LVU320 + 1051 0062 2022 movs r2, #32 + 1052 0064 1343 orrs r3, r2 + 1053 0066 7B64 str r3, [r7, #68] +7015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1054 .loc 1 7015 11 is_stmt 1 view .LVU321 +7015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1055 .loc 1 7015 23 is_stmt 0 view .LVU322 + 1056 0068 4123 movs r3, #65 + 1057 006a FA54 strb r2, [r7, r3] +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1058 .loc 1 7016 11 is_stmt 1 view .LVU323 +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1059 .loc 1 7016 22 is_stmt 0 view .LVU324 + 1060 006c 0023 movs r3, #0 + 1061 006e 2232 adds r2, r2, #34 + 1062 0070 BB54 strb r3, [r7, r2] +7019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 1063 .loc 1 7019 11 is_stmt 1 view .LVU325 +7019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 1064 .loc 1 7019 11 view .LVU326 + 1065 0072 023A subs r2, r2, #2 + 1066 0074 BB54 strb r3, [r7, r2] +7019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 1067 .loc 1 7019 11 view .LVU327 +7020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1068 .loc 1 7020 11 view .LVU328 +7020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1069 .loc 1 7020 18 is_stmt 0 view .LVU329 + 1070 0076 0120 movs r0, #1 + 1071 0078 00E0 b .L92 + 1072 .L98: +7025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1073 .loc 1 7025 10 view .LVU330 + 1074 007a 0020 movs r0, #0 + 1075 .L92: +7026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1076 .loc 1 7026 1 view .LVU331 + 1077 007c 03B0 add sp, sp, #12 + 1078 @ sp needed + 1079 .LVL94: + 1080 .LVL95: + 1081 .LVL96: + 1082 .LVL97: +7026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1083 .loc 1 7026 1 view .LVU332 + 1084 007e C0BC pop {r6, r7} + 1085 0080 BA46 mov r10, r7 + 1086 0082 B146 mov r9, r6 + 1087 0084 F0BD pop {r4, r5, r6, r7, pc} + 1088 .LVL98: + 1089 .L96: +7004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1090 .loc 1 7004 14 view .LVU333 + 1091 0086 0120 movs r0, #1 + ARM GAS /tmp/cc4IUqI9.s page 156 + + + 1092 0088 F8E7 b .L92 + 1093 .cfi_endproc + 1094 .LFE112: + 1096 .section .text.I2C_RequestMemoryWrite,"ax",%progbits + 1097 .align 1 + 1098 .syntax unified + 1099 .code 16 + 1100 .thumb_func + 1102 I2C_RequestMemoryWrite: + 1103 .LVL99: + 1104 .LFB95: +5856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 1105 .loc 1 5856 1 is_stmt 1 view -0 + 1106 .cfi_startproc + 1107 @ args = 8, pretend = 0, frame = 0 + 1108 @ frame_needed = 0, uses_anonymous_args = 0 +5856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 1109 .loc 1 5856 1 is_stmt 0 view .LVU335 + 1110 0000 70B5 push {r4, r5, r6, lr} + 1111 .cfi_def_cfa_offset 16 + 1112 .cfi_offset 4, -16 + 1113 .cfi_offset 5, -12 + 1114 .cfi_offset 6, -8 + 1115 .cfi_offset 14, -4 + 1116 0002 82B0 sub sp, sp, #8 + 1117 .cfi_def_cfa_offset 24 + 1118 0004 0400 movs r4, r0 + 1119 0006 1500 movs r5, r2 + 1120 0008 1E00 movs r6, r3 +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1121 .loc 1 5857 3 is_stmt 1 view .LVU336 + 1122 000a 8023 movs r3, #128 + 1123 .LVL100: +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1124 .loc 1 5857 3 is_stmt 0 view .LVU337 + 1125 000c F2B2 uxtb r2, r6 + 1126 .LVL101: +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1127 .loc 1 5857 3 view .LVU338 + 1128 000e 1948 ldr r0, .L107 + 1129 .LVL102: +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1130 .loc 1 5857 3 view .LVU339 + 1131 0010 0090 str r0, [sp] + 1132 0012 5B04 lsls r3, r3, #17 + 1133 0014 2000 movs r0, r4 + 1134 0016 FFF7FEFF bl I2C_TransferConfig + 1135 .LVL103: +5860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1136 .loc 1 5860 3 is_stmt 1 view .LVU340 +5860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1137 .loc 1 5860 7 is_stmt 0 view .LVU341 + 1138 001a 079A ldr r2, [sp, #28] + 1139 001c 0699 ldr r1, [sp, #24] + 1140 001e 2000 movs r0, r4 + 1141 0020 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1142 .LVL104: + ARM GAS /tmp/cc4IUqI9.s page 157 + + +5860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1143 .loc 1 5860 6 discriminator 1 view .LVU342 + 1144 0024 0028 cmp r0, #0 + 1145 0026 1ED1 bne .L103 +5866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1146 .loc 1 5866 3 is_stmt 1 view .LVU343 +5866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1147 .loc 1 5866 6 is_stmt 0 view .LVU344 + 1148 0028 012E cmp r6, #1 + 1149 002a 0ED1 bne .L101 +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1150 .loc 1 5869 5 is_stmt 1 view .LVU345 +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1151 .loc 1 5869 9 is_stmt 0 view .LVU346 + 1152 002c 2368 ldr r3, [r4] +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1153 .loc 1 5869 28 view .LVU347 + 1154 002e EDB2 uxtb r5, r5 + 1155 .LVL105: +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1156 .loc 1 5869 26 view .LVU348 + 1157 0030 9D62 str r5, [r3, #40] + 1158 .L102: +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1159 .loc 1 5888 3 is_stmt 1 view .LVU349 +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1160 .loc 1 5888 7 is_stmt 0 view .LVU350 + 1161 0032 079B ldr r3, [sp, #28] + 1162 0034 0093 str r3, [sp] + 1163 0036 069B ldr r3, [sp, #24] + 1164 0038 0022 movs r2, #0 + 1165 003a 8021 movs r1, #128 + 1166 003c 2000 movs r0, r4 + 1167 003e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1168 .LVL106: +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1169 .loc 1 5888 6 discriminator 1 view .LVU351 + 1170 0042 0028 cmp r0, #0 + 1171 0044 13D1 bne .L106 + 1172 .L100: +5894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1173 .loc 1 5894 1 view .LVU352 + 1174 0046 02B0 add sp, sp, #8 + 1175 @ sp needed + 1176 .LVL107: + 1177 .LVL108: +5894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1178 .loc 1 5894 1 view .LVU353 + 1179 0048 70BD pop {r4, r5, r6, pc} + 1180 .LVL109: + 1181 .L101: +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1182 .loc 1 5875 5 is_stmt 1 view .LVU354 +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1183 .loc 1 5875 9 is_stmt 0 view .LVU355 + 1184 004a 2368 ldr r3, [r4] +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 158 + + + 1185 .loc 1 5875 28 view .LVU356 + 1186 004c 2A0A lsrs r2, r5, #8 +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1187 .loc 1 5875 26 view .LVU357 + 1188 004e 9A62 str r2, [r3, #40] +5878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1189 .loc 1 5878 5 is_stmt 1 view .LVU358 +5878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1190 .loc 1 5878 9 is_stmt 0 view .LVU359 + 1191 0050 079A ldr r2, [sp, #28] + 1192 0052 0699 ldr r1, [sp, #24] + 1193 0054 2000 movs r0, r4 + 1194 0056 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1195 .LVL110: +5878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1196 .loc 1 5878 8 discriminator 1 view .LVU360 + 1197 005a 0028 cmp r0, #0 + 1198 005c 05D1 bne .L104 +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1199 .loc 1 5884 5 is_stmt 1 view .LVU361 +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1200 .loc 1 5884 9 is_stmt 0 view .LVU362 + 1201 005e 2368 ldr r3, [r4] +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1202 .loc 1 5884 28 view .LVU363 + 1203 0060 EDB2 uxtb r5, r5 +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1204 .loc 1 5884 26 view .LVU364 + 1205 0062 9D62 str r5, [r3, #40] + 1206 0064 E5E7 b .L102 + 1207 .L103: +5862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1208 .loc 1 5862 12 view .LVU365 + 1209 0066 0120 movs r0, #1 + 1210 0068 EDE7 b .L100 + 1211 .L104: +5880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1212 .loc 1 5880 14 view .LVU366 + 1213 006a 0120 movs r0, #1 + 1214 006c EBE7 b .L100 + 1215 .L106: +5890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1216 .loc 1 5890 12 view .LVU367 + 1217 006e 0120 movs r0, #1 + 1218 0070 E9E7 b .L100 + 1219 .L108: + 1220 0072 C046 .align 2 + 1221 .L107: + 1222 0074 00200080 .word -2147475456 + 1223 .cfi_endproc + 1224 .LFE95: + 1226 .section .text.I2C_RequestMemoryRead,"ax",%progbits + 1227 .align 1 + 1228 .syntax unified + 1229 .code 16 + 1230 .thumb_func + 1232 I2C_RequestMemoryRead: + ARM GAS /tmp/cc4IUqI9.s page 159 + + + 1233 .LVL111: + 1234 .LFB96: +5911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + 1235 .loc 1 5911 1 is_stmt 1 view -0 + 1236 .cfi_startproc + 1237 @ args = 8, pretend = 0, frame = 0 + 1238 @ frame_needed = 0, uses_anonymous_args = 0 +5911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + 1239 .loc 1 5911 1 is_stmt 0 view .LVU369 + 1240 0000 70B5 push {r4, r5, r6, lr} + 1241 .cfi_def_cfa_offset 16 + 1242 .cfi_offset 4, -16 + 1243 .cfi_offset 5, -12 + 1244 .cfi_offset 6, -8 + 1245 .cfi_offset 14, -4 + 1246 0002 82B0 sub sp, sp, #8 + 1247 .cfi_def_cfa_offset 24 + 1248 0004 0400 movs r4, r0 + 1249 0006 1500 movs r5, r2 + 1250 0008 1E00 movs r6, r3 +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1251 .loc 1 5912 3 is_stmt 1 view .LVU370 + 1252 000a DAB2 uxtb r2, r3 + 1253 .LVL112: +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1254 .loc 1 5912 3 is_stmt 0 view .LVU371 + 1255 000c 184B ldr r3, .L117 + 1256 .LVL113: +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1257 .loc 1 5912 3 view .LVU372 + 1258 000e 0093 str r3, [sp] + 1259 0010 0023 movs r3, #0 + 1260 0012 FFF7FEFF bl I2C_TransferConfig + 1261 .LVL114: +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1262 .loc 1 5915 3 is_stmt 1 view .LVU373 +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1263 .loc 1 5915 7 is_stmt 0 view .LVU374 + 1264 0016 079A ldr r2, [sp, #28] + 1265 0018 0699 ldr r1, [sp, #24] + 1266 001a 2000 movs r0, r4 + 1267 001c FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1268 .LVL115: +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1269 .loc 1 5915 6 discriminator 1 view .LVU375 + 1270 0020 0028 cmp r0, #0 + 1271 0022 1ED1 bne .L113 +5921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1272 .loc 1 5921 3 is_stmt 1 view .LVU376 +5921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1273 .loc 1 5921 6 is_stmt 0 view .LVU377 + 1274 0024 012E cmp r6, #1 + 1275 0026 0ED1 bne .L111 +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1276 .loc 1 5924 5 is_stmt 1 view .LVU378 +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1277 .loc 1 5924 9 is_stmt 0 view .LVU379 + ARM GAS /tmp/cc4IUqI9.s page 160 + + + 1278 0028 2368 ldr r3, [r4] +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1279 .loc 1 5924 28 view .LVU380 + 1280 002a EDB2 uxtb r5, r5 + 1281 .LVL116: +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1282 .loc 1 5924 26 view .LVU381 + 1283 002c 9D62 str r5, [r3, #40] + 1284 .L112: +5943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1285 .loc 1 5943 3 is_stmt 1 view .LVU382 +5943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1286 .loc 1 5943 7 is_stmt 0 view .LVU383 + 1287 002e 079B ldr r3, [sp, #28] + 1288 0030 0093 str r3, [sp] + 1289 0032 069B ldr r3, [sp, #24] + 1290 0034 0022 movs r2, #0 + 1291 0036 4021 movs r1, #64 + 1292 0038 2000 movs r0, r4 + 1293 003a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1294 .LVL117: +5943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1295 .loc 1 5943 6 discriminator 1 view .LVU384 + 1296 003e 0028 cmp r0, #0 + 1297 0040 13D1 bne .L116 + 1298 .L110: +5949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1299 .loc 1 5949 1 view .LVU385 + 1300 0042 02B0 add sp, sp, #8 + 1301 @ sp needed + 1302 .LVL118: + 1303 .LVL119: +5949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1304 .loc 1 5949 1 view .LVU386 + 1305 0044 70BD pop {r4, r5, r6, pc} + 1306 .LVL120: + 1307 .L111: +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1308 .loc 1 5930 5 is_stmt 1 view .LVU387 +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1309 .loc 1 5930 9 is_stmt 0 view .LVU388 + 1310 0046 2368 ldr r3, [r4] +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1311 .loc 1 5930 28 view .LVU389 + 1312 0048 2A0A lsrs r2, r5, #8 +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1313 .loc 1 5930 26 view .LVU390 + 1314 004a 9A62 str r2, [r3, #40] +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1315 .loc 1 5933 5 is_stmt 1 view .LVU391 +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1316 .loc 1 5933 9 is_stmt 0 view .LVU392 + 1317 004c 079A ldr r2, [sp, #28] + 1318 004e 0699 ldr r1, [sp, #24] + 1319 0050 2000 movs r0, r4 + 1320 0052 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1321 .LVL121: + ARM GAS /tmp/cc4IUqI9.s page 161 + + +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1322 .loc 1 5933 8 discriminator 1 view .LVU393 + 1323 0056 0028 cmp r0, #0 + 1324 0058 05D1 bne .L114 +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1325 .loc 1 5939 5 is_stmt 1 view .LVU394 +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1326 .loc 1 5939 9 is_stmt 0 view .LVU395 + 1327 005a 2368 ldr r3, [r4] +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1328 .loc 1 5939 28 view .LVU396 + 1329 005c EDB2 uxtb r5, r5 +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1330 .loc 1 5939 26 view .LVU397 + 1331 005e 9D62 str r5, [r3, #40] + 1332 0060 E5E7 b .L112 + 1333 .L113: +5917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1334 .loc 1 5917 12 view .LVU398 + 1335 0062 0120 movs r0, #1 + 1336 0064 EDE7 b .L110 + 1337 .L114: +5935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1338 .loc 1 5935 14 view .LVU399 + 1339 0066 0120 movs r0, #1 + 1340 0068 EBE7 b .L110 + 1341 .L116: +5945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1342 .loc 1 5945 12 view .LVU400 + 1343 006a 0120 movs r0, #1 + 1344 006c E9E7 b .L110 + 1345 .L118: + 1346 006e C046 .align 2 + 1347 .L117: + 1348 0070 00200080 .word -2147475456 + 1349 .cfi_endproc + 1350 .LFE96: + 1352 .section .text.I2C_WaitOnSTOPFlagUntilTimeout,"ax",%progbits + 1353 .align 1 + 1354 .syntax unified + 1355 .code 16 + 1356 .thumb_func + 1358 I2C_WaitOnSTOPFlagUntilTimeout: + 1359 .LVL122: + 1360 .LFB114: +7079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 1361 .loc 1 7079 1 is_stmt 1 view -0 + 1362 .cfi_startproc + 1363 @ args = 0, pretend = 0, frame = 0 + 1364 @ frame_needed = 0, uses_anonymous_args = 0 +7079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 1365 .loc 1 7079 1 is_stmt 0 view .LVU402 + 1366 0000 70B5 push {r4, r5, r6, lr} + 1367 .cfi_def_cfa_offset 16 + 1368 .cfi_offset 4, -16 + 1369 .cfi_offset 5, -12 + 1370 .cfi_offset 6, -8 + ARM GAS /tmp/cc4IUqI9.s page 162 + + + 1371 .cfi_offset 14, -4 + 1372 0002 0400 movs r4, r0 + 1373 0004 0D00 movs r5, r1 + 1374 0006 1600 movs r6, r2 +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1375 .loc 1 7080 3 is_stmt 1 view .LVU403 +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1376 .loc 1 7080 9 is_stmt 0 view .LVU404 + 1377 0008 03E0 b .L120 + 1378 .LVL123: + 1379 .L122: +7091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1380 .loc 1 7091 7 is_stmt 1 view .LVU405 +7091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1381 .loc 1 7091 12 is_stmt 0 view .LVU406 + 1382 000a 2368 ldr r3, [r4] + 1383 000c 9B69 ldr r3, [r3, #24] +7091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1384 .loc 1 7091 10 view .LVU407 + 1385 000e 9B06 lsls r3, r3, #26 + 1386 0010 12D5 bpl .L126 + 1387 .L120: +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1388 .loc 1 7080 51 is_stmt 1 view .LVU408 +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1389 .loc 1 7080 10 is_stmt 0 view .LVU409 + 1390 0012 2368 ldr r3, [r4] + 1391 0014 9B69 ldr r3, [r3, #24] +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1392 .loc 1 7080 51 view .LVU410 + 1393 0016 9B06 lsls r3, r3, #26 + 1394 0018 1BD4 bmi .L127 +7083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1395 .loc 1 7083 5 is_stmt 1 view .LVU411 +7083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1396 .loc 1 7083 9 is_stmt 0 view .LVU412 + 1397 001a 3200 movs r2, r6 + 1398 001c 2900 movs r1, r5 + 1399 001e 2000 movs r0, r4 + 1400 0020 FFF7FEFF bl I2C_IsErrorOccurred + 1401 .LVL124: +7083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1402 .loc 1 7083 8 discriminator 1 view .LVU413 + 1403 0024 0028 cmp r0, #0 + 1404 0026 16D1 bne .L124 +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1405 .loc 1 7089 5 is_stmt 1 view .LVU414 +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1406 .loc 1 7089 11 is_stmt 0 view .LVU415 + 1407 0028 FFF7FEFF bl HAL_GetTick + 1408 .LVL125: +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1409 .loc 1 7089 25 discriminator 1 view .LVU416 + 1410 002c 801B subs r0, r0, r6 +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1411 .loc 1 7089 8 discriminator 1 view .LVU417 + 1412 002e A842 cmp r0, r5 + ARM GAS /tmp/cc4IUqI9.s page 163 + + + 1413 0030 EBD8 bhi .L122 +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1414 .loc 1 7089 49 discriminator 1 view .LVU418 + 1415 0032 002D cmp r5, #0 + 1416 0034 EDD1 bne .L120 + 1417 0036 E8E7 b .L122 + 1418 .L126: +7093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1419 .loc 1 7093 9 is_stmt 1 view .LVU419 +7093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1420 .loc 1 7093 13 is_stmt 0 view .LVU420 + 1421 0038 636C ldr r3, [r4, #68] +7093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1422 .loc 1 7093 25 view .LVU421 + 1423 003a 2022 movs r2, #32 + 1424 003c 1343 orrs r3, r2 + 1425 003e 6364 str r3, [r4, #68] +7094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1426 .loc 1 7094 9 is_stmt 1 view .LVU422 +7094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1427 .loc 1 7094 21 is_stmt 0 view .LVU423 + 1428 0040 4123 movs r3, #65 + 1429 0042 E254 strb r2, [r4, r3] +7095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1430 .loc 1 7095 9 is_stmt 1 view .LVU424 +7095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1431 .loc 1 7095 20 is_stmt 0 view .LVU425 + 1432 0044 0023 movs r3, #0 + 1433 0046 2232 adds r2, r2, #34 + 1434 0048 A354 strb r3, [r4, r2] +7098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1435 .loc 1 7098 9 is_stmt 1 view .LVU426 +7098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1436 .loc 1 7098 9 view .LVU427 + 1437 004a 023A subs r2, r2, #2 + 1438 004c A354 strb r3, [r4, r2] +7098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1439 .loc 1 7098 9 view .LVU428 +7100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1440 .loc 1 7100 9 view .LVU429 +7100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1441 .loc 1 7100 16 is_stmt 0 view .LVU430 + 1442 004e 0120 movs r0, #1 + 1443 0050 00E0 b .L121 + 1444 .L127: +7104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1445 .loc 1 7104 10 view .LVU431 + 1446 0052 0020 movs r0, #0 + 1447 .L121: +7105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1448 .loc 1 7105 1 view .LVU432 + 1449 @ sp needed + 1450 .LVL126: + 1451 .LVL127: + 1452 .LVL128: +7105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1453 .loc 1 7105 1 view .LVU433 + ARM GAS /tmp/cc4IUqI9.s page 164 + + + 1454 0054 70BD pop {r4, r5, r6, pc} + 1455 .LVL129: + 1456 .L124: +7085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1457 .loc 1 7085 14 view .LVU434 + 1458 0056 0120 movs r0, #1 + 1459 0058 FCE7 b .L121 + 1460 .cfi_endproc + 1461 .LFE114: + 1463 .section .text.I2C_WaitOnRXNEFlagUntilTimeout,"ax",%progbits + 1464 .align 1 + 1465 .syntax unified + 1466 .code 16 + 1467 .thumb_func + 1469 I2C_WaitOnRXNEFlagUntilTimeout: + 1470 .LVL130: + 1471 .LFB115: +7117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 1472 .loc 1 7117 1 is_stmt 1 view -0 + 1473 .cfi_startproc + 1474 @ args = 0, pretend = 0, frame = 0 + 1475 @ frame_needed = 0, uses_anonymous_args = 0 +7117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 1476 .loc 1 7117 1 is_stmt 0 view .LVU436 + 1477 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1478 .cfi_def_cfa_offset 24 + 1479 .cfi_offset 3, -24 + 1480 .cfi_offset 4, -20 + 1481 .cfi_offset 5, -16 + 1482 .cfi_offset 6, -12 + 1483 .cfi_offset 7, -8 + 1484 .cfi_offset 14, -4 + 1485 0002 0400 movs r4, r0 + 1486 0004 0E00 movs r6, r1 + 1487 0006 1700 movs r7, r2 +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1488 .loc 1 7118 3 is_stmt 1 view .LVU437 + 1489 .LVL131: +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1490 .loc 1 7120 3 view .LVU438 +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1491 .loc 1 7118 21 is_stmt 0 view .LVU439 + 1492 0008 0025 movs r5, #0 +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1493 .loc 1 7120 9 view .LVU440 + 1494 000a 18E0 b .L129 + 1495 .LVL132: + 1496 .L132: +7162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1497 .loc 1 7162 9 is_stmt 1 view .LVU441 +7162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1498 .loc 1 7162 25 is_stmt 0 view .LVU442 + 1499 000c 0023 movs r3, #0 + 1500 000e 6364 str r3, [r4, #68] + 1501 .LVL133: + 1502 .L131: +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 165 + + + 1503 .loc 1 7167 5 is_stmt 1 view .LVU443 +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1504 .loc 1 7167 12 is_stmt 0 view .LVU444 + 1505 0010 FFF7FEFF bl HAL_GetTick + 1506 .LVL134: +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1507 .loc 1 7167 26 discriminator 1 view .LVU445 + 1508 0014 C01B subs r0, r0, r7 +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1509 .loc 1 7167 8 discriminator 1 view .LVU446 + 1510 0016 B042 cmp r0, r6 + 1511 0018 01D8 bhi .L133 +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1512 .loc 1 7167 50 discriminator 2 view .LVU447 + 1513 001a 002E cmp r6, #0 + 1514 001c 0FD1 bne .L129 + 1515 .L133: +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1516 .loc 1 7167 70 discriminator 3 view .LVU448 + 1517 001e 002D cmp r5, #0 + 1518 0020 0DD1 bne .L129 +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1519 .loc 1 7169 7 is_stmt 1 view .LVU449 +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1520 .loc 1 7169 12 is_stmt 0 view .LVU450 + 1521 0022 2368 ldr r3, [r4] + 1522 0024 9B69 ldr r3, [r3, #24] +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1523 .loc 1 7169 10 view .LVU451 + 1524 0026 5B07 lsls r3, r3, #29 + 1525 0028 09D4 bmi .L129 +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1526 .loc 1 7171 9 is_stmt 1 view .LVU452 +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1527 .loc 1 7171 13 is_stmt 0 view .LVU453 + 1528 002a 636C ldr r3, [r4, #68] +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1529 .loc 1 7171 25 view .LVU454 + 1530 002c 2022 movs r2, #32 + 1531 002e 1343 orrs r3, r2 + 1532 0030 6364 str r3, [r4, #68] +7172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1533 .loc 1 7172 9 is_stmt 1 view .LVU455 +7172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1534 .loc 1 7172 21 is_stmt 0 view .LVU456 + 1535 0032 4123 movs r3, #65 + 1536 0034 E254 strb r2, [r4, r3] +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1537 .loc 1 7175 9 is_stmt 1 view .LVU457 +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1538 .loc 1 7175 9 view .LVU458 + 1539 0036 013B subs r3, r3, #1 + 1540 0038 0022 movs r2, #0 + 1541 003a E254 strb r2, [r4, r3] +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1542 .loc 1 7175 9 view .LVU459 +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 166 + + + 1543 .loc 1 7177 9 view .LVU460 + 1544 .LVL135: +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1545 .loc 1 7177 16 is_stmt 0 view .LVU461 + 1546 003c 0135 adds r5, r5, #1 + 1547 .LVL136: + 1548 .L129: +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1549 .loc 1 7120 61 is_stmt 1 view .LVU462 +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1550 .loc 1 7120 11 is_stmt 0 view .LVU463 + 1551 003e 2368 ldr r3, [r4] + 1552 0040 9B69 ldr r3, [r3, #24] +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1553 .loc 1 7120 61 view .LVU464 + 1554 0042 5B07 lsls r3, r3, #29 + 1555 0044 28D4 bmi .L135 +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1556 .loc 1 7120 61 discriminator 1 view .LVU465 + 1557 0046 002D cmp r5, #0 + 1558 0048 26D1 bne .L135 +7123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1559 .loc 1 7123 5 is_stmt 1 view .LVU466 +7123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1560 .loc 1 7123 9 is_stmt 0 view .LVU467 + 1561 004a 3A00 movs r2, r7 + 1562 004c 3100 movs r1, r6 + 1563 004e 2000 movs r0, r4 + 1564 0050 FFF7FEFF bl I2C_IsErrorOccurred + 1565 .LVL137: +7123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1566 .loc 1 7123 8 discriminator 1 view .LVU468 + 1567 0054 0028 cmp r0, #0 + 1568 0056 00D0 beq .L130 +7125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1569 .loc 1 7125 14 view .LVU469 + 1570 0058 0125 movs r5, #1 + 1571 .LVL138: + 1572 .L130: +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1573 .loc 1 7129 5 is_stmt 1 view .LVU470 +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1574 .loc 1 7129 10 is_stmt 0 view .LVU471 + 1575 005a 2268 ldr r2, [r4] + 1576 005c 9369 ldr r3, [r2, #24] +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1577 .loc 1 7129 8 view .LVU472 + 1578 005e 9B06 lsls r3, r3, #26 + 1579 0060 D6D5 bpl .L131 +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1580 .loc 1 7129 59 discriminator 1 view .LVU473 + 1581 0062 002D cmp r5, #0 + 1582 0064 D4D1 bne .L131 +7133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1583 .loc 1 7133 7 is_stmt 1 view .LVU474 +7133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1584 .loc 1 7133 12 is_stmt 0 view .LVU475 + ARM GAS /tmp/cc4IUqI9.s page 167 + + + 1585 0066 9369 ldr r3, [r2, #24] +7137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1586 .loc 1 7137 9 is_stmt 1 view .LVU476 +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1587 .loc 1 7141 7 view .LVU477 +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1588 .loc 1 7141 11 is_stmt 0 view .LVU478 + 1589 0068 9369 ldr r3, [r2, #24] +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1590 .loc 1 7141 10 view .LVU479 + 1591 006a DB06 lsls r3, r3, #27 + 1592 006c CED5 bpl .L132 +7143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; + 1593 .loc 1 7143 9 is_stmt 1 view .LVU480 + 1594 006e 1023 movs r3, #16 + 1595 0070 D361 str r3, [r2, #28] +7144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1596 .loc 1 7144 9 view .LVU481 +7144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1597 .loc 1 7144 25 is_stmt 0 view .LVU482 + 1598 0072 0C3B subs r3, r3, #12 + 1599 0074 6364 str r3, [r4, #68] +7147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1600 .loc 1 7147 9 is_stmt 1 view .LVU483 + 1601 0076 2368 ldr r3, [r4] + 1602 0078 2022 movs r2, #32 + 1603 007a DA61 str r2, [r3, #28] +7150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1604 .loc 1 7150 9 view .LVU484 + 1605 007c 2168 ldr r1, [r4] + 1606 007e 4B68 ldr r3, [r1, #4] + 1607 0080 0648 ldr r0, .L141 + 1608 0082 0340 ands r3, r0 + 1609 0084 4B60 str r3, [r1, #4] +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1610 .loc 1 7152 9 view .LVU485 +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1611 .loc 1 7152 21 is_stmt 0 view .LVU486 + 1612 0086 4123 movs r3, #65 + 1613 0088 E254 strb r2, [r4, r3] +7153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1614 .loc 1 7153 9 is_stmt 1 view .LVU487 +7153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1615 .loc 1 7153 20 is_stmt 0 view .LVU488 + 1616 008a 0023 movs r3, #0 + 1617 008c 2232 adds r2, r2, #34 + 1618 008e A354 strb r3, [r4, r2] +7156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1619 .loc 1 7156 9 is_stmt 1 view .LVU489 +7156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1620 .loc 1 7156 9 view .LVU490 + 1621 0090 023A subs r2, r2, #2 + 1622 0092 A354 strb r3, [r4, r2] +7156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1623 .loc 1 7156 9 view .LVU491 +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1624 .loc 1 7158 9 view .LVU492 + ARM GAS /tmp/cc4IUqI9.s page 168 + + + 1625 .LVL139: +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1626 .loc 1 7158 16 is_stmt 0 view .LVU493 + 1627 0094 0135 adds r5, r5, #1 + 1628 0096 BBE7 b .L131 + 1629 .LVL140: + 1630 .L135: +7181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1631 .loc 1 7181 3 is_stmt 1 view .LVU494 +7182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1632 .loc 1 7182 1 is_stmt 0 view .LVU495 + 1633 0098 2800 movs r0, r5 + 1634 @ sp needed + 1635 .LVL141: + 1636 .LVL142: + 1637 .LVL143: + 1638 .LVL144: +7182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1639 .loc 1 7182 1 view .LVU496 + 1640 009a F8BD pop {r3, r4, r5, r6, r7, pc} + 1641 .L142: + 1642 .align 2 + 1643 .L141: + 1644 009c 00E800FE .word -33495040 + 1645 .cfi_endproc + 1646 .LFE115: + 1648 .section .text.HAL_I2C_MspInit,"ax",%progbits + 1649 .align 1 + 1650 .weak HAL_I2C_MspInit + 1651 .syntax unified + 1652 .code 16 + 1653 .thumb_func + 1655 HAL_I2C_MspInit: + 1656 .LVL145: + 1657 .LFB42: + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1658 .loc 1 697 1 is_stmt 1 view -0 + 1659 .cfi_startproc + 1660 @ args = 0, pretend = 0, frame = 0 + 1661 @ frame_needed = 0, uses_anonymous_args = 0 + 1662 @ link register save eliminated. + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1663 .loc 1 699 3 view .LVU498 + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1664 .loc 1 704 1 is_stmt 0 view .LVU499 + 1665 @ sp needed + 1666 0000 7047 bx lr + 1667 .cfi_endproc + 1668 .LFE42: + 1670 .section .text.HAL_I2C_Init,"ax",%progbits + 1671 .align 1 + 1672 .global HAL_I2C_Init + 1673 .syntax unified + 1674 .code 16 + 1675 .thumb_func + 1677 HAL_I2C_Init: + 1678 .LVL146: + ARM GAS /tmp/cc4IUqI9.s page 169 + + + 1679 .LFB40: + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1680 .loc 1 536 1 is_stmt 1 view -0 + 1681 .cfi_startproc + 1682 @ args = 0, pretend = 0, frame = 0 + 1683 @ frame_needed = 0, uses_anonymous_args = 0 + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1684 .loc 1 536 1 is_stmt 0 view .LVU501 + 1685 0000 10B5 push {r4, lr} + 1686 .cfi_def_cfa_offset 8 + 1687 .cfi_offset 4, -8 + 1688 .cfi_offset 14, -4 + 1689 0002 041E subs r4, r0, #0 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1690 .loc 1 538 3 is_stmt 1 view .LVU502 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1691 .loc 1 538 6 is_stmt 0 view .LVU503 + 1692 0004 60D0 beq .L151 + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + 1693 .loc 1 544 3 is_stmt 1 view .LVU504 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 1694 .loc 1 545 3 view .LVU505 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 1695 .loc 1 546 3 view .LVU506 + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 1696 .loc 1 547 3 view .LVU507 + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 1697 .loc 1 548 3 view .LVU508 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 1698 .loc 1 549 3 view .LVU509 + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 1699 .loc 1 550 3 view .LVU510 + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1700 .loc 1 551 3 view .LVU511 + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1701 .loc 1 553 3 view .LVU512 + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1702 .loc 1 553 11 is_stmt 0 view .LVU513 + 1703 0006 4123 movs r3, #65 + 1704 0008 C35C ldrb r3, [r0, r3] + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1705 .loc 1 553 6 view .LVU514 + 1706 000a 002B cmp r3, #0 + 1707 000c 48D0 beq .L152 + 1708 .LVL147: + 1709 .L146: + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1710 .loc 1 584 3 is_stmt 1 view .LVU515 + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1711 .loc 1 584 15 is_stmt 0 view .LVU516 + 1712 000e 4123 movs r3, #65 + 1713 0010 2422 movs r2, #36 + 1714 0012 E254 strb r2, [r4, r3] + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1715 .loc 1 587 3 is_stmt 1 view .LVU517 + 1716 0014 2268 ldr r2, [r4] + 1717 0016 1368 ldr r3, [r2] + ARM GAS /tmp/cc4IUqI9.s page 170 + + + 1718 0018 0121 movs r1, #1 + 1719 001a 8B43 bics r3, r1 + 1720 001c 1360 str r3, [r2] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1721 .loc 1 591 3 view .LVU518 + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1722 .loc 1 591 39 is_stmt 0 view .LVU519 + 1723 001e 6368 ldr r3, [r4, #4] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1724 .loc 1 591 7 view .LVU520 + 1725 0020 2268 ldr r2, [r4] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1726 .loc 1 591 47 view .LVU521 + 1727 0022 2A49 ldr r1, .L155 + 1728 0024 0B40 ands r3, r1 + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1729 .loc 1 591 27 view .LVU522 + 1730 0026 1361 str r3, [r2, #16] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1731 .loc 1 595 3 is_stmt 1 view .LVU523 + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1732 .loc 1 595 7 is_stmt 0 view .LVU524 + 1733 0028 2268 ldr r2, [r4] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1734 .loc 1 595 17 view .LVU525 + 1735 002a 9368 ldr r3, [r2, #8] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1736 .loc 1 595 24 view .LVU526 + 1737 002c 2849 ldr r1, .L155+4 + 1738 002e 0B40 ands r3, r1 + 1739 0030 9360 str r3, [r2, #8] + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1740 .loc 1 598 3 is_stmt 1 view .LVU527 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1741 .loc 1 598 17 is_stmt 0 view .LVU528 + 1742 0032 E368 ldr r3, [r4, #12] + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1743 .loc 1 598 6 view .LVU529 + 1744 0034 012B cmp r3, #1 + 1745 0036 39D0 beq .L153 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1746 .loc 1 604 5 is_stmt 1 view .LVU530 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1747 .loc 1 604 75 is_stmt 0 view .LVU531 + 1748 0038 A168 ldr r1, [r4, #8] + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1749 .loc 1 604 9 view .LVU532 + 1750 003a 2268 ldr r2, [r4] + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1751 .loc 1 604 63 view .LVU533 + 1752 003c 8423 movs r3, #132 + 1753 003e 1B02 lsls r3, r3, #8 + 1754 0040 0B43 orrs r3, r1 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1755 .loc 1 604 26 view .LVU534 + 1756 0042 9360 str r3, [r2, #8] + 1757 .L148: + ARM GAS /tmp/cc4IUqI9.s page 171 + + + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1758 .loc 1 609 3 is_stmt 1 view .LVU535 + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1759 .loc 1 609 17 is_stmt 0 view .LVU536 + 1760 0044 E368 ldr r3, [r4, #12] + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1761 .loc 1 609 6 view .LVU537 + 1762 0046 022B cmp r3, #2 + 1763 0048 37D0 beq .L154 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1764 .loc 1 616 5 is_stmt 1 view .LVU538 + 1765 004a 2268 ldr r2, [r4] + 1766 004c 5368 ldr r3, [r2, #4] + 1767 004e 2149 ldr r1, .L155+8 + 1768 0050 0B40 ands r3, r1 + 1769 0052 5360 str r3, [r2, #4] + 1770 .L150: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1771 .loc 1 619 3 view .LVU539 + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1772 .loc 1 619 7 is_stmt 0 view .LVU540 + 1773 0054 2268 ldr r2, [r4] + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1774 .loc 1 619 17 view .LVU541 + 1775 0056 5168 ldr r1, [r2, #4] + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1776 .loc 1 619 23 view .LVU542 + 1777 0058 1F4B ldr r3, .L155+12 + 1778 005a 0B43 orrs r3, r1 + 1779 005c 5360 str r3, [r2, #4] + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1780 .loc 1 623 3 is_stmt 1 view .LVU543 + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1781 .loc 1 623 7 is_stmt 0 view .LVU544 + 1782 005e 2268 ldr r2, [r4] + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1783 .loc 1 623 17 view .LVU545 + 1784 0060 D368 ldr r3, [r2, #12] + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1785 .loc 1 623 24 view .LVU546 + 1786 0062 1B49 ldr r1, .L155+4 + 1787 0064 0B40 ands r3, r1 + 1788 0066 D360 str r3, [r2, #12] + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1789 .loc 1 626 3 is_stmt 1 view .LVU547 + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1790 .loc 1 626 37 is_stmt 0 view .LVU548 + 1791 0068 2369 ldr r3, [r4, #16] + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1792 .loc 1 626 66 view .LVU549 + 1793 006a 6269 ldr r2, [r4, #20] + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1794 .loc 1 626 54 view .LVU550 + 1795 006c 1343 orrs r3, r2 + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1796 .loc 1 627 38 view .LVU551 + 1797 006e A269 ldr r2, [r4, #24] + ARM GAS /tmp/cc4IUqI9.s page 172 + + + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1798 .loc 1 627 56 view .LVU552 + 1799 0070 1202 lsls r2, r2, #8 + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1800 .loc 1 626 7 view .LVU553 + 1801 0072 2168 ldr r1, [r4] + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1802 .loc 1 626 79 view .LVU554 + 1803 0074 1343 orrs r3, r2 + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1804 .loc 1 626 24 view .LVU555 + 1805 0076 CB60 str r3, [r1, #12] + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1806 .loc 1 631 3 is_stmt 1 view .LVU556 + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1807 .loc 1 631 36 is_stmt 0 view .LVU557 + 1808 0078 E369 ldr r3, [r4, #28] + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1809 .loc 1 631 65 view .LVU558 + 1810 007a 216A ldr r1, [r4, #32] + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1811 .loc 1 631 7 view .LVU559 + 1812 007c 2268 ldr r2, [r4] + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1813 .loc 1 631 53 view .LVU560 + 1814 007e 0B43 orrs r3, r1 + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1815 .loc 1 631 23 view .LVU561 + 1816 0080 1360 str r3, [r2] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1817 .loc 1 634 3 is_stmt 1 view .LVU562 + 1818 0082 2268 ldr r2, [r4] + 1819 0084 1368 ldr r3, [r2] + 1820 0086 0121 movs r1, #1 + 1821 0088 0B43 orrs r3, r1 + 1822 008a 1360 str r3, [r2] + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1823 .loc 1 636 3 view .LVU563 + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1824 .loc 1 636 19 is_stmt 0 view .LVU564 + 1825 008c 0023 movs r3, #0 + 1826 008e 6364 str r3, [r4, #68] + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1827 .loc 1 637 3 is_stmt 1 view .LVU565 + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1828 .loc 1 637 15 is_stmt 0 view .LVU566 + 1829 0090 4122 movs r2, #65 + 1830 0092 1F31 adds r1, r1, #31 + 1831 0094 A154 strb r1, [r4, r2] + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1832 .loc 1 638 3 is_stmt 1 view .LVU567 + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1833 .loc 1 638 23 is_stmt 0 view .LVU568 + 1834 0096 2363 str r3, [r4, #48] + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1835 .loc 1 639 3 is_stmt 1 view .LVU569 + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 173 + + + 1836 .loc 1 639 14 is_stmt 0 view .LVU570 + 1837 0098 0132 adds r2, r2, #1 + 1838 009a A354 strb r3, [r4, r2] + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1839 .loc 1 641 3 is_stmt 1 view .LVU571 + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1840 .loc 1 641 10 is_stmt 0 view .LVU572 + 1841 009c 0020 movs r0, #0 + 1842 .L145: + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1843 .loc 1 642 1 view .LVU573 + 1844 @ sp needed + 1845 .LVL148: + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1846 .loc 1 642 1 view .LVU574 + 1847 009e 10BD pop {r4, pc} + 1848 .LVL149: + 1849 .L152: + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1850 .loc 1 556 5 is_stmt 1 view .LVU575 + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1851 .loc 1 556 16 is_stmt 0 view .LVU576 + 1852 00a0 4033 adds r3, r3, #64 + 1853 00a2 0022 movs r2, #0 + 1854 00a4 C254 strb r2, [r0, r3] + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1855 .loc 1 580 5 is_stmt 1 view .LVU577 + 1856 00a6 FFF7FEFF bl HAL_I2C_MspInit + 1857 .LVL150: + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1858 .loc 1 580 5 is_stmt 0 view .LVU578 + 1859 00aa B0E7 b .L146 + 1860 .L153: + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1861 .loc 1 600 5 is_stmt 1 view .LVU579 + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1862 .loc 1 600 56 is_stmt 0 view .LVU580 + 1863 00ac A168 ldr r1, [r4, #8] + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1864 .loc 1 600 9 view .LVU581 + 1865 00ae 2268 ldr r2, [r4] + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1866 .loc 1 600 44 view .LVU582 + 1867 00b0 8023 movs r3, #128 + 1868 00b2 1B02 lsls r3, r3, #8 + 1869 00b4 0B43 orrs r3, r1 + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1870 .loc 1 600 26 view .LVU583 + 1871 00b6 9360 str r3, [r2, #8] + 1872 00b8 C4E7 b .L148 + 1873 .L154: + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1874 .loc 1 611 5 is_stmt 1 view .LVU584 + 1875 00ba 2268 ldr r2, [r4] + 1876 00bc 5168 ldr r1, [r2, #4] + 1877 00be 8023 movs r3, #128 + 1878 00c0 1B01 lsls r3, r3, #4 + ARM GAS /tmp/cc4IUqI9.s page 174 + + + 1879 00c2 0B43 orrs r3, r1 + 1880 00c4 5360 str r3, [r2, #4] + 1881 00c6 C5E7 b .L150 + 1882 .LVL151: + 1883 .L151: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1884 .loc 1 540 12 is_stmt 0 view .LVU585 + 1885 00c8 0120 movs r0, #1 + 1886 .LVL152: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1887 .loc 1 540 12 view .LVU586 + 1888 00ca E8E7 b .L145 + 1889 .L156: + 1890 .align 2 + 1891 .L155: + 1892 00cc FFFFFFF0 .word -251658241 + 1893 00d0 FF7FFFFF .word -32769 + 1894 00d4 FFF7FFFF .word -2049 + 1895 00d8 00800002 .word 33587200 + 1896 .cfi_endproc + 1897 .LFE40: + 1899 .section .text.HAL_I2C_MspDeInit,"ax",%progbits + 1900 .align 1 + 1901 .weak HAL_I2C_MspDeInit + 1902 .syntax unified + 1903 .code 16 + 1904 .thumb_func + 1906 HAL_I2C_MspDeInit: + 1907 .LVL153: + 1908 .LFB43: + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1909 .loc 1 713 1 is_stmt 1 view -0 + 1910 .cfi_startproc + 1911 @ args = 0, pretend = 0, frame = 0 + 1912 @ frame_needed = 0, uses_anonymous_args = 0 + 1913 @ link register save eliminated. + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1914 .loc 1 715 3 view .LVU588 + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1915 .loc 1 720 1 is_stmt 0 view .LVU589 + 1916 @ sp needed + 1917 0000 7047 bx lr + 1918 .cfi_endproc + 1919 .LFE43: + 1921 .section .text.HAL_I2C_DeInit,"ax",%progbits + 1922 .align 1 + 1923 .global HAL_I2C_DeInit + 1924 .syntax unified + 1925 .code 16 + 1926 .thumb_func + 1928 HAL_I2C_DeInit: + 1929 .LVL154: + 1930 .LFB41: + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1931 .loc 1 651 1 is_stmt 1 view -0 + 1932 .cfi_startproc + 1933 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc4IUqI9.s page 175 + + + 1934 @ frame_needed = 0, uses_anonymous_args = 0 + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1935 .loc 1 651 1 is_stmt 0 view .LVU591 + 1936 0000 70B5 push {r4, r5, r6, lr} + 1937 .cfi_def_cfa_offset 16 + 1938 .cfi_offset 4, -16 + 1939 .cfi_offset 5, -12 + 1940 .cfi_offset 6, -8 + 1941 .cfi_offset 14, -4 + 1942 0002 041E subs r4, r0, #0 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1943 .loc 1 653 3 is_stmt 1 view .LVU592 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1944 .loc 1 653 6 is_stmt 0 view .LVU593 + 1945 0004 13D0 beq .L160 + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1946 .loc 1 659 3 is_stmt 1 view .LVU594 + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1947 .loc 1 661 3 view .LVU595 + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1948 .loc 1 661 15 is_stmt 0 view .LVU596 + 1949 0006 4125 movs r5, #65 + 1950 0008 2423 movs r3, #36 + 1951 000a 4355 strb r3, [r0, r5] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1952 .loc 1 664 3 is_stmt 1 view .LVU597 + 1953 000c 0268 ldr r2, [r0] + 1954 000e 1368 ldr r3, [r2] + 1955 0010 0121 movs r1, #1 + 1956 0012 8B43 bics r3, r1 + 1957 0014 1360 str r3, [r2] + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1958 .loc 1 676 3 view .LVU598 + 1959 0016 FFF7FEFF bl HAL_I2C_MspDeInit + 1960 .LVL155: + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1961 .loc 1 679 3 view .LVU599 + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1962 .loc 1 679 19 is_stmt 0 view .LVU600 + 1963 001a 0023 movs r3, #0 + 1964 001c 6364 str r3, [r4, #68] + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1965 .loc 1 680 3 is_stmt 1 view .LVU601 + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1966 .loc 1 680 15 is_stmt 0 view .LVU602 + 1967 001e 6355 strb r3, [r4, r5] + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1968 .loc 1 681 3 is_stmt 1 view .LVU603 + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1969 .loc 1 681 23 is_stmt 0 view .LVU604 + 1970 0020 2363 str r3, [r4, #48] + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1971 .loc 1 682 3 is_stmt 1 view .LVU605 + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1972 .loc 1 682 14 is_stmt 0 view .LVU606 + 1973 0022 4222 movs r2, #66 + 1974 0024 A354 strb r3, [r4, r2] + ARM GAS /tmp/cc4IUqI9.s page 176 + + + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1975 .loc 1 685 3 is_stmt 1 view .LVU607 + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1976 .loc 1 685 3 view .LVU608 + 1977 0026 023A subs r2, r2, #2 + 1978 0028 A354 strb r3, [r4, r2] + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1979 .loc 1 685 3 view .LVU609 + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1980 .loc 1 687 3 view .LVU610 + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1981 .loc 1 687 10 is_stmt 0 view .LVU611 + 1982 002a 0020 movs r0, #0 + 1983 .L159: + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1984 .loc 1 688 1 view .LVU612 + 1985 @ sp needed + 1986 .LVL156: + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1987 .loc 1 688 1 view .LVU613 + 1988 002c 70BD pop {r4, r5, r6, pc} + 1989 .LVL157: + 1990 .L160: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1991 .loc 1 655 12 view .LVU614 + 1992 002e 0120 movs r0, #1 + 1993 .LVL158: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1994 .loc 1 655 12 view .LVU615 + 1995 0030 FCE7 b .L159 + 1996 .cfi_endproc + 1997 .LFE41: + 1999 .section .text.HAL_I2C_Master_Transmit,"ax",%progbits + 2000 .align 1 + 2001 .global HAL_I2C_Master_Transmit + 2002 .syntax unified + 2003 .code 16 + 2004 .thumb_func + 2006 HAL_I2C_Master_Transmit: + 2007 .LVL159: + 2008 .LFB44: +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2009 .loc 1 1121 1 is_stmt 1 view -0 + 2010 .cfi_startproc + 2011 @ args = 4, pretend = 0, frame = 8 + 2012 @ frame_needed = 0, uses_anonymous_args = 0 +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2013 .loc 1 1121 1 is_stmt 0 view .LVU617 + 2014 0000 F0B5 push {r4, r5, r6, r7, lr} + 2015 .cfi_def_cfa_offset 20 + 2016 .cfi_offset 4, -20 + 2017 .cfi_offset 5, -16 + 2018 .cfi_offset 6, -12 + 2019 .cfi_offset 7, -8 + 2020 .cfi_offset 14, -4 + 2021 0002 85B0 sub sp, sp, #20 + 2022 .cfi_def_cfa_offset 40 + ARM GAS /tmp/cc4IUqI9.s page 177 + + + 2023 0004 0400 movs r4, r0 + 2024 0006 0E00 movs r6, r1 + 2025 0008 0292 str r2, [sp, #8] + 2026 000a 0393 str r3, [sp, #12] + 2027 000c 0A9D ldr r5, [sp, #40] +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 2028 .loc 1 1122 3 is_stmt 1 view .LVU618 +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2029 .loc 1 1123 3 view .LVU619 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2030 .loc 1 1125 3 view .LVU620 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2031 .loc 1 1125 11 is_stmt 0 view .LVU621 + 2032 000e 4123 movs r3, #65 + 2033 .LVL160: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2034 .loc 1 1125 11 view .LVU622 + 2035 0010 C35C ldrb r3, [r0, r3] +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2036 .loc 1 1125 6 view .LVU623 + 2037 0012 202B cmp r3, #32 + 2038 0014 00D0 beq .LCB1959 + 2039 0016 AEE0 b .L171 @long jump + 2040 .LCB1959: +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2041 .loc 1 1128 5 is_stmt 1 view .LVU624 +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2042 .loc 1 1128 5 view .LVU625 + 2043 0018 2033 adds r3, r3, #32 + 2044 001a C35C ldrb r3, [r0, r3] + 2045 001c 012B cmp r3, #1 + 2046 001e 00D1 bne .LCB1965 + 2047 0020 ACE0 b .L172 @long jump + 2048 .LCB1965: +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2049 .loc 1 1128 5 discriminator 2 view .LVU626 + 2050 0022 4023 movs r3, #64 + 2051 0024 0122 movs r2, #1 + 2052 .LVL161: +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2053 .loc 1 1128 5 is_stmt 0 discriminator 2 view .LVU627 + 2054 0026 C254 strb r2, [r0, r3] +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2055 .loc 1 1128 5 is_stmt 1 discriminator 2 view .LVU628 +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2056 .loc 1 1131 5 view .LVU629 +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2057 .loc 1 1131 17 is_stmt 0 view .LVU630 + 2058 0028 FFF7FEFF bl HAL_GetTick + 2059 .LVL162: +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2060 .loc 1 1131 17 view .LVU631 + 2061 002c 0700 movs r7, r0 + 2062 .LVL163: +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2063 .loc 1 1133 5 is_stmt 1 view .LVU632 +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 178 + + + 2064 .loc 1 1133 9 is_stmt 0 view .LVU633 + 2065 002e 8021 movs r1, #128 + 2066 0030 0090 str r0, [sp] + 2067 0032 1923 movs r3, #25 + 2068 0034 0122 movs r2, #1 + 2069 0036 0902 lsls r1, r1, #8 + 2070 0038 2000 movs r0, r4 + 2071 .LVL164: +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2072 .loc 1 1133 9 view .LVU634 + 2073 003a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2074 .LVL165: +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2075 .loc 1 1133 8 discriminator 1 view .LVU635 + 2076 003e 0028 cmp r0, #0 + 2077 0040 00D0 beq .LCB1989 + 2078 0042 9DE0 b .L173 @long jump + 2079 .LCB1989: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2080 .loc 1 1138 5 is_stmt 1 view .LVU636 +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2081 .loc 1 1138 21 is_stmt 0 view .LVU637 + 2082 0044 4123 movs r3, #65 + 2083 0046 2122 movs r2, #33 + 2084 0048 E254 strb r2, [r4, r3] +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2085 .loc 1 1139 5 is_stmt 1 view .LVU638 +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2086 .loc 1 1139 21 is_stmt 0 view .LVU639 + 2087 004a 0133 adds r3, r3, #1 + 2088 004c 113A subs r2, r2, #17 + 2089 004e E254 strb r2, [r4, r3] +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2090 .loc 1 1140 5 is_stmt 1 view .LVU640 +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2091 .loc 1 1140 21 is_stmt 0 view .LVU641 + 2092 0050 0023 movs r3, #0 + 2093 0052 6364 str r3, [r4, #68] +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2094 .loc 1 1143 5 is_stmt 1 view .LVU642 +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2095 .loc 1 1143 21 is_stmt 0 view .LVU643 + 2096 0054 029A ldr r2, [sp, #8] + 2097 0056 6262 str r2, [r4, #36] +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2098 .loc 1 1144 5 is_stmt 1 view .LVU644 +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2099 .loc 1 1144 21 is_stmt 0 view .LVU645 + 2100 0058 039A ldr r2, [sp, #12] + 2101 005a 6285 strh r2, [r4, #42] +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2102 .loc 1 1145 5 is_stmt 1 view .LVU646 +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2103 .loc 1 1145 21 is_stmt 0 view .LVU647 + 2104 005c 6363 str r3, [r4, #52] +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2105 .loc 1 1147 5 is_stmt 1 view .LVU648 + ARM GAS /tmp/cc4IUqI9.s page 179 + + +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2106 .loc 1 1147 13 is_stmt 0 view .LVU649 + 2107 005e 638D ldrh r3, [r4, #42] + 2108 0060 9BB2 uxth r3, r3 +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2109 .loc 1 1147 8 view .LVU650 + 2110 0062 FF2B cmp r3, #255 + 2111 0064 1ED9 bls .L163 +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 2112 .loc 1 1149 7 is_stmt 1 view .LVU651 +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 2113 .loc 1 1149 22 is_stmt 0 view .LVU652 + 2114 0066 FF23 movs r3, #255 + 2115 0068 2385 strh r3, [r4, #40] +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2116 .loc 1 1150 7 is_stmt 1 view .LVU653 + 2117 .LVL166: +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2118 .loc 1 1150 16 is_stmt 0 view .LVU654 + 2119 006a 8023 movs r3, #128 + 2120 006c 5B04 lsls r3, r3, #17 + 2121 .LVL167: + 2122 .L164: +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2123 .loc 1 1158 5 is_stmt 1 view .LVU655 +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2124 .loc 1 1158 13 is_stmt 0 view .LVU656 + 2125 006e 228D ldrh r2, [r4, #40] +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2126 .loc 1 1158 8 view .LVU657 + 2127 0070 002A cmp r2, #0 + 2128 0072 1CD0 beq .L165 +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2129 .loc 1 1162 7 is_stmt 1 view .LVU658 +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2130 .loc 1 1162 11 is_stmt 0 view .LVU659 + 2131 0074 2268 ldr r2, [r4] +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2132 .loc 1 1162 30 view .LVU660 + 2133 0076 0299 ldr r1, [sp, #8] + 2134 0078 0978 ldrb r1, [r1] +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2135 .loc 1 1162 28 view .LVU661 + 2136 007a 9162 str r1, [r2, #40] +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2137 .loc 1 1165 7 is_stmt 1 view .LVU662 +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2138 .loc 1 1165 11 is_stmt 0 view .LVU663 + 2139 007c 626A ldr r2, [r4, #36] +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2140 .loc 1 1165 21 view .LVU664 + 2141 007e 0132 adds r2, r2, #1 + 2142 0080 6262 str r2, [r4, #36] +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2143 .loc 1 1167 7 is_stmt 1 view .LVU665 +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2144 .loc 1 1167 11 is_stmt 0 view .LVU666 + ARM GAS /tmp/cc4IUqI9.s page 180 + + + 2145 0082 628D ldrh r2, [r4, #42] +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2146 .loc 1 1167 22 view .LVU667 + 2147 0084 013A subs r2, r2, #1 + 2148 0086 92B2 uxth r2, r2 + 2149 0088 6285 strh r2, [r4, #42] +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2150 .loc 1 1168 7 is_stmt 1 view .LVU668 +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2151 .loc 1 1168 11 is_stmt 0 view .LVU669 + 2152 008a 228D ldrh r2, [r4, #40] +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2153 .loc 1 1168 21 view .LVU670 + 2154 008c 013A subs r2, r2, #1 + 2155 008e 92B2 uxth r2, r2 + 2156 0090 2285 strh r2, [r4, #40] +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 2157 .loc 1 1172 7 is_stmt 1 view .LVU671 + 2158 0092 0132 adds r2, r2, #1 + 2159 0094 D2B2 uxtb r2, r2 + 2160 0096 3E49 ldr r1, .L178 + 2161 0098 0091 str r1, [sp] + 2162 009a 3100 movs r1, r6 + 2163 009c 2000 movs r0, r4 + 2164 009e FFF7FEFF bl I2C_TransferConfig + 2165 .LVL168: +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 2166 .loc 1 1172 7 is_stmt 0 view .LVU672 + 2167 00a2 18E0 b .L167 + 2168 .LVL169: + 2169 .L163: +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 2170 .loc 1 1154 7 is_stmt 1 view .LVU673 +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 2171 .loc 1 1154 28 is_stmt 0 view .LVU674 + 2172 00a4 638D ldrh r3, [r4, #42] +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 2173 .loc 1 1154 22 view .LVU675 + 2174 00a6 2385 strh r3, [r4, #40] +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2175 .loc 1 1155 7 is_stmt 1 view .LVU676 + 2176 .LVL170: +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2177 .loc 1 1155 16 is_stmt 0 view .LVU677 + 2178 00a8 8023 movs r3, #128 + 2179 00aa 9B04 lsls r3, r3, #18 + 2180 00ac DFE7 b .L164 + 2181 .LVL171: + 2182 .L165: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 2183 .loc 1 1179 7 is_stmt 1 view .LVU678 + 2184 00ae D2B2 uxtb r2, r2 + 2185 00b0 3749 ldr r1, .L178 + 2186 00b2 0091 str r1, [sp] + 2187 00b4 3100 movs r1, r6 + 2188 00b6 2000 movs r0, r4 + 2189 00b8 FFF7FEFF bl I2C_TransferConfig + ARM GAS /tmp/cc4IUqI9.s page 181 + + + 2190 .LVL172: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 2191 .loc 1 1179 7 is_stmt 0 view .LVU679 + 2192 00bc 0BE0 b .L167 + 2193 .L169: +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2194 .loc 1 1215 11 is_stmt 1 view .LVU680 +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2195 .loc 1 1215 32 is_stmt 0 view .LVU681 + 2196 00be 628D ldrh r2, [r4, #42] + 2197 00c0 92B2 uxth r2, r2 +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2198 .loc 1 1215 26 view .LVU682 + 2199 00c2 2285 strh r2, [r4, #40] +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2200 .loc 1 1216 11 is_stmt 1 view .LVU683 + 2201 00c4 8023 movs r3, #128 + 2202 00c6 D2B2 uxtb r2, r2 + 2203 00c8 0021 movs r1, #0 + 2204 00ca 0091 str r1, [sp] + 2205 00cc 9B04 lsls r3, r3, #18 + 2206 00ce 3100 movs r1, r6 + 2207 00d0 2000 movs r0, r4 + 2208 00d2 FFF7FEFF bl I2C_TransferConfig + 2209 .LVL173: + 2210 .L167: +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2211 .loc 1 1183 28 view .LVU684 +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2212 .loc 1 1183 16 is_stmt 0 view .LVU685 + 2213 00d6 638D ldrh r3, [r4, #42] + 2214 00d8 9BB2 uxth r3, r3 +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2215 .loc 1 1183 28 view .LVU686 + 2216 00da 002B cmp r3, #0 + 2217 00dc 34D0 beq .L177 +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2218 .loc 1 1186 7 is_stmt 1 view .LVU687 +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2219 .loc 1 1186 11 is_stmt 0 view .LVU688 + 2220 00de 3A00 movs r2, r7 + 2221 00e0 2900 movs r1, r5 + 2222 00e2 2000 movs r0, r4 + 2223 00e4 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 2224 .LVL174: +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2225 .loc 1 1186 10 discriminator 1 view .LVU689 + 2226 00e8 0028 cmp r0, #0 + 2227 00ea 4BD1 bne .L174 +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2228 .loc 1 1191 7 is_stmt 1 view .LVU690 +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2229 .loc 1 1191 35 is_stmt 0 view .LVU691 + 2230 00ec 626A ldr r2, [r4, #36] +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2231 .loc 1 1191 11 view .LVU692 + 2232 00ee 2368 ldr r3, [r4] + ARM GAS /tmp/cc4IUqI9.s page 182 + + +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2233 .loc 1 1191 30 view .LVU693 + 2234 00f0 1278 ldrb r2, [r2] +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2235 .loc 1 1191 28 view .LVU694 + 2236 00f2 9A62 str r2, [r3, #40] +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2237 .loc 1 1194 7 is_stmt 1 view .LVU695 +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2238 .loc 1 1194 11 is_stmt 0 view .LVU696 + 2239 00f4 636A ldr r3, [r4, #36] +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2240 .loc 1 1194 21 view .LVU697 + 2241 00f6 0133 adds r3, r3, #1 + 2242 00f8 6362 str r3, [r4, #36] +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2243 .loc 1 1196 7 is_stmt 1 view .LVU698 +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2244 .loc 1 1196 11 is_stmt 0 view .LVU699 + 2245 00fa 638D ldrh r3, [r4, #42] +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2246 .loc 1 1196 22 view .LVU700 + 2247 00fc 013B subs r3, r3, #1 + 2248 00fe 9BB2 uxth r3, r3 + 2249 0100 6385 strh r3, [r4, #42] +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2250 .loc 1 1197 7 is_stmt 1 view .LVU701 +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2251 .loc 1 1197 11 is_stmt 0 view .LVU702 + 2252 0102 238D ldrh r3, [r4, #40] +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2253 .loc 1 1197 21 view .LVU703 + 2254 0104 013B subs r3, r3, #1 + 2255 0106 9BB2 uxth r3, r3 + 2256 0108 2385 strh r3, [r4, #40] +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2257 .loc 1 1199 7 is_stmt 1 view .LVU704 +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2258 .loc 1 1199 16 is_stmt 0 view .LVU705 + 2259 010a 628D ldrh r2, [r4, #42] + 2260 010c 92B2 uxth r2, r2 +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2261 .loc 1 1199 10 view .LVU706 + 2262 010e 002A cmp r2, #0 + 2263 0110 E1D0 beq .L167 +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2264 .loc 1 1199 35 discriminator 1 view .LVU707 + 2265 0112 002B cmp r3, #0 + 2266 0114 DFD1 bne .L167 +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2267 .loc 1 1202 9 is_stmt 1 view .LVU708 +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2268 .loc 1 1202 13 is_stmt 0 view .LVU709 + 2269 0116 0097 str r7, [sp] + 2270 0118 2B00 movs r3, r5 + 2271 011a 0022 movs r2, #0 + 2272 011c 8021 movs r1, #128 + ARM GAS /tmp/cc4IUqI9.s page 183 + + + 2273 011e 2000 movs r0, r4 + 2274 0120 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2275 .LVL175: +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2276 .loc 1 1202 12 discriminator 1 view .LVU710 + 2277 0124 0028 cmp r0, #0 + 2278 0126 2FD1 bne .L175 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2279 .loc 1 1207 9 is_stmt 1 view .LVU711 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2280 .loc 1 1207 17 is_stmt 0 view .LVU712 + 2281 0128 638D ldrh r3, [r4, #42] + 2282 012a 9BB2 uxth r3, r3 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2283 .loc 1 1207 12 view .LVU713 + 2284 012c FF2B cmp r3, #255 + 2285 012e C6D9 bls .L169 +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2286 .loc 1 1209 11 is_stmt 1 view .LVU714 +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2287 .loc 1 1209 26 is_stmt 0 view .LVU715 + 2288 0130 FF23 movs r3, #255 + 2289 0132 2385 strh r3, [r4, #40] +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2290 .loc 1 1210 11 is_stmt 1 view .LVU716 + 2291 0134 7F3B subs r3, r3, #127 + 2292 0136 0022 movs r2, #0 + 2293 0138 0092 str r2, [sp] + 2294 013a 5B04 lsls r3, r3, #17 + 2295 013c FF32 adds r2, r2, #255 + 2296 013e 3100 movs r1, r6 + 2297 0140 2000 movs r0, r4 + 2298 0142 FFF7FEFF bl I2C_TransferConfig + 2299 .LVL176: + 2300 0146 C6E7 b .L167 + 2301 .L177: +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2302 .loc 1 1224 5 view .LVU717 +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2303 .loc 1 1224 9 is_stmt 0 view .LVU718 + 2304 0148 3A00 movs r2, r7 + 2305 014a 2900 movs r1, r5 + 2306 014c 2000 movs r0, r4 + 2307 014e FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2308 .LVL177: +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2309 .loc 1 1224 8 discriminator 1 view .LVU719 + 2310 0152 0028 cmp r0, #0 + 2311 0154 1AD1 bne .L176 +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2312 .loc 1 1230 5 is_stmt 1 view .LVU720 + 2313 0156 2368 ldr r3, [r4] + 2314 0158 2022 movs r2, #32 + 2315 015a DA61 str r2, [r3, #28] +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2316 .loc 1 1233 5 view .LVU721 + 2317 015c 2168 ldr r1, [r4] + ARM GAS /tmp/cc4IUqI9.s page 184 + + + 2318 015e 4B68 ldr r3, [r1, #4] + 2319 0160 0C4D ldr r5, .L178+4 + 2320 0162 2B40 ands r3, r5 + 2321 0164 4B60 str r3, [r1, #4] +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2322 .loc 1 1235 5 view .LVU722 +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2323 .loc 1 1235 17 is_stmt 0 view .LVU723 + 2324 0166 4123 movs r3, #65 + 2325 0168 E254 strb r2, [r4, r3] +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2326 .loc 1 1236 5 is_stmt 1 view .LVU724 +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2327 .loc 1 1236 17 is_stmt 0 view .LVU725 + 2328 016a 0023 movs r3, #0 + 2329 016c 2232 adds r2, r2, #34 + 2330 016e A354 strb r3, [r4, r2] +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2331 .loc 1 1239 5 is_stmt 1 view .LVU726 +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2332 .loc 1 1239 5 view .LVU727 + 2333 0170 023A subs r2, r2, #2 + 2334 0172 A354 strb r3, [r4, r2] +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2335 .loc 1 1239 5 view .LVU728 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2336 .loc 1 1241 5 view .LVU729 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2337 .loc 1 1241 12 is_stmt 0 view .LVU730 + 2338 0174 00E0 b .L162 + 2339 .LVL178: + 2340 .L171: +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2341 .loc 1 1245 12 view .LVU731 + 2342 0176 0220 movs r0, #2 + 2343 .LVL179: + 2344 .L162: +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2345 .loc 1 1247 1 view .LVU732 + 2346 0178 05B0 add sp, sp, #20 + 2347 @ sp needed + 2348 .LVL180: + 2349 .LVL181: +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2350 .loc 1 1247 1 view .LVU733 + 2351 017a F0BD pop {r4, r5, r6, r7, pc} + 2352 .LVL182: + 2353 .L172: +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2354 .loc 1 1128 5 discriminator 1 view .LVU734 + 2355 017c 0220 movs r0, #2 + 2356 .LVL183: +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2357 .loc 1 1128 5 discriminator 1 view .LVU735 + 2358 017e FBE7 b .L162 + 2359 .LVL184: + 2360 .L173: + ARM GAS /tmp/cc4IUqI9.s page 185 + + +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2361 .loc 1 1135 14 view .LVU736 + 2362 0180 0120 movs r0, #1 + 2363 0182 F9E7 b .L162 + 2364 .LVL185: + 2365 .L174: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2366 .loc 1 1188 16 view .LVU737 + 2367 0184 0120 movs r0, #1 + 2368 0186 F7E7 b .L162 + 2369 .L175: +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2370 .loc 1 1204 18 view .LVU738 + 2371 0188 0120 movs r0, #1 + 2372 018a F5E7 b .L162 + 2373 .L176: +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2374 .loc 1 1226 14 view .LVU739 + 2375 018c 0120 movs r0, #1 + 2376 018e F3E7 b .L162 + 2377 .L179: + 2378 .align 2 + 2379 .L178: + 2380 0190 00200080 .word -2147475456 + 2381 0194 00E800FE .word -33495040 + 2382 .cfi_endproc + 2383 .LFE44: + 2385 .section .text.HAL_I2C_Master_Receive,"ax",%progbits + 2386 .align 1 + 2387 .global HAL_I2C_Master_Receive + 2388 .syntax unified + 2389 .code 16 + 2390 .thumb_func + 2392 HAL_I2C_Master_Receive: + 2393 .LVL186: + 2394 .LFB45: +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2395 .loc 1 1262 1 is_stmt 1 view -0 + 2396 .cfi_startproc + 2397 @ args = 4, pretend = 0, frame = 8 + 2398 @ frame_needed = 0, uses_anonymous_args = 0 +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2399 .loc 1 1262 1 is_stmt 0 view .LVU741 + 2400 0000 F0B5 push {r4, r5, r6, r7, lr} + 2401 .cfi_def_cfa_offset 20 + 2402 .cfi_offset 4, -20 + 2403 .cfi_offset 5, -16 + 2404 .cfi_offset 6, -12 + 2405 .cfi_offset 7, -8 + 2406 .cfi_offset 14, -4 + 2407 0002 85B0 sub sp, sp, #20 + 2408 .cfi_def_cfa_offset 40 + 2409 0004 0400 movs r4, r0 + 2410 0006 0F00 movs r7, r1 + 2411 0008 0292 str r2, [sp, #8] + 2412 000a 0393 str r3, [sp, #12] + 2413 000c 0A9D ldr r5, [sp, #40] + ARM GAS /tmp/cc4IUqI9.s page 186 + + +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2414 .loc 1 1263 3 is_stmt 1 view .LVU742 +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2415 .loc 1 1265 3 view .LVU743 +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2416 .loc 1 1265 11 is_stmt 0 view .LVU744 + 2417 000e 4123 movs r3, #65 + 2418 .LVL187: +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2419 .loc 1 1265 11 view .LVU745 + 2420 0010 C35C ldrb r3, [r0, r3] +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2421 .loc 1 1265 6 view .LVU746 + 2422 0012 202B cmp r3, #32 + 2423 0014 00D0 beq .LCB2326 + 2424 0016 9BE0 b .L188 @long jump + 2425 .LCB2326: +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2426 .loc 1 1268 5 is_stmt 1 view .LVU747 +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2427 .loc 1 1268 5 view .LVU748 + 2428 0018 2033 adds r3, r3, #32 + 2429 001a C35C ldrb r3, [r0, r3] + 2430 001c 012B cmp r3, #1 + 2431 001e 00D1 bne .LCB2332 + 2432 0020 99E0 b .L189 @long jump + 2433 .LCB2332: +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2434 .loc 1 1268 5 discriminator 2 view .LVU749 + 2435 0022 4023 movs r3, #64 + 2436 0024 0122 movs r2, #1 + 2437 .LVL188: +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2438 .loc 1 1268 5 is_stmt 0 discriminator 2 view .LVU750 + 2439 0026 C254 strb r2, [r0, r3] +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2440 .loc 1 1268 5 is_stmt 1 discriminator 2 view .LVU751 +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2441 .loc 1 1271 5 view .LVU752 +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2442 .loc 1 1271 17 is_stmt 0 view .LVU753 + 2443 0028 FFF7FEFF bl HAL_GetTick + 2444 .LVL189: +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2445 .loc 1 1271 17 view .LVU754 + 2446 002c 0600 movs r6, r0 + 2447 .LVL190: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2448 .loc 1 1273 5 is_stmt 1 view .LVU755 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2449 .loc 1 1273 9 is_stmt 0 view .LVU756 + 2450 002e 8021 movs r1, #128 + 2451 0030 0090 str r0, [sp] + 2452 0032 1923 movs r3, #25 + 2453 0034 0122 movs r2, #1 + 2454 0036 0902 lsls r1, r1, #8 + 2455 0038 2000 movs r0, r4 + ARM GAS /tmp/cc4IUqI9.s page 187 + + + 2456 .LVL191: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2457 .loc 1 1273 9 view .LVU757 + 2458 003a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2459 .LVL192: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2460 .loc 1 1273 8 discriminator 1 view .LVU758 + 2461 003e 0028 cmp r0, #0 + 2462 0040 00D0 beq .LCB2356 + 2463 0042 8AE0 b .L190 @long jump + 2464 .LCB2356: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2465 .loc 1 1278 5 is_stmt 1 view .LVU759 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2466 .loc 1 1278 21 is_stmt 0 view .LVU760 + 2467 0044 4123 movs r3, #65 + 2468 0046 2222 movs r2, #34 + 2469 0048 E254 strb r2, [r4, r3] +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2470 .loc 1 1279 5 is_stmt 1 view .LVU761 +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2471 .loc 1 1279 21 is_stmt 0 view .LVU762 + 2472 004a 0133 adds r3, r3, #1 + 2473 004c 123A subs r2, r2, #18 + 2474 004e E254 strb r2, [r4, r3] +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2475 .loc 1 1280 5 is_stmt 1 view .LVU763 +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2476 .loc 1 1280 21 is_stmt 0 view .LVU764 + 2477 0050 0023 movs r3, #0 + 2478 0052 6364 str r3, [r4, #68] +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2479 .loc 1 1283 5 is_stmt 1 view .LVU765 +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2480 .loc 1 1283 21 is_stmt 0 view .LVU766 + 2481 0054 029A ldr r2, [sp, #8] + 2482 0056 6262 str r2, [r4, #36] +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2483 .loc 1 1284 5 is_stmt 1 view .LVU767 +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2484 .loc 1 1284 21 is_stmt 0 view .LVU768 + 2485 0058 039A ldr r2, [sp, #12] + 2486 005a 6285 strh r2, [r4, #42] +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2487 .loc 1 1285 5 is_stmt 1 view .LVU769 +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2488 .loc 1 1285 21 is_stmt 0 view .LVU770 + 2489 005c 6363 str r3, [r4, #52] +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2490 .loc 1 1289 5 is_stmt 1 view .LVU771 +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2491 .loc 1 1289 13 is_stmt 0 view .LVU772 + 2492 005e 638D ldrh r3, [r4, #42] + 2493 0060 9BB2 uxth r3, r3 +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2494 .loc 1 1289 8 view .LVU773 + 2495 0062 FF2B cmp r3, #255 + ARM GAS /tmp/cc4IUqI9.s page 188 + + + 2496 0064 0BD9 bls .L182 +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2497 .loc 1 1291 7 is_stmt 1 view .LVU774 +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2498 .loc 1 1291 22 is_stmt 0 view .LVU775 + 2499 0066 0123 movs r3, #1 + 2500 0068 2385 strh r3, [r4, #40] +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 2501 .loc 1 1292 7 is_stmt 1 view .LVU776 + 2502 006a 7F33 adds r3, r3, #127 + 2503 006c 3F4A ldr r2, .L195 + 2504 006e 0092 str r2, [sp] + 2505 0070 5B04 lsls r3, r3, #17 + 2506 0072 0122 movs r2, #1 + 2507 0074 3900 movs r1, r7 + 2508 0076 2000 movs r0, r4 + 2509 0078 FFF7FEFF bl I2C_TransferConfig + 2510 .LVL193: + 2511 007c 18E0 b .L184 + 2512 .L182: +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2513 .loc 1 1297 7 view .LVU777 +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2514 .loc 1 1297 28 is_stmt 0 view .LVU778 + 2515 007e 628D ldrh r2, [r4, #42] + 2516 0080 92B2 uxth r2, r2 +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2517 .loc 1 1297 22 view .LVU779 + 2518 0082 2285 strh r2, [r4, #40] +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 2519 .loc 1 1298 7 is_stmt 1 view .LVU780 + 2520 0084 8023 movs r3, #128 + 2521 0086 D2B2 uxtb r2, r2 + 2522 0088 3849 ldr r1, .L195 + 2523 008a 0091 str r1, [sp] + 2524 008c 9B04 lsls r3, r3, #18 + 2525 008e 3900 movs r1, r7 + 2526 0090 2000 movs r0, r4 + 2527 0092 FFF7FEFF bl I2C_TransferConfig + 2528 .LVL194: + 2529 0096 0BE0 b .L184 + 2530 .L186: +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2531 .loc 1 1335 11 view .LVU781 +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2532 .loc 1 1335 32 is_stmt 0 view .LVU782 + 2533 0098 628D ldrh r2, [r4, #42] + 2534 009a 92B2 uxth r2, r2 +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2535 .loc 1 1335 26 view .LVU783 + 2536 009c 2285 strh r2, [r4, #40] +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2537 .loc 1 1336 11 is_stmt 1 view .LVU784 + 2538 009e 8023 movs r3, #128 + 2539 00a0 D2B2 uxtb r2, r2 + 2540 00a2 0021 movs r1, #0 + 2541 00a4 0091 str r1, [sp] + ARM GAS /tmp/cc4IUqI9.s page 189 + + + 2542 00a6 9B04 lsls r3, r3, #18 + 2543 00a8 3900 movs r1, r7 + 2544 00aa 2000 movs r0, r4 + 2545 00ac FFF7FEFF bl I2C_TransferConfig + 2546 .LVL195: + 2547 .L184: +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2548 .loc 1 1302 28 view .LVU785 +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2549 .loc 1 1302 16 is_stmt 0 view .LVU786 + 2550 00b0 638D ldrh r3, [r4, #42] + 2551 00b2 9BB2 uxth r3, r3 +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2552 .loc 1 1302 28 view .LVU787 + 2553 00b4 002B cmp r3, #0 + 2554 00b6 34D0 beq .L194 +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2555 .loc 1 1305 7 is_stmt 1 view .LVU788 +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2556 .loc 1 1305 11 is_stmt 0 view .LVU789 + 2557 00b8 3200 movs r2, r6 + 2558 00ba 2900 movs r1, r5 + 2559 00bc 2000 movs r0, r4 + 2560 00be FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 2561 .LVL196: +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2562 .loc 1 1305 10 discriminator 1 view .LVU790 + 2563 00c2 0028 cmp r0, #0 + 2564 00c4 4BD1 bne .L191 +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2565 .loc 1 1311 7 is_stmt 1 view .LVU791 +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2566 .loc 1 1311 38 is_stmt 0 view .LVU792 + 2567 00c6 2368 ldr r3, [r4] +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2568 .loc 1 1311 48 view .LVU793 + 2569 00c8 5A6A ldr r2, [r3, #36] +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2570 .loc 1 1311 12 view .LVU794 + 2571 00ca 636A ldr r3, [r4, #36] +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2572 .loc 1 1311 23 view .LVU795 + 2573 00cc 1A70 strb r2, [r3] +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2574 .loc 1 1314 7 is_stmt 1 view .LVU796 +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2575 .loc 1 1314 11 is_stmt 0 view .LVU797 + 2576 00ce 636A ldr r3, [r4, #36] +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2577 .loc 1 1314 21 view .LVU798 + 2578 00d0 0133 adds r3, r3, #1 + 2579 00d2 6362 str r3, [r4, #36] +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 2580 .loc 1 1316 7 is_stmt 1 view .LVU799 +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 2581 .loc 1 1316 11 is_stmt 0 view .LVU800 + 2582 00d4 238D ldrh r3, [r4, #40] + ARM GAS /tmp/cc4IUqI9.s page 190 + + +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 2583 .loc 1 1316 21 view .LVU801 + 2584 00d6 013B subs r3, r3, #1 + 2585 00d8 9BB2 uxth r3, r3 + 2586 00da 2385 strh r3, [r4, #40] +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2587 .loc 1 1317 7 is_stmt 1 view .LVU802 +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2588 .loc 1 1317 11 is_stmt 0 view .LVU803 + 2589 00dc 628D ldrh r2, [r4, #42] +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2590 .loc 1 1317 22 view .LVU804 + 2591 00de 013A subs r2, r2, #1 + 2592 00e0 92B2 uxth r2, r2 + 2593 00e2 6285 strh r2, [r4, #42] +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2594 .loc 1 1319 7 is_stmt 1 view .LVU805 +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2595 .loc 1 1319 16 is_stmt 0 view .LVU806 + 2596 00e4 628D ldrh r2, [r4, #42] + 2597 00e6 92B2 uxth r2, r2 +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2598 .loc 1 1319 10 view .LVU807 + 2599 00e8 002A cmp r2, #0 + 2600 00ea E1D0 beq .L184 +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2601 .loc 1 1319 35 discriminator 1 view .LVU808 + 2602 00ec 002B cmp r3, #0 + 2603 00ee DFD1 bne .L184 +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2604 .loc 1 1322 9 is_stmt 1 view .LVU809 +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2605 .loc 1 1322 13 is_stmt 0 view .LVU810 + 2606 00f0 0096 str r6, [sp] + 2607 00f2 2B00 movs r3, r5 + 2608 00f4 0022 movs r2, #0 + 2609 00f6 8021 movs r1, #128 + 2610 00f8 2000 movs r0, r4 + 2611 00fa FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2612 .LVL197: +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2613 .loc 1 1322 12 discriminator 1 view .LVU811 + 2614 00fe 0028 cmp r0, #0 + 2615 0100 2FD1 bne .L192 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2616 .loc 1 1327 9 is_stmt 1 view .LVU812 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2617 .loc 1 1327 17 is_stmt 0 view .LVU813 + 2618 0102 638D ldrh r3, [r4, #42] + 2619 0104 9BB2 uxth r3, r3 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2620 .loc 1 1327 12 view .LVU814 + 2621 0106 FF2B cmp r3, #255 + 2622 0108 C6D9 bls .L186 +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2623 .loc 1 1329 11 is_stmt 1 view .LVU815 +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + ARM GAS /tmp/cc4IUqI9.s page 191 + + + 2624 .loc 1 1329 26 is_stmt 0 view .LVU816 + 2625 010a FF23 movs r3, #255 + 2626 010c 2385 strh r3, [r4, #40] +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2627 .loc 1 1330 11 is_stmt 1 view .LVU817 + 2628 010e 7F3B subs r3, r3, #127 + 2629 0110 0022 movs r2, #0 + 2630 0112 0092 str r2, [sp] + 2631 0114 5B04 lsls r3, r3, #17 + 2632 0116 FF32 adds r2, r2, #255 + 2633 0118 3900 movs r1, r7 + 2634 011a 2000 movs r0, r4 + 2635 011c FFF7FEFF bl I2C_TransferConfig + 2636 .LVL198: + 2637 0120 C6E7 b .L184 + 2638 .L194: +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2639 .loc 1 1344 5 view .LVU818 +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2640 .loc 1 1344 9 is_stmt 0 view .LVU819 + 2641 0122 3200 movs r2, r6 + 2642 0124 2900 movs r1, r5 + 2643 0126 2000 movs r0, r4 + 2644 0128 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2645 .LVL199: +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2646 .loc 1 1344 8 discriminator 1 view .LVU820 + 2647 012c 0028 cmp r0, #0 + 2648 012e 1AD1 bne .L193 +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2649 .loc 1 1350 5 is_stmt 1 view .LVU821 + 2650 0130 2368 ldr r3, [r4] + 2651 0132 2022 movs r2, #32 + 2652 0134 DA61 str r2, [r3, #28] +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2653 .loc 1 1353 5 view .LVU822 + 2654 0136 2168 ldr r1, [r4] + 2655 0138 4B68 ldr r3, [r1, #4] + 2656 013a 0D4D ldr r5, .L195+4 + 2657 013c 2B40 ands r3, r5 + 2658 013e 4B60 str r3, [r1, #4] +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2659 .loc 1 1355 5 view .LVU823 +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2660 .loc 1 1355 17 is_stmt 0 view .LVU824 + 2661 0140 4123 movs r3, #65 + 2662 0142 E254 strb r2, [r4, r3] +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2663 .loc 1 1356 5 is_stmt 1 view .LVU825 +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2664 .loc 1 1356 17 is_stmt 0 view .LVU826 + 2665 0144 0023 movs r3, #0 + 2666 0146 2232 adds r2, r2, #34 + 2667 0148 A354 strb r3, [r4, r2] +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2668 .loc 1 1359 5 is_stmt 1 view .LVU827 +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 192 + + + 2669 .loc 1 1359 5 view .LVU828 + 2670 014a 023A subs r2, r2, #2 + 2671 014c A354 strb r3, [r4, r2] +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2672 .loc 1 1359 5 view .LVU829 +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2673 .loc 1 1361 5 view .LVU830 +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2674 .loc 1 1361 12 is_stmt 0 view .LVU831 + 2675 014e 00E0 b .L181 + 2676 .LVL200: + 2677 .L188: +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2678 .loc 1 1365 12 view .LVU832 + 2679 0150 0220 movs r0, #2 + 2680 .LVL201: + 2681 .L181: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2682 .loc 1 1367 1 view .LVU833 + 2683 0152 05B0 add sp, sp, #20 + 2684 @ sp needed + 2685 .LVL202: + 2686 .LVL203: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2687 .loc 1 1367 1 view .LVU834 + 2688 0154 F0BD pop {r4, r5, r6, r7, pc} + 2689 .LVL204: + 2690 .L189: +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2691 .loc 1 1268 5 discriminator 1 view .LVU835 + 2692 0156 0220 movs r0, #2 + 2693 .LVL205: +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2694 .loc 1 1268 5 discriminator 1 view .LVU836 + 2695 0158 FBE7 b .L181 + 2696 .LVL206: + 2697 .L190: +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2698 .loc 1 1275 14 view .LVU837 + 2699 015a 0120 movs r0, #1 + 2700 015c F9E7 b .L181 + 2701 .L191: +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2702 .loc 1 1307 16 view .LVU838 + 2703 015e 0120 movs r0, #1 + 2704 0160 F7E7 b .L181 + 2705 .L192: +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2706 .loc 1 1324 18 view .LVU839 + 2707 0162 0120 movs r0, #1 + 2708 0164 F5E7 b .L181 + 2709 .L193: +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2710 .loc 1 1346 14 view .LVU840 + 2711 0166 0120 movs r0, #1 + 2712 0168 F3E7 b .L181 + 2713 .L196: + ARM GAS /tmp/cc4IUqI9.s page 193 + + + 2714 016a C046 .align 2 + 2715 .L195: + 2716 016c 00240080 .word -2147474432 + 2717 0170 00E800FE .word -33495040 + 2718 .cfi_endproc + 2719 .LFE45: + 2721 .section .text.HAL_I2C_Slave_Transmit,"ax",%progbits + 2722 .align 1 + 2723 .global HAL_I2C_Slave_Transmit + 2724 .syntax unified + 2725 .code 16 + 2726 .thumb_func + 2728 HAL_I2C_Slave_Transmit: + 2729 .LVL207: + 2730 .LFB46: +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2731 .loc 1 1380 1 is_stmt 1 view -0 + 2732 .cfi_startproc + 2733 @ args = 0, pretend = 0, frame = 0 + 2734 @ frame_needed = 0, uses_anonymous_args = 0 +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2735 .loc 1 1380 1 is_stmt 0 view .LVU842 + 2736 0000 F0B5 push {r4, r5, r6, r7, lr} + 2737 .cfi_def_cfa_offset 20 + 2738 .cfi_offset 4, -20 + 2739 .cfi_offset 5, -16 + 2740 .cfi_offset 6, -12 + 2741 .cfi_offset 7, -8 + 2742 .cfi_offset 14, -4 + 2743 0002 C646 mov lr, r8 + 2744 0004 00B5 push {lr} + 2745 .cfi_def_cfa_offset 24 + 2746 .cfi_offset 8, -24 + 2747 0006 82B0 sub sp, sp, #8 + 2748 .cfi_def_cfa_offset 32 + 2749 0008 0400 movs r4, r0 + 2750 000a 0D00 movs r5, r1 + 2751 000c 9046 mov r8, r2 + 2752 000e 1E00 movs r6, r3 +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t tmpXferCount; + 2753 .loc 1 1381 3 is_stmt 1 view .LVU843 +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef error; + 2754 .loc 1 1382 3 view .LVU844 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2755 .loc 1 1383 3 view .LVU845 +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2756 .loc 1 1385 3 view .LVU846 +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2757 .loc 1 1385 11 is_stmt 0 view .LVU847 + 2758 0010 4123 movs r3, #65 + 2759 .LVL208: +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2760 .loc 1 1385 11 view .LVU848 + 2761 0012 C35C ldrb r3, [r0, r3] +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2762 .loc 1 1385 6 view .LVU849 + 2763 0014 202B cmp r3, #32 + ARM GAS /tmp/cc4IUqI9.s page 194 + + + 2764 0016 00D0 beq .LCB2650 + 2765 0018 EEE0 b .L213 @long jump + 2766 .LCB2650: +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2767 .loc 1 1387 5 is_stmt 1 view .LVU850 +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2768 .loc 1 1387 8 is_stmt 0 view .LVU851 + 2769 001a 0029 cmp r1, #0 + 2770 001c 52D0 beq .L199 +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2771 .loc 1 1387 25 discriminator 1 view .LVU852 + 2772 001e 002A cmp r2, #0 + 2773 0020 50D0 beq .L199 +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2774 .loc 1 1393 5 is_stmt 1 view .LVU853 +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2775 .loc 1 1393 5 view .LVU854 + 2776 0022 4023 movs r3, #64 + 2777 0024 C35C ldrb r3, [r0, r3] + 2778 0026 012B cmp r3, #1 + 2779 0028 00D1 bne .LCB2661 + 2780 002a EAE0 b .L214 @long jump + 2781 .LCB2661: +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2782 .loc 1 1393 5 discriminator 2 view .LVU855 + 2783 002c 4023 movs r3, #64 + 2784 002e 0122 movs r2, #1 + 2785 .LVL209: +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2786 .loc 1 1393 5 is_stmt 0 discriminator 2 view .LVU856 + 2787 0030 C254 strb r2, [r0, r3] +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2788 .loc 1 1393 5 is_stmt 1 discriminator 2 view .LVU857 +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2789 .loc 1 1396 5 view .LVU858 +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2790 .loc 1 1396 17 is_stmt 0 view .LVU859 + 2791 0032 FFF7FEFF bl HAL_GetTick + 2792 .LVL210: +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2793 .loc 1 1396 17 view .LVU860 + 2794 0036 0700 movs r7, r0 + 2795 .LVL211: +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2796 .loc 1 1398 5 is_stmt 1 view .LVU861 +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2797 .loc 1 1398 21 is_stmt 0 view .LVU862 + 2798 0038 4123 movs r3, #65 + 2799 003a 2122 movs r2, #33 + 2800 003c E254 strb r2, [r4, r3] +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2801 .loc 1 1399 5 is_stmt 1 view .LVU863 +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2802 .loc 1 1399 21 is_stmt 0 view .LVU864 + 2803 003e 0133 adds r3, r3, #1 + 2804 0040 013A subs r2, r2, #1 + 2805 0042 E254 strb r2, [r4, r3] + ARM GAS /tmp/cc4IUqI9.s page 195 + + +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2806 .loc 1 1400 5 is_stmt 1 view .LVU865 +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2807 .loc 1 1400 21 is_stmt 0 view .LVU866 + 2808 0044 0023 movs r3, #0 + 2809 0046 6364 str r3, [r4, #68] +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2810 .loc 1 1403 5 is_stmt 1 view .LVU867 +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2811 .loc 1 1403 21 is_stmt 0 view .LVU868 + 2812 0048 6562 str r5, [r4, #36] +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2813 .loc 1 1404 5 is_stmt 1 view .LVU869 +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2814 .loc 1 1404 21 is_stmt 0 view .LVU870 + 2815 004a 4246 mov r2, r8 + 2816 004c 6285 strh r2, [r4, #42] +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2817 .loc 1 1405 5 is_stmt 1 view .LVU871 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2818 .loc 1 1405 21 is_stmt 0 view .LVU872 + 2819 004e 6363 str r3, [r4, #52] +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2820 .loc 1 1408 5 is_stmt 1 view .LVU873 +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2821 .loc 1 1408 9 is_stmt 0 view .LVU874 + 2822 0050 2268 ldr r2, [r4] +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2823 .loc 1 1408 19 view .LVU875 + 2824 0052 5368 ldr r3, [r2, #4] +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2825 .loc 1 1408 25 view .LVU876 + 2826 0054 6C49 ldr r1, .L223 + 2827 0056 0B40 ands r3, r1 + 2828 0058 5360 str r3, [r2, #4] +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2829 .loc 1 1411 5 is_stmt 1 view .LVU877 +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2830 .loc 1 1411 19 is_stmt 0 view .LVU878 + 2831 005a 226A ldr r2, [r4, #32] +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2832 .loc 1 1411 8 view .LVU879 + 2833 005c 8023 movs r3, #128 + 2834 005e 9B02 lsls r3, r3, #10 + 2835 0060 9A42 cmp r2, r3 + 2836 0062 34D0 beq .L215 + 2837 .L201: +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2838 .loc 1 1424 5 is_stmt 1 view .LVU880 +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2839 .loc 1 1424 9 is_stmt 0 view .LVU881 + 2840 0064 0097 str r7, [sp] + 2841 0066 3300 movs r3, r6 + 2842 0068 0022 movs r2, #0 + 2843 006a 0821 movs r1, #8 + 2844 006c 2000 movs r0, r4 + 2845 .LVL212: + ARM GAS /tmp/cc4IUqI9.s page 196 + + +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2846 .loc 1 1424 9 view .LVU882 + 2847 006e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2848 .LVL213: +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2849 .loc 1 1424 8 discriminator 1 view .LVU883 + 2850 0072 0028 cmp r0, #0 + 2851 0074 37D1 bne .L216 +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2852 .loc 1 1436 5 is_stmt 1 view .LVU884 + 2853 0076 2368 ldr r3, [r4] + 2854 0078 0822 movs r2, #8 + 2855 007a DA61 str r2, [r3, #28] +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2856 .loc 1 1439 5 view .LVU885 +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2857 .loc 1 1439 19 is_stmt 0 view .LVU886 + 2858 007c E368 ldr r3, [r4, #12] +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2859 .loc 1 1439 8 view .LVU887 + 2860 007e 022B cmp r3, #2 + 2861 0080 3CD0 beq .L217 + 2862 .L203: +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2863 .loc 1 1458 5 is_stmt 1 view .LVU888 +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2864 .loc 1 1458 9 is_stmt 0 view .LVU889 + 2865 0082 8021 movs r1, #128 + 2866 0084 0097 str r7, [sp] + 2867 0086 3300 movs r3, r6 + 2868 0088 0022 movs r2, #0 + 2869 008a 4902 lsls r1, r1, #9 + 2870 008c 2000 movs r0, r4 + 2871 008e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2872 .LVL214: +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2873 .loc 1 1458 8 discriminator 1 view .LVU890 + 2874 0092 0028 cmp r0, #0 + 2875 0094 4AD1 bne .L218 + 2876 .LVL215: + 2877 .L205: +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2878 .loc 1 1469 28 is_stmt 1 view .LVU891 +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2879 .loc 1 1469 16 is_stmt 0 view .LVU892 + 2880 0096 658D ldrh r5, [r4, #42] + 2881 0098 ADB2 uxth r5, r5 +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2882 .loc 1 1469 28 view .LVU893 + 2883 009a 002D cmp r5, #0 + 2884 009c 59D0 beq .L219 +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2885 .loc 1 1472 7 is_stmt 1 view .LVU894 +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2886 .loc 1 1472 11 is_stmt 0 view .LVU895 + 2887 009e 3A00 movs r2, r7 + 2888 00a0 3100 movs r1, r6 + ARM GAS /tmp/cc4IUqI9.s page 197 + + + 2889 00a2 2000 movs r0, r4 + 2890 00a4 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 2891 .LVL216: +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2892 .loc 1 1472 10 discriminator 1 view .LVU896 + 2893 00a8 0028 cmp r0, #0 + 2894 00aa 4AD1 bne .L220 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2895 .loc 1 1480 7 is_stmt 1 view .LVU897 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2896 .loc 1 1480 35 is_stmt 0 view .LVU898 + 2897 00ac 626A ldr r2, [r4, #36] +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2898 .loc 1 1480 11 view .LVU899 + 2899 00ae 2368 ldr r3, [r4] +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2900 .loc 1 1480 30 view .LVU900 + 2901 00b0 1278 ldrb r2, [r2] +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2902 .loc 1 1480 28 view .LVU901 + 2903 00b2 9A62 str r2, [r3, #40] +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2904 .loc 1 1483 7 is_stmt 1 view .LVU902 +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2905 .loc 1 1483 11 is_stmt 0 view .LVU903 + 2906 00b4 636A ldr r3, [r4, #36] +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2907 .loc 1 1483 21 view .LVU904 + 2908 00b6 0133 adds r3, r3, #1 + 2909 00b8 6362 str r3, [r4, #36] +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2910 .loc 1 1485 7 is_stmt 1 view .LVU905 +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2911 .loc 1 1485 11 is_stmt 0 view .LVU906 + 2912 00ba 658D ldrh r5, [r4, #42] +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2913 .loc 1 1485 22 view .LVU907 + 2914 00bc 013D subs r5, r5, #1 + 2915 00be ADB2 uxth r5, r5 + 2916 00c0 6585 strh r5, [r4, #42] + 2917 00c2 E8E7 b .L205 + 2918 .LVL217: + 2919 .L199: +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2920 .loc 1 1389 7 is_stmt 1 view .LVU908 +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2921 .loc 1 1389 23 is_stmt 0 view .LVU909 + 2922 00c4 8023 movs r3, #128 + 2923 00c6 9B00 lsls r3, r3, #2 + 2924 00c8 6364 str r3, [r4, #68] +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2925 .loc 1 1390 7 is_stmt 1 view .LVU910 +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2926 .loc 1 1390 15 is_stmt 0 view .LVU911 + 2927 00ca 0120 movs r0, #1 + 2928 .LVL218: +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 198 + + + 2929 .loc 1 1390 15 view .LVU912 + 2930 00cc 95E0 b .L198 + 2931 .LVL219: + 2932 .L215: +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2933 .loc 1 1415 7 is_stmt 1 view .LVU913 +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2934 .loc 1 1415 35 is_stmt 0 view .LVU914 + 2935 00ce 626A ldr r2, [r4, #36] +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2936 .loc 1 1415 11 view .LVU915 + 2937 00d0 2368 ldr r3, [r4] +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2938 .loc 1 1415 30 view .LVU916 + 2939 00d2 1278 ldrb r2, [r2] +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2940 .loc 1 1415 28 view .LVU917 + 2941 00d4 9A62 str r2, [r3, #40] +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2942 .loc 1 1418 7 is_stmt 1 view .LVU918 +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2943 .loc 1 1418 11 is_stmt 0 view .LVU919 + 2944 00d6 636A ldr r3, [r4, #36] +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2945 .loc 1 1418 21 view .LVU920 + 2946 00d8 0133 adds r3, r3, #1 + 2947 00da 6362 str r3, [r4, #36] +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2948 .loc 1 1420 7 is_stmt 1 view .LVU921 +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2949 .loc 1 1420 11 is_stmt 0 view .LVU922 + 2950 00dc 638D ldrh r3, [r4, #42] +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2951 .loc 1 1420 22 view .LVU923 + 2952 00de 013B subs r3, r3, #1 + 2953 00e0 9BB2 uxth r3, r3 + 2954 00e2 6385 strh r3, [r4, #42] + 2955 00e4 BEE7 b .L201 + 2956 .LVL220: + 2957 .L216: +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2958 .loc 1 1427 7 is_stmt 1 view .LVU924 +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2959 .loc 1 1427 11 is_stmt 0 view .LVU925 + 2960 00e6 2268 ldr r2, [r4] +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2961 .loc 1 1427 21 view .LVU926 + 2962 00e8 5168 ldr r1, [r2, #4] +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2963 .loc 1 1427 27 view .LVU927 + 2964 00ea 8023 movs r3, #128 + 2965 00ec 1B02 lsls r3, r3, #8 + 2966 00ee 0B43 orrs r3, r1 + 2967 00f0 5360 str r3, [r2, #4] +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2968 .loc 1 1430 7 is_stmt 1 view .LVU928 + 2969 00f2 2000 movs r0, r4 + ARM GAS /tmp/cc4IUqI9.s page 199 + + + 2970 00f4 FFF7FEFF bl I2C_Flush_TXDR + 2971 .LVL221: +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2972 .loc 1 1432 7 view .LVU929 +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2973 .loc 1 1432 14 is_stmt 0 view .LVU930 + 2974 00f8 0120 movs r0, #1 + 2975 00fa 7EE0 b .L198 + 2976 .L217: +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2977 .loc 1 1442 7 is_stmt 1 view .LVU931 +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2978 .loc 1 1442 11 is_stmt 0 view .LVU932 + 2979 00fc 0097 str r7, [sp] + 2980 00fe 3300 movs r3, r6 + 2981 0100 0022 movs r2, #0 + 2982 0102 0821 movs r1, #8 + 2983 0104 2000 movs r0, r4 + 2984 0106 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2985 .LVL222: +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2986 .loc 1 1442 10 discriminator 1 view .LVU933 + 2987 010a 0028 cmp r0, #0 + 2988 010c 03D1 bne .L221 +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2989 .loc 1 1454 7 is_stmt 1 view .LVU934 + 2990 010e 2368 ldr r3, [r4] + 2991 0110 0822 movs r2, #8 + 2992 0112 DA61 str r2, [r3, #28] + 2993 0114 B5E7 b .L203 + 2994 .L221: +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2995 .loc 1 1445 9 view .LVU935 +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2996 .loc 1 1445 13 is_stmt 0 view .LVU936 + 2997 0116 2268 ldr r2, [r4] +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2998 .loc 1 1445 23 view .LVU937 + 2999 0118 5168 ldr r1, [r2, #4] +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3000 .loc 1 1445 29 view .LVU938 + 3001 011a 8023 movs r3, #128 + 3002 011c 1B02 lsls r3, r3, #8 + 3003 011e 0B43 orrs r3, r1 + 3004 0120 5360 str r3, [r2, #4] +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3005 .loc 1 1448 9 is_stmt 1 view .LVU939 + 3006 0122 2000 movs r0, r4 + 3007 0124 FFF7FEFF bl I2C_Flush_TXDR + 3008 .LVL223: +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3009 .loc 1 1450 9 view .LVU940 +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3010 .loc 1 1450 16 is_stmt 0 view .LVU941 + 3011 0128 0120 movs r0, #1 + 3012 012a 66E0 b .L198 + 3013 .L218: + ARM GAS /tmp/cc4IUqI9.s page 200 + + +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3014 .loc 1 1461 7 is_stmt 1 view .LVU942 +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3015 .loc 1 1461 11 is_stmt 0 view .LVU943 + 3016 012c 2268 ldr r2, [r4] +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3017 .loc 1 1461 21 view .LVU944 + 3018 012e 5168 ldr r1, [r2, #4] +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3019 .loc 1 1461 27 view .LVU945 + 3020 0130 8023 movs r3, #128 + 3021 0132 1B02 lsls r3, r3, #8 + 3022 0134 0B43 orrs r3, r1 + 3023 0136 5360 str r3, [r2, #4] +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3024 .loc 1 1464 7 is_stmt 1 view .LVU946 + 3025 0138 2000 movs r0, r4 + 3026 013a FFF7FEFF bl I2C_Flush_TXDR + 3027 .LVL224: +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3028 .loc 1 1466 7 view .LVU947 +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3029 .loc 1 1466 14 is_stmt 0 view .LVU948 + 3030 013e 0120 movs r0, #1 + 3031 0140 5BE0 b .L198 + 3032 .LVL225: + 3033 .L220: +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3034 .loc 1 1475 9 is_stmt 1 view .LVU949 +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3035 .loc 1 1475 13 is_stmt 0 view .LVU950 + 3036 0142 2268 ldr r2, [r4] +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3037 .loc 1 1475 23 view .LVU951 + 3038 0144 5168 ldr r1, [r2, #4] +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3039 .loc 1 1475 29 view .LVU952 + 3040 0146 8023 movs r3, #128 + 3041 0148 1B02 lsls r3, r3, #8 + 3042 014a 0B43 orrs r3, r1 + 3043 014c 5360 str r3, [r2, #4] +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3044 .loc 1 1476 9 is_stmt 1 view .LVU953 +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3045 .loc 1 1476 16 is_stmt 0 view .LVU954 + 3046 014e 0120 movs r0, #1 + 3047 0150 53E0 b .L198 + 3048 .L219: +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3049 .loc 1 1489 5 is_stmt 1 view .LVU955 +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3050 .loc 1 1489 13 is_stmt 0 view .LVU956 + 3051 0152 0097 str r7, [sp] + 3052 0154 3300 movs r3, r6 + 3053 0156 0022 movs r2, #0 + 3054 0158 1021 movs r1, #16 + 3055 015a 2000 movs r0, r4 + ARM GAS /tmp/cc4IUqI9.s page 201 + + + 3056 015c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3057 .LVL226: +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3058 .loc 1 1491 5 is_stmt 1 view .LVU957 +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3059 .loc 1 1491 8 is_stmt 0 view .LVU958 + 3060 0160 0028 cmp r0, #0 + 3061 0162 21D0 beq .L208 +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) + 3062 .loc 1 1497 7 is_stmt 1 view .LVU959 +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) + 3063 .loc 1 1497 20 is_stmt 0 view .LVU960 + 3064 0164 638D ldrh r3, [r4, #42] + 3065 0166 9BB2 uxth r3, r3 + 3066 .LVL227: +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3067 .loc 1 1498 7 is_stmt 1 view .LVU961 +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3068 .loc 1 1498 16 is_stmt 0 view .LVU962 + 3069 0168 626C ldr r2, [r4, #68] +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3070 .loc 1 1498 10 view .LVU963 + 3071 016a 042A cmp r2, #4 + 3072 016c 14D1 bne .L209 +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3073 .loc 1 1498 49 discriminator 1 view .LVU964 + 3074 016e 002B cmp r3, #0 + 3075 0170 12D1 bne .L209 +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3076 .loc 1 1501 9 is_stmt 1 view .LVU965 +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3077 .loc 1 1501 25 is_stmt 0 view .LVU966 + 3078 0172 6364 str r3, [r4, #68] + 3079 .LVL228: + 3080 .L210: +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3081 .loc 1 1532 5 is_stmt 1 view .LVU967 +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3082 .loc 1 1532 9 is_stmt 0 view .LVU968 + 3083 0174 8021 movs r1, #128 + 3084 0176 0097 str r7, [sp] + 3085 0178 3300 movs r3, r6 + 3086 017a 0122 movs r2, #1 + 3087 017c 0902 lsls r1, r1, #8 + 3088 017e 2000 movs r0, r4 + 3089 0180 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3090 .LVL229: +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3091 .loc 1 1532 8 discriminator 1 view .LVU969 + 3092 0184 0028 cmp r0, #0 + 3093 0186 28D0 beq .L212 +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3094 .loc 1 1535 7 is_stmt 1 view .LVU970 +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3095 .loc 1 1535 11 is_stmt 0 view .LVU971 + 3096 0188 2268 ldr r2, [r4] +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + ARM GAS /tmp/cc4IUqI9.s page 202 + + + 3097 .loc 1 1535 21 view .LVU972 + 3098 018a 5168 ldr r1, [r2, #4] +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3099 .loc 1 1535 27 view .LVU973 + 3100 018c 8023 movs r3, #128 + 3101 018e 1B02 lsls r3, r3, #8 + 3102 0190 0B43 orrs r3, r1 + 3103 0192 5360 str r3, [r2, #4] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3104 .loc 1 1536 7 is_stmt 1 view .LVU974 +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3105 .loc 1 1536 14 is_stmt 0 view .LVU975 + 3106 0194 0120 movs r0, #1 + 3107 0196 30E0 b .L198 + 3108 .LVL230: + 3109 .L209: +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3110 .loc 1 1506 9 is_stmt 1 view .LVU976 +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3111 .loc 1 1506 13 is_stmt 0 view .LVU977 + 3112 0198 2268 ldr r2, [r4] +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3113 .loc 1 1506 23 view .LVU978 + 3114 019a 5168 ldr r1, [r2, #4] +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3115 .loc 1 1506 29 view .LVU979 + 3116 019c 8023 movs r3, #128 + 3117 .LVL231: +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3118 .loc 1 1506 29 view .LVU980 + 3119 019e 1B02 lsls r3, r3, #8 + 3120 01a0 0B43 orrs r3, r1 + 3121 01a2 5360 str r3, [r2, #4] +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3122 .loc 1 1507 9 is_stmt 1 view .LVU981 +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3123 .loc 1 1507 16 is_stmt 0 view .LVU982 + 3124 01a4 0120 movs r0, #1 + 3125 .LVL232: +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3126 .loc 1 1507 16 view .LVU983 + 3127 01a6 28E0 b .L198 + 3128 .LVL233: + 3129 .L208: +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3130 .loc 1 1513 7 is_stmt 1 view .LVU984 + 3131 01a8 2000 movs r0, r4 + 3132 .LVL234: +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3133 .loc 1 1513 7 is_stmt 0 view .LVU985 + 3134 01aa FFF7FEFF bl I2C_Flush_TXDR + 3135 .LVL235: +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3136 .loc 1 1516 7 is_stmt 1 view .LVU986 + 3137 01ae 2368 ldr r3, [r4] + 3138 01b0 1022 movs r2, #16 + 3139 01b2 DA61 str r2, [r3, #28] + ARM GAS /tmp/cc4IUqI9.s page 203 + + +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3140 .loc 1 1519 7 view .LVU987 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3141 .loc 1 1519 11 is_stmt 0 view .LVU988 + 3142 01b4 3A00 movs r2, r7 + 3143 01b6 3100 movs r1, r6 + 3144 01b8 2000 movs r0, r4 + 3145 01ba FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 3146 .LVL236: +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3147 .loc 1 1519 10 discriminator 1 view .LVU989 + 3148 01be 0028 cmp r0, #0 + 3149 01c0 03D1 bne .L222 +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3150 .loc 1 1528 7 is_stmt 1 view .LVU990 + 3151 01c2 2368 ldr r3, [r4] + 3152 01c4 2022 movs r2, #32 + 3153 01c6 DA61 str r2, [r3, #28] + 3154 01c8 D4E7 b .L210 + 3155 .L222: +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3156 .loc 1 1522 9 view .LVU991 +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3157 .loc 1 1522 13 is_stmt 0 view .LVU992 + 3158 01ca 2268 ldr r2, [r4] +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3159 .loc 1 1522 23 view .LVU993 + 3160 01cc 5168 ldr r1, [r2, #4] +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3161 .loc 1 1522 29 view .LVU994 + 3162 01ce 8023 movs r3, #128 + 3163 01d0 1B02 lsls r3, r3, #8 + 3164 01d2 0B43 orrs r3, r1 + 3165 01d4 5360 str r3, [r2, #4] +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3166 .loc 1 1524 9 is_stmt 1 view .LVU995 +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3167 .loc 1 1524 16 is_stmt 0 view .LVU996 + 3168 01d6 0120 movs r0, #1 + 3169 01d8 0FE0 b .L198 + 3170 .L212: +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3171 .loc 1 1540 5 is_stmt 1 view .LVU997 +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3172 .loc 1 1540 9 is_stmt 0 view .LVU998 + 3173 01da 2268 ldr r2, [r4] +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3174 .loc 1 1540 19 view .LVU999 + 3175 01dc 5168 ldr r1, [r2, #4] +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3176 .loc 1 1540 25 view .LVU1000 + 3177 01de 8023 movs r3, #128 + 3178 01e0 1B02 lsls r3, r3, #8 + 3179 01e2 0B43 orrs r3, r1 + 3180 01e4 5360 str r3, [r2, #4] +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3181 .loc 1 1542 5 is_stmt 1 view .LVU1001 + ARM GAS /tmp/cc4IUqI9.s page 204 + + +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3182 .loc 1 1542 17 is_stmt 0 view .LVU1002 + 3183 01e6 4123 movs r3, #65 + 3184 01e8 2022 movs r2, #32 + 3185 01ea E254 strb r2, [r4, r3] +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3186 .loc 1 1543 5 is_stmt 1 view .LVU1003 +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3187 .loc 1 1543 17 is_stmt 0 view .LVU1004 + 3188 01ec 0023 movs r3, #0 + 3189 01ee 2232 adds r2, r2, #34 + 3190 01f0 A354 strb r3, [r4, r2] +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3191 .loc 1 1546 5 is_stmt 1 view .LVU1005 +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3192 .loc 1 1546 5 view .LVU1006 + 3193 01f2 023A subs r2, r2, #2 + 3194 01f4 A354 strb r3, [r4, r2] +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3195 .loc 1 1546 5 view .LVU1007 +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3196 .loc 1 1548 5 view .LVU1008 +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3197 .loc 1 1548 12 is_stmt 0 view .LVU1009 + 3198 01f6 00E0 b .L198 + 3199 .LVL237: + 3200 .L213: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3201 .loc 1 1552 12 view .LVU1010 + 3202 01f8 0220 movs r0, #2 + 3203 .LVL238: + 3204 .L198: +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3205 .loc 1 1554 1 view .LVU1011 + 3206 01fa 02B0 add sp, sp, #8 + 3207 @ sp needed + 3208 .LVL239: + 3209 .LVL240: + 3210 .LVL241: +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3211 .loc 1 1554 1 view .LVU1012 + 3212 01fc 80BC pop {r7} + 3213 01fe B846 mov r8, r7 + 3214 0200 F0BD pop {r4, r5, r6, r7, pc} + 3215 .LVL242: + 3216 .L214: +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3217 .loc 1 1393 5 discriminator 1 view .LVU1013 + 3218 0202 0220 movs r0, #2 + 3219 .LVL243: +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3220 .loc 1 1393 5 discriminator 1 view .LVU1014 + 3221 0204 F9E7 b .L198 + 3222 .L224: + 3223 0206 C046 .align 2 + 3224 .L223: + 3225 0208 FF7FFFFF .word -32769 + ARM GAS /tmp/cc4IUqI9.s page 205 + + + 3226 .cfi_endproc + 3227 .LFE46: + 3229 .section .text.HAL_I2C_Slave_Receive,"ax",%progbits + 3230 .align 1 + 3231 .global HAL_I2C_Slave_Receive + 3232 .syntax unified + 3233 .code 16 + 3234 .thumb_func + 3236 HAL_I2C_Slave_Receive: + 3237 .LVL244: + 3238 .LFB47: +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 3239 .loc 1 1567 1 is_stmt 1 view -0 + 3240 .cfi_startproc + 3241 @ args = 0, pretend = 0, frame = 0 + 3242 @ frame_needed = 0, uses_anonymous_args = 0 +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 3243 .loc 1 1567 1 is_stmt 0 view .LVU1016 + 3244 0000 F0B5 push {r4, r5, r6, r7, lr} + 3245 .cfi_def_cfa_offset 20 + 3246 .cfi_offset 4, -20 + 3247 .cfi_offset 5, -16 + 3248 .cfi_offset 6, -12 + 3249 .cfi_offset 7, -8 + 3250 .cfi_offset 14, -4 + 3251 0002 C646 mov lr, r8 + 3252 0004 00B5 push {lr} + 3253 .cfi_def_cfa_offset 24 + 3254 .cfi_offset 8, -24 + 3255 0006 82B0 sub sp, sp, #8 + 3256 .cfi_def_cfa_offset 32 + 3257 0008 0400 movs r4, r0 + 3258 000a 0D00 movs r5, r1 + 3259 000c 9046 mov r8, r2 + 3260 000e 1E00 movs r6, r3 +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3261 .loc 1 1568 3 is_stmt 1 view .LVU1017 +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3262 .loc 1 1570 3 view .LVU1018 +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3263 .loc 1 1570 11 is_stmt 0 view .LVU1019 + 3264 0010 4123 movs r3, #65 + 3265 .LVL245: +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3266 .loc 1 1570 11 view .LVU1020 + 3267 0012 C35C ldrb r3, [r0, r3] +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3268 .loc 1 1570 6 view .LVU1021 + 3269 0014 202B cmp r3, #32 + 3270 0016 00D0 beq .LCB3118 + 3271 0018 B1E0 b .L236 @long jump + 3272 .LCB3118: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3273 .loc 1 1572 5 is_stmt 1 view .LVU1022 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3274 .loc 1 1572 8 is_stmt 0 view .LVU1023 + 3275 001a 0029 cmp r1, #0 + ARM GAS /tmp/cc4IUqI9.s page 206 + + + 3276 001c 30D0 beq .L227 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3277 .loc 1 1572 25 discriminator 1 view .LVU1024 + 3278 001e 002A cmp r2, #0 + 3279 0020 2ED0 beq .L227 +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3280 .loc 1 1578 5 is_stmt 1 view .LVU1025 +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3281 .loc 1 1578 5 view .LVU1026 + 3282 0022 4023 movs r3, #64 + 3283 0024 C35C ldrb r3, [r0, r3] + 3284 0026 012B cmp r3, #1 + 3285 0028 00D1 bne .LCB3129 + 3286 002a ADE0 b .L237 @long jump + 3287 .LCB3129: +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3288 .loc 1 1578 5 discriminator 2 view .LVU1027 + 3289 002c 4023 movs r3, #64 + 3290 002e 0122 movs r2, #1 + 3291 .LVL246: +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3292 .loc 1 1578 5 is_stmt 0 discriminator 2 view .LVU1028 + 3293 0030 C254 strb r2, [r0, r3] +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3294 .loc 1 1578 5 is_stmt 1 discriminator 2 view .LVU1029 +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3295 .loc 1 1581 5 view .LVU1030 +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3296 .loc 1 1581 17 is_stmt 0 view .LVU1031 + 3297 0032 FFF7FEFF bl HAL_GetTick + 3298 .LVL247: +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3299 .loc 1 1581 17 view .LVU1032 + 3300 0036 0700 movs r7, r0 + 3301 .LVL248: +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3302 .loc 1 1583 5 is_stmt 1 view .LVU1033 +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3303 .loc 1 1583 21 is_stmt 0 view .LVU1034 + 3304 0038 4123 movs r3, #65 + 3305 003a 2222 movs r2, #34 + 3306 003c E254 strb r2, [r4, r3] +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3307 .loc 1 1584 5 is_stmt 1 view .LVU1035 +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3308 .loc 1 1584 21 is_stmt 0 view .LVU1036 + 3309 003e 0133 adds r3, r3, #1 + 3310 0040 023A subs r2, r2, #2 + 3311 0042 E254 strb r2, [r4, r3] +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3312 .loc 1 1585 5 is_stmt 1 view .LVU1037 +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3313 .loc 1 1585 21 is_stmt 0 view .LVU1038 + 3314 0044 0023 movs r3, #0 + 3315 0046 6364 str r3, [r4, #68] +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3316 .loc 1 1588 5 is_stmt 1 view .LVU1039 + ARM GAS /tmp/cc4IUqI9.s page 207 + + +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3317 .loc 1 1588 21 is_stmt 0 view .LVU1040 + 3318 0048 6562 str r5, [r4, #36] +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3319 .loc 1 1589 5 is_stmt 1 view .LVU1041 +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3320 .loc 1 1589 21 is_stmt 0 view .LVU1042 + 3321 004a 4246 mov r2, r8 + 3322 004c 6285 strh r2, [r4, #42] +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3323 .loc 1 1590 5 is_stmt 1 view .LVU1043 +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3324 .loc 1 1590 26 is_stmt 0 view .LVU1044 + 3325 004e 628D ldrh r2, [r4, #42] +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3326 .loc 1 1590 20 view .LVU1045 + 3327 0050 2285 strh r2, [r4, #40] +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3328 .loc 1 1591 5 is_stmt 1 view .LVU1046 +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3329 .loc 1 1591 21 is_stmt 0 view .LVU1047 + 3330 0052 6363 str r3, [r4, #52] +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3331 .loc 1 1594 5 is_stmt 1 view .LVU1048 +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3332 .loc 1 1594 9 is_stmt 0 view .LVU1049 + 3333 0054 2268 ldr r2, [r4] +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3334 .loc 1 1594 19 view .LVU1050 + 3335 0056 5368 ldr r3, [r2, #4] +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3336 .loc 1 1594 25 view .LVU1051 + 3337 0058 4C49 ldr r1, .L240 + 3338 005a 0B40 ands r3, r1 + 3339 005c 5360 str r3, [r2, #4] +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3340 .loc 1 1597 5 is_stmt 1 view .LVU1052 +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3341 .loc 1 1597 9 is_stmt 0 view .LVU1053 + 3342 005e 0090 str r0, [sp] + 3343 0060 3300 movs r3, r6 + 3344 0062 0022 movs r2, #0 + 3345 0064 0821 movs r1, #8 + 3346 0066 2000 movs r0, r4 + 3347 .LVL249: +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3348 .loc 1 1597 9 view .LVU1054 + 3349 0068 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3350 .LVL250: +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3351 .loc 1 1597 8 discriminator 1 view .LVU1055 + 3352 006c 0028 cmp r0, #0 + 3353 006e 0CD0 beq .L229 +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3354 .loc 1 1600 7 is_stmt 1 view .LVU1056 +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3355 .loc 1 1600 11 is_stmt 0 view .LVU1057 + ARM GAS /tmp/cc4IUqI9.s page 208 + + + 3356 0070 2268 ldr r2, [r4] +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3357 .loc 1 1600 21 view .LVU1058 + 3358 0072 5168 ldr r1, [r2, #4] +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3359 .loc 1 1600 27 view .LVU1059 + 3360 0074 8023 movs r3, #128 + 3361 0076 1B02 lsls r3, r3, #8 + 3362 0078 0B43 orrs r3, r1 + 3363 007a 5360 str r3, [r2, #4] +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3364 .loc 1 1601 7 is_stmt 1 view .LVU1060 +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3365 .loc 1 1601 14 is_stmt 0 view .LVU1061 + 3366 007c 0120 movs r0, #1 + 3367 007e 7FE0 b .L226 + 3368 .LVL251: + 3369 .L227: +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3370 .loc 1 1574 7 is_stmt 1 view .LVU1062 +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3371 .loc 1 1574 23 is_stmt 0 view .LVU1063 + 3372 0080 8023 movs r3, #128 + 3373 0082 9B00 lsls r3, r3, #2 + 3374 0084 6364 str r3, [r4, #68] +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3375 .loc 1 1575 7 is_stmt 1 view .LVU1064 +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3376 .loc 1 1575 15 is_stmt 0 view .LVU1065 + 3377 0086 0120 movs r0, #1 + 3378 .LVL252: +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3379 .loc 1 1575 15 view .LVU1066 + 3380 0088 7AE0 b .L226 + 3381 .LVL253: + 3382 .L229: +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3383 .loc 1 1605 5 is_stmt 1 view .LVU1067 + 3384 008a 2368 ldr r3, [r4] + 3385 008c 0822 movs r2, #8 + 3386 008e DA61 str r2, [r3, #28] +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3387 .loc 1 1608 5 view .LVU1068 +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3388 .loc 1 1608 9 is_stmt 0 view .LVU1069 + 3389 0090 8021 movs r1, #128 + 3390 0092 0097 str r7, [sp] + 3391 0094 3300 movs r3, r6 + 3392 0096 073A subs r2, r2, #7 + 3393 0098 4902 lsls r1, r1, #9 + 3394 009a 2000 movs r0, r4 + 3395 009c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3396 .LVL254: +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3397 .loc 1 1608 8 discriminator 1 view .LVU1070 + 3398 00a0 0028 cmp r0, #0 + 3399 00a2 15D0 beq .L230 + ARM GAS /tmp/cc4IUqI9.s page 209 + + +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3400 .loc 1 1611 7 is_stmt 1 view .LVU1071 +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3401 .loc 1 1611 11 is_stmt 0 view .LVU1072 + 3402 00a4 2268 ldr r2, [r4] +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3403 .loc 1 1611 21 view .LVU1073 + 3404 00a6 5168 ldr r1, [r2, #4] +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3405 .loc 1 1611 27 view .LVU1074 + 3406 00a8 8023 movs r3, #128 + 3407 00aa 1B02 lsls r3, r3, #8 + 3408 00ac 0B43 orrs r3, r1 + 3409 00ae 5360 str r3, [r2, #4] +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3410 .loc 1 1612 7 is_stmt 1 view .LVU1075 +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3411 .loc 1 1612 14 is_stmt 0 view .LVU1076 + 3412 00b0 0120 movs r0, #1 + 3413 00b2 65E0 b .L226 + 3414 .LVL255: + 3415 .L231: +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3416 .loc 1 1640 7 is_stmt 1 view .LVU1077 +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3417 .loc 1 1640 38 is_stmt 0 view .LVU1078 + 3418 00b4 2368 ldr r3, [r4] +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3419 .loc 1 1640 48 view .LVU1079 + 3420 00b6 5A6A ldr r2, [r3, #36] +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3421 .loc 1 1640 12 view .LVU1080 + 3422 00b8 636A ldr r3, [r4, #36] +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3423 .loc 1 1640 23 view .LVU1081 + 3424 00ba 1A70 strb r2, [r3] +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3425 .loc 1 1643 7 is_stmt 1 view .LVU1082 +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3426 .loc 1 1643 11 is_stmt 0 view .LVU1083 + 3427 00bc 636A ldr r3, [r4, #36] +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3428 .loc 1 1643 21 view .LVU1084 + 3429 00be 0133 adds r3, r3, #1 + 3430 00c0 6362 str r3, [r4, #36] +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3431 .loc 1 1645 7 is_stmt 1 view .LVU1085 +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3432 .loc 1 1645 11 is_stmt 0 view .LVU1086 + 3433 00c2 658D ldrh r5, [r4, #42] +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3434 .loc 1 1645 22 view .LVU1087 + 3435 00c4 013D subs r5, r5, #1 + 3436 00c6 ADB2 uxth r5, r5 + 3437 00c8 6585 strh r5, [r4, #42] +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3438 .loc 1 1646 7 is_stmt 1 view .LVU1088 + ARM GAS /tmp/cc4IUqI9.s page 210 + + +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3439 .loc 1 1646 11 is_stmt 0 view .LVU1089 + 3440 00ca 238D ldrh r3, [r4, #40] +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3441 .loc 1 1646 21 view .LVU1090 + 3442 00cc 013B subs r3, r3, #1 + 3443 00ce 2385 strh r3, [r4, #40] + 3444 .L230: +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3445 .loc 1 1615 28 is_stmt 1 view .LVU1091 +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3446 .loc 1 1615 16 is_stmt 0 view .LVU1092 + 3447 00d0 638D ldrh r3, [r4, #42] + 3448 00d2 9BB2 uxth r3, r3 +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3449 .loc 1 1615 28 view .LVU1093 + 3450 00d4 002B cmp r3, #0 + 3451 00d6 1FD0 beq .L239 +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3452 .loc 1 1618 7 is_stmt 1 view .LVU1094 +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3453 .loc 1 1618 11 is_stmt 0 view .LVU1095 + 3454 00d8 3A00 movs r2, r7 + 3455 00da 3100 movs r1, r6 + 3456 00dc 2000 movs r0, r4 + 3457 00de FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 3458 .LVL256: +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3459 .loc 1 1618 10 discriminator 1 view .LVU1096 + 3460 00e2 0028 cmp r0, #0 + 3461 00e4 E6D0 beq .L231 +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3462 .loc 1 1621 9 is_stmt 1 view .LVU1097 +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3463 .loc 1 1621 13 is_stmt 0 view .LVU1098 + 3464 00e6 2268 ldr r2, [r4] +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3465 .loc 1 1621 23 view .LVU1099 + 3466 00e8 5168 ldr r1, [r2, #4] +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3467 .loc 1 1621 29 view .LVU1100 + 3468 00ea 8023 movs r3, #128 + 3469 00ec 1B02 lsls r3, r3, #8 + 3470 00ee 0B43 orrs r3, r1 + 3471 00f0 5360 str r3, [r2, #4] +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3472 .loc 1 1624 9 is_stmt 1 view .LVU1101 +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3473 .loc 1 1624 13 is_stmt 0 view .LVU1102 + 3474 00f2 2268 ldr r2, [r4] + 3475 00f4 9369 ldr r3, [r2, #24] +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3476 .loc 1 1624 12 view .LVU1103 + 3477 00f6 5B07 lsls r3, r3, #29 + 3478 00f8 0CD5 bpl .L232 +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3479 .loc 1 1627 11 is_stmt 1 view .LVU1104 + ARM GAS /tmp/cc4IUqI9.s page 211 + + +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3480 .loc 1 1627 52 is_stmt 0 view .LVU1105 + 3481 00fa 526A ldr r2, [r2, #36] +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3482 .loc 1 1627 16 view .LVU1106 + 3483 00fc 636A ldr r3, [r4, #36] +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3484 .loc 1 1627 27 view .LVU1107 + 3485 00fe 1A70 strb r2, [r3] +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3486 .loc 1 1630 11 is_stmt 1 view .LVU1108 +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3487 .loc 1 1630 15 is_stmt 0 view .LVU1109 + 3488 0100 636A ldr r3, [r4, #36] +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3489 .loc 1 1630 25 view .LVU1110 + 3490 0102 0133 adds r3, r3, #1 + 3491 0104 6362 str r3, [r4, #36] +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3492 .loc 1 1632 11 is_stmt 1 view .LVU1111 +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3493 .loc 1 1632 15 is_stmt 0 view .LVU1112 + 3494 0106 638D ldrh r3, [r4, #42] +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3495 .loc 1 1632 26 view .LVU1113 + 3496 0108 013B subs r3, r3, #1 + 3497 010a 9BB2 uxth r3, r3 + 3498 010c 6385 strh r3, [r4, #42] +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3499 .loc 1 1633 11 is_stmt 1 view .LVU1114 +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3500 .loc 1 1633 15 is_stmt 0 view .LVU1115 + 3501 010e 238D ldrh r3, [r4, #40] +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3502 .loc 1 1633 25 view .LVU1116 + 3503 0110 013B subs r3, r3, #1 + 3504 0112 2385 strh r3, [r4, #40] + 3505 .L232: +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3506 .loc 1 1636 9 is_stmt 1 view .LVU1117 +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3507 .loc 1 1636 16 is_stmt 0 view .LVU1118 + 3508 0114 0120 movs r0, #1 + 3509 0116 33E0 b .L226 + 3510 .L239: +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3511 .loc 1 1650 5 is_stmt 1 view .LVU1119 +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3512 .loc 1 1650 9 is_stmt 0 view .LVU1120 + 3513 0118 3A00 movs r2, r7 + 3514 011a 3100 movs r1, r6 + 3515 011c 2000 movs r0, r4 + 3516 011e FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 3517 .LVL257: +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3518 .loc 1 1650 8 discriminator 1 view .LVU1121 + 3519 0122 0028 cmp r0, #0 + ARM GAS /tmp/cc4IUqI9.s page 212 + + + 3520 0124 07D0 beq .L234 +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3521 .loc 1 1653 7 is_stmt 1 view .LVU1122 +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3522 .loc 1 1653 11 is_stmt 0 view .LVU1123 + 3523 0126 2268 ldr r2, [r4] +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3524 .loc 1 1653 21 view .LVU1124 + 3525 0128 5168 ldr r1, [r2, #4] +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3526 .loc 1 1653 27 view .LVU1125 + 3527 012a 8023 movs r3, #128 + 3528 012c 1B02 lsls r3, r3, #8 + 3529 012e 0B43 orrs r3, r1 + 3530 0130 5360 str r3, [r2, #4] +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3531 .loc 1 1654 7 is_stmt 1 view .LVU1126 +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3532 .loc 1 1654 14 is_stmt 0 view .LVU1127 + 3533 0132 0120 movs r0, #1 + 3534 0134 24E0 b .L226 + 3535 .L234: +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3536 .loc 1 1658 5 is_stmt 1 view .LVU1128 + 3537 0136 2368 ldr r3, [r4] + 3538 0138 2022 movs r2, #32 + 3539 013a DA61 str r2, [r3, #28] +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3540 .loc 1 1661 5 view .LVU1129 +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3541 .loc 1 1661 9 is_stmt 0 view .LVU1130 + 3542 013c 8021 movs r1, #128 + 3543 013e 0097 str r7, [sp] + 3544 0140 3300 movs r3, r6 + 3545 0142 1F3A subs r2, r2, #31 + 3546 0144 0902 lsls r1, r1, #8 + 3547 0146 2000 movs r0, r4 + 3548 0148 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3549 .LVL258: +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3550 .loc 1 1661 8 discriminator 1 view .LVU1131 + 3551 014c 0028 cmp r0, #0 + 3552 014e 07D0 beq .L235 +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3553 .loc 1 1664 7 is_stmt 1 view .LVU1132 +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3554 .loc 1 1664 11 is_stmt 0 view .LVU1133 + 3555 0150 2268 ldr r2, [r4] +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3556 .loc 1 1664 21 view .LVU1134 + 3557 0152 5168 ldr r1, [r2, #4] +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3558 .loc 1 1664 27 view .LVU1135 + 3559 0154 8023 movs r3, #128 + 3560 0156 1B02 lsls r3, r3, #8 + 3561 0158 0B43 orrs r3, r1 + 3562 015a 5360 str r3, [r2, #4] + ARM GAS /tmp/cc4IUqI9.s page 213 + + +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3563 .loc 1 1665 7 is_stmt 1 view .LVU1136 +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3564 .loc 1 1665 14 is_stmt 0 view .LVU1137 + 3565 015c 0120 movs r0, #1 + 3566 015e 0FE0 b .L226 + 3567 .L235: +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3568 .loc 1 1669 5 is_stmt 1 view .LVU1138 +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3569 .loc 1 1669 9 is_stmt 0 view .LVU1139 + 3570 0160 2268 ldr r2, [r4] +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3571 .loc 1 1669 19 view .LVU1140 + 3572 0162 5168 ldr r1, [r2, #4] +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3573 .loc 1 1669 25 view .LVU1141 + 3574 0164 8023 movs r3, #128 + 3575 0166 1B02 lsls r3, r3, #8 + 3576 0168 0B43 orrs r3, r1 + 3577 016a 5360 str r3, [r2, #4] +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3578 .loc 1 1671 5 is_stmt 1 view .LVU1142 +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3579 .loc 1 1671 17 is_stmt 0 view .LVU1143 + 3580 016c 4123 movs r3, #65 + 3581 016e 2022 movs r2, #32 + 3582 0170 E254 strb r2, [r4, r3] +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3583 .loc 1 1672 5 is_stmt 1 view .LVU1144 +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3584 .loc 1 1672 17 is_stmt 0 view .LVU1145 + 3585 0172 0023 movs r3, #0 + 3586 0174 2232 adds r2, r2, #34 + 3587 0176 A354 strb r3, [r4, r2] +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3588 .loc 1 1675 5 is_stmt 1 view .LVU1146 +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3589 .loc 1 1675 5 view .LVU1147 + 3590 0178 023A subs r2, r2, #2 + 3591 017a A354 strb r3, [r4, r2] +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3592 .loc 1 1675 5 view .LVU1148 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3593 .loc 1 1677 5 view .LVU1149 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3594 .loc 1 1677 12 is_stmt 0 view .LVU1150 + 3595 017c 00E0 b .L226 + 3596 .LVL259: + 3597 .L236: +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3598 .loc 1 1681 12 view .LVU1151 + 3599 017e 0220 movs r0, #2 + 3600 .LVL260: + 3601 .L226: +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3602 .loc 1 1683 1 view .LVU1152 + ARM GAS /tmp/cc4IUqI9.s page 214 + + + 3603 0180 02B0 add sp, sp, #8 + 3604 @ sp needed + 3605 .LVL261: + 3606 .LVL262: + 3607 .LVL263: +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3608 .loc 1 1683 1 view .LVU1153 + 3609 0182 80BC pop {r7} + 3610 0184 B846 mov r8, r7 + 3611 0186 F0BD pop {r4, r5, r6, r7, pc} + 3612 .LVL264: + 3613 .L237: +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3614 .loc 1 1578 5 discriminator 1 view .LVU1154 + 3615 0188 0220 movs r0, #2 + 3616 .LVL265: +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3617 .loc 1 1578 5 discriminator 1 view .LVU1155 + 3618 018a F9E7 b .L226 + 3619 .L241: + 3620 .align 2 + 3621 .L240: + 3622 018c FF7FFFFF .word -32769 + 3623 .cfi_endproc + 3624 .LFE47: + 3626 .section .text.HAL_I2C_Master_Transmit_IT,"ax",%progbits + 3627 .align 1 + 3628 .global HAL_I2C_Master_Transmit_IT + 3629 .syntax unified + 3630 .code 16 + 3631 .thumb_func + 3633 HAL_I2C_Master_Transmit_IT: + 3634 .LVL266: + 3635 .LFB48: +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3636 .loc 1 1697 1 is_stmt 1 view -0 + 3637 .cfi_startproc + 3638 @ args = 0, pretend = 0, frame = 0 + 3639 @ frame_needed = 0, uses_anonymous_args = 0 +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3640 .loc 1 1697 1 is_stmt 0 view .LVU1157 + 3641 0000 70B5 push {r4, r5, r6, lr} + 3642 .cfi_def_cfa_offset 16 + 3643 .cfi_offset 4, -16 + 3644 .cfi_offset 5, -12 + 3645 .cfi_offset 6, -8 + 3646 .cfi_offset 14, -4 + 3647 0002 82B0 sub sp, sp, #8 + 3648 .cfi_def_cfa_offset 24 + 3649 0004 0400 movs r4, r0 +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3650 .loc 1 1698 3 is_stmt 1 view .LVU1158 +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3651 .loc 1 1700 3 view .LVU1159 +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3652 .loc 1 1700 11 is_stmt 0 view .LVU1160 + 3653 0006 4120 movs r0, #65 + ARM GAS /tmp/cc4IUqI9.s page 215 + + + 3654 .LVL267: +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3655 .loc 1 1700 11 view .LVU1161 + 3656 0008 205C ldrb r0, [r4, r0] +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3657 .loc 1 1700 6 view .LVU1162 + 3658 000a 2028 cmp r0, #32 + 3659 000c 4DD1 bne .L248 +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3660 .loc 1 1702 5 is_stmt 1 view .LVU1163 +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3661 .loc 1 1702 9 is_stmt 0 view .LVU1164 + 3662 000e 2568 ldr r5, [r4] + 3663 0010 A869 ldr r0, [r5, #24] +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3664 .loc 1 1702 8 view .LVU1165 + 3665 0012 0004 lsls r0, r0, #16 + 3666 0014 4BD4 bmi .L249 +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3667 .loc 1 1708 5 is_stmt 1 view .LVU1166 +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3668 .loc 1 1708 5 view .LVU1167 + 3669 0016 4020 movs r0, #64 + 3670 0018 205C ldrb r0, [r4, r0] + 3671 001a 0128 cmp r0, #1 + 3672 001c 49D0 beq .L250 +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3673 .loc 1 1708 5 discriminator 2 view .LVU1168 + 3674 001e 4020 movs r0, #64 + 3675 0020 0126 movs r6, #1 + 3676 0022 2654 strb r6, [r4, r0] +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3677 .loc 1 1708 5 discriminator 2 view .LVU1169 +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3678 .loc 1 1710 5 view .LVU1170 +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3679 .loc 1 1710 23 is_stmt 0 view .LVU1171 + 3680 0024 0130 adds r0, r0, #1 + 3681 0026 2036 adds r6, r6, #32 + 3682 0028 2654 strb r6, [r4, r0] +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3683 .loc 1 1711 5 is_stmt 1 view .LVU1172 +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3684 .loc 1 1711 23 is_stmt 0 view .LVU1173 + 3685 002a 0130 adds r0, r0, #1 + 3686 002c 113E subs r6, r6, #17 + 3687 002e 2654 strb r6, [r4, r0] +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3688 .loc 1 1712 5 is_stmt 1 view .LVU1174 +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3689 .loc 1 1712 23 is_stmt 0 view .LVU1175 + 3690 0030 0020 movs r0, #0 + 3691 0032 6064 str r0, [r4, #68] +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3692 .loc 1 1715 5 is_stmt 1 view .LVU1176 +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3693 .loc 1 1715 23 is_stmt 0 view .LVU1177 + ARM GAS /tmp/cc4IUqI9.s page 216 + + + 3694 0034 6262 str r2, [r4, #36] +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3695 .loc 1 1716 5 is_stmt 1 view .LVU1178 +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3696 .loc 1 1716 23 is_stmt 0 view .LVU1179 + 3697 0036 6385 strh r3, [r4, #42] +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3698 .loc 1 1717 5 is_stmt 1 view .LVU1180 +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3699 .loc 1 1717 23 is_stmt 0 view .LVU1181 + 3700 0038 1F4B ldr r3, .L251 + 3701 .LVL268: +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3702 .loc 1 1717 23 view .LVU1182 + 3703 003a E362 str r3, [r4, #44] + 3704 .LVL269: +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3705 .loc 1 1718 5 is_stmt 1 view .LVU1183 +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3706 .loc 1 1718 23 is_stmt 0 view .LVU1184 + 3707 003c 1F4B ldr r3, .L251+4 + 3708 003e 6363 str r3, [r4, #52] +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3709 .loc 1 1720 5 is_stmt 1 view .LVU1185 +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3710 .loc 1 1720 13 is_stmt 0 view .LVU1186 + 3711 0040 638D ldrh r3, [r4, #42] + 3712 0042 9BB2 uxth r3, r3 +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3713 .loc 1 1720 8 view .LVU1187 + 3714 0044 FF2B cmp r3, #255 + 3715 0046 24D9 bls .L244 +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3716 .loc 1 1722 7 is_stmt 1 view .LVU1188 +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3717 .loc 1 1722 22 is_stmt 0 view .LVU1189 + 3718 0048 FF23 movs r3, #255 + 3719 004a 2385 strh r3, [r4, #40] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3720 .loc 1 1723 7 is_stmt 1 view .LVU1190 + 3721 .LVL270: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3722 .loc 1 1723 16 is_stmt 0 view .LVU1191 + 3723 004c 8023 movs r3, #128 + 3724 004e 5B04 lsls r3, r3, #17 + 3725 .LVL271: + 3726 .L245: +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3727 .loc 1 1733 5 is_stmt 1 view .LVU1192 +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3728 .loc 1 1733 13 is_stmt 0 view .LVU1193 + 3729 0050 208D ldrh r0, [r4, #40] +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3730 .loc 1 1733 8 view .LVU1194 + 3731 0052 0028 cmp r0, #0 + 3732 0054 22D0 beq .L246 +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 217 + + + 3733 .loc 1 1737 7 is_stmt 1 view .LVU1195 +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3734 .loc 1 1737 30 is_stmt 0 view .LVU1196 + 3735 0056 1278 ldrb r2, [r2] + 3736 .LVL272: +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3737 .loc 1 1737 28 view .LVU1197 + 3738 0058 AA62 str r2, [r5, #40] + 3739 .LVL273: +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3740 .loc 1 1740 7 is_stmt 1 view .LVU1198 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3741 .loc 1 1740 11 is_stmt 0 view .LVU1199 + 3742 005a 626A ldr r2, [r4, #36] +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3743 .loc 1 1740 21 view .LVU1200 + 3744 005c 0132 adds r2, r2, #1 + 3745 005e 6262 str r2, [r4, #36] +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3746 .loc 1 1742 7 is_stmt 1 view .LVU1201 +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3747 .loc 1 1742 11 is_stmt 0 view .LVU1202 + 3748 0060 628D ldrh r2, [r4, #42] +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3749 .loc 1 1742 22 view .LVU1203 + 3750 0062 013A subs r2, r2, #1 + 3751 0064 92B2 uxth r2, r2 + 3752 0066 6285 strh r2, [r4, #42] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3753 .loc 1 1743 7 is_stmt 1 view .LVU1204 +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3754 .loc 1 1743 11 is_stmt 0 view .LVU1205 + 3755 0068 228D ldrh r2, [r4, #40] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3756 .loc 1 1743 21 view .LVU1206 + 3757 006a 013A subs r2, r2, #1 + 3758 006c 92B2 uxth r2, r2 + 3759 006e 2285 strh r2, [r4, #40] +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3760 .loc 1 1745 7 is_stmt 1 view .LVU1207 + 3761 0070 0132 adds r2, r2, #1 + 3762 0072 D2B2 uxtb r2, r2 + 3763 0074 1248 ldr r0, .L251+8 + 3764 0076 0090 str r0, [sp] + 3765 0078 2000 movs r0, r4 + 3766 007a FFF7FEFF bl I2C_TransferConfig + 3767 .LVL274: + 3768 .L247: +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3769 .loc 1 1755 5 view .LVU1208 +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3770 .loc 1 1755 5 view .LVU1209 + 3771 007e 4023 movs r3, #64 + 3772 0080 0022 movs r2, #0 + 3773 0082 E254 strb r2, [r4, r3] +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3774 .loc 1 1755 5 view .LVU1210 + ARM GAS /tmp/cc4IUqI9.s page 218 + + +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3775 .loc 1 1765 5 view .LVU1211 + 3776 0084 0121 movs r1, #1 + 3777 0086 2000 movs r0, r4 + 3778 0088 FFF7FEFF bl I2C_Enable_IRQ + 3779 .LVL275: +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3780 .loc 1 1767 5 view .LVU1212 +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3781 .loc 1 1767 12 is_stmt 0 view .LVU1213 + 3782 008c 0020 movs r0, #0 + 3783 .LVL276: + 3784 .L243: +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3785 .loc 1 1773 1 view .LVU1214 + 3786 008e 02B0 add sp, sp, #8 + 3787 @ sp needed + 3788 .LVL277: +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3789 .loc 1 1773 1 view .LVU1215 + 3790 0090 70BD pop {r4, r5, r6, pc} + 3791 .LVL278: + 3792 .L244: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3793 .loc 1 1727 7 is_stmt 1 view .LVU1216 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3794 .loc 1 1727 28 is_stmt 0 view .LVU1217 + 3795 0092 638D ldrh r3, [r4, #42] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3796 .loc 1 1727 22 view .LVU1218 + 3797 0094 2385 strh r3, [r4, #40] +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3798 .loc 1 1728 7 is_stmt 1 view .LVU1219 + 3799 .LVL279: +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3800 .loc 1 1728 16 is_stmt 0 view .LVU1220 + 3801 0096 8023 movs r3, #128 + 3802 0098 9B04 lsls r3, r3, #18 + 3803 009a D9E7 b .L245 + 3804 .LVL280: + 3805 .L246: +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3806 .loc 1 1750 7 is_stmt 1 view .LVU1221 + 3807 009c C2B2 uxtb r2, r0 + 3808 .LVL281: +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3809 .loc 1 1750 7 is_stmt 0 view .LVU1222 + 3810 009e 0848 ldr r0, .L251+8 + 3811 00a0 0090 str r0, [sp] + 3812 .LVL282: +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3813 .loc 1 1750 7 view .LVU1223 + 3814 00a2 2000 movs r0, r4 + 3815 00a4 FFF7FEFF bl I2C_TransferConfig + 3816 .LVL283: +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3817 .loc 1 1750 7 view .LVU1224 + ARM GAS /tmp/cc4IUqI9.s page 219 + + + 3818 00a8 E9E7 b .L247 + 3819 .LVL284: + 3820 .L248: +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3821 .loc 1 1771 12 view .LVU1225 + 3822 00aa 0220 movs r0, #2 + 3823 00ac EFE7 b .L243 + 3824 .L249: +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3825 .loc 1 1704 14 view .LVU1226 + 3826 00ae 0220 movs r0, #2 + 3827 00b0 EDE7 b .L243 + 3828 .L250: +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3829 .loc 1 1708 5 discriminator 1 view .LVU1227 + 3830 00b2 0220 movs r0, #2 + 3831 00b4 EBE7 b .L243 + 3832 .L252: + 3833 00b6 C046 .align 2 + 3834 .L251: + 3835 00b8 0000FFFF .word -65536 + 3836 00bc 00000000 .word I2C_Master_ISR_IT + 3837 00c0 00200080 .word -2147475456 + 3838 .cfi_endproc + 3839 .LFE48: + 3841 .section .text.HAL_I2C_Master_Receive_IT,"ax",%progbits + 3842 .align 1 + 3843 .global HAL_I2C_Master_Receive_IT + 3844 .syntax unified + 3845 .code 16 + 3846 .thumb_func + 3848 HAL_I2C_Master_Receive_IT: + 3849 .LVL285: + 3850 .LFB49: +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3851 .loc 1 1787 1 is_stmt 1 view -0 + 3852 .cfi_startproc + 3853 @ args = 0, pretend = 0, frame = 0 + 3854 @ frame_needed = 0, uses_anonymous_args = 0 +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3855 .loc 1 1787 1 is_stmt 0 view .LVU1229 + 3856 0000 30B5 push {r4, r5, lr} + 3857 .cfi_def_cfa_offset 12 + 3858 .cfi_offset 4, -12 + 3859 .cfi_offset 5, -8 + 3860 .cfi_offset 14, -4 + 3861 0002 83B0 sub sp, sp, #12 + 3862 .cfi_def_cfa_offset 24 + 3863 0004 0400 movs r4, r0 +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3864 .loc 1 1788 3 is_stmt 1 view .LVU1230 +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3865 .loc 1 1790 3 view .LVU1231 +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3866 .loc 1 1790 11 is_stmt 0 view .LVU1232 + 3867 0006 4120 movs r0, #65 + 3868 .LVL286: + ARM GAS /tmp/cc4IUqI9.s page 220 + + +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3869 .loc 1 1790 11 view .LVU1233 + 3870 0008 205C ldrb r0, [r4, r0] +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3871 .loc 1 1790 6 view .LVU1234 + 3872 000a 2028 cmp r0, #32 + 3873 000c 36D1 bne .L257 +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3874 .loc 1 1792 5 is_stmt 1 view .LVU1235 +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3875 .loc 1 1792 9 is_stmt 0 view .LVU1236 + 3876 000e 2068 ldr r0, [r4] + 3877 0010 8069 ldr r0, [r0, #24] +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3878 .loc 1 1792 8 view .LVU1237 + 3879 0012 0004 lsls r0, r0, #16 + 3880 0014 34D4 bmi .L258 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3881 .loc 1 1798 5 is_stmt 1 view .LVU1238 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3882 .loc 1 1798 5 view .LVU1239 + 3883 0016 4020 movs r0, #64 + 3884 0018 205C ldrb r0, [r4, r0] + 3885 001a 0128 cmp r0, #1 + 3886 001c 32D0 beq .L259 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3887 .loc 1 1798 5 discriminator 2 view .LVU1240 + 3888 001e 4020 movs r0, #64 + 3889 0020 0125 movs r5, #1 + 3890 0022 2554 strb r5, [r4, r0] +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3891 .loc 1 1798 5 discriminator 2 view .LVU1241 +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3892 .loc 1 1800 5 view .LVU1242 +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3893 .loc 1 1800 23 is_stmt 0 view .LVU1243 + 3894 0024 0130 adds r0, r0, #1 + 3895 0026 2135 adds r5, r5, #33 + 3896 0028 2554 strb r5, [r4, r0] +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3897 .loc 1 1801 5 is_stmt 1 view .LVU1244 +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3898 .loc 1 1801 23 is_stmt 0 view .LVU1245 + 3899 002a 0130 adds r0, r0, #1 + 3900 002c 123D subs r5, r5, #18 + 3901 002e 2554 strb r5, [r4, r0] +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3902 .loc 1 1802 5 is_stmt 1 view .LVU1246 +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3903 .loc 1 1802 23 is_stmt 0 view .LVU1247 + 3904 0030 0020 movs r0, #0 + 3905 0032 6064 str r0, [r4, #68] +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3906 .loc 1 1805 5 is_stmt 1 view .LVU1248 +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3907 .loc 1 1805 23 is_stmt 0 view .LVU1249 + 3908 0034 6262 str r2, [r4, #36] + ARM GAS /tmp/cc4IUqI9.s page 221 + + +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3909 .loc 1 1806 5 is_stmt 1 view .LVU1250 +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3910 .loc 1 1806 23 is_stmt 0 view .LVU1251 + 3911 0036 6385 strh r3, [r4, #42] +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3912 .loc 1 1807 5 is_stmt 1 view .LVU1252 +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3913 .loc 1 1807 23 is_stmt 0 view .LVU1253 + 3914 0038 134B ldr r3, .L260 + 3915 .LVL287: +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3916 .loc 1 1807 23 view .LVU1254 + 3917 003a E362 str r3, [r4, #44] + 3918 .LVL288: +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3919 .loc 1 1808 5 is_stmt 1 view .LVU1255 +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3920 .loc 1 1808 23 is_stmt 0 view .LVU1256 + 3921 003c 134B ldr r3, .L260+4 + 3922 003e 6363 str r3, [r4, #52] +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3923 .loc 1 1810 5 is_stmt 1 view .LVU1257 +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3924 .loc 1 1810 13 is_stmt 0 view .LVU1258 + 3925 0040 638D ldrh r3, [r4, #42] + 3926 0042 9BB2 uxth r3, r3 +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3927 .loc 1 1810 8 view .LVU1259 + 3928 0044 FF2B cmp r3, #255 + 3929 0046 14D9 bls .L255 +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3930 .loc 1 1812 7 is_stmt 1 view .LVU1260 +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3931 .loc 1 1812 22 is_stmt 0 view .LVU1261 + 3932 0048 0123 movs r3, #1 + 3933 004a 2385 strh r3, [r4, #40] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3934 .loc 1 1813 7 is_stmt 1 view .LVU1262 + 3935 .LVL289: +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3936 .loc 1 1813 16 is_stmt 0 view .LVU1263 + 3937 004c 8023 movs r3, #128 + 3938 004e 5B04 lsls r3, r3, #17 + 3939 .LVL290: + 3940 .L256: +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3941 .loc 1 1823 5 is_stmt 1 view .LVU1264 +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3942 .loc 1 1823 55 is_stmt 0 view .LVU1265 + 3943 0050 228D ldrh r2, [r4, #40] + 3944 .LVL291: +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3945 .loc 1 1823 5 view .LVU1266 + 3946 0052 D2B2 uxtb r2, r2 + 3947 0054 0E48 ldr r0, .L260+8 + 3948 0056 0090 str r0, [sp] + ARM GAS /tmp/cc4IUqI9.s page 222 + + + 3949 .LVL292: +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3950 .loc 1 1823 5 view .LVU1267 + 3951 0058 2000 movs r0, r4 + 3952 005a FFF7FEFF bl I2C_TransferConfig + 3953 .LVL293: +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3954 .loc 1 1826 5 is_stmt 1 view .LVU1268 +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3955 .loc 1 1826 5 view .LVU1269 + 3956 005e 4023 movs r3, #64 + 3957 0060 0022 movs r2, #0 + 3958 0062 E254 strb r2, [r4, r3] +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3959 .loc 1 1826 5 view .LVU1270 +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3960 .loc 1 1836 5 view .LVU1271 + 3961 0064 0221 movs r1, #2 + 3962 0066 2000 movs r0, r4 + 3963 0068 FFF7FEFF bl I2C_Enable_IRQ + 3964 .LVL294: +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3965 .loc 1 1838 5 view .LVU1272 +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3966 .loc 1 1838 12 is_stmt 0 view .LVU1273 + 3967 006c 0020 movs r0, #0 + 3968 .LVL295: + 3969 .L254: +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3970 .loc 1 1844 1 view .LVU1274 + 3971 006e 03B0 add sp, sp, #12 + 3972 @ sp needed + 3973 .LVL296: +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3974 .loc 1 1844 1 view .LVU1275 + 3975 0070 30BD pop {r4, r5, pc} + 3976 .LVL297: + 3977 .L255: +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3978 .loc 1 1817 7 is_stmt 1 view .LVU1276 +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3979 .loc 1 1817 28 is_stmt 0 view .LVU1277 + 3980 0072 638D ldrh r3, [r4, #42] +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3981 .loc 1 1817 22 view .LVU1278 + 3982 0074 2385 strh r3, [r4, #40] +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3983 .loc 1 1818 7 is_stmt 1 view .LVU1279 + 3984 .LVL298: +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3985 .loc 1 1818 16 is_stmt 0 view .LVU1280 + 3986 0076 8023 movs r3, #128 + 3987 0078 9B04 lsls r3, r3, #18 + 3988 007a E9E7 b .L256 + 3989 .LVL299: + 3990 .L257: +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 223 + + + 3991 .loc 1 1842 12 view .LVU1281 + 3992 007c 0220 movs r0, #2 + 3993 007e F6E7 b .L254 + 3994 .L258: +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3995 .loc 1 1794 14 view .LVU1282 + 3996 0080 0220 movs r0, #2 + 3997 0082 F4E7 b .L254 + 3998 .L259: +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3999 .loc 1 1798 5 discriminator 1 view .LVU1283 + 4000 0084 0220 movs r0, #2 + 4001 0086 F2E7 b .L254 + 4002 .L261: + 4003 .align 2 + 4004 .L260: + 4005 0088 0000FFFF .word -65536 + 4006 008c 00000000 .word I2C_Master_ISR_IT + 4007 0090 00240080 .word -2147474432 + 4008 .cfi_endproc + 4009 .LFE49: + 4011 .section .text.HAL_I2C_Slave_Transmit_IT,"ax",%progbits + 4012 .align 1 + 4013 .global HAL_I2C_Slave_Transmit_IT + 4014 .syntax unified + 4015 .code 16 + 4016 .thumb_func + 4018 HAL_I2C_Slave_Transmit_IT: + 4019 .LVL300: + 4020 .LFB50: +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 4021 .loc 1 1855 1 is_stmt 1 view -0 + 4022 .cfi_startproc + 4023 @ args = 0, pretend = 0, frame = 0 + 4024 @ frame_needed = 0, uses_anonymous_args = 0 +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 4025 .loc 1 1855 1 is_stmt 0 view .LVU1285 + 4026 0000 70B5 push {r4, r5, r6, lr} + 4027 .cfi_def_cfa_offset 16 + 4028 .cfi_offset 4, -16 + 4029 .cfi_offset 5, -12 + 4030 .cfi_offset 6, -8 + 4031 .cfi_offset 14, -4 +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4032 .loc 1 1856 3 is_stmt 1 view .LVU1286 +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4033 .loc 1 1856 11 is_stmt 0 view .LVU1287 + 4034 0002 4123 movs r3, #65 + 4035 0004 C35C ldrb r3, [r0, r3] +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4036 .loc 1 1856 6 view .LVU1288 + 4037 0006 202B cmp r3, #32 + 4038 0008 36D1 bne .L265 +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4039 .loc 1 1859 5 is_stmt 1 view .LVU1289 +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4040 .loc 1 1859 5 view .LVU1290 + ARM GAS /tmp/cc4IUqI9.s page 224 + + + 4041 000a 2033 adds r3, r3, #32 + 4042 000c C35C ldrb r3, [r0, r3] + 4043 000e 012B cmp r3, #1 + 4044 0010 34D0 beq .L266 +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4045 .loc 1 1859 5 discriminator 2 view .LVU1291 + 4046 0012 4023 movs r3, #64 + 4047 0014 0124 movs r4, #1 + 4048 0016 C454 strb r4, [r0, r3] +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4049 .loc 1 1859 5 discriminator 2 view .LVU1292 +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4050 .loc 1 1861 5 view .LVU1293 +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4051 .loc 1 1861 23 is_stmt 0 view .LVU1294 + 4052 0018 0133 adds r3, r3, #1 + 4053 001a 2034 adds r4, r4, #32 + 4054 001c C454 strb r4, [r0, r3] +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4055 .loc 1 1862 5 is_stmt 1 view .LVU1295 +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4056 .loc 1 1862 23 is_stmt 0 view .LVU1296 + 4057 001e 0133 adds r3, r3, #1 + 4058 0020 013C subs r4, r4, #1 + 4059 0022 C454 strb r4, [r0, r3] +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4060 .loc 1 1863 5 is_stmt 1 view .LVU1297 +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4061 .loc 1 1863 23 is_stmt 0 view .LVU1298 + 4062 0024 0023 movs r3, #0 + 4063 0026 4364 str r3, [r0, #68] +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4064 .loc 1 1866 5 is_stmt 1 view .LVU1299 +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4065 .loc 1 1866 9 is_stmt 0 view .LVU1300 + 4066 0028 0468 ldr r4, [r0] +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4067 .loc 1 1866 19 view .LVU1301 + 4068 002a 6368 ldr r3, [r4, #4] +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4069 .loc 1 1866 25 view .LVU1302 + 4070 002c 144D ldr r5, .L268 + 4071 002e 2B40 ands r3, r5 + 4072 0030 6360 str r3, [r4, #4] +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4073 .loc 1 1869 5 is_stmt 1 view .LVU1303 +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4074 .loc 1 1869 23 is_stmt 0 view .LVU1304 + 4075 0032 4162 str r1, [r0, #36] +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4076 .loc 1 1870 5 is_stmt 1 view .LVU1305 +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4077 .loc 1 1870 23 is_stmt 0 view .LVU1306 + 4078 0034 4285 strh r2, [r0, #42] +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4079 .loc 1 1871 5 is_stmt 1 view .LVU1307 +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + ARM GAS /tmp/cc4IUqI9.s page 225 + + + 4080 .loc 1 1871 29 is_stmt 0 view .LVU1308 + 4081 0036 438D ldrh r3, [r0, #42] +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4082 .loc 1 1871 23 view .LVU1309 + 4083 0038 0385 strh r3, [r0, #40] +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 4084 .loc 1 1872 5 is_stmt 1 view .LVU1310 +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 4085 .loc 1 1872 23 is_stmt 0 view .LVU1311 + 4086 003a 124B ldr r3, .L268+4 + 4087 003c C362 str r3, [r0, #44] +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4088 .loc 1 1873 5 is_stmt 1 view .LVU1312 +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4089 .loc 1 1873 23 is_stmt 0 view .LVU1313 + 4090 003e 124B ldr r3, .L268+8 + 4091 0040 4363 str r3, [r0, #52] +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4092 .loc 1 1876 5 is_stmt 1 view .LVU1314 +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4093 .loc 1 1876 19 is_stmt 0 view .LVU1315 + 4094 0042 026A ldr r2, [r0, #32] + 4095 .LVL301: +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4096 .loc 1 1876 8 view .LVU1316 + 4097 0044 8023 movs r3, #128 + 4098 0046 9B02 lsls r3, r3, #10 + 4099 0048 9A42 cmp r2, r3 + 4100 004a 07D0 beq .L267 + 4101 .L264: +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4102 .loc 1 1890 5 is_stmt 1 view .LVU1317 +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4103 .loc 1 1890 5 view .LVU1318 + 4104 004c 4023 movs r3, #64 + 4105 004e 0022 movs r2, #0 + 4106 0050 C254 strb r2, [r0, r3] +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4107 .loc 1 1890 5 view .LVU1319 +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4108 .loc 1 1900 5 view .LVU1320 + 4109 0052 0E49 ldr r1, .L268+12 + 4110 .LVL302: +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4111 .loc 1 1900 5 is_stmt 0 view .LVU1321 + 4112 0054 FFF7FEFF bl I2C_Enable_IRQ + 4113 .LVL303: +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4114 .loc 1 1902 5 is_stmt 1 view .LVU1322 +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4115 .loc 1 1902 12 is_stmt 0 view .LVU1323 + 4116 0058 0020 movs r0, #0 + 4117 .L263: +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4118 .loc 1 1908 1 view .LVU1324 + 4119 @ sp needed + 4120 005a 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/cc4IUqI9.s page 226 + + + 4121 .LVL304: + 4122 .L267: +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4123 .loc 1 1880 7 is_stmt 1 view .LVU1325 +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4124 .loc 1 1880 11 is_stmt 0 view .LVU1326 + 4125 005c 0368 ldr r3, [r0] +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4126 .loc 1 1880 30 view .LVU1327 + 4127 005e 0A78 ldrb r2, [r1] +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4128 .loc 1 1880 28 view .LVU1328 + 4129 0060 9A62 str r2, [r3, #40] +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4130 .loc 1 1883 7 is_stmt 1 view .LVU1329 +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4131 .loc 1 1883 11 is_stmt 0 view .LVU1330 + 4132 0062 436A ldr r3, [r0, #36] +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4133 .loc 1 1883 21 view .LVU1331 + 4134 0064 0133 adds r3, r3, #1 + 4135 0066 4362 str r3, [r0, #36] +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 4136 .loc 1 1885 7 is_stmt 1 view .LVU1332 +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 4137 .loc 1 1885 11 is_stmt 0 view .LVU1333 + 4138 0068 438D ldrh r3, [r0, #42] +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 4139 .loc 1 1885 22 view .LVU1334 + 4140 006a 013B subs r3, r3, #1 + 4141 006c 9BB2 uxth r3, r3 + 4142 006e 4385 strh r3, [r0, #42] +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4143 .loc 1 1886 7 is_stmt 1 view .LVU1335 +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4144 .loc 1 1886 11 is_stmt 0 view .LVU1336 + 4145 0070 038D ldrh r3, [r0, #40] +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4146 .loc 1 1886 21 view .LVU1337 + 4147 0072 013B subs r3, r3, #1 + 4148 0074 0385 strh r3, [r0, #40] + 4149 0076 E9E7 b .L264 + 4150 .LVL305: + 4151 .L265: +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4152 .loc 1 1906 12 view .LVU1338 + 4153 0078 0220 movs r0, #2 + 4154 .LVL306: +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4155 .loc 1 1906 12 view .LVU1339 + 4156 007a EEE7 b .L263 + 4157 .LVL307: + 4158 .L266: +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4159 .loc 1 1859 5 discriminator 1 view .LVU1340 + 4160 007c 0220 movs r0, #2 + 4161 .LVL308: + ARM GAS /tmp/cc4IUqI9.s page 227 + + +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4162 .loc 1 1859 5 discriminator 1 view .LVU1341 + 4163 007e ECE7 b .L263 + 4164 .L269: + 4165 .align 2 + 4166 .L268: + 4167 0080 FF7FFFFF .word -32769 + 4168 0084 0000FFFF .word -65536 + 4169 0088 00000000 .word I2C_Slave_ISR_IT + 4170 008c 01800000 .word 32769 + 4171 .cfi_endproc + 4172 .LFE50: + 4174 .section .text.HAL_I2C_Slave_Receive_IT,"ax",%progbits + 4175 .align 1 + 4176 .global HAL_I2C_Slave_Receive_IT + 4177 .syntax unified + 4178 .code 16 + 4179 .thumb_func + 4181 HAL_I2C_Slave_Receive_IT: + 4182 .LVL309: + 4183 .LFB51: +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 4184 .loc 1 1919 1 is_stmt 1 view -0 + 4185 .cfi_startproc + 4186 @ args = 0, pretend = 0, frame = 0 + 4187 @ frame_needed = 0, uses_anonymous_args = 0 +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 4188 .loc 1 1919 1 is_stmt 0 view .LVU1343 + 4189 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 4190 .cfi_def_cfa_offset 24 + 4191 .cfi_offset 3, -24 + 4192 .cfi_offset 4, -20 + 4193 .cfi_offset 5, -16 + 4194 .cfi_offset 6, -12 + 4195 .cfi_offset 7, -8 + 4196 .cfi_offset 14, -4 +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4197 .loc 1 1920 3 is_stmt 1 view .LVU1344 +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4198 .loc 1 1920 11 is_stmt 0 view .LVU1345 + 4199 0002 4123 movs r3, #65 + 4200 0004 C35C ldrb r3, [r0, r3] +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4201 .loc 1 1920 6 view .LVU1346 + 4202 0006 202B cmp r3, #32 + 4203 0008 21D1 bne .L272 +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4204 .loc 1 1923 5 is_stmt 1 view .LVU1347 +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4205 .loc 1 1923 5 view .LVU1348 + 4206 000a 2033 adds r3, r3, #32 + 4207 000c C35C ldrb r3, [r0, r3] + 4208 000e 012B cmp r3, #1 + 4209 0010 1FD0 beq .L273 +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4210 .loc 1 1923 5 discriminator 2 view .LVU1349 + 4211 0012 4024 movs r4, #64 + ARM GAS /tmp/cc4IUqI9.s page 228 + + + 4212 0014 0123 movs r3, #1 + 4213 0016 0355 strb r3, [r0, r4] +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4214 .loc 1 1923 5 discriminator 2 view .LVU1350 +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4215 .loc 1 1925 5 view .LVU1351 +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4216 .loc 1 1925 23 is_stmt 0 view .LVU1352 + 4217 0018 4033 adds r3, r3, #64 + 4218 001a 2225 movs r5, #34 + 4219 001c C554 strb r5, [r0, r3] +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4220 .loc 1 1926 5 is_stmt 1 view .LVU1353 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4221 .loc 1 1926 23 is_stmt 0 view .LVU1354 + 4222 001e 0133 adds r3, r3, #1 + 4223 0020 023D subs r5, r5, #2 + 4224 0022 C554 strb r5, [r0, r3] +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4225 .loc 1 1927 5 is_stmt 1 view .LVU1355 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4226 .loc 1 1927 23 is_stmt 0 view .LVU1356 + 4227 0024 0025 movs r5, #0 + 4228 0026 4564 str r5, [r0, #68] +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4229 .loc 1 1930 5 is_stmt 1 view .LVU1357 +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4230 .loc 1 1930 9 is_stmt 0 view .LVU1358 + 4231 0028 0668 ldr r6, [r0] +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4232 .loc 1 1930 19 view .LVU1359 + 4233 002a 7368 ldr r3, [r6, #4] +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4234 .loc 1 1930 25 view .LVU1360 + 4235 002c 0A4F ldr r7, .L274 + 4236 002e 3B40 ands r3, r7 + 4237 0030 7360 str r3, [r6, #4] +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4238 .loc 1 1933 5 is_stmt 1 view .LVU1361 +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4239 .loc 1 1933 23 is_stmt 0 view .LVU1362 + 4240 0032 4162 str r1, [r0, #36] +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4241 .loc 1 1934 5 is_stmt 1 view .LVU1363 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4242 .loc 1 1934 23 is_stmt 0 view .LVU1364 + 4243 0034 4285 strh r2, [r0, #42] +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4244 .loc 1 1935 5 is_stmt 1 view .LVU1365 +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4245 .loc 1 1935 29 is_stmt 0 view .LVU1366 + 4246 0036 438D ldrh r3, [r0, #42] +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4247 .loc 1 1935 23 view .LVU1367 + 4248 0038 0385 strh r3, [r0, #40] +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 4249 .loc 1 1936 5 is_stmt 1 view .LVU1368 + ARM GAS /tmp/cc4IUqI9.s page 229 + + +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 4250 .loc 1 1936 23 is_stmt 0 view .LVU1369 + 4251 003a 084B ldr r3, .L274+4 + 4252 003c C362 str r3, [r0, #44] +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4253 .loc 1 1937 5 is_stmt 1 view .LVU1370 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4254 .loc 1 1937 23 is_stmt 0 view .LVU1371 + 4255 003e 084B ldr r3, .L274+8 + 4256 0040 4363 str r3, [r0, #52] +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4257 .loc 1 1940 5 is_stmt 1 view .LVU1372 +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4258 .loc 1 1940 5 view .LVU1373 + 4259 0042 0555 strb r5, [r0, r4] +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4260 .loc 1 1940 5 view .LVU1374 +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4261 .loc 1 1950 5 view .LVU1375 + 4262 0044 0749 ldr r1, .L274+12 + 4263 .LVL310: +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4264 .loc 1 1950 5 is_stmt 0 view .LVU1376 + 4265 0046 FFF7FEFF bl I2C_Enable_IRQ + 4266 .LVL311: +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4267 .loc 1 1952 5 is_stmt 1 view .LVU1377 +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4268 .loc 1 1952 12 is_stmt 0 view .LVU1378 + 4269 004a 0020 movs r0, #0 + 4270 .L271: +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4271 .loc 1 1958 1 view .LVU1379 + 4272 @ sp needed + 4273 004c F8BD pop {r3, r4, r5, r6, r7, pc} + 4274 .LVL312: + 4275 .L272: +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4276 .loc 1 1956 12 view .LVU1380 + 4277 004e 0220 movs r0, #2 + 4278 .LVL313: +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4279 .loc 1 1956 12 view .LVU1381 + 4280 0050 FCE7 b .L271 + 4281 .LVL314: + 4282 .L273: +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4283 .loc 1 1923 5 discriminator 1 view .LVU1382 + 4284 0052 0220 movs r0, #2 + 4285 .LVL315: +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4286 .loc 1 1923 5 discriminator 1 view .LVU1383 + 4287 0054 FAE7 b .L271 + 4288 .L275: + 4289 0056 C046 .align 2 + 4290 .L274: + 4291 0058 FF7FFFFF .word -32769 + ARM GAS /tmp/cc4IUqI9.s page 230 + + + 4292 005c 0000FFFF .word -65536 + 4293 0060 00000000 .word I2C_Slave_ISR_IT + 4294 0064 02800000 .word 32770 + 4295 .cfi_endproc + 4296 .LFE51: + 4298 .section .text.HAL_I2C_Master_Transmit_DMA,"ax",%progbits + 4299 .align 1 + 4300 .global HAL_I2C_Master_Transmit_DMA + 4301 .syntax unified + 4302 .code 16 + 4303 .thumb_func + 4305 HAL_I2C_Master_Transmit_DMA: + 4306 .LVL316: + 4307 .LFB52: +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 4308 .loc 1 1972 1 is_stmt 1 view -0 + 4309 .cfi_startproc + 4310 @ args = 0, pretend = 0, frame = 0 + 4311 @ frame_needed = 0, uses_anonymous_args = 0 +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 4312 .loc 1 1972 1 is_stmt 0 view .LVU1385 + 4313 0000 F0B5 push {r4, r5, r6, r7, lr} + 4314 .cfi_def_cfa_offset 20 + 4315 .cfi_offset 4, -20 + 4316 .cfi_offset 5, -16 + 4317 .cfi_offset 6, -12 + 4318 .cfi_offset 7, -8 + 4319 .cfi_offset 14, -4 + 4320 0002 C646 mov lr, r8 + 4321 0004 00B5 push {lr} + 4322 .cfi_def_cfa_offset 24 + 4323 .cfi_offset 8, -24 + 4324 0006 82B0 sub sp, sp, #8 + 4325 .cfi_def_cfa_offset 32 + 4326 0008 0400 movs r4, r0 + 4327 000a 0D00 movs r5, r1 +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4328 .loc 1 1973 3 is_stmt 1 view .LVU1386 +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 4329 .loc 1 1974 3 view .LVU1387 +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4330 .loc 1 1975 3 view .LVU1388 + 4331 .LVL317: +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4332 .loc 1 1977 3 view .LVU1389 +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4333 .loc 1 1977 11 is_stmt 0 view .LVU1390 + 4334 000c 4121 movs r1, #65 + 4335 .LVL318: +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4336 .loc 1 1977 11 view .LVU1391 + 4337 000e 415C ldrb r1, [r0, r1] +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4338 .loc 1 1977 6 view .LVU1392 + 4339 0010 2029 cmp r1, #32 + 4340 0012 00D0 beq .LCB4098 + 4341 0014 A2E0 b .L286 @long jump + ARM GAS /tmp/cc4IUqI9.s page 231 + + + 4342 .LCB4098: +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4343 .loc 1 1979 5 is_stmt 1 view .LVU1393 +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4344 .loc 1 1979 9 is_stmt 0 view .LVU1394 + 4345 0016 0668 ldr r6, [r0] + 4346 0018 B069 ldr r0, [r6, #24] + 4347 .LVL319: +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4348 .loc 1 1979 9 view .LVU1395 + 4349 001a 8021 movs r1, #128 + 4350 001c 0902 lsls r1, r1, #8 + 4351 001e 0700 movs r7, r0 + 4352 0020 0F40 ands r7, r1 +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4353 .loc 1 1979 8 view .LVU1396 + 4354 0022 0842 tst r0, r1 + 4355 0024 00D0 beq .LCB4108 + 4356 0026 9EE0 b .L287 @long jump + 4357 .LCB4108: +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4358 .loc 1 1985 5 is_stmt 1 view .LVU1397 +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4359 .loc 1 1985 5 view .LVU1398 + 4360 0028 4021 movs r1, #64 + 4361 002a 615C ldrb r1, [r4, r1] + 4362 002c 0129 cmp r1, #1 + 4363 002e 00D1 bne .LCB4114 + 4364 0030 9BE0 b .L288 @long jump + 4365 .LCB4114: +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4366 .loc 1 1985 5 discriminator 2 view .LVU1399 + 4367 0032 4021 movs r1, #64 + 4368 0034 0120 movs r0, #1 + 4369 0036 6054 strb r0, [r4, r1] +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4370 .loc 1 1985 5 discriminator 2 view .LVU1400 +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4371 .loc 1 1987 5 view .LVU1401 +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4372 .loc 1 1987 23 is_stmt 0 view .LVU1402 + 4373 0038 0131 adds r1, r1, #1 + 4374 003a 2030 adds r0, r0, #32 + 4375 003c 6054 strb r0, [r4, r1] +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4376 .loc 1 1988 5 is_stmt 1 view .LVU1403 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4377 .loc 1 1988 23 is_stmt 0 view .LVU1404 + 4378 003e 0131 adds r1, r1, #1 + 4379 0040 1138 subs r0, r0, #17 + 4380 0042 6054 strb r0, [r4, r1] +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4381 .loc 1 1989 5 is_stmt 1 view .LVU1405 +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4382 .loc 1 1989 23 is_stmt 0 view .LVU1406 + 4383 0044 0021 movs r1, #0 + 4384 0046 6164 str r1, [r4, #68] + ARM GAS /tmp/cc4IUqI9.s page 232 + + +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4385 .loc 1 1992 5 is_stmt 1 view .LVU1407 +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4386 .loc 1 1992 23 is_stmt 0 view .LVU1408 + 4387 0048 6262 str r2, [r4, #36] +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4388 .loc 1 1993 5 is_stmt 1 view .LVU1409 +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4389 .loc 1 1993 23 is_stmt 0 view .LVU1410 + 4390 004a 6385 strh r3, [r4, #42] +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4391 .loc 1 1994 5 is_stmt 1 view .LVU1411 +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4392 .loc 1 1994 23 is_stmt 0 view .LVU1412 + 4393 004c 484B ldr r3, .L291 + 4394 .LVL320: +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4395 .loc 1 1994 23 view .LVU1413 + 4396 004e E362 str r3, [r4, #44] + 4397 .LVL321: +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4398 .loc 1 1995 5 is_stmt 1 view .LVU1414 +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4399 .loc 1 1995 23 is_stmt 0 view .LVU1415 + 4400 0050 484B ldr r3, .L291+4 + 4401 0052 6363 str r3, [r4, #52] +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4402 .loc 1 1997 5 is_stmt 1 view .LVU1416 +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4403 .loc 1 1997 13 is_stmt 0 view .LVU1417 + 4404 0054 638D ldrh r3, [r4, #42] + 4405 0056 9BB2 uxth r3, r3 +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4406 .loc 1 1997 8 view .LVU1418 + 4407 0058 FF2B cmp r3, #255 + 4408 005a 3AD9 bls .L278 +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4409 .loc 1 1999 7 is_stmt 1 view .LVU1419 +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4410 .loc 1 1999 22 is_stmt 0 view .LVU1420 + 4411 005c FF23 movs r3, #255 + 4412 005e 2385 strh r3, [r4, #40] +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4413 .loc 1 2000 7 is_stmt 1 view .LVU1421 + 4414 .LVL322: +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4415 .loc 1 2000 16 is_stmt 0 view .LVU1422 + 4416 0060 8023 movs r3, #128 + 4417 0062 5B04 lsls r3, r3, #17 + 4418 0064 9846 mov r8, r3 + 4419 .LVL323: + 4420 .L279: +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4421 .loc 1 2008 5 is_stmt 1 view .LVU1423 +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4422 .loc 1 2008 13 is_stmt 0 view .LVU1424 + 4423 0066 238D ldrh r3, [r4, #40] + ARM GAS /tmp/cc4IUqI9.s page 233 + + +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4424 .loc 1 2008 8 view .LVU1425 + 4425 0068 002B cmp r3, #0 + 4426 006a 0BD0 beq .L280 +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4427 .loc 1 2012 7 is_stmt 1 view .LVU1426 +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4428 .loc 1 2012 30 is_stmt 0 view .LVU1427 + 4429 006c 1378 ldrb r3, [r2] +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4430 .loc 1 2012 28 view .LVU1428 + 4431 006e B362 str r3, [r6, #40] +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4432 .loc 1 2015 7 is_stmt 1 view .LVU1429 +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4433 .loc 1 2015 11 is_stmt 0 view .LVU1430 + 4434 0070 636A ldr r3, [r4, #36] +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4435 .loc 1 2015 21 view .LVU1431 + 4436 0072 0133 adds r3, r3, #1 + 4437 0074 6362 str r3, [r4, #36] +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 4438 .loc 1 2017 7 is_stmt 1 view .LVU1432 +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 4439 .loc 1 2017 24 is_stmt 0 view .LVU1433 + 4440 0076 278D ldrh r7, [r4, #40] + 4441 .LVL324: +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 4442 .loc 1 2018 7 is_stmt 1 view .LVU1434 +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 4443 .loc 1 2018 11 is_stmt 0 view .LVU1435 + 4444 0078 638D ldrh r3, [r4, #42] +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 4445 .loc 1 2018 22 view .LVU1436 + 4446 007a 013B subs r3, r3, #1 + 4447 007c 9BB2 uxth r3, r3 + 4448 007e 6385 strh r3, [r4, #42] +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4449 .loc 1 2019 7 is_stmt 1 view .LVU1437 +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4450 .loc 1 2019 21 is_stmt 0 view .LVU1438 + 4451 0080 7B1E subs r3, r7, #1 + 4452 0082 2385 strh r3, [r4, #40] + 4453 .LVL325: + 4454 .L280: +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4455 .loc 1 2022 5 is_stmt 1 view .LVU1439 +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4456 .loc 1 2022 13 is_stmt 0 view .LVU1440 + 4457 0084 238D ldrh r3, [r4, #40] +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4458 .loc 1 2022 8 view .LVU1441 + 4459 0086 002B cmp r3, #0 + 4460 0088 54D0 beq .L281 +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4461 .loc 1 2024 7 is_stmt 1 view .LVU1442 +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 234 + + + 4462 .loc 1 2024 15 is_stmt 0 view .LVU1443 + 4463 008a A36B ldr r3, [r4, #56] +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4464 .loc 1 2024 10 view .LVU1444 + 4465 008c 002B cmp r3, #0 + 4466 008e 26D0 beq .L282 +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4467 .loc 1 2027 9 is_stmt 1 view .LVU1445 +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4468 .loc 1 2027 40 is_stmt 0 view .LVU1446 + 4469 0090 394A ldr r2, .L291+8 + 4470 .LVL326: +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4471 .loc 1 2027 40 view .LVU1447 + 4472 0092 9A62 str r2, [r3, #40] +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4473 .loc 1 2030 9 is_stmt 1 view .LVU1448 +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4474 .loc 1 2030 13 is_stmt 0 view .LVU1449 + 4475 0094 A36B ldr r3, [r4, #56] +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4476 .loc 1 2030 41 view .LVU1450 + 4477 0096 394A ldr r2, .L291+12 + 4478 0098 1A63 str r2, [r3, #48] +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4479 .loc 1 2033 9 is_stmt 1 view .LVU1451 +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4480 .loc 1 2033 13 is_stmt 0 view .LVU1452 + 4481 009a A26B ldr r2, [r4, #56] +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4482 .loc 1 2033 44 view .LVU1453 + 4483 009c 0023 movs r3, #0 + 4484 009e D362 str r3, [r2, #44] +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4485 .loc 1 2034 9 is_stmt 1 view .LVU1454 +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4486 .loc 1 2034 13 is_stmt 0 view .LVU1455 + 4487 00a0 A26B ldr r2, [r4, #56] +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4488 .loc 1 2034 41 view .LVU1456 + 4489 00a2 5363 str r3, [r2, #52] +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 4490 .loc 1 2037 9 is_stmt 1 view .LVU1457 +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 4491 .loc 1 2037 70 is_stmt 0 view .LVU1458 + 4492 00a4 616A ldr r1, [r4, #36] +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4493 .loc 1 2038 57 view .LVU1459 + 4494 00a6 2268 ldr r2, [r4] +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4495 .loc 1 2038 52 view .LVU1460 + 4496 00a8 2832 adds r2, r2, #40 +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4497 .loc 1 2038 79 view .LVU1461 + 4498 00aa 238D ldrh r3, [r4, #40] +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 4499 .loc 1 2037 25 view .LVU1462 + ARM GAS /tmp/cc4IUqI9.s page 235 + + + 4500 00ac A06B ldr r0, [r4, #56] + 4501 00ae FFF7FEFF bl HAL_DMA_Start_IT + 4502 .LVL327: +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4503 .loc 1 2055 7 is_stmt 1 view .LVU1463 +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4504 .loc 1 2055 10 is_stmt 0 view .LVU1464 + 4505 00b2 0028 cmp r0, #0 + 4506 00b4 21D0 beq .L290 +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4507 .loc 1 2080 9 is_stmt 1 view .LVU1465 +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4508 .loc 1 2080 25 is_stmt 0 view .LVU1466 + 4509 00b6 4123 movs r3, #65 + 4510 00b8 2022 movs r2, #32 + 4511 00ba E254 strb r2, [r4, r3] +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4512 .loc 1 2081 9 is_stmt 1 view .LVU1467 +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4513 .loc 1 2081 25 is_stmt 0 view .LVU1468 + 4514 00bc 0022 movs r2, #0 + 4515 00be 0133 adds r3, r3, #1 + 4516 00c0 E254 strb r2, [r4, r3] +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4517 .loc 1 2084 9 is_stmt 1 view .LVU1469 +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4518 .loc 1 2084 13 is_stmt 0 view .LVU1470 + 4519 00c2 636C ldr r3, [r4, #68] +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4520 .loc 1 2084 25 view .LVU1471 + 4521 00c4 1021 movs r1, #16 + 4522 00c6 0B43 orrs r3, r1 + 4523 00c8 6364 str r3, [r4, #68] +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4524 .loc 1 2087 9 is_stmt 1 view .LVU1472 +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4525 .loc 1 2087 9 view .LVU1473 + 4526 00ca 4023 movs r3, #64 + 4527 00cc E254 strb r2, [r4, r3] +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4528 .loc 1 2087 9 view .LVU1474 +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4529 .loc 1 2089 9 view .LVU1475 +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4530 .loc 1 2089 16 is_stmt 0 view .LVU1476 + 4531 00ce 0120 movs r0, #1 + 4532 .LVL328: +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4533 .loc 1 2089 16 view .LVU1477 + 4534 00d0 45E0 b .L277 + 4535 .LVL329: + 4536 .L278: +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4537 .loc 1 2004 7 is_stmt 1 view .LVU1478 +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4538 .loc 1 2004 28 is_stmt 0 view .LVU1479 + 4539 00d2 638D ldrh r3, [r4, #42] + ARM GAS /tmp/cc4IUqI9.s page 236 + + +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4540 .loc 1 2004 22 view .LVU1480 + 4541 00d4 2385 strh r3, [r4, #40] +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4542 .loc 1 2005 7 is_stmt 1 view .LVU1481 + 4543 .LVL330: +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4544 .loc 1 2005 16 is_stmt 0 view .LVU1482 + 4545 00d6 8023 movs r3, #128 + 4546 00d8 9B04 lsls r3, r3, #18 + 4547 00da 9846 mov r8, r3 + 4548 00dc C3E7 b .L279 + 4549 .LVL331: + 4550 .L282: +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4551 .loc 1 2043 9 is_stmt 1 view .LVU1483 +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4552 .loc 1 2043 25 is_stmt 0 view .LVU1484 + 4553 00de 4123 movs r3, #65 + 4554 00e0 2022 movs r2, #32 + 4555 .LVL332: +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4556 .loc 1 2043 25 view .LVU1485 + 4557 00e2 E254 strb r2, [r4, r3] +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4558 .loc 1 2044 9 is_stmt 1 view .LVU1486 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4559 .loc 1 2044 25 is_stmt 0 view .LVU1487 + 4560 00e4 0022 movs r2, #0 + 4561 00e6 0133 adds r3, r3, #1 + 4562 00e8 E254 strb r2, [r4, r3] +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4563 .loc 1 2047 9 is_stmt 1 view .LVU1488 +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4564 .loc 1 2047 13 is_stmt 0 view .LVU1489 + 4565 00ea 636C ldr r3, [r4, #68] +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4566 .loc 1 2047 25 view .LVU1490 + 4567 00ec 8021 movs r1, #128 + 4568 00ee 0B43 orrs r3, r1 + 4569 00f0 6364 str r3, [r4, #68] +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4570 .loc 1 2050 9 is_stmt 1 view .LVU1491 +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4571 .loc 1 2050 9 view .LVU1492 + 4572 00f2 4023 movs r3, #64 + 4573 00f4 E254 strb r2, [r4, r3] +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4574 .loc 1 2050 9 view .LVU1493 +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4575 .loc 1 2052 9 view .LVU1494 +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4576 .loc 1 2052 16 is_stmt 0 view .LVU1495 + 4577 00f6 0120 movs r0, #1 + 4578 00f8 31E0 b .L277 + 4579 .LVL333: + 4580 .L290: + ARM GAS /tmp/cc4IUqI9.s page 237 + + +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); + 4581 .loc 1 2059 9 is_stmt 1 view .LVU1496 +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); + 4582 .loc 1 2059 60 is_stmt 0 view .LVU1497 + 4583 00fa 228D ldrh r2, [r4, #40] +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); + 4584 .loc 1 2059 9 view .LVU1498 + 4585 00fc 0132 adds r2, r2, #1 + 4586 00fe D2B2 uxtb r2, r2 + 4587 0100 1F4B ldr r3, .L291+16 + 4588 0102 0093 str r3, [sp] + 4589 0104 4346 mov r3, r8 + 4590 0106 2900 movs r1, r5 + 4591 0108 2000 movs r0, r4 + 4592 .LVL334: +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); + 4593 .loc 1 2059 9 view .LVU1499 + 4594 010a FFF7FEFF bl I2C_TransferConfig + 4595 .LVL335: +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4596 .loc 1 2063 9 is_stmt 1 view .LVU1500 +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4597 .loc 1 2063 13 is_stmt 0 view .LVU1501 + 4598 010e 638D ldrh r3, [r4, #42] +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4599 .loc 1 2063 32 view .LVU1502 + 4600 0110 228D ldrh r2, [r4, #40] +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4601 .loc 1 2063 25 view .LVU1503 + 4602 0112 9B1A subs r3, r3, r2 + 4603 0114 9BB2 uxth r3, r3 + 4604 0116 6385 strh r3, [r4, #42] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4605 .loc 1 2066 9 is_stmt 1 view .LVU1504 +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4606 .loc 1 2066 9 view .LVU1505 + 4607 0118 4023 movs r3, #64 + 4608 011a 0022 movs r2, #0 + 4609 011c E254 strb r2, [r4, r3] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4610 .loc 1 2066 9 view .LVU1506 +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4611 .loc 1 2072 9 view .LVU1507 + 4612 011e 1021 movs r1, #16 + 4613 0120 2000 movs r0, r4 + 4614 0122 FFF7FEFF bl I2C_Enable_IRQ + 4615 .LVL336: +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4616 .loc 1 2075 9 view .LVU1508 +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4617 .loc 1 2075 13 is_stmt 0 view .LVU1509 + 4618 0126 2268 ldr r2, [r4] +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4619 .loc 1 2075 23 view .LVU1510 + 4620 0128 1168 ldr r1, [r2] +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4621 .loc 1 2075 29 view .LVU1511 + ARM GAS /tmp/cc4IUqI9.s page 238 + + + 4622 012a 8023 movs r3, #128 + 4623 012c DB01 lsls r3, r3, #7 + 4624 012e 0B43 orrs r3, r1 + 4625 0130 1360 str r3, [r2] + 4626 0132 11E0 b .L285 + 4627 .LVL337: + 4628 .L281: +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4629 .loc 1 2095 7 is_stmt 1 view .LVU1512 +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4630 .loc 1 2095 21 is_stmt 0 view .LVU1513 + 4631 0134 134B ldr r3, .L291+20 + 4632 0136 6363 str r3, [r4, #52] +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4633 .loc 1 2099 7 is_stmt 1 view .LVU1514 + 4634 0138 8023 movs r3, #128 + 4635 013a FAB2 uxtb r2, r7 + 4636 .LVL338: +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4637 .loc 1 2099 7 is_stmt 0 view .LVU1515 + 4638 013c 1049 ldr r1, .L291+16 + 4639 013e 0091 str r1, [sp] + 4640 0140 9B04 lsls r3, r3, #18 + 4641 0142 2900 movs r1, r5 + 4642 0144 2000 movs r0, r4 + 4643 0146 FFF7FEFF bl I2C_TransferConfig + 4644 .LVL339: +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4645 .loc 1 2103 7 is_stmt 1 view .LVU1516 +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4646 .loc 1 2103 7 view .LVU1517 + 4647 014a 4023 movs r3, #64 + 4648 014c 0022 movs r2, #0 + 4649 014e E254 strb r2, [r4, r3] +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4650 .loc 1 2103 7 view .LVU1518 +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4651 .loc 1 2112 7 view .LVU1519 + 4652 0150 0121 movs r1, #1 + 4653 0152 2000 movs r0, r4 + 4654 0154 FFF7FEFF bl I2C_Enable_IRQ + 4655 .LVL340: + 4656 .L285: +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4657 .loc 1 2115 5 view .LVU1520 +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4658 .loc 1 2115 12 is_stmt 0 view .LVU1521 + 4659 0158 0020 movs r0, #0 + 4660 015a 00E0 b .L277 + 4661 .LVL341: + 4662 .L286: +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4663 .loc 1 2119 12 view .LVU1522 + 4664 015c 0220 movs r0, #2 + 4665 .LVL342: + 4666 .L277: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 239 + + + 4667 .loc 1 2121 1 view .LVU1523 + 4668 015e 02B0 add sp, sp, #8 + 4669 @ sp needed + 4670 .LVL343: + 4671 .LVL344: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4672 .loc 1 2121 1 view .LVU1524 + 4673 0160 80BC pop {r7} + 4674 0162 B846 mov r8, r7 + 4675 0164 F0BD pop {r4, r5, r6, r7, pc} + 4676 .LVL345: + 4677 .L287: +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4678 .loc 1 1981 14 view .LVU1525 + 4679 0166 0220 movs r0, #2 + 4680 0168 F9E7 b .L277 + 4681 .L288: +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4682 .loc 1 1985 5 discriminator 1 view .LVU1526 + 4683 016a 0220 movs r0, #2 + 4684 016c F7E7 b .L277 + 4685 .L292: + 4686 016e C046 .align 2 + 4687 .L291: + 4688 0170 0000FFFF .word -65536 + 4689 0174 00000000 .word I2C_Master_ISR_DMA + 4690 0178 00000000 .word I2C_DMAMasterTransmitCplt + 4691 017c 00000000 .word I2C_DMAError + 4692 0180 00200080 .word -2147475456 + 4693 0184 00000000 .word I2C_Master_ISR_IT + 4694 .cfi_endproc + 4695 .LFE52: + 4697 .section .text.HAL_I2C_Master_Receive_DMA,"ax",%progbits + 4698 .align 1 + 4699 .global HAL_I2C_Master_Receive_DMA + 4700 .syntax unified + 4701 .code 16 + 4702 .thumb_func + 4704 HAL_I2C_Master_Receive_DMA: + 4705 .LVL346: + 4706 .LFB53: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 4707 .loc 1 2135 1 is_stmt 1 view -0 + 4708 .cfi_startproc + 4709 @ args = 0, pretend = 0, frame = 0 + 4710 @ frame_needed = 0, uses_anonymous_args = 0 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 4711 .loc 1 2135 1 is_stmt 0 view .LVU1528 + 4712 0000 70B5 push {r4, r5, r6, lr} + 4713 .cfi_def_cfa_offset 16 + 4714 .cfi_offset 4, -16 + 4715 .cfi_offset 5, -12 + 4716 .cfi_offset 6, -8 + 4717 .cfi_offset 14, -4 + 4718 0002 82B0 sub sp, sp, #8 + 4719 .cfi_def_cfa_offset 24 + 4720 0004 0400 movs r4, r0 + ARM GAS /tmp/cc4IUqI9.s page 240 + + + 4721 0006 0D00 movs r5, r1 +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4722 .loc 1 2136 3 is_stmt 1 view .LVU1529 +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4723 .loc 1 2137 3 view .LVU1530 +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4724 .loc 1 2139 3 view .LVU1531 +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4725 .loc 1 2139 11 is_stmt 0 view .LVU1532 + 4726 0008 4121 movs r1, #65 + 4727 .LVL347: +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4728 .loc 1 2139 11 view .LVU1533 + 4729 000a 415C ldrb r1, [r0, r1] +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4730 .loc 1 2139 6 view .LVU1534 + 4731 000c 2029 cmp r1, #32 + 4732 000e 00D0 beq .LCB4452 + 4733 0010 8BE0 b .L302 @long jump + 4734 .LCB4452: +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4735 .loc 1 2141 5 is_stmt 1 view .LVU1535 +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4736 .loc 1 2141 9 is_stmt 0 view .LVU1536 + 4737 0012 0168 ldr r1, [r0] + 4738 0014 8969 ldr r1, [r1, #24] +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4739 .loc 1 2141 8 view .LVU1537 + 4740 0016 0904 lsls r1, r1, #16 + 4741 0018 00D5 bpl .LCB4459 + 4742 001a 89E0 b .L303 @long jump + 4743 .LCB4459: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4744 .loc 1 2147 5 is_stmt 1 view .LVU1538 +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4745 .loc 1 2147 5 view .LVU1539 + 4746 001c 4021 movs r1, #64 + 4747 001e 415C ldrb r1, [r0, r1] + 4748 0020 0129 cmp r1, #1 + 4749 0022 00D1 bne .LCB4465 + 4750 0024 86E0 b .L304 @long jump + 4751 .LCB4465: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4752 .loc 1 2147 5 discriminator 2 view .LVU1540 + 4753 0026 4021 movs r1, #64 + 4754 0028 0120 movs r0, #1 + 4755 .LVL348: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4756 .loc 1 2147 5 is_stmt 0 discriminator 2 view .LVU1541 + 4757 002a 6054 strb r0, [r4, r1] +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4758 .loc 1 2147 5 is_stmt 1 discriminator 2 view .LVU1542 +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4759 .loc 1 2149 5 view .LVU1543 +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4760 .loc 1 2149 23 is_stmt 0 view .LVU1544 + 4761 002c 0131 adds r1, r1, #1 + ARM GAS /tmp/cc4IUqI9.s page 241 + + + 4762 002e 2130 adds r0, r0, #33 + 4763 0030 6054 strb r0, [r4, r1] +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4764 .loc 1 2150 5 is_stmt 1 view .LVU1545 +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4765 .loc 1 2150 23 is_stmt 0 view .LVU1546 + 4766 0032 0131 adds r1, r1, #1 + 4767 0034 1238 subs r0, r0, #18 + 4768 0036 6054 strb r0, [r4, r1] +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4769 .loc 1 2151 5 is_stmt 1 view .LVU1547 +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4770 .loc 1 2151 23 is_stmt 0 view .LVU1548 + 4771 0038 0021 movs r1, #0 + 4772 003a 6164 str r1, [r4, #68] +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4773 .loc 1 2154 5 is_stmt 1 view .LVU1549 +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4774 .loc 1 2154 23 is_stmt 0 view .LVU1550 + 4775 003c 6262 str r2, [r4, #36] +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4776 .loc 1 2155 5 is_stmt 1 view .LVU1551 +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4777 .loc 1 2155 23 is_stmt 0 view .LVU1552 + 4778 003e 6385 strh r3, [r4, #42] +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4779 .loc 1 2156 5 is_stmt 1 view .LVU1553 +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4780 .loc 1 2156 23 is_stmt 0 view .LVU1554 + 4781 0040 3D4B ldr r3, .L307 + 4782 .LVL349: +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4783 .loc 1 2156 23 view .LVU1555 + 4784 0042 E362 str r3, [r4, #44] + 4785 .LVL350: +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4786 .loc 1 2157 5 is_stmt 1 view .LVU1556 +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4787 .loc 1 2157 23 is_stmt 0 view .LVU1557 + 4788 0044 3D4B ldr r3, .L307+4 + 4789 0046 6363 str r3, [r4, #52] +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4790 .loc 1 2159 5 is_stmt 1 view .LVU1558 +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4791 .loc 1 2159 13 is_stmt 0 view .LVU1559 + 4792 0048 638D ldrh r3, [r4, #42] + 4793 004a 9BB2 uxth r3, r3 +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4794 .loc 1 2159 8 view .LVU1560 + 4795 004c FF2B cmp r3, #255 + 4796 004e 29D9 bls .L295 +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4797 .loc 1 2161 7 is_stmt 1 view .LVU1561 +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4798 .loc 1 2161 22 is_stmt 0 view .LVU1562 + 4799 0050 0123 movs r3, #1 + 4800 0052 2385 strh r3, [r4, #40] + ARM GAS /tmp/cc4IUqI9.s page 242 + + +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4801 .loc 1 2162 7 is_stmt 1 view .LVU1563 + 4802 .LVL351: +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4803 .loc 1 2162 16 is_stmt 0 view .LVU1564 + 4804 0054 8026 movs r6, #128 + 4805 0056 7604 lsls r6, r6, #17 + 4806 .LVL352: + 4807 .L296: +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4808 .loc 1 2170 5 is_stmt 1 view .LVU1565 +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4809 .loc 1 2170 13 is_stmt 0 view .LVU1566 + 4810 0058 218D ldrh r1, [r4, #40] +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4811 .loc 1 2170 8 view .LVU1567 + 4812 005a 0029 cmp r1, #0 + 4813 005c 51D0 beq .L297 +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4814 .loc 1 2172 7 is_stmt 1 view .LVU1568 +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4815 .loc 1 2172 15 is_stmt 0 view .LVU1569 + 4816 005e E36B ldr r3, [r4, #60] +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4817 .loc 1 2172 10 view .LVU1570 + 4818 0060 002B cmp r3, #0 + 4819 0062 24D0 beq .L298 +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4820 .loc 1 2175 9 is_stmt 1 view .LVU1571 +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4821 .loc 1 2175 40 is_stmt 0 view .LVU1572 + 4822 0064 3649 ldr r1, .L307+8 + 4823 0066 9962 str r1, [r3, #40] +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4824 .loc 1 2178 9 is_stmt 1 view .LVU1573 +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4825 .loc 1 2178 13 is_stmt 0 view .LVU1574 + 4826 0068 E36B ldr r3, [r4, #60] +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4827 .loc 1 2178 41 view .LVU1575 + 4828 006a 3649 ldr r1, .L307+12 + 4829 006c 1963 str r1, [r3, #48] +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4830 .loc 1 2181 9 is_stmt 1 view .LVU1576 +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4831 .loc 1 2181 13 is_stmt 0 view .LVU1577 + 4832 006e E16B ldr r1, [r4, #60] +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4833 .loc 1 2181 44 view .LVU1578 + 4834 0070 0023 movs r3, #0 + 4835 0072 CB62 str r3, [r1, #44] +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4836 .loc 1 2182 9 is_stmt 1 view .LVU1579 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4837 .loc 1 2182 13 is_stmt 0 view .LVU1580 + 4838 0074 E16B ldr r1, [r4, #60] +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 243 + + + 4839 .loc 1 2182 41 view .LVU1581 + 4840 0076 4B63 str r3, [r1, #52] +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4841 .loc 1 2185 9 is_stmt 1 view .LVU1582 +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4842 .loc 1 2185 71 is_stmt 0 view .LVU1583 + 4843 0078 2168 ldr r1, [r4] +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4844 .loc 1 2185 66 view .LVU1584 + 4845 007a 2431 adds r1, r1, #36 +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4846 .loc 1 2186 46 view .LVU1585 + 4847 007c 238D ldrh r3, [r4, #40] +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4848 .loc 1 2185 25 view .LVU1586 + 4849 007e E06B ldr r0, [r4, #60] + 4850 0080 FFF7FEFF bl HAL_DMA_Start_IT + 4851 .LVL353: +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4852 .loc 1 2203 7 is_stmt 1 view .LVU1587 +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4853 .loc 1 2203 10 is_stmt 0 view .LVU1588 + 4854 0084 0028 cmp r0, #0 + 4855 0086 20D0 beq .L306 +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4856 .loc 1 2227 9 is_stmt 1 view .LVU1589 +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4857 .loc 1 2227 25 is_stmt 0 view .LVU1590 + 4858 0088 4123 movs r3, #65 + 4859 008a 2022 movs r2, #32 + 4860 008c E254 strb r2, [r4, r3] +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4861 .loc 1 2228 9 is_stmt 1 view .LVU1591 +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4862 .loc 1 2228 25 is_stmt 0 view .LVU1592 + 4863 008e 0022 movs r2, #0 + 4864 0090 0133 adds r3, r3, #1 + 4865 0092 E254 strb r2, [r4, r3] +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4866 .loc 1 2231 9 is_stmt 1 view .LVU1593 +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4867 .loc 1 2231 13 is_stmt 0 view .LVU1594 + 4868 0094 636C ldr r3, [r4, #68] +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4869 .loc 1 2231 25 view .LVU1595 + 4870 0096 1021 movs r1, #16 + 4871 0098 0B43 orrs r3, r1 + 4872 009a 6364 str r3, [r4, #68] +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4873 .loc 1 2234 9 is_stmt 1 view .LVU1596 +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4874 .loc 1 2234 9 view .LVU1597 + 4875 009c 4023 movs r3, #64 + 4876 009e E254 strb r2, [r4, r3] +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4877 .loc 1 2234 9 view .LVU1598 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 244 + + + 4878 .loc 1 2236 9 view .LVU1599 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4879 .loc 1 2236 16 is_stmt 0 view .LVU1600 + 4880 00a0 0120 movs r0, #1 + 4881 .LVL354: +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4882 .loc 1 2236 16 view .LVU1601 + 4883 00a2 43E0 b .L294 + 4884 .LVL355: + 4885 .L295: +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4886 .loc 1 2166 7 is_stmt 1 view .LVU1602 +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4887 .loc 1 2166 28 is_stmt 0 view .LVU1603 + 4888 00a4 638D ldrh r3, [r4, #42] +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4889 .loc 1 2166 22 view .LVU1604 + 4890 00a6 2385 strh r3, [r4, #40] +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4891 .loc 1 2167 7 is_stmt 1 view .LVU1605 + 4892 .LVL356: +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4893 .loc 1 2167 16 is_stmt 0 view .LVU1606 + 4894 00a8 8026 movs r6, #128 + 4895 00aa B604 lsls r6, r6, #18 + 4896 00ac D4E7 b .L296 + 4897 .LVL357: + 4898 .L298: +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4899 .loc 1 2191 9 is_stmt 1 view .LVU1607 +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4900 .loc 1 2191 25 is_stmt 0 view .LVU1608 + 4901 00ae 4123 movs r3, #65 + 4902 00b0 2022 movs r2, #32 + 4903 .LVL358: +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4904 .loc 1 2191 25 view .LVU1609 + 4905 00b2 E254 strb r2, [r4, r3] + 4906 .LVL359: +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4907 .loc 1 2192 9 is_stmt 1 view .LVU1610 +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4908 .loc 1 2192 25 is_stmt 0 view .LVU1611 + 4909 00b4 0022 movs r2, #0 + 4910 00b6 0133 adds r3, r3, #1 + 4911 00b8 E254 strb r2, [r4, r3] +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4912 .loc 1 2195 9 is_stmt 1 view .LVU1612 +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4913 .loc 1 2195 13 is_stmt 0 view .LVU1613 + 4914 00ba 636C ldr r3, [r4, #68] +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4915 .loc 1 2195 25 view .LVU1614 + 4916 00bc 8021 movs r1, #128 + 4917 00be 0B43 orrs r3, r1 + 4918 00c0 6364 str r3, [r4, #68] +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 245 + + + 4919 .loc 1 2198 9 is_stmt 1 view .LVU1615 +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4920 .loc 1 2198 9 view .LVU1616 + 4921 00c2 4023 movs r3, #64 + 4922 00c4 E254 strb r2, [r4, r3] +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4923 .loc 1 2198 9 view .LVU1617 +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4924 .loc 1 2200 9 view .LVU1618 +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4925 .loc 1 2200 16 is_stmt 0 view .LVU1619 + 4926 00c6 0120 movs r0, #1 + 4927 00c8 30E0 b .L294 + 4928 .LVL360: + 4929 .L306: +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4930 .loc 1 2207 9 is_stmt 1 view .LVU1620 +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4931 .loc 1 2207 59 is_stmt 0 view .LVU1621 + 4932 00ca 228D ldrh r2, [r4, #40] +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4933 .loc 1 2207 9 view .LVU1622 + 4934 00cc D2B2 uxtb r2, r2 + 4935 00ce 1E4B ldr r3, .L307+16 + 4936 00d0 0093 str r3, [sp] + 4937 00d2 3300 movs r3, r6 + 4938 00d4 2900 movs r1, r5 + 4939 00d6 2000 movs r0, r4 + 4940 .LVL361: +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4941 .loc 1 2207 9 view .LVU1623 + 4942 00d8 FFF7FEFF bl I2C_TransferConfig + 4943 .LVL362: +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4944 .loc 1 2210 9 is_stmt 1 view .LVU1624 +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4945 .loc 1 2210 13 is_stmt 0 view .LVU1625 + 4946 00dc 638D ldrh r3, [r4, #42] +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4947 .loc 1 2210 32 view .LVU1626 + 4948 00de 228D ldrh r2, [r4, #40] +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4949 .loc 1 2210 25 view .LVU1627 + 4950 00e0 9B1A subs r3, r3, r2 + 4951 00e2 9BB2 uxth r3, r3 + 4952 00e4 6385 strh r3, [r4, #42] +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4953 .loc 1 2213 9 is_stmt 1 view .LVU1628 +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4954 .loc 1 2213 9 view .LVU1629 + 4955 00e6 4023 movs r3, #64 + 4956 00e8 0022 movs r2, #0 + 4957 00ea E254 strb r2, [r4, r3] +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4958 .loc 1 2213 9 view .LVU1630 +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4959 .loc 1 2219 9 view .LVU1631 + ARM GAS /tmp/cc4IUqI9.s page 246 + + + 4960 00ec 1021 movs r1, #16 + 4961 00ee 2000 movs r0, r4 + 4962 00f0 FFF7FEFF bl I2C_Enable_IRQ + 4963 .LVL363: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4964 .loc 1 2222 9 view .LVU1632 +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4965 .loc 1 2222 13 is_stmt 0 view .LVU1633 + 4966 00f4 2268 ldr r2, [r4] +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4967 .loc 1 2222 23 view .LVU1634 + 4968 00f6 1168 ldr r1, [r2] +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4969 .loc 1 2222 29 view .LVU1635 + 4970 00f8 8023 movs r3, #128 + 4971 00fa 1B02 lsls r3, r3, #8 + 4972 00fc 0B43 orrs r3, r1 + 4973 00fe 1360 str r3, [r2] + 4974 0100 11E0 b .L301 + 4975 .LVL364: + 4976 .L297: +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4977 .loc 1 2242 7 is_stmt 1 view .LVU1636 +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4978 .loc 1 2242 21 is_stmt 0 view .LVU1637 + 4979 0102 124B ldr r3, .L307+20 + 4980 0104 6363 str r3, [r4, #52] +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4981 .loc 1 2246 7 is_stmt 1 view .LVU1638 + 4982 0106 8023 movs r3, #128 + 4983 0108 CAB2 uxtb r2, r1 + 4984 .LVL365: +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4985 .loc 1 2246 7 is_stmt 0 view .LVU1639 + 4986 010a 0F49 ldr r1, .L307+16 + 4987 010c 0091 str r1, [sp] + 4988 .LVL366: +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4989 .loc 1 2246 7 view .LVU1640 + 4990 010e 9B04 lsls r3, r3, #18 + 4991 0110 2900 movs r1, r5 + 4992 0112 2000 movs r0, r4 + 4993 0114 FFF7FEFF bl I2C_TransferConfig + 4994 .LVL367: +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4995 .loc 1 2250 7 is_stmt 1 view .LVU1641 +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4996 .loc 1 2250 7 view .LVU1642 + 4997 0118 4023 movs r3, #64 + 4998 011a 0022 movs r2, #0 + 4999 011c E254 strb r2, [r4, r3] +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5000 .loc 1 2250 7 view .LVU1643 +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5001 .loc 1 2259 7 view .LVU1644 + 5002 011e 0221 movs r1, #2 + 5003 0120 2000 movs r0, r4 + ARM GAS /tmp/cc4IUqI9.s page 247 + + + 5004 0122 FFF7FEFF bl I2C_Enable_IRQ + 5005 .LVL368: + 5006 .L301: +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5007 .loc 1 2262 5 view .LVU1645 +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5008 .loc 1 2262 12 is_stmt 0 view .LVU1646 + 5009 0126 0020 movs r0, #0 + 5010 0128 00E0 b .L294 + 5011 .LVL369: + 5012 .L302: +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5013 .loc 1 2266 12 view .LVU1647 + 5014 012a 0220 movs r0, #2 + 5015 .LVL370: + 5016 .L294: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5017 .loc 1 2268 1 view .LVU1648 + 5018 012c 02B0 add sp, sp, #8 + 5019 @ sp needed + 5020 .LVL371: + 5021 .LVL372: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5022 .loc 1 2268 1 view .LVU1649 + 5023 012e 70BD pop {r4, r5, r6, pc} + 5024 .LVL373: + 5025 .L303: +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5026 .loc 1 2143 14 view .LVU1650 + 5027 0130 0220 movs r0, #2 + 5028 .LVL374: +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5029 .loc 1 2143 14 view .LVU1651 + 5030 0132 FBE7 b .L294 + 5031 .LVL375: + 5032 .L304: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5033 .loc 1 2147 5 discriminator 1 view .LVU1652 + 5034 0134 0220 movs r0, #2 + 5035 .LVL376: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5036 .loc 1 2147 5 discriminator 1 view .LVU1653 + 5037 0136 F9E7 b .L294 + 5038 .L308: + 5039 .align 2 + 5040 .L307: + 5041 0138 0000FFFF .word -65536 + 5042 013c 00000000 .word I2C_Master_ISR_DMA + 5043 0140 00000000 .word I2C_DMAMasterReceiveCplt + 5044 0144 00000000 .word I2C_DMAError + 5045 0148 00240080 .word -2147474432 + 5046 014c 00000000 .word I2C_Master_ISR_IT + 5047 .cfi_endproc + 5048 .LFE53: + 5050 .section .text.HAL_I2C_Slave_Transmit_DMA,"ax",%progbits + 5051 .align 1 + 5052 .global HAL_I2C_Slave_Transmit_DMA + ARM GAS /tmp/cc4IUqI9.s page 248 + + + 5053 .syntax unified + 5054 .code 16 + 5055 .thumb_func + 5057 HAL_I2C_Slave_Transmit_DMA: + 5058 .LVL377: + 5059 .LFB54: +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 5060 .loc 1 2279 1 is_stmt 1 view -0 + 5061 .cfi_startproc + 5062 @ args = 0, pretend = 0, frame = 0 + 5063 @ frame_needed = 0, uses_anonymous_args = 0 +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 5064 .loc 1 2279 1 is_stmt 0 view .LVU1655 + 5065 0000 10B5 push {r4, lr} + 5066 .cfi_def_cfa_offset 8 + 5067 .cfi_offset 4, -8 + 5068 .cfi_offset 14, -4 + 5069 0002 0400 movs r4, r0 +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5070 .loc 1 2280 3 is_stmt 1 view .LVU1656 +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5071 .loc 1 2282 3 view .LVU1657 +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5072 .loc 1 2282 11 is_stmt 0 view .LVU1658 + 5073 0004 4123 movs r3, #65 + 5074 0006 C35C ldrb r3, [r0, r3] +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5075 .loc 1 2282 6 view .LVU1659 + 5076 0008 202B cmp r3, #32 + 5077 000a 00D0 beq .LCB4761 + 5078 000c 8CE0 b .L319 @long jump + 5079 .LCB4761: +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5080 .loc 1 2284 5 is_stmt 1 view .LVU1660 +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5081 .loc 1 2284 8 is_stmt 0 view .LVU1661 + 5082 000e 0029 cmp r1, #0 + 5083 0010 46D0 beq .L311 +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5084 .loc 1 2284 25 discriminator 1 view .LVU1662 + 5085 0012 002A cmp r2, #0 + 5086 0014 44D0 beq .L311 +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5087 .loc 1 2290 5 is_stmt 1 view .LVU1663 +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5088 .loc 1 2290 5 view .LVU1664 + 5089 0016 4023 movs r3, #64 + 5090 0018 C35C ldrb r3, [r0, r3] + 5091 001a 012B cmp r3, #1 + 5092 001c 00D1 bne .LCB4772 + 5093 001e 85E0 b .L320 @long jump + 5094 .LCB4772: +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5095 .loc 1 2290 5 discriminator 2 view .LVU1665 + 5096 0020 4023 movs r3, #64 + 5097 0022 0120 movs r0, #1 + 5098 .LVL378: + ARM GAS /tmp/cc4IUqI9.s page 249 + + +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5099 .loc 1 2290 5 is_stmt 0 discriminator 2 view .LVU1666 + 5100 0024 E054 strb r0, [r4, r3] +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5101 .loc 1 2290 5 is_stmt 1 discriminator 2 view .LVU1667 +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 5102 .loc 1 2292 5 view .LVU1668 +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 5103 .loc 1 2292 23 is_stmt 0 view .LVU1669 + 5104 0026 0133 adds r3, r3, #1 + 5105 0028 2030 adds r0, r0, #32 + 5106 002a E054 strb r0, [r4, r3] +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5107 .loc 1 2293 5 is_stmt 1 view .LVU1670 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5108 .loc 1 2293 23 is_stmt 0 view .LVU1671 + 5109 002c 0133 adds r3, r3, #1 + 5110 002e 0138 subs r0, r0, #1 + 5111 0030 E054 strb r0, [r4, r3] +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5112 .loc 1 2294 5 is_stmt 1 view .LVU1672 +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5113 .loc 1 2294 23 is_stmt 0 view .LVU1673 + 5114 0032 0023 movs r3, #0 + 5115 0034 6364 str r3, [r4, #68] +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5116 .loc 1 2297 5 is_stmt 1 view .LVU1674 +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5117 .loc 1 2297 23 is_stmt 0 view .LVU1675 + 5118 0036 6162 str r1, [r4, #36] +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 5119 .loc 1 2298 5 is_stmt 1 view .LVU1676 +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 5120 .loc 1 2298 23 is_stmt 0 view .LVU1677 + 5121 0038 6285 strh r2, [r4, #42] +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5122 .loc 1 2299 5 is_stmt 1 view .LVU1678 +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5123 .loc 1 2299 29 is_stmt 0 view .LVU1679 + 5124 003a 638D ldrh r3, [r4, #42] +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5125 .loc 1 2299 23 view .LVU1680 + 5126 003c 2385 strh r3, [r4, #40] +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 5127 .loc 1 2300 5 is_stmt 1 view .LVU1681 +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 5128 .loc 1 2300 23 is_stmt 0 view .LVU1682 + 5129 003e 3C4B ldr r3, .L324 + 5130 0040 E362 str r3, [r4, #44] +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5131 .loc 1 2301 5 is_stmt 1 view .LVU1683 +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5132 .loc 1 2301 23 is_stmt 0 view .LVU1684 + 5133 0042 3C4B ldr r3, .L324+4 + 5134 0044 6363 str r3, [r4, #52] +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5135 .loc 1 2304 5 is_stmt 1 view .LVU1685 + ARM GAS /tmp/cc4IUqI9.s page 250 + + +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5136 .loc 1 2304 19 is_stmt 0 view .LVU1686 + 5137 0046 226A ldr r2, [r4, #32] + 5138 .LVL379: +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5139 .loc 1 2304 8 view .LVU1687 + 5140 0048 8023 movs r3, #128 + 5141 004a 9B02 lsls r3, r3, #10 + 5142 004c 9A42 cmp r2, r3 + 5143 004e 2CD0 beq .L322 + 5144 .L313: +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5145 .loc 1 2317 5 is_stmt 1 view .LVU1688 +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5146 .loc 1 2317 13 is_stmt 0 view .LVU1689 + 5147 0050 638D ldrh r3, [r4, #42] + 5148 0052 9BB2 uxth r3, r3 +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5149 .loc 1 2317 8 view .LVU1690 + 5150 0054 002B cmp r3, #0 + 5151 0056 58D0 beq .L314 +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5152 .loc 1 2319 7 is_stmt 1 view .LVU1691 +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5153 .loc 1 2319 15 is_stmt 0 view .LVU1692 + 5154 0058 A36B ldr r3, [r4, #56] +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5155 .loc 1 2319 10 view .LVU1693 + 5156 005a 002B cmp r3, #0 + 5157 005c 33D0 beq .L315 +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5158 .loc 1 2322 9 is_stmt 1 view .LVU1694 +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5159 .loc 1 2322 40 is_stmt 0 view .LVU1695 + 5160 005e 364A ldr r2, .L324+8 + 5161 0060 9A62 str r2, [r3, #40] +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5162 .loc 1 2325 9 is_stmt 1 view .LVU1696 +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5163 .loc 1 2325 13 is_stmt 0 view .LVU1697 + 5164 0062 A36B ldr r3, [r4, #56] +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5165 .loc 1 2325 41 view .LVU1698 + 5166 0064 354A ldr r2, .L324+12 + 5167 0066 1A63 str r2, [r3, #48] +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 5168 .loc 1 2328 9 is_stmt 1 view .LVU1699 +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 5169 .loc 1 2328 13 is_stmt 0 view .LVU1700 + 5170 0068 A26B ldr r2, [r4, #56] +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 5171 .loc 1 2328 44 view .LVU1701 + 5172 006a 0023 movs r3, #0 + 5173 006c D362 str r3, [r2, #44] +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5174 .loc 1 2329 9 is_stmt 1 view .LVU1702 +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 251 + + + 5175 .loc 1 2329 13 is_stmt 0 view .LVU1703 + 5176 006e A26B ldr r2, [r4, #56] +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5177 .loc 1 2329 41 view .LVU1704 + 5178 0070 5363 str r3, [r2, #52] +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 5179 .loc 1 2332 9 is_stmt 1 view .LVU1705 +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5180 .loc 1 2333 56 is_stmt 0 view .LVU1706 + 5181 0072 616A ldr r1, [r4, #36] + 5182 .LVL380: +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5183 .loc 1 2333 83 view .LVU1707 + 5184 0074 2268 ldr r2, [r4] +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5185 .loc 1 2333 78 view .LVU1708 + 5186 0076 2832 adds r2, r2, #40 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5187 .loc 1 2334 46 view .LVU1709 + 5188 0078 238D ldrh r3, [r4, #40] +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 5189 .loc 1 2332 25 view .LVU1710 + 5190 007a A06B ldr r0, [r4, #56] + 5191 007c FFF7FEFF bl HAL_DMA_Start_IT + 5192 .LVL381: +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5193 .loc 1 2351 7 is_stmt 1 view .LVU1711 +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5194 .loc 1 2351 10 is_stmt 0 view .LVU1712 + 5195 0080 0028 cmp r0, #0 + 5196 0082 2ED0 beq .L323 +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5197 .loc 1 2371 9 is_stmt 1 view .LVU1713 +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5198 .loc 1 2371 25 is_stmt 0 view .LVU1714 + 5199 0084 4123 movs r3, #65 + 5200 0086 2822 movs r2, #40 + 5201 0088 E254 strb r2, [r4, r3] +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5202 .loc 1 2372 9 is_stmt 1 view .LVU1715 +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5203 .loc 1 2372 25 is_stmt 0 view .LVU1716 + 5204 008a 0022 movs r2, #0 + 5205 008c 0133 adds r3, r3, #1 + 5206 008e E254 strb r2, [r4, r3] +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5207 .loc 1 2375 9 is_stmt 1 view .LVU1717 +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5208 .loc 1 2375 13 is_stmt 0 view .LVU1718 + 5209 0090 636C ldr r3, [r4, #68] +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5210 .loc 1 2375 25 view .LVU1719 + 5211 0092 1021 movs r1, #16 + 5212 0094 0B43 orrs r3, r1 + 5213 0096 6364 str r3, [r4, #68] +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5214 .loc 1 2378 9 is_stmt 1 view .LVU1720 + ARM GAS /tmp/cc4IUqI9.s page 252 + + +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5215 .loc 1 2378 9 view .LVU1721 + 5216 0098 4023 movs r3, #64 + 5217 009a E254 strb r2, [r4, r3] +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5218 .loc 1 2378 9 view .LVU1722 +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5219 .loc 1 2380 9 view .LVU1723 +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5220 .loc 1 2380 16 is_stmt 0 view .LVU1724 + 5221 009c 0120 movs r0, #1 + 5222 .LVL382: +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5223 .loc 1 2380 16 view .LVU1725 + 5224 009e 44E0 b .L310 + 5225 .LVL383: + 5226 .L311: +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5227 .loc 1 2286 7 is_stmt 1 view .LVU1726 +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5228 .loc 1 2286 23 is_stmt 0 view .LVU1727 + 5229 00a0 8023 movs r3, #128 + 5230 00a2 9B00 lsls r3, r3, #2 + 5231 00a4 6364 str r3, [r4, #68] +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5232 .loc 1 2287 7 is_stmt 1 view .LVU1728 +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5233 .loc 1 2287 15 is_stmt 0 view .LVU1729 + 5234 00a6 0120 movs r0, #1 + 5235 .LVL384: +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5236 .loc 1 2287 15 view .LVU1730 + 5237 00a8 3FE0 b .L310 + 5238 .LVL385: + 5239 .L322: +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5240 .loc 1 2308 7 is_stmt 1 view .LVU1731 +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5241 .loc 1 2308 11 is_stmt 0 view .LVU1732 + 5242 00aa 2368 ldr r3, [r4] +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5243 .loc 1 2308 30 view .LVU1733 + 5244 00ac 0A78 ldrb r2, [r1] +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5245 .loc 1 2308 28 view .LVU1734 + 5246 00ae 9A62 str r2, [r3, #40] +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5247 .loc 1 2311 7 is_stmt 1 view .LVU1735 +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5248 .loc 1 2311 11 is_stmt 0 view .LVU1736 + 5249 00b0 636A ldr r3, [r4, #36] +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5250 .loc 1 2311 21 view .LVU1737 + 5251 00b2 0133 adds r3, r3, #1 + 5252 00b4 6362 str r3, [r4, #36] +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5253 .loc 1 2313 7 is_stmt 1 view .LVU1738 + ARM GAS /tmp/cc4IUqI9.s page 253 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5254 .loc 1 2313 11 is_stmt 0 view .LVU1739 + 5255 00b6 638D ldrh r3, [r4, #42] +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5256 .loc 1 2313 22 view .LVU1740 + 5257 00b8 013B subs r3, r3, #1 + 5258 00ba 9BB2 uxth r3, r3 + 5259 00bc 6385 strh r3, [r4, #42] +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5260 .loc 1 2314 7 is_stmt 1 view .LVU1741 +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5261 .loc 1 2314 11 is_stmt 0 view .LVU1742 + 5262 00be 238D ldrh r3, [r4, #40] +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5263 .loc 1 2314 21 view .LVU1743 + 5264 00c0 013B subs r3, r3, #1 + 5265 00c2 2385 strh r3, [r4, #40] + 5266 00c4 C4E7 b .L313 + 5267 .L315: +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5268 .loc 1 2339 9 is_stmt 1 view .LVU1744 +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5269 .loc 1 2339 25 is_stmt 0 view .LVU1745 + 5270 00c6 4123 movs r3, #65 + 5271 00c8 2822 movs r2, #40 + 5272 00ca E254 strb r2, [r4, r3] +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5273 .loc 1 2340 9 is_stmt 1 view .LVU1746 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5274 .loc 1 2340 25 is_stmt 0 view .LVU1747 + 5275 00cc 0022 movs r2, #0 + 5276 00ce 0133 adds r3, r3, #1 + 5277 00d0 E254 strb r2, [r4, r3] +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5278 .loc 1 2343 9 is_stmt 1 view .LVU1748 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5279 .loc 1 2343 13 is_stmt 0 view .LVU1749 + 5280 00d2 636C ldr r3, [r4, #68] +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5281 .loc 1 2343 25 view .LVU1750 + 5282 00d4 8021 movs r1, #128 + 5283 .LVL386: +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5284 .loc 1 2343 25 view .LVU1751 + 5285 00d6 0B43 orrs r3, r1 + 5286 00d8 6364 str r3, [r4, #68] +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5287 .loc 1 2346 9 is_stmt 1 view .LVU1752 +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5288 .loc 1 2346 9 view .LVU1753 + 5289 00da 4023 movs r3, #64 + 5290 00dc E254 strb r2, [r4, r3] +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5291 .loc 1 2346 9 view .LVU1754 +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5292 .loc 1 2348 9 view .LVU1755 +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 254 + + + 5293 .loc 1 2348 16 is_stmt 0 view .LVU1756 + 5294 00de 0120 movs r0, #1 + 5295 00e0 23E0 b .L310 + 5296 .LVL387: + 5297 .L323: +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5298 .loc 1 2354 9 is_stmt 1 view .LVU1757 +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5299 .loc 1 2354 13 is_stmt 0 view .LVU1758 + 5300 00e2 2268 ldr r2, [r4] +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5301 .loc 1 2354 23 view .LVU1759 + 5302 00e4 5368 ldr r3, [r2, #4] +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5303 .loc 1 2354 29 view .LVU1760 + 5304 00e6 1649 ldr r1, .L324+16 + 5305 00e8 0B40 ands r3, r1 + 5306 00ea 5360 str r3, [r2, #4] +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5307 .loc 1 2357 9 is_stmt 1 view .LVU1761 +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5308 .loc 1 2357 9 view .LVU1762 + 5309 00ec 4023 movs r3, #64 + 5310 00ee 0022 movs r2, #0 + 5311 00f0 E254 strb r2, [r4, r3] +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5312 .loc 1 2357 9 view .LVU1763 +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5313 .loc 1 2363 9 view .LVU1764 + 5314 00f2 8021 movs r1, #128 + 5315 00f4 0902 lsls r1, r1, #8 + 5316 00f6 2000 movs r0, r4 + 5317 .LVL388: +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5318 .loc 1 2363 9 is_stmt 0 view .LVU1765 + 5319 00f8 FFF7FEFF bl I2C_Enable_IRQ + 5320 .LVL389: +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5321 .loc 1 2366 9 is_stmt 1 view .LVU1766 +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5322 .loc 1 2366 13 is_stmt 0 view .LVU1767 + 5323 00fc 2268 ldr r2, [r4] +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5324 .loc 1 2366 23 view .LVU1768 + 5325 00fe 1168 ldr r1, [r2] +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5326 .loc 1 2366 29 view .LVU1769 + 5327 0100 8023 movs r3, #128 + 5328 0102 DB01 lsls r3, r3, #7 + 5329 0104 0B43 orrs r3, r1 + 5330 0106 1360 str r3, [r2] + 5331 0108 0CE0 b .L318 + 5332 .LVL390: + 5333 .L314: +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5334 .loc 1 2386 7 is_stmt 1 view .LVU1770 +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 255 + + + 5335 .loc 1 2386 11 is_stmt 0 view .LVU1771 + 5336 010a 2268 ldr r2, [r4] +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5337 .loc 1 2386 21 view .LVU1772 + 5338 010c 5368 ldr r3, [r2, #4] +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5339 .loc 1 2386 27 view .LVU1773 + 5340 010e 0C49 ldr r1, .L324+16 + 5341 .LVL391: +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5342 .loc 1 2386 27 view .LVU1774 + 5343 0110 0B40 ands r3, r1 + 5344 0112 5360 str r3, [r2, #4] +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5345 .loc 1 2389 7 is_stmt 1 view .LVU1775 +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5346 .loc 1 2389 7 view .LVU1776 + 5347 0114 4023 movs r3, #64 + 5348 0116 0022 movs r2, #0 + 5349 0118 E254 strb r2, [r4, r3] +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5350 .loc 1 2389 7 view .LVU1777 +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5351 .loc 1 2395 7 view .LVU1778 + 5352 011a 8021 movs r1, #128 + 5353 011c 0902 lsls r1, r1, #8 + 5354 011e 2000 movs r0, r4 + 5355 0120 FFF7FEFF bl I2C_Enable_IRQ + 5356 .LVL392: + 5357 .L318: +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5358 .loc 1 2398 5 view .LVU1779 +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5359 .loc 1 2398 12 is_stmt 0 view .LVU1780 + 5360 0124 0020 movs r0, #0 + 5361 0126 00E0 b .L310 + 5362 .LVL393: + 5363 .L319: +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5364 .loc 1 2402 12 view .LVU1781 + 5365 0128 0220 movs r0, #2 + 5366 .LVL394: + 5367 .L310: +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5368 .loc 1 2404 1 view .LVU1782 + 5369 @ sp needed + 5370 .LVL395: +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5371 .loc 1 2404 1 view .LVU1783 + 5372 012a 10BD pop {r4, pc} + 5373 .LVL396: + 5374 .L320: +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5375 .loc 1 2290 5 discriminator 1 view .LVU1784 + 5376 012c 0220 movs r0, #2 + 5377 .LVL397: +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 256 + + + 5378 .loc 1 2290 5 discriminator 1 view .LVU1785 + 5379 012e FCE7 b .L310 + 5380 .L325: + 5381 .align 2 + 5382 .L324: + 5383 0130 0000FFFF .word -65536 + 5384 0134 00000000 .word I2C_Slave_ISR_DMA + 5385 0138 00000000 .word I2C_DMASlaveTransmitCplt + 5386 013c 00000000 .word I2C_DMAError + 5387 0140 FF7FFFFF .word -32769 + 5388 .cfi_endproc + 5389 .LFE54: + 5391 .section .text.HAL_I2C_Slave_Receive_DMA,"ax",%progbits + 5392 .align 1 + 5393 .global HAL_I2C_Slave_Receive_DMA + 5394 .syntax unified + 5395 .code 16 + 5396 .thumb_func + 5398 HAL_I2C_Slave_Receive_DMA: + 5399 .LVL398: + 5400 .LFB55: +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 5401 .loc 1 2415 1 is_stmt 1 view -0 + 5402 .cfi_startproc + 5403 @ args = 0, pretend = 0, frame = 0 + 5404 @ frame_needed = 0, uses_anonymous_args = 0 +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 5405 .loc 1 2415 1 is_stmt 0 view .LVU1787 + 5406 0000 70B5 push {r4, r5, r6, lr} + 5407 .cfi_def_cfa_offset 16 + 5408 .cfi_offset 4, -16 + 5409 .cfi_offset 5, -12 + 5410 .cfi_offset 6, -8 + 5411 .cfi_offset 14, -4 + 5412 0002 0400 movs r4, r0 + 5413 0004 0D00 movs r5, r1 +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5414 .loc 1 2416 3 is_stmt 1 view .LVU1788 +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5415 .loc 1 2418 3 view .LVU1789 +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5416 .loc 1 2418 11 is_stmt 0 view .LVU1790 + 5417 0006 4123 movs r3, #65 + 5418 0008 C35C ldrb r3, [r0, r3] +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5419 .loc 1 2418 6 view .LVU1791 + 5420 000a 202B cmp r3, #32 + 5421 000c 64D1 bne .L333 +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5422 .loc 1 2420 5 is_stmt 1 view .LVU1792 +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5423 .loc 1 2420 8 is_stmt 0 view .LVU1793 + 5424 000e 0029 cmp r1, #0 + 5425 0010 3CD0 beq .L328 +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5426 .loc 1 2420 25 discriminator 1 view .LVU1794 + 5427 0012 002A cmp r2, #0 + ARM GAS /tmp/cc4IUqI9.s page 257 + + + 5428 0014 3AD0 beq .L328 +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5429 .loc 1 2426 5 is_stmt 1 view .LVU1795 +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5430 .loc 1 2426 5 view .LVU1796 + 5431 0016 4023 movs r3, #64 + 5432 0018 C35C ldrb r3, [r0, r3] + 5433 001a 012B cmp r3, #1 + 5434 001c 5FD0 beq .L334 +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5435 .loc 1 2426 5 discriminator 2 view .LVU1797 + 5436 001e 4023 movs r3, #64 + 5437 0020 0121 movs r1, #1 + 5438 .LVL399: +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5439 .loc 1 2426 5 is_stmt 0 discriminator 2 view .LVU1798 + 5440 0022 C154 strb r1, [r0, r3] +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5441 .loc 1 2426 5 is_stmt 1 discriminator 2 view .LVU1799 +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 5442 .loc 1 2428 5 view .LVU1800 +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 5443 .loc 1 2428 23 is_stmt 0 view .LVU1801 + 5444 0024 0133 adds r3, r3, #1 + 5445 0026 2131 adds r1, r1, #33 + 5446 0028 C154 strb r1, [r0, r3] +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5447 .loc 1 2429 5 is_stmt 1 view .LVU1802 +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5448 .loc 1 2429 23 is_stmt 0 view .LVU1803 + 5449 002a 0133 adds r3, r3, #1 + 5450 002c 0239 subs r1, r1, #2 + 5451 002e C154 strb r1, [r0, r3] +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5452 .loc 1 2430 5 is_stmt 1 view .LVU1804 +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5453 .loc 1 2430 23 is_stmt 0 view .LVU1805 + 5454 0030 0023 movs r3, #0 + 5455 0032 4364 str r3, [r0, #68] +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5456 .loc 1 2433 5 is_stmt 1 view .LVU1806 +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5457 .loc 1 2433 23 is_stmt 0 view .LVU1807 + 5458 0034 4562 str r5, [r0, #36] +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 5459 .loc 1 2434 5 is_stmt 1 view .LVU1808 +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 5460 .loc 1 2434 23 is_stmt 0 view .LVU1809 + 5461 0036 4285 strh r2, [r0, #42] +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5462 .loc 1 2435 5 is_stmt 1 view .LVU1810 +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5463 .loc 1 2435 29 is_stmt 0 view .LVU1811 + 5464 0038 438D ldrh r3, [r0, #42] +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5465 .loc 1 2435 23 view .LVU1812 + 5466 003a 0385 strh r3, [r0, #40] + ARM GAS /tmp/cc4IUqI9.s page 258 + + +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 5467 .loc 1 2436 5 is_stmt 1 view .LVU1813 +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 5468 .loc 1 2436 23 is_stmt 0 view .LVU1814 + 5469 003c 294B ldr r3, .L337 + 5470 003e C362 str r3, [r0, #44] +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5471 .loc 1 2437 5 is_stmt 1 view .LVU1815 +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5472 .loc 1 2437 23 is_stmt 0 view .LVU1816 + 5473 0040 294B ldr r3, .L337+4 + 5474 0042 4363 str r3, [r0, #52] +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5475 .loc 1 2439 5 is_stmt 1 view .LVU1817 +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5476 .loc 1 2439 13 is_stmt 0 view .LVU1818 + 5477 0044 C36B ldr r3, [r0, #60] +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5478 .loc 1 2439 8 view .LVU1819 + 5479 0046 002B cmp r3, #0 + 5480 0048 25D0 beq .L330 +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5481 .loc 1 2442 7 is_stmt 1 view .LVU1820 +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5482 .loc 1 2442 38 is_stmt 0 view .LVU1821 + 5483 004a 284A ldr r2, .L337+8 + 5484 .LVL400: +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5485 .loc 1 2442 38 view .LVU1822 + 5486 004c 9A62 str r2, [r3, #40] +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5487 .loc 1 2445 7 is_stmt 1 view .LVU1823 +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5488 .loc 1 2445 11 is_stmt 0 view .LVU1824 + 5489 004e C36B ldr r3, [r0, #60] +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5490 .loc 1 2445 39 view .LVU1825 + 5491 0050 274A ldr r2, .L337+12 + 5492 0052 1A63 str r2, [r3, #48] +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5493 .loc 1 2448 7 is_stmt 1 view .LVU1826 +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5494 .loc 1 2448 11 is_stmt 0 view .LVU1827 + 5495 0054 C26B ldr r2, [r0, #60] +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5496 .loc 1 2448 42 view .LVU1828 + 5497 0056 0023 movs r3, #0 + 5498 0058 D362 str r3, [r2, #44] +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5499 .loc 1 2449 7 is_stmt 1 view .LVU1829 +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5500 .loc 1 2449 11 is_stmt 0 view .LVU1830 + 5501 005a C26B ldr r2, [r0, #60] +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5502 .loc 1 2449 39 view .LVU1831 + 5503 005c 5363 str r3, [r2, #52] +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + ARM GAS /tmp/cc4IUqI9.s page 259 + + + 5504 .loc 1 2452 7 is_stmt 1 view .LVU1832 +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5505 .loc 1 2452 69 is_stmt 0 view .LVU1833 + 5506 005e 0168 ldr r1, [r0] +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5507 .loc 1 2452 64 view .LVU1834 + 5508 0060 2431 adds r1, r1, #36 +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5509 .loc 1 2453 44 view .LVU1835 + 5510 0062 038D ldrh r3, [r0, #40] +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5511 .loc 1 2452 23 view .LVU1836 + 5512 0064 C06B ldr r0, [r0, #60] + 5513 .LVL401: +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5514 .loc 1 2452 23 view .LVU1837 + 5515 0066 2A00 movs r2, r5 + 5516 0068 FFF7FEFF bl HAL_DMA_Start_IT + 5517 .LVL402: + 5518 006c 051E subs r5, r0, #0 + 5519 .LVL403: +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5520 .loc 1 2470 5 is_stmt 1 view .LVU1838 +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5521 .loc 1 2470 8 is_stmt 0 view .LVU1839 + 5522 006e 20D0 beq .L336 +2490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5523 .loc 1 2490 7 is_stmt 1 view .LVU1840 +2490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5524 .loc 1 2490 23 is_stmt 0 view .LVU1841 + 5525 0070 4123 movs r3, #65 + 5526 0072 2822 movs r2, #40 + 5527 0074 E254 strb r2, [r4, r3] +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5528 .loc 1 2491 7 is_stmt 1 view .LVU1842 +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5529 .loc 1 2491 23 is_stmt 0 view .LVU1843 + 5530 0076 0022 movs r2, #0 + 5531 0078 0133 adds r3, r3, #1 + 5532 007a E254 strb r2, [r4, r3] +2494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5533 .loc 1 2494 7 is_stmt 1 view .LVU1844 +2494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5534 .loc 1 2494 11 is_stmt 0 view .LVU1845 + 5535 007c 636C ldr r3, [r4, #68] +2494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5536 .loc 1 2494 23 view .LVU1846 + 5537 007e 1021 movs r1, #16 + 5538 0080 0B43 orrs r3, r1 + 5539 0082 6364 str r3, [r4, #68] +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5540 .loc 1 2497 7 is_stmt 1 view .LVU1847 +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5541 .loc 1 2497 7 view .LVU1848 + 5542 0084 4023 movs r3, #64 + 5543 0086 E254 strb r2, [r4, r3] +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 260 + + + 5544 .loc 1 2497 7 view .LVU1849 +2499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5545 .loc 1 2499 7 view .LVU1850 +2499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5546 .loc 1 2499 14 is_stmt 0 view .LVU1851 + 5547 0088 0125 movs r5, #1 + 5548 008a 26E0 b .L327 + 5549 .LVL404: + 5550 .L328: +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5551 .loc 1 2422 7 is_stmt 1 view .LVU1852 +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5552 .loc 1 2422 23 is_stmt 0 view .LVU1853 + 5553 008c 8023 movs r3, #128 + 5554 008e 9B00 lsls r3, r3, #2 + 5555 0090 6364 str r3, [r4, #68] +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5556 .loc 1 2423 7 is_stmt 1 view .LVU1854 +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5557 .loc 1 2423 15 is_stmt 0 view .LVU1855 + 5558 0092 0125 movs r5, #1 + 5559 0094 21E0 b .L327 + 5560 .LVL405: + 5561 .L330: +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5562 .loc 1 2458 7 is_stmt 1 view .LVU1856 +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5563 .loc 1 2458 23 is_stmt 0 view .LVU1857 + 5564 0096 4123 movs r3, #65 + 5565 0098 2822 movs r2, #40 + 5566 .LVL406: +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5567 .loc 1 2458 23 view .LVU1858 + 5568 009a C254 strb r2, [r0, r3] +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5569 .loc 1 2459 7 is_stmt 1 view .LVU1859 +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5570 .loc 1 2459 23 is_stmt 0 view .LVU1860 + 5571 009c 0022 movs r2, #0 + 5572 009e 0133 adds r3, r3, #1 + 5573 00a0 C254 strb r2, [r0, r3] +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5574 .loc 1 2462 7 is_stmt 1 view .LVU1861 +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5575 .loc 1 2462 11 is_stmt 0 view .LVU1862 + 5576 00a2 436C ldr r3, [r0, #68] +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5577 .loc 1 2462 23 view .LVU1863 + 5578 00a4 8021 movs r1, #128 + 5579 00a6 0B43 orrs r3, r1 + 5580 00a8 4364 str r3, [r0, #68] +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5581 .loc 1 2465 7 is_stmt 1 view .LVU1864 +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5582 .loc 1 2465 7 view .LVU1865 + 5583 00aa 4023 movs r3, #64 + 5584 00ac C254 strb r2, [r0, r3] + ARM GAS /tmp/cc4IUqI9.s page 261 + + +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5585 .loc 1 2465 7 view .LVU1866 +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5586 .loc 1 2467 7 view .LVU1867 +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5587 .loc 1 2467 14 is_stmt 0 view .LVU1868 + 5588 00ae 0125 movs r5, #1 + 5589 .LVL407: +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5590 .loc 1 2467 14 view .LVU1869 + 5591 00b0 13E0 b .L327 + 5592 .LVL408: + 5593 .L336: +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5594 .loc 1 2473 7 is_stmt 1 view .LVU1870 +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5595 .loc 1 2473 11 is_stmt 0 view .LVU1871 + 5596 00b2 2268 ldr r2, [r4] +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5597 .loc 1 2473 21 view .LVU1872 + 5598 00b4 5368 ldr r3, [r2, #4] +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5599 .loc 1 2473 27 view .LVU1873 + 5600 00b6 0F49 ldr r1, .L337+16 + 5601 00b8 0B40 ands r3, r1 + 5602 00ba 5360 str r3, [r2, #4] +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5603 .loc 1 2476 7 is_stmt 1 view .LVU1874 +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5604 .loc 1 2476 7 view .LVU1875 + 5605 00bc 4023 movs r3, #64 + 5606 00be 0022 movs r2, #0 + 5607 00c0 E254 strb r2, [r4, r3] +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5608 .loc 1 2476 7 view .LVU1876 +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5609 .loc 1 2482 7 view .LVU1877 + 5610 00c2 8026 movs r6, #128 + 5611 00c4 3602 lsls r6, r6, #8 + 5612 00c6 3100 movs r1, r6 + 5613 00c8 2000 movs r0, r4 + 5614 .LVL409: +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5615 .loc 1 2482 7 is_stmt 0 view .LVU1878 + 5616 00ca FFF7FEFF bl I2C_Enable_IRQ + 5617 .LVL410: +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5618 .loc 1 2485 7 is_stmt 1 view .LVU1879 +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5619 .loc 1 2485 11 is_stmt 0 view .LVU1880 + 5620 00ce 2368 ldr r3, [r4] +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5621 .loc 1 2485 21 view .LVU1881 + 5622 00d0 1A68 ldr r2, [r3] +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5623 .loc 1 2485 27 view .LVU1882 + 5624 00d2 1643 orrs r6, r2 + ARM GAS /tmp/cc4IUqI9.s page 262 + + + 5625 00d4 1E60 str r6, [r3] +2502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5626 .loc 1 2502 5 is_stmt 1 view .LVU1883 +2502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5627 .loc 1 2502 12 is_stmt 0 view .LVU1884 + 5628 00d6 00E0 b .L327 + 5629 .LVL411: + 5630 .L333: +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5631 .loc 1 2506 12 view .LVU1885 + 5632 00d8 0225 movs r5, #2 + 5633 .LVL412: + 5634 .L327: +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5635 .loc 1 2508 1 view .LVU1886 + 5636 00da 2800 movs r0, r5 + 5637 @ sp needed + 5638 .LVL413: +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5639 .loc 1 2508 1 view .LVU1887 + 5640 00dc 70BD pop {r4, r5, r6, pc} + 5641 .LVL414: + 5642 .L334: +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5643 .loc 1 2426 5 discriminator 1 view .LVU1888 + 5644 00de 0225 movs r5, #2 + 5645 00e0 FBE7 b .L327 + 5646 .L338: + 5647 00e2 C046 .align 2 + 5648 .L337: + 5649 00e4 0000FFFF .word -65536 + 5650 00e8 00000000 .word I2C_Slave_ISR_DMA + 5651 00ec 00000000 .word I2C_DMASlaveReceiveCplt + 5652 00f0 00000000 .word I2C_DMAError + 5653 00f4 FF7FFFFF .word -32769 + 5654 .cfi_endproc + 5655 .LFE55: + 5657 .section .text.HAL_I2C_Mem_Write,"ax",%progbits + 5658 .align 1 + 5659 .global HAL_I2C_Mem_Write + 5660 .syntax unified + 5661 .code 16 + 5662 .thumb_func + 5664 HAL_I2C_Mem_Write: + 5665 .LVL415: + 5666 .LFB56: +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5667 .loc 1 2525 1 is_stmt 1 view -0 + 5668 .cfi_startproc + 5669 @ args = 12, pretend = 0, frame = 16 + 5670 @ frame_needed = 0, uses_anonymous_args = 0 +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5671 .loc 1 2525 1 is_stmt 0 view .LVU1890 + 5672 0000 F0B5 push {r4, r5, r6, r7, lr} + 5673 .cfi_def_cfa_offset 20 + 5674 .cfi_offset 4, -20 + 5675 .cfi_offset 5, -16 + ARM GAS /tmp/cc4IUqI9.s page 263 + + + 5676 .cfi_offset 6, -12 + 5677 .cfi_offset 7, -8 + 5678 .cfi_offset 14, -4 + 5679 0002 87B0 sub sp, sp, #28 + 5680 .cfi_def_cfa_offset 48 + 5681 0004 0400 movs r4, r0 + 5682 0006 0391 str r1, [sp, #12] + 5683 0008 0492 str r2, [sp, #16] + 5684 000a 0593 str r3, [sp, #20] + 5685 000c 0CAB add r3, sp, #48 + 5686 .LVL416: +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5687 .loc 1 2525 1 view .LVU1891 + 5688 000e 20CB ldmia r3!, {r5} + 5689 .LVL417: +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5690 .loc 1 2525 1 view .LVU1892 + 5691 0010 1F88 ldrh r7, [r3] +2526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5692 .loc 1 2526 3 is_stmt 1 view .LVU1893 +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5693 .loc 1 2529 3 view .LVU1894 +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5694 .loc 1 2531 3 view .LVU1895 +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5695 .loc 1 2531 11 is_stmt 0 view .LVU1896 + 5696 0012 4123 movs r3, #65 + 5697 .LVL418: +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5698 .loc 1 2531 11 view .LVU1897 + 5699 0014 C35C ldrb r3, [r0, r3] +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5700 .loc 1 2531 6 view .LVU1898 + 5701 0016 202B cmp r3, #32 + 5702 0018 00D0 beq .LCB5319 + 5703 001a B3E0 b .L349 @long jump + 5704 .LCB5319: +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5705 .loc 1 2533 5 is_stmt 1 view .LVU1899 +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5706 .loc 1 2533 8 is_stmt 0 view .LVU1900 + 5707 001c 002D cmp r5, #0 + 5708 001e 18D0 beq .L341 +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5709 .loc 1 2533 25 discriminator 1 view .LVU1901 + 5710 0020 002F cmp r7, #0 + 5711 0022 16D0 beq .L341 +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5712 .loc 1 2540 5 is_stmt 1 view .LVU1902 +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5713 .loc 1 2540 5 view .LVU1903 + 5714 0024 4023 movs r3, #64 + 5715 0026 C35C ldrb r3, [r0, r3] + 5716 0028 012B cmp r3, #1 + 5717 002a 00D1 bne .LCB5330 + 5718 002c ADE0 b .L350 @long jump + 5719 .LCB5330: + ARM GAS /tmp/cc4IUqI9.s page 264 + + +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5720 .loc 1 2540 5 discriminator 2 view .LVU1904 + 5721 002e 4023 movs r3, #64 + 5722 0030 0122 movs r2, #1 + 5723 .LVL419: +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5724 .loc 1 2540 5 is_stmt 0 discriminator 2 view .LVU1905 + 5725 0032 C254 strb r2, [r0, r3] +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5726 .loc 1 2540 5 is_stmt 1 discriminator 2 view .LVU1906 +2543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5727 .loc 1 2543 5 view .LVU1907 +2543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5728 .loc 1 2543 17 is_stmt 0 view .LVU1908 + 5729 0034 FFF7FEFF bl HAL_GetTick + 5730 .LVL420: +2543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5731 .loc 1 2543 17 view .LVU1909 + 5732 0038 0600 movs r6, r0 + 5733 .LVL421: +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5734 .loc 1 2545 5 is_stmt 1 view .LVU1910 +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5735 .loc 1 2545 9 is_stmt 0 view .LVU1911 + 5736 003a 8021 movs r1, #128 + 5737 003c 0090 str r0, [sp] + 5738 003e 1923 movs r3, #25 + 5739 0040 0122 movs r2, #1 + 5740 0042 0902 lsls r1, r1, #8 + 5741 0044 2000 movs r0, r4 + 5742 .LVL422: +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5743 .loc 1 2545 9 view .LVU1912 + 5744 0046 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5745 .LVL423: +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5746 .loc 1 2545 8 discriminator 1 view .LVU1913 + 5747 004a 0028 cmp r0, #0 + 5748 004c 06D0 beq .L355 +2547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5749 .loc 1 2547 14 view .LVU1914 + 5750 004e 0120 movs r0, #1 + 5751 0050 99E0 b .L340 + 5752 .LVL424: + 5753 .L341: +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5754 .loc 1 2535 7 is_stmt 1 view .LVU1915 +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5755 .loc 1 2535 23 is_stmt 0 view .LVU1916 + 5756 0052 8023 movs r3, #128 + 5757 0054 9B00 lsls r3, r3, #2 + 5758 0056 6364 str r3, [r4, #68] +2536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5759 .loc 1 2536 7 is_stmt 1 view .LVU1917 +2536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5760 .loc 1 2536 15 is_stmt 0 view .LVU1918 + 5761 0058 0120 movs r0, #1 + ARM GAS /tmp/cc4IUqI9.s page 265 + + + 5762 .LVL425: +2536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5763 .loc 1 2536 15 view .LVU1919 + 5764 005a 94E0 b .L340 + 5765 .LVL426: + 5766 .L355: +2550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5767 .loc 1 2550 5 is_stmt 1 view .LVU1920 +2550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5768 .loc 1 2550 21 is_stmt 0 view .LVU1921 + 5769 005c 4123 movs r3, #65 + 5770 005e 2122 movs r2, #33 + 5771 0060 E254 strb r2, [r4, r3] +2551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5772 .loc 1 2551 5 is_stmt 1 view .LVU1922 +2551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5773 .loc 1 2551 21 is_stmt 0 view .LVU1923 + 5774 0062 0133 adds r3, r3, #1 + 5775 0064 1F32 adds r2, r2, #31 + 5776 0066 E254 strb r2, [r4, r3] +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5777 .loc 1 2552 5 is_stmt 1 view .LVU1924 +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5778 .loc 1 2552 21 is_stmt 0 view .LVU1925 + 5779 0068 0023 movs r3, #0 + 5780 006a 6364 str r3, [r4, #68] +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5781 .loc 1 2555 5 is_stmt 1 view .LVU1926 +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5782 .loc 1 2555 21 is_stmt 0 view .LVU1927 + 5783 006c 6562 str r5, [r4, #36] +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5784 .loc 1 2556 5 is_stmt 1 view .LVU1928 +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5785 .loc 1 2556 21 is_stmt 0 view .LVU1929 + 5786 006e 6785 strh r7, [r4, #42] +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5787 .loc 1 2557 5 is_stmt 1 view .LVU1930 +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5788 .loc 1 2557 21 is_stmt 0 view .LVU1931 + 5789 0070 6363 str r3, [r4, #52] +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5790 .loc 1 2560 5 is_stmt 1 view .LVU1932 +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5791 .loc 1 2560 9 is_stmt 0 view .LVU1933 + 5792 0072 0196 str r6, [sp, #4] + 5793 0074 0E9B ldr r3, [sp, #56] + 5794 0076 0093 str r3, [sp] + 5795 0078 059B ldr r3, [sp, #20] + 5796 007a 049A ldr r2, [sp, #16] + 5797 007c 0399 ldr r1, [sp, #12] + 5798 007e 2000 movs r0, r4 + 5799 0080 FFF7FEFF bl I2C_RequestMemoryWrite + 5800 .LVL427: +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5801 .loc 1 2560 8 discriminator 1 view .LVU1934 + 5802 0084 0028 cmp r0, #0 + ARM GAS /tmp/cc4IUqI9.s page 266 + + + 5803 0086 0FD1 bne .L356 +2568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5804 .loc 1 2568 5 is_stmt 1 view .LVU1935 +2568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5805 .loc 1 2568 13 is_stmt 0 view .LVU1936 + 5806 0088 638D ldrh r3, [r4, #42] + 5807 008a 9BB2 uxth r3, r3 +2568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5808 .loc 1 2568 8 view .LVU1937 + 5809 008c FF2B cmp r3, #255 + 5810 008e 10D9 bls .L344 +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 5811 .loc 1 2570 7 is_stmt 1 view .LVU1938 +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 5812 .loc 1 2570 22 is_stmt 0 view .LVU1939 + 5813 0090 FF23 movs r3, #255 + 5814 0092 2385 strh r3, [r4, #40] +2571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5815 .loc 1 2571 7 is_stmt 1 view .LVU1940 + 5816 0094 7F3B subs r3, r3, #127 + 5817 0096 0022 movs r2, #0 + 5818 0098 0092 str r2, [sp] + 5819 009a 5B04 lsls r3, r3, #17 + 5820 009c FF32 adds r2, r2, #255 + 5821 009e 0399 ldr r1, [sp, #12] + 5822 00a0 2000 movs r0, r4 + 5823 00a2 FFF7FEFF bl I2C_TransferConfig + 5824 .LVL428: + 5825 00a6 21E0 b .L348 + 5826 .L356: +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5827 .loc 1 2563 7 view .LVU1941 +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5828 .loc 1 2563 7 view .LVU1942 + 5829 00a8 4023 movs r3, #64 + 5830 00aa 0022 movs r2, #0 + 5831 00ac E254 strb r2, [r4, r3] +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5832 .loc 1 2563 7 view .LVU1943 +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5833 .loc 1 2564 7 view .LVU1944 +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5834 .loc 1 2564 14 is_stmt 0 view .LVU1945 + 5835 00ae 0120 movs r0, #1 + 5836 00b0 69E0 b .L340 + 5837 .L344: +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5838 .loc 1 2575 7 is_stmt 1 view .LVU1946 +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5839 .loc 1 2575 28 is_stmt 0 view .LVU1947 + 5840 00b2 628D ldrh r2, [r4, #42] + 5841 00b4 92B2 uxth r2, r2 +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5842 .loc 1 2575 22 view .LVU1948 + 5843 00b6 2285 strh r2, [r4, #40] +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5844 .loc 1 2576 7 is_stmt 1 view .LVU1949 + ARM GAS /tmp/cc4IUqI9.s page 267 + + + 5845 00b8 8023 movs r3, #128 + 5846 00ba D2B2 uxtb r2, r2 + 5847 00bc 0021 movs r1, #0 + 5848 00be 0091 str r1, [sp] + 5849 00c0 9B04 lsls r3, r3, #18 + 5850 00c2 0399 ldr r1, [sp, #12] + 5851 00c4 2000 movs r0, r4 + 5852 00c6 FFF7FEFF bl I2C_TransferConfig + 5853 .LVL429: + 5854 00ca 0FE0 b .L348 + 5855 .L347: +2612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5856 .loc 1 2612 11 view .LVU1950 +2612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5857 .loc 1 2612 32 is_stmt 0 view .LVU1951 + 5858 00cc 628D ldrh r2, [r4, #42] + 5859 00ce 92B2 uxth r2, r2 +2612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5860 .loc 1 2612 26 view .LVU1952 + 5861 00d0 2285 strh r2, [r4, #40] +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5862 .loc 1 2613 11 is_stmt 1 view .LVU1953 + 5863 00d2 8023 movs r3, #128 + 5864 00d4 D2B2 uxtb r2, r2 + 5865 00d6 0021 movs r1, #0 + 5866 00d8 0091 str r1, [sp] + 5867 00da 9B04 lsls r3, r3, #18 + 5868 00dc 0399 ldr r1, [sp, #12] + 5869 00de 2000 movs r0, r4 + 5870 00e0 FFF7FEFF bl I2C_TransferConfig + 5871 .LVL430: + 5872 .L346: +2618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5873 .loc 1 2618 30 view .LVU1954 +2618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5874 .loc 1 2618 18 is_stmt 0 view .LVU1955 + 5875 00e4 638D ldrh r3, [r4, #42] + 5876 00e6 9BB2 uxth r3, r3 +2618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5877 .loc 1 2618 30 view .LVU1956 + 5878 00e8 002B cmp r3, #0 + 5879 00ea 34D0 beq .L357 + 5880 .L348: +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5881 .loc 1 2579 5 is_stmt 1 view .LVU1957 +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5882 .loc 1 2582 7 view .LVU1958 +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5883 .loc 1 2582 11 is_stmt 0 view .LVU1959 + 5884 00ec 3200 movs r2, r6 + 5885 00ee 0E99 ldr r1, [sp, #56] + 5886 00f0 2000 movs r0, r4 + 5887 00f2 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 5888 .LVL431: +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5889 .loc 1 2582 10 discriminator 1 view .LVU1960 + 5890 00f6 0028 cmp r0, #0 + ARM GAS /tmp/cc4IUqI9.s page 268 + + + 5891 00f8 49D1 bne .L352 +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5892 .loc 1 2588 7 is_stmt 1 view .LVU1961 +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5893 .loc 1 2588 35 is_stmt 0 view .LVU1962 + 5894 00fa 626A ldr r2, [r4, #36] +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5895 .loc 1 2588 11 view .LVU1963 + 5896 00fc 2368 ldr r3, [r4] +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5897 .loc 1 2588 30 view .LVU1964 + 5898 00fe 1278 ldrb r2, [r2] +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5899 .loc 1 2588 28 view .LVU1965 + 5900 0100 9A62 str r2, [r3, #40] +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5901 .loc 1 2591 7 is_stmt 1 view .LVU1966 +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5902 .loc 1 2591 11 is_stmt 0 view .LVU1967 + 5903 0102 636A ldr r3, [r4, #36] +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5904 .loc 1 2591 21 view .LVU1968 + 5905 0104 0133 adds r3, r3, #1 + 5906 0106 6362 str r3, [r4, #36] +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5907 .loc 1 2593 7 is_stmt 1 view .LVU1969 +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5908 .loc 1 2593 11 is_stmt 0 view .LVU1970 + 5909 0108 638D ldrh r3, [r4, #42] +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5910 .loc 1 2593 22 view .LVU1971 + 5911 010a 013B subs r3, r3, #1 + 5912 010c 9BB2 uxth r3, r3 + 5913 010e 6385 strh r3, [r4, #42] +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5914 .loc 1 2594 7 is_stmt 1 view .LVU1972 +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5915 .loc 1 2594 11 is_stmt 0 view .LVU1973 + 5916 0110 238D ldrh r3, [r4, #40] +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5917 .loc 1 2594 21 view .LVU1974 + 5918 0112 013B subs r3, r3, #1 + 5919 0114 9BB2 uxth r3, r3 + 5920 0116 2385 strh r3, [r4, #40] +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5921 .loc 1 2596 7 is_stmt 1 view .LVU1975 +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5922 .loc 1 2596 16 is_stmt 0 view .LVU1976 + 5923 0118 628D ldrh r2, [r4, #42] + 5924 011a 92B2 uxth r2, r2 +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5925 .loc 1 2596 10 view .LVU1977 + 5926 011c 002A cmp r2, #0 + 5927 011e E1D0 beq .L346 +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5928 .loc 1 2596 35 discriminator 1 view .LVU1978 + 5929 0120 002B cmp r3, #0 + ARM GAS /tmp/cc4IUqI9.s page 269 + + + 5930 0122 DFD1 bne .L346 +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5931 .loc 1 2599 9 is_stmt 1 view .LVU1979 +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5932 .loc 1 2599 13 is_stmt 0 view .LVU1980 + 5933 0124 0096 str r6, [sp] + 5934 0126 0E9B ldr r3, [sp, #56] + 5935 0128 0022 movs r2, #0 + 5936 012a 8021 movs r1, #128 + 5937 012c 2000 movs r0, r4 + 5938 012e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5939 .LVL432: +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5940 .loc 1 2599 12 discriminator 1 view .LVU1981 + 5941 0132 0028 cmp r0, #0 + 5942 0134 2DD1 bne .L353 +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5943 .loc 1 2604 9 is_stmt 1 view .LVU1982 +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5944 .loc 1 2604 17 is_stmt 0 view .LVU1983 + 5945 0136 638D ldrh r3, [r4, #42] + 5946 0138 9BB2 uxth r3, r3 +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5947 .loc 1 2604 12 view .LVU1984 + 5948 013a FF2B cmp r3, #255 + 5949 013c C6D9 bls .L347 +2606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5950 .loc 1 2606 11 is_stmt 1 view .LVU1985 +2606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5951 .loc 1 2606 26 is_stmt 0 view .LVU1986 + 5952 013e FF23 movs r3, #255 + 5953 0140 2385 strh r3, [r4, #40] +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5954 .loc 1 2607 11 is_stmt 1 view .LVU1987 + 5955 0142 7F3B subs r3, r3, #127 + 5956 0144 0022 movs r2, #0 + 5957 0146 0092 str r2, [sp] + 5958 0148 5B04 lsls r3, r3, #17 + 5959 014a FF32 adds r2, r2, #255 + 5960 014c 0399 ldr r1, [sp, #12] + 5961 014e 2000 movs r0, r4 + 5962 0150 FFF7FEFF bl I2C_TransferConfig + 5963 .LVL433: + 5964 0154 C6E7 b .L346 + 5965 .L357: +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5966 .loc 1 2622 5 view .LVU1988 +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5967 .loc 1 2622 9 is_stmt 0 view .LVU1989 + 5968 0156 3200 movs r2, r6 + 5969 0158 0E99 ldr r1, [sp, #56] + 5970 015a 2000 movs r0, r4 + 5971 015c FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 5972 .LVL434: +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5973 .loc 1 2622 8 discriminator 1 view .LVU1990 + 5974 0160 0028 cmp r0, #0 + ARM GAS /tmp/cc4IUqI9.s page 270 + + + 5975 0162 18D1 bne .L354 +2628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5976 .loc 1 2628 5 is_stmt 1 view .LVU1991 + 5977 0164 2368 ldr r3, [r4] + 5978 0166 2022 movs r2, #32 + 5979 0168 DA61 str r2, [r3, #28] +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5980 .loc 1 2631 5 view .LVU1992 + 5981 016a 2168 ldr r1, [r4] + 5982 016c 4B68 ldr r3, [r1, #4] + 5983 016e 0B4D ldr r5, .L358 + 5984 0170 2B40 ands r3, r5 + 5985 0172 4B60 str r3, [r1, #4] +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5986 .loc 1 2633 5 view .LVU1993 +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5987 .loc 1 2633 17 is_stmt 0 view .LVU1994 + 5988 0174 4123 movs r3, #65 + 5989 0176 E254 strb r2, [r4, r3] +2634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5990 .loc 1 2634 5 is_stmt 1 view .LVU1995 +2634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5991 .loc 1 2634 17 is_stmt 0 view .LVU1996 + 5992 0178 0023 movs r3, #0 + 5993 017a 2232 adds r2, r2, #34 + 5994 017c A354 strb r3, [r4, r2] +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5995 .loc 1 2637 5 is_stmt 1 view .LVU1997 +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5996 .loc 1 2637 5 view .LVU1998 + 5997 017e 023A subs r2, r2, #2 + 5998 0180 A354 strb r3, [r4, r2] +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5999 .loc 1 2637 5 view .LVU1999 +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6000 .loc 1 2639 5 view .LVU2000 +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6001 .loc 1 2639 12 is_stmt 0 view .LVU2001 + 6002 0182 00E0 b .L340 + 6003 .LVL435: + 6004 .L349: +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6005 .loc 1 2643 12 view .LVU2002 + 6006 0184 0220 movs r0, #2 + 6007 .LVL436: + 6008 .L340: +2645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6009 .loc 1 2645 1 view .LVU2003 + 6010 0186 07B0 add sp, sp, #28 + 6011 @ sp needed + 6012 .LVL437: +2645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6013 .loc 1 2645 1 view .LVU2004 + 6014 0188 F0BD pop {r4, r5, r6, r7, pc} + 6015 .LVL438: + 6016 .L350: +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 271 + + + 6017 .loc 1 2540 5 discriminator 1 view .LVU2005 + 6018 018a 0220 movs r0, #2 + 6019 .LVL439: +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6020 .loc 1 2540 5 discriminator 1 view .LVU2006 + 6021 018c FBE7 b .L340 + 6022 .LVL440: + 6023 .L352: +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6024 .loc 1 2584 16 view .LVU2007 + 6025 018e 0120 movs r0, #1 + 6026 0190 F9E7 b .L340 + 6027 .L353: +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6028 .loc 1 2601 18 view .LVU2008 + 6029 0192 0120 movs r0, #1 + 6030 0194 F7E7 b .L340 + 6031 .L354: +2624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6032 .loc 1 2624 14 view .LVU2009 + 6033 0196 0120 movs r0, #1 + 6034 0198 F5E7 b .L340 + 6035 .L359: + 6036 019a C046 .align 2 + 6037 .L358: + 6038 019c 00E800FE .word -33495040 + 6039 .cfi_endproc + 6040 .LFE56: + 6042 .section .text.HAL_I2C_Mem_Read,"ax",%progbits + 6043 .align 1 + 6044 .global HAL_I2C_Mem_Read + 6045 .syntax unified + 6046 .code 16 + 6047 .thumb_func + 6049 HAL_I2C_Mem_Read: + 6050 .LVL441: + 6051 .LFB57: +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 6052 .loc 1 2662 1 is_stmt 1 view -0 + 6053 .cfi_startproc + 6054 @ args = 12, pretend = 0, frame = 16 + 6055 @ frame_needed = 0, uses_anonymous_args = 0 +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 6056 .loc 1 2662 1 is_stmt 0 view .LVU2011 + 6057 0000 F0B5 push {r4, r5, r6, r7, lr} + 6058 .cfi_def_cfa_offset 20 + 6059 .cfi_offset 4, -20 + 6060 .cfi_offset 5, -16 + 6061 .cfi_offset 6, -12 + 6062 .cfi_offset 7, -8 + 6063 .cfi_offset 14, -4 + 6064 0002 87B0 sub sp, sp, #28 + 6065 .cfi_def_cfa_offset 48 + 6066 0004 0400 movs r4, r0 + 6067 0006 0391 str r1, [sp, #12] + 6068 0008 0492 str r2, [sp, #16] + 6069 000a 0593 str r3, [sp, #20] + ARM GAS /tmp/cc4IUqI9.s page 272 + + + 6070 000c 0CAB add r3, sp, #48 + 6071 .LVL442: +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 6072 .loc 1 2662 1 view .LVU2012 + 6073 000e 20CB ldmia r3!, {r5} + 6074 .LVL443: +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 6075 .loc 1 2662 1 view .LVU2013 + 6076 0010 1F88 ldrh r7, [r3] +2663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6077 .loc 1 2663 3 is_stmt 1 view .LVU2014 +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6078 .loc 1 2666 3 view .LVU2015 +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6079 .loc 1 2668 3 view .LVU2016 +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6080 .loc 1 2668 11 is_stmt 0 view .LVU2017 + 6081 0012 4123 movs r3, #65 + 6082 .LVL444: +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6083 .loc 1 2668 11 view .LVU2018 + 6084 0014 C35C ldrb r3, [r0, r3] +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6085 .loc 1 2668 6 view .LVU2019 + 6086 0016 202B cmp r3, #32 + 6087 0018 00D0 beq .LCB5711 + 6088 001a B5E0 b .L370 @long jump + 6089 .LCB5711: +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6090 .loc 1 2670 5 is_stmt 1 view .LVU2020 +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6091 .loc 1 2670 8 is_stmt 0 view .LVU2021 + 6092 001c 002D cmp r5, #0 + 6093 001e 18D0 beq .L362 +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6094 .loc 1 2670 25 discriminator 1 view .LVU2022 + 6095 0020 002F cmp r7, #0 + 6096 0022 16D0 beq .L362 +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6097 .loc 1 2677 5 is_stmt 1 view .LVU2023 +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6098 .loc 1 2677 5 view .LVU2024 + 6099 0024 4023 movs r3, #64 + 6100 0026 C35C ldrb r3, [r0, r3] + 6101 0028 012B cmp r3, #1 + 6102 002a 00D1 bne .LCB5722 + 6103 002c AFE0 b .L371 @long jump + 6104 .LCB5722: +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6105 .loc 1 2677 5 discriminator 2 view .LVU2025 + 6106 002e 4023 movs r3, #64 + 6107 0030 0122 movs r2, #1 + 6108 .LVL445: +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6109 .loc 1 2677 5 is_stmt 0 discriminator 2 view .LVU2026 + 6110 0032 C254 strb r2, [r0, r3] +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 273 + + + 6111 .loc 1 2677 5 is_stmt 1 discriminator 2 view .LVU2027 +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6112 .loc 1 2680 5 view .LVU2028 +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6113 .loc 1 2680 17 is_stmt 0 view .LVU2029 + 6114 0034 FFF7FEFF bl HAL_GetTick + 6115 .LVL446: +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6116 .loc 1 2680 17 view .LVU2030 + 6117 0038 0600 movs r6, r0 + 6118 .LVL447: +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6119 .loc 1 2682 5 is_stmt 1 view .LVU2031 +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6120 .loc 1 2682 9 is_stmt 0 view .LVU2032 + 6121 003a 8021 movs r1, #128 + 6122 003c 0090 str r0, [sp] + 6123 003e 1923 movs r3, #25 + 6124 0040 0122 movs r2, #1 + 6125 0042 0902 lsls r1, r1, #8 + 6126 0044 2000 movs r0, r4 + 6127 .LVL448: +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6128 .loc 1 2682 9 view .LVU2033 + 6129 0046 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 6130 .LVL449: +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6131 .loc 1 2682 8 discriminator 1 view .LVU2034 + 6132 004a 0028 cmp r0, #0 + 6133 004c 06D0 beq .L376 +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6134 .loc 1 2684 14 view .LVU2035 + 6135 004e 0120 movs r0, #1 + 6136 0050 9BE0 b .L361 + 6137 .LVL450: + 6138 .L362: +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6139 .loc 1 2672 7 is_stmt 1 view .LVU2036 +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6140 .loc 1 2672 23 is_stmt 0 view .LVU2037 + 6141 0052 8023 movs r3, #128 + 6142 0054 9B00 lsls r3, r3, #2 + 6143 0056 6364 str r3, [r4, #68] +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6144 .loc 1 2673 7 is_stmt 1 view .LVU2038 +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6145 .loc 1 2673 15 is_stmt 0 view .LVU2039 + 6146 0058 0120 movs r0, #1 + 6147 .LVL451: +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6148 .loc 1 2673 15 view .LVU2040 + 6149 005a 96E0 b .L361 + 6150 .LVL452: + 6151 .L376: +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6152 .loc 1 2687 5 is_stmt 1 view .LVU2041 +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + ARM GAS /tmp/cc4IUqI9.s page 274 + + + 6153 .loc 1 2687 21 is_stmt 0 view .LVU2042 + 6154 005c 4123 movs r3, #65 + 6155 005e 2222 movs r2, #34 + 6156 0060 E254 strb r2, [r4, r3] +2688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6157 .loc 1 2688 5 is_stmt 1 view .LVU2043 +2688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6158 .loc 1 2688 21 is_stmt 0 view .LVU2044 + 6159 0062 0133 adds r3, r3, #1 + 6160 0064 1E32 adds r2, r2, #30 + 6161 0066 E254 strb r2, [r4, r3] +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6162 .loc 1 2689 5 is_stmt 1 view .LVU2045 +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6163 .loc 1 2689 21 is_stmt 0 view .LVU2046 + 6164 0068 0023 movs r3, #0 + 6165 006a 6364 str r3, [r4, #68] +2692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6166 .loc 1 2692 5 is_stmt 1 view .LVU2047 +2692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6167 .loc 1 2692 21 is_stmt 0 view .LVU2048 + 6168 006c 6562 str r5, [r4, #36] +2693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 6169 .loc 1 2693 5 is_stmt 1 view .LVU2049 +2693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 6170 .loc 1 2693 21 is_stmt 0 view .LVU2050 + 6171 006e 6785 strh r7, [r4, #42] +2694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6172 .loc 1 2694 5 is_stmt 1 view .LVU2051 +2694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6173 .loc 1 2694 21 is_stmt 0 view .LVU2052 + 6174 0070 6363 str r3, [r4, #52] +2697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6175 .loc 1 2697 5 is_stmt 1 view .LVU2053 +2697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6176 .loc 1 2697 9 is_stmt 0 view .LVU2054 + 6177 0072 0196 str r6, [sp, #4] + 6178 0074 0E9B ldr r3, [sp, #56] + 6179 0076 0093 str r3, [sp] + 6180 0078 059B ldr r3, [sp, #20] + 6181 007a 049A ldr r2, [sp, #16] + 6182 007c 0399 ldr r1, [sp, #12] + 6183 007e 2000 movs r0, r4 + 6184 0080 FFF7FEFF bl I2C_RequestMemoryRead + 6185 .LVL453: +2697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6186 .loc 1 2697 8 discriminator 1 view .LVU2055 + 6187 0084 0028 cmp r0, #0 + 6188 0086 0FD1 bne .L377 +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6189 .loc 1 2706 5 is_stmt 1 view .LVU2056 +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6190 .loc 1 2706 13 is_stmt 0 view .LVU2057 + 6191 0088 638D ldrh r3, [r4, #42] + 6192 008a 9BB2 uxth r3, r3 +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6193 .loc 1 2706 8 view .LVU2058 + ARM GAS /tmp/cc4IUqI9.s page 275 + + + 6194 008c FF2B cmp r3, #255 + 6195 008e 10D9 bls .L365 +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 6196 .loc 1 2708 7 is_stmt 1 view .LVU2059 +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 6197 .loc 1 2708 22 is_stmt 0 view .LVU2060 + 6198 0090 0123 movs r3, #1 + 6199 0092 2385 strh r3, [r4, #40] +2709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 6200 .loc 1 2709 7 is_stmt 1 view .LVU2061 + 6201 0094 7F33 adds r3, r3, #127 + 6202 0096 424A ldr r2, .L379 + 6203 0098 0092 str r2, [sp] + 6204 009a 5B04 lsls r3, r3, #17 + 6205 009c 0122 movs r2, #1 + 6206 009e 0399 ldr r1, [sp, #12] + 6207 00a0 2000 movs r0, r4 + 6208 00a2 FFF7FEFF bl I2C_TransferConfig + 6209 .LVL454: + 6210 00a6 21E0 b .L369 + 6211 .L377: +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6212 .loc 1 2700 7 view .LVU2062 +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6213 .loc 1 2700 7 view .LVU2063 + 6214 00a8 4023 movs r3, #64 + 6215 00aa 0022 movs r2, #0 + 6216 00ac E254 strb r2, [r4, r3] +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6217 .loc 1 2700 7 view .LVU2064 +2701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6218 .loc 1 2701 7 view .LVU2065 +2701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6219 .loc 1 2701 14 is_stmt 0 view .LVU2066 + 6220 00ae 0120 movs r0, #1 + 6221 00b0 6BE0 b .L361 + 6222 .L365: +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6223 .loc 1 2714 7 is_stmt 1 view .LVU2067 +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6224 .loc 1 2714 28 is_stmt 0 view .LVU2068 + 6225 00b2 628D ldrh r2, [r4, #42] + 6226 00b4 92B2 uxth r2, r2 +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6227 .loc 1 2714 22 view .LVU2069 + 6228 00b6 2285 strh r2, [r4, #40] +2715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 6229 .loc 1 2715 7 is_stmt 1 view .LVU2070 + 6230 00b8 8023 movs r3, #128 + 6231 00ba D2B2 uxtb r2, r2 + 6232 00bc 3849 ldr r1, .L379 + 6233 00be 0091 str r1, [sp] + 6234 00c0 9B04 lsls r3, r3, #18 + 6235 00c2 0399 ldr r1, [sp, #12] + 6236 00c4 2000 movs r0, r4 + 6237 00c6 FFF7FEFF bl I2C_TransferConfig + 6238 .LVL455: + ARM GAS /tmp/cc4IUqI9.s page 276 + + + 6239 00ca 0FE0 b .L369 + 6240 .L368: +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6241 .loc 1 2752 11 view .LVU2071 +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6242 .loc 1 2752 32 is_stmt 0 view .LVU2072 + 6243 00cc 628D ldrh r2, [r4, #42] + 6244 00ce 92B2 uxth r2, r2 +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6245 .loc 1 2752 26 view .LVU2073 + 6246 00d0 2285 strh r2, [r4, #40] +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 6247 .loc 1 2753 11 is_stmt 1 view .LVU2074 + 6248 00d2 8023 movs r3, #128 + 6249 00d4 D2B2 uxtb r2, r2 + 6250 00d6 0021 movs r1, #0 + 6251 00d8 0091 str r1, [sp] + 6252 00da 9B04 lsls r3, r3, #18 + 6253 00dc 0399 ldr r1, [sp, #12] + 6254 00de 2000 movs r0, r4 + 6255 00e0 FFF7FEFF bl I2C_TransferConfig + 6256 .LVL456: + 6257 .L367: +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6258 .loc 1 2757 30 view .LVU2075 +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6259 .loc 1 2757 18 is_stmt 0 view .LVU2076 + 6260 00e4 638D ldrh r3, [r4, #42] + 6261 00e6 9BB2 uxth r3, r3 +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6262 .loc 1 2757 30 view .LVU2077 + 6263 00e8 002B cmp r3, #0 + 6264 00ea 36D0 beq .L378 + 6265 .L369: +2719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6266 .loc 1 2719 5 is_stmt 1 view .LVU2078 +2722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6267 .loc 1 2722 7 view .LVU2079 +2722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6268 .loc 1 2722 11 is_stmt 0 view .LVU2080 + 6269 00ec 0096 str r6, [sp] + 6270 00ee 0E9B ldr r3, [sp, #56] + 6271 00f0 0022 movs r2, #0 + 6272 00f2 0421 movs r1, #4 + 6273 00f4 2000 movs r0, r4 + 6274 00f6 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 6275 .LVL457: +2722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6276 .loc 1 2722 10 discriminator 1 view .LVU2081 + 6277 00fa 0028 cmp r0, #0 + 6278 00fc 49D1 bne .L373 +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6279 .loc 1 2728 7 is_stmt 1 view .LVU2082 +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6280 .loc 1 2728 38 is_stmt 0 view .LVU2083 + 6281 00fe 2368 ldr r3, [r4] +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 277 + + + 6282 .loc 1 2728 48 view .LVU2084 + 6283 0100 5A6A ldr r2, [r3, #36] +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6284 .loc 1 2728 12 view .LVU2085 + 6285 0102 636A ldr r3, [r4, #36] +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6286 .loc 1 2728 23 view .LVU2086 + 6287 0104 1A70 strb r2, [r3] +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6288 .loc 1 2731 7 is_stmt 1 view .LVU2087 +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6289 .loc 1 2731 11 is_stmt 0 view .LVU2088 + 6290 0106 636A ldr r3, [r4, #36] +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6291 .loc 1 2731 21 view .LVU2089 + 6292 0108 0133 adds r3, r3, #1 + 6293 010a 6362 str r3, [r4, #36] +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 6294 .loc 1 2733 7 is_stmt 1 view .LVU2090 +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 6295 .loc 1 2733 11 is_stmt 0 view .LVU2091 + 6296 010c 238D ldrh r3, [r4, #40] +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 6297 .loc 1 2733 21 view .LVU2092 + 6298 010e 013B subs r3, r3, #1 + 6299 0110 9BB2 uxth r3, r3 + 6300 0112 2385 strh r3, [r4, #40] +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6301 .loc 1 2734 7 is_stmt 1 view .LVU2093 +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6302 .loc 1 2734 11 is_stmt 0 view .LVU2094 + 6303 0114 628D ldrh r2, [r4, #42] +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6304 .loc 1 2734 22 view .LVU2095 + 6305 0116 013A subs r2, r2, #1 + 6306 0118 92B2 uxth r2, r2 + 6307 011a 6285 strh r2, [r4, #42] +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6308 .loc 1 2736 7 is_stmt 1 view .LVU2096 +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6309 .loc 1 2736 16 is_stmt 0 view .LVU2097 + 6310 011c 628D ldrh r2, [r4, #42] + 6311 011e 92B2 uxth r2, r2 +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6312 .loc 1 2736 10 view .LVU2098 + 6313 0120 002A cmp r2, #0 + 6314 0122 DFD0 beq .L367 +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6315 .loc 1 2736 35 discriminator 1 view .LVU2099 + 6316 0124 002B cmp r3, #0 + 6317 0126 DDD1 bne .L367 +2739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6318 .loc 1 2739 9 is_stmt 1 view .LVU2100 +2739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6319 .loc 1 2739 13 is_stmt 0 view .LVU2101 + 6320 0128 0096 str r6, [sp] + 6321 012a 0E9B ldr r3, [sp, #56] + ARM GAS /tmp/cc4IUqI9.s page 278 + + + 6322 012c 0022 movs r2, #0 + 6323 012e 8021 movs r1, #128 + 6324 0130 2000 movs r0, r4 + 6325 0132 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 6326 .LVL458: +2739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6327 .loc 1 2739 12 discriminator 1 view .LVU2102 + 6328 0136 0028 cmp r0, #0 + 6329 0138 2DD1 bne .L374 +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6330 .loc 1 2744 9 is_stmt 1 view .LVU2103 +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6331 .loc 1 2744 17 is_stmt 0 view .LVU2104 + 6332 013a 638D ldrh r3, [r4, #42] + 6333 013c 9BB2 uxth r3, r3 +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6334 .loc 1 2744 12 view .LVU2105 + 6335 013e FF2B cmp r3, #255 + 6336 0140 C4D9 bls .L368 +2746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 6337 .loc 1 2746 11 is_stmt 1 view .LVU2106 +2746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 6338 .loc 1 2746 26 is_stmt 0 view .LVU2107 + 6339 0142 0123 movs r3, #1 + 6340 0144 2385 strh r3, [r4, #40] +2747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 6341 .loc 1 2747 11 is_stmt 1 view .LVU2108 + 6342 0146 7F33 adds r3, r3, #127 + 6343 0148 0022 movs r2, #0 + 6344 014a 0092 str r2, [sp] + 6345 014c 5B04 lsls r3, r3, #17 + 6346 014e 0132 adds r2, r2, #1 + 6347 0150 0399 ldr r1, [sp, #12] + 6348 0152 2000 movs r0, r4 + 6349 0154 FFF7FEFF bl I2C_TransferConfig + 6350 .LVL459: + 6351 0158 C4E7 b .L367 + 6352 .L378: +2761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6353 .loc 1 2761 5 view .LVU2109 +2761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6354 .loc 1 2761 9 is_stmt 0 view .LVU2110 + 6355 015a 3200 movs r2, r6 + 6356 015c 0E99 ldr r1, [sp, #56] + 6357 015e 2000 movs r0, r4 + 6358 0160 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 6359 .LVL460: +2761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6360 .loc 1 2761 8 discriminator 1 view .LVU2111 + 6361 0164 0028 cmp r0, #0 + 6362 0166 18D1 bne .L375 +2767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6363 .loc 1 2767 5 is_stmt 1 view .LVU2112 + 6364 0168 2368 ldr r3, [r4] + 6365 016a 2022 movs r2, #32 + 6366 016c DA61 str r2, [r3, #28] +2770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 279 + + + 6367 .loc 1 2770 5 view .LVU2113 + 6368 016e 2168 ldr r1, [r4] + 6369 0170 4B68 ldr r3, [r1, #4] + 6370 0172 0C4D ldr r5, .L379+4 + 6371 0174 2B40 ands r3, r5 + 6372 0176 4B60 str r3, [r1, #4] +2772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6373 .loc 1 2772 5 view .LVU2114 +2772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6374 .loc 1 2772 17 is_stmt 0 view .LVU2115 + 6375 0178 4123 movs r3, #65 + 6376 017a E254 strb r2, [r4, r3] +2773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6377 .loc 1 2773 5 is_stmt 1 view .LVU2116 +2773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6378 .loc 1 2773 17 is_stmt 0 view .LVU2117 + 6379 017c 0023 movs r3, #0 + 6380 017e 2232 adds r2, r2, #34 + 6381 0180 A354 strb r3, [r4, r2] +2776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6382 .loc 1 2776 5 is_stmt 1 view .LVU2118 +2776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6383 .loc 1 2776 5 view .LVU2119 + 6384 0182 023A subs r2, r2, #2 + 6385 0184 A354 strb r3, [r4, r2] +2776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6386 .loc 1 2776 5 view .LVU2120 +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6387 .loc 1 2778 5 view .LVU2121 +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6388 .loc 1 2778 12 is_stmt 0 view .LVU2122 + 6389 0186 00E0 b .L361 + 6390 .LVL461: + 6391 .L370: +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6392 .loc 1 2782 12 view .LVU2123 + 6393 0188 0220 movs r0, #2 + 6394 .LVL462: + 6395 .L361: +2784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 6396 .loc 1 2784 1 view .LVU2124 + 6397 018a 07B0 add sp, sp, #28 + 6398 @ sp needed + 6399 .LVL463: +2784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 6400 .loc 1 2784 1 view .LVU2125 + 6401 018c F0BD pop {r4, r5, r6, r7, pc} + 6402 .LVL464: + 6403 .L371: +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6404 .loc 1 2677 5 discriminator 1 view .LVU2126 + 6405 018e 0220 movs r0, #2 + 6406 .LVL465: +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6407 .loc 1 2677 5 discriminator 1 view .LVU2127 + 6408 0190 FBE7 b .L361 + 6409 .LVL466: + ARM GAS /tmp/cc4IUqI9.s page 280 + + + 6410 .L373: +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6411 .loc 1 2724 16 view .LVU2128 + 6412 0192 0120 movs r0, #1 + 6413 0194 F9E7 b .L361 + 6414 .L374: +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6415 .loc 1 2741 18 view .LVU2129 + 6416 0196 0120 movs r0, #1 + 6417 0198 F7E7 b .L361 + 6418 .L375: +2763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6419 .loc 1 2763 14 view .LVU2130 + 6420 019a 0120 movs r0, #1 + 6421 019c F5E7 b .L361 + 6422 .L380: + 6423 019e C046 .align 2 + 6424 .L379: + 6425 01a0 00240080 .word -2147474432 + 6426 01a4 00E800FE .word -33495040 + 6427 .cfi_endproc + 6428 .LFE57: + 6430 .section .text.HAL_I2C_Mem_Write_IT,"ax",%progbits + 6431 .align 1 + 6432 .global HAL_I2C_Mem_Write_IT + 6433 .syntax unified + 6434 .code 16 + 6435 .thumb_func + 6437 HAL_I2C_Mem_Write_IT: + 6438 .LVL467: + 6439 .LFB58: +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6440 .loc 1 2799 1 is_stmt 1 view -0 + 6441 .cfi_startproc + 6442 @ args = 8, pretend = 0, frame = 0 + 6443 @ frame_needed = 0, uses_anonymous_args = 0 +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6444 .loc 1 2799 1 is_stmt 0 view .LVU2132 + 6445 0000 F0B5 push {r4, r5, r6, r7, lr} + 6446 .cfi_def_cfa_offset 20 + 6447 .cfi_offset 4, -20 + 6448 .cfi_offset 5, -16 + 6449 .cfi_offset 6, -12 + 6450 .cfi_offset 7, -8 + 6451 .cfi_offset 14, -4 + 6452 0002 D646 mov lr, r10 + 6453 0004 4F46 mov r7, r9 + 6454 0006 4646 mov r6, r8 + 6455 0008 C0B5 push {r6, r7, lr} + 6456 .cfi_def_cfa_offset 32 + 6457 .cfi_offset 8, -32 + 6458 .cfi_offset 9, -28 + 6459 .cfi_offset 10, -24 + 6460 000a 82B0 sub sp, sp, #8 + 6461 .cfi_def_cfa_offset 40 + 6462 000c 0400 movs r4, r0 + 6463 000e 0AA8 add r0, sp, #40 + ARM GAS /tmp/cc4IUqI9.s page 281 + + + 6464 .LVL468: +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6465 .loc 1 2799 1 view .LVU2133 + 6466 0010 20C8 ldmia r0!, {r5} + 6467 .LVL469: +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6468 .loc 1 2799 1 view .LVU2134 + 6469 0012 0688 ldrh r6, [r0] +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6470 .loc 1 2801 3 is_stmt 1 view .LVU2135 +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6471 .loc 1 2803 3 view .LVU2136 +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6472 .loc 1 2803 11 is_stmt 0 view .LVU2137 + 6473 0014 4120 movs r0, #65 + 6474 .LVL470: +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6475 .loc 1 2803 11 view .LVU2138 + 6476 0016 205C ldrb r0, [r4, r0] +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6477 .loc 1 2803 6 view .LVU2139 + 6478 0018 2028 cmp r0, #32 + 6479 001a 49D1 bne .L387 +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6480 .loc 1 2805 5 is_stmt 1 view .LVU2140 +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6481 .loc 1 2805 8 is_stmt 0 view .LVU2141 + 6482 001c 002D cmp r5, #0 + 6483 001e 3BD0 beq .L383 +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6484 .loc 1 2805 25 discriminator 1 view .LVU2142 + 6485 0020 002E cmp r6, #0 + 6486 0022 39D0 beq .L383 +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6487 .loc 1 2811 5 is_stmt 1 view .LVU2143 +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6488 .loc 1 2811 9 is_stmt 0 view .LVU2144 + 6489 0024 2068 ldr r0, [r4] + 6490 0026 8146 mov r9, r0 + 6491 0028 8069 ldr r0, [r0, #24] +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6492 .loc 1 2811 8 view .LVU2145 + 6493 002a 0004 lsls r0, r0, #16 + 6494 002c 47D4 bmi .L388 +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6495 .loc 1 2817 5 is_stmt 1 view .LVU2146 +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6496 .loc 1 2817 5 view .LVU2147 + 6497 002e 4020 movs r0, #64 + 6498 0030 205C ldrb r0, [r4, r0] + 6499 0032 0128 cmp r0, #1 + 6500 0034 45D0 beq .L389 +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6501 .loc 1 2817 5 discriminator 2 view .LVU2148 + 6502 0036 4020 movs r0, #64 + 6503 0038 8246 mov r10, r0 + 6504 003a 3F38 subs r0, r0, #63 + ARM GAS /tmp/cc4IUqI9.s page 282 + + + 6505 003c 5746 mov r7, r10 + 6506 003e E055 strb r0, [r4, r7] +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6507 .loc 1 2817 5 discriminator 2 view .LVU2149 +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6508 .loc 1 2819 5 view .LVU2150 +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6509 .loc 1 2819 23 is_stmt 0 view .LVU2151 + 6510 0040 4030 adds r0, r0, #64 + 6511 0042 8446 mov ip, r0 + 6512 0044 2038 subs r0, r0, #32 + 6513 0046 8046 mov r8, r0 + 6514 0048 6046 mov r0, ip + 6515 004a 4746 mov r7, r8 + 6516 004c 2754 strb r7, [r4, r0] +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6517 .loc 1 2820 5 is_stmt 1 view .LVU2152 +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6518 .loc 1 2820 23 is_stmt 0 view .LVU2153 + 6519 004e 0130 adds r0, r0, #1 + 6520 0050 5746 mov r7, r10 + 6521 0052 2754 strb r7, [r4, r0] +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6522 .loc 1 2821 5 is_stmt 1 view .LVU2154 +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6523 .loc 1 2821 23 is_stmt 0 view .LVU2155 + 6524 0054 0020 movs r0, #0 + 6525 0056 6064 str r0, [r4, #68] +2824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; + 6526 .loc 1 2824 5 is_stmt 1 view .LVU2156 +2824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; + 6527 .loc 1 2824 23 is_stmt 0 view .LVU2157 + 6528 0058 2085 strh r0, [r4, #40] +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6529 .loc 1 2825 5 is_stmt 1 view .LVU2158 +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6530 .loc 1 2825 23 is_stmt 0 view .LVU2159 + 6531 005a 6562 str r5, [r4, #36] +2826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6532 .loc 1 2826 5 is_stmt 1 view .LVU2160 +2826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6533 .loc 1 2826 23 is_stmt 0 view .LVU2161 + 6534 005c 6685 strh r6, [r4, #42] +2827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6535 .loc 1 2827 5 is_stmt 1 view .LVU2162 +2827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6536 .loc 1 2827 23 is_stmt 0 view .LVU2163 + 6537 005e 1A48 ldr r0, .L391 + 6538 0060 E062 str r0, [r4, #44] +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6539 .loc 1 2828 5 is_stmt 1 view .LVU2164 +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6540 .loc 1 2828 23 is_stmt 0 view .LVU2165 + 6541 0062 1A48 ldr r0, .L391+4 + 6542 0064 6063 str r0, [r4, #52] +2829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6543 .loc 1 2829 5 is_stmt 1 view .LVU2166 + ARM GAS /tmp/cc4IUqI9.s page 283 + + +2829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6544 .loc 1 2829 23 is_stmt 0 view .LVU2167 + 6545 0066 E164 str r1, [r4, #76] +2832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6546 .loc 1 2832 5 is_stmt 1 view .LVU2168 +2832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6547 .loc 1 2832 8 is_stmt 0 view .LVU2169 + 6548 0068 012B cmp r3, #1 + 6549 006a 1AD0 beq .L390 +2844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6550 .loc 1 2844 7 is_stmt 1 view .LVU2170 +2844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6551 .loc 1 2844 30 is_stmt 0 view .LVU2171 + 6552 006c 100A lsrs r0, r2, #8 +2844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6553 .loc 1 2844 28 view .LVU2172 + 6554 006e 4D46 mov r5, r9 + 6555 0070 A862 str r0, [r5, #40] +2847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6556 .loc 1 2847 7 is_stmt 1 view .LVU2173 +2847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6557 .loc 1 2847 26 is_stmt 0 view .LVU2174 + 6558 0072 D2B2 uxtb r2, r2 + 6559 .LVL471: +2847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6560 .loc 1 2847 24 view .LVU2175 + 6561 0074 2265 str r2, [r4, #80] + 6562 .L386: +2850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6563 .loc 1 2850 5 is_stmt 1 view .LVU2176 + 6564 0076 8020 movs r0, #128 + 6565 0078 DAB2 uxtb r2, r3 + 6566 007a 154B ldr r3, .L391+8 + 6567 .LVL472: +2850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6568 .loc 1 2850 5 is_stmt 0 view .LVU2177 + 6569 007c 0093 str r3, [sp] + 6570 007e 4304 lsls r3, r0, #17 + 6571 0080 2000 movs r0, r4 + 6572 0082 FFF7FEFF bl I2C_TransferConfig + 6573 .LVL473: +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6574 .loc 1 2853 5 is_stmt 1 view .LVU2178 +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6575 .loc 1 2853 5 view .LVU2179 + 6576 0086 4023 movs r3, #64 + 6577 0088 0022 movs r2, #0 + 6578 008a E254 strb r2, [r4, r3] +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6579 .loc 1 2853 5 view .LVU2180 +2863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6580 .loc 1 2863 5 view .LVU2181 + 6581 008c 0121 movs r1, #1 + 6582 008e 2000 movs r0, r4 + 6583 0090 FFF7FEFF bl I2C_Enable_IRQ + 6584 .LVL474: +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 284 + + + 6585 .loc 1 2865 5 view .LVU2182 +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6586 .loc 1 2865 12 is_stmt 0 view .LVU2183 + 6587 0094 0020 movs r0, #0 + 6588 0096 0CE0 b .L382 + 6589 .LVL475: + 6590 .L383: +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6591 .loc 1 2807 7 is_stmt 1 view .LVU2184 +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6592 .loc 1 2807 23 is_stmt 0 view .LVU2185 + 6593 0098 8023 movs r3, #128 + 6594 .LVL476: +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6595 .loc 1 2807 23 view .LVU2186 + 6596 009a 9B00 lsls r3, r3, #2 + 6597 009c 6364 str r3, [r4, #68] +2808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6598 .loc 1 2808 7 is_stmt 1 view .LVU2187 +2808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6599 .loc 1 2808 15 is_stmt 0 view .LVU2188 + 6600 009e 0120 movs r0, #1 + 6601 00a0 07E0 b .L382 + 6602 .LVL477: + 6603 .L390: +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6604 .loc 1 2835 7 is_stmt 1 view .LVU2189 +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6605 .loc 1 2835 30 is_stmt 0 view .LVU2190 + 6606 00a2 D2B2 uxtb r2, r2 + 6607 .LVL478: +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6608 .loc 1 2835 28 view .LVU2191 + 6609 00a4 4846 mov r0, r9 + 6610 00a6 8262 str r2, [r0, #40] +2838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6611 .loc 1 2838 7 is_stmt 1 view .LVU2192 +2838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6612 .loc 1 2838 24 is_stmt 0 view .LVU2193 + 6613 00a8 0122 movs r2, #1 + 6614 00aa 5242 rsbs r2, r2, #0 + 6615 00ac 2265 str r2, [r4, #80] + 6616 00ae E2E7 b .L386 + 6617 .LVL479: + 6618 .L387: +2869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6619 .loc 1 2869 12 view .LVU2194 + 6620 00b0 0220 movs r0, #2 + 6621 .LVL480: + 6622 .L382: +2871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6623 .loc 1 2871 1 view .LVU2195 + 6624 00b2 02B0 add sp, sp, #8 + 6625 @ sp needed + 6626 .LVL481: +2871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6627 .loc 1 2871 1 view .LVU2196 + ARM GAS /tmp/cc4IUqI9.s page 285 + + + 6628 00b4 E0BC pop {r5, r6, r7} + 6629 00b6 BA46 mov r10, r7 + 6630 00b8 B146 mov r9, r6 + 6631 00ba A846 mov r8, r5 + 6632 00bc F0BD pop {r4, r5, r6, r7, pc} + 6633 .LVL482: + 6634 .L388: +2813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6635 .loc 1 2813 14 view .LVU2197 + 6636 00be 0220 movs r0, #2 + 6637 00c0 F7E7 b .L382 + 6638 .L389: +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6639 .loc 1 2817 5 discriminator 1 view .LVU2198 + 6640 00c2 0220 movs r0, #2 + 6641 00c4 F5E7 b .L382 + 6642 .L392: + 6643 00c6 C046 .align 2 + 6644 .L391: + 6645 00c8 0000FFFF .word -65536 + 6646 00cc 00000000 .word I2C_Mem_ISR_IT + 6647 00d0 00200080 .word -2147475456 + 6648 .cfi_endproc + 6649 .LFE58: + 6651 .section .text.HAL_I2C_Mem_Read_IT,"ax",%progbits + 6652 .align 1 + 6653 .global HAL_I2C_Mem_Read_IT + 6654 .syntax unified + 6655 .code 16 + 6656 .thumb_func + 6658 HAL_I2C_Mem_Read_IT: + 6659 .LVL483: + 6660 .LFB59: +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6661 .loc 1 2887 1 is_stmt 1 view -0 + 6662 .cfi_startproc + 6663 @ args = 8, pretend = 0, frame = 0 + 6664 @ frame_needed = 0, uses_anonymous_args = 0 +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6665 .loc 1 2887 1 is_stmt 0 view .LVU2200 + 6666 0000 F0B5 push {r4, r5, r6, r7, lr} + 6667 .cfi_def_cfa_offset 20 + 6668 .cfi_offset 4, -20 + 6669 .cfi_offset 5, -16 + 6670 .cfi_offset 6, -12 + 6671 .cfi_offset 7, -8 + 6672 .cfi_offset 14, -4 + 6673 0002 D646 mov lr, r10 + 6674 0004 4F46 mov r7, r9 + 6675 0006 4646 mov r6, r8 + 6676 0008 C0B5 push {r6, r7, lr} + 6677 .cfi_def_cfa_offset 32 + 6678 .cfi_offset 8, -32 + 6679 .cfi_offset 9, -28 + 6680 .cfi_offset 10, -24 + 6681 000a 82B0 sub sp, sp, #8 + 6682 .cfi_def_cfa_offset 40 + ARM GAS /tmp/cc4IUqI9.s page 286 + + + 6683 000c 0400 movs r4, r0 + 6684 000e 0AA8 add r0, sp, #40 + 6685 .LVL484: +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6686 .loc 1 2887 1 view .LVU2201 + 6687 0010 20C8 ldmia r0!, {r5} + 6688 .LVL485: +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6689 .loc 1 2887 1 view .LVU2202 + 6690 0012 0688 ldrh r6, [r0] +2889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6691 .loc 1 2889 3 is_stmt 1 view .LVU2203 +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6692 .loc 1 2891 3 view .LVU2204 +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6693 .loc 1 2891 11 is_stmt 0 view .LVU2205 + 6694 0014 4120 movs r0, #65 + 6695 .LVL486: +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6696 .loc 1 2891 11 view .LVU2206 + 6697 0016 205C ldrb r0, [r4, r0] +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6698 .loc 1 2891 6 view .LVU2207 + 6699 0018 2028 cmp r0, #32 + 6700 001a 47D1 bne .L399 +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6701 .loc 1 2893 5 is_stmt 1 view .LVU2208 +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6702 .loc 1 2893 8 is_stmt 0 view .LVU2209 + 6703 001c 002D cmp r5, #0 + 6704 001e 39D0 beq .L395 +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6705 .loc 1 2893 25 discriminator 1 view .LVU2210 + 6706 0020 002E cmp r6, #0 + 6707 0022 37D0 beq .L395 +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6708 .loc 1 2899 5 is_stmt 1 view .LVU2211 +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6709 .loc 1 2899 9 is_stmt 0 view .LVU2212 + 6710 0024 2068 ldr r0, [r4] + 6711 0026 8146 mov r9, r0 + 6712 0028 8069 ldr r0, [r0, #24] +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6713 .loc 1 2899 8 view .LVU2213 + 6714 002a 0004 lsls r0, r0, #16 + 6715 002c 45D4 bmi .L400 +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6716 .loc 1 2905 5 is_stmt 1 view .LVU2214 +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6717 .loc 1 2905 5 view .LVU2215 + 6718 002e 4020 movs r0, #64 + 6719 0030 205C ldrb r0, [r4, r0] + 6720 0032 0128 cmp r0, #1 + 6721 0034 43D0 beq .L401 +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6722 .loc 1 2905 5 discriminator 2 view .LVU2216 + 6723 0036 4020 movs r0, #64 + ARM GAS /tmp/cc4IUqI9.s page 287 + + + 6724 0038 8246 mov r10, r0 + 6725 003a 3F38 subs r0, r0, #63 + 6726 003c 5746 mov r7, r10 + 6727 003e E055 strb r0, [r4, r7] +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6728 .loc 1 2905 5 discriminator 2 view .LVU2217 +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6729 .loc 1 2907 5 view .LVU2218 +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6730 .loc 1 2907 23 is_stmt 0 view .LVU2219 + 6731 0040 4030 adds r0, r0, #64 + 6732 0042 8446 mov ip, r0 + 6733 0044 1F38 subs r0, r0, #31 + 6734 0046 8046 mov r8, r0 + 6735 0048 6046 mov r0, ip + 6736 004a 4746 mov r7, r8 + 6737 004c 2754 strb r7, [r4, r0] +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6738 .loc 1 2908 5 is_stmt 1 view .LVU2220 +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6739 .loc 1 2908 23 is_stmt 0 view .LVU2221 + 6740 004e 0130 adds r0, r0, #1 + 6741 0050 5746 mov r7, r10 + 6742 0052 2754 strb r7, [r4, r0] +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6743 .loc 1 2909 5 is_stmt 1 view .LVU2222 +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6744 .loc 1 2909 23 is_stmt 0 view .LVU2223 + 6745 0054 0020 movs r0, #0 + 6746 0056 6064 str r0, [r4, #68] +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6747 .loc 1 2912 5 is_stmt 1 view .LVU2224 +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6748 .loc 1 2912 23 is_stmt 0 view .LVU2225 + 6749 0058 6562 str r5, [r4, #36] +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6750 .loc 1 2913 5 is_stmt 1 view .LVU2226 +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6751 .loc 1 2913 23 is_stmt 0 view .LVU2227 + 6752 005a 6685 strh r6, [r4, #42] +2914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6753 .loc 1 2914 5 is_stmt 1 view .LVU2228 +2914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6754 .loc 1 2914 23 is_stmt 0 view .LVU2229 + 6755 005c 1948 ldr r0, .L403 + 6756 005e E062 str r0, [r4, #44] +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6757 .loc 1 2915 5 is_stmt 1 view .LVU2230 +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6758 .loc 1 2915 23 is_stmt 0 view .LVU2231 + 6759 0060 1948 ldr r0, .L403+4 + 6760 0062 6063 str r0, [r4, #52] +2916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6761 .loc 1 2916 5 is_stmt 1 view .LVU2232 +2916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6762 .loc 1 2916 23 is_stmt 0 view .LVU2233 + 6763 0064 E164 str r1, [r4, #76] + ARM GAS /tmp/cc4IUqI9.s page 288 + + +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6764 .loc 1 2919 5 is_stmt 1 view .LVU2234 +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6765 .loc 1 2919 8 is_stmt 0 view .LVU2235 + 6766 0066 012B cmp r3, #1 + 6767 0068 19D0 beq .L402 +2931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6768 .loc 1 2931 7 is_stmt 1 view .LVU2236 +2931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6769 .loc 1 2931 30 is_stmt 0 view .LVU2237 + 6770 006a 100A lsrs r0, r2, #8 +2931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6771 .loc 1 2931 28 view .LVU2238 + 6772 006c 4D46 mov r5, r9 + 6773 006e A862 str r0, [r5, #40] +2934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6774 .loc 1 2934 7 is_stmt 1 view .LVU2239 +2934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6775 .loc 1 2934 26 is_stmt 0 view .LVU2240 + 6776 0070 D2B2 uxtb r2, r2 + 6777 .LVL487: +2934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6778 .loc 1 2934 24 view .LVU2241 + 6779 0072 2265 str r2, [r4, #80] + 6780 .L398: +2937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6781 .loc 1 2937 5 is_stmt 1 view .LVU2242 + 6782 0074 DAB2 uxtb r2, r3 + 6783 0076 154B ldr r3, .L403+8 + 6784 .LVL488: +2937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6785 .loc 1 2937 5 is_stmt 0 view .LVU2243 + 6786 0078 0093 str r3, [sp] + 6787 007a 0023 movs r3, #0 + 6788 007c 2000 movs r0, r4 + 6789 007e FFF7FEFF bl I2C_TransferConfig + 6790 .LVL489: +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6791 .loc 1 2940 5 is_stmt 1 view .LVU2244 +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6792 .loc 1 2940 5 view .LVU2245 + 6793 0082 4023 movs r3, #64 + 6794 0084 0022 movs r2, #0 + 6795 0086 E254 strb r2, [r4, r3] +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6796 .loc 1 2940 5 view .LVU2246 +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6797 .loc 1 2950 5 view .LVU2247 + 6798 0088 0121 movs r1, #1 + 6799 008a 2000 movs r0, r4 + 6800 008c FFF7FEFF bl I2C_Enable_IRQ + 6801 .LVL490: +2952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6802 .loc 1 2952 5 view .LVU2248 +2952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6803 .loc 1 2952 12 is_stmt 0 view .LVU2249 + 6804 0090 0020 movs r0, #0 + ARM GAS /tmp/cc4IUqI9.s page 289 + + + 6805 0092 0CE0 b .L394 + 6806 .LVL491: + 6807 .L395: +2895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6808 .loc 1 2895 7 is_stmt 1 view .LVU2250 +2895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6809 .loc 1 2895 23 is_stmt 0 view .LVU2251 + 6810 0094 8023 movs r3, #128 + 6811 .LVL492: +2895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6812 .loc 1 2895 23 view .LVU2252 + 6813 0096 9B00 lsls r3, r3, #2 + 6814 0098 6364 str r3, [r4, #68] +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6815 .loc 1 2896 7 is_stmt 1 view .LVU2253 +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6816 .loc 1 2896 15 is_stmt 0 view .LVU2254 + 6817 009a 0120 movs r0, #1 + 6818 009c 07E0 b .L394 + 6819 .LVL493: + 6820 .L402: +2922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6821 .loc 1 2922 7 is_stmt 1 view .LVU2255 +2922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6822 .loc 1 2922 30 is_stmt 0 view .LVU2256 + 6823 009e D2B2 uxtb r2, r2 + 6824 .LVL494: +2922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6825 .loc 1 2922 28 view .LVU2257 + 6826 00a0 4846 mov r0, r9 + 6827 00a2 8262 str r2, [r0, #40] +2925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6828 .loc 1 2925 7 is_stmt 1 view .LVU2258 +2925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6829 .loc 1 2925 24 is_stmt 0 view .LVU2259 + 6830 00a4 0122 movs r2, #1 + 6831 00a6 5242 rsbs r2, r2, #0 + 6832 00a8 2265 str r2, [r4, #80] + 6833 00aa E3E7 b .L398 + 6834 .LVL495: + 6835 .L399: +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6836 .loc 1 2956 12 view .LVU2260 + 6837 00ac 0220 movs r0, #2 + 6838 .LVL496: + 6839 .L394: +2958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6840 .loc 1 2958 1 view .LVU2261 + 6841 00ae 02B0 add sp, sp, #8 + 6842 @ sp needed + 6843 .LVL497: +2958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6844 .loc 1 2958 1 view .LVU2262 + 6845 00b0 E0BC pop {r5, r6, r7} + 6846 00b2 BA46 mov r10, r7 + 6847 00b4 B146 mov r9, r6 + 6848 00b6 A846 mov r8, r5 + ARM GAS /tmp/cc4IUqI9.s page 290 + + + 6849 00b8 F0BD pop {r4, r5, r6, r7, pc} + 6850 .LVL498: + 6851 .L400: +2901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6852 .loc 1 2901 14 view .LVU2263 + 6853 00ba 0220 movs r0, #2 + 6854 00bc F7E7 b .L394 + 6855 .L401: +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6856 .loc 1 2905 5 discriminator 1 view .LVU2264 + 6857 00be 0220 movs r0, #2 + 6858 00c0 F5E7 b .L394 + 6859 .L404: + 6860 00c2 C046 .align 2 + 6861 .L403: + 6862 00c4 0000FFFF .word -65536 + 6863 00c8 00000000 .word I2C_Mem_ISR_IT + 6864 00cc 00200080 .word -2147475456 + 6865 .cfi_endproc + 6866 .LFE59: + 6868 .section .text.HAL_I2C_Mem_Write_DMA,"ax",%progbits + 6869 .align 1 + 6870 .global HAL_I2C_Mem_Write_DMA + 6871 .syntax unified + 6872 .code 16 + 6873 .thumb_func + 6875 HAL_I2C_Mem_Write_DMA: + 6876 .LVL499: + 6877 .LFB60: +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6878 .loc 1 2974 1 is_stmt 1 view -0 + 6879 .cfi_startproc + 6880 @ args = 8, pretend = 0, frame = 0 + 6881 @ frame_needed = 0, uses_anonymous_args = 0 +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6882 .loc 1 2974 1 is_stmt 0 view .LVU2266 + 6883 0000 F0B5 push {r4, r5, r6, r7, lr} + 6884 .cfi_def_cfa_offset 20 + 6885 .cfi_offset 4, -20 + 6886 .cfi_offset 5, -16 + 6887 .cfi_offset 6, -12 + 6888 .cfi_offset 7, -8 + 6889 .cfi_offset 14, -4 + 6890 0002 D646 mov lr, r10 + 6891 0004 4F46 mov r7, r9 + 6892 0006 4646 mov r6, r8 + 6893 0008 C0B5 push {r6, r7, lr} + 6894 .cfi_def_cfa_offset 32 + 6895 .cfi_offset 8, -32 + 6896 .cfi_offset 9, -28 + 6897 .cfi_offset 10, -24 + 6898 000a 82B0 sub sp, sp, #8 + 6899 .cfi_def_cfa_offset 40 + 6900 000c 0400 movs r4, r0 + 6901 000e 0E00 movs r6, r1 + 6902 0010 1D00 movs r5, r3 + 6903 0012 0AA8 add r0, sp, #40 + ARM GAS /tmp/cc4IUqI9.s page 291 + + + 6904 .LVL500: +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6905 .loc 1 2974 1 view .LVU2267 + 6906 0014 02C8 ldmia r0!, {r1} + 6907 .LVL501: +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6908 .loc 1 2974 1 view .LVU2268 + 6909 0016 0088 ldrh r0, [r0] + 6910 .LVL502: +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6911 .loc 1 2975 3 is_stmt 1 view .LVU2269 +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6912 .loc 1 2978 3 view .LVU2270 +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6913 .loc 1 2980 3 view .LVU2271 +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6914 .loc 1 2980 11 is_stmt 0 view .LVU2272 + 6915 0018 4123 movs r3, #65 + 6916 .LVL503: +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6917 .loc 1 2980 11 view .LVU2273 + 6918 001a E35C ldrb r3, [r4, r3] +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6919 .loc 1 2980 6 view .LVU2274 + 6920 001c 202B cmp r3, #32 + 6921 001e 00D0 beq .LCB6552 + 6922 0020 84E0 b .L416 @long jump + 6923 .LCB6552: +2982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6924 .loc 1 2982 5 is_stmt 1 view .LVU2275 +2982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6925 .loc 1 2982 8 is_stmt 0 view .LVU2276 + 6926 0022 0029 cmp r1, #0 + 6927 0024 54D0 beq .L407 +2982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6928 .loc 1 2982 25 discriminator 1 view .LVU2277 + 6929 0026 0028 cmp r0, #0 + 6930 0028 52D0 beq .L407 +2988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6931 .loc 1 2988 5 is_stmt 1 view .LVU2278 +2988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6932 .loc 1 2988 9 is_stmt 0 view .LVU2279 + 6933 002a 2368 ldr r3, [r4] + 6934 002c 9946 mov r9, r3 + 6935 002e 9B69 ldr r3, [r3, #24] +2988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6936 .loc 1 2988 8 view .LVU2280 + 6937 0030 1B04 lsls r3, r3, #16 + 6938 0032 00D5 bpl .LCB6565 + 6939 0034 82E0 b .L417 @long jump + 6940 .LCB6565: +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6941 .loc 1 2994 5 is_stmt 1 view .LVU2281 +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6942 .loc 1 2994 5 view .LVU2282 + 6943 0036 4023 movs r3, #64 + 6944 0038 E35C ldrb r3, [r4, r3] + ARM GAS /tmp/cc4IUqI9.s page 292 + + + 6945 003a 012B cmp r3, #1 + 6946 003c 00D1 bne .LCB6571 + 6947 003e 7FE0 b .L418 @long jump + 6948 .LCB6571: +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6949 .loc 1 2994 5 discriminator 2 view .LVU2283 + 6950 0040 4023 movs r3, #64 + 6951 0042 9A46 mov r10, r3 + 6952 0044 3F3B subs r3, r3, #63 + 6953 0046 5746 mov r7, r10 + 6954 0048 E355 strb r3, [r4, r7] +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6955 .loc 1 2994 5 discriminator 2 view .LVU2284 +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6956 .loc 1 2996 5 view .LVU2285 +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6957 .loc 1 2996 23 is_stmt 0 view .LVU2286 + 6958 004a 4033 adds r3, r3, #64 + 6959 004c 9C46 mov ip, r3 + 6960 004e 203B subs r3, r3, #32 + 6961 0050 9846 mov r8, r3 + 6962 0052 6346 mov r3, ip + 6963 0054 4746 mov r7, r8 + 6964 0056 E754 strb r7, [r4, r3] +2997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6965 .loc 1 2997 5 is_stmt 1 view .LVU2287 +2997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6966 .loc 1 2997 23 is_stmt 0 view .LVU2288 + 6967 0058 0133 adds r3, r3, #1 + 6968 005a 5746 mov r7, r10 + 6969 005c E754 strb r7, [r4, r3] +2998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6970 .loc 1 2998 5 is_stmt 1 view .LVU2289 +2998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6971 .loc 1 2998 23 is_stmt 0 view .LVU2290 + 6972 005e 0023 movs r3, #0 + 6973 0060 6364 str r3, [r4, #68] +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6974 .loc 1 3001 5 is_stmt 1 view .LVU2291 +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6975 .loc 1 3001 23 is_stmt 0 view .LVU2292 + 6976 0062 6162 str r1, [r4, #36] +3002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6977 .loc 1 3002 5 is_stmt 1 view .LVU2293 +3002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6978 .loc 1 3002 23 is_stmt 0 view .LVU2294 + 6979 0064 6085 strh r0, [r4, #42] +3003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6980 .loc 1 3003 5 is_stmt 1 view .LVU2295 +3003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6981 .loc 1 3003 23 is_stmt 0 view .LVU2296 + 6982 0066 374B ldr r3, .L422 + 6983 0068 E362 str r3, [r4, #44] +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6984 .loc 1 3004 5 is_stmt 1 view .LVU2297 +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6985 .loc 1 3004 23 is_stmt 0 view .LVU2298 + ARM GAS /tmp/cc4IUqI9.s page 293 + + + 6986 006a 374B ldr r3, .L422+4 + 6987 006c 6363 str r3, [r4, #52] +3005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6988 .loc 1 3005 5 is_stmt 1 view .LVU2299 +3005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6989 .loc 1 3005 23 is_stmt 0 view .LVU2300 + 6990 006e E664 str r6, [r4, #76] +3007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6991 .loc 1 3007 5 is_stmt 1 view .LVU2301 +3007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6992 .loc 1 3007 13 is_stmt 0 view .LVU2302 + 6993 0070 638D ldrh r3, [r4, #42] + 6994 0072 9BB2 uxth r3, r3 +3007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6995 .loc 1 3007 8 view .LVU2303 + 6996 0074 FF2B cmp r3, #255 + 6997 0076 30D9 bls .L409 +3009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6998 .loc 1 3009 7 is_stmt 1 view .LVU2304 +3009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6999 .loc 1 3009 22 is_stmt 0 view .LVU2305 + 7000 0078 FF23 movs r3, #255 + 7001 007a 2385 strh r3, [r4, #40] + 7002 .L410: +3017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7003 .loc 1 3017 5 is_stmt 1 view .LVU2306 +3017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7004 .loc 1 3017 8 is_stmt 0 view .LVU2307 + 7005 007c 012D cmp r5, #1 + 7006 007e 2FD0 beq .L420 +3029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7007 .loc 1 3029 7 is_stmt 1 view .LVU2308 +3029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7008 .loc 1 3029 30 is_stmt 0 view .LVU2309 + 7009 0080 130A lsrs r3, r2, #8 +3029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7010 .loc 1 3029 28 view .LVU2310 + 7011 0082 4846 mov r0, r9 + 7012 0084 8362 str r3, [r0, #40] +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7013 .loc 1 3032 7 is_stmt 1 view .LVU2311 +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7014 .loc 1 3032 26 is_stmt 0 view .LVU2312 + 7015 0086 D2B2 uxtb r2, r2 + 7016 .LVL504: +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7017 .loc 1 3032 24 view .LVU2313 + 7018 0088 2265 str r2, [r4, #80] + 7019 .L412: +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7020 .loc 1 3035 5 is_stmt 1 view .LVU2314 +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7021 .loc 1 3035 13 is_stmt 0 view .LVU2315 + 7022 008a A36B ldr r3, [r4, #56] +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7023 .loc 1 3035 8 view .LVU2316 + 7024 008c 002B cmp r3, #0 + ARM GAS /tmp/cc4IUqI9.s page 294 + + + 7025 008e 2ED0 beq .L413 +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7026 .loc 1 3038 7 is_stmt 1 view .LVU2317 +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7027 .loc 1 3038 38 is_stmt 0 view .LVU2318 + 7028 0090 2E4A ldr r2, .L422+8 + 7029 0092 9A62 str r2, [r3, #40] +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7030 .loc 1 3041 7 is_stmt 1 view .LVU2319 +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7031 .loc 1 3041 11 is_stmt 0 view .LVU2320 + 7032 0094 A36B ldr r3, [r4, #56] +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7033 .loc 1 3041 39 view .LVU2321 + 7034 0096 2E4A ldr r2, .L422+12 + 7035 0098 1A63 str r2, [r3, #48] +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7036 .loc 1 3044 7 is_stmt 1 view .LVU2322 +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7037 .loc 1 3044 11 is_stmt 0 view .LVU2323 + 7038 009a A26B ldr r2, [r4, #56] +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7039 .loc 1 3044 42 view .LVU2324 + 7040 009c 0023 movs r3, #0 + 7041 009e D362 str r3, [r2, #44] +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7042 .loc 1 3045 7 is_stmt 1 view .LVU2325 +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7043 .loc 1 3045 11 is_stmt 0 view .LVU2326 + 7044 00a0 A26B ldr r2, [r4, #56] +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7045 .loc 1 3045 39 view .LVU2327 + 7046 00a2 5363 str r3, [r2, #52] +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7047 .loc 1 3048 7 is_stmt 1 view .LVU2328 +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7048 .loc 1 3048 86 is_stmt 0 view .LVU2329 + 7049 00a4 2268 ldr r2, [r4] +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7050 .loc 1 3048 81 view .LVU2330 + 7051 00a6 2832 adds r2, r2, #40 +3049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7052 .loc 1 3049 44 view .LVU2331 + 7053 00a8 238D ldrh r3, [r4, #40] +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7054 .loc 1 3048 23 view .LVU2332 + 7055 00aa A06B ldr r0, [r4, #56] + 7056 00ac FFF7FEFF bl HAL_DMA_Start_IT + 7057 .LVL505: + 7058 00b0 071E subs r7, r0, #0 + 7059 .LVL506: +3066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7060 .loc 1 3066 5 is_stmt 1 view .LVU2333 +3066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7061 .loc 1 3066 8 is_stmt 0 view .LVU2334 + 7062 00b2 2AD0 beq .L421 +3086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + ARM GAS /tmp/cc4IUqI9.s page 295 + + + 7063 .loc 1 3086 7 is_stmt 1 view .LVU2335 +3086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7064 .loc 1 3086 23 is_stmt 0 view .LVU2336 + 7065 00b4 4123 movs r3, #65 + 7066 00b6 2022 movs r2, #32 + 7067 00b8 E254 strb r2, [r4, r3] +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7068 .loc 1 3087 7 is_stmt 1 view .LVU2337 +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7069 .loc 1 3087 23 is_stmt 0 view .LVU2338 + 7070 00ba 0022 movs r2, #0 + 7071 00bc 0133 adds r3, r3, #1 + 7072 00be E254 strb r2, [r4, r3] +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7073 .loc 1 3090 7 is_stmt 1 view .LVU2339 +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7074 .loc 1 3090 11 is_stmt 0 view .LVU2340 + 7075 00c0 636C ldr r3, [r4, #68] +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7076 .loc 1 3090 23 view .LVU2341 + 7077 00c2 1021 movs r1, #16 + 7078 00c4 0B43 orrs r3, r1 + 7079 00c6 6364 str r3, [r4, #68] +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7080 .loc 1 3093 7 is_stmt 1 view .LVU2342 +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7081 .loc 1 3093 7 view .LVU2343 + 7082 00c8 4023 movs r3, #64 + 7083 00ca E254 strb r2, [r4, r3] +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7084 .loc 1 3093 7 view .LVU2344 +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7085 .loc 1 3095 7 view .LVU2345 +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7086 .loc 1 3095 14 is_stmt 0 view .LVU2346 + 7087 00cc 0127 movs r7, #1 + 7088 00ce 2EE0 b .L406 + 7089 .LVL507: + 7090 .L407: +2984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7091 .loc 1 2984 7 is_stmt 1 view .LVU2347 +2984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7092 .loc 1 2984 23 is_stmt 0 view .LVU2348 + 7093 00d0 8023 movs r3, #128 + 7094 00d2 9B00 lsls r3, r3, #2 + 7095 00d4 6364 str r3, [r4, #68] +2985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7096 .loc 1 2985 7 is_stmt 1 view .LVU2349 +2985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7097 .loc 1 2985 15 is_stmt 0 view .LVU2350 + 7098 00d6 0127 movs r7, #1 + 7099 00d8 29E0 b .L406 + 7100 .L409: +3013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7101 .loc 1 3013 7 is_stmt 1 view .LVU2351 +3013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7102 .loc 1 3013 28 is_stmt 0 view .LVU2352 + ARM GAS /tmp/cc4IUqI9.s page 296 + + + 7103 00da 638D ldrh r3, [r4, #42] +3013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7104 .loc 1 3013 22 view .LVU2353 + 7105 00dc 2385 strh r3, [r4, #40] + 7106 00de CDE7 b .L410 + 7107 .L420: +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7108 .loc 1 3020 7 is_stmt 1 view .LVU2354 +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7109 .loc 1 3020 30 is_stmt 0 view .LVU2355 + 7110 00e0 D2B2 uxtb r2, r2 + 7111 .LVL508: +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7112 .loc 1 3020 28 view .LVU2356 + 7113 00e2 4B46 mov r3, r9 + 7114 00e4 9A62 str r2, [r3, #40] +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7115 .loc 1 3023 7 is_stmt 1 view .LVU2357 +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7116 .loc 1 3023 24 is_stmt 0 view .LVU2358 + 7117 00e6 0123 movs r3, #1 + 7118 00e8 5B42 rsbs r3, r3, #0 + 7119 00ea 2365 str r3, [r4, #80] + 7120 00ec CDE7 b .L412 + 7121 .L413: +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7122 .loc 1 3054 7 is_stmt 1 view .LVU2359 +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7123 .loc 1 3054 23 is_stmt 0 view .LVU2360 + 7124 00ee 4123 movs r3, #65 + 7125 00f0 2022 movs r2, #32 + 7126 00f2 E254 strb r2, [r4, r3] +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7127 .loc 1 3055 7 is_stmt 1 view .LVU2361 +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7128 .loc 1 3055 23 is_stmt 0 view .LVU2362 + 7129 00f4 0022 movs r2, #0 + 7130 00f6 0133 adds r3, r3, #1 + 7131 00f8 E254 strb r2, [r4, r3] +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7132 .loc 1 3058 7 is_stmt 1 view .LVU2363 +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7133 .loc 1 3058 11 is_stmt 0 view .LVU2364 + 7134 00fa 636C ldr r3, [r4, #68] +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7135 .loc 1 3058 23 view .LVU2365 + 7136 00fc 8021 movs r1, #128 + 7137 00fe 0B43 orrs r3, r1 + 7138 0100 6364 str r3, [r4, #68] +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7139 .loc 1 3061 7 is_stmt 1 view .LVU2366 +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7140 .loc 1 3061 7 view .LVU2367 + 7141 0102 4023 movs r3, #64 + 7142 0104 E254 strb r2, [r4, r3] +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7143 .loc 1 3061 7 view .LVU2368 + ARM GAS /tmp/cc4IUqI9.s page 297 + + +3063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7144 .loc 1 3063 7 view .LVU2369 +3063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7145 .loc 1 3063 14 is_stmt 0 view .LVU2370 + 7146 0106 0127 movs r7, #1 + 7147 0108 11E0 b .L406 + 7148 .LVL509: + 7149 .L421: +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7150 .loc 1 3069 7 is_stmt 1 view .LVU2371 + 7151 010a 8023 movs r3, #128 + 7152 010c EAB2 uxtb r2, r5 + 7153 010e 1149 ldr r1, .L422+16 + 7154 0110 0091 str r1, [sp] + 7155 0112 5B04 lsls r3, r3, #17 + 7156 0114 3100 movs r1, r6 + 7157 0116 2000 movs r0, r4 + 7158 .LVL510: +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7159 .loc 1 3069 7 is_stmt 0 view .LVU2372 + 7160 0118 FFF7FEFF bl I2C_TransferConfig + 7161 .LVL511: +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7162 .loc 1 3072 7 is_stmt 1 view .LVU2373 +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7163 .loc 1 3072 7 view .LVU2374 + 7164 011c 4023 movs r3, #64 + 7165 011e 0022 movs r2, #0 + 7166 0120 E254 strb r2, [r4, r3] +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7167 .loc 1 3072 7 view .LVU2375 +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7168 .loc 1 3081 7 view .LVU2376 + 7169 0122 0121 movs r1, #1 + 7170 0124 2000 movs r0, r4 + 7171 0126 FFF7FEFF bl I2C_Enable_IRQ + 7172 .LVL512: +3098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7173 .loc 1 3098 5 view .LVU2377 +3098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7174 .loc 1 3098 12 is_stmt 0 view .LVU2378 + 7175 012a 00E0 b .L406 + 7176 .LVL513: + 7177 .L416: +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7178 .loc 1 3102 12 view .LVU2379 + 7179 012c 0227 movs r7, #2 + 7180 .LVL514: + 7181 .L406: +3104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7182 .loc 1 3104 1 view .LVU2380 + 7183 012e 3800 movs r0, r7 + 7184 0130 02B0 add sp, sp, #8 + 7185 @ sp needed + 7186 .LVL515: + 7187 .LVL516: + 7188 .LVL517: + ARM GAS /tmp/cc4IUqI9.s page 298 + + +3104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7189 .loc 1 3104 1 view .LVU2381 + 7190 0132 E0BC pop {r5, r6, r7} + 7191 0134 BA46 mov r10, r7 + 7192 0136 B146 mov r9, r6 + 7193 0138 A846 mov r8, r5 + 7194 013a F0BD pop {r4, r5, r6, r7, pc} + 7195 .LVL518: + 7196 .L417: +2990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7197 .loc 1 2990 14 view .LVU2382 + 7198 013c 0227 movs r7, #2 + 7199 013e F6E7 b .L406 + 7200 .L418: +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7201 .loc 1 2994 5 discriminator 1 view .LVU2383 + 7202 0140 0227 movs r7, #2 + 7203 0142 F4E7 b .L406 + 7204 .L423: + 7205 .align 2 + 7206 .L422: + 7207 0144 0000FFFF .word -65536 + 7208 0148 00000000 .word I2C_Mem_ISR_DMA + 7209 014c 00000000 .word I2C_DMAMasterTransmitCplt + 7210 0150 00000000 .word I2C_DMAError + 7211 0154 00200080 .word -2147475456 + 7212 .cfi_endproc + 7213 .LFE60: + 7215 .section .text.HAL_I2C_Mem_Read_DMA,"ax",%progbits + 7216 .align 1 + 7217 .global HAL_I2C_Mem_Read_DMA + 7218 .syntax unified + 7219 .code 16 + 7220 .thumb_func + 7222 HAL_I2C_Mem_Read_DMA: + 7223 .LVL519: + 7224 .LFB61: +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7225 .loc 1 3120 1 is_stmt 1 view -0 + 7226 .cfi_startproc + 7227 @ args = 8, pretend = 0, frame = 0 + 7228 @ frame_needed = 0, uses_anonymous_args = 0 +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7229 .loc 1 3120 1 is_stmt 0 view .LVU2385 + 7230 0000 F0B5 push {r4, r5, r6, r7, lr} + 7231 .cfi_def_cfa_offset 20 + 7232 .cfi_offset 4, -20 + 7233 .cfi_offset 5, -16 + 7234 .cfi_offset 6, -12 + 7235 .cfi_offset 7, -8 + 7236 .cfi_offset 14, -4 + 7237 0002 D646 mov lr, r10 + 7238 0004 4F46 mov r7, r9 + 7239 0006 4646 mov r6, r8 + 7240 0008 C0B5 push {r6, r7, lr} + 7241 .cfi_def_cfa_offset 32 + 7242 .cfi_offset 8, -32 + ARM GAS /tmp/cc4IUqI9.s page 299 + + + 7243 .cfi_offset 9, -28 + 7244 .cfi_offset 10, -24 + 7245 000a 82B0 sub sp, sp, #8 + 7246 .cfi_def_cfa_offset 40 + 7247 000c 0400 movs r4, r0 + 7248 000e 0E00 movs r6, r1 + 7249 0010 1100 movs r1, r2 + 7250 .LVL520: +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7251 .loc 1 3120 1 view .LVU2386 + 7252 0012 1D00 movs r5, r3 + 7253 0014 0AA8 add r0, sp, #40 + 7254 .LVL521: +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7255 .loc 1 3120 1 view .LVU2387 + 7256 0016 04C8 ldmia r0!, {r2} + 7257 .LVL522: +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7258 .loc 1 3120 1 view .LVU2388 + 7259 0018 0088 ldrh r0, [r0] + 7260 .LVL523: +3121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7261 .loc 1 3121 3 is_stmt 1 view .LVU2389 +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7262 .loc 1 3124 3 view .LVU2390 +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7263 .loc 1 3126 3 view .LVU2391 +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7264 .loc 1 3126 11 is_stmt 0 view .LVU2392 + 7265 001a 4123 movs r3, #65 + 7266 .LVL524: +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7267 .loc 1 3126 11 view .LVU2393 + 7268 001c E35C ldrb r3, [r4, r3] +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7269 .loc 1 3126 6 view .LVU2394 + 7270 001e 202B cmp r3, #32 + 7271 0020 00D0 beq .LCB6885 + 7272 0022 83E0 b .L435 @long jump + 7273 .LCB6885: +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7274 .loc 1 3128 5 is_stmt 1 view .LVU2395 +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7275 .loc 1 3128 8 is_stmt 0 view .LVU2396 + 7276 0024 002A cmp r2, #0 + 7277 0026 54D0 beq .L426 +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7278 .loc 1 3128 25 discriminator 1 view .LVU2397 + 7279 0028 0028 cmp r0, #0 + 7280 002a 52D0 beq .L426 +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7281 .loc 1 3134 5 is_stmt 1 view .LVU2398 +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7282 .loc 1 3134 9 is_stmt 0 view .LVU2399 + 7283 002c 2368 ldr r3, [r4] + 7284 002e 9946 mov r9, r3 + 7285 0030 9B69 ldr r3, [r3, #24] + ARM GAS /tmp/cc4IUqI9.s page 300 + + +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7286 .loc 1 3134 8 view .LVU2400 + 7287 0032 1B04 lsls r3, r3, #16 + 7288 0034 00D5 bpl .LCB6898 + 7289 0036 81E0 b .L436 @long jump + 7290 .LCB6898: +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7291 .loc 1 3140 5 is_stmt 1 view .LVU2401 +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7292 .loc 1 3140 5 view .LVU2402 + 7293 0038 4023 movs r3, #64 + 7294 003a E35C ldrb r3, [r4, r3] + 7295 003c 012B cmp r3, #1 + 7296 003e 00D1 bne .LCB6904 + 7297 0040 7EE0 b .L437 @long jump + 7298 .LCB6904: +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7299 .loc 1 3140 5 discriminator 2 view .LVU2403 + 7300 0042 4023 movs r3, #64 + 7301 0044 9A46 mov r10, r3 + 7302 0046 3F3B subs r3, r3, #63 + 7303 0048 5746 mov r7, r10 + 7304 004a E355 strb r3, [r4, r7] +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7305 .loc 1 3140 5 discriminator 2 view .LVU2404 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 7306 .loc 1 3142 5 view .LVU2405 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 7307 .loc 1 3142 23 is_stmt 0 view .LVU2406 + 7308 004c 4033 adds r3, r3, #64 + 7309 004e 9C46 mov ip, r3 + 7310 0050 1F3B subs r3, r3, #31 + 7311 0052 9846 mov r8, r3 + 7312 0054 6346 mov r3, ip + 7313 0056 4746 mov r7, r8 + 7314 0058 E754 strb r7, [r4, r3] +3143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7315 .loc 1 3143 5 is_stmt 1 view .LVU2407 +3143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7316 .loc 1 3143 23 is_stmt 0 view .LVU2408 + 7317 005a 0133 adds r3, r3, #1 + 7318 005c 5746 mov r7, r10 + 7319 005e E754 strb r7, [r4, r3] +3144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7320 .loc 1 3144 5 is_stmt 1 view .LVU2409 +3144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7321 .loc 1 3144 23 is_stmt 0 view .LVU2410 + 7322 0060 0023 movs r3, #0 + 7323 0062 6364 str r3, [r4, #68] +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7324 .loc 1 3147 5 is_stmt 1 view .LVU2411 +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7325 .loc 1 3147 23 is_stmt 0 view .LVU2412 + 7326 0064 6262 str r2, [r4, #36] +3148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 7327 .loc 1 3148 5 is_stmt 1 view .LVU2413 +3148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + ARM GAS /tmp/cc4IUqI9.s page 301 + + + 7328 .loc 1 3148 23 is_stmt 0 view .LVU2414 + 7329 0066 6085 strh r0, [r4, #42] +3149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 7330 .loc 1 3149 5 is_stmt 1 view .LVU2415 +3149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 7331 .loc 1 3149 23 is_stmt 0 view .LVU2416 + 7332 0068 364B ldr r3, .L441 + 7333 006a E362 str r3, [r4, #44] +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 7334 .loc 1 3150 5 is_stmt 1 view .LVU2417 +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 7335 .loc 1 3150 23 is_stmt 0 view .LVU2418 + 7336 006c 364B ldr r3, .L441+4 + 7337 006e 6363 str r3, [r4, #52] +3151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7338 .loc 1 3151 5 is_stmt 1 view .LVU2419 +3151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7339 .loc 1 3151 23 is_stmt 0 view .LVU2420 + 7340 0070 E664 str r6, [r4, #76] +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7341 .loc 1 3153 5 is_stmt 1 view .LVU2421 +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7342 .loc 1 3153 13 is_stmt 0 view .LVU2422 + 7343 0072 638D ldrh r3, [r4, #42] + 7344 0074 9BB2 uxth r3, r3 +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7345 .loc 1 3153 8 view .LVU2423 + 7346 0076 FF2B cmp r3, #255 + 7347 0078 30D9 bls .L428 +3155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7348 .loc 1 3155 7 is_stmt 1 view .LVU2424 +3155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7349 .loc 1 3155 22 is_stmt 0 view .LVU2425 + 7350 007a FF23 movs r3, #255 + 7351 007c 2385 strh r3, [r4, #40] + 7352 .L429: +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7353 .loc 1 3163 5 is_stmt 1 view .LVU2426 +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7354 .loc 1 3163 8 is_stmt 0 view .LVU2427 + 7355 007e 012D cmp r5, #1 + 7356 0080 2FD0 beq .L439 +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7357 .loc 1 3175 7 is_stmt 1 view .LVU2428 +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7358 .loc 1 3175 30 is_stmt 0 view .LVU2429 + 7359 0082 0B0A lsrs r3, r1, #8 +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7360 .loc 1 3175 28 view .LVU2430 + 7361 0084 4846 mov r0, r9 + 7362 0086 8362 str r3, [r0, #40] +3178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7363 .loc 1 3178 7 is_stmt 1 view .LVU2431 +3178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7364 .loc 1 3178 26 is_stmt 0 view .LVU2432 + 7365 0088 C9B2 uxtb r1, r1 + 7366 .LVL525: + ARM GAS /tmp/cc4IUqI9.s page 302 + + +3178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7367 .loc 1 3178 24 view .LVU2433 + 7368 008a 2165 str r1, [r4, #80] + 7369 .L431: +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7370 .loc 1 3181 5 is_stmt 1 view .LVU2434 +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7371 .loc 1 3181 13 is_stmt 0 view .LVU2435 + 7372 008c E36B ldr r3, [r4, #60] +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7373 .loc 1 3181 8 view .LVU2436 + 7374 008e 002B cmp r3, #0 + 7375 0090 2ED0 beq .L432 +3184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7376 .loc 1 3184 7 is_stmt 1 view .LVU2437 +3184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7377 .loc 1 3184 38 is_stmt 0 view .LVU2438 + 7378 0092 2E49 ldr r1, .L441+8 + 7379 0094 9962 str r1, [r3, #40] +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7380 .loc 1 3187 7 is_stmt 1 view .LVU2439 +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7381 .loc 1 3187 11 is_stmt 0 view .LVU2440 + 7382 0096 E36B ldr r3, [r4, #60] +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7383 .loc 1 3187 39 view .LVU2441 + 7384 0098 2D49 ldr r1, .L441+12 + 7385 009a 1963 str r1, [r3, #48] +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7386 .loc 1 3190 7 is_stmt 1 view .LVU2442 +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7387 .loc 1 3190 11 is_stmt 0 view .LVU2443 + 7388 009c E16B ldr r1, [r4, #60] +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7389 .loc 1 3190 42 view .LVU2444 + 7390 009e 0023 movs r3, #0 + 7391 00a0 CB62 str r3, [r1, #44] +3191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7392 .loc 1 3191 7 is_stmt 1 view .LVU2445 +3191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7393 .loc 1 3191 11 is_stmt 0 view .LVU2446 + 7394 00a2 E16B ldr r1, [r4, #60] +3191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7395 .loc 1 3191 39 view .LVU2447 + 7396 00a4 4B63 str r3, [r1, #52] +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7397 .loc 1 3194 7 is_stmt 1 view .LVU2448 +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7398 .loc 1 3194 69 is_stmt 0 view .LVU2449 + 7399 00a6 2168 ldr r1, [r4] +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7400 .loc 1 3194 64 view .LVU2450 + 7401 00a8 2431 adds r1, r1, #36 +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7402 .loc 1 3195 44 view .LVU2451 + 7403 00aa 238D ldrh r3, [r4, #40] +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + ARM GAS /tmp/cc4IUqI9.s page 303 + + + 7404 .loc 1 3194 23 view .LVU2452 + 7405 00ac E06B ldr r0, [r4, #60] + 7406 00ae FFF7FEFF bl HAL_DMA_Start_IT + 7407 .LVL526: + 7408 00b2 071E subs r7, r0, #0 + 7409 .LVL527: +3212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7410 .loc 1 3212 5 is_stmt 1 view .LVU2453 +3212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7411 .loc 1 3212 8 is_stmt 0 view .LVU2454 + 7412 00b4 2AD0 beq .L440 +3232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7413 .loc 1 3232 7 is_stmt 1 view .LVU2455 +3232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7414 .loc 1 3232 23 is_stmt 0 view .LVU2456 + 7415 00b6 4123 movs r3, #65 + 7416 00b8 2022 movs r2, #32 + 7417 00ba E254 strb r2, [r4, r3] +3233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7418 .loc 1 3233 7 is_stmt 1 view .LVU2457 +3233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7419 .loc 1 3233 23 is_stmt 0 view .LVU2458 + 7420 00bc 0022 movs r2, #0 + 7421 00be 0133 adds r3, r3, #1 + 7422 00c0 E254 strb r2, [r4, r3] +3236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7423 .loc 1 3236 7 is_stmt 1 view .LVU2459 +3236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7424 .loc 1 3236 11 is_stmt 0 view .LVU2460 + 7425 00c2 636C ldr r3, [r4, #68] +3236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7426 .loc 1 3236 23 view .LVU2461 + 7427 00c4 1021 movs r1, #16 + 7428 00c6 0B43 orrs r3, r1 + 7429 00c8 6364 str r3, [r4, #68] +3239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7430 .loc 1 3239 7 is_stmt 1 view .LVU2462 +3239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7431 .loc 1 3239 7 view .LVU2463 + 7432 00ca 4023 movs r3, #64 + 7433 00cc E254 strb r2, [r4, r3] +3239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7434 .loc 1 3239 7 view .LVU2464 +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7435 .loc 1 3241 7 view .LVU2465 +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7436 .loc 1 3241 14 is_stmt 0 view .LVU2466 + 7437 00ce 0127 movs r7, #1 + 7438 00d0 2DE0 b .L425 + 7439 .LVL528: + 7440 .L426: +3130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7441 .loc 1 3130 7 is_stmt 1 view .LVU2467 +3130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7442 .loc 1 3130 23 is_stmt 0 view .LVU2468 + 7443 00d2 8023 movs r3, #128 + 7444 00d4 9B00 lsls r3, r3, #2 + ARM GAS /tmp/cc4IUqI9.s page 304 + + + 7445 00d6 6364 str r3, [r4, #68] +3131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7446 .loc 1 3131 7 is_stmt 1 view .LVU2469 +3131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7447 .loc 1 3131 15 is_stmt 0 view .LVU2470 + 7448 00d8 0127 movs r7, #1 + 7449 00da 28E0 b .L425 + 7450 .L428: +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7451 .loc 1 3159 7 is_stmt 1 view .LVU2471 +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7452 .loc 1 3159 28 is_stmt 0 view .LVU2472 + 7453 00dc 638D ldrh r3, [r4, #42] +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7454 .loc 1 3159 22 view .LVU2473 + 7455 00de 2385 strh r3, [r4, #40] + 7456 00e0 CDE7 b .L429 + 7457 .L439: +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7458 .loc 1 3166 7 is_stmt 1 view .LVU2474 +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7459 .loc 1 3166 30 is_stmt 0 view .LVU2475 + 7460 00e2 C9B2 uxtb r1, r1 +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7461 .loc 1 3166 28 view .LVU2476 + 7462 00e4 4B46 mov r3, r9 + 7463 00e6 9962 str r1, [r3, #40] +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7464 .loc 1 3169 7 is_stmt 1 view .LVU2477 +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7465 .loc 1 3169 24 is_stmt 0 view .LVU2478 + 7466 00e8 0123 movs r3, #1 + 7467 00ea 5B42 rsbs r3, r3, #0 + 7468 00ec 2365 str r3, [r4, #80] + 7469 00ee CDE7 b .L431 + 7470 .L432: +3200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7471 .loc 1 3200 7 is_stmt 1 view .LVU2479 +3200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7472 .loc 1 3200 23 is_stmt 0 view .LVU2480 + 7473 00f0 4123 movs r3, #65 + 7474 00f2 2022 movs r2, #32 + 7475 00f4 E254 strb r2, [r4, r3] +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7476 .loc 1 3201 7 is_stmt 1 view .LVU2481 +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7477 .loc 1 3201 23 is_stmt 0 view .LVU2482 + 7478 00f6 0022 movs r2, #0 + 7479 00f8 0133 adds r3, r3, #1 + 7480 00fa E254 strb r2, [r4, r3] +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7481 .loc 1 3204 7 is_stmt 1 view .LVU2483 +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7482 .loc 1 3204 11 is_stmt 0 view .LVU2484 + 7483 00fc 636C ldr r3, [r4, #68] +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7484 .loc 1 3204 23 view .LVU2485 + ARM GAS /tmp/cc4IUqI9.s page 305 + + + 7485 00fe 8021 movs r1, #128 + 7486 0100 0B43 orrs r3, r1 + 7487 0102 6364 str r3, [r4, #68] +3207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7488 .loc 1 3207 7 is_stmt 1 view .LVU2486 +3207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7489 .loc 1 3207 7 view .LVU2487 + 7490 0104 4023 movs r3, #64 + 7491 0106 E254 strb r2, [r4, r3] +3207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7492 .loc 1 3207 7 view .LVU2488 +3209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7493 .loc 1 3209 7 view .LVU2489 +3209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7494 .loc 1 3209 14 is_stmt 0 view .LVU2490 + 7495 0108 0127 movs r7, #1 + 7496 010a 10E0 b .L425 + 7497 .LVL529: + 7498 .L440: +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7499 .loc 1 3215 7 is_stmt 1 view .LVU2491 + 7500 010c EAB2 uxtb r2, r5 + 7501 010e 114B ldr r3, .L441+16 + 7502 0110 0093 str r3, [sp] + 7503 0112 0023 movs r3, #0 + 7504 0114 3100 movs r1, r6 + 7505 0116 2000 movs r0, r4 + 7506 .LVL530: +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7507 .loc 1 3215 7 is_stmt 0 view .LVU2492 + 7508 0118 FFF7FEFF bl I2C_TransferConfig + 7509 .LVL531: +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7510 .loc 1 3218 7 is_stmt 1 view .LVU2493 +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7511 .loc 1 3218 7 view .LVU2494 + 7512 011c 4023 movs r3, #64 + 7513 011e 0022 movs r2, #0 + 7514 0120 E254 strb r2, [r4, r3] +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7515 .loc 1 3218 7 view .LVU2495 +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7516 .loc 1 3227 7 view .LVU2496 + 7517 0122 0121 movs r1, #1 + 7518 0124 2000 movs r0, r4 + 7519 0126 FFF7FEFF bl I2C_Enable_IRQ + 7520 .LVL532: +3244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7521 .loc 1 3244 5 view .LVU2497 +3244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7522 .loc 1 3244 12 is_stmt 0 view .LVU2498 + 7523 012a 00E0 b .L425 + 7524 .LVL533: + 7525 .L435: +3248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7526 .loc 1 3248 12 view .LVU2499 + 7527 012c 0227 movs r7, #2 + ARM GAS /tmp/cc4IUqI9.s page 306 + + + 7528 .L425: +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7529 .loc 1 3250 1 view .LVU2500 + 7530 012e 3800 movs r0, r7 + 7531 0130 02B0 add sp, sp, #8 + 7532 @ sp needed + 7533 .LVL534: + 7534 .LVL535: + 7535 .LVL536: +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7536 .loc 1 3250 1 view .LVU2501 + 7537 0132 E0BC pop {r5, r6, r7} + 7538 0134 BA46 mov r10, r7 + 7539 0136 B146 mov r9, r6 + 7540 0138 A846 mov r8, r5 + 7541 013a F0BD pop {r4, r5, r6, r7, pc} + 7542 .LVL537: + 7543 .L436: +3136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7544 .loc 1 3136 14 view .LVU2502 + 7545 013c 0227 movs r7, #2 + 7546 013e F6E7 b .L425 + 7547 .L437: +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7548 .loc 1 3140 5 discriminator 1 view .LVU2503 + 7549 0140 0227 movs r7, #2 + 7550 0142 F4E7 b .L425 + 7551 .L442: + 7552 .align 2 + 7553 .L441: + 7554 0144 0000FFFF .word -65536 + 7555 0148 00000000 .word I2C_Mem_ISR_DMA + 7556 014c 00000000 .word I2C_DMAMasterReceiveCplt + 7557 0150 00000000 .word I2C_DMAError + 7558 0154 00200080 .word -2147475456 + 7559 .cfi_endproc + 7560 .LFE61: + 7562 .section .text.HAL_I2C_IsDeviceReady,"ax",%progbits + 7563 .align 1 + 7564 .global HAL_I2C_IsDeviceReady + 7565 .syntax unified + 7566 .code 16 + 7567 .thumb_func + 7569 HAL_I2C_IsDeviceReady: + 7570 .LVL538: + 7571 .LFB62: +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 7572 .loc 1 3265 1 is_stmt 1 view -0 + 7573 .cfi_startproc + 7574 @ args = 0, pretend = 0, frame = 16 + 7575 @ frame_needed = 0, uses_anonymous_args = 0 +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 7576 .loc 1 3265 1 is_stmt 0 view .LVU2505 + 7577 0000 F0B5 push {r4, r5, r6, r7, lr} + 7578 .cfi_def_cfa_offset 20 + 7579 .cfi_offset 4, -20 + 7580 .cfi_offset 5, -16 + ARM GAS /tmp/cc4IUqI9.s page 307 + + + 7581 .cfi_offset 6, -12 + 7582 .cfi_offset 7, -8 + 7583 .cfi_offset 14, -4 + 7584 0002 CE46 mov lr, r9 + 7585 0004 00B5 push {lr} + 7586 .cfi_def_cfa_offset 24 + 7587 .cfi_offset 9, -24 + 7588 0006 86B0 sub sp, sp, #24 + 7589 .cfi_def_cfa_offset 48 + 7590 0008 0700 movs r7, r0 + 7591 000a 8946 mov r9, r1 + 7592 000c 0392 str r2, [sp, #12] + 7593 000e 1E00 movs r6, r3 +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7594 .loc 1 3266 3 is_stmt 1 view .LVU2506 +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7595 .loc 1 3268 3 view .LVU2507 +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7596 .loc 1 3268 17 is_stmt 0 view .LVU2508 + 7597 0010 0023 movs r3, #0 + 7598 .LVL539: +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7599 .loc 1 3268 17 view .LVU2509 + 7600 0012 0593 str r3, [sp, #20] +3270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp2; + 7601 .loc 1 3270 3 is_stmt 1 view .LVU2510 +3271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7602 .loc 1 3271 3 view .LVU2511 +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7603 .loc 1 3273 3 view .LVU2512 +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7604 .loc 1 3273 11 is_stmt 0 view .LVU2513 + 7605 0014 4133 adds r3, r3, #65 + 7606 0016 C35C ldrb r3, [r0, r3] +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7607 .loc 1 3273 6 view .LVU2514 + 7608 0018 202B cmp r3, #32 + 7609 001a 00D0 beq .LCB7198 + 7610 001c 8FE0 b .L453 @long jump + 7611 .LCB7198: +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7612 .loc 1 3275 5 is_stmt 1 view .LVU2515 +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7613 .loc 1 3275 9 is_stmt 0 view .LVU2516 + 7614 001e 0368 ldr r3, [r0] + 7615 0020 9B69 ldr r3, [r3, #24] +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7616 .loc 1 3275 8 view .LVU2517 + 7617 0022 1B04 lsls r3, r3, #16 + 7618 0024 00D5 bpl .LCB7205 + 7619 0026 8CE0 b .L454 @long jump + 7620 .LCB7205: +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7621 .loc 1 3281 5 is_stmt 1 view .LVU2518 +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7622 .loc 1 3281 5 view .LVU2519 + 7623 0028 4023 movs r3, #64 + ARM GAS /tmp/cc4IUqI9.s page 308 + + + 7624 002a C35C ldrb r3, [r0, r3] + 7625 002c 012B cmp r3, #1 + 7626 002e 00D1 bne .LCB7211 + 7627 0030 89E0 b .L455 @long jump + 7628 .LCB7211: +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7629 .loc 1 3281 5 discriminator 2 view .LVU2520 + 7630 0032 4023 movs r3, #64 + 7631 0034 0122 movs r2, #1 + 7632 .LVL540: +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7633 .loc 1 3281 5 is_stmt 0 discriminator 2 view .LVU2521 + 7634 0036 C254 strb r2, [r0, r3] +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7635 .loc 1 3281 5 is_stmt 1 discriminator 2 view .LVU2522 +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7636 .loc 1 3283 5 view .LVU2523 +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7637 .loc 1 3283 17 is_stmt 0 view .LVU2524 + 7638 0038 0133 adds r3, r3, #1 + 7639 003a 2332 adds r2, r2, #35 + 7640 003c C254 strb r2, [r0, r3] +3284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7641 .loc 1 3284 5 is_stmt 1 view .LVU2525 +3284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7642 .loc 1 3284 21 is_stmt 0 view .LVU2526 + 7643 003e 0023 movs r3, #0 + 7644 0040 4364 str r3, [r0, #68] + 7645 .LVL541: + 7646 .L452: +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7647 .loc 1 3286 5 is_stmt 1 view .LVU2527 +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7648 .loc 1 3289 7 view .LVU2528 +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7649 .loc 1 3289 29 is_stmt 0 view .LVU2529 + 7650 0042 FB68 ldr r3, [r7, #12] + 7651 0044 012B cmp r3, #1 + 7652 0046 17D0 beq .L459 +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7653 .loc 1 3289 29 discriminator 2 view .LVU2530 + 7654 0048 4B46 mov r3, r9 + 7655 004a 9A05 lsls r2, r3, #22 + 7656 004c 920D lsrs r2, r2, #22 + 7657 004e 414B ldr r3, .L462 + 7658 0050 1343 orrs r3, r2 + 7659 .L446: +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7660 .loc 1 3289 11 discriminator 4 view .LVU2531 + 7661 0052 3A68 ldr r2, [r7] +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7662 .loc 1 3289 27 discriminator 4 view .LVU2532 + 7663 0054 5360 str r3, [r2, #4] +3293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7664 .loc 1 3293 7 is_stmt 1 view .LVU2533 +3293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7665 .loc 1 3293 19 is_stmt 0 view .LVU2534 + ARM GAS /tmp/cc4IUqI9.s page 309 + + + 7666 0056 FFF7FEFF bl HAL_GetTick + 7667 .LVL542: + 7668 005a 0500 movs r5, r0 + 7669 .LVL543: +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7670 .loc 1 3295 7 is_stmt 1 view .LVU2535 +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7671 .loc 1 3295 14 is_stmt 0 view .LVU2536 + 7672 005c 3A68 ldr r2, [r7] + 7673 005e 9169 ldr r1, [r2, #24] + 7674 0060 2023 movs r3, #32 + 7675 0062 0B40 ands r3, r1 + 7676 0064 591E subs r1, r3, #1 + 7677 0066 8B41 sbcs r3, r3, r1 + 7678 0068 DBB2 uxtb r3, r3 + 7679 .LVL544: +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7680 .loc 1 3296 7 is_stmt 1 view .LVU2537 +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7681 .loc 1 3296 14 is_stmt 0 view .LVU2538 + 7682 006a 9269 ldr r2, [r2, #24] + 7683 006c 1024 movs r4, #16 + 7684 006e 1440 ands r4, r2 + 7685 0070 621E subs r2, r4, #1 + 7686 0072 9441 sbcs r4, r4, r2 + 7687 0074 E4B2 uxtb r4, r4 + 7688 .LVL545: +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7689 .loc 1 3298 7 is_stmt 1 view .LVU2539 +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7690 .loc 1 3298 13 is_stmt 0 view .LVU2540 + 7691 0076 12E0 b .L447 + 7692 .LVL546: + 7693 .L459: +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7694 .loc 1 3289 29 discriminator 1 view .LVU2541 + 7695 0078 4B46 mov r3, r9 + 7696 007a 9A05 lsls r2, r3, #22 + 7697 007c 920D lsrs r2, r2, #22 + 7698 007e 364B ldr r3, .L462+4 + 7699 0080 1343 orrs r3, r2 + 7700 0082 E6E7 b .L446 + 7701 .LVL547: + 7702 .L448: +3317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7703 .loc 1 3317 9 is_stmt 1 view .LVU2542 +3317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7704 .loc 1 3317 16 is_stmt 0 view .LVU2543 + 7705 0084 3A68 ldr r2, [r7] + 7706 0086 9169 ldr r1, [r2, #24] + 7707 0088 2023 movs r3, #32 + 7708 008a 0B40 ands r3, r1 + 7709 008c 591E subs r1, r3, #1 + 7710 008e 8B41 sbcs r3, r3, r1 + 7711 0090 DBB2 uxtb r3, r3 + 7712 .LVL548: +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 310 + + + 7713 .loc 1 3318 9 is_stmt 1 view .LVU2544 +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7714 .loc 1 3318 16 is_stmt 0 view .LVU2545 + 7715 0092 9269 ldr r2, [r2, #24] + 7716 0094 1024 movs r4, #16 + 7717 0096 1440 ands r4, r2 + 7718 0098 621E subs r2, r4, #1 + 7719 009a 9441 sbcs r4, r4, r2 + 7720 009c E4B2 uxtb r4, r4 + 7721 .LVL549: + 7722 .L447: +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7723 .loc 1 3298 30 is_stmt 1 view .LVU2546 + 7724 009e 1C43 orrs r4, r3 + 7725 .LVL550: +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7726 .loc 1 3298 30 is_stmt 0 view .LVU2547 + 7727 00a0 16D1 bne .L460 +3300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7728 .loc 1 3300 9 is_stmt 1 view .LVU2548 +3300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7729 .loc 1 3300 12 is_stmt 0 view .LVU2549 + 7730 00a2 731C adds r3, r6, #1 + 7731 00a4 EED0 beq .L448 + 7732 .LVL551: +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7733 .loc 1 3302 11 is_stmt 1 view .LVU2550 +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7734 .loc 1 3302 17 is_stmt 0 view .LVU2551 + 7735 00a6 FFF7FEFF bl HAL_GetTick + 7736 .LVL552: +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7737 .loc 1 3302 31 discriminator 1 view .LVU2552 + 7738 00aa 401B subs r0, r0, r5 +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7739 .loc 1 3302 14 discriminator 1 view .LVU2553 + 7740 00ac B042 cmp r0, r6 + 7741 00ae 01D8 bhi .L449 +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7742 .loc 1 3302 55 discriminator 1 view .LVU2554 + 7743 00b0 002E cmp r6, #0 + 7744 00b2 E7D1 bne .L448 + 7745 .L449: +3305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7746 .loc 1 3305 13 is_stmt 1 view .LVU2555 +3305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7747 .loc 1 3305 25 is_stmt 0 view .LVU2556 + 7748 00b4 2022 movs r2, #32 + 7749 00b6 4123 movs r3, #65 + 7750 00b8 FA54 strb r2, [r7, r3] +3308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7751 .loc 1 3308 13 is_stmt 1 view .LVU2557 +3308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7752 .loc 1 3308 17 is_stmt 0 view .LVU2558 + 7753 00ba 7B6C ldr r3, [r7, #68] +3308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7754 .loc 1 3308 29 view .LVU2559 + ARM GAS /tmp/cc4IUqI9.s page 311 + + + 7755 00bc 1343 orrs r3, r2 + 7756 00be 7B64 str r3, [r7, #68] +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7757 .loc 1 3311 13 is_stmt 1 view .LVU2560 +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7758 .loc 1 3311 13 view .LVU2561 + 7759 00c0 4023 movs r3, #64 + 7760 00c2 0022 movs r2, #0 + 7761 00c4 FA54 strb r2, [r7, r3] +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7762 .loc 1 3311 13 view .LVU2562 +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7763 .loc 1 3313 13 view .LVU2563 +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7764 .loc 1 3313 20 is_stmt 0 view .LVU2564 + 7765 00c6 0120 movs r0, #1 + 7766 .LVL553: + 7767 .L444: +3375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7768 .loc 1 3375 1 view .LVU2565 + 7769 00c8 06B0 add sp, sp, #24 + 7770 @ sp needed + 7771 .LVL554: + 7772 .LVL555: + 7773 .LVL556: +3375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7774 .loc 1 3375 1 view .LVU2566 + 7775 00ca 80BC pop {r7} + 7776 00cc B946 mov r9, r7 + 7777 00ce F0BD pop {r4, r5, r6, r7, pc} + 7778 .LVL557: + 7779 .L460: +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7780 .loc 1 3322 7 is_stmt 1 view .LVU2567 +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7781 .loc 1 3322 11 is_stmt 0 view .LVU2568 + 7782 00d0 3B68 ldr r3, [r7] + 7783 .LVL558: +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7784 .loc 1 3322 11 view .LVU2569 + 7785 00d2 9B69 ldr r3, [r3, #24] +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7786 .loc 1 3322 10 view .LVU2570 + 7787 00d4 DB06 lsls r3, r3, #27 + 7788 00d6 20D5 bpl .L461 +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7789 .loc 1 3344 9 is_stmt 1 view .LVU2571 +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7790 .loc 1 3344 13 is_stmt 0 view .LVU2572 + 7791 00d8 0095 str r5, [sp] + 7792 00da 3300 movs r3, r6 + 7793 00dc 0022 movs r2, #0 + 7794 00de 2021 movs r1, #32 + 7795 00e0 3800 movs r0, r7 + 7796 00e2 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 7797 .LVL559: +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 312 + + + 7798 .loc 1 3344 12 discriminator 1 view .LVU2573 + 7799 00e6 0028 cmp r0, #0 + 7800 00e8 31D1 bne .L457 +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7801 .loc 1 3350 9 is_stmt 1 view .LVU2574 + 7802 00ea 3B68 ldr r3, [r7] + 7803 00ec 1022 movs r2, #16 + 7804 00ee DA61 str r2, [r3, #28] +3353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7805 .loc 1 3353 9 view .LVU2575 + 7806 00f0 3B68 ldr r3, [r7] + 7807 00f2 1032 adds r2, r2, #16 + 7808 00f4 DA61 str r2, [r3, #28] +3357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (I2C_Trials < Trials); + 7809 .loc 1 3357 7 view .LVU2576 +3357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (I2C_Trials < Trials); + 7810 .loc 1 3357 17 is_stmt 0 view .LVU2577 + 7811 00f6 059B ldr r3, [sp, #20] + 7812 00f8 0133 adds r3, r3, #1 + 7813 00fa 0593 str r3, [sp, #20] +3358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7814 .loc 1 3358 25 is_stmt 1 view .LVU2578 + 7815 00fc 059B ldr r3, [sp, #20] + 7816 00fe 039A ldr r2, [sp, #12] + 7817 0100 9342 cmp r3, r2 + 7818 0102 9ED3 bcc .L452 +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7819 .loc 1 3361 5 view .LVU2579 +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7820 .loc 1 3361 17 is_stmt 0 view .LVU2580 + 7821 0104 2022 movs r2, #32 + 7822 0106 4123 movs r3, #65 + 7823 0108 FA54 strb r2, [r7, r3] +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7824 .loc 1 3364 5 is_stmt 1 view .LVU2581 +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7825 .loc 1 3364 9 is_stmt 0 view .LVU2582 + 7826 010a 7B6C ldr r3, [r7, #68] +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7827 .loc 1 3364 21 view .LVU2583 + 7828 010c 1343 orrs r3, r2 + 7829 010e 7B64 str r3, [r7, #68] +3367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7830 .loc 1 3367 5 is_stmt 1 view .LVU2584 +3367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7831 .loc 1 3367 5 view .LVU2585 + 7832 0110 4023 movs r3, #64 + 7833 0112 0022 movs r2, #0 + 7834 0114 FA54 strb r2, [r7, r3] +3367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7835 .loc 1 3367 5 view .LVU2586 +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7836 .loc 1 3369 5 view .LVU2587 +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7837 .loc 1 3369 12 is_stmt 0 view .LVU2588 + 7838 0116 0130 adds r0, r0, #1 + 7839 0118 D6E7 b .L444 + ARM GAS /tmp/cc4IUqI9.s page 313 + + + 7840 .L461: +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7841 .loc 1 3325 9 is_stmt 1 view .LVU2589 +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7842 .loc 1 3325 13 is_stmt 0 view .LVU2590 + 7843 011a 0095 str r5, [sp] + 7844 011c 3300 movs r3, r6 + 7845 011e 0022 movs r2, #0 + 7846 0120 2021 movs r1, #32 + 7847 0122 3800 movs r0, r7 + 7848 0124 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 7849 .LVL560: +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7850 .loc 1 3325 12 discriminator 1 view .LVU2591 + 7851 0128 0028 cmp r0, #0 + 7852 012a 0ED1 bne .L456 +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7853 .loc 1 3331 9 is_stmt 1 view .LVU2592 + 7854 012c 3A68 ldr r2, [r7] + 7855 012e 2023 movs r3, #32 + 7856 0130 D361 str r3, [r2, #28] +3334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7857 .loc 1 3334 9 view .LVU2593 +3334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7858 .loc 1 3334 21 is_stmt 0 view .LVU2594 + 7859 0132 4122 movs r2, #65 + 7860 0134 BB54 strb r3, [r7, r2] +3337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7861 .loc 1 3337 9 is_stmt 1 view .LVU2595 +3337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7862 .loc 1 3337 9 view .LVU2596 + 7863 0136 2033 adds r3, r3, #32 + 7864 0138 0022 movs r2, #0 + 7865 013a FA54 strb r2, [r7, r3] +3337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7866 .loc 1 3337 9 view .LVU2597 +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7867 .loc 1 3339 9 view .LVU2598 +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7868 .loc 1 3339 16 is_stmt 0 view .LVU2599 + 7869 013c C4E7 b .L444 + 7870 .LVL561: + 7871 .L453: +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7872 .loc 1 3373 12 view .LVU2600 + 7873 013e 0220 movs r0, #2 + 7874 .LVL562: +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7875 .loc 1 3373 12 view .LVU2601 + 7876 0140 C2E7 b .L444 + 7877 .LVL563: + 7878 .L454: +3277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7879 .loc 1 3277 14 view .LVU2602 + 7880 0142 0220 movs r0, #2 + 7881 .LVL564: +3277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 314 + + + 7882 .loc 1 3277 14 view .LVU2603 + 7883 0144 C0E7 b .L444 + 7884 .LVL565: + 7885 .L455: +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7886 .loc 1 3281 5 discriminator 1 view .LVU2604 + 7887 0146 0220 movs r0, #2 + 7888 .LVL566: +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7889 .loc 1 3281 5 discriminator 1 view .LVU2605 + 7890 0148 BEE7 b .L444 + 7891 .LVL567: + 7892 .L456: +3327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7893 .loc 1 3327 18 view .LVU2606 + 7894 014a 0120 movs r0, #1 + 7895 014c BCE7 b .L444 + 7896 .L457: +3346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7897 .loc 1 3346 18 view .LVU2607 + 7898 014e 0120 movs r0, #1 + 7899 0150 BAE7 b .L444 + 7900 .L463: + 7901 0152 C046 .align 2 + 7902 .L462: + 7903 0154 00280002 .word 33564672 + 7904 0158 00200002 .word 33562624 + 7905 .cfi_endproc + 7906 .LFE62: + 7908 .section .text.HAL_I2C_Master_Seq_Transmit_IT,"ax",%progbits + 7909 .align 1 + 7910 .global HAL_I2C_Master_Seq_Transmit_IT + 7911 .syntax unified + 7912 .code 16 + 7913 .thumb_func + 7915 HAL_I2C_Master_Seq_Transmit_IT: + 7916 .LVL568: + 7917 .LFB63: +3391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 7918 .loc 1 3391 1 is_stmt 1 view -0 + 7919 .cfi_startproc + 7920 @ args = 4, pretend = 0, frame = 0 + 7921 @ frame_needed = 0, uses_anonymous_args = 0 +3391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 7922 .loc 1 3391 1 is_stmt 0 view .LVU2609 + 7923 0000 F0B5 push {r4, r5, r6, r7, lr} + 7924 .cfi_def_cfa_offset 20 + 7925 .cfi_offset 4, -20 + 7926 .cfi_offset 5, -16 + 7927 .cfi_offset 6, -12 + 7928 .cfi_offset 7, -8 + 7929 .cfi_offset 14, -4 + 7930 0002 83B0 sub sp, sp, #12 + 7931 .cfi_def_cfa_offset 32 + 7932 0004 0400 movs r4, r0 + 7933 0006 0D00 movs r5, r1 +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + ARM GAS /tmp/cc4IUqI9.s page 315 + + + 7934 .loc 1 3392 3 is_stmt 1 view .LVU2610 +3393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 7935 .loc 1 3393 3 view .LVU2611 + 7936 .LVL569: +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7937 .loc 1 3394 3 view .LVU2612 +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7938 .loc 1 3397 3 view .LVU2613 +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7939 .loc 1 3399 3 view .LVU2614 +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7940 .loc 1 3399 11 is_stmt 0 view .LVU2615 + 7941 0008 4121 movs r1, #65 + 7942 .LVL570: +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7943 .loc 1 3399 11 view .LVU2616 + 7944 000a 415C ldrb r1, [r0, r1] +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7945 .loc 1 3399 6 view .LVU2617 + 7946 000c 2029 cmp r1, #32 + 7947 000e 00D0 beq .LCB7545 + 7948 0010 77E0 b .L475 @long jump + 7949 .LCB7545: +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7950 .loc 1 3402 5 is_stmt 1 view .LVU2618 +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7951 .loc 1 3402 5 view .LVU2619 + 7952 0012 2031 adds r1, r1, #32 + 7953 0014 415C ldrb r1, [r0, r1] + 7954 0016 0129 cmp r1, #1 + 7955 0018 00D1 bne .LCB7551 + 7956 001a 74E0 b .L476 @long jump + 7957 .LCB7551: +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7958 .loc 1 3402 5 discriminator 2 view .LVU2620 + 7959 001c 4021 movs r1, #64 + 7960 001e 0120 movs r0, #1 + 7961 .LVL571: +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7962 .loc 1 3402 5 is_stmt 0 discriminator 2 view .LVU2621 + 7963 0020 6054 strb r0, [r4, r1] +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7964 .loc 1 3402 5 is_stmt 1 discriminator 2 view .LVU2622 +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7965 .loc 1 3404 5 view .LVU2623 +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7966 .loc 1 3404 21 is_stmt 0 view .LVU2624 + 7967 0022 0131 adds r1, r1, #1 + 7968 0024 2030 adds r0, r0, #32 + 7969 0026 6054 strb r0, [r4, r1] +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7970 .loc 1 3405 5 is_stmt 1 view .LVU2625 +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7971 .loc 1 3405 21 is_stmt 0 view .LVU2626 + 7972 0028 0131 adds r1, r1, #1 + 7973 002a 1138 subs r0, r0, #17 + 7974 002c 6054 strb r0, [r4, r1] + ARM GAS /tmp/cc4IUqI9.s page 316 + + +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7975 .loc 1 3406 5 is_stmt 1 view .LVU2627 +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7976 .loc 1 3406 21 is_stmt 0 view .LVU2628 + 7977 002e 0021 movs r1, #0 + 7978 0030 6164 str r1, [r4, #68] +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7979 .loc 1 3409 5 is_stmt 1 view .LVU2629 +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7980 .loc 1 3409 23 is_stmt 0 view .LVU2630 + 7981 0032 6262 str r2, [r4, #36] +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7982 .loc 1 3410 5 is_stmt 1 view .LVU2631 +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7983 .loc 1 3410 23 is_stmt 0 view .LVU2632 + 7984 0034 6385 strh r3, [r4, #42] +3411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7985 .loc 1 3411 5 is_stmt 1 view .LVU2633 +3411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7986 .loc 1 3411 23 is_stmt 0 view .LVU2634 + 7987 0036 089B ldr r3, [sp, #32] + 7988 .LVL572: +3411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7989 .loc 1 3411 23 view .LVU2635 + 7990 0038 E362 str r3, [r4, #44] + 7991 .LVL573: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7992 .loc 1 3412 5 is_stmt 1 view .LVU2636 +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7993 .loc 1 3412 23 is_stmt 0 view .LVU2637 + 7994 003a 344B ldr r3, .L481 + 7995 003c 6363 str r3, [r4, #52] +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7996 .loc 1 3415 5 is_stmt 1 view .LVU2638 +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7997 .loc 1 3415 13 is_stmt 0 view .LVU2639 + 7998 003e 638D ldrh r3, [r4, #42] + 7999 0040 9BB2 uxth r3, r3 +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8000 .loc 1 3415 8 view .LVU2640 + 8001 0042 FF2B cmp r3, #255 + 8002 0044 10D9 bls .L466 +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8003 .loc 1 3417 7 is_stmt 1 view .LVU2641 +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8004 .loc 1 3417 22 is_stmt 0 view .LVU2642 + 8005 0046 FF23 movs r3, #255 + 8006 0048 2385 strh r3, [r4, #40] +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8007 .loc 1 3418 7 is_stmt 1 view .LVU2643 + 8008 .LVL574: +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8009 .loc 1 3418 16 is_stmt 0 view .LVU2644 + 8010 004a 8026 movs r6, #128 + 8011 004c 7604 lsls r6, r6, #17 + 8012 .LVL575: + 8013 .L467: + ARM GAS /tmp/cc4IUqI9.s page 317 + + +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8014 .loc 1 3426 5 is_stmt 1 view .LVU2645 +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8015 .loc 1 3426 14 is_stmt 0 view .LVU2646 + 8016 004e 238D ldrh r3, [r4, #40] +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8017 .loc 1 3426 8 view .LVU2647 + 8018 0050 002B cmp r3, #0 + 8019 0052 1BD0 beq .L477 +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8020 .loc 1 3426 31 discriminator 1 view .LVU2648 + 8021 0054 089B ldr r3, [sp, #32] + 8022 0056 002B cmp r3, #0 + 8023 0058 0AD0 beq .L469 +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8024 .loc 1 3426 68 discriminator 2 view .LVU2649 + 8025 005a 8023 movs r3, #128 + 8026 005c 9B04 lsls r3, r3, #18 + 8027 005e 0899 ldr r1, [sp, #32] + 8028 0060 9942 cmp r1, r3 + 8029 0062 05D0 beq .L469 +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8030 .loc 1 3394 12 view .LVU2650 + 8031 0064 0027 movs r7, #0 + 8032 0066 12E0 b .L468 + 8033 .LVL576: + 8034 .L466: +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8035 .loc 1 3422 7 is_stmt 1 view .LVU2651 +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8036 .loc 1 3422 28 is_stmt 0 view .LVU2652 + 8037 0068 638D ldrh r3, [r4, #42] +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8038 .loc 1 3422 22 view .LVU2653 + 8039 006a 2385 strh r3, [r4, #40] +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8040 .loc 1 3423 7 is_stmt 1 view .LVU2654 +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8041 .loc 1 3423 16 is_stmt 0 view .LVU2655 + 8042 006c E66A ldr r6, [r4, #44] + 8043 .LVL577: +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8044 .loc 1 3423 16 view .LVU2656 + 8045 006e EEE7 b .L467 + 8046 .L469: +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8047 .loc 1 3431 7 is_stmt 1 view .LVU2657 +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8048 .loc 1 3431 11 is_stmt 0 view .LVU2658 + 8049 0070 2368 ldr r3, [r4] +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8050 .loc 1 3431 30 view .LVU2659 + 8051 0072 1278 ldrb r2, [r2] + 8052 .LVL578: +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8053 .loc 1 3431 28 view .LVU2660 + 8054 0074 9A62 str r2, [r3, #40] + ARM GAS /tmp/cc4IUqI9.s page 318 + + + 8055 .LVL579: +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8056 .loc 1 3434 7 is_stmt 1 view .LVU2661 +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8057 .loc 1 3434 11 is_stmt 0 view .LVU2662 + 8058 0076 636A ldr r3, [r4, #36] +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8059 .loc 1 3434 21 view .LVU2663 + 8060 0078 0133 adds r3, r3, #1 + 8061 007a 6362 str r3, [r4, #36] +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 8062 .loc 1 3436 7 is_stmt 1 view .LVU2664 +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 8063 .loc 1 3436 24 is_stmt 0 view .LVU2665 + 8064 007c 278D ldrh r7, [r4, #40] + 8065 .LVL580: +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 8066 .loc 1 3437 7 is_stmt 1 view .LVU2666 +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 8067 .loc 1 3437 11 is_stmt 0 view .LVU2667 + 8068 007e 638D ldrh r3, [r4, #42] +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 8069 .loc 1 3437 22 view .LVU2668 + 8070 0080 013B subs r3, r3, #1 + 8071 0082 9BB2 uxth r3, r3 + 8072 0084 6385 strh r3, [r4, #42] +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8073 .loc 1 3438 7 is_stmt 1 view .LVU2669 +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8074 .loc 1 3438 21 is_stmt 0 view .LVU2670 + 8075 0086 7B1E subs r3, r7, #1 + 8076 0088 2385 strh r3, [r4, #40] + 8077 008a 00E0 b .L468 + 8078 .LVL581: + 8079 .L477: +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8080 .loc 1 3394 12 view .LVU2671 + 8081 008c 0027 movs r7, #0 + 8082 .LVL582: + 8083 .L468: +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8084 .loc 1 3444 5 is_stmt 1 view .LVU2672 +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8085 .loc 1 3444 14 is_stmt 0 view .LVU2673 + 8086 008e 236B ldr r3, [r4, #48] +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8087 .loc 1 3444 8 view .LVU2674 + 8088 0090 112B cmp r3, #17 + 8089 0092 09D1 bne .L470 +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8090 .loc 1 3445 10 view .LVU2675 + 8091 0094 089B ldr r3, [sp, #32] + 8092 0096 AA2B cmp r3, #170 + 8093 0098 06D0 beq .L470 +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8094 .loc 1 3445 10 discriminator 2 view .LVU2676 + 8095 009a AA23 movs r3, #170 + ARM GAS /tmp/cc4IUqI9.s page 319 + + + 8096 009c 1B02 lsls r3, r3, #8 + 8097 009e 089A ldr r2, [sp, #32] + 8098 00a0 9A42 cmp r2, r3 + 8099 00a2 01D0 beq .L470 +3447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8100 .loc 1 3447 19 view .LVU2677 + 8101 00a4 0023 movs r3, #0 + 8102 00a6 08E0 b .L471 + 8103 .L470: +3452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8104 .loc 1 3452 7 is_stmt 1 view .LVU2678 + 8105 00a8 2000 movs r0, r4 + 8106 00aa FFF7FEFF bl I2C_ConvertOtherXferOptions + 8107 .LVL583: +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8108 .loc 1 3455 7 view .LVU2679 +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8109 .loc 1 3455 15 is_stmt 0 view .LVU2680 + 8110 00ae 638D ldrh r3, [r4, #42] + 8111 00b0 9BB2 uxth r3, r3 +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8112 .loc 1 3455 10 view .LVU2681 + 8113 00b2 FF2B cmp r3, #255 + 8114 00b4 1AD8 bhi .L480 +3457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8115 .loc 1 3457 9 is_stmt 1 view .LVU2682 +3457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8116 .loc 1 3457 18 is_stmt 0 view .LVU2683 + 8117 00b6 E66A ldr r6, [r4, #44] + 8118 .LVL584: +3393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 8119 .loc 1 3393 12 view .LVU2684 + 8120 00b8 154B ldr r3, .L481+4 + 8121 .L471: + 8122 .LVL585: +3462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8123 .loc 1 3462 5 is_stmt 1 view .LVU2685 +3462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8124 .loc 1 3462 8 is_stmt 0 view .LVU2686 + 8125 00ba 089A ldr r2, [sp, #32] + 8126 00bc 002A cmp r2, #0 + 8127 00be 04D0 beq .L472 +3462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8128 .loc 1 3462 42 discriminator 1 view .LVU2687 + 8129 00c0 8022 movs r2, #128 + 8130 00c2 9204 lsls r2, r2, #18 + 8131 00c4 0899 ldr r1, [sp, #32] + 8132 00c6 9142 cmp r1, r2 + 8133 00c8 12D1 bne .L473 + 8134 .L472: +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8135 .loc 1 3464 7 is_stmt 1 view .LVU2688 + 8136 00ca FAB2 uxtb r2, r7 + 8137 00cc 0093 str r3, [sp] + 8138 00ce 3300 movs r3, r6 + 8139 .LVL586: +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 320 + + + 8140 .loc 1 3464 7 is_stmt 0 view .LVU2689 + 8141 00d0 2900 movs r1, r5 + 8142 00d2 2000 movs r0, r4 + 8143 00d4 FFF7FEFF bl I2C_TransferConfig + 8144 .LVL587: + 8145 .L474: +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8146 .loc 1 3472 5 is_stmt 1 view .LVU2690 +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8147 .loc 1 3472 5 view .LVU2691 + 8148 00d8 4023 movs r3, #64 + 8149 00da 0022 movs r2, #0 + 8150 00dc E254 strb r2, [r4, r3] +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8151 .loc 1 3472 5 view .LVU2692 +3481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8152 .loc 1 3481 5 view .LVU2693 + 8153 00de 0121 movs r1, #1 + 8154 00e0 2000 movs r0, r4 + 8155 00e2 FFF7FEFF bl I2C_Enable_IRQ + 8156 .LVL588: +3483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8157 .loc 1 3483 5 view .LVU2694 +3483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8158 .loc 1 3483 12 is_stmt 0 view .LVU2695 + 8159 00e6 0020 movs r0, #0 + 8160 .LVL589: + 8161 .L465: +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8162 .loc 1 3489 1 view .LVU2696 + 8163 00e8 03B0 add sp, sp, #12 + 8164 @ sp needed + 8165 .LVL590: + 8166 .LVL591: +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8167 .loc 1 3489 1 view .LVU2697 + 8168 00ea F0BD pop {r4, r5, r6, r7, pc} + 8169 .LVL592: + 8170 .L480: +3393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 8171 .loc 1 3393 12 view .LVU2698 + 8172 00ec 084B ldr r3, .L481+4 + 8173 00ee E4E7 b .L471 + 8174 .LVL593: + 8175 .L473: +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8176 .loc 1 3468 7 is_stmt 1 view .LVU2699 +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8177 .loc 1 3468 57 is_stmt 0 view .LVU2700 + 8178 00f0 228D ldrh r2, [r4, #40] +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8179 .loc 1 3468 7 view .LVU2701 + 8180 00f2 D2B2 uxtb r2, r2 + 8181 00f4 0093 str r3, [sp] + 8182 00f6 3300 movs r3, r6 + 8183 .LVL594: +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 321 + + + 8184 .loc 1 3468 7 view .LVU2702 + 8185 00f8 2900 movs r1, r5 + 8186 00fa 2000 movs r0, r4 + 8187 00fc FFF7FEFF bl I2C_TransferConfig + 8188 .LVL595: +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8189 .loc 1 3468 7 view .LVU2703 + 8190 0100 EAE7 b .L474 + 8191 .LVL596: + 8192 .L475: +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8193 .loc 1 3487 12 view .LVU2704 + 8194 0102 0220 movs r0, #2 + 8195 .LVL597: +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8196 .loc 1 3487 12 view .LVU2705 + 8197 0104 F0E7 b .L465 + 8198 .LVL598: + 8199 .L476: +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8200 .loc 1 3402 5 discriminator 1 view .LVU2706 + 8201 0106 0220 movs r0, #2 + 8202 .LVL599: +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8203 .loc 1 3402 5 discriminator 1 view .LVU2707 + 8204 0108 EEE7 b .L465 + 8205 .L482: + 8206 010a C046 .align 2 + 8207 .L481: + 8208 010c 00000000 .word I2C_Master_ISR_IT + 8209 0110 00200080 .word -2147475456 + 8210 .cfi_endproc + 8211 .LFE63: + 8213 .section .text.HAL_I2C_Master_Seq_Transmit_DMA,"ax",%progbits + 8214 .align 1 + 8215 .global HAL_I2C_Master_Seq_Transmit_DMA + 8216 .syntax unified + 8217 .code 16 + 8218 .thumb_func + 8220 HAL_I2C_Master_Seq_Transmit_DMA: + 8221 .LVL600: + 8222 .LFB64: +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8223 .loc 1 3505 1 is_stmt 1 view -0 + 8224 .cfi_startproc + 8225 @ args = 4, pretend = 0, frame = 8 + 8226 @ frame_needed = 0, uses_anonymous_args = 0 +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8227 .loc 1 3505 1 is_stmt 0 view .LVU2709 + 8228 0000 F0B5 push {r4, r5, r6, r7, lr} + 8229 .cfi_def_cfa_offset 20 + 8230 .cfi_offset 4, -20 + 8231 .cfi_offset 5, -16 + 8232 .cfi_offset 6, -12 + 8233 .cfi_offset 7, -8 + 8234 .cfi_offset 14, -4 + 8235 0002 85B0 sub sp, sp, #20 + ARM GAS /tmp/cc4IUqI9.s page 322 + + + 8236 .cfi_def_cfa_offset 40 + 8237 0004 0400 movs r4, r0 + 8238 0006 0391 str r1, [sp, #12] +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + 8239 .loc 1 3506 3 is_stmt 1 view .LVU2710 +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8240 .loc 1 3507 3 view .LVU2711 + 8241 .LVL601: +3508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 8242 .loc 1 3508 3 view .LVU2712 +3509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8243 .loc 1 3509 3 view .LVU2713 +3512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8244 .loc 1 3512 3 view .LVU2714 +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8245 .loc 1 3514 3 view .LVU2715 +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8246 .loc 1 3514 11 is_stmt 0 view .LVU2716 + 8247 0008 4121 movs r1, #65 + 8248 .LVL602: +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8249 .loc 1 3514 11 view .LVU2717 + 8250 000a 415C ldrb r1, [r0, r1] +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8251 .loc 1 3514 6 view .LVU2718 + 8252 000c 2029 cmp r1, #32 + 8253 000e 00D0 beq .LCB7845 + 8254 0010 D7E0 b .L502 @long jump + 8255 .LCB7845: +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8256 .loc 1 3517 5 is_stmt 1 view .LVU2719 +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8257 .loc 1 3517 5 view .LVU2720 + 8258 0012 2031 adds r1, r1, #32 + 8259 0014 415C ldrb r1, [r0, r1] + 8260 0016 0129 cmp r1, #1 + 8261 0018 00D1 bne .LCB7851 + 8262 001a D5E0 b .L503 @long jump + 8263 .LCB7851: +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8264 .loc 1 3517 5 discriminator 2 view .LVU2721 + 8265 001c 4021 movs r1, #64 + 8266 001e 0120 movs r0, #1 + 8267 .LVL603: +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8268 .loc 1 3517 5 is_stmt 0 discriminator 2 view .LVU2722 + 8269 0020 6054 strb r0, [r4, r1] +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8270 .loc 1 3517 5 is_stmt 1 discriminator 2 view .LVU2723 +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8271 .loc 1 3519 5 view .LVU2724 +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8272 .loc 1 3519 21 is_stmt 0 view .LVU2725 + 8273 0022 0131 adds r1, r1, #1 + 8274 0024 2030 adds r0, r0, #32 + 8275 0026 6054 strb r0, [r4, r1] +3520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + ARM GAS /tmp/cc4IUqI9.s page 323 + + + 8276 .loc 1 3520 5 is_stmt 1 view .LVU2726 +3520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8277 .loc 1 3520 21 is_stmt 0 view .LVU2727 + 8278 0028 0131 adds r1, r1, #1 + 8279 002a 1138 subs r0, r0, #17 + 8280 002c 6054 strb r0, [r4, r1] +3521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8281 .loc 1 3521 5 is_stmt 1 view .LVU2728 +3521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8282 .loc 1 3521 21 is_stmt 0 view .LVU2729 + 8283 002e 0021 movs r1, #0 + 8284 0030 6164 str r1, [r4, #68] +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8285 .loc 1 3524 5 is_stmt 1 view .LVU2730 +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8286 .loc 1 3524 23 is_stmt 0 view .LVU2731 + 8287 0032 6262 str r2, [r4, #36] +3525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8288 .loc 1 3525 5 is_stmt 1 view .LVU2732 +3525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8289 .loc 1 3525 23 is_stmt 0 view .LVU2733 + 8290 0034 6385 strh r3, [r4, #42] +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8291 .loc 1 3526 5 is_stmt 1 view .LVU2734 +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8292 .loc 1 3526 23 is_stmt 0 view .LVU2735 + 8293 0036 0A9B ldr r3, [sp, #40] + 8294 .LVL604: +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8295 .loc 1 3526 23 view .LVU2736 + 8296 0038 E362 str r3, [r4, #44] + 8297 .LVL605: +3527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8298 .loc 1 3527 5 is_stmt 1 view .LVU2737 +3527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8299 .loc 1 3527 23 is_stmt 0 view .LVU2738 + 8300 003a 644B ldr r3, .L509 + 8301 003c 6363 str r3, [r4, #52] +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8302 .loc 1 3530 5 is_stmt 1 view .LVU2739 +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8303 .loc 1 3530 13 is_stmt 0 view .LVU2740 + 8304 003e 638D ldrh r3, [r4, #42] + 8305 0040 9BB2 uxth r3, r3 +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8306 .loc 1 3530 8 view .LVU2741 + 8307 0042 FF2B cmp r3, #255 + 8308 0044 10D9 bls .L485 +3532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8309 .loc 1 3532 7 is_stmt 1 view .LVU2742 +3532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8310 .loc 1 3532 22 is_stmt 0 view .LVU2743 + 8311 0046 FF23 movs r3, #255 + 8312 0048 2385 strh r3, [r4, #40] +3533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8313 .loc 1 3533 7 is_stmt 1 view .LVU2744 + 8314 .LVL606: + ARM GAS /tmp/cc4IUqI9.s page 324 + + +3533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8315 .loc 1 3533 16 is_stmt 0 view .LVU2745 + 8316 004a 8026 movs r6, #128 + 8317 004c 7604 lsls r6, r6, #17 + 8318 .LVL607: + 8319 .L486: +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8320 .loc 1 3541 5 is_stmt 1 view .LVU2746 +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8321 .loc 1 3541 14 is_stmt 0 view .LVU2747 + 8322 004e 238D ldrh r3, [r4, #40] +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8323 .loc 1 3541 8 view .LVU2748 + 8324 0050 002B cmp r3, #0 + 8325 0052 1BD0 beq .L504 +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8326 .loc 1 3541 31 discriminator 1 view .LVU2749 + 8327 0054 0A9B ldr r3, [sp, #40] + 8328 0056 002B cmp r3, #0 + 8329 0058 0AD0 beq .L488 +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 8330 .loc 1 3541 68 discriminator 2 view .LVU2750 + 8331 005a 8023 movs r3, #128 + 8332 005c 9B04 lsls r3, r3, #18 + 8333 005e 0A99 ldr r1, [sp, #40] + 8334 0060 9942 cmp r1, r3 + 8335 0062 05D0 beq .L488 +3509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8336 .loc 1 3509 12 view .LVU2751 + 8337 0064 0027 movs r7, #0 + 8338 0066 12E0 b .L487 + 8339 .LVL608: + 8340 .L485: +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8341 .loc 1 3537 7 is_stmt 1 view .LVU2752 +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8342 .loc 1 3537 28 is_stmt 0 view .LVU2753 + 8343 0068 638D ldrh r3, [r4, #42] +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8344 .loc 1 3537 22 view .LVU2754 + 8345 006a 2385 strh r3, [r4, #40] +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8346 .loc 1 3538 7 is_stmt 1 view .LVU2755 +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8347 .loc 1 3538 16 is_stmt 0 view .LVU2756 + 8348 006c E66A ldr r6, [r4, #44] + 8349 .LVL609: +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8350 .loc 1 3538 16 view .LVU2757 + 8351 006e EEE7 b .L486 + 8352 .L488: +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8353 .loc 1 3546 7 is_stmt 1 view .LVU2758 +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8354 .loc 1 3546 11 is_stmt 0 view .LVU2759 + 8355 0070 2368 ldr r3, [r4] +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 325 + + + 8356 .loc 1 3546 30 view .LVU2760 + 8357 0072 1278 ldrb r2, [r2] + 8358 .LVL610: +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8359 .loc 1 3546 28 view .LVU2761 + 8360 0074 9A62 str r2, [r3, #40] + 8361 .LVL611: +3549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8362 .loc 1 3549 7 is_stmt 1 view .LVU2762 +3549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8363 .loc 1 3549 11 is_stmt 0 view .LVU2763 + 8364 0076 636A ldr r3, [r4, #36] +3549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8365 .loc 1 3549 21 view .LVU2764 + 8366 0078 0133 adds r3, r3, #1 + 8367 007a 6362 str r3, [r4, #36] +3551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 8368 .loc 1 3551 7 is_stmt 1 view .LVU2765 +3551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 8369 .loc 1 3551 24 is_stmt 0 view .LVU2766 + 8370 007c 278D ldrh r7, [r4, #40] + 8371 .LVL612: +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 8372 .loc 1 3552 7 is_stmt 1 view .LVU2767 +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 8373 .loc 1 3552 11 is_stmt 0 view .LVU2768 + 8374 007e 638D ldrh r3, [r4, #42] +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 8375 .loc 1 3552 22 view .LVU2769 + 8376 0080 013B subs r3, r3, #1 + 8377 0082 9BB2 uxth r3, r3 + 8378 0084 6385 strh r3, [r4, #42] +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8379 .loc 1 3553 7 is_stmt 1 view .LVU2770 +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8380 .loc 1 3553 21 is_stmt 0 view .LVU2771 + 8381 0086 7B1E subs r3, r7, #1 + 8382 0088 2385 strh r3, [r4, #40] + 8383 008a 00E0 b .L487 + 8384 .LVL613: + 8385 .L504: +3509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8386 .loc 1 3509 12 view .LVU2772 + 8387 008c 0027 movs r7, #0 + 8388 .LVL614: + 8389 .L487: +3559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8390 .loc 1 3559 5 is_stmt 1 view .LVU2773 +3559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8391 .loc 1 3559 14 is_stmt 0 view .LVU2774 + 8392 008e 236B ldr r3, [r4, #48] +3559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8393 .loc 1 3559 8 view .LVU2775 + 8394 0090 112B cmp r3, #17 + 8395 0092 09D1 bne .L489 +3560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8396 .loc 1 3560 10 view .LVU2776 + ARM GAS /tmp/cc4IUqI9.s page 326 + + + 8397 0094 0A9B ldr r3, [sp, #40] + 8398 0096 AA2B cmp r3, #170 + 8399 0098 06D0 beq .L489 +3560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8400 .loc 1 3560 10 discriminator 2 view .LVU2777 + 8401 009a AA23 movs r3, #170 + 8402 009c 1B02 lsls r3, r3, #8 + 8403 009e 0A9A ldr r2, [sp, #40] + 8404 00a0 9A42 cmp r2, r3 + 8405 00a2 01D0 beq .L489 +3562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8406 .loc 1 3562 19 view .LVU2778 + 8407 00a4 0025 movs r5, #0 + 8408 00a6 08E0 b .L490 + 8409 .L489: +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8410 .loc 1 3567 7 is_stmt 1 view .LVU2779 + 8411 00a8 2000 movs r0, r4 + 8412 00aa FFF7FEFF bl I2C_ConvertOtherXferOptions + 8413 .LVL615: +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8414 .loc 1 3570 7 view .LVU2780 +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8415 .loc 1 3570 15 is_stmt 0 view .LVU2781 + 8416 00ae 638D ldrh r3, [r4, #42] + 8417 00b0 9BB2 uxth r3, r3 +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8418 .loc 1 3570 10 view .LVU2782 + 8419 00b2 FF2B cmp r3, #255 + 8420 00b4 28D8 bhi .L507 +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8421 .loc 1 3572 9 is_stmt 1 view .LVU2783 +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8422 .loc 1 3572 18 is_stmt 0 view .LVU2784 + 8423 00b6 E66A ldr r6, [r4, #44] + 8424 .LVL616: +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8425 .loc 1 3507 12 view .LVU2785 + 8426 00b8 454D ldr r5, .L509+4 + 8427 .L490: + 8428 .LVL617: +3576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8429 .loc 1 3576 5 is_stmt 1 view .LVU2786 +3576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8430 .loc 1 3576 13 is_stmt 0 view .LVU2787 + 8431 00ba 228D ldrh r2, [r4, #40] +3576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8432 .loc 1 3576 8 view .LVU2788 + 8433 00bc 002A cmp r2, #0 + 8434 00be 5ED0 beq .L491 +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8435 .loc 1 3578 7 is_stmt 1 view .LVU2789 +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8436 .loc 1 3578 15 is_stmt 0 view .LVU2790 + 8437 00c0 A36B ldr r3, [r4, #56] +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8438 .loc 1 3578 10 view .LVU2791 + ARM GAS /tmp/cc4IUqI9.s page 327 + + + 8439 00c2 002B cmp r3, #0 + 8440 00c4 22D0 beq .L492 +3581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8441 .loc 1 3581 9 is_stmt 1 view .LVU2792 +3581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8442 .loc 1 3581 40 is_stmt 0 view .LVU2793 + 8443 00c6 434A ldr r2, .L509+8 + 8444 00c8 9A62 str r2, [r3, #40] +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8445 .loc 1 3584 9 is_stmt 1 view .LVU2794 +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8446 .loc 1 3584 13 is_stmt 0 view .LVU2795 + 8447 00ca A36B ldr r3, [r4, #56] +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8448 .loc 1 3584 41 view .LVU2796 + 8449 00cc 424A ldr r2, .L509+12 + 8450 00ce 1A63 str r2, [r3, #48] +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8451 .loc 1 3587 9 is_stmt 1 view .LVU2797 +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8452 .loc 1 3587 13 is_stmt 0 view .LVU2798 + 8453 00d0 A26B ldr r2, [r4, #56] +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8454 .loc 1 3587 44 view .LVU2799 + 8455 00d2 0023 movs r3, #0 + 8456 00d4 D362 str r3, [r2, #44] +3588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8457 .loc 1 3588 9 is_stmt 1 view .LVU2800 +3588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8458 .loc 1 3588 13 is_stmt 0 view .LVU2801 + 8459 00d6 A26B ldr r2, [r4, #56] +3588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8460 .loc 1 3588 41 view .LVU2802 + 8461 00d8 5363 str r3, [r2, #52] +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 8462 .loc 1 3591 9 is_stmt 1 view .LVU2803 +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 8463 .loc 1 3591 70 is_stmt 0 view .LVU2804 + 8464 00da 616A ldr r1, [r4, #36] +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8465 .loc 1 3592 57 view .LVU2805 + 8466 00dc 2268 ldr r2, [r4] +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8467 .loc 1 3592 52 view .LVU2806 + 8468 00de 2832 adds r2, r2, #40 +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8469 .loc 1 3592 79 view .LVU2807 + 8470 00e0 238D ldrh r3, [r4, #40] +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 8471 .loc 1 3591 25 view .LVU2808 + 8472 00e2 A06B ldr r0, [r4, #56] + 8473 00e4 FFF7FEFF bl HAL_DMA_Start_IT + 8474 .LVL618: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8475 .loc 1 3609 7 is_stmt 1 view .LVU2809 +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8476 .loc 1 3609 10 is_stmt 0 view .LVU2810 + ARM GAS /tmp/cc4IUqI9.s page 328 + + + 8477 00e8 0028 cmp r0, #0 + 8478 00ea 1DD0 beq .L493 +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8479 .loc 1 3639 9 is_stmt 1 view .LVU2811 +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8480 .loc 1 3639 25 is_stmt 0 view .LVU2812 + 8481 00ec 4123 movs r3, #65 + 8482 00ee 2022 movs r2, #32 + 8483 00f0 E254 strb r2, [r4, r3] +3640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8484 .loc 1 3640 9 is_stmt 1 view .LVU2813 +3640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8485 .loc 1 3640 25 is_stmt 0 view .LVU2814 + 8486 00f2 0022 movs r2, #0 + 8487 00f4 0133 adds r3, r3, #1 + 8488 00f6 E254 strb r2, [r4, r3] +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8489 .loc 1 3643 9 is_stmt 1 view .LVU2815 +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8490 .loc 1 3643 13 is_stmt 0 view .LVU2816 + 8491 00f8 636C ldr r3, [r4, #68] +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8492 .loc 1 3643 25 view .LVU2817 + 8493 00fa 1021 movs r1, #16 + 8494 00fc 0B43 orrs r3, r1 + 8495 00fe 6364 str r3, [r4, #68] +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8496 .loc 1 3646 9 is_stmt 1 view .LVU2818 +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8497 .loc 1 3646 9 view .LVU2819 + 8498 0100 4023 movs r3, #64 + 8499 0102 E254 strb r2, [r4, r3] +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8500 .loc 1 3646 9 view .LVU2820 +3648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8501 .loc 1 3648 9 view .LVU2821 +3648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8502 .loc 1 3648 16 is_stmt 0 view .LVU2822 + 8503 0104 0120 movs r0, #1 + 8504 .LVL619: +3648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8505 .loc 1 3648 16 view .LVU2823 + 8506 0106 5DE0 b .L484 + 8507 .LVL620: + 8508 .L507: +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8509 .loc 1 3507 12 view .LVU2824 + 8510 0108 314D ldr r5, .L509+4 + 8511 010a D6E7 b .L490 + 8512 .LVL621: + 8513 .L492: +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8514 .loc 1 3597 9 is_stmt 1 view .LVU2825 +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8515 .loc 1 3597 25 is_stmt 0 view .LVU2826 + 8516 010c 4123 movs r3, #65 + 8517 010e 2022 movs r2, #32 + ARM GAS /tmp/cc4IUqI9.s page 329 + + + 8518 0110 E254 strb r2, [r4, r3] +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8519 .loc 1 3598 9 is_stmt 1 view .LVU2827 +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8520 .loc 1 3598 25 is_stmt 0 view .LVU2828 + 8521 0112 0022 movs r2, #0 + 8522 0114 0133 adds r3, r3, #1 + 8523 0116 E254 strb r2, [r4, r3] +3601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8524 .loc 1 3601 9 is_stmt 1 view .LVU2829 +3601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8525 .loc 1 3601 13 is_stmt 0 view .LVU2830 + 8526 0118 636C ldr r3, [r4, #68] +3601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8527 .loc 1 3601 25 view .LVU2831 + 8528 011a 8021 movs r1, #128 + 8529 011c 0B43 orrs r3, r1 + 8530 011e 6364 str r3, [r4, #68] +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8531 .loc 1 3604 9 is_stmt 1 view .LVU2832 +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8532 .loc 1 3604 9 view .LVU2833 + 8533 0120 4023 movs r3, #64 + 8534 0122 E254 strb r2, [r4, r3] +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8535 .loc 1 3604 9 view .LVU2834 +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8536 .loc 1 3606 9 view .LVU2835 +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8537 .loc 1 3606 16 is_stmt 0 view .LVU2836 + 8538 0124 0120 movs r0, #1 + 8539 0126 4DE0 b .L484 + 8540 .LVL622: + 8541 .L493: +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8542 .loc 1 3612 9 is_stmt 1 view .LVU2837 +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8543 .loc 1 3612 12 is_stmt 0 view .LVU2838 + 8544 0128 0A9B ldr r3, [sp, #40] + 8545 012a 002B cmp r3, #0 + 8546 012c 04D0 beq .L495 +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8547 .loc 1 3612 46 discriminator 1 view .LVU2839 + 8548 012e 8023 movs r3, #128 + 8549 0130 9B04 lsls r3, r3, #18 + 8550 0132 0A9A ldr r2, [sp, #40] + 8551 0134 9A42 cmp r2, r3 + 8552 0136 19D1 bne .L496 + 8553 .L495: +3614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8554 .loc 1 3614 11 is_stmt 1 view .LVU2840 + 8555 0138 FAB2 uxtb r2, r7 + 8556 013a 0095 str r5, [sp] + 8557 013c 3300 movs r3, r6 + 8558 013e 0399 ldr r1, [sp, #12] + 8559 0140 2000 movs r0, r4 + 8560 .LVL623: + ARM GAS /tmp/cc4IUqI9.s page 330 + + +3614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8561 .loc 1 3614 11 is_stmt 0 view .LVU2841 + 8562 0142 FFF7FEFF bl I2C_TransferConfig + 8563 .LVL624: + 8564 .L497: +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8565 .loc 1 3622 9 is_stmt 1 view .LVU2842 +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8566 .loc 1 3622 13 is_stmt 0 view .LVU2843 + 8567 0146 638D ldrh r3, [r4, #42] +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8568 .loc 1 3622 32 view .LVU2844 + 8569 0148 228D ldrh r2, [r4, #40] +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8570 .loc 1 3622 25 view .LVU2845 + 8571 014a 9B1A subs r3, r3, r2 + 8572 014c 9BB2 uxth r3, r3 + 8573 014e 6385 strh r3, [r4, #42] +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8574 .loc 1 3625 9 is_stmt 1 view .LVU2846 +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8575 .loc 1 3625 9 view .LVU2847 + 8576 0150 4023 movs r3, #64 + 8577 0152 0022 movs r2, #0 + 8578 0154 E254 strb r2, [r4, r3] +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8579 .loc 1 3625 9 view .LVU2848 +3631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8580 .loc 1 3631 9 view .LVU2849 + 8581 0156 1021 movs r1, #16 + 8582 0158 2000 movs r0, r4 + 8583 015a FFF7FEFF bl I2C_Enable_IRQ + 8584 .LVL625: +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8585 .loc 1 3634 9 view .LVU2850 +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8586 .loc 1 3634 13 is_stmt 0 view .LVU2851 + 8587 015e 2268 ldr r2, [r4] +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8588 .loc 1 3634 23 view .LVU2852 + 8589 0160 1168 ldr r1, [r2] +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8590 .loc 1 3634 29 view .LVU2853 + 8591 0162 8023 movs r3, #128 + 8592 0164 DB01 lsls r3, r3, #7 + 8593 0166 0B43 orrs r3, r1 + 8594 0168 1360 str r3, [r2] + 8595 016a 20E0 b .L498 + 8596 .LVL626: + 8597 .L496: +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8598 .loc 1 3618 11 is_stmt 1 view .LVU2854 +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8599 .loc 1 3618 61 is_stmt 0 view .LVU2855 + 8600 016c 228D ldrh r2, [r4, #40] +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8601 .loc 1 3618 11 view .LVU2856 + ARM GAS /tmp/cc4IUqI9.s page 331 + + + 8602 016e D2B2 uxtb r2, r2 + 8603 0170 0095 str r5, [sp] + 8604 0172 3300 movs r3, r6 + 8605 0174 0399 ldr r1, [sp, #12] + 8606 0176 2000 movs r0, r4 + 8607 .LVL627: +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8608 .loc 1 3618 11 view .LVU2857 + 8609 0178 FFF7FEFF bl I2C_TransferConfig + 8610 .LVL628: + 8611 017c E3E7 b .L497 + 8612 .LVL629: + 8613 .L491: +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8614 .loc 1 3654 7 is_stmt 1 view .LVU2858 +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8615 .loc 1 3654 21 is_stmt 0 view .LVU2859 + 8616 017e 174B ldr r3, .L509+16 + 8617 0180 6363 str r3, [r4, #52] +3658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8618 .loc 1 3658 7 is_stmt 1 view .LVU2860 +3658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8619 .loc 1 3658 10 is_stmt 0 view .LVU2861 + 8620 0182 0A9B ldr r3, [sp, #40] + 8621 0184 002B cmp r3, #0 + 8622 0186 04D0 beq .L499 +3658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8623 .loc 1 3658 44 discriminator 1 view .LVU2862 + 8624 0188 8023 movs r3, #128 + 8625 018a 9B04 lsls r3, r3, #18 + 8626 018c 0A99 ldr r1, [sp, #40] + 8627 018e 9942 cmp r1, r3 + 8628 0190 0FD1 bne .L500 + 8629 .L499: +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8630 .loc 1 3660 9 is_stmt 1 view .LVU2863 + 8631 0192 FAB2 uxtb r2, r7 + 8632 0194 0095 str r5, [sp] + 8633 0196 3300 movs r3, r6 + 8634 0198 0399 ldr r1, [sp, #12] + 8635 019a 2000 movs r0, r4 + 8636 019c FFF7FEFF bl I2C_TransferConfig + 8637 .LVL630: + 8638 .L501: +3668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8639 .loc 1 3668 7 view .LVU2864 +3668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8640 .loc 1 3668 7 view .LVU2865 + 8641 01a0 4023 movs r3, #64 + 8642 01a2 0022 movs r2, #0 + 8643 01a4 E254 strb r2, [r4, r3] +3668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8644 .loc 1 3668 7 view .LVU2866 +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8645 .loc 1 3677 7 view .LVU2867 + 8646 01a6 0121 movs r1, #1 + 8647 01a8 2000 movs r0, r4 + ARM GAS /tmp/cc4IUqI9.s page 332 + + + 8648 01aa FFF7FEFF bl I2C_Enable_IRQ + 8649 .LVL631: + 8650 .L498: +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8651 .loc 1 3680 5 view .LVU2868 +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8652 .loc 1 3680 12 is_stmt 0 view .LVU2869 + 8653 01ae 0020 movs r0, #0 + 8654 01b0 08E0 b .L484 + 8655 .L500: +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8656 .loc 1 3664 9 is_stmt 1 view .LVU2870 + 8657 01b2 D2B2 uxtb r2, r2 + 8658 01b4 0095 str r5, [sp] + 8659 01b6 3300 movs r3, r6 + 8660 01b8 0399 ldr r1, [sp, #12] + 8661 01ba 2000 movs r0, r4 + 8662 01bc FFF7FEFF bl I2C_TransferConfig + 8663 .LVL632: + 8664 01c0 EEE7 b .L501 + 8665 .LVL633: + 8666 .L502: +3684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8667 .loc 1 3684 12 is_stmt 0 view .LVU2871 + 8668 01c2 0220 movs r0, #2 + 8669 .LVL634: + 8670 .L484: +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8671 .loc 1 3686 1 view .LVU2872 + 8672 01c4 05B0 add sp, sp, #20 + 8673 @ sp needed + 8674 .LVL635: +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8675 .loc 1 3686 1 view .LVU2873 + 8676 01c6 F0BD pop {r4, r5, r6, r7, pc} + 8677 .LVL636: + 8678 .L503: +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8679 .loc 1 3517 5 discriminator 1 view .LVU2874 + 8680 01c8 0220 movs r0, #2 + 8681 .LVL637: +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8682 .loc 1 3517 5 discriminator 1 view .LVU2875 + 8683 01ca FBE7 b .L484 + 8684 .L510: + 8685 .align 2 + 8686 .L509: + 8687 01cc 00000000 .word I2C_Master_ISR_DMA + 8688 01d0 00200080 .word -2147475456 + 8689 01d4 00000000 .word I2C_DMAMasterTransmitCplt + 8690 01d8 00000000 .word I2C_DMAError + 8691 01dc 00000000 .word I2C_Master_ISR_IT + 8692 .cfi_endproc + 8693 .LFE64: + 8695 .section .text.HAL_I2C_Master_Seq_Receive_IT,"ax",%progbits + 8696 .align 1 + 8697 .global HAL_I2C_Master_Seq_Receive_IT + ARM GAS /tmp/cc4IUqI9.s page 333 + + + 8698 .syntax unified + 8699 .code 16 + 8700 .thumb_func + 8702 HAL_I2C_Master_Seq_Receive_IT: + 8703 .LVL638: + 8704 .LFB65: +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8705 .loc 1 3702 1 is_stmt 1 view -0 + 8706 .cfi_startproc + 8707 @ args = 4, pretend = 0, frame = 0 + 8708 @ frame_needed = 0, uses_anonymous_args = 0 +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8709 .loc 1 3702 1 is_stmt 0 view .LVU2877 + 8710 0000 70B5 push {r4, r5, r6, lr} + 8711 .cfi_def_cfa_offset 16 + 8712 .cfi_offset 4, -16 + 8713 .cfi_offset 5, -12 + 8714 .cfi_offset 6, -8 + 8715 .cfi_offset 14, -4 + 8716 0002 82B0 sub sp, sp, #8 + 8717 .cfi_def_cfa_offset 24 + 8718 0004 0400 movs r4, r0 + 8719 0006 0D00 movs r5, r1 +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; + 8720 .loc 1 3703 3 is_stmt 1 view .LVU2878 +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8721 .loc 1 3704 3 view .LVU2879 + 8722 .LVL639: +3707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8723 .loc 1 3707 3 view .LVU2880 +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8724 .loc 1 3709 3 view .LVU2881 +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8725 .loc 1 3709 11 is_stmt 0 view .LVU2882 + 8726 0008 4121 movs r1, #65 + 8727 .LVL640: +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8728 .loc 1 3709 11 view .LVU2883 + 8729 000a 415C ldrb r1, [r0, r1] +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8730 .loc 1 3709 6 view .LVU2884 + 8731 000c 2029 cmp r1, #32 + 8732 000e 4AD1 bne .L517 +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8733 .loc 1 3712 5 is_stmt 1 view .LVU2885 +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8734 .loc 1 3712 5 view .LVU2886 + 8735 0010 2031 adds r1, r1, #32 + 8736 0012 415C ldrb r1, [r0, r1] + 8737 0014 0129 cmp r1, #1 + 8738 0016 48D0 beq .L518 +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8739 .loc 1 3712 5 discriminator 2 view .LVU2887 + 8740 0018 4021 movs r1, #64 + 8741 001a 0120 movs r0, #1 + 8742 .LVL641: +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 334 + + + 8743 .loc 1 3712 5 is_stmt 0 discriminator 2 view .LVU2888 + 8744 001c 6054 strb r0, [r4, r1] +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8745 .loc 1 3712 5 is_stmt 1 discriminator 2 view .LVU2889 +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8746 .loc 1 3714 5 view .LVU2890 +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8747 .loc 1 3714 21 is_stmt 0 view .LVU2891 + 8748 001e 0131 adds r1, r1, #1 + 8749 0020 2130 adds r0, r0, #33 + 8750 0022 6054 strb r0, [r4, r1] +3715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8751 .loc 1 3715 5 is_stmt 1 view .LVU2892 +3715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8752 .loc 1 3715 21 is_stmt 0 view .LVU2893 + 8753 0024 0131 adds r1, r1, #1 + 8754 0026 1238 subs r0, r0, #18 + 8755 0028 6054 strb r0, [r4, r1] +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8756 .loc 1 3716 5 is_stmt 1 view .LVU2894 +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8757 .loc 1 3716 21 is_stmt 0 view .LVU2895 + 8758 002a 0021 movs r1, #0 + 8759 002c 6164 str r1, [r4, #68] +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8760 .loc 1 3719 5 is_stmt 1 view .LVU2896 +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8761 .loc 1 3719 23 is_stmt 0 view .LVU2897 + 8762 002e 6262 str r2, [r4, #36] +3720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8763 .loc 1 3720 5 is_stmt 1 view .LVU2898 +3720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8764 .loc 1 3720 23 is_stmt 0 view .LVU2899 + 8765 0030 6385 strh r3, [r4, #42] +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 8766 .loc 1 3721 5 is_stmt 1 view .LVU2900 +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 8767 .loc 1 3721 23 is_stmt 0 view .LVU2901 + 8768 0032 069B ldr r3, [sp, #24] + 8769 .LVL642: +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 8770 .loc 1 3721 23 view .LVU2902 + 8771 0034 E362 str r3, [r4, #44] + 8772 .LVL643: +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8773 .loc 1 3722 5 is_stmt 1 view .LVU2903 +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8774 .loc 1 3722 23 is_stmt 0 view .LVU2904 + 8775 0036 1E4B ldr r3, .L521 + 8776 0038 6363 str r3, [r4, #52] +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8777 .loc 1 3725 5 is_stmt 1 view .LVU2905 +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8778 .loc 1 3725 13 is_stmt 0 view .LVU2906 + 8779 003a 638D ldrh r3, [r4, #42] + 8780 003c 9BB2 uxth r3, r3 +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 335 + + + 8781 .loc 1 3725 8 view .LVU2907 + 8782 003e FF2B cmp r3, #255 + 8783 0040 10D9 bls .L513 +3727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8784 .loc 1 3727 7 is_stmt 1 view .LVU2908 +3727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8785 .loc 1 3727 22 is_stmt 0 view .LVU2909 + 8786 0042 FF23 movs r3, #255 + 8787 0044 2385 strh r3, [r4, #40] +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8788 .loc 1 3728 7 is_stmt 1 view .LVU2910 + 8789 .LVL644: +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8790 .loc 1 3728 16 is_stmt 0 view .LVU2911 + 8791 0046 8026 movs r6, #128 + 8792 0048 7604 lsls r6, r6, #17 + 8793 .LVL645: + 8794 .L514: +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8795 .loc 1 3739 5 is_stmt 1 view .LVU2912 +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8796 .loc 1 3739 14 is_stmt 0 view .LVU2913 + 8797 004a 236B ldr r3, [r4, #48] +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8798 .loc 1 3739 8 view .LVU2914 + 8799 004c 122B cmp r3, #18 + 8800 004e 0DD1 bne .L515 +3740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8801 .loc 1 3740 10 view .LVU2915 + 8802 0050 069B ldr r3, [sp, #24] + 8803 0052 AA2B cmp r3, #170 + 8804 0054 0AD0 beq .L515 +3740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8805 .loc 1 3740 10 discriminator 2 view .LVU2916 + 8806 0056 AA23 movs r3, #170 + 8807 0058 1B02 lsls r3, r3, #8 + 8808 005a 069A ldr r2, [sp, #24] + 8809 .LVL646: +3740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8810 .loc 1 3740 10 discriminator 2 view .LVU2917 + 8811 005c 9A42 cmp r2, r3 + 8812 005e 05D0 beq .L515 +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8813 .loc 1 3742 19 view .LVU2918 + 8814 0060 0023 movs r3, #0 + 8815 0062 0CE0 b .L516 + 8816 .LVL647: + 8817 .L513: +3732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8818 .loc 1 3732 7 is_stmt 1 view .LVU2919 +3732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8819 .loc 1 3732 28 is_stmt 0 view .LVU2920 + 8820 0064 638D ldrh r3, [r4, #42] +3732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8821 .loc 1 3732 22 view .LVU2921 + 8822 0066 2385 strh r3, [r4, #40] +3733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 336 + + + 8823 .loc 1 3733 7 is_stmt 1 view .LVU2922 +3733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8824 .loc 1 3733 16 is_stmt 0 view .LVU2923 + 8825 0068 E66A ldr r6, [r4, #44] + 8826 .LVL648: +3733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8827 .loc 1 3733 16 view .LVU2924 + 8828 006a EEE7 b .L514 + 8829 .LVL649: + 8830 .L515: +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8831 .loc 1 3747 7 is_stmt 1 view .LVU2925 + 8832 006c 2000 movs r0, r4 + 8833 006e FFF7FEFF bl I2C_ConvertOtherXferOptions + 8834 .LVL650: +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8835 .loc 1 3750 7 view .LVU2926 +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8836 .loc 1 3750 15 is_stmt 0 view .LVU2927 + 8837 0072 638D ldrh r3, [r4, #42] + 8838 0074 9BB2 uxth r3, r3 +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8839 .loc 1 3750 10 view .LVU2928 + 8840 0076 FF2B cmp r3, #255 + 8841 0078 13D8 bhi .L520 +3752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8842 .loc 1 3752 9 is_stmt 1 view .LVU2929 +3752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8843 .loc 1 3752 18 is_stmt 0 view .LVU2930 + 8844 007a E66A ldr r6, [r4, #44] + 8845 .LVL651: +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8846 .loc 1 3704 12 view .LVU2931 + 8847 007c 0D4B ldr r3, .L521+4 + 8848 .L516: + 8849 .LVL652: +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8850 .loc 1 3757 5 is_stmt 1 view .LVU2932 +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8851 .loc 1 3757 55 is_stmt 0 view .LVU2933 + 8852 007e 228D ldrh r2, [r4, #40] +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8853 .loc 1 3757 5 view .LVU2934 + 8854 0080 D2B2 uxtb r2, r2 + 8855 0082 0093 str r3, [sp] + 8856 0084 3300 movs r3, r6 + 8857 .LVL653: +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8858 .loc 1 3757 5 view .LVU2935 + 8859 0086 2900 movs r1, r5 + 8860 0088 2000 movs r0, r4 + 8861 008a FFF7FEFF bl I2C_TransferConfig + 8862 .LVL654: +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8863 .loc 1 3760 5 is_stmt 1 view .LVU2936 +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8864 .loc 1 3760 5 view .LVU2937 + ARM GAS /tmp/cc4IUqI9.s page 337 + + + 8865 008e 4023 movs r3, #64 + 8866 0090 0022 movs r2, #0 + 8867 0092 E254 strb r2, [r4, r3] +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8868 .loc 1 3760 5 view .LVU2938 +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8869 .loc 1 3765 5 view .LVU2939 + 8870 0094 0221 movs r1, #2 + 8871 0096 2000 movs r0, r4 + 8872 0098 FFF7FEFF bl I2C_Enable_IRQ + 8873 .LVL655: +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8874 .loc 1 3767 5 view .LVU2940 +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8875 .loc 1 3767 12 is_stmt 0 view .LVU2941 + 8876 009c 0020 movs r0, #0 + 8877 .LVL656: + 8878 .L512: +3773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8879 .loc 1 3773 1 view .LVU2942 + 8880 009e 02B0 add sp, sp, #8 + 8881 @ sp needed + 8882 .LVL657: + 8883 .LVL658: +3773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8884 .loc 1 3773 1 view .LVU2943 + 8885 00a0 70BD pop {r4, r5, r6, pc} + 8886 .LVL659: + 8887 .L520: +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8888 .loc 1 3704 12 view .LVU2944 + 8889 00a2 044B ldr r3, .L521+4 + 8890 00a4 EBE7 b .L516 + 8891 .LVL660: + 8892 .L517: +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8893 .loc 1 3771 12 view .LVU2945 + 8894 00a6 0220 movs r0, #2 + 8895 .LVL661: +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8896 .loc 1 3771 12 view .LVU2946 + 8897 00a8 F9E7 b .L512 + 8898 .LVL662: + 8899 .L518: +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8900 .loc 1 3712 5 discriminator 1 view .LVU2947 + 8901 00aa 0220 movs r0, #2 + 8902 .LVL663: +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8903 .loc 1 3712 5 discriminator 1 view .LVU2948 + 8904 00ac F7E7 b .L512 + 8905 .L522: + 8906 00ae C046 .align 2 + 8907 .L521: + 8908 00b0 00000000 .word I2C_Master_ISR_IT + 8909 00b4 00240080 .word -2147474432 + 8910 .cfi_endproc + ARM GAS /tmp/cc4IUqI9.s page 338 + + + 8911 .LFE65: + 8913 .section .text.HAL_I2C_Master_Seq_Receive_DMA,"ax",%progbits + 8914 .align 1 + 8915 .global HAL_I2C_Master_Seq_Receive_DMA + 8916 .syntax unified + 8917 .code 16 + 8918 .thumb_func + 8920 HAL_I2C_Master_Seq_Receive_DMA: + 8921 .LVL664: + 8922 .LFB66: +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8923 .loc 1 3789 1 is_stmt 1 view -0 + 8924 .cfi_startproc + 8925 @ args = 4, pretend = 0, frame = 8 + 8926 @ frame_needed = 0, uses_anonymous_args = 0 +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8927 .loc 1 3789 1 is_stmt 0 view .LVU2950 + 8928 0000 F0B5 push {r4, r5, r6, r7, lr} + 8929 .cfi_def_cfa_offset 20 + 8930 .cfi_offset 4, -20 + 8931 .cfi_offset 5, -16 + 8932 .cfi_offset 6, -12 + 8933 .cfi_offset 7, -8 + 8934 .cfi_offset 14, -4 + 8935 0002 85B0 sub sp, sp, #20 + 8936 .cfi_def_cfa_offset 40 + 8937 0004 0400 movs r4, r0 + 8938 0006 0391 str r1, [sp, #12] + 8939 0008 1500 movs r5, r2 +3790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; + 8940 .loc 1 3790 3 is_stmt 1 view .LVU2951 +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8941 .loc 1 3791 3 view .LVU2952 + 8942 .LVL665: +3792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8943 .loc 1 3792 3 view .LVU2953 +3795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8944 .loc 1 3795 3 view .LVU2954 +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8945 .loc 1 3797 3 view .LVU2955 +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8946 .loc 1 3797 11 is_stmt 0 view .LVU2956 + 8947 000a 4122 movs r2, #65 + 8948 .LVL666: +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8949 .loc 1 3797 11 view .LVU2957 + 8950 000c 825C ldrb r2, [r0, r2] +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8951 .loc 1 3797 6 view .LVU2958 + 8952 000e 202A cmp r2, #32 + 8953 0010 00D0 beq .LCB8518 + 8954 0012 9DE0 b .L534 @long jump + 8955 .LCB8518: +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8956 .loc 1 3800 5 is_stmt 1 view .LVU2959 +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8957 .loc 1 3800 5 view .LVU2960 + ARM GAS /tmp/cc4IUqI9.s page 339 + + + 8958 0014 2032 adds r2, r2, #32 + 8959 0016 825C ldrb r2, [r0, r2] + 8960 0018 012A cmp r2, #1 + 8961 001a 00D1 bne .LCB8524 + 8962 001c 9BE0 b .L535 @long jump + 8963 .LCB8524: +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8964 .loc 1 3800 5 discriminator 2 view .LVU2961 + 8965 001e 4022 movs r2, #64 + 8966 0020 0121 movs r1, #1 + 8967 .LVL667: +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8968 .loc 1 3800 5 is_stmt 0 discriminator 2 view .LVU2962 + 8969 0022 8154 strb r1, [r0, r2] +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8970 .loc 1 3800 5 is_stmt 1 discriminator 2 view .LVU2963 +3802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8971 .loc 1 3802 5 view .LVU2964 +3802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8972 .loc 1 3802 21 is_stmt 0 view .LVU2965 + 8973 0024 0132 adds r2, r2, #1 + 8974 0026 2131 adds r1, r1, #33 + 8975 0028 8154 strb r1, [r0, r2] +3803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8976 .loc 1 3803 5 is_stmt 1 view .LVU2966 +3803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8977 .loc 1 3803 21 is_stmt 0 view .LVU2967 + 8978 002a 0132 adds r2, r2, #1 + 8979 002c 1239 subs r1, r1, #18 + 8980 002e 8154 strb r1, [r0, r2] +3804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8981 .loc 1 3804 5 is_stmt 1 view .LVU2968 +3804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8982 .loc 1 3804 21 is_stmt 0 view .LVU2969 + 8983 0030 0022 movs r2, #0 + 8984 0032 4264 str r2, [r0, #68] +3807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8985 .loc 1 3807 5 is_stmt 1 view .LVU2970 +3807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8986 .loc 1 3807 23 is_stmt 0 view .LVU2971 + 8987 0034 4562 str r5, [r0, #36] +3808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8988 .loc 1 3808 5 is_stmt 1 view .LVU2972 +3808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8989 .loc 1 3808 23 is_stmt 0 view .LVU2973 + 8990 0036 4385 strh r3, [r0, #42] +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8991 .loc 1 3809 5 is_stmt 1 view .LVU2974 +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8992 .loc 1 3809 23 is_stmt 0 view .LVU2975 + 8993 0038 0A9B ldr r3, [sp, #40] + 8994 .LVL668: +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8995 .loc 1 3809 23 view .LVU2976 + 8996 003a C362 str r3, [r0, #44] + 8997 .LVL669: +3810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 340 + + + 8998 .loc 1 3810 5 is_stmt 1 view .LVU2977 +3810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8999 .loc 1 3810 23 is_stmt 0 view .LVU2978 + 9000 003c 474B ldr r3, .L540 + 9001 003e 4363 str r3, [r0, #52] +3813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9002 .loc 1 3813 5 is_stmt 1 view .LVU2979 +3813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9003 .loc 1 3813 13 is_stmt 0 view .LVU2980 + 9004 0040 438D ldrh r3, [r0, #42] + 9005 0042 9BB2 uxth r3, r3 +3813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9006 .loc 1 3813 8 view .LVU2981 + 9007 0044 FF2B cmp r3, #255 + 9008 0046 10D9 bls .L525 +3815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 9009 .loc 1 3815 7 is_stmt 1 view .LVU2982 +3815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 9010 .loc 1 3815 22 is_stmt 0 view .LVU2983 + 9011 0048 FF23 movs r3, #255 + 9012 004a 0385 strh r3, [r0, #40] +3816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9013 .loc 1 3816 7 is_stmt 1 view .LVU2984 + 9014 .LVL670: +3816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9015 .loc 1 3816 16 is_stmt 0 view .LVU2985 + 9016 004c 8027 movs r7, #128 + 9017 004e 7F04 lsls r7, r7, #17 + 9018 .LVL671: + 9019 .L526: +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 9020 .loc 1 3827 5 is_stmt 1 view .LVU2986 +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 9021 .loc 1 3827 14 is_stmt 0 view .LVU2987 + 9022 0050 236B ldr r3, [r4, #48] +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 9023 .loc 1 3827 8 view .LVU2988 + 9024 0052 122B cmp r3, #18 + 9025 0054 0DD1 bne .L527 +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9026 .loc 1 3828 10 view .LVU2989 + 9027 0056 0A9B ldr r3, [sp, #40] + 9028 0058 AA2B cmp r3, #170 + 9029 005a 0AD0 beq .L527 +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9030 .loc 1 3828 10 discriminator 2 view .LVU2990 + 9031 005c AA23 movs r3, #170 + 9032 005e 1B02 lsls r3, r3, #8 + 9033 0060 0A9A ldr r2, [sp, #40] + 9034 0062 9A42 cmp r2, r3 + 9035 0064 05D0 beq .L527 +3830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9036 .loc 1 3830 19 view .LVU2991 + 9037 0066 0026 movs r6, #0 + 9038 0068 0CE0 b .L528 + 9039 .LVL672: + 9040 .L525: + ARM GAS /tmp/cc4IUqI9.s page 341 + + +3820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 9041 .loc 1 3820 7 is_stmt 1 view .LVU2992 +3820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 9042 .loc 1 3820 28 is_stmt 0 view .LVU2993 + 9043 006a 438D ldrh r3, [r0, #42] +3820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 9044 .loc 1 3820 22 view .LVU2994 + 9045 006c 0385 strh r3, [r0, #40] +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9046 .loc 1 3821 7 is_stmt 1 view .LVU2995 +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9047 .loc 1 3821 16 is_stmt 0 view .LVU2996 + 9048 006e C76A ldr r7, [r0, #44] + 9049 .LVL673: +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9050 .loc 1 3821 16 view .LVU2997 + 9051 0070 EEE7 b .L526 + 9052 .L527: +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9053 .loc 1 3835 7 is_stmt 1 view .LVU2998 + 9054 0072 2000 movs r0, r4 + 9055 .LVL674: +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9056 .loc 1 3835 7 is_stmt 0 view .LVU2999 + 9057 0074 FFF7FEFF bl I2C_ConvertOtherXferOptions + 9058 .LVL675: +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9059 .loc 1 3838 7 is_stmt 1 view .LVU3000 +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9060 .loc 1 3838 15 is_stmt 0 view .LVU3001 + 9061 0078 638D ldrh r3, [r4, #42] + 9062 007a 9BB2 uxth r3, r3 +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9063 .loc 1 3838 10 view .LVU3002 + 9064 007c FF2B cmp r3, #255 + 9065 007e 28D8 bhi .L537 +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9066 .loc 1 3840 9 is_stmt 1 view .LVU3003 +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9067 .loc 1 3840 18 is_stmt 0 view .LVU3004 + 9068 0080 E76A ldr r7, [r4, #44] + 9069 .LVL676: +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 9070 .loc 1 3791 12 view .LVU3005 + 9071 0082 374E ldr r6, .L540+4 + 9072 .L528: + 9073 .LVL677: +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9074 .loc 1 3844 5 is_stmt 1 view .LVU3006 +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9075 .loc 1 3844 13 is_stmt 0 view .LVU3007 + 9076 0084 228D ldrh r2, [r4, #40] +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9077 .loc 1 3844 8 view .LVU3008 + 9078 0086 002A cmp r2, #0 + 9079 0088 4ED0 beq .L529 +3846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 342 + + + 9080 .loc 1 3846 7 is_stmt 1 view .LVU3009 +3846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9081 .loc 1 3846 15 is_stmt 0 view .LVU3010 + 9082 008a E36B ldr r3, [r4, #60] +3846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9083 .loc 1 3846 10 view .LVU3011 + 9084 008c 002B cmp r3, #0 + 9085 008e 22D0 beq .L530 +3849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9086 .loc 1 3849 9 is_stmt 1 view .LVU3012 +3849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9087 .loc 1 3849 40 is_stmt 0 view .LVU3013 + 9088 0090 344A ldr r2, .L540+8 + 9089 0092 9A62 str r2, [r3, #40] +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9090 .loc 1 3852 9 is_stmt 1 view .LVU3014 +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9091 .loc 1 3852 13 is_stmt 0 view .LVU3015 + 9092 0094 E36B ldr r3, [r4, #60] +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9093 .loc 1 3852 41 view .LVU3016 + 9094 0096 344A ldr r2, .L540+12 + 9095 0098 1A63 str r2, [r3, #48] +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 9096 .loc 1 3855 9 is_stmt 1 view .LVU3017 +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 9097 .loc 1 3855 13 is_stmt 0 view .LVU3018 + 9098 009a E26B ldr r2, [r4, #60] +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 9099 .loc 1 3855 44 view .LVU3019 + 9100 009c 0023 movs r3, #0 + 9101 009e D362 str r3, [r2, #44] +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9102 .loc 1 3856 9 is_stmt 1 view .LVU3020 +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9103 .loc 1 3856 13 is_stmt 0 view .LVU3021 + 9104 00a0 E26B ldr r2, [r4, #60] +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9105 .loc 1 3856 41 view .LVU3022 + 9106 00a2 5363 str r3, [r2, #52] +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9107 .loc 1 3859 9 is_stmt 1 view .LVU3023 +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9108 .loc 1 3859 71 is_stmt 0 view .LVU3024 + 9109 00a4 2168 ldr r1, [r4] +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9110 .loc 1 3859 66 view .LVU3025 + 9111 00a6 2431 adds r1, r1, #36 +3860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9112 .loc 1 3860 46 view .LVU3026 + 9113 00a8 238D ldrh r3, [r4, #40] +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9114 .loc 1 3859 25 view .LVU3027 + 9115 00aa E06B ldr r0, [r4, #60] + 9116 00ac 2A00 movs r2, r5 + 9117 00ae FFF7FEFF bl HAL_DMA_Start_IT + 9118 .LVL678: + ARM GAS /tmp/cc4IUqI9.s page 343 + + +3877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9119 .loc 1 3877 7 is_stmt 1 view .LVU3028 +3877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9120 .loc 1 3877 10 is_stmt 0 view .LVU3029 + 9121 00b2 0028 cmp r0, #0 + 9122 00b4 1DD0 beq .L539 +3900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9123 .loc 1 3900 9 is_stmt 1 view .LVU3030 +3900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9124 .loc 1 3900 25 is_stmt 0 view .LVU3031 + 9125 00b6 4123 movs r3, #65 + 9126 00b8 2022 movs r2, #32 + 9127 00ba E254 strb r2, [r4, r3] +3901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9128 .loc 1 3901 9 is_stmt 1 view .LVU3032 +3901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9129 .loc 1 3901 25 is_stmt 0 view .LVU3033 + 9130 00bc 0022 movs r2, #0 + 9131 00be 0133 adds r3, r3, #1 + 9132 00c0 E254 strb r2, [r4, r3] +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9133 .loc 1 3904 9 is_stmt 1 view .LVU3034 +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9134 .loc 1 3904 13 is_stmt 0 view .LVU3035 + 9135 00c2 636C ldr r3, [r4, #68] +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9136 .loc 1 3904 25 view .LVU3036 + 9137 00c4 1021 movs r1, #16 + 9138 00c6 0B43 orrs r3, r1 + 9139 00c8 6364 str r3, [r4, #68] +3907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9140 .loc 1 3907 9 is_stmt 1 view .LVU3037 +3907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9141 .loc 1 3907 9 view .LVU3038 + 9142 00ca 4023 movs r3, #64 + 9143 00cc E254 strb r2, [r4, r3] +3907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9144 .loc 1 3907 9 view .LVU3039 +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9145 .loc 1 3909 9 view .LVU3040 +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9146 .loc 1 3909 16 is_stmt 0 view .LVU3041 + 9147 00ce 0120 movs r0, #1 + 9148 .LVL679: +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9149 .loc 1 3909 16 view .LVU3042 + 9150 00d0 3FE0 b .L524 + 9151 .LVL680: + 9152 .L537: +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 9153 .loc 1 3791 12 view .LVU3043 + 9154 00d2 234E ldr r6, .L540+4 + 9155 00d4 D6E7 b .L528 + 9156 .LVL681: + 9157 .L530: +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9158 .loc 1 3865 9 is_stmt 1 view .LVU3044 + ARM GAS /tmp/cc4IUqI9.s page 344 + + +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9159 .loc 1 3865 25 is_stmt 0 view .LVU3045 + 9160 00d6 4123 movs r3, #65 + 9161 00d8 2022 movs r2, #32 + 9162 00da E254 strb r2, [r4, r3] +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9163 .loc 1 3866 9 is_stmt 1 view .LVU3046 +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9164 .loc 1 3866 25 is_stmt 0 view .LVU3047 + 9165 00dc 0022 movs r2, #0 + 9166 00de 0133 adds r3, r3, #1 + 9167 00e0 E254 strb r2, [r4, r3] +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9168 .loc 1 3869 9 is_stmt 1 view .LVU3048 +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9169 .loc 1 3869 13 is_stmt 0 view .LVU3049 + 9170 00e2 636C ldr r3, [r4, #68] +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9171 .loc 1 3869 25 view .LVU3050 + 9172 00e4 8021 movs r1, #128 + 9173 00e6 0B43 orrs r3, r1 + 9174 00e8 6364 str r3, [r4, #68] +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9175 .loc 1 3872 9 is_stmt 1 view .LVU3051 +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9176 .loc 1 3872 9 view .LVU3052 + 9177 00ea 4023 movs r3, #64 + 9178 00ec E254 strb r2, [r4, r3] +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9179 .loc 1 3872 9 view .LVU3053 +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9180 .loc 1 3874 9 view .LVU3054 +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9181 .loc 1 3874 16 is_stmt 0 view .LVU3055 + 9182 00ee 0120 movs r0, #1 + 9183 00f0 2FE0 b .L524 + 9184 .LVL682: + 9185 .L539: +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9186 .loc 1 3880 9 is_stmt 1 view .LVU3056 +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9187 .loc 1 3880 59 is_stmt 0 view .LVU3057 + 9188 00f2 228D ldrh r2, [r4, #40] +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9189 .loc 1 3880 9 view .LVU3058 + 9190 00f4 D2B2 uxtb r2, r2 + 9191 00f6 0096 str r6, [sp] + 9192 00f8 3B00 movs r3, r7 + 9193 00fa 0399 ldr r1, [sp, #12] + 9194 00fc 2000 movs r0, r4 + 9195 .LVL683: +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9196 .loc 1 3880 9 view .LVU3059 + 9197 00fe FFF7FEFF bl I2C_TransferConfig + 9198 .LVL684: +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9199 .loc 1 3883 9 is_stmt 1 view .LVU3060 + ARM GAS /tmp/cc4IUqI9.s page 345 + + +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9200 .loc 1 3883 13 is_stmt 0 view .LVU3061 + 9201 0102 638D ldrh r3, [r4, #42] +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9202 .loc 1 3883 32 view .LVU3062 + 9203 0104 228D ldrh r2, [r4, #40] +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9204 .loc 1 3883 25 view .LVU3063 + 9205 0106 9B1A subs r3, r3, r2 + 9206 0108 9BB2 uxth r3, r3 + 9207 010a 6385 strh r3, [r4, #42] +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9208 .loc 1 3886 9 is_stmt 1 view .LVU3064 +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9209 .loc 1 3886 9 view .LVU3065 + 9210 010c 4023 movs r3, #64 + 9211 010e 0022 movs r2, #0 + 9212 0110 E254 strb r2, [r4, r3] +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9213 .loc 1 3886 9 view .LVU3066 +3892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9214 .loc 1 3892 9 view .LVU3067 + 9215 0112 1021 movs r1, #16 + 9216 0114 2000 movs r0, r4 + 9217 0116 FFF7FEFF bl I2C_Enable_IRQ + 9218 .LVL685: +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9219 .loc 1 3895 9 view .LVU3068 +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9220 .loc 1 3895 13 is_stmt 0 view .LVU3069 + 9221 011a 2268 ldr r2, [r4] +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9222 .loc 1 3895 23 view .LVU3070 + 9223 011c 1168 ldr r1, [r2] +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9224 .loc 1 3895 29 view .LVU3071 + 9225 011e 8023 movs r3, #128 + 9226 0120 1B02 lsls r3, r3, #8 + 9227 0122 0B43 orrs r3, r1 + 9228 0124 1360 str r3, [r2] + 9229 0126 11E0 b .L533 + 9230 .LVL686: + 9231 .L529: +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9232 .loc 1 3915 7 is_stmt 1 view .LVU3072 +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9233 .loc 1 3915 21 is_stmt 0 view .LVU3073 + 9234 0128 104B ldr r3, .L540+16 + 9235 012a 6363 str r3, [r4, #52] +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 9236 .loc 1 3919 7 is_stmt 1 view .LVU3074 + 9237 012c 8023 movs r3, #128 + 9238 012e D2B2 uxtb r2, r2 + 9239 0130 0B49 ldr r1, .L540+4 + 9240 0132 0091 str r1, [sp] + 9241 0134 9B04 lsls r3, r3, #18 + 9242 0136 0399 ldr r1, [sp, #12] + ARM GAS /tmp/cc4IUqI9.s page 346 + + + 9243 0138 2000 movs r0, r4 + 9244 013a FFF7FEFF bl I2C_TransferConfig + 9245 .LVL687: +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9246 .loc 1 3923 7 view .LVU3075 +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9247 .loc 1 3923 7 view .LVU3076 + 9248 013e 4023 movs r3, #64 + 9249 0140 0022 movs r2, #0 + 9250 0142 E254 strb r2, [r4, r3] +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9251 .loc 1 3923 7 view .LVU3077 +3932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9252 .loc 1 3932 7 view .LVU3078 + 9253 0144 0221 movs r1, #2 + 9254 0146 2000 movs r0, r4 + 9255 0148 FFF7FEFF bl I2C_Enable_IRQ + 9256 .LVL688: + 9257 .L533: +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9258 .loc 1 3935 5 view .LVU3079 +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9259 .loc 1 3935 12 is_stmt 0 view .LVU3080 + 9260 014c 0020 movs r0, #0 + 9261 014e 00E0 b .L524 + 9262 .LVL689: + 9263 .L534: +3939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9264 .loc 1 3939 12 view .LVU3081 + 9265 0150 0220 movs r0, #2 + 9266 .LVL690: + 9267 .L524: +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9268 .loc 1 3941 1 view .LVU3082 + 9269 0152 05B0 add sp, sp, #20 + 9270 @ sp needed + 9271 .LVL691: + 9272 .LVL692: +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9273 .loc 1 3941 1 view .LVU3083 + 9274 0154 F0BD pop {r4, r5, r6, r7, pc} + 9275 .LVL693: + 9276 .L535: +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9277 .loc 1 3800 5 discriminator 1 view .LVU3084 + 9278 0156 0220 movs r0, #2 + 9279 .LVL694: +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9280 .loc 1 3800 5 discriminator 1 view .LVU3085 + 9281 0158 FBE7 b .L524 + 9282 .L541: + 9283 015a C046 .align 2 + 9284 .L540: + 9285 015c 00000000 .word I2C_Master_ISR_DMA + 9286 0160 00240080 .word -2147474432 + 9287 0164 00000000 .word I2C_DMAMasterReceiveCplt + 9288 0168 00000000 .word I2C_DMAError + ARM GAS /tmp/cc4IUqI9.s page 347 + + + 9289 016c 00000000 .word I2C_Master_ISR_IT + 9290 .cfi_endproc + 9291 .LFE66: + 9293 .section .text.HAL_I2C_Slave_Seq_Transmit_IT,"ax",%progbits + 9294 .align 1 + 9295 .global HAL_I2C_Slave_Seq_Transmit_IT + 9296 .syntax unified + 9297 .code 16 + 9298 .thumb_func + 9300 HAL_I2C_Slave_Seq_Transmit_IT: + 9301 .LVL695: + 9302 .LFB67: +3955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9303 .loc 1 3955 1 is_stmt 1 view -0 + 9304 .cfi_startproc + 9305 @ args = 0, pretend = 0, frame = 0 + 9306 @ frame_needed = 0, uses_anonymous_args = 0 +3955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9307 .loc 1 3955 1 is_stmt 0 view .LVU3087 + 9308 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9309 .cfi_def_cfa_offset 24 + 9310 .cfi_offset 3, -24 + 9311 .cfi_offset 4, -20 + 9312 .cfi_offset 5, -16 + 9313 .cfi_offset 6, -12 + 9314 .cfi_offset 7, -8 + 9315 .cfi_offset 14, -4 + 9316 0002 0400 movs r4, r0 + 9317 0004 0D00 movs r5, r1 + 9318 0006 1600 movs r6, r2 + 9319 0008 1F00 movs r7, r3 +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9320 .loc 1 3957 3 is_stmt 1 view .LVU3088 +3960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9321 .loc 1 3960 3 view .LVU3089 +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9322 .loc 1 3962 3 view .LVU3090 +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9323 .loc 1 3962 22 is_stmt 0 view .LVU3091 + 9324 000a 4123 movs r3, #65 + 9325 .LVL696: +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9326 .loc 1 3962 22 view .LVU3092 + 9327 000c C35C ldrb r3, [r0, r3] +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9328 .loc 1 3962 6 view .LVU3093 + 9329 000e 2822 movs r2, #40 + 9330 .LVL697: +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9331 .loc 1 3962 6 view .LVU3094 + 9332 0010 1340 ands r3, r2 + 9333 0012 282B cmp r3, #40 + 9334 0014 58D1 bne .L548 +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9335 .loc 1 3964 5 is_stmt 1 view .LVU3095 +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9336 .loc 1 3964 8 is_stmt 0 view .LVU3096 + ARM GAS /tmp/cc4IUqI9.s page 348 + + + 9337 0016 0029 cmp r1, #0 + 9338 0018 01D0 beq .L544 +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9339 .loc 1 3964 25 discriminator 1 view .LVU3097 + 9340 001a 002E cmp r6, #0 + 9341 001c 04D1 bne .L545 + 9342 .L544: +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9343 .loc 1 3966 7 is_stmt 1 view .LVU3098 +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9344 .loc 1 3966 23 is_stmt 0 view .LVU3099 + 9345 001e 8023 movs r3, #128 + 9346 0020 9B00 lsls r3, r3, #2 + 9347 0022 6364 str r3, [r4, #68] +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9348 .loc 1 3967 7 is_stmt 1 view .LVU3100 +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9349 .loc 1 3967 15 is_stmt 0 view .LVU3101 + 9350 0024 0120 movs r0, #1 + 9351 .LVL698: +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9352 .loc 1 3967 15 view .LVU3102 + 9353 0026 50E0 b .L543 + 9354 .LVL699: + 9355 .L545: +3971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9356 .loc 1 3971 5 is_stmt 1 view .LVU3103 + 9357 0028 2949 ldr r1, .L553 + 9358 .LVL700: +3971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9359 .loc 1 3971 5 is_stmt 0 view .LVU3104 + 9360 002a FFF7FEFF bl I2C_Disable_IRQ + 9361 .LVL701: +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9362 .loc 1 3974 5 is_stmt 1 view .LVU3105 +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9363 .loc 1 3974 5 view .LVU3106 + 9364 002e 4023 movs r3, #64 + 9365 0030 E35C ldrb r3, [r4, r3] + 9366 0032 012B cmp r3, #1 + 9367 0034 4AD0 beq .L549 +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9368 .loc 1 3974 5 discriminator 2 view .LVU3107 + 9369 0036 4023 movs r3, #64 + 9370 0038 0122 movs r2, #1 + 9371 003a E254 strb r2, [r4, r3] +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9372 .loc 1 3974 5 discriminator 2 view .LVU3108 +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9373 .loc 1 3978 5 view .LVU3109 +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9374 .loc 1 3978 13 is_stmt 0 view .LVU3110 + 9375 003c 0133 adds r3, r3, #1 + 9376 003e E35C ldrb r3, [r4, r3] +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9377 .loc 1 3978 8 view .LVU3111 + 9378 0040 2A2B cmp r3, #42 + ARM GAS /tmp/cc4IUqI9.s page 349 + + + 9379 0042 27D0 beq .L552 + 9380 .L546: +4004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9381 .loc 1 4004 5 is_stmt 1 view .LVU3112 +4004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9382 .loc 1 4004 21 is_stmt 0 view .LVU3113 + 9383 0044 4123 movs r3, #65 + 9384 0046 2922 movs r2, #41 + 9385 0048 E254 strb r2, [r4, r3] +4005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9386 .loc 1 4005 5 is_stmt 1 view .LVU3114 +4005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9387 .loc 1 4005 21 is_stmt 0 view .LVU3115 + 9388 004a 0133 adds r3, r3, #1 + 9389 004c 093A subs r2, r2, #9 + 9390 004e E254 strb r2, [r4, r3] +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9391 .loc 1 4006 5 is_stmt 1 view .LVU3116 +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9392 .loc 1 4006 21 is_stmt 0 view .LVU3117 + 9393 0050 0023 movs r3, #0 + 9394 0052 6364 str r3, [r4, #68] +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9395 .loc 1 4009 5 is_stmt 1 view .LVU3118 +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9396 .loc 1 4009 9 is_stmt 0 view .LVU3119 + 9397 0054 2268 ldr r2, [r4] +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9398 .loc 1 4009 19 view .LVU3120 + 9399 0056 5368 ldr r3, [r2, #4] +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9400 .loc 1 4009 25 view .LVU3121 + 9401 0058 1E49 ldr r1, .L553+4 + 9402 005a 0B40 ands r3, r1 + 9403 005c 5360 str r3, [r2, #4] +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9404 .loc 1 4012 5 is_stmt 1 view .LVU3122 +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9405 .loc 1 4012 23 is_stmt 0 view .LVU3123 + 9406 005e 6562 str r5, [r4, #36] +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9407 .loc 1 4013 5 is_stmt 1 view .LVU3124 +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9408 .loc 1 4013 23 is_stmt 0 view .LVU3125 + 9409 0060 6685 strh r6, [r4, #42] +4014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9410 .loc 1 4014 5 is_stmt 1 view .LVU3126 +4014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9411 .loc 1 4014 29 is_stmt 0 view .LVU3127 + 9412 0062 638D ldrh r3, [r4, #42] +4014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9413 .loc 1 4014 23 view .LVU3128 + 9414 0064 2385 strh r3, [r4, #40] +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9415 .loc 1 4015 5 is_stmt 1 view .LVU3129 +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9416 .loc 1 4015 23 is_stmt 0 view .LVU3130 + ARM GAS /tmp/cc4IUqI9.s page 350 + + + 9417 0066 E762 str r7, [r4, #44] +4016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9418 .loc 1 4016 5 is_stmt 1 view .LVU3131 +4016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9419 .loc 1 4016 23 is_stmt 0 view .LVU3132 + 9420 0068 1B4B ldr r3, .L553+8 + 9421 006a 6363 str r3, [r4, #52] +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 9422 .loc 1 4018 5 is_stmt 1 view .LVU3133 +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 9423 .loc 1 4018 11 is_stmt 0 view .LVU3134 + 9424 006c 2268 ldr r2, [r4] + 9425 006e 9169 ldr r1, [r2, #24] + 9426 0070 0823 movs r3, #8 + 9427 0072 0B40 ands r3, r1 + 9428 .LVL702: +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9429 .loc 1 4019 5 is_stmt 1 view .LVU3135 +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9430 .loc 1 4019 10 is_stmt 0 view .LVU3136 + 9431 0074 9169 ldr r1, [r2, #24] +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9432 .loc 1 4019 8 view .LVU3137 + 9433 0076 C903 lsls r1, r1, #15 + 9434 0078 03D5 bpl .L547 +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9435 .loc 1 4019 54 discriminator 1 view .LVU3138 + 9436 007a 002B cmp r3, #0 + 9437 007c 01D0 beq .L547 +4023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9438 .loc 1 4023 7 is_stmt 1 view .LVU3139 + 9439 007e 0823 movs r3, #8 + 9440 .LVL703: +4023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9441 .loc 1 4023 7 is_stmt 0 view .LVU3140 + 9442 0080 D361 str r3, [r2, #28] + 9443 .L547: +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9444 .loc 1 4027 5 is_stmt 1 view .LVU3141 +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9445 .loc 1 4027 5 view .LVU3142 + 9446 0082 4023 movs r3, #64 + 9447 0084 0022 movs r2, #0 + 9448 0086 E254 strb r2, [r4, r3] +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9449 .loc 1 4027 5 view .LVU3143 +4033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9450 .loc 1 4033 5 view .LVU3144 + 9451 0088 1149 ldr r1, .L553 + 9452 008a 2000 movs r0, r4 + 9453 008c FFF7FEFF bl I2C_Enable_IRQ + 9454 .LVL704: +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9455 .loc 1 4035 5 view .LVU3145 +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9456 .loc 1 4035 12 is_stmt 0 view .LVU3146 + 9457 0090 0020 movs r0, #0 + ARM GAS /tmp/cc4IUqI9.s page 351 + + + 9458 0092 1AE0 b .L543 + 9459 .LVL705: + 9460 .L552: +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9461 .loc 1 3981 7 is_stmt 1 view .LVU3147 + 9462 0094 0221 movs r1, #2 + 9463 0096 2000 movs r0, r4 + 9464 0098 FFF7FEFF bl I2C_Disable_IRQ + 9465 .LVL706: +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9466 .loc 1 3984 7 view .LVU3148 +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9467 .loc 1 3984 16 is_stmt 0 view .LVU3149 + 9468 009c 2268 ldr r2, [r4] +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9469 .loc 1 3984 26 view .LVU3150 + 9470 009e 1368 ldr r3, [r2] +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9471 .loc 1 3984 10 view .LVU3151 + 9472 00a0 1B04 lsls r3, r3, #16 + 9473 00a2 CFD5 bpl .L546 +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9474 .loc 1 3986 9 is_stmt 1 view .LVU3152 +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9475 .loc 1 3986 23 is_stmt 0 view .LVU3153 + 9476 00a4 1368 ldr r3, [r2] +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9477 .loc 1 3986 29 view .LVU3154 + 9478 00a6 0B49 ldr r1, .L553+4 + 9479 00a8 0B40 ands r3, r1 + 9480 00aa 1360 str r3, [r2] +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9481 .loc 1 3988 9 is_stmt 1 view .LVU3155 +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9482 .loc 1 3988 17 is_stmt 0 view .LVU3156 + 9483 00ac E36B ldr r3, [r4, #60] +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9484 .loc 1 3988 12 view .LVU3157 + 9485 00ae 002B cmp r3, #0 + 9486 00b0 C8D0 beq .L546 +3992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9487 .loc 1 3992 11 is_stmt 1 view .LVU3158 +3992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9488 .loc 1 3992 43 is_stmt 0 view .LVU3159 + 9489 00b2 0A4A ldr r2, .L553+12 + 9490 00b4 5A63 str r2, [r3, #52] +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9491 .loc 1 3995 11 is_stmt 1 view .LVU3160 +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9492 .loc 1 3995 15 is_stmt 0 view .LVU3161 + 9493 00b6 E06B ldr r0, [r4, #60] + 9494 00b8 FFF7FEFF bl HAL_DMA_Abort_IT + 9495 .LVL707: +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9496 .loc 1 3995 14 discriminator 1 view .LVU3162 + 9497 00bc 0028 cmp r0, #0 + 9498 00be C1D0 beq .L546 + ARM GAS /tmp/cc4IUqI9.s page 352 + + +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9499 .loc 1 3998 13 is_stmt 1 view .LVU3163 +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9500 .loc 1 3998 17 is_stmt 0 view .LVU3164 + 9501 00c0 E06B ldr r0, [r4, #60] +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9502 .loc 1 3998 25 view .LVU3165 + 9503 00c2 436B ldr r3, [r0, #52] +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9504 .loc 1 3998 13 view .LVU3166 + 9505 00c4 9847 blx r3 + 9506 .LVL708: + 9507 00c6 BDE7 b .L546 + 9508 .LVL709: + 9509 .L548: +4039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9510 .loc 1 4039 12 view .LVU3167 + 9511 00c8 0120 movs r0, #1 + 9512 .LVL710: + 9513 .L543: +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9514 .loc 1 4041 1 view .LVU3168 + 9515 @ sp needed + 9516 .LVL711: + 9517 .LVL712: + 9518 .LVL713: + 9519 .LVL714: +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9520 .loc 1 4041 1 view .LVU3169 + 9521 00ca F8BD pop {r3, r4, r5, r6, r7, pc} + 9522 .LVL715: + 9523 .L549: +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9524 .loc 1 3974 5 discriminator 1 view .LVU3170 + 9525 00cc 0220 movs r0, #2 + 9526 00ce FCE7 b .L543 + 9527 .L554: + 9528 .align 2 + 9529 .L553: + 9530 00d0 01800000 .word 32769 + 9531 00d4 FF7FFFFF .word -32769 + 9532 00d8 00000000 .word I2C_Slave_ISR_IT + 9533 00dc 00000000 .word I2C_DMAAbort + 9534 .cfi_endproc + 9535 .LFE67: + 9537 .section .text.HAL_I2C_Slave_Seq_Transmit_DMA,"ax",%progbits + 9538 .align 1 + 9539 .global HAL_I2C_Slave_Seq_Transmit_DMA + 9540 .syntax unified + 9541 .code 16 + 9542 .thumb_func + 9544 HAL_I2C_Slave_Seq_Transmit_DMA: + 9545 .LVL716: + 9546 .LFB68: +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9547 .loc 1 4055 1 is_stmt 1 view -0 + 9548 .cfi_startproc + ARM GAS /tmp/cc4IUqI9.s page 353 + + + 9549 @ args = 0, pretend = 0, frame = 0 + 9550 @ frame_needed = 0, uses_anonymous_args = 0 +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9551 .loc 1 4055 1 is_stmt 0 view .LVU3172 + 9552 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9553 .cfi_def_cfa_offset 24 + 9554 .cfi_offset 3, -24 + 9555 .cfi_offset 4, -20 + 9556 .cfi_offset 5, -16 + 9557 .cfi_offset 6, -12 + 9558 .cfi_offset 7, -8 + 9559 .cfi_offset 14, -4 + 9560 0002 0400 movs r4, r0 + 9561 0004 0F00 movs r7, r1 + 9562 0006 1500 movs r5, r2 + 9563 0008 1E00 movs r6, r3 +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 9564 .loc 1 4057 3 is_stmt 1 view .LVU3173 +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9565 .loc 1 4058 3 view .LVU3174 +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9566 .loc 1 4061 3 view .LVU3175 +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9567 .loc 1 4063 3 view .LVU3176 +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9568 .loc 1 4063 22 is_stmt 0 view .LVU3177 + 9569 000a 4123 movs r3, #65 + 9570 .LVL717: +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9571 .loc 1 4063 22 view .LVU3178 + 9572 000c C05C ldrb r0, [r0, r3] + 9573 .LVL718: +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9574 .loc 1 4063 6 view .LVU3179 + 9575 000e 193B subs r3, r3, #25 + 9576 0010 1840 ands r0, r3 + 9577 0012 2828 cmp r0, #40 + 9578 0014 00D0 beq .LCB9101 + 9579 0016 B5E0 b .L566 @long jump + 9580 .LCB9101: +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9581 .loc 1 4065 5 is_stmt 1 view .LVU3180 +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9582 .loc 1 4065 8 is_stmt 0 view .LVU3181 + 9583 0018 0029 cmp r1, #0 + 9584 001a 4DD0 beq .L557 +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9585 .loc 1 4065 25 discriminator 1 view .LVU3182 + 9586 001c 002A cmp r2, #0 + 9587 001e 4BD0 beq .L557 +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9588 .loc 1 4072 5 is_stmt 1 view .LVU3183 +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9589 .loc 1 4072 5 view .LVU3184 + 9590 0020 4023 movs r3, #64 + 9591 0022 E35C ldrb r3, [r4, r3] + 9592 0024 012B cmp r3, #1 + ARM GAS /tmp/cc4IUqI9.s page 354 + + + 9593 0026 00D1 bne .LCB9112 + 9594 0028 AFE0 b .L567 @long jump + 9595 .LCB9112: +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9596 .loc 1 4072 5 discriminator 2 view .LVU3185 + 9597 002a 4023 movs r3, #64 + 9598 002c 0122 movs r2, #1 + 9599 .LVL719: +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9600 .loc 1 4072 5 is_stmt 0 discriminator 2 view .LVU3186 + 9601 002e E254 strb r2, [r4, r3] +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9602 .loc 1 4072 5 is_stmt 1 discriminator 2 view .LVU3187 +4075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9603 .loc 1 4075 5 view .LVU3188 + 9604 0030 5749 ldr r1, .L573 + 9605 .LVL720: +4075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9606 .loc 1 4075 5 is_stmt 0 view .LVU3189 + 9607 0032 2000 movs r0, r4 + 9608 0034 FFF7FEFF bl I2C_Disable_IRQ + 9609 .LVL721: +4079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9610 .loc 1 4079 5 is_stmt 1 view .LVU3190 +4079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9611 .loc 1 4079 13 is_stmt 0 view .LVU3191 + 9612 0038 4123 movs r3, #65 + 9613 003a E35C ldrb r3, [r4, r3] +4079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9614 .loc 1 4079 8 view .LVU3192 + 9615 003c 2A2B cmp r3, #42 + 9616 003e 40D0 beq .L571 +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9617 .loc 1 4104 10 is_stmt 1 view .LVU3193 +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9618 .loc 1 4104 18 is_stmt 0 view .LVU3194 + 9619 0040 4123 movs r3, #65 + 9620 0042 E35C ldrb r3, [r4, r3] +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9621 .loc 1 4104 13 view .LVU3195 + 9622 0044 292B cmp r3, #41 + 9623 0046 57D0 beq .L572 + 9624 .L560: +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9625 .loc 1 4129 5 is_stmt 1 view .LVU3196 +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9626 .loc 1 4131 5 view .LVU3197 +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9627 .loc 1 4131 21 is_stmt 0 view .LVU3198 + 9628 0048 4123 movs r3, #65 + 9629 004a 2922 movs r2, #41 + 9630 004c E254 strb r2, [r4, r3] +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9631 .loc 1 4132 5 is_stmt 1 view .LVU3199 +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9632 .loc 1 4132 21 is_stmt 0 view .LVU3200 + 9633 004e 0133 adds r3, r3, #1 + ARM GAS /tmp/cc4IUqI9.s page 355 + + + 9634 0050 093A subs r2, r2, #9 + 9635 0052 E254 strb r2, [r4, r3] +4133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9636 .loc 1 4133 5 is_stmt 1 view .LVU3201 +4133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9637 .loc 1 4133 21 is_stmt 0 view .LVU3202 + 9638 0054 0023 movs r3, #0 + 9639 0056 6364 str r3, [r4, #68] +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9640 .loc 1 4136 5 is_stmt 1 view .LVU3203 +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9641 .loc 1 4136 9 is_stmt 0 view .LVU3204 + 9642 0058 2268 ldr r2, [r4] +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9643 .loc 1 4136 19 view .LVU3205 + 9644 005a 5368 ldr r3, [r2, #4] +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9645 .loc 1 4136 25 view .LVU3206 + 9646 005c 4D49 ldr r1, .L573+4 + 9647 005e 0B40 ands r3, r1 + 9648 0060 5360 str r3, [r2, #4] +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9649 .loc 1 4139 5 is_stmt 1 view .LVU3207 +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9650 .loc 1 4139 23 is_stmt 0 view .LVU3208 + 9651 0062 6762 str r7, [r4, #36] +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9652 .loc 1 4140 5 is_stmt 1 view .LVU3209 +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9653 .loc 1 4140 23 is_stmt 0 view .LVU3210 + 9654 0064 6585 strh r5, [r4, #42] +4141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9655 .loc 1 4141 5 is_stmt 1 view .LVU3211 +4141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9656 .loc 1 4141 29 is_stmt 0 view .LVU3212 + 9657 0066 638D ldrh r3, [r4, #42] +4141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9658 .loc 1 4141 23 view .LVU3213 + 9659 0068 2385 strh r3, [r4, #40] +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9660 .loc 1 4142 5 is_stmt 1 view .LVU3214 +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9661 .loc 1 4142 23 is_stmt 0 view .LVU3215 + 9662 006a E662 str r6, [r4, #44] +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9663 .loc 1 4143 5 is_stmt 1 view .LVU3216 +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9664 .loc 1 4143 23 is_stmt 0 view .LVU3217 + 9665 006c 4A4B ldr r3, .L573+8 + 9666 006e 6363 str r3, [r4, #52] +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9667 .loc 1 4145 5 is_stmt 1 view .LVU3218 +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9668 .loc 1 4145 13 is_stmt 0 view .LVU3219 + 9669 0070 A36B ldr r3, [r4, #56] +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9670 .loc 1 4145 8 view .LVU3220 + ARM GAS /tmp/cc4IUqI9.s page 356 + + + 9671 0072 002B cmp r3, #0 + 9672 0074 56D0 beq .L561 +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9673 .loc 1 4148 7 is_stmt 1 view .LVU3221 +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9674 .loc 1 4148 38 is_stmt 0 view .LVU3222 + 9675 0076 494A ldr r2, .L573+12 + 9676 0078 9A62 str r2, [r3, #40] +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9677 .loc 1 4151 7 is_stmt 1 view .LVU3223 +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9678 .loc 1 4151 11 is_stmt 0 view .LVU3224 + 9679 007a A36B ldr r3, [r4, #56] +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9680 .loc 1 4151 39 view .LVU3225 + 9681 007c 484A ldr r2, .L573+16 + 9682 007e 1A63 str r2, [r3, #48] +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 9683 .loc 1 4154 7 is_stmt 1 view .LVU3226 +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 9684 .loc 1 4154 11 is_stmt 0 view .LVU3227 + 9685 0080 A26B ldr r2, [r4, #56] +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 9686 .loc 1 4154 42 view .LVU3228 + 9687 0082 0023 movs r3, #0 + 9688 0084 D362 str r3, [r2, #44] +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9689 .loc 1 4155 7 is_stmt 1 view .LVU3229 +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9690 .loc 1 4155 11 is_stmt 0 view .LVU3230 + 9691 0086 A26B ldr r2, [r4, #56] +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9692 .loc 1 4155 39 view .LVU3231 + 9693 0088 5363 str r3, [r2, #52] +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9694 .loc 1 4158 7 is_stmt 1 view .LVU3232 +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9695 .loc 1 4158 86 is_stmt 0 view .LVU3233 + 9696 008a 2268 ldr r2, [r4] +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9697 .loc 1 4158 81 view .LVU3234 + 9698 008c 2832 adds r2, r2, #40 +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9699 .loc 1 4159 44 view .LVU3235 + 9700 008e 238D ldrh r3, [r4, #40] +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9701 .loc 1 4158 23 view .LVU3236 + 9702 0090 A06B ldr r0, [r4, #56] + 9703 0092 3900 movs r1, r7 + 9704 0094 FFF7FEFF bl HAL_DMA_Start_IT + 9705 .LVL722: + 9706 0098 051E subs r5, r0, #0 + 9707 .LVL723: +4176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9708 .loc 1 4176 5 is_stmt 1 view .LVU3237 +4176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9709 .loc 1 4176 8 is_stmt 0 view .LVU3238 + ARM GAS /tmp/cc4IUqI9.s page 357 + + + 9710 009a 51D0 beq .L562 +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9711 .loc 1 4187 7 is_stmt 1 view .LVU3239 +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9712 .loc 1 4187 23 is_stmt 0 view .LVU3240 + 9713 009c 4123 movs r3, #65 + 9714 009e 2822 movs r2, #40 + 9715 00a0 E254 strb r2, [r4, r3] +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9716 .loc 1 4188 7 is_stmt 1 view .LVU3241 +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9717 .loc 1 4188 23 is_stmt 0 view .LVU3242 + 9718 00a2 0022 movs r2, #0 + 9719 00a4 0133 adds r3, r3, #1 + 9720 00a6 E254 strb r2, [r4, r3] +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9721 .loc 1 4191 7 is_stmt 1 view .LVU3243 +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9722 .loc 1 4191 11 is_stmt 0 view .LVU3244 + 9723 00a8 636C ldr r3, [r4, #68] +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9724 .loc 1 4191 23 view .LVU3245 + 9725 00aa 1021 movs r1, #16 + 9726 00ac 0B43 orrs r3, r1 + 9727 00ae 6364 str r3, [r4, #68] +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9728 .loc 1 4194 7 is_stmt 1 view .LVU3246 +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9729 .loc 1 4194 7 view .LVU3247 + 9730 00b0 4023 movs r3, #64 + 9731 00b2 E254 strb r2, [r4, r3] +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9732 .loc 1 4194 7 view .LVU3248 +4196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9733 .loc 1 4196 7 view .LVU3249 +4196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9734 .loc 1 4196 14 is_stmt 0 view .LVU3250 + 9735 00b4 0125 movs r5, #1 + 9736 00b6 66E0 b .L556 + 9737 .LVL724: + 9738 .L557: +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9739 .loc 1 4067 7 is_stmt 1 view .LVU3251 +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9740 .loc 1 4067 23 is_stmt 0 view .LVU3252 + 9741 00b8 8023 movs r3, #128 + 9742 00ba 9B00 lsls r3, r3, #2 + 9743 00bc 6364 str r3, [r4, #68] +4068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9744 .loc 1 4068 7 is_stmt 1 view .LVU3253 +4068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9745 .loc 1 4068 15 is_stmt 0 view .LVU3254 + 9746 00be 0125 movs r5, #1 + 9747 00c0 61E0 b .L556 + 9748 .LVL725: + 9749 .L571: +4082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 358 + + + 9750 .loc 1 4082 7 is_stmt 1 view .LVU3255 + 9751 00c2 0221 movs r1, #2 + 9752 00c4 2000 movs r0, r4 + 9753 00c6 FFF7FEFF bl I2C_Disable_IRQ + 9754 .LVL726: +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9755 .loc 1 4084 7 view .LVU3256 +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9756 .loc 1 4084 16 is_stmt 0 view .LVU3257 + 9757 00ca 2268 ldr r2, [r4] +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9758 .loc 1 4084 26 view .LVU3258 + 9759 00cc 1368 ldr r3, [r2] +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9760 .loc 1 4084 10 view .LVU3259 + 9761 00ce 1B04 lsls r3, r3, #16 + 9762 00d0 BAD5 bpl .L560 +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9763 .loc 1 4087 9 is_stmt 1 view .LVU3260 +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9764 .loc 1 4087 17 is_stmt 0 view .LVU3261 + 9765 00d2 E36B ldr r3, [r4, #60] +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9766 .loc 1 4087 12 view .LVU3262 + 9767 00d4 002B cmp r3, #0 + 9768 00d6 B7D0 beq .L560 +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9769 .loc 1 4089 11 is_stmt 1 view .LVU3263 +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9770 .loc 1 4089 25 is_stmt 0 view .LVU3264 + 9771 00d8 1368 ldr r3, [r2] +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9772 .loc 1 4089 31 view .LVU3265 + 9773 00da 2E49 ldr r1, .L573+4 + 9774 00dc 0B40 ands r3, r1 + 9775 00de 1360 str r3, [r2] +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9776 .loc 1 4093 11 is_stmt 1 view .LVU3266 +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9777 .loc 1 4093 15 is_stmt 0 view .LVU3267 + 9778 00e0 E36B ldr r3, [r4, #60] +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9779 .loc 1 4093 43 view .LVU3268 + 9780 00e2 304A ldr r2, .L573+20 + 9781 00e4 5A63 str r2, [r3, #52] +4096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9782 .loc 1 4096 11 is_stmt 1 view .LVU3269 +4096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9783 .loc 1 4096 15 is_stmt 0 view .LVU3270 + 9784 00e6 E06B ldr r0, [r4, #60] + 9785 00e8 FFF7FEFF bl HAL_DMA_Abort_IT + 9786 .LVL727: +4096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9787 .loc 1 4096 14 discriminator 1 view .LVU3271 + 9788 00ec 0028 cmp r0, #0 + 9789 00ee ABD0 beq .L560 +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 359 + + + 9790 .loc 1 4099 13 is_stmt 1 view .LVU3272 +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9791 .loc 1 4099 17 is_stmt 0 view .LVU3273 + 9792 00f0 E06B ldr r0, [r4, #60] +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9793 .loc 1 4099 25 view .LVU3274 + 9794 00f2 436B ldr r3, [r0, #52] +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9795 .loc 1 4099 13 view .LVU3275 + 9796 00f4 9847 blx r3 + 9797 .LVL728: + 9798 00f6 A7E7 b .L560 + 9799 .L572: +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9800 .loc 1 4106 7 is_stmt 1 view .LVU3276 +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9801 .loc 1 4106 16 is_stmt 0 view .LVU3277 + 9802 00f8 2368 ldr r3, [r4] +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9803 .loc 1 4106 26 view .LVU3278 + 9804 00fa 1A68 ldr r2, [r3] +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9805 .loc 1 4106 10 view .LVU3279 + 9806 00fc 5204 lsls r2, r2, #17 + 9807 00fe A3D5 bpl .L560 +4108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9808 .loc 1 4108 9 is_stmt 1 view .LVU3280 +4108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9809 .loc 1 4108 23 is_stmt 0 view .LVU3281 + 9810 0100 1A68 ldr r2, [r3] +4108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9811 .loc 1 4108 29 view .LVU3282 + 9812 0102 2949 ldr r1, .L573+24 + 9813 0104 0A40 ands r2, r1 + 9814 0106 1A60 str r2, [r3] +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9815 .loc 1 4111 9 is_stmt 1 view .LVU3283 +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9816 .loc 1 4111 17 is_stmt 0 view .LVU3284 + 9817 0108 A36B ldr r3, [r4, #56] +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9818 .loc 1 4111 12 view .LVU3285 + 9819 010a 002B cmp r3, #0 + 9820 010c 9CD0 beq .L560 +4115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9821 .loc 1 4115 11 is_stmt 1 view .LVU3286 +4115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9822 .loc 1 4115 43 is_stmt 0 view .LVU3287 + 9823 010e 254A ldr r2, .L573+20 + 9824 0110 5A63 str r2, [r3, #52] +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9825 .loc 1 4118 11 is_stmt 1 view .LVU3288 +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9826 .loc 1 4118 15 is_stmt 0 view .LVU3289 + 9827 0112 A06B ldr r0, [r4, #56] + 9828 0114 FFF7FEFF bl HAL_DMA_Abort_IT + 9829 .LVL729: + ARM GAS /tmp/cc4IUqI9.s page 360 + + +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9830 .loc 1 4118 14 discriminator 1 view .LVU3290 + 9831 0118 0028 cmp r0, #0 + 9832 011a 95D0 beq .L560 +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9833 .loc 1 4121 13 is_stmt 1 view .LVU3291 +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9834 .loc 1 4121 17 is_stmt 0 view .LVU3292 + 9835 011c A06B ldr r0, [r4, #56] +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9836 .loc 1 4121 25 view .LVU3293 + 9837 011e 436B ldr r3, [r0, #52] +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9838 .loc 1 4121 13 view .LVU3294 + 9839 0120 9847 blx r3 + 9840 .LVL730: + 9841 0122 91E7 b .L560 + 9842 .L561: +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9843 .loc 1 4164 7 is_stmt 1 view .LVU3295 +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9844 .loc 1 4164 23 is_stmt 0 view .LVU3296 + 9845 0124 4123 movs r3, #65 + 9846 0126 2822 movs r2, #40 + 9847 0128 E254 strb r2, [r4, r3] +4165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9848 .loc 1 4165 7 is_stmt 1 view .LVU3297 +4165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9849 .loc 1 4165 23 is_stmt 0 view .LVU3298 + 9850 012a 0022 movs r2, #0 + 9851 012c 0133 adds r3, r3, #1 + 9852 012e E254 strb r2, [r4, r3] +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9853 .loc 1 4168 7 is_stmt 1 view .LVU3299 +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9854 .loc 1 4168 11 is_stmt 0 view .LVU3300 + 9855 0130 636C ldr r3, [r4, #68] +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9856 .loc 1 4168 23 view .LVU3301 + 9857 0132 8021 movs r1, #128 + 9858 0134 0B43 orrs r3, r1 + 9859 0136 6364 str r3, [r4, #68] +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9860 .loc 1 4171 7 is_stmt 1 view .LVU3302 +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9861 .loc 1 4171 7 view .LVU3303 + 9862 0138 4023 movs r3, #64 + 9863 013a E254 strb r2, [r4, r3] +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9864 .loc 1 4171 7 view .LVU3304 +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9865 .loc 1 4173 7 view .LVU3305 +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9866 .loc 1 4173 14 is_stmt 0 view .LVU3306 + 9867 013c 0125 movs r5, #1 + 9868 .LVL731: +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 361 + + + 9869 .loc 1 4173 14 view .LVU3307 + 9870 013e 22E0 b .L556 + 9871 .LVL732: + 9872 .L562: +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9873 .loc 1 4179 7 is_stmt 1 view .LVU3308 +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9874 .loc 1 4179 11 is_stmt 0 view .LVU3309 + 9875 0140 638D ldrh r3, [r4, #42] +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9876 .loc 1 4179 30 view .LVU3310 + 9877 0142 228D ldrh r2, [r4, #40] +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9878 .loc 1 4179 23 view .LVU3311 + 9879 0144 9B1A subs r3, r3, r2 + 9880 0146 9BB2 uxth r3, r3 + 9881 0148 6385 strh r3, [r4, #42] +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9882 .loc 1 4182 7 is_stmt 1 view .LVU3312 +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9883 .loc 1 4182 22 is_stmt 0 view .LVU3313 + 9884 014a 0023 movs r3, #0 + 9885 014c 2385 strh r3, [r4, #40] +4199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 9886 .loc 1 4199 5 is_stmt 1 view .LVU3314 +4199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 9887 .loc 1 4199 11 is_stmt 0 view .LVU3315 + 9888 014e 2268 ldr r2, [r4] + 9889 0150 9169 ldr r1, [r2, #24] + 9890 0152 0833 adds r3, r3, #8 + 9891 0154 0B40 ands r3, r1 + 9892 .LVL733: +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9893 .loc 1 4200 5 is_stmt 1 view .LVU3316 +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9894 .loc 1 4200 10 is_stmt 0 view .LVU3317 + 9895 0156 9169 ldr r1, [r2, #24] +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9896 .loc 1 4200 8 view .LVU3318 + 9897 0158 C903 lsls r1, r1, #15 + 9898 015a 0ED4 bmi .L564 + 9899 .LVL734: + 9900 .L565: +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9901 .loc 1 4208 5 is_stmt 1 view .LVU3319 +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9902 .loc 1 4208 5 view .LVU3320 + 9903 015c 4023 movs r3, #64 + 9904 015e 0022 movs r2, #0 +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9905 .loc 1 4208 5 is_stmt 0 view .LVU3321 + 9906 0160 E254 strb r2, [r4, r3] +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9907 .loc 1 4208 5 is_stmt 1 view .LVU3322 +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9908 .loc 1 4211 5 view .LVU3323 +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 362 + + + 9909 .loc 1 4211 9 is_stmt 0 view .LVU3324 + 9910 0162 2268 ldr r2, [r4] +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9911 .loc 1 4211 19 view .LVU3325 + 9912 0164 1168 ldr r1, [r2] +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9913 .loc 1 4211 25 view .LVU3326 + 9914 0166 8023 movs r3, #128 + 9915 0168 DB01 lsls r3, r3, #7 + 9916 016a 0B43 orrs r3, r1 + 9917 016c 1360 str r3, [r2] +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9918 .loc 1 4217 5 is_stmt 1 view .LVU3327 + 9919 016e 8021 movs r1, #128 + 9920 0170 0902 lsls r1, r1, #8 + 9921 0172 2000 movs r0, r4 + 9922 .LVL735: +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9923 .loc 1 4217 5 is_stmt 0 view .LVU3328 + 9924 0174 FFF7FEFF bl I2C_Enable_IRQ + 9925 .LVL736: +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9926 .loc 1 4219 5 is_stmt 1 view .LVU3329 +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9927 .loc 1 4219 12 is_stmt 0 view .LVU3330 + 9928 0178 05E0 b .L556 + 9929 .LVL737: + 9930 .L564: +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9931 .loc 1 4200 54 discriminator 1 view .LVU3331 + 9932 017a 002B cmp r3, #0 + 9933 017c EED0 beq .L565 +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9934 .loc 1 4204 7 is_stmt 1 view .LVU3332 + 9935 017e 0823 movs r3, #8 + 9936 .LVL738: +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9937 .loc 1 4204 7 is_stmt 0 view .LVU3333 + 9938 0180 D361 str r3, [r2, #28] + 9939 0182 EBE7 b .L565 + 9940 .LVL739: + 9941 .L566: +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9942 .loc 1 4223 12 view .LVU3334 + 9943 0184 0125 movs r5, #1 + 9944 .LVL740: + 9945 .L556: +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9946 .loc 1 4225 1 view .LVU3335 + 9947 0186 2800 movs r0, r5 + 9948 @ sp needed + 9949 .LVL741: + 9950 .LVL742: + 9951 .LVL743: +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9952 .loc 1 4225 1 view .LVU3336 + 9953 0188 F8BD pop {r3, r4, r5, r6, r7, pc} + ARM GAS /tmp/cc4IUqI9.s page 363 + + + 9954 .LVL744: + 9955 .L567: +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9956 .loc 1 4072 5 discriminator 1 view .LVU3337 + 9957 018a 0225 movs r5, #2 + 9958 018c FBE7 b .L556 + 9959 .L574: + 9960 018e C046 .align 2 + 9961 .L573: + 9962 0190 01800000 .word 32769 + 9963 0194 FF7FFFFF .word -32769 + 9964 0198 00000000 .word I2C_Slave_ISR_DMA + 9965 019c 00000000 .word I2C_DMASlaveTransmitCplt + 9966 01a0 00000000 .word I2C_DMAError + 9967 01a4 00000000 .word I2C_DMAAbort + 9968 01a8 FFBFFFFF .word -16385 + 9969 .cfi_endproc + 9970 .LFE68: + 9972 .section .text.HAL_I2C_Slave_Seq_Receive_IT,"ax",%progbits + 9973 .align 1 + 9974 .global HAL_I2C_Slave_Seq_Receive_IT + 9975 .syntax unified + 9976 .code 16 + 9977 .thumb_func + 9979 HAL_I2C_Slave_Seq_Receive_IT: + 9980 .LVL745: + 9981 .LFB69: +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9982 .loc 1 4239 1 is_stmt 1 view -0 + 9983 .cfi_startproc + 9984 @ args = 0, pretend = 0, frame = 0 + 9985 @ frame_needed = 0, uses_anonymous_args = 0 +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9986 .loc 1 4239 1 is_stmt 0 view .LVU3339 + 9987 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9988 .cfi_def_cfa_offset 24 + 9989 .cfi_offset 3, -24 + 9990 .cfi_offset 4, -20 + 9991 .cfi_offset 5, -16 + 9992 .cfi_offset 6, -12 + 9993 .cfi_offset 7, -8 + 9994 .cfi_offset 14, -4 + 9995 0002 0400 movs r4, r0 + 9996 0004 0D00 movs r5, r1 + 9997 0006 1600 movs r6, r2 + 9998 0008 1F00 movs r7, r3 +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9999 .loc 1 4241 3 is_stmt 1 view .LVU3340 +4244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10000 .loc 1 4244 3 view .LVU3341 +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10001 .loc 1 4246 3 view .LVU3342 +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10002 .loc 1 4246 22 is_stmt 0 view .LVU3343 + 10003 000a 4123 movs r3, #65 + 10004 .LVL746: +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 364 + + + 10005 .loc 1 4246 22 view .LVU3344 + 10006 000c C35C ldrb r3, [r0, r3] +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10007 .loc 1 4246 6 view .LVU3345 + 10008 000e 2822 movs r2, #40 + 10009 .LVL747: +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10010 .loc 1 4246 6 view .LVU3346 + 10011 0010 1340 ands r3, r2 + 10012 0012 282B cmp r3, #40 + 10013 0014 58D1 bne .L581 +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10014 .loc 1 4248 5 is_stmt 1 view .LVU3347 +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10015 .loc 1 4248 8 is_stmt 0 view .LVU3348 + 10016 0016 0029 cmp r1, #0 + 10017 0018 01D0 beq .L577 +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10018 .loc 1 4248 25 discriminator 1 view .LVU3349 + 10019 001a 002E cmp r6, #0 + 10020 001c 04D1 bne .L578 + 10021 .L577: +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 10022 .loc 1 4250 7 is_stmt 1 view .LVU3350 +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 10023 .loc 1 4250 23 is_stmt 0 view .LVU3351 + 10024 001e 8023 movs r3, #128 + 10025 0020 9B00 lsls r3, r3, #2 + 10026 0022 6364 str r3, [r4, #68] +4251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10027 .loc 1 4251 7 is_stmt 1 view .LVU3352 +4251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10028 .loc 1 4251 15 is_stmt 0 view .LVU3353 + 10029 0024 0120 movs r0, #1 + 10030 .LVL748: +4251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10031 .loc 1 4251 15 view .LVU3354 + 10032 0026 50E0 b .L576 + 10033 .LVL749: + 10034 .L578: +4255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10035 .loc 1 4255 5 is_stmt 1 view .LVU3355 + 10036 0028 2949 ldr r1, .L586 + 10037 .LVL750: +4255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10038 .loc 1 4255 5 is_stmt 0 view .LVU3356 + 10039 002a FFF7FEFF bl I2C_Disable_IRQ + 10040 .LVL751: +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10041 .loc 1 4258 5 is_stmt 1 view .LVU3357 +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10042 .loc 1 4258 5 view .LVU3358 + 10043 002e 4023 movs r3, #64 + 10044 0030 E35C ldrb r3, [r4, r3] + 10045 0032 012B cmp r3, #1 + 10046 0034 4AD0 beq .L582 +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 365 + + + 10047 .loc 1 4258 5 discriminator 2 view .LVU3359 + 10048 0036 4023 movs r3, #64 + 10049 0038 0122 movs r2, #1 + 10050 003a E254 strb r2, [r4, r3] +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10051 .loc 1 4258 5 discriminator 2 view .LVU3360 +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10052 .loc 1 4262 5 view .LVU3361 +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10053 .loc 1 4262 13 is_stmt 0 view .LVU3362 + 10054 003c 0133 adds r3, r3, #1 + 10055 003e E35C ldrb r3, [r4, r3] +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10056 .loc 1 4262 8 view .LVU3363 + 10057 0040 292B cmp r3, #41 + 10058 0042 27D0 beq .L585 + 10059 .L579: +4288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 10060 .loc 1 4288 5 is_stmt 1 view .LVU3364 +4288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 10061 .loc 1 4288 21 is_stmt 0 view .LVU3365 + 10062 0044 4123 movs r3, #65 + 10063 0046 2A22 movs r2, #42 + 10064 0048 E254 strb r2, [r4, r3] +4289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 10065 .loc 1 4289 5 is_stmt 1 view .LVU3366 +4289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 10066 .loc 1 4289 21 is_stmt 0 view .LVU3367 + 10067 004a 0133 adds r3, r3, #1 + 10068 004c 0A3A subs r2, r2, #10 + 10069 004e E254 strb r2, [r4, r3] +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10070 .loc 1 4290 5 is_stmt 1 view .LVU3368 +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10071 .loc 1 4290 21 is_stmt 0 view .LVU3369 + 10072 0050 0023 movs r3, #0 + 10073 0052 6364 str r3, [r4, #68] +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10074 .loc 1 4293 5 is_stmt 1 view .LVU3370 +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10075 .loc 1 4293 9 is_stmt 0 view .LVU3371 + 10076 0054 2268 ldr r2, [r4] +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10077 .loc 1 4293 19 view .LVU3372 + 10078 0056 5368 ldr r3, [r2, #4] +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10079 .loc 1 4293 25 view .LVU3373 + 10080 0058 1E49 ldr r1, .L586+4 + 10081 005a 0B40 ands r3, r1 + 10082 005c 5360 str r3, [r2, #4] +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 10083 .loc 1 4296 5 is_stmt 1 view .LVU3374 +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 10084 .loc 1 4296 23 is_stmt 0 view .LVU3375 + 10085 005e 6562 str r5, [r4, #36] +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 10086 .loc 1 4297 5 is_stmt 1 view .LVU3376 + ARM GAS /tmp/cc4IUqI9.s page 366 + + +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 10087 .loc 1 4297 23 is_stmt 0 view .LVU3377 + 10088 0060 6685 strh r6, [r4, #42] +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 10089 .loc 1 4298 5 is_stmt 1 view .LVU3378 +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 10090 .loc 1 4298 29 is_stmt 0 view .LVU3379 + 10091 0062 638D ldrh r3, [r4, #42] +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 10092 .loc 1 4298 23 view .LVU3380 + 10093 0064 2385 strh r3, [r4, #40] +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10094 .loc 1 4299 5 is_stmt 1 view .LVU3381 +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10095 .loc 1 4299 23 is_stmt 0 view .LVU3382 + 10096 0066 E762 str r7, [r4, #44] +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10097 .loc 1 4300 5 is_stmt 1 view .LVU3383 +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10098 .loc 1 4300 23 is_stmt 0 view .LVU3384 + 10099 0068 1B4B ldr r3, .L586+8 + 10100 006a 6363 str r3, [r4, #52] +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 10101 .loc 1 4302 5 is_stmt 1 view .LVU3385 +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 10102 .loc 1 4302 11 is_stmt 0 view .LVU3386 + 10103 006c 2268 ldr r2, [r4] + 10104 006e 9169 ldr r1, [r2, #24] + 10105 0070 0823 movs r3, #8 + 10106 0072 0B40 ands r3, r1 + 10107 .LVL752: +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10108 .loc 1 4303 5 is_stmt 1 view .LVU3387 +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10109 .loc 1 4303 10 is_stmt 0 view .LVU3388 + 10110 0074 9169 ldr r1, [r2, #24] +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10111 .loc 1 4303 8 view .LVU3389 + 10112 0076 C903 lsls r1, r1, #15 + 10113 0078 03D4 bmi .L580 +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10114 .loc 1 4303 55 discriminator 1 view .LVU3390 + 10115 007a 002B cmp r3, #0 + 10116 007c 01D0 beq .L580 +4307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10117 .loc 1 4307 7 is_stmt 1 view .LVU3391 + 10118 007e 0823 movs r3, #8 + 10119 .LVL753: +4307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10120 .loc 1 4307 7 is_stmt 0 view .LVU3392 + 10121 0080 D361 str r3, [r2, #28] + 10122 .L580: +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10123 .loc 1 4311 5 is_stmt 1 view .LVU3393 +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10124 .loc 1 4311 5 view .LVU3394 + 10125 0082 4023 movs r3, #64 + ARM GAS /tmp/cc4IUqI9.s page 367 + + + 10126 0084 0022 movs r2, #0 + 10127 0086 E254 strb r2, [r4, r3] +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10128 .loc 1 4311 5 view .LVU3395 +4317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10129 .loc 1 4317 5 view .LVU3396 + 10130 0088 1149 ldr r1, .L586 + 10131 008a 2000 movs r0, r4 + 10132 008c FFF7FEFF bl I2C_Enable_IRQ + 10133 .LVL754: +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10134 .loc 1 4319 5 view .LVU3397 +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10135 .loc 1 4319 12 is_stmt 0 view .LVU3398 + 10136 0090 0020 movs r0, #0 + 10137 0092 1AE0 b .L576 + 10138 .LVL755: + 10139 .L585: +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10140 .loc 1 4265 7 is_stmt 1 view .LVU3399 + 10141 0094 0121 movs r1, #1 + 10142 0096 2000 movs r0, r4 + 10143 0098 FFF7FEFF bl I2C_Disable_IRQ + 10144 .LVL756: +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10145 .loc 1 4267 7 view .LVU3400 +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10146 .loc 1 4267 16 is_stmt 0 view .LVU3401 + 10147 009c 2268 ldr r2, [r4] +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10148 .loc 1 4267 26 view .LVU3402 + 10149 009e 1368 ldr r3, [r2] +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10150 .loc 1 4267 10 view .LVU3403 + 10151 00a0 5B04 lsls r3, r3, #17 + 10152 00a2 CFD5 bpl .L579 +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10153 .loc 1 4269 9 is_stmt 1 view .LVU3404 +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10154 .loc 1 4269 23 is_stmt 0 view .LVU3405 + 10155 00a4 1368 ldr r3, [r2] +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10156 .loc 1 4269 29 view .LVU3406 + 10157 00a6 0D49 ldr r1, .L586+12 + 10158 00a8 0B40 ands r3, r1 + 10159 00aa 1360 str r3, [r2] +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10160 .loc 1 4272 9 is_stmt 1 view .LVU3407 +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10161 .loc 1 4272 17 is_stmt 0 view .LVU3408 + 10162 00ac A36B ldr r3, [r4, #56] +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10163 .loc 1 4272 12 view .LVU3409 + 10164 00ae 002B cmp r3, #0 + 10165 00b0 C8D0 beq .L579 +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10166 .loc 1 4276 11 is_stmt 1 view .LVU3410 + ARM GAS /tmp/cc4IUqI9.s page 368 + + +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10167 .loc 1 4276 43 is_stmt 0 view .LVU3411 + 10168 00b2 0B4A ldr r2, .L586+16 + 10169 00b4 5A63 str r2, [r3, #52] +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10170 .loc 1 4279 11 is_stmt 1 view .LVU3412 +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10171 .loc 1 4279 15 is_stmt 0 view .LVU3413 + 10172 00b6 A06B ldr r0, [r4, #56] + 10173 00b8 FFF7FEFF bl HAL_DMA_Abort_IT + 10174 .LVL757: +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10175 .loc 1 4279 14 discriminator 1 view .LVU3414 + 10176 00bc 0028 cmp r0, #0 + 10177 00be C1D0 beq .L579 +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10178 .loc 1 4282 13 is_stmt 1 view .LVU3415 +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10179 .loc 1 4282 17 is_stmt 0 view .LVU3416 + 10180 00c0 A06B ldr r0, [r4, #56] +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10181 .loc 1 4282 25 view .LVU3417 + 10182 00c2 436B ldr r3, [r0, #52] +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10183 .loc 1 4282 13 view .LVU3418 + 10184 00c4 9847 blx r3 + 10185 .LVL758: + 10186 00c6 BDE7 b .L579 + 10187 .LVL759: + 10188 .L581: +4323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10189 .loc 1 4323 12 view .LVU3419 + 10190 00c8 0120 movs r0, #1 + 10191 .LVL760: + 10192 .L576: +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10193 .loc 1 4325 1 view .LVU3420 + 10194 @ sp needed + 10195 .LVL761: + 10196 .LVL762: + 10197 .LVL763: + 10198 .LVL764: +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10199 .loc 1 4325 1 view .LVU3421 + 10200 00ca F8BD pop {r3, r4, r5, r6, r7, pc} + 10201 .LVL765: + 10202 .L582: +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10203 .loc 1 4258 5 discriminator 1 view .LVU3422 + 10204 00cc 0220 movs r0, #2 + 10205 00ce FCE7 b .L576 + 10206 .L587: + 10207 .align 2 + 10208 .L586: + 10209 00d0 02800000 .word 32770 + 10210 00d4 FF7FFFFF .word -32769 + 10211 00d8 00000000 .word I2C_Slave_ISR_IT + ARM GAS /tmp/cc4IUqI9.s page 369 + + + 10212 00dc FFBFFFFF .word -16385 + 10213 00e0 00000000 .word I2C_DMAAbort + 10214 .cfi_endproc + 10215 .LFE69: + 10217 .section .text.HAL_I2C_Slave_Seq_Receive_DMA,"ax",%progbits + 10218 .align 1 + 10219 .global HAL_I2C_Slave_Seq_Receive_DMA + 10220 .syntax unified + 10221 .code 16 + 10222 .thumb_func + 10224 HAL_I2C_Slave_Seq_Receive_DMA: + 10225 .LVL766: + 10226 .LFB70: +4339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 10227 .loc 1 4339 1 is_stmt 1 view -0 + 10228 .cfi_startproc + 10229 @ args = 0, pretend = 0, frame = 0 + 10230 @ frame_needed = 0, uses_anonymous_args = 0 +4339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 10231 .loc 1 4339 1 is_stmt 0 view .LVU3424 + 10232 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 10233 .cfi_def_cfa_offset 24 + 10234 .cfi_offset 3, -24 + 10235 .cfi_offset 4, -20 + 10236 .cfi_offset 5, -16 + 10237 .cfi_offset 6, -12 + 10238 .cfi_offset 7, -8 + 10239 .cfi_offset 14, -4 + 10240 0002 0400 movs r4, r0 + 10241 0004 0F00 movs r7, r1 + 10242 0006 1500 movs r5, r2 + 10243 0008 1E00 movs r6, r3 +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 10244 .loc 1 4341 3 is_stmt 1 view .LVU3425 +4342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10245 .loc 1 4342 3 view .LVU3426 +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10246 .loc 1 4345 3 view .LVU3427 +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10247 .loc 1 4347 3 view .LVU3428 +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10248 .loc 1 4347 22 is_stmt 0 view .LVU3429 + 10249 000a 4123 movs r3, #65 + 10250 .LVL767: +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10251 .loc 1 4347 22 view .LVU3430 + 10252 000c C05C ldrb r0, [r0, r3] + 10253 .LVL768: +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10254 .loc 1 4347 6 view .LVU3431 + 10255 000e 193B subs r3, r3, #25 + 10256 0010 1840 ands r0, r3 + 10257 0012 2828 cmp r0, #40 + 10258 0014 00D0 beq .LCB9715 + 10259 0016 B4E0 b .L599 @long jump + 10260 .LCB9715: +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 370 + + + 10261 .loc 1 4349 5 is_stmt 1 view .LVU3432 +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10262 .loc 1 4349 8 is_stmt 0 view .LVU3433 + 10263 0018 0029 cmp r1, #0 + 10264 001a 01D0 beq .L590 +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10265 .loc 1 4349 25 discriminator 1 view .LVU3434 + 10266 001c 002A cmp r2, #0 + 10267 001e 04D1 bne .L591 + 10268 .L590: +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 10269 .loc 1 4351 7 is_stmt 1 view .LVU3435 +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 10270 .loc 1 4351 23 is_stmt 0 view .LVU3436 + 10271 0020 8023 movs r3, #128 + 10272 0022 9B00 lsls r3, r3, #2 + 10273 0024 6364 str r3, [r4, #68] +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10274 .loc 1 4352 7 is_stmt 1 view .LVU3437 +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10275 .loc 1 4352 15 is_stmt 0 view .LVU3438 + 10276 0026 0125 movs r5, #1 + 10277 0028 ACE0 b .L589 + 10278 .L591: +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10279 .loc 1 4356 5 is_stmt 1 view .LVU3439 + 10280 002a 5849 ldr r1, .L606 + 10281 .LVL769: +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10282 .loc 1 4356 5 is_stmt 0 view .LVU3440 + 10283 002c 2000 movs r0, r4 + 10284 002e FFF7FEFF bl I2C_Disable_IRQ + 10285 .LVL770: +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10286 .loc 1 4359 5 is_stmt 1 view .LVU3441 +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10287 .loc 1 4359 5 view .LVU3442 + 10288 0032 4023 movs r3, #64 + 10289 0034 E35C ldrb r3, [r4, r3] + 10290 0036 012B cmp r3, #1 + 10291 0038 00D1 bne .LCB9744 + 10292 003a A5E0 b .L600 @long jump + 10293 .LCB9744: +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10294 .loc 1 4359 5 discriminator 2 view .LVU3443 + 10295 003c 4023 movs r3, #64 + 10296 003e 0122 movs r2, #1 + 10297 0040 E254 strb r2, [r4, r3] +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10298 .loc 1 4359 5 discriminator 2 view .LVU3444 +4363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10299 .loc 1 4363 5 view .LVU3445 +4363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10300 .loc 1 4363 13 is_stmt 0 view .LVU3446 + 10301 0042 0133 adds r3, r3, #1 + 10302 0044 E35C ldrb r3, [r4, r3] +4363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 371 + + + 10303 .loc 1 4363 8 view .LVU3447 + 10304 0046 292B cmp r3, #41 + 10305 0048 3BD0 beq .L604 +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10306 .loc 1 4388 10 is_stmt 1 view .LVU3448 +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10307 .loc 1 4388 18 is_stmt 0 view .LVU3449 + 10308 004a 4123 movs r3, #65 + 10309 004c E35C ldrb r3, [r4, r3] +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10310 .loc 1 4388 13 view .LVU3450 + 10311 004e 2A2B cmp r3, #42 + 10312 0050 52D0 beq .L605 + 10313 .L593: +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10314 .loc 1 4413 5 is_stmt 1 view .LVU3451 +4415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 10315 .loc 1 4415 5 view .LVU3452 +4415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 10316 .loc 1 4415 21 is_stmt 0 view .LVU3453 + 10317 0052 4123 movs r3, #65 + 10318 0054 2A22 movs r2, #42 + 10319 0056 E254 strb r2, [r4, r3] +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 10320 .loc 1 4416 5 is_stmt 1 view .LVU3454 +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 10321 .loc 1 4416 21 is_stmt 0 view .LVU3455 + 10322 0058 0133 adds r3, r3, #1 + 10323 005a 0A3A subs r2, r2, #10 + 10324 005c E254 strb r2, [r4, r3] +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10325 .loc 1 4417 5 is_stmt 1 view .LVU3456 +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10326 .loc 1 4417 21 is_stmt 0 view .LVU3457 + 10327 005e 0023 movs r3, #0 + 10328 0060 6364 str r3, [r4, #68] +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10329 .loc 1 4420 5 is_stmt 1 view .LVU3458 +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10330 .loc 1 4420 9 is_stmt 0 view .LVU3459 + 10331 0062 2268 ldr r2, [r4] +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10332 .loc 1 4420 19 view .LVU3460 + 10333 0064 5368 ldr r3, [r2, #4] +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10334 .loc 1 4420 25 view .LVU3461 + 10335 0066 4A49 ldr r1, .L606+4 + 10336 0068 0B40 ands r3, r1 + 10337 006a 5360 str r3, [r2, #4] +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 10338 .loc 1 4423 5 is_stmt 1 view .LVU3462 +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 10339 .loc 1 4423 23 is_stmt 0 view .LVU3463 + 10340 006c 6762 str r7, [r4, #36] +4424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 10341 .loc 1 4424 5 is_stmt 1 view .LVU3464 +4424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + ARM GAS /tmp/cc4IUqI9.s page 372 + + + 10342 .loc 1 4424 23 is_stmt 0 view .LVU3465 + 10343 006e 6585 strh r5, [r4, #42] +4425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 10344 .loc 1 4425 5 is_stmt 1 view .LVU3466 +4425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 10345 .loc 1 4425 29 is_stmt 0 view .LVU3467 + 10346 0070 638D ldrh r3, [r4, #42] +4425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 10347 .loc 1 4425 23 view .LVU3468 + 10348 0072 2385 strh r3, [r4, #40] +4426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 10349 .loc 1 4426 5 is_stmt 1 view .LVU3469 +4426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 10350 .loc 1 4426 23 is_stmt 0 view .LVU3470 + 10351 0074 E662 str r6, [r4, #44] +4427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10352 .loc 1 4427 5 is_stmt 1 view .LVU3471 +4427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10353 .loc 1 4427 23 is_stmt 0 view .LVU3472 + 10354 0076 474B ldr r3, .L606+8 + 10355 0078 6363 str r3, [r4, #52] +4429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10356 .loc 1 4429 5 is_stmt 1 view .LVU3473 +4429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10357 .loc 1 4429 13 is_stmt 0 view .LVU3474 + 10358 007a E36B ldr r3, [r4, #60] +4429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10359 .loc 1 4429 8 view .LVU3475 + 10360 007c 002B cmp r3, #0 + 10361 007e 51D0 beq .L594 +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10362 .loc 1 4432 7 is_stmt 1 view .LVU3476 +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10363 .loc 1 4432 38 is_stmt 0 view .LVU3477 + 10364 0080 454A ldr r2, .L606+12 + 10365 0082 9A62 str r2, [r3, #40] +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10366 .loc 1 4435 7 is_stmt 1 view .LVU3478 +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10367 .loc 1 4435 11 is_stmt 0 view .LVU3479 + 10368 0084 E36B ldr r3, [r4, #60] +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10369 .loc 1 4435 39 view .LVU3480 + 10370 0086 454A ldr r2, .L606+16 + 10371 0088 1A63 str r2, [r3, #48] +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 10372 .loc 1 4438 7 is_stmt 1 view .LVU3481 +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 10373 .loc 1 4438 11 is_stmt 0 view .LVU3482 + 10374 008a E26B ldr r2, [r4, #60] +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 10375 .loc 1 4438 42 view .LVU3483 + 10376 008c 0023 movs r3, #0 + 10377 008e D362 str r3, [r2, #44] +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10378 .loc 1 4439 7 is_stmt 1 view .LVU3484 +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 373 + + + 10379 .loc 1 4439 11 is_stmt 0 view .LVU3485 + 10380 0090 E26B ldr r2, [r4, #60] +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10381 .loc 1 4439 39 view .LVU3486 + 10382 0092 5363 str r3, [r2, #52] +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 10383 .loc 1 4442 7 is_stmt 1 view .LVU3487 +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 10384 .loc 1 4442 69 is_stmt 0 view .LVU3488 + 10385 0094 2168 ldr r1, [r4] +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 10386 .loc 1 4442 64 view .LVU3489 + 10387 0096 2431 adds r1, r1, #36 +4443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10388 .loc 1 4443 61 view .LVU3490 + 10389 0098 238D ldrh r3, [r4, #40] +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 10390 .loc 1 4442 23 view .LVU3491 + 10391 009a E06B ldr r0, [r4, #60] + 10392 009c 3A00 movs r2, r7 + 10393 009e FFF7FEFF bl HAL_DMA_Start_IT + 10394 .LVL771: + 10395 00a2 051E subs r5, r0, #0 + 10396 .LVL772: +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10397 .loc 1 4460 5 is_stmt 1 view .LVU3492 +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10398 .loc 1 4460 8 is_stmt 0 view .LVU3493 + 10399 00a4 4CD0 beq .L595 +4471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10400 .loc 1 4471 7 is_stmt 1 view .LVU3494 +4471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10401 .loc 1 4471 23 is_stmt 0 view .LVU3495 + 10402 00a6 4123 movs r3, #65 + 10403 00a8 2822 movs r2, #40 + 10404 00aa E254 strb r2, [r4, r3] +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10405 .loc 1 4472 7 is_stmt 1 view .LVU3496 +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10406 .loc 1 4472 23 is_stmt 0 view .LVU3497 + 10407 00ac 0022 movs r2, #0 + 10408 00ae 0133 adds r3, r3, #1 + 10409 00b0 E254 strb r2, [r4, r3] +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10410 .loc 1 4475 7 is_stmt 1 view .LVU3498 +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10411 .loc 1 4475 11 is_stmt 0 view .LVU3499 + 10412 00b2 636C ldr r3, [r4, #68] +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10413 .loc 1 4475 23 view .LVU3500 + 10414 00b4 1021 movs r1, #16 + 10415 00b6 0B43 orrs r3, r1 + 10416 00b8 6364 str r3, [r4, #68] +4478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10417 .loc 1 4478 7 is_stmt 1 view .LVU3501 +4478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10418 .loc 1 4478 7 view .LVU3502 + ARM GAS /tmp/cc4IUqI9.s page 374 + + + 10419 00ba 4023 movs r3, #64 + 10420 00bc E254 strb r2, [r4, r3] +4478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10421 .loc 1 4478 7 view .LVU3503 +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10422 .loc 1 4480 7 view .LVU3504 +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10423 .loc 1 4480 14 is_stmt 0 view .LVU3505 + 10424 00be 0125 movs r5, #1 + 10425 00c0 60E0 b .L589 + 10426 .LVL773: + 10427 .L604: +4366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10428 .loc 1 4366 7 is_stmt 1 view .LVU3506 + 10429 00c2 0121 movs r1, #1 + 10430 00c4 2000 movs r0, r4 + 10431 00c6 FFF7FEFF bl I2C_Disable_IRQ + 10432 .LVL774: +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10433 .loc 1 4368 7 view .LVU3507 +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10434 .loc 1 4368 16 is_stmt 0 view .LVU3508 + 10435 00ca 2268 ldr r2, [r4] +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10436 .loc 1 4368 26 view .LVU3509 + 10437 00cc 1368 ldr r3, [r2] +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10438 .loc 1 4368 10 view .LVU3510 + 10439 00ce 5B04 lsls r3, r3, #17 + 10440 00d0 BFD5 bpl .L593 +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10441 .loc 1 4371 9 is_stmt 1 view .LVU3511 +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10442 .loc 1 4371 17 is_stmt 0 view .LVU3512 + 10443 00d2 A36B ldr r3, [r4, #56] +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10444 .loc 1 4371 12 view .LVU3513 + 10445 00d4 002B cmp r3, #0 + 10446 00d6 BCD0 beq .L593 +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10447 .loc 1 4373 11 is_stmt 1 view .LVU3514 +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10448 .loc 1 4373 25 is_stmt 0 view .LVU3515 + 10449 00d8 1368 ldr r3, [r2] +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10450 .loc 1 4373 31 view .LVU3516 + 10451 00da 3149 ldr r1, .L606+20 + 10452 00dc 0B40 ands r3, r1 + 10453 00de 1360 str r3, [r2] +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10454 .loc 1 4377 11 is_stmt 1 view .LVU3517 +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10455 .loc 1 4377 15 is_stmt 0 view .LVU3518 + 10456 00e0 A36B ldr r3, [r4, #56] +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10457 .loc 1 4377 43 view .LVU3519 + 10458 00e2 304A ldr r2, .L606+24 + ARM GAS /tmp/cc4IUqI9.s page 375 + + + 10459 00e4 5A63 str r2, [r3, #52] +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10460 .loc 1 4380 11 is_stmt 1 view .LVU3520 +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10461 .loc 1 4380 15 is_stmt 0 view .LVU3521 + 10462 00e6 A06B ldr r0, [r4, #56] + 10463 00e8 FFF7FEFF bl HAL_DMA_Abort_IT + 10464 .LVL775: +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10465 .loc 1 4380 14 discriminator 1 view .LVU3522 + 10466 00ec 0028 cmp r0, #0 + 10467 00ee B0D0 beq .L593 +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10468 .loc 1 4383 13 is_stmt 1 view .LVU3523 +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10469 .loc 1 4383 17 is_stmt 0 view .LVU3524 + 10470 00f0 A06B ldr r0, [r4, #56] +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10471 .loc 1 4383 25 view .LVU3525 + 10472 00f2 436B ldr r3, [r0, #52] +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10473 .loc 1 4383 13 view .LVU3526 + 10474 00f4 9847 blx r3 + 10475 .LVL776: + 10476 00f6 ACE7 b .L593 + 10477 .L605: +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10478 .loc 1 4390 7 is_stmt 1 view .LVU3527 +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10479 .loc 1 4390 16 is_stmt 0 view .LVU3528 + 10480 00f8 2268 ldr r2, [r4] +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10481 .loc 1 4390 26 view .LVU3529 + 10482 00fa 1368 ldr r3, [r2] +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10483 .loc 1 4390 10 view .LVU3530 + 10484 00fc 1B04 lsls r3, r3, #16 + 10485 00fe A8D5 bpl .L593 +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10486 .loc 1 4392 9 is_stmt 1 view .LVU3531 +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10487 .loc 1 4392 23 is_stmt 0 view .LVU3532 + 10488 0100 1368 ldr r3, [r2] +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10489 .loc 1 4392 29 view .LVU3533 + 10490 0102 2349 ldr r1, .L606+4 + 10491 0104 0B40 ands r3, r1 + 10492 0106 1360 str r3, [r2] +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10493 .loc 1 4395 9 is_stmt 1 view .LVU3534 +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10494 .loc 1 4395 17 is_stmt 0 view .LVU3535 + 10495 0108 E36B ldr r3, [r4, #60] +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10496 .loc 1 4395 12 view .LVU3536 + 10497 010a 002B cmp r3, #0 + 10498 010c A1D0 beq .L593 + ARM GAS /tmp/cc4IUqI9.s page 376 + + +4399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10499 .loc 1 4399 11 is_stmt 1 view .LVU3537 +4399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10500 .loc 1 4399 43 is_stmt 0 view .LVU3538 + 10501 010e 254A ldr r2, .L606+24 + 10502 0110 5A63 str r2, [r3, #52] +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10503 .loc 1 4402 11 is_stmt 1 view .LVU3539 +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10504 .loc 1 4402 15 is_stmt 0 view .LVU3540 + 10505 0112 E06B ldr r0, [r4, #60] + 10506 0114 FFF7FEFF bl HAL_DMA_Abort_IT + 10507 .LVL777: +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10508 .loc 1 4402 14 discriminator 1 view .LVU3541 + 10509 0118 0028 cmp r0, #0 + 10510 011a 9AD0 beq .L593 +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10511 .loc 1 4405 13 is_stmt 1 view .LVU3542 +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10512 .loc 1 4405 17 is_stmt 0 view .LVU3543 + 10513 011c E06B ldr r0, [r4, #60] +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10514 .loc 1 4405 25 view .LVU3544 + 10515 011e 436B ldr r3, [r0, #52] +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10516 .loc 1 4405 13 view .LVU3545 + 10517 0120 9847 blx r3 + 10518 .LVL778: + 10519 0122 96E7 b .L593 + 10520 .L594: +4448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10521 .loc 1 4448 7 is_stmt 1 view .LVU3546 +4448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10522 .loc 1 4448 23 is_stmt 0 view .LVU3547 + 10523 0124 4123 movs r3, #65 + 10524 0126 2822 movs r2, #40 + 10525 0128 E254 strb r2, [r4, r3] +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10526 .loc 1 4449 7 is_stmt 1 view .LVU3548 +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10527 .loc 1 4449 23 is_stmt 0 view .LVU3549 + 10528 012a 0022 movs r2, #0 + 10529 012c 0133 adds r3, r3, #1 + 10530 012e E254 strb r2, [r4, r3] +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10531 .loc 1 4452 7 is_stmt 1 view .LVU3550 +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10532 .loc 1 4452 11 is_stmt 0 view .LVU3551 + 10533 0130 636C ldr r3, [r4, #68] +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10534 .loc 1 4452 23 view .LVU3552 + 10535 0132 8021 movs r1, #128 + 10536 0134 0B43 orrs r3, r1 + 10537 0136 6364 str r3, [r4, #68] +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10538 .loc 1 4455 7 is_stmt 1 view .LVU3553 + ARM GAS /tmp/cc4IUqI9.s page 377 + + +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10539 .loc 1 4455 7 view .LVU3554 + 10540 0138 4023 movs r3, #64 + 10541 013a E254 strb r2, [r4, r3] +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10542 .loc 1 4455 7 view .LVU3555 +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10543 .loc 1 4457 7 view .LVU3556 +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10544 .loc 1 4457 14 is_stmt 0 view .LVU3557 + 10545 013c 0125 movs r5, #1 + 10546 013e 21E0 b .L589 + 10547 .LVL779: + 10548 .L595: +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10549 .loc 1 4463 7 is_stmt 1 view .LVU3558 +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10550 .loc 1 4463 11 is_stmt 0 view .LVU3559 + 10551 0140 638D ldrh r3, [r4, #42] +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10552 .loc 1 4463 30 view .LVU3560 + 10553 0142 228D ldrh r2, [r4, #40] +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10554 .loc 1 4463 23 view .LVU3561 + 10555 0144 9B1A subs r3, r3, r2 + 10556 0146 9BB2 uxth r3, r3 + 10557 0148 6385 strh r3, [r4, #42] +4466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10558 .loc 1 4466 7 is_stmt 1 view .LVU3562 +4466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10559 .loc 1 4466 22 is_stmt 0 view .LVU3563 + 10560 014a 0023 movs r3, #0 + 10561 014c 2385 strh r3, [r4, #40] +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 10562 .loc 1 4483 5 is_stmt 1 view .LVU3564 +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 10563 .loc 1 4483 11 is_stmt 0 view .LVU3565 + 10564 014e 2268 ldr r2, [r4] + 10565 0150 9169 ldr r1, [r2, #24] + 10566 0152 0833 adds r3, r3, #8 + 10567 0154 0B40 ands r3, r1 + 10568 .LVL780: +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10569 .loc 1 4484 5 is_stmt 1 view .LVU3566 +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10570 .loc 1 4484 10 is_stmt 0 view .LVU3567 + 10571 0156 9169 ldr r1, [r2, #24] +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10572 .loc 1 4484 8 view .LVU3568 + 10573 0158 C903 lsls r1, r1, #15 + 10574 015a 0DD5 bpl .L597 + 10575 .LVL781: + 10576 .L598: +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10577 .loc 1 4492 5 is_stmt 1 view .LVU3569 +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10578 .loc 1 4492 5 view .LVU3570 + ARM GAS /tmp/cc4IUqI9.s page 378 + + + 10579 015c 4023 movs r3, #64 + 10580 015e 0022 movs r2, #0 +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10581 .loc 1 4492 5 is_stmt 0 view .LVU3571 + 10582 0160 E254 strb r2, [r4, r3] +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10583 .loc 1 4492 5 is_stmt 1 view .LVU3572 +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10584 .loc 1 4495 5 view .LVU3573 +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10585 .loc 1 4495 9 is_stmt 0 view .LVU3574 + 10586 0162 2268 ldr r2, [r4] +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10587 .loc 1 4495 19 view .LVU3575 + 10588 0164 1168 ldr r1, [r2] +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10589 .loc 1 4495 25 view .LVU3576 + 10590 0166 8023 movs r3, #128 + 10591 0168 1B02 lsls r3, r3, #8 + 10592 016a 0B43 orrs r3, r1 + 10593 016c 1360 str r3, [r2] +4501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10594 .loc 1 4501 5 is_stmt 1 view .LVU3577 + 10595 016e 0749 ldr r1, .L606 + 10596 0170 2000 movs r0, r4 + 10597 .LVL782: +4501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10598 .loc 1 4501 5 is_stmt 0 view .LVU3578 + 10599 0172 FFF7FEFF bl I2C_Enable_IRQ + 10600 .LVL783: +4503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10601 .loc 1 4503 5 is_stmt 1 view .LVU3579 +4503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10602 .loc 1 4503 12 is_stmt 0 view .LVU3580 + 10603 0176 05E0 b .L589 + 10604 .LVL784: + 10605 .L597: +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10606 .loc 1 4484 55 discriminator 1 view .LVU3581 + 10607 0178 002B cmp r3, #0 + 10608 017a EFD0 beq .L598 +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10609 .loc 1 4488 7 is_stmt 1 view .LVU3582 + 10610 017c 0823 movs r3, #8 + 10611 .LVL785: +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10612 .loc 1 4488 7 is_stmt 0 view .LVU3583 + 10613 017e D361 str r3, [r2, #28] + 10614 0180 ECE7 b .L598 + 10615 .LVL786: + 10616 .L599: +4507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10617 .loc 1 4507 12 view .LVU3584 + 10618 0182 0125 movs r5, #1 + 10619 .LVL787: + 10620 .L589: +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 379 + + + 10621 .loc 1 4509 1 view .LVU3585 + 10622 0184 2800 movs r0, r5 + 10623 @ sp needed + 10624 .LVL788: + 10625 .LVL789: + 10626 .LVL790: +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10627 .loc 1 4509 1 view .LVU3586 + 10628 0186 F8BD pop {r3, r4, r5, r6, r7, pc} + 10629 .LVL791: + 10630 .L600: +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10631 .loc 1 4359 5 discriminator 1 view .LVU3587 + 10632 0188 0225 movs r5, #2 + 10633 018a FBE7 b .L589 + 10634 .L607: + 10635 .align 2 + 10636 .L606: + 10637 018c 02800000 .word 32770 + 10638 0190 FF7FFFFF .word -32769 + 10639 0194 00000000 .word I2C_Slave_ISR_DMA + 10640 0198 00000000 .word I2C_DMASlaveReceiveCplt + 10641 019c 00000000 .word I2C_DMAError + 10642 01a0 FFBFFFFF .word -16385 + 10643 01a4 00000000 .word I2C_DMAAbort + 10644 .cfi_endproc + 10645 .LFE70: + 10647 .section .text.HAL_I2C_EnableListen_IT,"ax",%progbits + 10648 .align 1 + 10649 .global HAL_I2C_EnableListen_IT + 10650 .syntax unified + 10651 .code 16 + 10652 .thumb_func + 10654 HAL_I2C_EnableListen_IT: + 10655 .LVL792: + 10656 .LFB71: +4518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 10657 .loc 1 4518 1 is_stmt 1 view -0 + 10658 .cfi_startproc + 10659 @ args = 0, pretend = 0, frame = 0 + 10660 @ frame_needed = 0, uses_anonymous_args = 0 +4518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 10661 .loc 1 4518 1 is_stmt 0 view .LVU3589 + 10662 0000 10B5 push {r4, lr} + 10663 .cfi_def_cfa_offset 8 + 10664 .cfi_offset 4, -8 + 10665 .cfi_offset 14, -4 +4519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10666 .loc 1 4519 3 is_stmt 1 view .LVU3590 +4519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10667 .loc 1 4519 11 is_stmt 0 view .LVU3591 + 10668 0002 4123 movs r3, #65 + 10669 0004 C35C ldrb r3, [r0, r3] +4519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10670 .loc 1 4519 6 view .LVU3592 + 10671 0006 202B cmp r3, #32 + 10672 0008 01D0 beq .L611 + ARM GAS /tmp/cc4IUqI9.s page 380 + + +4531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10673 .loc 1 4531 12 view .LVU3593 + 10674 000a 0220 movs r0, #2 + 10675 .LVL793: + 10676 .L609: +4533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10677 .loc 1 4533 1 view .LVU3594 + 10678 @ sp needed + 10679 000c 10BD pop {r4, pc} + 10680 .LVL794: + 10681 .L611: +4521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10682 .loc 1 4521 5 is_stmt 1 view .LVU3595 +4521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10683 .loc 1 4521 17 is_stmt 0 view .LVU3596 + 10684 000e 2133 adds r3, r3, #33 + 10685 0010 2822 movs r2, #40 + 10686 0012 C254 strb r2, [r0, r3] +4522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10687 .loc 1 4522 5 is_stmt 1 view .LVU3597 +4522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10688 .loc 1 4522 19 is_stmt 0 view .LVU3598 + 10689 0014 034B ldr r3, .L612 + 10690 0016 4363 str r3, [r0, #52] +4525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10691 .loc 1 4525 5 is_stmt 1 view .LVU3599 + 10692 0018 8021 movs r1, #128 + 10693 001a 0902 lsls r1, r1, #8 + 10694 001c FFF7FEFF bl I2C_Enable_IRQ + 10695 .LVL795: +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10696 .loc 1 4527 5 view .LVU3600 +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10697 .loc 1 4527 12 is_stmt 0 view .LVU3601 + 10698 0020 0020 movs r0, #0 + 10699 0022 F3E7 b .L609 + 10700 .L613: + 10701 .align 2 + 10702 .L612: + 10703 0024 00000000 .word I2C_Slave_ISR_IT + 10704 .cfi_endproc + 10705 .LFE71: + 10707 .section .text.HAL_I2C_DisableListen_IT,"ax",%progbits + 10708 .align 1 + 10709 .global HAL_I2C_DisableListen_IT + 10710 .syntax unified + 10711 .code 16 + 10712 .thumb_func + 10714 HAL_I2C_DisableListen_IT: + 10715 .LVL796: + 10716 .LFB72: +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 10717 .loc 1 4542 1 is_stmt 1 view -0 + 10718 .cfi_startproc + 10719 @ args = 0, pretend = 0, frame = 0 + 10720 @ frame_needed = 0, uses_anonymous_args = 0 +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + ARM GAS /tmp/cc4IUqI9.s page 381 + + + 10721 .loc 1 4542 1 is_stmt 0 view .LVU3603 + 10722 0000 70B5 push {r4, r5, r6, lr} + 10723 .cfi_def_cfa_offset 16 + 10724 .cfi_offset 4, -16 + 10725 .cfi_offset 5, -12 + 10726 .cfi_offset 6, -8 + 10727 .cfi_offset 14, -4 +4544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10728 .loc 1 4544 3 is_stmt 1 view .LVU3604 +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10729 .loc 1 4547 3 view .LVU3605 +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10730 .loc 1 4547 11 is_stmt 0 view .LVU3606 + 10731 0002 4123 movs r3, #65 + 10732 0004 C35C ldrb r3, [r0, r3] +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10733 .loc 1 4547 6 view .LVU3607 + 10734 0006 282B cmp r3, #40 + 10735 0008 01D0 beq .L617 +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10736 .loc 1 4562 12 view .LVU3608 + 10737 000a 0220 movs r0, #2 + 10738 .LVL797: + 10739 .L615: +4564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10740 .loc 1 4564 1 view .LVU3609 + 10741 @ sp needed + 10742 000c 70BD pop {r4, r5, r6, pc} + 10743 .LVL798: + 10744 .L617: +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 10745 .loc 1 4549 5 is_stmt 1 view .LVU3610 +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 10746 .loc 1 4549 26 is_stmt 0 view .LVU3611 + 10747 000e 4124 movs r4, #65 + 10748 0010 025D ldrb r2, [r0, r4] + 10749 .LVL799: +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10750 .loc 1 4550 5 is_stmt 1 view .LVU3612 +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10751 .loc 1 4550 48 is_stmt 0 view .LVU3613 + 10752 0012 4221 movs r1, #66 + 10753 0014 435C ldrb r3, [r0, r1] +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10754 .loc 1 4550 31 view .LVU3614 + 10755 0016 0325 movs r5, #3 + 10756 0018 2A40 ands r2, r5 + 10757 .LVL800: +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10758 .loc 1 4550 31 view .LVU3615 + 10759 001a 1343 orrs r3, r2 +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10760 .loc 1 4550 25 view .LVU3616 + 10761 001c 0363 str r3, [r0, #48] +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10762 .loc 1 4551 5 is_stmt 1 view .LVU3617 +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + ARM GAS /tmp/cc4IUqI9.s page 382 + + + 10763 .loc 1 4551 17 is_stmt 0 view .LVU3618 + 10764 001e 2023 movs r3, #32 + 10765 0020 0355 strb r3, [r0, r4] +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10766 .loc 1 4552 5 is_stmt 1 view .LVU3619 +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10767 .loc 1 4552 16 is_stmt 0 view .LVU3620 + 10768 0022 0023 movs r3, #0 + 10769 0024 4354 strb r3, [r0, r1] +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10770 .loc 1 4553 5 is_stmt 1 view .LVU3621 +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10771 .loc 1 4553 19 is_stmt 0 view .LVU3622 + 10772 0026 4363 str r3, [r0, #52] +4556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10773 .loc 1 4556 5 is_stmt 1 view .LVU3623 + 10774 0028 3E31 adds r1, r1, #62 + 10775 002a 0902 lsls r1, r1, #8 + 10776 002c FFF7FEFF bl I2C_Disable_IRQ + 10777 .LVL801: +4558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10778 .loc 1 4558 5 view .LVU3624 +4558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10779 .loc 1 4558 12 is_stmt 0 view .LVU3625 + 10780 0030 0020 movs r0, #0 + 10781 0032 EBE7 b .L615 + 10782 .cfi_endproc + 10783 .LFE72: + 10785 .section .text.HAL_I2C_Master_Abort_IT,"ax",%progbits + 10786 .align 1 + 10787 .global HAL_I2C_Master_Abort_IT + 10788 .syntax unified + 10789 .code 16 + 10790 .thumb_func + 10792 HAL_I2C_Master_Abort_IT: + 10793 .LVL802: + 10794 .LFB73: +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; + 10795 .loc 1 4575 1 is_stmt 1 view -0 + 10796 .cfi_startproc + 10797 @ args = 0, pretend = 0, frame = 0 + 10798 @ frame_needed = 0, uses_anonymous_args = 0 +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; + 10799 .loc 1 4575 1 is_stmt 0 view .LVU3627 + 10800 0000 30B5 push {r4, r5, lr} + 10801 .cfi_def_cfa_offset 12 + 10802 .cfi_offset 4, -12 + 10803 .cfi_offset 5, -8 + 10804 .cfi_offset 14, -4 + 10805 0002 83B0 sub sp, sp, #12 + 10806 .cfi_def_cfa_offset 24 + 10807 0004 0400 movs r4, r0 + 10808 0006 0D00 movs r5, r1 +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10809 .loc 1 4576 3 is_stmt 1 view .LVU3628 +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10810 .loc 1 4576 23 is_stmt 0 view .LVU3629 + ARM GAS /tmp/cc4IUqI9.s page 383 + + + 10811 0008 4223 movs r3, #66 + 10812 000a C35C ldrb r3, [r0, r3] + 10813 000c DAB2 uxtb r2, r3 + 10814 .LVL803: +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10815 .loc 1 4578 3 is_stmt 1 view .LVU3630 +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10816 .loc 1 4578 6 is_stmt 0 view .LVU3631 + 10817 000e 102B cmp r3, #16 + 10818 0010 01D0 beq .L619 +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10819 .loc 1 4578 41 discriminator 1 view .LVU3632 + 10820 0012 402A cmp r2, #64 + 10821 0014 32D1 bne .L623 + 10822 .L619: +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10823 .loc 1 4581 5 is_stmt 1 view .LVU3633 +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10824 .loc 1 4581 5 view .LVU3634 + 10825 0016 4023 movs r3, #64 + 10826 0018 E35C ldrb r3, [r4, r3] + 10827 001a 012B cmp r3, #1 + 10828 001c 30D0 beq .L624 +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10829 .loc 1 4581 5 discriminator 2 view .LVU3635 + 10830 001e 4023 movs r3, #64 + 10831 0020 0122 movs r2, #1 + 10832 .LVL804: +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10833 .loc 1 4581 5 is_stmt 0 discriminator 2 view .LVU3636 + 10834 0022 E254 strb r2, [r4, r3] +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10835 .loc 1 4581 5 is_stmt 1 discriminator 2 view .LVU3637 +4584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10836 .loc 1 4584 5 view .LVU3638 +4584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10837 .loc 1 4584 13 is_stmt 0 view .LVU3639 + 10838 0024 0133 adds r3, r3, #1 + 10839 0026 E35C ldrb r3, [r4, r3] +4584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10840 .loc 1 4584 8 view .LVU3640 + 10841 0028 212B cmp r3, #33 + 10842 002a 19D0 beq .L625 +4589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10843 .loc 1 4589 10 is_stmt 1 view .LVU3641 +4589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10844 .loc 1 4589 18 is_stmt 0 view .LVU3642 + 10845 002c 4123 movs r3, #65 + 10846 002e E35C ldrb r3, [r4, r3] +4589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10847 .loc 1 4589 13 view .LVU3643 + 10848 0030 222B cmp r3, #34 + 10849 0032 1CD0 beq .L626 + 10850 .LVL805: + 10851 .L622: +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10852 .loc 1 4597 5 is_stmt 1 view .LVU3644 + ARM GAS /tmp/cc4IUqI9.s page 384 + + +4600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10853 .loc 1 4600 5 view .LVU3645 +4600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10854 .loc 1 4600 17 is_stmt 0 view .LVU3646 + 10855 0034 4123 movs r3, #65 + 10856 0036 6022 movs r2, #96 + 10857 0038 E254 strb r2, [r4, r3] +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10858 .loc 1 4604 5 is_stmt 1 view .LVU3647 + 10859 003a 3F33 adds r3, r3, #63 + 10860 003c 114A ldr r2, .L627 + 10861 003e 0092 str r2, [sp] + 10862 0040 9B04 lsls r3, r3, #18 + 10863 0042 0122 movs r2, #1 + 10864 0044 2900 movs r1, r5 + 10865 0046 2000 movs r0, r4 + 10866 0048 FFF7FEFF bl I2C_TransferConfig + 10867 .LVL806: +4607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10868 .loc 1 4607 5 view .LVU3648 +4607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10869 .loc 1 4607 5 view .LVU3649 + 10870 004c 4023 movs r3, #64 + 10871 004e 0022 movs r2, #0 + 10872 0050 E254 strb r2, [r4, r3] +4607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10873 .loc 1 4607 5 view .LVU3650 +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10874 .loc 1 4612 5 view .LVU3651 + 10875 0052 2021 movs r1, #32 + 10876 0054 2000 movs r0, r4 + 10877 0056 FFF7FEFF bl I2C_Enable_IRQ + 10878 .LVL807: +4614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10879 .loc 1 4614 5 view .LVU3652 +4614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10880 .loc 1 4614 12 is_stmt 0 view .LVU3653 + 10881 005a 0020 movs r0, #0 + 10882 .L620: +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10883 .loc 1 4622 1 view .LVU3654 + 10884 005c 03B0 add sp, sp, #12 + 10885 @ sp needed + 10886 .LVL808: + 10887 .LVL809: +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10888 .loc 1 4622 1 view .LVU3655 + 10889 005e 30BD pop {r4, r5, pc} + 10890 .LVL810: + 10891 .L625: +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10892 .loc 1 4586 7 is_stmt 1 view .LVU3656 + 10893 0060 0121 movs r1, #1 + 10894 .LVL811: +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10895 .loc 1 4586 7 is_stmt 0 view .LVU3657 + 10896 0062 2000 movs r0, r4 + ARM GAS /tmp/cc4IUqI9.s page 385 + + + 10897 .LVL812: +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10898 .loc 1 4586 7 view .LVU3658 + 10899 0064 FFF7FEFF bl I2C_Disable_IRQ + 10900 .LVL813: +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10901 .loc 1 4587 7 is_stmt 1 view .LVU3659 +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10902 .loc 1 4587 27 is_stmt 0 view .LVU3660 + 10903 0068 1123 movs r3, #17 + 10904 006a 2363 str r3, [r4, #48] + 10905 006c E2E7 b .L622 + 10906 .LVL814: + 10907 .L626: +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10908 .loc 1 4591 7 is_stmt 1 view .LVU3661 + 10909 006e 0221 movs r1, #2 + 10910 .LVL815: +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10911 .loc 1 4591 7 is_stmt 0 view .LVU3662 + 10912 0070 2000 movs r0, r4 + 10913 .LVL816: +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10914 .loc 1 4591 7 view .LVU3663 + 10915 0072 FFF7FEFF bl I2C_Disable_IRQ + 10916 .LVL817: +4592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10917 .loc 1 4592 7 is_stmt 1 view .LVU3664 +4592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10918 .loc 1 4592 27 is_stmt 0 view .LVU3665 + 10919 0076 1223 movs r3, #18 + 10920 0078 2363 str r3, [r4, #48] + 10921 007a DBE7 b .L622 + 10922 .LVL818: + 10923 .L623: +4620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10924 .loc 1 4620 12 view .LVU3666 + 10925 007c 0120 movs r0, #1 + 10926 .LVL819: +4620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10927 .loc 1 4620 12 view .LVU3667 + 10928 007e EDE7 b .L620 + 10929 .LVL820: + 10930 .L624: +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10931 .loc 1 4581 5 discriminator 1 view .LVU3668 + 10932 0080 0220 movs r0, #2 + 10933 .LVL821: +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10934 .loc 1 4581 5 discriminator 1 view .LVU3669 + 10935 0082 EBE7 b .L620 + 10936 .L628: + 10937 .align 2 + 10938 .L627: + 10939 0084 00400080 .word -2147467264 + 10940 .cfi_endproc + 10941 .LFE73: + ARM GAS /tmp/cc4IUqI9.s page 386 + + + 10943 .section .text.HAL_I2C_EV_IRQHandler,"ax",%progbits + 10944 .align 1 + 10945 .global HAL_I2C_EV_IRQHandler + 10946 .syntax unified + 10947 .code 16 + 10948 .thumb_func + 10950 HAL_I2C_EV_IRQHandler: + 10951 .LVL822: + 10952 .LFB74: +4639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 10953 .loc 1 4639 1 is_stmt 1 view -0 + 10954 .cfi_startproc + 10955 @ args = 0, pretend = 0, frame = 0 + 10956 @ frame_needed = 0, uses_anonymous_args = 0 +4639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 10957 .loc 1 4639 1 is_stmt 0 view .LVU3671 + 10958 0000 10B5 push {r4, lr} + 10959 .cfi_def_cfa_offset 8 + 10960 .cfi_offset 4, -8 + 10961 .cfi_offset 14, -4 +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 10962 .loc 1 4641 3 is_stmt 1 view .LVU3672 +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 10963 .loc 1 4641 24 is_stmt 0 view .LVU3673 + 10964 0002 0368 ldr r3, [r0] +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 10965 .loc 1 4641 12 view .LVU3674 + 10966 0004 9969 ldr r1, [r3, #24] + 10967 .LVL823: +4642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10968 .loc 1 4642 3 is_stmt 1 view .LVU3675 +4642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10969 .loc 1 4642 12 is_stmt 0 view .LVU3676 + 10970 0006 1A68 ldr r2, [r3] + 10971 .LVL824: +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10972 .loc 1 4645 3 is_stmt 1 view .LVU3677 +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10973 .loc 1 4645 11 is_stmt 0 view .LVU3678 + 10974 0008 436B ldr r3, [r0, #52] +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10975 .loc 1 4645 6 view .LVU3679 + 10976 000a 002B cmp r3, #0 + 10977 000c 00D0 beq .L629 +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10978 .loc 1 4647 5 is_stmt 1 view .LVU3680 + 10979 000e 9847 blx r3 + 10980 .LVL825: + 10981 .L629: +4649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10982 .loc 1 4649 1 is_stmt 0 view .LVU3681 + 10983 @ sp needed + 10984 0010 10BD pop {r4, pc} + 10985 .cfi_endproc + 10986 .LFE74: + 10988 .section .text.HAL_I2C_MasterTxCpltCallback,"ax",%progbits + 10989 .align 1 + ARM GAS /tmp/cc4IUqI9.s page 387 + + + 10990 .weak HAL_I2C_MasterTxCpltCallback + 10991 .syntax unified + 10992 .code 16 + 10993 .thumb_func + 10995 HAL_I2C_MasterTxCpltCallback: + 10996 .LVL826: + 10997 .LFB76: +4710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10998 .loc 1 4710 1 is_stmt 1 view -0 + 10999 .cfi_startproc + 11000 @ args = 0, pretend = 0, frame = 0 + 11001 @ frame_needed = 0, uses_anonymous_args = 0 + 11002 @ link register save eliminated. +4712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11003 .loc 1 4712 3 view .LVU3683 +4717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11004 .loc 1 4717 1 is_stmt 0 view .LVU3684 + 11005 @ sp needed + 11006 0000 7047 bx lr + 11007 .cfi_endproc + 11008 .LFE76: + 11010 .section .text.HAL_I2C_MasterRxCpltCallback,"ax",%progbits + 11011 .align 1 + 11012 .weak HAL_I2C_MasterRxCpltCallback + 11013 .syntax unified + 11014 .code 16 + 11015 .thumb_func + 11017 HAL_I2C_MasterRxCpltCallback: + 11018 .LVL827: + 11019 .LFB77: +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11020 .loc 1 4726 1 is_stmt 1 view -0 + 11021 .cfi_startproc + 11022 @ args = 0, pretend = 0, frame = 0 + 11023 @ frame_needed = 0, uses_anonymous_args = 0 + 11024 @ link register save eliminated. +4728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11025 .loc 1 4728 3 view .LVU3686 +4733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11026 .loc 1 4733 1 is_stmt 0 view .LVU3687 + 11027 @ sp needed + 11028 0000 7047 bx lr + 11029 .cfi_endproc + 11030 .LFE77: + 11032 .section .text.I2C_ITMasterSeqCplt,"ax",%progbits + 11033 .align 1 + 11034 .syntax unified + 11035 .code 16 + 11036 .thumb_func + 11038 I2C_ITMasterSeqCplt: + 11039 .LVL828: + 11040 .LFB98: +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ + 11041 .loc 1 6053 1 is_stmt 1 view -0 + 11042 .cfi_startproc + 11043 @ args = 0, pretend = 0, frame = 0 + 11044 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cc4IUqI9.s page 388 + + +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ + 11045 .loc 1 6053 1 is_stmt 0 view .LVU3689 + 11046 0000 70B5 push {r4, r5, r6, lr} + 11047 .cfi_def_cfa_offset 16 + 11048 .cfi_offset 4, -16 + 11049 .cfi_offset 5, -12 + 11050 .cfi_offset 6, -8 + 11051 .cfi_offset 14, -4 + 11052 0002 0400 movs r4, r0 +6055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11053 .loc 1 6055 3 is_stmt 1 view .LVU3690 +6055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11054 .loc 1 6055 14 is_stmt 0 view .LVU3691 + 11055 0004 4223 movs r3, #66 + 11056 0006 0022 movs r2, #0 + 11057 0008 C254 strb r2, [r0, r3] +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11058 .loc 1 6059 3 is_stmt 1 view .LVU3692 +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11059 .loc 1 6059 11 is_stmt 0 view .LVU3693 + 11060 000a 013B subs r3, r3, #1 + 11061 000c C35C ldrb r3, [r0, r3] +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11062 .loc 1 6059 6 view .LVU3694 + 11063 000e 212B cmp r3, #33 + 11064 0010 0FD0 beq .L636 +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 11065 .loc 1 6081 5 is_stmt 1 view .LVU3695 +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 11066 .loc 1 6081 25 is_stmt 0 view .LVU3696 + 11067 0012 4123 movs r3, #65 + 11068 0014 2022 movs r2, #32 + 11069 0016 C254 strb r2, [r0, r3] +6082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11070 .loc 1 6082 5 is_stmt 1 view .LVU3697 +6082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11071 .loc 1 6082 25 is_stmt 0 view .LVU3698 + 11072 0018 2F3B subs r3, r3, #47 + 11073 001a 0363 str r3, [r0, #48] +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11074 .loc 1 6083 5 is_stmt 1 view .LVU3699 +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11075 .loc 1 6083 25 is_stmt 0 view .LVU3700 + 11076 001c 0025 movs r5, #0 + 11077 001e 4563 str r5, [r0, #52] +6086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11078 .loc 1 6086 5 is_stmt 1 view .LVU3701 + 11079 0020 0221 movs r1, #2 + 11080 0022 FFF7FEFF bl I2C_Disable_IRQ + 11081 .LVL829: +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11082 .loc 1 6089 5 view .LVU3702 +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11083 .loc 1 6089 5 view .LVU3703 + 11084 0026 4023 movs r3, #64 + 11085 0028 E554 strb r5, [r4, r3] +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 389 + + + 11086 .loc 1 6089 5 view .LVU3704 +6095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11087 .loc 1 6095 5 view .LVU3705 + 11088 002a 2000 movs r0, r4 + 11089 002c FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 11090 .LVL830: + 11091 .L633: +6098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11092 .loc 1 6098 1 is_stmt 0 view .LVU3706 + 11093 @ sp needed + 11094 .LVL831: +6098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11095 .loc 1 6098 1 view .LVU3707 + 11096 0030 70BD pop {r4, r5, r6, pc} + 11097 .LVL832: + 11098 .L636: +6061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 11099 .loc 1 6061 5 is_stmt 1 view .LVU3708 +6061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 11100 .loc 1 6061 25 is_stmt 0 view .LVU3709 + 11101 0032 2033 adds r3, r3, #32 + 11102 0034 2032 adds r2, r2, #32 + 11103 0036 C254 strb r2, [r0, r3] +6062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11104 .loc 1 6062 5 is_stmt 1 view .LVU3710 +6062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11105 .loc 1 6062 25 is_stmt 0 view .LVU3711 + 11106 0038 303B subs r3, r3, #48 + 11107 003a 0363 str r3, [r0, #48] +6063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11108 .loc 1 6063 5 is_stmt 1 view .LVU3712 +6063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11109 .loc 1 6063 25 is_stmt 0 view .LVU3713 + 11110 003c 0025 movs r5, #0 + 11111 003e 4563 str r5, [r0, #52] +6066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11112 .loc 1 6066 5 is_stmt 1 view .LVU3714 + 11113 0040 0121 movs r1, #1 + 11114 0042 FFF7FEFF bl I2C_Disable_IRQ + 11115 .LVL833: +6069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11116 .loc 1 6069 5 view .LVU3715 +6069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11117 .loc 1 6069 5 view .LVU3716 + 11118 0046 4023 movs r3, #64 + 11119 0048 E554 strb r5, [r4, r3] +6069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11120 .loc 1 6069 5 view .LVU3717 +6075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11121 .loc 1 6075 5 view .LVU3718 + 11122 004a 2000 movs r0, r4 + 11123 004c FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 11124 .LVL834: + 11125 0050 EEE7 b .L633 + 11126 .cfi_endproc + 11127 .LFE98: + 11129 .section .text.HAL_I2C_SlaveTxCpltCallback,"ax",%progbits + ARM GAS /tmp/cc4IUqI9.s page 390 + + + 11130 .align 1 + 11131 .weak HAL_I2C_SlaveTxCpltCallback + 11132 .syntax unified + 11133 .code 16 + 11134 .thumb_func + 11136 HAL_I2C_SlaveTxCpltCallback: + 11137 .LVL835: + 11138 .LFB78: +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11139 .loc 1 4741 1 view -0 + 11140 .cfi_startproc + 11141 @ args = 0, pretend = 0, frame = 0 + 11142 @ frame_needed = 0, uses_anonymous_args = 0 + 11143 @ link register save eliminated. +4743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11144 .loc 1 4743 3 view .LVU3720 +4748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11145 .loc 1 4748 1 is_stmt 0 view .LVU3721 + 11146 @ sp needed + 11147 0000 7047 bx lr + 11148 .cfi_endproc + 11149 .LFE78: + 11151 .section .text.HAL_I2C_SlaveRxCpltCallback,"ax",%progbits + 11152 .align 1 + 11153 .weak HAL_I2C_SlaveRxCpltCallback + 11154 .syntax unified + 11155 .code 16 + 11156 .thumb_func + 11158 HAL_I2C_SlaveRxCpltCallback: + 11159 .LVL836: + 11160 .LFB79: +4757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11161 .loc 1 4757 1 is_stmt 1 view -0 + 11162 .cfi_startproc + 11163 @ args = 0, pretend = 0, frame = 0 + 11164 @ frame_needed = 0, uses_anonymous_args = 0 + 11165 @ link register save eliminated. +4759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11166 .loc 1 4759 3 view .LVU3723 +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11167 .loc 1 4764 1 is_stmt 0 view .LVU3724 + 11168 @ sp needed + 11169 0000 7047 bx lr + 11170 .cfi_endproc + 11171 .LFE79: + 11173 .section .text.I2C_ITSlaveSeqCplt,"ax",%progbits + 11174 .align 1 + 11175 .syntax unified + 11176 .code 16 + 11177 .thumb_func + 11179 I2C_ITSlaveSeqCplt: + 11180 .LVL837: + 11181 .LFB99: +6106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 11182 .loc 1 6106 1 is_stmt 1 view -0 + 11183 .cfi_startproc + 11184 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc4IUqI9.s page 391 + + + 11185 @ frame_needed = 0, uses_anonymous_args = 0 +6106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 11186 .loc 1 6106 1 is_stmt 0 view .LVU3726 + 11187 0000 10B5 push {r4, lr} + 11188 .cfi_def_cfa_offset 8 + 11189 .cfi_offset 4, -8 + 11190 .cfi_offset 14, -4 + 11191 0002 0400 movs r4, r0 +6107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11192 .loc 1 6107 3 is_stmt 1 view .LVU3727 +6107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11193 .loc 1 6107 26 is_stmt 0 view .LVU3728 + 11194 0004 0368 ldr r3, [r0] +6107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11195 .loc 1 6107 12 view .LVU3729 + 11196 0006 1A68 ldr r2, [r3] + 11197 .LVL838: +6110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11198 .loc 1 6110 3 is_stmt 1 view .LVU3730 +6110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11199 .loc 1 6110 14 is_stmt 0 view .LVU3731 + 11200 0008 4221 movs r1, #66 + 11201 000a 0020 movs r0, #0 + 11202 .LVL839: +6110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11203 .loc 1 6110 14 view .LVU3732 + 11204 000c 6054 strb r0, [r4, r1] +6113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11205 .loc 1 6113 3 is_stmt 1 view .LVU3733 +6113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11206 .loc 1 6113 6 is_stmt 0 view .LVU3734 + 11207 000e 5104 lsls r1, r2, #17 + 11208 0010 0CD5 bpl .L640 +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11209 .loc 1 6116 5 is_stmt 1 view .LVU3735 +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11210 .loc 1 6116 19 is_stmt 0 view .LVU3736 + 11211 0012 1A68 ldr r2, [r3] + 11212 .LVL840: +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11213 .loc 1 6116 25 view .LVU3737 + 11214 0014 1949 ldr r1, .L647 + 11215 0016 0A40 ands r2, r1 + 11216 0018 1A60 str r2, [r3] + 11217 .L641: +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11218 .loc 1 6126 3 is_stmt 1 view .LVU3738 +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11219 .loc 1 6128 3 view .LVU3739 +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11220 .loc 1 6128 11 is_stmt 0 view .LVU3740 + 11221 001a 4123 movs r3, #65 + 11222 001c E35C ldrb r3, [r4, r3] +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11223 .loc 1 6128 6 view .LVU3741 + 11224 001e 292B cmp r3, #41 + 11225 0020 0BD0 beq .L645 + ARM GAS /tmp/cc4IUqI9.s page 392 + + +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11226 .loc 1 6148 8 is_stmt 1 view .LVU3742 +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11227 .loc 1 6148 16 is_stmt 0 view .LVU3743 + 11228 0022 4123 movs r3, #65 + 11229 0024 E35C ldrb r3, [r4, r3] +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11230 .loc 1 6148 11 view .LVU3744 + 11231 0026 2A2B cmp r3, #42 + 11232 0028 17D0 beq .L646 + 11233 .L639: +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11234 .loc 1 6171 1 view .LVU3745 + 11235 @ sp needed + 11236 .LVL841: +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11237 .loc 1 6171 1 view .LVU3746 + 11238 002a 10BD pop {r4, pc} + 11239 .LVL842: + 11240 .L640: +6118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11241 .loc 1 6118 8 is_stmt 1 view .LVU3747 +6118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11242 .loc 1 6118 11 is_stmt 0 view .LVU3748 + 11243 002c 1204 lsls r2, r2, #16 + 11244 002e F4D5 bpl .L641 + 11245 .LVL843: +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11246 .loc 1 6121 5 is_stmt 1 view .LVU3749 +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11247 .loc 1 6121 19 is_stmt 0 view .LVU3750 + 11248 0030 1A68 ldr r2, [r3] +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11249 .loc 1 6121 25 view .LVU3751 + 11250 0032 1349 ldr r1, .L647+4 + 11251 0034 0A40 ands r2, r1 + 11252 0036 1A60 str r2, [r3] + 11253 0038 EFE7 b .L641 + 11254 .L645: +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 11255 .loc 1 6131 5 is_stmt 1 view .LVU3752 +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 11256 .loc 1 6131 25 is_stmt 0 view .LVU3753 + 11257 003a 1833 adds r3, r3, #24 + 11258 003c 2822 movs r2, #40 + 11259 003e E254 strb r2, [r4, r3] +6132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11260 .loc 1 6132 5 is_stmt 1 view .LVU3754 +6132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11261 .loc 1 6132 25 is_stmt 0 view .LVU3755 + 11262 0040 203B subs r3, r3, #32 + 11263 0042 2363 str r3, [r4, #48] +6135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11264 .loc 1 6135 5 is_stmt 1 view .LVU3756 + 11265 0044 0121 movs r1, #1 + 11266 0046 2000 movs r0, r4 + 11267 0048 FFF7FEFF bl I2C_Disable_IRQ + ARM GAS /tmp/cc4IUqI9.s page 393 + + + 11268 .LVL844: +6138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11269 .loc 1 6138 5 view .LVU3757 +6138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11270 .loc 1 6138 5 view .LVU3758 + 11271 004c 4023 movs r3, #64 + 11272 004e 0022 movs r2, #0 + 11273 0050 E254 strb r2, [r4, r3] +6138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11274 .loc 1 6138 5 view .LVU3759 +6144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11275 .loc 1 6144 5 view .LVU3760 + 11276 0052 2000 movs r0, r4 + 11277 0054 FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 11278 .LVL845: + 11279 0058 E7E7 b .L639 + 11280 .L646: +6151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 11281 .loc 1 6151 5 view .LVU3761 +6151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 11282 .loc 1 6151 25 is_stmt 0 view .LVU3762 + 11283 005a 1733 adds r3, r3, #23 + 11284 005c 2822 movs r2, #40 + 11285 005e E254 strb r2, [r4, r3] +6152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11286 .loc 1 6152 5 is_stmt 1 view .LVU3763 +6152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11287 .loc 1 6152 25 is_stmt 0 view .LVU3764 + 11288 0060 1F3B subs r3, r3, #31 + 11289 0062 2363 str r3, [r4, #48] +6155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11290 .loc 1 6155 5 is_stmt 1 view .LVU3765 + 11291 0064 0221 movs r1, #2 + 11292 0066 2000 movs r0, r4 + 11293 0068 FFF7FEFF bl I2C_Disable_IRQ + 11294 .LVL846: +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11295 .loc 1 6158 5 view .LVU3766 +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11296 .loc 1 6158 5 view .LVU3767 + 11297 006c 4023 movs r3, #64 + 11298 006e 0022 movs r2, #0 + 11299 0070 E254 strb r2, [r4, r3] +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11300 .loc 1 6158 5 view .LVU3768 +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11301 .loc 1 6164 5 view .LVU3769 + 11302 0072 2000 movs r0, r4 + 11303 0074 FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 11304 .LVL847: +6170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11305 .loc 1 6170 3 view .LVU3770 +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11306 .loc 1 6171 1 is_stmt 0 view .LVU3771 + 11307 0078 D7E7 b .L639 + 11308 .L648: + 11309 007a C046 .align 2 + ARM GAS /tmp/cc4IUqI9.s page 394 + + + 11310 .L647: + 11311 007c FFBFFFFF .word -16385 + 11312 0080 FF7FFFFF .word -32769 + 11313 .cfi_endproc + 11314 .LFE99: + 11316 .section .text.I2C_DMASlaveTransmitCplt,"ax",%progbits + 11317 .align 1 + 11318 .syntax unified + 11319 .code 16 + 11320 .thumb_func + 11322 I2C_DMASlaveTransmitCplt: + 11323 .LVL848: + 11324 .LFB107: +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 11325 .loc 1 6831 1 is_stmt 1 view -0 + 11326 .cfi_startproc + 11327 @ args = 0, pretend = 0, frame = 0 + 11328 @ frame_needed = 0, uses_anonymous_args = 0 +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 11329 .loc 1 6831 1 is_stmt 0 view .LVU3773 + 11330 0000 10B5 push {r4, lr} + 11331 .cfi_def_cfa_offset 8 + 11332 .cfi_offset 4, -8 + 11333 .cfi_offset 14, -4 +6833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11334 .loc 1 6833 3 is_stmt 1 view .LVU3774 +6833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11335 .loc 1 6833 22 is_stmt 0 view .LVU3775 + 11336 0002 406A ldr r0, [r0, #36] + 11337 .LVL849: +6834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11338 .loc 1 6834 3 is_stmt 1 view .LVU3776 +6834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11339 .loc 1 6834 12 is_stmt 0 view .LVU3777 + 11340 0004 C36A ldr r3, [r0, #44] + 11341 .LVL850: +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11342 .loc 1 6836 3 is_stmt 1 view .LVU3778 +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11343 .loc 1 6836 6 is_stmt 0 view .LVU3779 + 11344 0006 8022 movs r2, #128 + 11345 0008 5204 lsls r2, r2, #17 + 11346 000a 9342 cmp r3, r2 + 11347 000c 01D0 beq .L650 +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11348 .loc 1 6836 38 discriminator 1 view .LVU3780 + 11349 000e 002B cmp r3, #0 + 11350 0010 06D1 bne .L649 + 11351 .L650: +6839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11352 .loc 1 6839 5 is_stmt 1 view .LVU3781 +6839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11353 .loc 1 6839 9 is_stmt 0 view .LVU3782 + 11354 0012 0268 ldr r2, [r0] +6839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11355 .loc 1 6839 19 view .LVU3783 + 11356 0014 1368 ldr r3, [r2] + ARM GAS /tmp/cc4IUqI9.s page 395 + + + 11357 .LVL851: +6839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11358 .loc 1 6839 25 view .LVU3784 + 11359 0016 0349 ldr r1, .L652 + 11360 0018 0B40 ands r3, r1 + 11361 001a 1360 str r3, [r2] +6843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11362 .loc 1 6843 5 is_stmt 1 view .LVU3785 + 11363 001c FFF7FEFF bl I2C_ITSlaveSeqCplt + 11364 .LVL852: + 11365 .L649: +6851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11366 .loc 1 6851 1 is_stmt 0 view .LVU3786 + 11367 @ sp needed + 11368 0020 10BD pop {r4, pc} + 11369 .L653: + 11370 0022 C046 .align 2 + 11371 .L652: + 11372 0024 FFBFFFFF .word -16385 + 11373 .cfi_endproc + 11374 .LFE107: + 11376 .section .text.I2C_DMASlaveReceiveCplt,"ax",%progbits + 11377 .align 1 + 11378 .syntax unified + 11379 .code 16 + 11380 .thumb_func + 11382 I2C_DMASlaveReceiveCplt: + 11383 .LVL853: + 11384 .LFB109: +6919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 11385 .loc 1 6919 1 is_stmt 1 view -0 + 11386 .cfi_startproc + 11387 @ args = 0, pretend = 0, frame = 0 + 11388 @ frame_needed = 0, uses_anonymous_args = 0 +6919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 11389 .loc 1 6919 1 is_stmt 0 view .LVU3788 + 11390 0000 10B5 push {r4, lr} + 11391 .cfi_def_cfa_offset 8 + 11392 .cfi_offset 4, -8 + 11393 .cfi_offset 14, -4 +6921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11394 .loc 1 6921 3 is_stmt 1 view .LVU3789 +6921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11395 .loc 1 6921 22 is_stmt 0 view .LVU3790 + 11396 0002 406A ldr r0, [r0, #36] + 11397 .LVL854: +6922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11398 .loc 1 6922 3 is_stmt 1 view .LVU3791 +6922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11399 .loc 1 6922 12 is_stmt 0 view .LVU3792 + 11400 0004 C26A ldr r2, [r0, #44] + 11401 .LVL855: +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11402 .loc 1 6924 3 is_stmt 1 view .LVU3793 +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11403 .loc 1 6924 8 is_stmt 0 view .LVU3794 + 11404 0006 C36B ldr r3, [r0, #60] + ARM GAS /tmp/cc4IUqI9.s page 396 + + + 11405 0008 1B68 ldr r3, [r3] + 11406 000a 5B68 ldr r3, [r3, #4] +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11407 .loc 1 6924 6 view .LVU3795 + 11408 000c 002B cmp r3, #0 + 11409 000e 02D1 bne .L654 +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11410 .loc 1 6924 53 discriminator 1 view .LVU3796 + 11411 0010 054B ldr r3, .L657 + 11412 0012 9A42 cmp r2, r3 + 11413 0014 00D1 bne .L656 + 11414 .LVL856: + 11415 .L654: +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11416 .loc 1 6939 1 view .LVU3797 + 11417 @ sp needed + 11418 0016 10BD pop {r4, pc} + 11419 .LVL857: + 11420 .L656: +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11421 .loc 1 6928 5 is_stmt 1 view .LVU3798 +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11422 .loc 1 6928 9 is_stmt 0 view .LVU3799 + 11423 0018 0268 ldr r2, [r0] + 11424 .LVL858: +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11425 .loc 1 6928 19 view .LVU3800 + 11426 001a 1368 ldr r3, [r2] +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11427 .loc 1 6928 25 view .LVU3801 + 11428 001c 0349 ldr r1, .L657+4 + 11429 001e 0B40 ands r3, r1 + 11430 0020 1360 str r3, [r2] +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11431 .loc 1 6931 5 is_stmt 1 view .LVU3802 + 11432 0022 FFF7FEFF bl I2C_ITSlaveSeqCplt + 11433 .LVL859: +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11434 .loc 1 6938 3 view .LVU3803 +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11435 .loc 1 6939 1 is_stmt 0 view .LVU3804 + 11436 0026 F6E7 b .L654 + 11437 .L658: + 11438 .align 2 + 11439 .L657: + 11440 0028 0000FFFF .word -65536 + 11441 002c FF7FFFFF .word -32769 + 11442 .cfi_endproc + 11443 .LFE109: + 11445 .section .text.HAL_I2C_AddrCallback,"ax",%progbits + 11446 .align 1 + 11447 .weak HAL_I2C_AddrCallback + 11448 .syntax unified + 11449 .code 16 + 11450 .thumb_func + 11452 HAL_I2C_AddrCallback: + 11453 .LVL860: + ARM GAS /tmp/cc4IUqI9.s page 397 + + + 11454 .LFB80: +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11455 .loc 1 4775 1 is_stmt 1 view -0 + 11456 .cfi_startproc + 11457 @ args = 0, pretend = 0, frame = 0 + 11458 @ frame_needed = 0, uses_anonymous_args = 0 + 11459 @ link register save eliminated. +4777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(TransferDirection); + 11460 .loc 1 4777 3 view .LVU3806 +4778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(AddrMatchCode); + 11461 .loc 1 4778 3 view .LVU3807 +4779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11462 .loc 1 4779 3 view .LVU3808 +4784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11463 .loc 1 4784 1 is_stmt 0 view .LVU3809 + 11464 @ sp needed + 11465 0000 7047 bx lr + 11466 .cfi_endproc + 11467 .LFE80: + 11469 .section .text.I2C_ITAddrCplt,"ax",%progbits + 11470 .align 1 + 11471 .syntax unified + 11472 .code 16 + 11473 .thumb_func + 11475 I2C_ITAddrCplt: + 11476 .LVL861: + 11477 .LFB97: +5958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint8_t transferdirection; + 11478 .loc 1 5958 1 is_stmt 1 view -0 + 11479 .cfi_startproc + 11480 @ args = 0, pretend = 0, frame = 0 + 11481 @ frame_needed = 0, uses_anonymous_args = 0 +5958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint8_t transferdirection; + 11482 .loc 1 5958 1 is_stmt 0 view .LVU3811 + 11483 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 11484 .cfi_def_cfa_offset 24 + 11485 .cfi_offset 3, -24 + 11486 .cfi_offset 4, -20 + 11487 .cfi_offset 5, -16 + 11488 .cfi_offset 6, -12 + 11489 .cfi_offset 7, -8 + 11490 .cfi_offset 14, -4 + 11491 0002 0400 movs r4, r0 +5959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t slaveaddrcode; + 11492 .loc 1 5959 3 is_stmt 1 view .LVU3812 +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd1code; + 11493 .loc 1 5960 3 view .LVU3813 +5961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd2code; + 11494 .loc 1 5961 3 view .LVU3814 +5962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11495 .loc 1 5962 3 view .LVU3815 +5965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11496 .loc 1 5965 3 view .LVU3816 +5968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11497 .loc 1 5968 3 view .LVU3817 +5968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11498 .loc 1 5968 22 is_stmt 0 view .LVU3818 + ARM GAS /tmp/cc4IUqI9.s page 398 + + + 11499 0004 4123 movs r3, #65 + 11500 0006 C35C ldrb r3, [r0, r3] +5968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11501 .loc 1 5968 6 view .LVU3819 + 11502 0008 2822 movs r2, #40 + 11503 000a 1340 ands r3, r2 + 11504 000c 282B cmp r3, #40 + 11505 000e 06D0 beq .L665 +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11506 .loc 1 6040 5 is_stmt 1 view .LVU3820 + 11507 0010 0368 ldr r3, [r0] + 11508 0012 0822 movs r2, #8 + 11509 0014 DA61 str r2, [r3, #28] +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11510 .loc 1 6043 5 view .LVU3821 +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11511 .loc 1 6043 5 view .LVU3822 + 11512 0016 4023 movs r3, #64 + 11513 0018 0022 movs r2, #0 + 11514 001a C254 strb r2, [r0, r3] +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11515 .loc 1 6043 5 discriminator 1 view .LVU3823 + 11516 .LVL862: + 11517 .L660: +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11518 .loc 1 6045 1 is_stmt 0 view .LVU3824 + 11519 @ sp needed + 11520 .LVL863: +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11521 .loc 1 6045 1 view .LVU3825 + 11522 001c F8BD pop {r3, r4, r5, r6, r7, pc} + 11523 .LVL864: + 11524 .L665: +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 11525 .loc 1 5970 5 is_stmt 1 view .LVU3826 +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 11526 .loc 1 5970 25 is_stmt 0 view .LVU3827 + 11527 001e 0068 ldr r0, [r0] + 11528 .LVL865: +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 11529 .loc 1 5970 25 view .LVU3828 + 11530 0020 8569 ldr r5, [r0, #24] + 11531 0022 2D0C lsrs r5, r5, #16 +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 11532 .loc 1 5970 23 view .LVU3829 + 11533 0024 273B subs r3, r3, #39 + 11534 0026 1D40 ands r5, r3 + 11535 .LVL866: +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 11536 .loc 1 5971 5 is_stmt 1 view .LVU3830 +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 11537 .loc 1 5971 25 is_stmt 0 view .LVU3831 + 11538 0028 8669 ldr r6, [r0, #24] + 11539 002a 360C lsrs r6, r6, #16 +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 11540 .loc 1 5971 23 view .LVU3832 + 11541 002c FE21 movs r1, #254 + ARM GAS /tmp/cc4IUqI9.s page 399 + + + 11542 .LVL867: +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 11543 .loc 1 5971 23 view .LVU3833 + 11544 002e 0E40 ands r6, r1 + 11545 .LVL868: +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 11546 .loc 1 5972 5 is_stmt 1 view .LVU3834 +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 11547 .loc 1 5972 25 is_stmt 0 view .LVU3835 + 11548 0030 8368 ldr r3, [r0, #8] +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 11549 .loc 1 5972 23 view .LVU3836 + 11550 0032 9B05 lsls r3, r3, #22 + 11551 0034 9B0D lsrs r3, r3, #22 + 11552 .LVL869: +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11553 .loc 1 5973 5 is_stmt 1 view .LVU3837 +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11554 .loc 1 5973 25 is_stmt 0 view .LVU3838 + 11555 0036 C768 ldr r7, [r0, #12] +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11556 .loc 1 5973 23 view .LVU3839 + 11557 0038 0F40 ands r7, r1 + 11558 .LVL870: +5976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11559 .loc 1 5976 5 is_stmt 1 view .LVU3840 +5976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11560 .loc 1 5976 19 is_stmt 0 view .LVU3841 + 11561 003a E268 ldr r2, [r4, #12] +5976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11562 .loc 1 5976 8 view .LVU3842 + 11563 003c 022A cmp r2, #2 + 11564 003e 24D1 bne .L662 +5978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11565 .loc 1 5978 7 is_stmt 1 view .LVU3843 +5978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11566 .loc 1 5978 44 is_stmt 0 view .LVU3844 + 11567 0040 DA09 lsrs r2, r3, #7 + 11568 0042 7240 eors r2, r6 +5978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11569 .loc 1 5978 10 view .LVU3845 + 11570 0044 F839 subs r1, r1, #248 + 11571 0046 1142 tst r1, r2 + 11572 0048 11D1 bne .L663 +5980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrEventCount++; + 11573 .loc 1 5980 9 is_stmt 1 view .LVU3846 + 11574 .LVL871: +5981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 11575 .loc 1 5981 9 view .LVU3847 +5981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 11576 .loc 1 5981 13 is_stmt 0 view .LVU3848 + 11577 004a A26C ldr r2, [r4, #72] +5981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 11578 .loc 1 5981 29 view .LVU3849 + 11579 004c 0132 adds r2, r2, #1 + 11580 004e A264 str r2, [r4, #72] +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 400 + + + 11581 .loc 1 5982 9 is_stmt 1 view .LVU3850 +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11582 .loc 1 5982 17 is_stmt 0 view .LVU3851 + 11583 0050 A26C ldr r2, [r4, #72] +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11584 .loc 1 5982 12 view .LVU3852 + 11585 0052 022A cmp r2, #2 + 11586 0054 E2D1 bne .L660 +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11587 .loc 1 5985 11 is_stmt 1 view .LVU3853 +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11588 .loc 1 5985 32 is_stmt 0 view .LVU3854 + 11589 0056 0022 movs r2, #0 + 11590 0058 A264 str r2, [r4, #72] +5988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11591 .loc 1 5988 11 is_stmt 1 view .LVU3855 + 11592 005a 0231 adds r1, r1, #2 + 11593 005c C161 str r1, [r0, #28] +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11594 .loc 1 5991 11 view .LVU3856 +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11595 .loc 1 5991 11 view .LVU3857 + 11596 005e 3831 adds r1, r1, #56 + 11597 0060 6254 strb r2, [r4, r1] +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11598 .loc 1 5991 11 view .LVU3858 +5997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11599 .loc 1 5997 11 view .LVU3859 + 11600 0062 1A00 movs r2, r3 + 11601 0064 2900 movs r1, r5 + 11602 0066 2000 movs r0, r4 + 11603 0068 FFF7FEFF bl HAL_I2C_AddrCallback + 11604 .LVL872: +5997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11605 .loc 1 5997 11 is_stmt 0 view .LVU3860 + 11606 006c D6E7 b .L660 + 11607 .LVL873: + 11608 .L663: +6003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11609 .loc 1 6003 9 is_stmt 1 view .LVU3861 +6006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11610 .loc 1 6006 9 view .LVU3862 + 11611 006e 8021 movs r1, #128 + 11612 0070 0902 lsls r1, r1, #8 + 11613 0072 2000 movs r0, r4 + 11614 0074 FFF7FEFF bl I2C_Disable_IRQ + 11615 .LVL874: +6009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11616 .loc 1 6009 9 view .LVU3863 +6009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11617 .loc 1 6009 9 view .LVU3864 + 11618 0078 4023 movs r3, #64 + 11619 007a 0022 movs r2, #0 + 11620 007c E254 strb r2, [r4, r3] +6009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11621 .loc 1 6009 9 view .LVU3865 +6015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + ARM GAS /tmp/cc4IUqI9.s page 401 + + + 11622 .loc 1 6015 9 view .LVU3866 + 11623 007e 3A00 movs r2, r7 + 11624 0080 2900 movs r1, r5 + 11625 0082 2000 movs r0, r4 + 11626 0084 FFF7FEFF bl HAL_I2C_AddrCallback + 11627 .LVL875: + 11628 0088 C8E7 b .L660 + 11629 .LVL876: + 11630 .L662: +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11631 .loc 1 6023 7 view .LVU3867 + 11632 008a 8021 movs r1, #128 + 11633 008c 0902 lsls r1, r1, #8 + 11634 008e 2000 movs r0, r4 + 11635 0090 FFF7FEFF bl I2C_Disable_IRQ + 11636 .LVL877: +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11637 .loc 1 6026 7 view .LVU3868 +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11638 .loc 1 6026 7 view .LVU3869 + 11639 0094 4023 movs r3, #64 + 11640 0096 0022 movs r2, #0 + 11641 0098 E254 strb r2, [r4, r3] +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11642 .loc 1 6026 7 view .LVU3870 +6032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11643 .loc 1 6032 7 view .LVU3871 + 11644 009a 3200 movs r2, r6 + 11645 009c 2900 movs r1, r5 + 11646 009e 2000 movs r0, r4 + 11647 00a0 FFF7FEFF bl HAL_I2C_AddrCallback + 11648 .LVL878: + 11649 00a4 BAE7 b .L660 + 11650 .cfi_endproc + 11651 .LFE97: + 11653 .section .text.HAL_I2C_ListenCpltCallback,"ax",%progbits + 11654 .align 1 + 11655 .weak HAL_I2C_ListenCpltCallback + 11656 .syntax unified + 11657 .code 16 + 11658 .thumb_func + 11660 HAL_I2C_ListenCpltCallback: + 11661 .LVL879: + 11662 .LFB81: +4793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11663 .loc 1 4793 1 view -0 + 11664 .cfi_startproc + 11665 @ args = 0, pretend = 0, frame = 0 + 11666 @ frame_needed = 0, uses_anonymous_args = 0 + 11667 @ link register save eliminated. +4795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11668 .loc 1 4795 3 view .LVU3873 +4800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11669 .loc 1 4800 1 is_stmt 0 view .LVU3874 + 11670 @ sp needed + 11671 0000 7047 bx lr + 11672 .cfi_endproc + ARM GAS /tmp/cc4IUqI9.s page 402 + + + 11673 .LFE81: + 11675 .section .text.I2C_ITListenCplt,"ax",%progbits + 11676 .align 1 + 11677 .syntax unified + 11678 .code 16 + 11679 .thumb_func + 11681 I2C_ITListenCplt: + 11682 .LVL880: + 11683 .LFB102: +6539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ + 11684 .loc 1 6539 1 is_stmt 1 view -0 + 11685 .cfi_startproc + 11686 @ args = 0, pretend = 0, frame = 0 + 11687 @ frame_needed = 0, uses_anonymous_args = 0 +6539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ + 11688 .loc 1 6539 1 is_stmt 0 view .LVU3876 + 11689 0000 10B5 push {r4, lr} + 11690 .cfi_def_cfa_offset 8 + 11691 .cfi_offset 4, -8 + 11692 .cfi_offset 14, -4 + 11693 0002 0400 movs r4, r0 +6541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11694 .loc 1 6541 3 is_stmt 1 view .LVU3877 +6541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11695 .loc 1 6541 21 is_stmt 0 view .LVU3878 + 11696 0004 164B ldr r3, .L670 + 11697 0006 C362 str r3, [r0, #44] +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 11698 .loc 1 6542 3 is_stmt 1 view .LVU3879 +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 11699 .loc 1 6542 23 is_stmt 0 view .LVU3880 + 11700 0008 0023 movs r3, #0 + 11701 000a 0363 str r3, [r0, #48] +6543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 11702 .loc 1 6543 3 is_stmt 1 view .LVU3881 +6543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 11703 .loc 1 6543 15 is_stmt 0 view .LVU3882 + 11704 000c 4122 movs r2, #65 + 11705 000e 2020 movs r0, #32 + 11706 .LVL881: +6543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 11707 .loc 1 6543 15 view .LVU3883 + 11708 0010 A054 strb r0, [r4, r2] +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11709 .loc 1 6544 3 is_stmt 1 view .LVU3884 +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11710 .loc 1 6544 14 is_stmt 0 view .LVU3885 + 11711 0012 0132 adds r2, r2, #1 + 11712 0014 A354 strb r3, [r4, r2] +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11713 .loc 1 6545 3 is_stmt 1 view .LVU3886 +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11714 .loc 1 6545 17 is_stmt 0 view .LVU3887 + 11715 0016 6363 str r3, [r4, #52] +6548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11716 .loc 1 6548 3 is_stmt 1 view .LVU3888 +6548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 403 + + + 11717 .loc 1 6548 6 is_stmt 0 view .LVU3889 + 11718 0018 4907 lsls r1, r1, #29 + 11719 001a 13D5 bpl .L668 + 11720 .LVL882: +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11721 .loc 1 6551 5 is_stmt 1 view .LVU3890 +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11722 .loc 1 6551 36 is_stmt 0 view .LVU3891 + 11723 001c 2368 ldr r3, [r4] +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11724 .loc 1 6551 46 view .LVU3892 + 11725 001e 5A6A ldr r2, [r3, #36] +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11726 .loc 1 6551 10 view .LVU3893 + 11727 0020 636A ldr r3, [r4, #36] +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11728 .loc 1 6551 21 view .LVU3894 + 11729 0022 1A70 strb r2, [r3] +6554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11730 .loc 1 6554 5 is_stmt 1 view .LVU3895 +6554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11731 .loc 1 6554 9 is_stmt 0 view .LVU3896 + 11732 0024 636A ldr r3, [r4, #36] +6554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11733 .loc 1 6554 19 view .LVU3897 + 11734 0026 0133 adds r3, r3, #1 + 11735 0028 6362 str r3, [r4, #36] +6556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11736 .loc 1 6556 5 is_stmt 1 view .LVU3898 +6556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11737 .loc 1 6556 14 is_stmt 0 view .LVU3899 + 11738 002a 238D ldrh r3, [r4, #40] +6556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11739 .loc 1 6556 8 view .LVU3900 + 11740 002c 002B cmp r3, #0 + 11741 002e 09D0 beq .L668 +6558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 11742 .loc 1 6558 7 is_stmt 1 view .LVU3901 +6558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 11743 .loc 1 6558 21 is_stmt 0 view .LVU3902 + 11744 0030 013B subs r3, r3, #1 + 11745 0032 2385 strh r3, [r4, #40] +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11746 .loc 1 6559 7 is_stmt 1 view .LVU3903 +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11747 .loc 1 6559 11 is_stmt 0 view .LVU3904 + 11748 0034 638D ldrh r3, [r4, #42] +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11749 .loc 1 6559 22 view .LVU3905 + 11750 0036 013B subs r3, r3, #1 + 11751 0038 9BB2 uxth r3, r3 + 11752 003a 6385 strh r3, [r4, #42] +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11753 .loc 1 6562 7 is_stmt 1 view .LVU3906 +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11754 .loc 1 6562 11 is_stmt 0 view .LVU3907 + 11755 003c 636C ldr r3, [r4, #68] + ARM GAS /tmp/cc4IUqI9.s page 404 + + +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11756 .loc 1 6562 23 view .LVU3908 + 11757 003e 0422 movs r2, #4 + 11758 0040 1343 orrs r3, r2 + 11759 0042 6364 str r3, [r4, #68] + 11760 .L668: +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11761 .loc 1 6567 3 is_stmt 1 view .LVU3909 + 11762 0044 0749 ldr r1, .L670+4 + 11763 0046 2000 movs r0, r4 + 11764 0048 FFF7FEFF bl I2C_Disable_IRQ + 11765 .LVL883: +6570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11766 .loc 1 6570 3 view .LVU3910 + 11767 004c 2368 ldr r3, [r4] + 11768 004e 1022 movs r2, #16 + 11769 0050 DA61 str r2, [r3, #28] +6573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11770 .loc 1 6573 3 view .LVU3911 +6573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11771 .loc 1 6573 3 view .LVU3912 + 11772 0052 4023 movs r3, #64 + 11773 0054 0022 movs r2, #0 + 11774 0056 E254 strb r2, [r4, r3] +6573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11775 .loc 1 6573 3 view .LVU3913 +6579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11776 .loc 1 6579 3 view .LVU3914 + 11777 0058 2000 movs r0, r4 + 11778 005a FFF7FEFF bl HAL_I2C_ListenCpltCallback + 11779 .LVL884: +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11780 .loc 1 6581 1 is_stmt 0 view .LVU3915 + 11781 @ sp needed + 11782 .LVL885: +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11783 .loc 1 6581 1 view .LVU3916 + 11784 005e 10BD pop {r4, pc} + 11785 .L671: + 11786 .align 2 + 11787 .L670: + 11788 0060 0000FFFF .word -65536 + 11789 0064 03800000 .word 32771 + 11790 .cfi_endproc + 11791 .LFE102: + 11793 .section .text.HAL_I2C_MemTxCpltCallback,"ax",%progbits + 11794 .align 1 + 11795 .weak HAL_I2C_MemTxCpltCallback + 11796 .syntax unified + 11797 .code 16 + 11798 .thumb_func + 11800 HAL_I2C_MemTxCpltCallback: + 11801 .LVL886: + 11802 .LFB82: +4809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11803 .loc 1 4809 1 is_stmt 1 view -0 + 11804 .cfi_startproc + ARM GAS /tmp/cc4IUqI9.s page 405 + + + 11805 @ args = 0, pretend = 0, frame = 0 + 11806 @ frame_needed = 0, uses_anonymous_args = 0 + 11807 @ link register save eliminated. +4811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11808 .loc 1 4811 3 view .LVU3918 +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11809 .loc 1 4816 1 is_stmt 0 view .LVU3919 + 11810 @ sp needed + 11811 0000 7047 bx lr + 11812 .cfi_endproc + 11813 .LFE82: + 11815 .section .text.HAL_I2C_MemRxCpltCallback,"ax",%progbits + 11816 .align 1 + 11817 .weak HAL_I2C_MemRxCpltCallback + 11818 .syntax unified + 11819 .code 16 + 11820 .thumb_func + 11822 HAL_I2C_MemRxCpltCallback: + 11823 .LVL887: + 11824 .LFB83: +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11825 .loc 1 4825 1 is_stmt 1 view -0 + 11826 .cfi_startproc + 11827 @ args = 0, pretend = 0, frame = 0 + 11828 @ frame_needed = 0, uses_anonymous_args = 0 + 11829 @ link register save eliminated. +4827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11830 .loc 1 4827 3 view .LVU3921 +4832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11831 .loc 1 4832 1 is_stmt 0 view .LVU3922 + 11832 @ sp needed + 11833 0000 7047 bx lr + 11834 .cfi_endproc + 11835 .LFE83: + 11837 .section .text.HAL_I2C_ErrorCallback,"ax",%progbits + 11838 .align 1 + 11839 .weak HAL_I2C_ErrorCallback + 11840 .syntax unified + 11841 .code 16 + 11842 .thumb_func + 11844 HAL_I2C_ErrorCallback: + 11845 .LVL888: + 11846 .LFB84: +4841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11847 .loc 1 4841 1 is_stmt 1 view -0 + 11848 .cfi_startproc + 11849 @ args = 0, pretend = 0, frame = 0 + 11850 @ frame_needed = 0, uses_anonymous_args = 0 + 11851 @ link register save eliminated. +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11852 .loc 1 4843 3 view .LVU3924 +4848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11853 .loc 1 4848 1 is_stmt 0 view .LVU3925 + 11854 @ sp needed + 11855 0000 7047 bx lr + 11856 .cfi_endproc + 11857 .LFE84: + ARM GAS /tmp/cc4IUqI9.s page 406 + + + 11859 .section .text.HAL_I2C_AbortCpltCallback,"ax",%progbits + 11860 .align 1 + 11861 .weak HAL_I2C_AbortCpltCallback + 11862 .syntax unified + 11863 .code 16 + 11864 .thumb_func + 11866 HAL_I2C_AbortCpltCallback: + 11867 .LVL889: + 11868 .LFB85: +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11869 .loc 1 4857 1 is_stmt 1 view -0 + 11870 .cfi_startproc + 11871 @ args = 0, pretend = 0, frame = 0 + 11872 @ frame_needed = 0, uses_anonymous_args = 0 + 11873 @ link register save eliminated. +4859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11874 .loc 1 4859 3 view .LVU3927 +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11875 .loc 1 4864 1 is_stmt 0 view .LVU3928 + 11876 @ sp needed + 11877 0000 7047 bx lr + 11878 .cfi_endproc + 11879 .LFE85: + 11881 .section .text.I2C_TreatErrorCallback,"ax",%progbits + 11882 .align 1 + 11883 .syntax unified + 11884 .code 16 + 11885 .thumb_func + 11887 I2C_TreatErrorCallback: + 11888 .LVL890: + 11889 .LFB104: +6721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) + 11890 .loc 1 6721 1 is_stmt 1 view -0 + 11891 .cfi_startproc + 11892 @ args = 0, pretend = 0, frame = 0 + 11893 @ frame_needed = 0, uses_anonymous_args = 0 +6721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) + 11894 .loc 1 6721 1 is_stmt 0 view .LVU3930 + 11895 0000 10B5 push {r4, lr} + 11896 .cfi_def_cfa_offset 8 + 11897 .cfi_offset 4, -8 + 11898 .cfi_offset 14, -4 +6722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11899 .loc 1 6722 3 is_stmt 1 view .LVU3931 +6722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11900 .loc 1 6722 11 is_stmt 0 view .LVU3932 + 11901 0002 4123 movs r3, #65 + 11902 0004 C35C ldrb r3, [r0, r3] +6722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11903 .loc 1 6722 6 view .LVU3933 + 11904 0006 602B cmp r3, #96 + 11905 0008 06D0 beq .L679 +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11906 .loc 1 6739 5 is_stmt 1 view .LVU3934 +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11907 .loc 1 6739 25 is_stmt 0 view .LVU3935 + 11908 000a 0023 movs r3, #0 + ARM GAS /tmp/cc4IUqI9.s page 407 + + + 11909 000c 0363 str r3, [r0, #48] +6742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11910 .loc 1 6742 5 is_stmt 1 view .LVU3936 +6742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11911 .loc 1 6742 5 view .LVU3937 + 11912 000e 4022 movs r2, #64 + 11913 0010 8354 strb r3, [r0, r2] +6742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11914 .loc 1 6742 5 view .LVU3938 +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11915 .loc 1 6748 5 view .LVU3939 + 11916 0012 FFF7FEFF bl HAL_I2C_ErrorCallback + 11917 .LVL891: + 11918 .L676: +6751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11919 .loc 1 6751 1 is_stmt 0 view .LVU3940 + 11920 @ sp needed + 11921 0016 10BD pop {r4, pc} + 11922 .LVL892: + 11923 .L679: +6724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11924 .loc 1 6724 5 is_stmt 1 view .LVU3941 +6724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11925 .loc 1 6724 17 is_stmt 0 view .LVU3942 + 11926 0018 1F3B subs r3, r3, #31 + 11927 001a 2022 movs r2, #32 + 11928 001c C254 strb r2, [r0, r3] +6725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11929 .loc 1 6725 5 is_stmt 1 view .LVU3943 +6725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11930 .loc 1 6725 25 is_stmt 0 view .LVU3944 + 11931 001e 0023 movs r3, #0 + 11932 0020 0363 str r3, [r0, #48] +6728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11933 .loc 1 6728 5 is_stmt 1 view .LVU3945 +6728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11934 .loc 1 6728 5 view .LVU3946 + 11935 0022 2032 adds r2, r2, #32 + 11936 0024 8354 strb r3, [r0, r2] +6728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11937 .loc 1 6728 5 view .LVU3947 +6734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11938 .loc 1 6734 5 view .LVU3948 + 11939 0026 FFF7FEFF bl HAL_I2C_AbortCpltCallback + 11940 .LVL893: +6734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11941 .loc 1 6734 5 is_stmt 0 view .LVU3949 + 11942 002a F4E7 b .L676 + 11943 .cfi_endproc + 11944 .LFE104: + 11946 .section .text.I2C_ITError,"ax",%progbits + 11947 .align 1 + 11948 .syntax unified + 11949 .code 16 + 11950 .thumb_func + 11952 I2C_ITError: + 11953 .LVL894: + ARM GAS /tmp/cc4IUqI9.s page 408 + + + 11954 .LFB103: +6590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 11955 .loc 1 6590 1 is_stmt 1 view -0 + 11956 .cfi_startproc + 11957 @ args = 0, pretend = 0, frame = 0 + 11958 @ frame_needed = 0, uses_anonymous_args = 0 +6590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 11959 .loc 1 6590 1 is_stmt 0 view .LVU3951 + 11960 0000 10B5 push {r4, lr} + 11961 .cfi_def_cfa_offset 8 + 11962 .cfi_offset 4, -8 + 11963 .cfi_offset 14, -4 + 11964 0002 0400 movs r4, r0 +6591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11965 .loc 1 6591 3 is_stmt 1 view .LVU3952 +6591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11966 .loc 1 6591 24 is_stmt 0 view .LVU3953 + 11967 0004 4123 movs r3, #65 + 11968 0006 C35C ldrb r3, [r0, r3] + 11969 .LVL895: +6593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11970 .loc 1 6593 3 is_stmt 1 view .LVU3954 +6596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11971 .loc 1 6596 3 view .LVU3955 +6596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11972 .loc 1 6596 23 is_stmt 0 view .LVU3956 + 11973 0008 0022 movs r2, #0 + 11974 000a 4220 movs r0, #66 + 11975 .LVL896: +6596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11976 .loc 1 6596 23 view .LVU3957 + 11977 000c 2254 strb r2, [r4, r0] +6597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = 0U; + 11978 .loc 1 6597 3 is_stmt 1 view .LVU3958 +6597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = 0U; + 11979 .loc 1 6597 23 is_stmt 0 view .LVU3959 + 11980 000e 4348 ldr r0, .L697 + 11981 0010 E062 str r0, [r4, #44] +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11982 .loc 1 6598 3 is_stmt 1 view .LVU3960 +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11983 .loc 1 6598 23 is_stmt 0 view .LVU3961 + 11984 0012 6285 strh r2, [r4, #42] +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11985 .loc 1 6601 3 is_stmt 1 view .LVU3962 +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11986 .loc 1 6601 7 is_stmt 0 view .LVU3963 + 11987 0014 626C ldr r2, [r4, #68] +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11988 .loc 1 6601 19 view .LVU3964 + 11989 0016 0A43 orrs r2, r1 + 11990 0018 6264 str r2, [r4, #68] +6604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 11991 .loc 1 6604 3 is_stmt 1 view .LVU3965 +6605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 11992 .loc 1 6605 50 is_stmt 0 view .LVU3966 + 11993 001a 283B subs r3, r3, #40 + ARM GAS /tmp/cc4IUqI9.s page 409 + + + 11994 .LVL897: +6605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 11995 .loc 1 6605 50 view .LVU3967 + 11996 001c DBB2 uxtb r3, r3 + 11997 .LVL898: +6604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 11998 .loc 1 6604 6 view .LVU3968 + 11999 001e 022B cmp r3, #2 + 12000 0020 1BD8 bhi .L681 +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12001 .loc 1 6609 5 is_stmt 1 view .LVU3969 + 12002 0022 0321 movs r1, #3 + 12003 .LVL899: +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12004 .loc 1 6609 5 is_stmt 0 view .LVU3970 + 12005 0024 2000 movs r0, r4 + 12006 0026 FFF7FEFF bl I2C_Disable_IRQ + 12007 .LVL900: +6612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 12008 .loc 1 6612 5 is_stmt 1 view .LVU3971 +6612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 12009 .loc 1 6612 25 is_stmt 0 view .LVU3972 + 12010 002a 4123 movs r3, #65 + 12011 002c 2822 movs r2, #40 + 12012 002e E254 strb r2, [r4, r3] +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12013 .loc 1 6613 5 is_stmt 1 view .LVU3973 +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12014 .loc 1 6613 25 is_stmt 0 view .LVU3974 + 12015 0030 3B4B ldr r3, .L697+4 + 12016 0032 6363 str r3, [r4, #52] + 12017 .L682: +6648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12018 .loc 1 6648 3 is_stmt 1 view .LVU3975 +6648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12019 .loc 1 6648 20 is_stmt 0 view .LVU3976 + 12020 0034 236B ldr r3, [r4, #48] + 12021 .LVL901: +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 12022 .loc 1 6650 3 is_stmt 1 view .LVU3977 +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 12023 .loc 1 6650 12 is_stmt 0 view .LVU3978 + 12024 0036 A26B ldr r2, [r4, #56] +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 12025 .loc 1 6650 6 view .LVU3979 + 12026 0038 002A cmp r2, #0 + 12027 003a 03D0 beq .L685 +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 12028 .loc 1 6650 30 discriminator 1 view .LVU3980 + 12029 003c 112B cmp r3, #17 + 12030 003e 2DD0 beq .L686 +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 12031 .loc 1 6650 81 discriminator 2 view .LVU3981 + 12032 0040 212B cmp r3, #33 + 12033 0042 2BD0 beq .L686 + 12034 .L685: +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + ARM GAS /tmp/cc4IUqI9.s page 410 + + + 12035 .loc 1 6680 8 is_stmt 1 view .LVU3982 +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 12036 .loc 1 6680 17 is_stmt 0 view .LVU3983 + 12037 0044 E26B ldr r2, [r4, #60] +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 12038 .loc 1 6680 11 view .LVU3984 + 12039 0046 002A cmp r2, #0 + 12040 0048 03D0 beq .L690 +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 12041 .loc 1 6680 35 discriminator 1 view .LVU3985 + 12042 004a 122B cmp r3, #18 + 12043 004c 46D0 beq .L691 +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 12044 .loc 1 6680 86 discriminator 2 view .LVU3986 + 12045 004e 222B cmp r3, #34 + 12046 0050 44D0 beq .L691 + 12047 .L690: +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12048 .loc 1 6711 5 is_stmt 1 view .LVU3987 + 12049 0052 2000 movs r0, r4 + 12050 0054 FFF7FEFF bl I2C_TreatErrorCallback + 12051 .LVL902: + 12052 .L680: +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12053 .loc 1 6713 1 is_stmt 0 view .LVU3988 + 12054 @ sp needed + 12055 .LVL903: +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12056 .loc 1 6713 1 view .LVU3989 + 12057 0058 10BD pop {r4, pc} + 12058 .LVL904: + 12059 .L681: +6618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12060 .loc 1 6618 5 is_stmt 1 view .LVU3990 + 12061 005a 3249 ldr r1, .L697+8 + 12062 .LVL905: +6618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12063 .loc 1 6618 5 is_stmt 0 view .LVU3991 + 12064 005c 2000 movs r0, r4 + 12065 005e FFF7FEFF bl I2C_Disable_IRQ + 12066 .LVL906: +6621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12067 .loc 1 6621 5 is_stmt 1 view .LVU3992 + 12068 0062 2000 movs r0, r4 + 12069 0064 FFF7FEFF bl I2C_Flush_TXDR + 12070 .LVL907: +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12071 .loc 1 6625 5 view .LVU3993 +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12072 .loc 1 6625 13 is_stmt 0 view .LVU3994 + 12073 0068 4123 movs r3, #65 + 12074 006a E35C ldrb r3, [r4, r3] +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12075 .loc 1 6625 8 view .LVU3995 + 12076 006c 602B cmp r3, #96 + 12077 006e 12D0 beq .L683 +6628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 411 + + + 12078 .loc 1 6628 7 is_stmt 1 view .LVU3996 +6628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12079 .loc 1 6628 27 is_stmt 0 view .LVU3997 + 12080 0070 2023 movs r3, #32 + 12081 0072 4122 movs r2, #65 + 12082 0074 A354 strb r3, [r4, r2] +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12083 .loc 1 6631 7 is_stmt 1 view .LVU3998 +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12084 .loc 1 6631 11 is_stmt 0 view .LVU3999 + 12085 0076 2268 ldr r2, [r4] + 12086 0078 9169 ldr r1, [r2, #24] +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12087 .loc 1 6631 10 view .LVU4000 + 12088 007a 0B42 tst r3, r1 + 12089 007c 0BD0 beq .L683 +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12090 .loc 1 6633 9 is_stmt 1 view .LVU4001 +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12091 .loc 1 6633 13 is_stmt 0 view .LVU4002 + 12092 007e 9369 ldr r3, [r2, #24] +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12093 .loc 1 6633 12 view .LVU4003 + 12094 0080 DB06 lsls r3, r3, #27 + 12095 0082 05D5 bpl .L684 +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + 12096 .loc 1 6635 11 is_stmt 1 view .LVU4004 + 12097 0084 1023 movs r3, #16 + 12098 0086 D361 str r3, [r2, #28] +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12099 .loc 1 6636 11 view .LVU4005 +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12100 .loc 1 6636 15 is_stmt 0 view .LVU4006 + 12101 0088 636C ldr r3, [r4, #68] +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12102 .loc 1 6636 27 view .LVU4007 + 12103 008a 0422 movs r2, #4 + 12104 008c 1343 orrs r3, r2 + 12105 008e 6364 str r3, [r4, #68] + 12106 .L684: +6640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12107 .loc 1 6640 9 is_stmt 1 view .LVU4008 + 12108 0090 2368 ldr r3, [r4] + 12109 0092 2022 movs r2, #32 + 12110 0094 DA61 str r2, [r3, #28] + 12111 .L683: +6644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12112 .loc 1 6644 5 view .LVU4009 +6644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12113 .loc 1 6644 25 is_stmt 0 view .LVU4010 + 12114 0096 0023 movs r3, #0 + 12115 0098 6363 str r3, [r4, #52] + 12116 009a CBE7 b .L682 + 12117 .LVL908: + 12118 .L686: +6653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12119 .loc 1 6653 5 is_stmt 1 view .LVU4011 + ARM GAS /tmp/cc4IUqI9.s page 412 + + +6653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12120 .loc 1 6653 14 is_stmt 0 view .LVU4012 + 12121 009c 2268 ldr r2, [r4] +6653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12122 .loc 1 6653 24 view .LVU4013 + 12123 009e 1368 ldr r3, [r2] + 12124 .LVL909: +6653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12125 .loc 1 6653 8 view .LVU4014 + 12126 00a0 5B04 lsls r3, r3, #17 + 12127 00a2 03D5 bpl .L687 +6655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12128 .loc 1 6655 7 is_stmt 1 view .LVU4015 +6655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12129 .loc 1 6655 21 is_stmt 0 view .LVU4016 + 12130 00a4 1368 ldr r3, [r2] +6655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12131 .loc 1 6655 27 view .LVU4017 + 12132 00a6 2049 ldr r1, .L697+12 + 12133 00a8 0B40 ands r3, r1 + 12134 00aa 1360 str r3, [r2] + 12135 .L687: +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12136 .loc 1 6658 5 is_stmt 1 view .LVU4018 +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12137 .loc 1 6658 9 is_stmt 0 view .LVU4019 + 12138 00ac A06B ldr r0, [r4, #56] + 12139 00ae FFF7FEFF bl HAL_DMA_GetState + 12140 .LVL910: +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12141 .loc 1 6658 8 discriminator 1 view .LVU4020 + 12142 00b2 0128 cmp r0, #1 + 12143 00b4 0ED0 beq .L688 +6662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12144 .loc 1 6662 7 is_stmt 1 view .LVU4021 +6662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12145 .loc 1 6662 11 is_stmt 0 view .LVU4022 + 12146 00b6 A36B ldr r3, [r4, #56] +6662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12147 .loc 1 6662 39 view .LVU4023 + 12148 00b8 1C4A ldr r2, .L697+16 + 12149 00ba 5A63 str r2, [r3, #52] +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12150 .loc 1 6665 7 is_stmt 1 view .LVU4024 +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12151 .loc 1 6665 7 view .LVU4025 + 12152 00bc 4023 movs r3, #64 + 12153 00be 0022 movs r2, #0 + 12154 00c0 E254 strb r2, [r4, r3] +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12155 .loc 1 6665 7 view .LVU4026 +6668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12156 .loc 1 6668 7 view .LVU4027 +6668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12157 .loc 1 6668 11 is_stmt 0 view .LVU4028 + 12158 00c2 A06B ldr r0, [r4, #56] + 12159 00c4 FFF7FEFF bl HAL_DMA_Abort_IT + ARM GAS /tmp/cc4IUqI9.s page 413 + + + 12160 .LVL911: +6668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12161 .loc 1 6668 10 discriminator 1 view .LVU4029 + 12162 00c8 0028 cmp r0, #0 + 12163 00ca C5D0 beq .L680 +6671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12164 .loc 1 6671 9 is_stmt 1 view .LVU4030 +6671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12165 .loc 1 6671 13 is_stmt 0 view .LVU4031 + 12166 00cc A06B ldr r0, [r4, #56] +6671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12167 .loc 1 6671 21 view .LVU4032 + 12168 00ce 436B ldr r3, [r0, #52] +6671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12169 .loc 1 6671 9 view .LVU4033 + 12170 00d0 9847 blx r3 + 12171 .LVL912: + 12172 00d2 C1E7 b .L680 + 12173 .L688: +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12174 .loc 1 6676 7 is_stmt 1 view .LVU4034 + 12175 00d4 2000 movs r0, r4 + 12176 00d6 FFF7FEFF bl I2C_TreatErrorCallback + 12177 .LVL913: + 12178 00da BDE7 b .L680 + 12179 .LVL914: + 12180 .L691: +6683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12181 .loc 1 6683 5 view .LVU4035 +6683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12182 .loc 1 6683 14 is_stmt 0 view .LVU4036 + 12183 00dc 2368 ldr r3, [r4] + 12184 .LVL915: +6683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12185 .loc 1 6683 24 view .LVU4037 + 12186 00de 1A68 ldr r2, [r3] +6683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12187 .loc 1 6683 8 view .LVU4038 + 12188 00e0 1204 lsls r2, r2, #16 + 12189 00e2 03D5 bpl .L692 +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12190 .loc 1 6685 7 is_stmt 1 view .LVU4039 +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12191 .loc 1 6685 21 is_stmt 0 view .LVU4040 + 12192 00e4 1A68 ldr r2, [r3] +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12193 .loc 1 6685 27 view .LVU4041 + 12194 00e6 1249 ldr r1, .L697+20 + 12195 00e8 0A40 ands r2, r1 + 12196 00ea 1A60 str r2, [r3] + 12197 .L692: +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12198 .loc 1 6688 5 is_stmt 1 view .LVU4042 +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12199 .loc 1 6688 9 is_stmt 0 view .LVU4043 + 12200 00ec E06B ldr r0, [r4, #60] + 12201 00ee FFF7FEFF bl HAL_DMA_GetState + ARM GAS /tmp/cc4IUqI9.s page 414 + + + 12202 .LVL916: +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12203 .loc 1 6688 8 discriminator 1 view .LVU4044 + 12204 00f2 0128 cmp r0, #1 + 12205 00f4 0ED0 beq .L693 +6692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12206 .loc 1 6692 7 is_stmt 1 view .LVU4045 +6692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12207 .loc 1 6692 11 is_stmt 0 view .LVU4046 + 12208 00f6 E36B ldr r3, [r4, #60] +6692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12209 .loc 1 6692 39 view .LVU4047 + 12210 00f8 0C4A ldr r2, .L697+16 + 12211 00fa 5A63 str r2, [r3, #52] +6695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12212 .loc 1 6695 7 is_stmt 1 view .LVU4048 +6695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12213 .loc 1 6695 7 view .LVU4049 + 12214 00fc 4023 movs r3, #64 + 12215 00fe 0022 movs r2, #0 + 12216 0100 E254 strb r2, [r4, r3] +6695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12217 .loc 1 6695 7 view .LVU4050 +6698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12218 .loc 1 6698 7 view .LVU4051 +6698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12219 .loc 1 6698 11 is_stmt 0 view .LVU4052 + 12220 0102 E06B ldr r0, [r4, #60] + 12221 0104 FFF7FEFF bl HAL_DMA_Abort_IT + 12222 .LVL917: +6698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12223 .loc 1 6698 10 discriminator 1 view .LVU4053 + 12224 0108 0028 cmp r0, #0 + 12225 010a A5D0 beq .L680 +6701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12226 .loc 1 6701 9 is_stmt 1 view .LVU4054 +6701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12227 .loc 1 6701 13 is_stmt 0 view .LVU4055 + 12228 010c E06B ldr r0, [r4, #60] +6701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12229 .loc 1 6701 21 view .LVU4056 + 12230 010e 436B ldr r3, [r0, #52] +6701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12231 .loc 1 6701 9 view .LVU4057 + 12232 0110 9847 blx r3 + 12233 .LVL918: + 12234 0112 A1E7 b .L680 + 12235 .L693: +6706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12236 .loc 1 6706 7 is_stmt 1 view .LVU4058 + 12237 0114 2000 movs r0, r4 + 12238 0116 FFF7FEFF bl I2C_TreatErrorCallback + 12239 .LVL919: + 12240 011a 9DE7 b .L680 + 12241 .L698: + 12242 .align 2 + 12243 .L697: + ARM GAS /tmp/cc4IUqI9.s page 415 + + + 12244 011c 0000FFFF .word -65536 + 12245 0120 00000000 .word I2C_Slave_ISR_IT + 12246 0124 03800000 .word 32771 + 12247 0128 FFBFFFFF .word -16385 + 12248 012c 00000000 .word I2C_DMAAbort + 12249 0130 FF7FFFFF .word -32769 + 12250 .cfi_endproc + 12251 .LFE103: + 12253 .section .text.I2C_ITSlaveCplt,"ax",%progbits + 12254 .align 1 + 12255 .syntax unified + 12256 .code 16 + 12257 .thumb_func + 12259 I2C_ITSlaveCplt: + 12260 .LVL920: + 12261 .LFB101: +6323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 12262 .loc 1 6323 1 view -0 + 12263 .cfi_startproc + 12264 @ args = 0, pretend = 0, frame = 0 + 12265 @ frame_needed = 0, uses_anonymous_args = 0 +6323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 12266 .loc 1 6323 1 is_stmt 0 view .LVU4060 + 12267 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 12268 .cfi_def_cfa_offset 24 + 12269 .cfi_offset 3, -24 + 12270 .cfi_offset 4, -20 + 12271 .cfi_offset 5, -16 + 12272 .cfi_offset 6, -12 + 12273 .cfi_offset 7, -8 + 12274 .cfi_offset 14, -4 + 12275 0002 0400 movs r4, r0 + 12276 0004 0D00 movs r5, r1 +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12277 .loc 1 6324 3 is_stmt 1 view .LVU4061 +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12278 .loc 1 6324 26 is_stmt 0 view .LVU4062 + 12279 0006 0268 ldr r2, [r0] +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12280 .loc 1 6324 12 view .LVU4063 + 12281 0008 1668 ldr r6, [r2] + 12282 .LVL921: +6325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12283 .loc 1 6325 3 is_stmt 1 view .LVU4064 +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 12284 .loc 1 6326 3 view .LVU4065 +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 12285 .loc 1 6326 12 is_stmt 0 view .LVU4066 + 12286 000a C76A ldr r7, [r0, #44] + 12287 .LVL922: +6327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12288 .loc 1 6327 3 is_stmt 1 view .LVU4067 +6327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12289 .loc 1 6327 24 is_stmt 0 view .LVU4068 + 12290 000c 4123 movs r3, #65 + 12291 000e C35C ldrb r3, [r0, r3] + 12292 .LVL923: + ARM GAS /tmp/cc4IUqI9.s page 416 + + +6330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12293 .loc 1 6330 3 is_stmt 1 view .LVU4069 + 12294 0010 2021 movs r1, #32 + 12295 .LVL924: +6330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12296 .loc 1 6330 3 is_stmt 0 view .LVU4070 + 12297 0012 D161 str r1, [r2, #28] +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12298 .loc 1 6333 3 is_stmt 1 view .LVU4071 + 12299 0014 213B subs r3, r3, #33 + 12300 .LVL925: +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12301 .loc 1 6333 3 is_stmt 0 view .LVU4072 + 12302 0016 DAB2 uxtb r2, r3 + 12303 0018 092A cmp r2, #9 + 12304 001a 08D8 bhi .L700 + 12305 001c 9300 lsls r3, r2, #2 + 12306 .LVL926: +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12307 .loc 1 6333 3 view .LVU4073 + 12308 001e 6C4A ldr r2, .L727 + 12309 0020 D358 ldr r3, [r2, r3] + 12310 0022 9F46 mov pc, r3 + 12311 .section .rodata.I2C_ITSlaveCplt,"a",%progbits + 12312 .align 2 + 12313 .L702: + 12314 0000 24000000 .word .L703 + 12315 0004 F8000000 .word .L701 + 12316 0008 2E000000 .word .L700 + 12317 000c 2E000000 .word .L700 + 12318 0010 2E000000 .word .L700 + 12319 0014 2E000000 .word .L700 + 12320 0018 2E000000 .word .L700 + 12321 001c 04010000 .word .L704 + 12322 0020 24000000 .word .L703 + 12323 0024 F8000000 .word .L701 + 12324 .section .text.I2C_ITSlaveCplt + 12325 .L703: +6335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 12326 .loc 1 6335 5 is_stmt 1 view .LVU4074 + 12327 0024 6B49 ldr r1, .L727+4 + 12328 0026 FFF7FEFF bl I2C_Disable_IRQ + 12329 .LVL927: +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12330 .loc 1 6336 5 view .LVU4075 +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12331 .loc 1 6336 25 is_stmt 0 view .LVU4076 + 12332 002a 2123 movs r3, #33 + 12333 002c 2363 str r3, [r4, #48] + 12334 .L700: +6351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12335 .loc 1 6351 3 is_stmt 1 view .LVU4077 +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12336 .loc 1 6354 3 view .LVU4078 +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12337 .loc 1 6354 7 is_stmt 0 view .LVU4079 + 12338 002e 2268 ldr r2, [r4] + ARM GAS /tmp/cc4IUqI9.s page 417 + + +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12339 .loc 1 6354 17 view .LVU4080 + 12340 0030 5168 ldr r1, [r2, #4] +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12341 .loc 1 6354 23 view .LVU4081 + 12342 0032 8023 movs r3, #128 + 12343 0034 1B02 lsls r3, r3, #8 + 12344 0036 0B43 orrs r3, r1 + 12345 0038 5360 str r3, [r2, #4] +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12346 .loc 1 6357 3 is_stmt 1 view .LVU4082 + 12347 003a 2268 ldr r2, [r4] + 12348 003c 5368 ldr r3, [r2, #4] + 12349 003e 6649 ldr r1, .L727+8 + 12350 0040 0B40 ands r3, r1 + 12351 0042 5360 str r3, [r2, #4] +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12352 .loc 1 6360 3 view .LVU4083 + 12353 0044 2000 movs r0, r4 + 12354 0046 FFF7FEFF bl I2C_Flush_TXDR + 12355 .LVL928: +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12356 .loc 1 6363 3 view .LVU4084 +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12357 .loc 1 6363 6 is_stmt 0 view .LVU4085 + 12358 004a 7304 lsls r3, r6, #17 + 12359 004c 60D5 bpl .L705 +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12360 .loc 1 6366 5 is_stmt 1 view .LVU4086 +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12361 .loc 1 6366 9 is_stmt 0 view .LVU4087 + 12362 004e 2268 ldr r2, [r4] +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12363 .loc 1 6366 19 view .LVU4088 + 12364 0050 1368 ldr r3, [r2] +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12365 .loc 1 6366 25 view .LVU4089 + 12366 0052 6249 ldr r1, .L727+12 + 12367 0054 0B40 ands r3, r1 + 12368 0056 1360 str r3, [r2] +6368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12369 .loc 1 6368 5 is_stmt 1 view .LVU4090 +6368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12370 .loc 1 6368 13 is_stmt 0 view .LVU4091 + 12371 0058 A36B ldr r3, [r4, #56] +6368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12372 .loc 1 6368 8 view .LVU4092 + 12373 005a 002B cmp r3, #0 + 12374 005c 03D0 beq .L706 +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12375 .loc 1 6370 7 is_stmt 1 view .LVU4093 +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12376 .loc 1 6370 35 is_stmt 0 view .LVU4094 + 12377 005e 1B68 ldr r3, [r3] + 12378 0060 5B68 ldr r3, [r3, #4] +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12379 .loc 1 6370 25 view .LVU4095 + ARM GAS /tmp/cc4IUqI9.s page 418 + + + 12380 0062 9BB2 uxth r3, r3 +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12381 .loc 1 6370 23 view .LVU4096 + 12382 0064 6385 strh r3, [r4, #42] + 12383 .L706: +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12384 .loc 1 6386 3 is_stmt 1 view .LVU4097 +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12385 .loc 1 6389 3 view .LVU4098 +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12386 .loc 1 6389 6 is_stmt 0 view .LVU4099 + 12387 0066 6B07 lsls r3, r5, #29 + 12388 0068 11D5 bpl .L707 +6392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12389 .loc 1 6392 5 is_stmt 1 view .LVU4100 +6392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12390 .loc 1 6392 16 is_stmt 0 view .LVU4101 + 12391 006a 0423 movs r3, #4 + 12392 006c 9D43 bics r5, r3 + 12393 .LVL929: +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12394 .loc 1 6395 5 is_stmt 1 view .LVU4102 +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12395 .loc 1 6395 36 is_stmt 0 view .LVU4103 + 12396 006e 2368 ldr r3, [r4] +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12397 .loc 1 6395 46 view .LVU4104 + 12398 0070 5A6A ldr r2, [r3, #36] +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12399 .loc 1 6395 10 view .LVU4105 + 12400 0072 636A ldr r3, [r4, #36] +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12401 .loc 1 6395 21 view .LVU4106 + 12402 0074 1A70 strb r2, [r3] +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12403 .loc 1 6398 5 is_stmt 1 view .LVU4107 +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12404 .loc 1 6398 9 is_stmt 0 view .LVU4108 + 12405 0076 636A ldr r3, [r4, #36] +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12406 .loc 1 6398 19 view .LVU4109 + 12407 0078 0133 adds r3, r3, #1 + 12408 007a 6362 str r3, [r4, #36] +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12409 .loc 1 6400 5 is_stmt 1 view .LVU4110 +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12410 .loc 1 6400 14 is_stmt 0 view .LVU4111 + 12411 007c 238D ldrh r3, [r4, #40] +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12412 .loc 1 6400 8 view .LVU4112 + 12413 007e 002B cmp r3, #0 + 12414 0080 05D0 beq .L707 +6402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12415 .loc 1 6402 7 is_stmt 1 view .LVU4113 +6402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12416 .loc 1 6402 21 is_stmt 0 view .LVU4114 + 12417 0082 013B subs r3, r3, #1 + ARM GAS /tmp/cc4IUqI9.s page 419 + + + 12418 0084 2385 strh r3, [r4, #40] +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12419 .loc 1 6403 7 is_stmt 1 view .LVU4115 +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12420 .loc 1 6403 11 is_stmt 0 view .LVU4116 + 12421 0086 638D ldrh r3, [r4, #42] +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12422 .loc 1 6403 22 view .LVU4117 + 12423 0088 013B subs r3, r3, #1 + 12424 008a 9BB2 uxth r3, r3 + 12425 008c 6385 strh r3, [r4, #42] + 12426 .L707: +6408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12427 .loc 1 6408 3 is_stmt 1 view .LVU4118 +6408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12428 .loc 1 6408 11 is_stmt 0 view .LVU4119 + 12429 008e 638D ldrh r3, [r4, #42] + 12430 0090 9BB2 uxth r3, r3 +6408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12431 .loc 1 6408 6 view .LVU4120 + 12432 0092 002B cmp r3, #0 + 12433 0094 03D0 beq .L708 +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12434 .loc 1 6411 5 is_stmt 1 view .LVU4121 +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12435 .loc 1 6411 9 is_stmt 0 view .LVU4122 + 12436 0096 636C ldr r3, [r4, #68] +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12437 .loc 1 6411 21 view .LVU4123 + 12438 0098 0422 movs r2, #4 + 12439 009a 1343 orrs r3, r2 + 12440 009c 6364 str r3, [r4, #68] + 12441 .L708: +6414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + 12442 .loc 1 6414 3 is_stmt 1 view .LVU4124 +6414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + 12443 .loc 1 6414 6 is_stmt 0 view .LVU4125 + 12444 009e EB06 lsls r3, r5, #27 + 12445 00a0 10D5 bpl .L709 +6414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + 12446 .loc 1 6414 58 discriminator 1 view .LVU4126 + 12447 00a2 F606 lsls r6, r6, #27 + 12448 00a4 0ED5 bpl .L709 + 12449 .LVL930: +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12450 .loc 1 6421 5 is_stmt 1 view .LVU4127 +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12451 .loc 1 6421 13 is_stmt 0 view .LVU4128 + 12452 00a6 638D ldrh r3, [r4, #42] + 12453 00a8 9BB2 uxth r3, r3 +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12454 .loc 1 6421 8 view .LVU4129 + 12455 00aa 002B cmp r3, #0 + 12456 00ac 55D1 bne .L710 +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12457 .loc 1 6423 7 is_stmt 1 view .LVU4130 +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + ARM GAS /tmp/cc4IUqI9.s page 420 + + + 12458 .loc 1 6423 16 is_stmt 0 view .LVU4131 + 12459 00ae 4133 adds r3, r3, #65 + 12460 00b0 E35C ldrb r3, [r4, r3] +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12461 .loc 1 6423 10 view .LVU4132 + 12462 00b2 282B cmp r3, #40 + 12463 00b4 3BD0 beq .L722 + 12464 .L711: +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12465 .loc 1 6430 12 is_stmt 1 view .LVU4133 +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12466 .loc 1 6430 21 is_stmt 0 view .LVU4134 + 12467 00b6 4123 movs r3, #65 + 12468 00b8 E35C ldrb r3, [r4, r3] +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12469 .loc 1 6430 15 view .LVU4135 + 12470 00ba 292B cmp r3, #41 + 12471 00bc 40D0 beq .L723 + 12472 .L712: +6445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12473 .loc 1 6445 9 is_stmt 1 view .LVU4136 + 12474 00be 2368 ldr r3, [r4] + 12475 00c0 1022 movs r2, #16 + 12476 00c2 DA61 str r2, [r3, #28] + 12477 .L709: +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 12478 .loc 1 6465 3 view .LVU4137 +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 12479 .loc 1 6465 14 is_stmt 0 view .LVU4138 + 12480 00c4 0023 movs r3, #0 + 12481 00c6 4222 movs r2, #66 + 12482 00c8 A354 strb r3, [r4, r2] +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12483 .loc 1 6466 3 is_stmt 1 view .LVU4139 +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12484 .loc 1 6466 17 is_stmt 0 view .LVU4140 + 12485 00ca 6363 str r3, [r4, #52] +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12486 .loc 1 6468 3 is_stmt 1 view .LVU4141 +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12487 .loc 1 6468 11 is_stmt 0 view .LVU4142 + 12488 00cc 636C ldr r3, [r4, #68] +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12489 .loc 1 6468 6 view .LVU4143 + 12490 00ce 002B cmp r3, #0 + 12491 00d0 55D1 bne .L724 +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12492 .loc 1 6480 8 is_stmt 1 view .LVU4144 +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12493 .loc 1 6480 16 is_stmt 0 view .LVU4145 + 12494 00d2 E26A ldr r2, [r4, #44] +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12495 .loc 1 6480 11 view .LVU4146 + 12496 00d4 424B ldr r3, .L727+16 + 12497 00d6 9A42 cmp r2, r3 + 12498 00d8 5ED1 bne .L725 +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 421 + + + 12499 .loc 1 6500 8 is_stmt 1 view .LVU4147 +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12500 .loc 1 6500 16 is_stmt 0 view .LVU4148 + 12501 00da 4123 movs r3, #65 + 12502 00dc E35C ldrb r3, [r4, r3] +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12503 .loc 1 6500 11 view .LVU4149 + 12504 00de 222B cmp r3, #34 + 12505 00e0 6AD0 beq .L726 +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12506 .loc 1 6517 5 is_stmt 1 view .LVU4150 +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12507 .loc 1 6517 17 is_stmt 0 view .LVU4151 + 12508 00e2 4123 movs r3, #65 + 12509 00e4 2022 movs r2, #32 + 12510 00e6 E254 strb r2, [r4, r3] +6518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12511 .loc 1 6518 5 is_stmt 1 view .LVU4152 +6518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12512 .loc 1 6518 25 is_stmt 0 view .LVU4153 + 12513 00e8 0023 movs r3, #0 + 12514 00ea 2363 str r3, [r4, #48] +6521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12515 .loc 1 6521 5 is_stmt 1 view .LVU4154 +6521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12516 .loc 1 6521 5 view .LVU4155 + 12517 00ec 2032 adds r2, r2, #32 + 12518 00ee A354 strb r3, [r4, r2] +6521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12519 .loc 1 6521 5 view .LVU4156 +6527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12520 .loc 1 6527 5 view .LVU4157 + 12521 00f0 2000 movs r0, r4 + 12522 00f2 FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 12523 .LVL931: +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12524 .loc 1 6530 1 is_stmt 0 view .LVU4158 + 12525 00f6 5EE0 b .L699 + 12526 .LVL932: + 12527 .L701: +6340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 12528 .loc 1 6340 5 is_stmt 1 view .LVU4159 + 12529 00f8 3A49 ldr r1, .L727+20 + 12530 00fa FFF7FEFF bl I2C_Disable_IRQ + 12531 .LVL933: +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12532 .loc 1 6341 5 view .LVU4160 +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12533 .loc 1 6341 25 is_stmt 0 view .LVU4161 + 12534 00fe 2223 movs r3, #34 + 12535 0100 2363 str r3, [r4, #48] + 12536 0102 94E7 b .L700 + 12537 .LVL934: + 12538 .L704: +6345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12539 .loc 1 6345 5 is_stmt 1 view .LVU4162 + 12540 0104 3849 ldr r1, .L727+24 + ARM GAS /tmp/cc4IUqI9.s page 422 + + + 12541 0106 FFF7FEFF bl I2C_Disable_IRQ + 12542 .LVL935: +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12543 .loc 1 6346 5 view .LVU4163 +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12544 .loc 1 6346 25 is_stmt 0 view .LVU4164 + 12545 010a 0023 movs r3, #0 + 12546 010c 2363 str r3, [r4, #48] + 12547 010e 8EE7 b .L700 + 12548 .L705: +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12549 .loc 1 6373 8 is_stmt 1 view .LVU4165 +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12550 .loc 1 6373 11 is_stmt 0 view .LVU4166 + 12551 0110 3304 lsls r3, r6, #16 + 12552 0112 A8D5 bpl .L706 +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12553 .loc 1 6376 5 is_stmt 1 view .LVU4167 +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12554 .loc 1 6376 9 is_stmt 0 view .LVU4168 + 12555 0114 2268 ldr r2, [r4] +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12556 .loc 1 6376 19 view .LVU4169 + 12557 0116 1368 ldr r3, [r2] +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12558 .loc 1 6376 25 view .LVU4170 + 12559 0118 3449 ldr r1, .L727+28 + 12560 011a 0B40 ands r3, r1 + 12561 011c 1360 str r3, [r2] +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12562 .loc 1 6378 5 is_stmt 1 view .LVU4171 +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12563 .loc 1 6378 13 is_stmt 0 view .LVU4172 + 12564 011e E36B ldr r3, [r4, #60] +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12565 .loc 1 6378 8 view .LVU4173 + 12566 0120 002B cmp r3, #0 + 12567 0122 A0D0 beq .L706 +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12568 .loc 1 6380 7 is_stmt 1 view .LVU4174 +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12569 .loc 1 6380 35 is_stmt 0 view .LVU4175 + 12570 0124 1B68 ldr r3, [r3] + 12571 0126 5B68 ldr r3, [r3, #4] +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12572 .loc 1 6380 25 view .LVU4176 + 12573 0128 9BB2 uxth r3, r3 +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12574 .loc 1 6380 23 view .LVU4177 + 12575 012a 6385 strh r3, [r4, #42] + 12576 012c 9BE7 b .L706 + 12577 .LVL936: + 12578 .L722: +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12579 .loc 1 6423 49 discriminator 1 view .LVU4178 + 12580 012e 8023 movs r3, #128 + 12581 0130 9B04 lsls r3, r3, #18 + ARM GAS /tmp/cc4IUqI9.s page 423 + + + 12582 0132 9F42 cmp r7, r3 + 12583 0134 BFD1 bne .L711 +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12584 .loc 1 6428 9 is_stmt 1 view .LVU4179 + 12585 0136 2900 movs r1, r5 + 12586 0138 2000 movs r0, r4 + 12587 013a FFF7FEFF bl I2C_ITListenCplt + 12588 .LVL937: + 12589 013e C1E7 b .L709 + 12590 .L723: +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12591 .loc 1 6430 62 is_stmt 0 discriminator 1 view .LVU4180 + 12592 0140 274B ldr r3, .L727+16 + 12593 0142 9F42 cmp r7, r3 + 12594 0144 BBD0 beq .L712 +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12595 .loc 1 6433 9 is_stmt 1 view .LVU4181 + 12596 0146 2368 ldr r3, [r4] + 12597 0148 1022 movs r2, #16 + 12598 014a DA61 str r2, [r3, #28] +6436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12599 .loc 1 6436 9 view .LVU4182 + 12600 014c 2000 movs r0, r4 + 12601 014e FFF7FEFF bl I2C_Flush_TXDR + 12602 .LVL938: +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12603 .loc 1 6440 9 view .LVU4183 + 12604 0152 2000 movs r0, r4 + 12605 0154 FFF7FEFF bl I2C_ITSlaveSeqCplt + 12606 .LVL939: + 12607 0158 B4E7 b .L709 + 12608 .L710: +6452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12609 .loc 1 6452 7 view .LVU4184 + 12610 015a 2368 ldr r3, [r4] + 12611 015c 1022 movs r2, #16 + 12612 015e DA61 str r2, [r3, #28] +6455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12613 .loc 1 6455 7 view .LVU4185 +6455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12614 .loc 1 6455 11 is_stmt 0 view .LVU4186 + 12615 0160 636C ldr r3, [r4, #68] +6455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12616 .loc 1 6455 23 view .LVU4187 + 12617 0162 0C3A subs r2, r2, #12 + 12618 0164 1343 orrs r3, r2 + 12619 0166 6364 str r3, [r4, #68] +6457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12620 .loc 1 6457 7 is_stmt 1 view .LVU4188 +6457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12621 .loc 1 6457 10 is_stmt 0 view .LVU4189 + 12622 0168 002F cmp r7, #0 + 12623 016a 03D0 beq .L713 +6457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12624 .loc 1 6457 43 discriminator 1 view .LVU4190 + 12625 016c 8023 movs r3, #128 + 12626 016e 5B04 lsls r3, r3, #17 + ARM GAS /tmp/cc4IUqI9.s page 424 + + + 12627 0170 9F42 cmp r7, r3 + 12628 0172 A7D1 bne .L709 + 12629 .L713: +6460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12630 .loc 1 6460 9 is_stmt 1 view .LVU4191 +6460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12631 .loc 1 6460 31 is_stmt 0 view .LVU4192 + 12632 0174 616C ldr r1, [r4, #68] +6460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12633 .loc 1 6460 9 view .LVU4193 + 12634 0176 2000 movs r0, r4 + 12635 0178 FFF7FEFF bl I2C_ITError + 12636 .LVL940: + 12637 017c A2E7 b .L709 + 12638 .L724: +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12639 .loc 1 6471 5 is_stmt 1 view .LVU4194 +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12640 .loc 1 6471 27 is_stmt 0 view .LVU4195 + 12641 017e 616C ldr r1, [r4, #68] +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12642 .loc 1 6471 5 view .LVU4196 + 12643 0180 2000 movs r0, r4 + 12644 0182 FFF7FEFF bl I2C_ITError + 12645 .LVL941: +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12646 .loc 1 6474 5 is_stmt 1 view .LVU4197 +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12647 .loc 1 6474 13 is_stmt 0 view .LVU4198 + 12648 0186 4123 movs r3, #65 + 12649 0188 E35C ldrb r3, [r4, r3] +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12650 .loc 1 6474 8 view .LVU4199 + 12651 018a 282B cmp r3, #40 + 12652 018c 13D1 bne .L699 +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12653 .loc 1 6477 7 is_stmt 1 view .LVU4200 + 12654 018e 2900 movs r1, r5 + 12655 0190 2000 movs r0, r4 + 12656 0192 FFF7FEFF bl I2C_ITListenCplt + 12657 .LVL942: + 12658 0196 0EE0 b .L699 + 12659 .L725: +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12660 .loc 1 6483 5 view .LVU4201 + 12661 0198 2000 movs r0, r4 + 12662 019a FFF7FEFF bl I2C_ITSlaveSeqCplt + 12663 .LVL943: +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 12664 .loc 1 6485 5 view .LVU4202 +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 12665 .loc 1 6485 23 is_stmt 0 view .LVU4203 + 12666 019e 104B ldr r3, .L727+16 + 12667 01a0 E362 str r3, [r4, #44] +6486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12668 .loc 1 6486 5 is_stmt 1 view .LVU4204 +6486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + ARM GAS /tmp/cc4IUqI9.s page 425 + + + 12669 .loc 1 6486 17 is_stmt 0 view .LVU4205 + 12670 01a2 4123 movs r3, #65 + 12671 01a4 2022 movs r2, #32 + 12672 01a6 E254 strb r2, [r4, r3] +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12673 .loc 1 6487 5 is_stmt 1 view .LVU4206 +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12674 .loc 1 6487 25 is_stmt 0 view .LVU4207 + 12675 01a8 0023 movs r3, #0 + 12676 01aa 2363 str r3, [r4, #48] +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12677 .loc 1 6490 5 is_stmt 1 view .LVU4208 +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12678 .loc 1 6490 5 view .LVU4209 + 12679 01ac 2032 adds r2, r2, #32 + 12680 01ae A354 strb r3, [r4, r2] +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12681 .loc 1 6490 5 view .LVU4210 +6496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12682 .loc 1 6496 5 view .LVU4211 + 12683 01b0 2000 movs r0, r4 + 12684 01b2 FFF7FEFF bl HAL_I2C_ListenCpltCallback + 12685 .LVL944: + 12686 .L699: +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12687 .loc 1 6530 1 is_stmt 0 view .LVU4212 + 12688 @ sp needed + 12689 .LVL945: + 12690 .LVL946: + 12691 .LVL947: +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12692 .loc 1 6530 1 view .LVU4213 + 12693 01b6 F8BD pop {r3, r4, r5, r6, r7, pc} + 12694 .LVL948: + 12695 .L726: +6502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12696 .loc 1 6502 5 is_stmt 1 view .LVU4214 +6502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12697 .loc 1 6502 17 is_stmt 0 view .LVU4215 + 12698 01b8 1F33 adds r3, r3, #31 + 12699 01ba 2022 movs r2, #32 + 12700 01bc E254 strb r2, [r4, r3] +6503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12701 .loc 1 6503 5 is_stmt 1 view .LVU4216 +6503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12702 .loc 1 6503 25 is_stmt 0 view .LVU4217 + 12703 01be 0023 movs r3, #0 + 12704 01c0 2363 str r3, [r4, #48] +6506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12705 .loc 1 6506 5 is_stmt 1 view .LVU4218 +6506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12706 .loc 1 6506 5 view .LVU4219 + 12707 01c2 2032 adds r2, r2, #32 + 12708 01c4 A354 strb r3, [r4, r2] +6506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12709 .loc 1 6506 5 view .LVU4220 +6512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + ARM GAS /tmp/cc4IUqI9.s page 426 + + + 12710 .loc 1 6512 5 view .LVU4221 + 12711 01c6 2000 movs r0, r4 + 12712 01c8 FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 12713 .LVL949: + 12714 01cc F3E7 b .L699 + 12715 .L728: + 12716 01ce C046 .align 2 + 12717 .L727: + 12718 01d0 00000000 .word .L702 + 12719 01d4 01800000 .word 32769 + 12720 01d8 00E800FE .word -33495040 + 12721 01dc FFBFFFFF .word -16385 + 12722 01e0 0000FFFF .word -65536 + 12723 01e4 02800000 .word 32770 + 12724 01e8 03800000 .word 32771 + 12725 01ec FF7FFFFF .word -32769 + 12726 .cfi_endproc + 12727 .LFE101: + 12729 .section .text.I2C_Slave_ISR_IT,"ax",%progbits + 12730 .align 1 + 12731 .syntax unified + 12732 .code 16 + 12733 .thumb_func + 12735 I2C_Slave_ISR_IT: + 12736 .LVL950: + 12737 .LFB91: +5259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12738 .loc 1 5259 1 view -0 + 12739 .cfi_startproc + 12740 @ args = 0, pretend = 0, frame = 0 + 12741 @ frame_needed = 0, uses_anonymous_args = 0 +5259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12742 .loc 1 5259 1 is_stmt 0 view .LVU4223 + 12743 0000 70B5 push {r4, r5, r6, lr} + 12744 .cfi_def_cfa_offset 16 + 12745 .cfi_offset 4, -16 + 12746 .cfi_offset 5, -12 + 12747 .cfi_offset 6, -8 + 12748 .cfi_offset 14, -4 + 12749 0002 0400 movs r4, r0 +5260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12750 .loc 1 5260 3 is_stmt 1 view .LVU4224 +5260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12751 .loc 1 5260 12 is_stmt 0 view .LVU4225 + 12752 0004 C56A ldr r5, [r0, #44] + 12753 .LVL951: +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12754 .loc 1 5261 3 is_stmt 1 view .LVU4226 +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12755 .loc 1 5264 3 view .LVU4227 +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12756 .loc 1 5264 3 view .LVU4228 + 12757 0006 4023 movs r3, #64 + 12758 0008 C35C ldrb r3, [r0, r3] + 12759 000a 012B cmp r3, #1 + 12760 000c 00D1 bne .LCB11863 + 12761 000e 95E0 b .L743 @long jump + ARM GAS /tmp/cc4IUqI9.s page 427 + + + 12762 .LCB11863: +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12763 .loc 1 5264 3 discriminator 2 view .LVU4229 + 12764 0010 0123 movs r3, #1 + 12765 0012 4020 movs r0, #64 + 12766 .LVL952: +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12767 .loc 1 5264 3 is_stmt 0 discriminator 2 view .LVU4230 + 12768 0014 2354 strb r3, [r4, r0] +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12769 .loc 1 5264 3 is_stmt 1 discriminator 2 view .LVU4231 +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12770 .loc 1 5267 3 view .LVU4232 +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12771 .loc 1 5267 8 is_stmt 0 view .LVU4233 + 12772 0016 4809 lsrs r0, r1, #5 +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12773 .loc 1 5267 6 view .LVU4234 + 12774 0018 0342 tst r3, r0 + 12775 001a 01D0 beq .L731 +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12776 .loc 1 5267 61 discriminator 1 view .LVU4235 + 12777 001c 9306 lsls r3, r2, #26 + 12778 001e 13D4 bmi .L753 + 12779 .L731: +5273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12780 .loc 1 5273 8 is_stmt 1 view .LVU4236 +5273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12781 .loc 1 5273 11 is_stmt 0 view .LVU4237 + 12782 0020 CB06 lsls r3, r1, #27 + 12783 0022 40D5 bpl .L733 +5273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12784 .loc 1 5273 63 discriminator 1 view .LVU4238 + 12785 0024 D306 lsls r3, r2, #27 + 12786 0026 3ED5 bpl .L733 +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12787 .loc 1 5280 5 is_stmt 1 view .LVU4239 +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12788 .loc 1 5280 13 is_stmt 0 view .LVU4240 + 12789 0028 638D ldrh r3, [r4, #42] + 12790 002a 9BB2 uxth r3, r3 +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12791 .loc 1 5280 8 view .LVU4241 + 12792 002c 002B cmp r3, #0 + 12793 002e 28D1 bne .L734 +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12794 .loc 1 5282 7 is_stmt 1 view .LVU4242 +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12795 .loc 1 5282 16 is_stmt 0 view .LVU4243 + 12796 0030 4133 adds r3, r3, #65 + 12797 0032 E35C ldrb r3, [r4, r3] +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12798 .loc 1 5282 10 view .LVU4244 + 12799 0034 282B cmp r3, #40 + 12800 0036 0FD0 beq .L754 + 12801 .L735: +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 428 + + + 12802 .loc 1 5289 12 is_stmt 1 view .LVU4245 +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12803 .loc 1 5289 21 is_stmt 0 view .LVU4246 + 12804 0038 4123 movs r3, #65 + 12805 003a E35C ldrb r3, [r4, r3] +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12806 .loc 1 5289 15 view .LVU4247 + 12807 003c 292B cmp r3, #41 + 12808 003e 13D0 beq .L755 + 12809 .L736: +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12810 .loc 1 5304 9 is_stmt 1 view .LVU4248 + 12811 0040 2368 ldr r3, [r4] + 12812 0042 1022 movs r2, #16 + 12813 .LVL953: +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12814 .loc 1 5304 9 is_stmt 0 view .LVU4249 + 12815 0044 DA61 str r2, [r3, #28] + 12816 0046 02E0 b .L732 + 12817 .LVL954: + 12818 .L753: +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12819 .loc 1 5271 5 is_stmt 1 view .LVU4250 + 12820 0048 2000 movs r0, r4 + 12821 004a FFF7FEFF bl I2C_ITSlaveCplt + 12822 .LVL955: + 12823 .L732: +5381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12824 .loc 1 5381 3 view .LVU4251 +5384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12825 .loc 1 5384 3 view .LVU4252 +5384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12826 .loc 1 5384 3 view .LVU4253 + 12827 004e 4023 movs r3, #64 + 12828 0050 0022 movs r2, #0 + 12829 0052 E254 strb r2, [r4, r3] +5384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12830 .loc 1 5384 3 view .LVU4254 +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12831 .loc 1 5386 3 view .LVU4255 +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12832 .loc 1 5386 10 is_stmt 0 view .LVU4256 + 12833 0054 0020 movs r0, #0 + 12834 .L730: +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12835 .loc 1 5387 1 view .LVU4257 + 12836 @ sp needed + 12837 .LVL956: + 12838 .LVL957: +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12839 .loc 1 5387 1 view .LVU4258 + 12840 0056 70BD pop {r4, r5, r6, pc} + 12841 .LVL958: + 12842 .L754: +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12843 .loc 1 5282 49 discriminator 1 view .LVU4259 + 12844 0058 8023 movs r3, #128 + ARM GAS /tmp/cc4IUqI9.s page 429 + + + 12845 005a 9B04 lsls r3, r3, #18 + 12846 005c 9D42 cmp r5, r3 + 12847 005e EBD1 bne .L735 +5287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12848 .loc 1 5287 9 is_stmt 1 view .LVU4260 + 12849 0060 2000 movs r0, r4 + 12850 0062 FFF7FEFF bl I2C_ITListenCplt + 12851 .LVL959: +5287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12852 .loc 1 5287 9 is_stmt 0 view .LVU4261 + 12853 0066 F2E7 b .L732 + 12854 .LVL960: + 12855 .L755: +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12856 .loc 1 5289 62 discriminator 1 view .LVU4262 + 12857 0068 354B ldr r3, .L757 + 12858 006a 9D42 cmp r5, r3 + 12859 006c E8D0 beq .L736 +5292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12860 .loc 1 5292 9 is_stmt 1 view .LVU4263 + 12861 006e 2368 ldr r3, [r4] + 12862 0070 1022 movs r2, #16 + 12863 .LVL961: +5292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12864 .loc 1 5292 9 is_stmt 0 view .LVU4264 + 12865 0072 DA61 str r2, [r3, #28] +5295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12866 .loc 1 5295 9 is_stmt 1 view .LVU4265 + 12867 0074 2000 movs r0, r4 + 12868 0076 FFF7FEFF bl I2C_Flush_TXDR + 12869 .LVL962: +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12870 .loc 1 5299 9 view .LVU4266 + 12871 007a 2000 movs r0, r4 + 12872 007c FFF7FEFF bl I2C_ITSlaveSeqCplt + 12873 .LVL963: + 12874 0080 E5E7 b .L732 + 12875 .LVL964: + 12876 .L734: +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12877 .loc 1 5311 7 view .LVU4267 + 12878 0082 2368 ldr r3, [r4] + 12879 0084 1022 movs r2, #16 + 12880 .LVL965: +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12881 .loc 1 5311 7 is_stmt 0 view .LVU4268 + 12882 0086 DA61 str r2, [r3, #28] +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12883 .loc 1 5314 7 is_stmt 1 view .LVU4269 +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12884 .loc 1 5314 11 is_stmt 0 view .LVU4270 + 12885 0088 636C ldr r3, [r4, #68] +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12886 .loc 1 5314 23 view .LVU4271 + 12887 008a 0C3A subs r2, r2, #12 + 12888 008c 1343 orrs r3, r2 + 12889 008e 6364 str r3, [r4, #68] + ARM GAS /tmp/cc4IUqI9.s page 430 + + +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12890 .loc 1 5316 7 is_stmt 1 view .LVU4272 +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12891 .loc 1 5316 10 is_stmt 0 view .LVU4273 + 12892 0090 002D cmp r5, #0 + 12893 0092 03D0 beq .L737 +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12894 .loc 1 5316 43 discriminator 1 view .LVU4274 + 12895 0094 8023 movs r3, #128 + 12896 0096 5B04 lsls r3, r3, #17 + 12897 0098 9D42 cmp r5, r3 + 12898 009a D8D1 bne .L732 + 12899 .L737: +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12900 .loc 1 5319 9 is_stmt 1 view .LVU4275 +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12901 .loc 1 5319 31 is_stmt 0 view .LVU4276 + 12902 009c 616C ldr r1, [r4, #68] + 12903 .LVL966: +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12904 .loc 1 5319 9 view .LVU4277 + 12905 009e 2000 movs r0, r4 + 12906 00a0 FFF7FEFF bl I2C_ITError + 12907 .LVL967: + 12908 00a4 D3E7 b .L732 + 12909 .LVL968: + 12910 .L733: +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12911 .loc 1 5323 8 is_stmt 1 view .LVU4278 +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12912 .loc 1 5323 11 is_stmt 0 view .LVU4279 + 12913 00a6 4B07 lsls r3, r1, #29 + 12914 00a8 1ED5 bpl .L738 +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12915 .loc 1 5323 65 discriminator 1 view .LVU4280 + 12916 00aa 5307 lsls r3, r2, #29 + 12917 00ac 1CD5 bpl .L738 +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12918 .loc 1 5326 5 is_stmt 1 view .LVU4281 +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12919 .loc 1 5326 13 is_stmt 0 view .LVU4282 + 12920 00ae 638D ldrh r3, [r4, #42] + 12921 00b0 9BB2 uxth r3, r3 +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12922 .loc 1 5326 8 view .LVU4283 + 12923 00b2 002B cmp r3, #0 + 12924 00b4 0DD0 beq .L739 +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12925 .loc 1 5329 7 is_stmt 1 view .LVU4284 +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12926 .loc 1 5329 38 is_stmt 0 view .LVU4285 + 12927 00b6 2368 ldr r3, [r4] +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12928 .loc 1 5329 48 view .LVU4286 + 12929 00b8 5A6A ldr r2, [r3, #36] + 12930 .LVL969: +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 431 + + + 12931 .loc 1 5329 12 view .LVU4287 + 12932 00ba 636A ldr r3, [r4, #36] +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12933 .loc 1 5329 23 view .LVU4288 + 12934 00bc 1A70 strb r2, [r3] +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12935 .loc 1 5332 7 is_stmt 1 view .LVU4289 +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12936 .loc 1 5332 11 is_stmt 0 view .LVU4290 + 12937 00be 636A ldr r3, [r4, #36] +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12938 .loc 1 5332 21 view .LVU4291 + 12939 00c0 0133 adds r3, r3, #1 + 12940 00c2 6362 str r3, [r4, #36] +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12941 .loc 1 5334 7 is_stmt 1 view .LVU4292 +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12942 .loc 1 5334 11 is_stmt 0 view .LVU4293 + 12943 00c4 238D ldrh r3, [r4, #40] +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12944 .loc 1 5334 21 view .LVU4294 + 12945 00c6 013B subs r3, r3, #1 + 12946 00c8 2385 strh r3, [r4, #40] +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12947 .loc 1 5335 7 is_stmt 1 view .LVU4295 +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12948 .loc 1 5335 11 is_stmt 0 view .LVU4296 + 12949 00ca 638D ldrh r3, [r4, #42] +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12950 .loc 1 5335 22 view .LVU4297 + 12951 00cc 013B subs r3, r3, #1 + 12952 00ce 9BB2 uxth r3, r3 + 12953 00d0 6385 strh r3, [r4, #42] + 12954 .L739: +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 12955 .loc 1 5338 5 is_stmt 1 view .LVU4298 +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 12956 .loc 1 5338 14 is_stmt 0 view .LVU4299 + 12957 00d2 638D ldrh r3, [r4, #42] + 12958 00d4 9BB2 uxth r3, r3 +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 12959 .loc 1 5338 8 view .LVU4300 + 12960 00d6 002B cmp r3, #0 + 12961 00d8 B9D1 bne .L732 +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 12962 .loc 1 5338 33 discriminator 1 view .LVU4301 + 12963 00da 194B ldr r3, .L757 + 12964 00dc 9D42 cmp r5, r3 + 12965 00de B6D0 beq .L732 +5342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12966 .loc 1 5342 7 is_stmt 1 view .LVU4302 + 12967 00e0 2000 movs r0, r4 + 12968 00e2 FFF7FEFF bl I2C_ITSlaveSeqCplt + 12969 .LVL970: +5342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12970 .loc 1 5342 7 is_stmt 0 view .LVU4303 + 12971 00e6 B2E7 b .L732 + ARM GAS /tmp/cc4IUqI9.s page 432 + + + 12972 .LVL971: + 12973 .L738: +5345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12974 .loc 1 5345 8 is_stmt 1 view .LVU4304 +5345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12975 .loc 1 5345 11 is_stmt 0 view .LVU4305 + 12976 00e8 0B07 lsls r3, r1, #28 + 12977 00ea 01D5 bpl .L740 +5345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12978 .loc 1 5345 65 discriminator 1 view .LVU4306 + 12979 00ec 1307 lsls r3, r2, #28 + 12980 00ee 16D4 bmi .L756 + 12981 .L740: +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12982 .loc 1 5350 8 is_stmt 1 view .LVU4307 +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12983 .loc 1 5350 11 is_stmt 0 view .LVU4308 + 12984 00f0 8907 lsls r1, r1, #30 + 12985 00f2 ACD5 bpl .L732 + 12986 .LVL972: +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12987 .loc 1 5350 65 discriminator 1 view .LVU4309 + 12988 00f4 9207 lsls r2, r2, #30 + 12989 00f6 AAD5 bpl .L732 + 12990 .LVL973: +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12991 .loc 1 5357 5 is_stmt 1 view .LVU4310 +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12992 .loc 1 5357 13 is_stmt 0 view .LVU4311 + 12993 00f8 638D ldrh r3, [r4, #42] + 12994 00fa 9BB2 uxth r3, r3 +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12995 .loc 1 5357 8 view .LVU4312 + 12996 00fc 002B cmp r3, #0 + 12997 00fe 12D0 beq .L741 +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12998 .loc 1 5360 7 is_stmt 1 view .LVU4313 +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12999 .loc 1 5360 35 is_stmt 0 view .LVU4314 + 13000 0100 626A ldr r2, [r4, #36] +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13001 .loc 1 5360 11 view .LVU4315 + 13002 0102 2368 ldr r3, [r4] +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13003 .loc 1 5360 30 view .LVU4316 + 13004 0104 1278 ldrb r2, [r2] +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13005 .loc 1 5360 28 view .LVU4317 + 13006 0106 9A62 str r2, [r3, #40] +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13007 .loc 1 5363 7 is_stmt 1 view .LVU4318 +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13008 .loc 1 5363 11 is_stmt 0 view .LVU4319 + 13009 0108 636A ldr r3, [r4, #36] +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13010 .loc 1 5363 21 view .LVU4320 + 13011 010a 0133 adds r3, r3, #1 + ARM GAS /tmp/cc4IUqI9.s page 433 + + + 13012 010c 6362 str r3, [r4, #36] +5365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 13013 .loc 1 5365 7 is_stmt 1 view .LVU4321 +5365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 13014 .loc 1 5365 11 is_stmt 0 view .LVU4322 + 13015 010e 638D ldrh r3, [r4, #42] +5365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 13016 .loc 1 5365 22 view .LVU4323 + 13017 0110 013B subs r3, r3, #1 + 13018 0112 9BB2 uxth r3, r3 + 13019 0114 6385 strh r3, [r4, #42] +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13020 .loc 1 5366 7 is_stmt 1 view .LVU4324 +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13021 .loc 1 5366 11 is_stmt 0 view .LVU4325 + 13022 0116 238D ldrh r3, [r4, #40] +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13023 .loc 1 5366 21 view .LVU4326 + 13024 0118 013B subs r3, r3, #1 + 13025 011a 2385 strh r3, [r4, #40] + 13026 011c 97E7 b .L732 + 13027 .LVL974: + 13028 .L756: +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13029 .loc 1 5348 5 is_stmt 1 view .LVU4327 + 13030 011e 2000 movs r0, r4 + 13031 0120 FFF7FEFF bl I2C_ITAddrCplt + 13032 .LVL975: +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13033 .loc 1 5348 5 is_stmt 0 view .LVU4328 + 13034 0124 93E7 b .L732 + 13035 .L741: +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13036 .loc 1 5370 7 is_stmt 1 view .LVU4329 +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13037 .loc 1 5370 10 is_stmt 0 view .LVU4330 + 13038 0126 8023 movs r3, #128 + 13039 0128 5B04 lsls r3, r3, #17 + 13040 012a 9D42 cmp r5, r3 + 13041 012c 02D0 beq .L742 +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13042 .loc 1 5370 42 discriminator 1 view .LVU4331 + 13043 012e 002D cmp r5, #0 + 13044 0130 00D0 beq .LCB12169 + 13045 0132 8CE7 b .L732 @long jump + 13046 .LCB12169: + 13047 .L742: +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13048 .loc 1 5374 9 is_stmt 1 view .LVU4332 + 13049 0134 2000 movs r0, r4 + 13050 0136 FFF7FEFF bl I2C_ITSlaveSeqCplt + 13051 .LVL976: + 13052 013a 88E7 b .L732 + 13053 .LVL977: + 13054 .L743: +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13055 .loc 1 5264 3 is_stmt 0 discriminator 1 view .LVU4333 + ARM GAS /tmp/cc4IUqI9.s page 434 + + + 13056 013c 0220 movs r0, #2 + 13057 .LVL978: +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13058 .loc 1 5264 3 discriminator 1 view .LVU4334 + 13059 013e 8AE7 b .L730 + 13060 .L758: + 13061 .align 2 + 13062 .L757: + 13063 0140 0000FFFF .word -65536 + 13064 .cfi_endproc + 13065 .LFE91: + 13067 .section .text.I2C_ITMasterCplt,"ax",%progbits + 13068 .align 1 + 13069 .syntax unified + 13070 .code 16 + 13071 .thumb_func + 13073 I2C_ITMasterCplt: + 13074 .LVL979: + 13075 .LFB100: +6180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 13076 .loc 1 6180 1 is_stmt 1 view -0 + 13077 .cfi_startproc + 13078 @ args = 0, pretend = 0, frame = 8 + 13079 @ frame_needed = 0, uses_anonymous_args = 0 +6180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 13080 .loc 1 6180 1 is_stmt 0 view .LVU4336 + 13081 0000 30B5 push {r4, r5, lr} + 13082 .cfi_def_cfa_offset 12 + 13083 .cfi_offset 4, -12 + 13084 .cfi_offset 5, -8 + 13085 .cfi_offset 14, -4 + 13086 0002 83B0 sub sp, sp, #12 + 13087 .cfi_def_cfa_offset 24 + 13088 0004 0400 movs r4, r0 + 13089 0006 0D00 movs r5, r1 +6181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 13090 .loc 1 6181 3 is_stmt 1 view .LVU4337 +6182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __IO uint32_t tmpreg; + 13091 .loc 1 6182 3 view .LVU4338 + 13092 .LVL980: +6183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13093 .loc 1 6183 3 view .LVU4339 +6186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13094 .loc 1 6186 3 view .LVU4340 + 13095 0008 0368 ldr r3, [r0] + 13096 000a 2022 movs r2, #32 + 13097 000c DA61 str r2, [r3, #28] +6189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13098 .loc 1 6189 3 view .LVU4341 +6189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13099 .loc 1 6189 11 is_stmt 0 view .LVU4342 + 13100 000e 4123 movs r3, #65 + 13101 0010 C35C ldrb r3, [r0, r3] +6189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13102 .loc 1 6189 6 view .LVU4343 + 13103 0012 212B cmp r3, #33 + 13104 0014 29D0 beq .L772 + ARM GAS /tmp/cc4IUqI9.s page 435 + + +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13105 .loc 1 6194 8 is_stmt 1 view .LVU4344 +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13106 .loc 1 6194 16 is_stmt 0 view .LVU4345 + 13107 0016 4123 movs r3, #65 + 13108 0018 C35C ldrb r3, [r0, r3] +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13109 .loc 1 6194 11 view .LVU4346 + 13110 001a 222B cmp r3, #34 + 13111 001c 2BD0 beq .L773 + 13112 .LVL981: + 13113 .L761: +6202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13114 .loc 1 6202 3 is_stmt 1 view .LVU4347 +6205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13115 .loc 1 6205 3 view .LVU4348 + 13116 001e 2268 ldr r2, [r4] + 13117 0020 5368 ldr r3, [r2, #4] + 13118 0022 3B49 ldr r1, .L778 + 13119 0024 0B40 ands r3, r1 + 13120 0026 5360 str r3, [r2, #4] +6208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 13121 .loc 1 6208 3 view .LVU4349 +6208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 13122 .loc 1 6208 23 is_stmt 0 view .LVU4350 + 13123 0028 0023 movs r3, #0 + 13124 002a 6363 str r3, [r4, #52] +6209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13125 .loc 1 6209 3 is_stmt 1 view .LVU4351 +6209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13126 .loc 1 6209 23 is_stmt 0 view .LVU4352 + 13127 002c 394B ldr r3, .L778+4 + 13128 002e E362 str r3, [r4, #44] +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13129 .loc 1 6211 3 is_stmt 1 view .LVU4353 +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13130 .loc 1 6211 6 is_stmt 0 view .LVU4354 + 13131 0030 EB06 lsls r3, r5, #27 + 13132 0032 06D5 bpl .L762 +6214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13133 .loc 1 6214 5 is_stmt 1 view .LVU4355 + 13134 0034 2368 ldr r3, [r4] + 13135 0036 1022 movs r2, #16 + 13136 0038 DA61 str r2, [r3, #28] +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13137 .loc 1 6217 5 view .LVU4356 +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13138 .loc 1 6217 9 is_stmt 0 view .LVU4357 + 13139 003a 636C ldr r3, [r4, #68] +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13140 .loc 1 6217 21 view .LVU4358 + 13141 003c 0C3A subs r2, r2, #12 + 13142 003e 1343 orrs r3, r2 + 13143 0040 6364 str r3, [r4, #68] + 13144 .L762: +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13145 .loc 1 6221 3 is_stmt 1 view .LVU4359 + ARM GAS /tmp/cc4IUqI9.s page 436 + + +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13146 .loc 1 6221 12 is_stmt 0 view .LVU4360 + 13147 0042 4123 movs r3, #65 + 13148 0044 E35C ldrb r3, [r4, r3] +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13149 .loc 1 6221 6 view .LVU4361 + 13150 0046 602B cmp r3, #96 + 13151 0048 1BD0 beq .L774 + 13152 .LVL982: + 13153 .L763: +6229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13154 .loc 1 6229 3 is_stmt 1 view .LVU4362 + 13155 004a 2000 movs r0, r4 + 13156 004c FFF7FEFF bl I2C_Flush_TXDR + 13157 .LVL983: +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13158 .loc 1 6232 3 view .LVU4363 +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13159 .loc 1 6232 12 is_stmt 0 view .LVU4364 + 13160 0050 626C ldr r2, [r4, #68] + 13161 .LVL984: +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13162 .loc 1 6235 3 is_stmt 1 view .LVU4365 +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13163 .loc 1 6235 12 is_stmt 0 view .LVU4366 + 13164 0052 4123 movs r3, #65 + 13165 0054 E35C ldrb r3, [r4, r3] +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13166 .loc 1 6235 6 view .LVU4367 + 13167 0056 602B cmp r3, #96 + 13168 0058 01D0 beq .L764 +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13169 .loc 1 6235 44 discriminator 1 view .LVU4368 + 13170 005a 002A cmp r2, #0 + 13171 005c 1AD0 beq .L765 + 13172 .L764: +6238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13173 .loc 1 6238 5 is_stmt 1 view .LVU4369 +6238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13174 .loc 1 6238 27 is_stmt 0 view .LVU4370 + 13175 005e 616C ldr r1, [r4, #68] +6238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13176 .loc 1 6238 5 view .LVU4371 + 13177 0060 2000 movs r0, r4 + 13178 0062 FFF7FEFF bl I2C_ITError + 13179 .LVL985: + 13180 .L759: +6314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13181 .loc 1 6314 1 view .LVU4372 + 13182 0066 03B0 add sp, sp, #12 + 13183 @ sp needed + 13184 .LVL986: +6314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13185 .loc 1 6314 1 view .LVU4373 + 13186 0068 30BD pop {r4, r5, pc} + 13187 .LVL987: + 13188 .L772: + ARM GAS /tmp/cc4IUqI9.s page 437 + + +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 13189 .loc 1 6191 5 is_stmt 1 view .LVU4374 + 13190 006a 0121 movs r1, #1 + 13191 .LVL988: +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 13192 .loc 1 6191 5 is_stmt 0 view .LVU4375 + 13193 006c FFF7FEFF bl I2C_Disable_IRQ + 13194 .LVL989: +6192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13195 .loc 1 6192 5 is_stmt 1 view .LVU4376 +6192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13196 .loc 1 6192 25 is_stmt 0 view .LVU4377 + 13197 0070 1123 movs r3, #17 + 13198 0072 2363 str r3, [r4, #48] + 13199 0074 D3E7 b .L761 + 13200 .LVL990: + 13201 .L773: +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 13202 .loc 1 6196 5 is_stmt 1 view .LVU4378 + 13203 0076 0221 movs r1, #2 + 13204 .LVL991: +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 13205 .loc 1 6196 5 is_stmt 0 view .LVU4379 + 13206 0078 FFF7FEFF bl I2C_Disable_IRQ + 13207 .LVL992: +6197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13208 .loc 1 6197 5 is_stmt 1 view .LVU4380 +6197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13209 .loc 1 6197 25 is_stmt 0 view .LVU4381 + 13210 007c 1223 movs r3, #18 + 13211 007e 2363 str r3, [r4, #48] + 13212 0080 CDE7 b .L761 + 13213 .L774: +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13214 .loc 1 6221 44 discriminator 1 view .LVU4382 + 13215 0082 6D07 lsls r5, r5, #29 + 13216 0084 E1D5 bpl .L763 + 13217 .LVL993: +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); + 13218 .loc 1 6224 5 is_stmt 1 view .LVU4383 +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); + 13219 .loc 1 6224 27 is_stmt 0 view .LVU4384 + 13220 0086 2368 ldr r3, [r4] +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); + 13221 .loc 1 6224 37 view .LVU4385 + 13222 0088 5A6A ldr r2, [r3, #36] + 13223 008a FF23 movs r3, #255 + 13224 008c 1340 ands r3, r2 +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); + 13225 .loc 1 6224 12 view .LVU4386 + 13226 008e 0193 str r3, [sp, #4] +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13227 .loc 1 6225 5 is_stmt 1 view .LVU4387 + 13228 0090 019B ldr r3, [sp, #4] + 13229 0092 DAE7 b .L763 + 13230 .LVL994: + 13231 .L765: + ARM GAS /tmp/cc4IUqI9.s page 438 + + +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13232 .loc 1 6241 8 view .LVU4388 +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13233 .loc 1 6241 16 is_stmt 0 view .LVU4389 + 13234 0094 4123 movs r3, #65 + 13235 0096 E35C ldrb r3, [r4, r3] +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13236 .loc 1 6241 11 view .LVU4390 + 13237 0098 212B cmp r3, #33 + 13238 009a 15D0 beq .L775 +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13239 .loc 1 6276 8 is_stmt 1 view .LVU4391 +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13240 .loc 1 6276 16 is_stmt 0 view .LVU4392 + 13241 009c 4123 movs r3, #65 + 13242 009e E35C ldrb r3, [r4, r3] +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13243 .loc 1 6276 11 view .LVU4393 + 13244 00a0 222B cmp r3, #34 + 13245 00a2 E0D1 bne .L759 +6278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 13246 .loc 1 6278 5 is_stmt 1 view .LVU4394 +6278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 13247 .loc 1 6278 17 is_stmt 0 view .LVU4395 + 13248 00a4 1F33 adds r3, r3, #31 + 13249 00a6 2022 movs r2, #32 + 13250 .LVL995: +6278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 13251 .loc 1 6278 17 view .LVU4396 + 13252 00a8 E254 strb r2, [r4, r3] +6279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13253 .loc 1 6279 5 is_stmt 1 view .LVU4397 +6279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13254 .loc 1 6279 25 is_stmt 0 view .LVU4398 + 13255 00aa 0023 movs r3, #0 + 13256 00ac 2363 str r3, [r4, #48] +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13257 .loc 1 6281 5 is_stmt 1 view .LVU4399 +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13258 .loc 1 6281 13 is_stmt 0 view .LVU4400 + 13259 00ae 4233 adds r3, r3, #66 + 13260 00b0 E35C ldrb r3, [r4, r3] +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13261 .loc 1 6281 8 view .LVU4401 + 13262 00b2 402B cmp r3, #64 + 13263 00b4 23D0 beq .L776 +6297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13264 .loc 1 6297 7 is_stmt 1 view .LVU4402 +6297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13265 .loc 1 6297 18 is_stmt 0 view .LVU4403 + 13266 00b6 0023 movs r3, #0 + 13267 00b8 4222 movs r2, #66 + 13268 00ba A354 strb r3, [r4, r2] +6300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13269 .loc 1 6300 7 is_stmt 1 view .LVU4404 +6300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13270 .loc 1 6300 7 view .LVU4405 + ARM GAS /tmp/cc4IUqI9.s page 439 + + + 13271 00bc 023A subs r2, r2, #2 + 13272 00be A354 strb r3, [r4, r2] +6300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13273 .loc 1 6300 7 view .LVU4406 +6306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 13274 .loc 1 6306 7 view .LVU4407 + 13275 00c0 2000 movs r0, r4 + 13276 00c2 FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 13277 .LVL996: +6313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13278 .loc 1 6313 3 view .LVU4408 +6314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13279 .loc 1 6314 1 is_stmt 0 view .LVU4409 + 13280 00c6 CEE7 b .L759 + 13281 .LVL997: + 13282 .L775: +6243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 13283 .loc 1 6243 5 is_stmt 1 view .LVU4410 +6243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 13284 .loc 1 6243 17 is_stmt 0 view .LVU4411 + 13285 00c8 2033 adds r3, r3, #32 + 13286 00ca 2022 movs r2, #32 + 13287 .LVL998: +6243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 13288 .loc 1 6243 17 view .LVU4412 + 13289 00cc E254 strb r2, [r4, r3] +6244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13290 .loc 1 6244 5 is_stmt 1 view .LVU4413 +6244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13291 .loc 1 6244 25 is_stmt 0 view .LVU4414 + 13292 00ce 0023 movs r3, #0 + 13293 00d0 2363 str r3, [r4, #48] +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13294 .loc 1 6246 5 is_stmt 1 view .LVU4415 +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13295 .loc 1 6246 13 is_stmt 0 view .LVU4416 + 13296 00d2 4233 adds r3, r3, #66 + 13297 00d4 E35C ldrb r3, [r4, r3] +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13298 .loc 1 6246 8 view .LVU4417 + 13299 00d6 402B cmp r3, #64 + 13300 00d8 08D0 beq .L777 +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13301 .loc 1 6262 7 is_stmt 1 view .LVU4418 +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13302 .loc 1 6262 18 is_stmt 0 view .LVU4419 + 13303 00da 0023 movs r3, #0 + 13304 00dc 4222 movs r2, #66 + 13305 00de A354 strb r3, [r4, r2] +6265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13306 .loc 1 6265 7 is_stmt 1 view .LVU4420 +6265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13307 .loc 1 6265 7 view .LVU4421 + 13308 00e0 023A subs r2, r2, #2 + 13309 00e2 A354 strb r3, [r4, r2] +6265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13310 .loc 1 6265 7 view .LVU4422 + ARM GAS /tmp/cc4IUqI9.s page 440 + + +6271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 13311 .loc 1 6271 7 view .LVU4423 + 13312 00e4 2000 movs r0, r4 + 13313 00e6 FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 13314 .LVL999: + 13315 00ea BCE7 b .L759 + 13316 .L777: +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13317 .loc 1 6248 7 view .LVU4424 +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13318 .loc 1 6248 18 is_stmt 0 view .LVU4425 + 13319 00ec 0023 movs r3, #0 + 13320 00ee 2232 adds r2, r2, #34 + 13321 00f0 A354 strb r3, [r4, r2] +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13322 .loc 1 6251 7 is_stmt 1 view .LVU4426 +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13323 .loc 1 6251 7 view .LVU4427 + 13324 00f2 023A subs r2, r2, #2 + 13325 00f4 A354 strb r3, [r4, r2] +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13326 .loc 1 6251 7 view .LVU4428 +6257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 13327 .loc 1 6257 7 view .LVU4429 + 13328 00f6 2000 movs r0, r4 + 13329 00f8 FFF7FEFF bl HAL_I2C_MemTxCpltCallback + 13330 .LVL1000: + 13331 00fc B3E7 b .L759 + 13332 .L776: +6283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13333 .loc 1 6283 7 view .LVU4430 +6283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13334 .loc 1 6283 18 is_stmt 0 view .LVU4431 + 13335 00fe 0023 movs r3, #0 + 13336 0100 2232 adds r2, r2, #34 + 13337 0102 A354 strb r3, [r4, r2] +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13338 .loc 1 6286 7 is_stmt 1 view .LVU4432 +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13339 .loc 1 6286 7 view .LVU4433 + 13340 0104 023A subs r2, r2, #2 + 13341 0106 A354 strb r3, [r4, r2] +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13342 .loc 1 6286 7 view .LVU4434 +6292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 13343 .loc 1 6292 7 view .LVU4435 + 13344 0108 2000 movs r0, r4 + 13345 010a FFF7FEFF bl HAL_I2C_MemRxCpltCallback + 13346 .LVL1001: + 13347 010e AAE7 b .L759 + 13348 .L779: + 13349 .align 2 + 13350 .L778: + 13351 0110 00E800FE .word -33495040 + 13352 0114 0000FFFF .word -65536 + 13353 .cfi_endproc + 13354 .LFE100: + ARM GAS /tmp/cc4IUqI9.s page 441 + + + 13356 .section .text.I2C_Master_ISR_IT,"ax",%progbits + 13357 .align 1 + 13358 .syntax unified + 13359 .code 16 + 13360 .thumb_func + 13362 I2C_Master_ISR_IT: + 13363 .LVL1002: + 13364 .LFB89: +4941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 13365 .loc 1 4941 1 view -0 + 13366 .cfi_startproc + 13367 @ args = 0, pretend = 0, frame = 0 + 13368 @ frame_needed = 0, uses_anonymous_args = 0 +4941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 13369 .loc 1 4941 1 is_stmt 0 view .LVU4437 + 13370 0000 70B5 push {r4, r5, r6, lr} + 13371 .cfi_def_cfa_offset 16 + 13372 .cfi_offset 4, -16 + 13373 .cfi_offset 5, -12 + 13374 .cfi_offset 6, -8 + 13375 .cfi_offset 14, -4 + 13376 0002 82B0 sub sp, sp, #8 + 13377 .cfi_def_cfa_offset 24 + 13378 0004 0400 movs r4, r0 + 13379 0006 0D00 movs r5, r1 + 13380 0008 1600 movs r6, r2 +4942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 13381 .loc 1 4942 3 is_stmt 1 view .LVU4438 +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13382 .loc 1 4943 3 view .LVU4439 + 13383 .LVL1003: +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13384 .loc 1 4946 3 view .LVU4440 +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13385 .loc 1 4946 3 view .LVU4441 + 13386 000a 4023 movs r3, #64 + 13387 000c C35C ldrb r3, [r0, r3] + 13388 000e 012B cmp r3, #1 + 13389 0010 00D1 bne .LCB12500 + 13390 0012 BEE0 b .L796 @long jump + 13391 .LCB12500: +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13392 .loc 1 4946 3 discriminator 2 view .LVU4442 + 13393 0014 0123 movs r3, #1 + 13394 0016 4022 movs r2, #64 + 13395 .LVL1004: +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13396 .loc 1 4946 3 is_stmt 0 discriminator 2 view .LVU4443 + 13397 0018 8354 strb r3, [r0, r2] +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13398 .loc 1 4946 3 is_stmt 1 discriminator 2 view .LVU4444 +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13399 .loc 1 4948 3 view .LVU4445 +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13400 .loc 1 4948 8 is_stmt 0 view .LVU4446 + 13401 001a 0A09 lsrs r2, r1, #4 +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + ARM GAS /tmp/cc4IUqI9.s page 442 + + + 13402 .loc 1 4948 6 view .LVU4447 + 13403 001c 1342 tst r3, r2 + 13404 001e 01D0 beq .L782 +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13405 .loc 1 4948 58 discriminator 1 view .LVU4448 + 13406 0020 F306 lsls r3, r6, #27 + 13407 0022 1ED4 bmi .L808 + 13408 .L782: +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 13409 .loc 1 4962 8 is_stmt 1 view .LVU4449 +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 13410 .loc 1 4962 11 is_stmt 0 view .LVU4450 + 13411 0024 6B07 lsls r3, r5, #29 + 13412 0026 26D5 bpl .L784 +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 13413 .loc 1 4962 65 discriminator 1 view .LVU4451 + 13414 0028 7307 lsls r3, r6, #29 + 13415 002a 24D5 bpl .L784 +4966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13416 .loc 1 4966 5 is_stmt 1 view .LVU4452 +4966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13417 .loc 1 4966 16 is_stmt 0 view .LVU4453 + 13418 002c 0423 movs r3, #4 + 13419 002e 9D43 bics r5, r3 + 13420 .LVL1005: +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13421 .loc 1 4969 5 is_stmt 1 view .LVU4454 +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13422 .loc 1 4969 36 is_stmt 0 view .LVU4455 + 13423 0030 2368 ldr r3, [r4] +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13424 .loc 1 4969 46 view .LVU4456 + 13425 0032 5A6A ldr r2, [r3, #36] +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13426 .loc 1 4969 10 view .LVU4457 + 13427 0034 636A ldr r3, [r4, #36] +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13428 .loc 1 4969 21 view .LVU4458 + 13429 0036 1A70 strb r2, [r3] +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13430 .loc 1 4972 5 is_stmt 1 view .LVU4459 +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13431 .loc 1 4972 9 is_stmt 0 view .LVU4460 + 13432 0038 636A ldr r3, [r4, #36] +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13433 .loc 1 4972 19 view .LVU4461 + 13434 003a 0133 adds r3, r3, #1 + 13435 003c 6362 str r3, [r4, #36] +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13436 .loc 1 4974 5 is_stmt 1 view .LVU4462 +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13437 .loc 1 4974 9 is_stmt 0 view .LVU4463 + 13438 003e 238D ldrh r3, [r4, #40] +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13439 .loc 1 4974 19 view .LVU4464 + 13440 0040 013B subs r3, r3, #1 + 13441 0042 2385 strh r3, [r4, #40] + ARM GAS /tmp/cc4IUqI9.s page 443 + + +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13442 .loc 1 4975 5 is_stmt 1 view .LVU4465 +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13443 .loc 1 4975 9 is_stmt 0 view .LVU4466 + 13444 0044 638D ldrh r3, [r4, #42] +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13445 .loc 1 4975 20 view .LVU4467 + 13446 0046 013B subs r3, r3, #1 + 13447 0048 9BB2 uxth r3, r3 + 13448 004a 6385 strh r3, [r4, #42] + 13449 .LVL1006: + 13450 .L783: +5075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13451 .loc 1 5075 3 is_stmt 1 view .LVU4468 +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13452 .loc 1 5077 3 view .LVU4469 +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13453 .loc 1 5077 6 is_stmt 0 view .LVU4470 + 13454 004c AB06 lsls r3, r5, #26 + 13455 004e 02D5 bpl .L795 +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13456 .loc 1 5077 61 discriminator 1 view .LVU4471 + 13457 0050 B606 lsls r6, r6, #26 + 13458 0052 00D5 bpl .LCB12571 + 13459 0054 98E0 b .L809 @long jump + 13460 .LCB12571: + 13461 .LVL1007: + 13462 .L795: +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13463 .loc 1 5085 3 is_stmt 1 view .LVU4472 +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13464 .loc 1 5085 3 view .LVU4473 + 13465 0056 4023 movs r3, #64 + 13466 0058 0022 movs r2, #0 + 13467 005a E254 strb r2, [r4, r3] +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13468 .loc 1 5085 3 view .LVU4474 +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13469 .loc 1 5087 3 view .LVU4475 +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13470 .loc 1 5087 10 is_stmt 0 view .LVU4476 + 13471 005c 0020 movs r0, #0 + 13472 .L781: +5088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13473 .loc 1 5088 1 view .LVU4477 + 13474 005e 02B0 add sp, sp, #8 + 13475 @ sp needed + 13476 .LVL1008: + 13477 .LVL1009: +5088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13478 .loc 1 5088 1 view .LVU4478 + 13479 0060 70BD pop {r4, r5, r6, pc} + 13480 .LVL1010: + 13481 .L808: +4952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13482 .loc 1 4952 5 is_stmt 1 view .LVU4479 + 13483 0062 0368 ldr r3, [r0] + ARM GAS /tmp/cc4IUqI9.s page 444 + + + 13484 0064 1022 movs r2, #16 + 13485 0066 DA61 str r2, [r3, #28] +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13486 .loc 1 4957 5 view .LVU4480 +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13487 .loc 1 4957 9 is_stmt 0 view .LVU4481 + 13488 0068 436C ldr r3, [r0, #68] +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13489 .loc 1 4957 21 view .LVU4482 + 13490 006a 0C3A subs r2, r2, #12 + 13491 006c 1343 orrs r3, r2 + 13492 006e 4364 str r3, [r0, #68] +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13493 .loc 1 4960 5 is_stmt 1 view .LVU4483 + 13494 0070 FFF7FEFF bl I2C_Flush_TXDR + 13495 .LVL1011: +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13496 .loc 1 4960 5 is_stmt 0 view .LVU4484 + 13497 0074 EAE7 b .L783 + 13498 .LVL1012: + 13499 .L784: +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + 13500 .loc 1 4977 8 is_stmt 1 view .LVU4485 +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + 13501 .loc 1 4977 13 is_stmt 0 view .LVU4486 + 13502 0076 AB09 lsrs r3, r5, #6 + 13503 0078 0122 movs r2, #1 + 13504 007a 1100 movs r1, r2 + 13505 .LVL1013: +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + 13506 .loc 1 4977 13 view .LVU4487 + 13507 007c 1940 ands r1, r3 +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + 13508 .loc 1 4977 11 view .LVU4488 + 13509 007e 1A42 tst r2, r3 + 13510 0080 16D1 bne .L785 +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + 13511 .loc 1 4977 63 discriminator 1 view .LVU4489 + 13512 0082 AB07 lsls r3, r5, #30 + 13513 0084 14D5 bpl .L785 +4978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))) + 13514 .loc 1 4978 66 view .LVU4490 + 13515 0086 B307 lsls r3, r6, #30 + 13516 0088 12D5 bpl .L785 +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13517 .loc 1 4982 5 is_stmt 1 view .LVU4491 +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13518 .loc 1 4982 13 is_stmt 0 view .LVU4492 + 13519 008a 638D ldrh r3, [r4, #42] + 13520 008c 9BB2 uxth r3, r3 +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13521 .loc 1 4982 8 view .LVU4493 + 13522 008e 002B cmp r3, #0 + 13523 0090 DCD0 beq .L783 +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13524 .loc 1 4985 7 is_stmt 1 view .LVU4494 +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 445 + + + 13525 .loc 1 4985 35 is_stmt 0 view .LVU4495 + 13526 0092 626A ldr r2, [r4, #36] +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13527 .loc 1 4985 11 view .LVU4496 + 13528 0094 2368 ldr r3, [r4] +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13529 .loc 1 4985 30 view .LVU4497 + 13530 0096 1278 ldrb r2, [r2] +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13531 .loc 1 4985 28 view .LVU4498 + 13532 0098 9A62 str r2, [r3, #40] +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13533 .loc 1 4988 7 is_stmt 1 view .LVU4499 +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13534 .loc 1 4988 11 is_stmt 0 view .LVU4500 + 13535 009a 636A ldr r3, [r4, #36] +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13536 .loc 1 4988 21 view .LVU4501 + 13537 009c 0133 adds r3, r3, #1 + 13538 009e 6362 str r3, [r4, #36] +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13539 .loc 1 4990 7 is_stmt 1 view .LVU4502 +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13540 .loc 1 4990 11 is_stmt 0 view .LVU4503 + 13541 00a0 238D ldrh r3, [r4, #40] +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13542 .loc 1 4990 21 view .LVU4504 + 13543 00a2 013B subs r3, r3, #1 + 13544 00a4 2385 strh r3, [r4, #40] +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13545 .loc 1 4991 7 is_stmt 1 view .LVU4505 +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13546 .loc 1 4991 11 is_stmt 0 view .LVU4506 + 13547 00a6 638D ldrh r3, [r4, #42] +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13548 .loc 1 4991 22 view .LVU4507 + 13549 00a8 013B subs r3, r3, #1 + 13550 00aa 9BB2 uxth r3, r3 + 13551 00ac 6385 strh r3, [r4, #42] + 13552 00ae CDE7 b .L783 + 13553 .L785: +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13554 .loc 1 4994 8 is_stmt 1 view .LVU4508 +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13555 .loc 1 4994 11 is_stmt 0 view .LVU4509 + 13556 00b0 2B06 lsls r3, r5, #24 + 13557 00b2 47D5 bpl .L786 +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13558 .loc 1 4994 64 discriminator 1 view .LVU4510 + 13559 00b4 7306 lsls r3, r6, #25 + 13560 00b6 45D5 bpl .L786 +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13561 .loc 1 4997 5 is_stmt 1 view .LVU4511 +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13562 .loc 1 4997 14 is_stmt 0 view .LVU4512 + 13563 00b8 638D ldrh r3, [r4, #42] + 13564 00ba 9BB2 uxth r3, r3 + ARM GAS /tmp/cc4IUqI9.s page 446 + + +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13565 .loc 1 4997 8 view .LVU4513 + 13566 00bc 002B cmp r3, #0 + 13567 00be 34D0 beq .L787 +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13568 .loc 1 4997 41 discriminator 1 view .LVU4514 + 13569 00c0 238D ldrh r3, [r4, #40] +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13570 .loc 1 4997 33 discriminator 1 view .LVU4515 + 13571 00c2 002B cmp r3, #0 + 13572 00c4 31D1 bne .L787 +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13573 .loc 1 4999 7 is_stmt 1 view .LVU4516 +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13574 .loc 1 4999 35 is_stmt 0 view .LVU4517 + 13575 00c6 2268 ldr r2, [r4] +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13576 .loc 1 4999 45 view .LVU4518 + 13577 00c8 5168 ldr r1, [r2, #4] +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13578 .loc 1 4999 18 view .LVU4519 + 13579 00ca 8905 lsls r1, r1, #22 + 13580 00cc 890D lsrs r1, r1, #22 + 13581 .LVL1014: +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13582 .loc 1 5001 7 is_stmt 1 view .LVU4520 +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13583 .loc 1 5001 15 is_stmt 0 view .LVU4521 + 13584 00ce 638D ldrh r3, [r4, #42] + 13585 00d0 9BB2 uxth r3, r3 +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13586 .loc 1 5001 10 view .LVU4522 + 13587 00d2 FF2B cmp r3, #255 + 13588 00d4 11D9 bls .L788 +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13589 .loc 1 5004 9 is_stmt 1 view .LVU4523 +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13590 .loc 1 5004 13 is_stmt 0 view .LVU4524 + 13591 00d6 9369 ldr r3, [r2, #24] +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13592 .loc 1 5004 12 view .LVU4525 + 13593 00d8 DB03 lsls r3, r3, #15 + 13594 00da 0BD5 bpl .L789 +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13595 .loc 1 5006 11 is_stmt 1 view .LVU4526 +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13596 .loc 1 5006 26 is_stmt 0 view .LVU4527 + 13597 00dc 0123 movs r3, #1 + 13598 00de 2385 strh r3, [r4, #40] + 13599 .L790: +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13600 .loc 1 5012 9 is_stmt 1 view .LVU4528 +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13601 .loc 1 5012 59 is_stmt 0 view .LVU4529 + 13602 00e0 228D ldrh r2, [r4, #40] +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13603 .loc 1 5012 9 view .LVU4530 + ARM GAS /tmp/cc4IUqI9.s page 447 + + + 13604 00e2 8023 movs r3, #128 + 13605 00e4 D2B2 uxtb r2, r2 + 13606 00e6 0020 movs r0, #0 + 13607 .LVL1015: +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13608 .loc 1 5012 9 view .LVU4531 + 13609 00e8 0090 str r0, [sp] + 13610 00ea 5B04 lsls r3, r3, #17 + 13611 00ec 2000 movs r0, r4 + 13612 00ee FFF7FEFF bl I2C_TransferConfig + 13613 .LVL1016: +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13614 .loc 1 5012 9 view .LVU4532 + 13615 00f2 ABE7 b .L783 + 13616 .LVL1017: + 13617 .L789: +5010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13618 .loc 1 5010 11 is_stmt 1 view .LVU4533 +5010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13619 .loc 1 5010 26 is_stmt 0 view .LVU4534 + 13620 00f4 FF23 movs r3, #255 + 13621 00f6 2385 strh r3, [r4, #40] + 13622 00f8 F2E7 b .L790 + 13623 .L788: +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13624 .loc 1 5016 9 is_stmt 1 view .LVU4535 +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13625 .loc 1 5016 30 is_stmt 0 view .LVU4536 + 13626 00fa 628D ldrh r2, [r4, #42] + 13627 00fc 92B2 uxth r2, r2 +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13628 .loc 1 5016 24 view .LVU4537 + 13629 00fe 2285 strh r2, [r4, #40] +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13630 .loc 1 5017 9 is_stmt 1 view .LVU4538 +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13631 .loc 1 5017 17 is_stmt 0 view .LVU4539 + 13632 0100 E06A ldr r0, [r4, #44] + 13633 .LVL1018: +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13634 .loc 1 5017 12 view .LVU4540 + 13635 0102 254B ldr r3, .L810 + 13636 0104 9842 cmp r0, r3 + 13637 0106 07D0 beq .L791 +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 13638 .loc 1 5019 11 is_stmt 1 view .LVU4541 +5020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13639 .loc 1 5020 34 is_stmt 0 view .LVU4542 + 13640 0108 E36A ldr r3, [r4, #44] +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 13641 .loc 1 5019 11 view .LVU4543 + 13642 010a D2B2 uxtb r2, r2 + 13643 010c 0020 movs r0, #0 + 13644 010e 0090 str r0, [sp] + 13645 0110 2000 movs r0, r4 + 13646 0112 FFF7FEFF bl I2C_TransferConfig + 13647 .LVL1019: + ARM GAS /tmp/cc4IUqI9.s page 448 + + +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 13648 .loc 1 5019 11 view .LVU4544 + 13649 0116 99E7 b .L783 + 13650 .LVL1020: + 13651 .L791: +5024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13652 .loc 1 5024 11 is_stmt 1 view .LVU4545 + 13653 0118 8023 movs r3, #128 + 13654 011a D2B2 uxtb r2, r2 + 13655 011c 0020 movs r0, #0 + 13656 011e 0090 str r0, [sp] + 13657 0120 9B04 lsls r3, r3, #18 + 13658 0122 2000 movs r0, r4 + 13659 0124 FFF7FEFF bl I2C_TransferConfig + 13660 .LVL1021: +5024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13661 .loc 1 5024 11 is_stmt 0 view .LVU4546 + 13662 0128 90E7 b .L783 + 13663 .LVL1022: + 13664 .L787: +5032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13665 .loc 1 5032 7 is_stmt 1 view .LVU4547 +5032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13666 .loc 1 5032 11 is_stmt 0 view .LVU4548 + 13667 012a 2368 ldr r3, [r4] + 13668 012c 5B68 ldr r3, [r3, #4] +5032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13669 .loc 1 5032 10 view .LVU4549 + 13670 012e 9B01 lsls r3, r3, #6 + 13671 0130 03D4 bmi .L792 +5035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13672 .loc 1 5035 9 is_stmt 1 view .LVU4550 + 13673 0132 2000 movs r0, r4 + 13674 .LVL1023: +5035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13675 .loc 1 5035 9 is_stmt 0 view .LVU4551 + 13676 0134 FFF7FEFF bl I2C_ITMasterSeqCplt + 13677 .LVL1024: + 13678 0138 88E7 b .L783 + 13679 .LVL1025: + 13680 .L792: +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13681 .loc 1 5041 9 is_stmt 1 view .LVU4552 + 13682 013a 4021 movs r1, #64 + 13683 013c 2000 movs r0, r4 + 13684 .LVL1026: +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13685 .loc 1 5041 9 is_stmt 0 view .LVU4553 + 13686 013e FFF7FEFF bl I2C_ITError + 13687 .LVL1027: + 13688 0142 83E7 b .L783 + 13689 .LVL1028: + 13690 .L786: +5045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13691 .loc 1 5045 8 is_stmt 1 view .LVU4554 +5045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13692 .loc 1 5045 11 is_stmt 0 view .LVU4555 + ARM GAS /tmp/cc4IUqI9.s page 449 + + + 13693 0144 0029 cmp r1, #0 + 13694 0146 00D1 bne .LCB12809 + 13695 0148 80E7 b .L783 @long jump + 13696 .LCB12809: +5045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13697 .loc 1 5045 63 discriminator 1 view .LVU4556 + 13698 014a 7306 lsls r3, r6, #25 + 13699 014c 00D4 bmi .LCB12814 + 13700 014e 7DE7 b .L783 @long jump + 13701 .LCB12814: +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13702 .loc 1 5048 5 is_stmt 1 view .LVU4557 +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13703 .loc 1 5048 13 is_stmt 0 view .LVU4558 + 13704 0150 638D ldrh r3, [r4, #42] + 13705 0152 9BB2 uxth r3, r3 +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13706 .loc 1 5048 8 view .LVU4559 + 13707 0154 002B cmp r3, #0 + 13708 0156 12D1 bne .L793 +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13709 .loc 1 5050 7 is_stmt 1 view .LVU4560 +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13710 .loc 1 5050 11 is_stmt 0 view .LVU4561 + 13711 0158 2268 ldr r2, [r4] + 13712 015a 5368 ldr r3, [r2, #4] +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13713 .loc 1 5050 10 view .LVU4562 + 13714 015c 9B01 lsls r3, r3, #6 + 13715 015e 00D5 bpl .LCB12826 + 13716 0160 74E7 b .L783 @long jump + 13717 .LCB12826: +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13718 .loc 1 5053 9 is_stmt 1 view .LVU4563 +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13719 .loc 1 5053 17 is_stmt 0 view .LVU4564 + 13720 0162 E16A ldr r1, [r4, #44] +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13721 .loc 1 5053 12 view .LVU4565 + 13722 0164 0C4B ldr r3, .L810 + 13723 0166 9942 cmp r1, r3 + 13724 0168 05D1 bne .L794 +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13725 .loc 1 5056 11 is_stmt 1 view .LVU4566 +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13726 .loc 1 5056 25 is_stmt 0 view .LVU4567 + 13727 016a 5168 ldr r1, [r2, #4] +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13728 .loc 1 5056 31 view .LVU4568 + 13729 016c 8023 movs r3, #128 + 13730 016e DB01 lsls r3, r3, #7 + 13731 0170 0B43 orrs r3, r1 + 13732 0172 5360 str r3, [r2, #4] + 13733 0174 6AE7 b .L783 + 13734 .L794: +5061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13735 .loc 1 5061 11 is_stmt 1 view .LVU4569 + ARM GAS /tmp/cc4IUqI9.s page 450 + + + 13736 0176 2000 movs r0, r4 + 13737 .LVL1029: +5061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13738 .loc 1 5061 11 is_stmt 0 view .LVU4570 + 13739 0178 FFF7FEFF bl I2C_ITMasterSeqCplt + 13740 .LVL1030: + 13741 017c 66E7 b .L783 + 13742 .LVL1031: + 13743 .L793: +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13744 .loc 1 5069 7 is_stmt 1 view .LVU4571 + 13745 017e 4021 movs r1, #64 + 13746 0180 2000 movs r0, r4 + 13747 .LVL1032: +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13748 .loc 1 5069 7 is_stmt 0 view .LVU4572 + 13749 0182 FFF7FEFF bl I2C_ITError + 13750 .LVL1033: + 13751 0186 61E7 b .L783 + 13752 .LVL1034: + 13753 .L809: +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13754 .loc 1 5081 5 is_stmt 1 view .LVU4573 + 13755 0188 2900 movs r1, r5 + 13756 018a 2000 movs r0, r4 + 13757 018c FFF7FEFF bl I2C_ITMasterCplt + 13758 .LVL1035: + 13759 0190 61E7 b .L795 + 13760 .LVL1036: + 13761 .L796: +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13762 .loc 1 4946 3 is_stmt 0 discriminator 1 view .LVU4574 + 13763 0192 0220 movs r0, #2 + 13764 .LVL1037: +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13765 .loc 1 4946 3 discriminator 1 view .LVU4575 + 13766 0194 63E7 b .L781 + 13767 .L811: + 13768 0196 C046 .align 2 + 13769 .L810: + 13770 0198 0000FFFF .word -65536 + 13771 .cfi_endproc + 13772 .LFE89: + 13774 .section .text.I2C_Mem_ISR_DMA,"ax",%progbits + 13775 .align 1 + 13776 .syntax unified + 13777 .code 16 + 13778 .thumb_func + 13780 I2C_Mem_ISR_DMA: + 13781 .LVL1038: + 13782 .LFB93: +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 13783 .loc 1 5547 1 is_stmt 1 view -0 + 13784 .cfi_startproc + 13785 @ args = 0, pretend = 0, frame = 0 + 13786 @ frame_needed = 0, uses_anonymous_args = 0 +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + ARM GAS /tmp/cc4IUqI9.s page 451 + + + 13787 .loc 1 5547 1 is_stmt 0 view .LVU4577 + 13788 0000 10B5 push {r4, lr} + 13789 .cfi_def_cfa_offset 8 + 13790 .cfi_offset 4, -8 + 13791 .cfi_offset 14, -4 + 13792 0002 82B0 sub sp, sp, #8 + 13793 .cfi_def_cfa_offset 16 + 13794 0004 0400 movs r4, r0 +5548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13795 .loc 1 5548 3 is_stmt 1 view .LVU4578 + 13796 .LVL1039: +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13797 .loc 1 5551 3 view .LVU4579 +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13798 .loc 1 5551 3 view .LVU4580 + 13799 0006 4023 movs r3, #64 + 13800 0008 C35C ldrb r3, [r0, r3] + 13801 000a 012B cmp r3, #1 + 13802 000c 00D1 bne .LCB12908 + 13803 000e CEE0 b .L831 @long jump + 13804 .LCB12908: +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13805 .loc 1 5551 3 discriminator 2 view .LVU4581 + 13806 0010 0123 movs r3, #1 + 13807 0012 4020 movs r0, #64 + 13808 .LVL1040: +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13809 .loc 1 5551 3 is_stmt 0 discriminator 2 view .LVU4582 + 13810 0014 2354 strb r3, [r4, r0] +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13811 .loc 1 5551 3 is_stmt 1 discriminator 2 view .LVU4583 +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13812 .loc 1 5553 3 view .LVU4584 +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13813 .loc 1 5553 8 is_stmt 0 view .LVU4585 + 13814 0016 0809 lsrs r0, r1, #4 +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13815 .loc 1 5553 6 view .LVU4586 + 13816 0018 0342 tst r3, r0 + 13817 001a 01D0 beq .L814 +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13818 .loc 1 5553 55 discriminator 1 view .LVU4587 + 13819 001c D306 lsls r3, r2, #27 + 13820 001e 0FD4 bmi .L842 + 13821 .L814: +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13822 .loc 1 5570 8 is_stmt 1 view .LVU4588 +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13823 .loc 1 5570 11 is_stmt 0 view .LVU4589 + 13824 0020 8B07 lsls r3, r1, #30 + 13825 0022 1CD5 bpl .L816 +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13826 .loc 1 5570 62 discriminator 1 view .LVU4590 + 13827 0024 9307 lsls r3, r2, #30 + 13828 0026 1AD5 bpl .L816 +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13829 .loc 1 5574 5 is_stmt 1 view .LVU4591 + ARM GAS /tmp/cc4IUqI9.s page 452 + + +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13830 .loc 1 5574 9 is_stmt 0 view .LVU4592 + 13831 0028 2368 ldr r3, [r4] +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13832 .loc 1 5574 32 view .LVU4593 + 13833 002a 226D ldr r2, [r4, #80] + 13834 .LVL1041: +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13835 .loc 1 5574 26 view .LVU4594 + 13836 002c 9A62 str r2, [r3, #40] +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13837 .loc 1 5577 5 is_stmt 1 view .LVU4595 +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13838 .loc 1 5577 22 is_stmt 0 view .LVU4596 + 13839 002e 0123 movs r3, #1 + 13840 0030 5B42 rsbs r3, r3, #0 + 13841 0032 2365 str r3, [r4, #80] + 13842 .LVL1042: + 13843 .L815: +5693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13844 .loc 1 5693 3 is_stmt 1 view .LVU4597 +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13845 .loc 1 5696 3 view .LVU4598 +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13846 .loc 1 5696 3 view .LVU4599 + 13847 0034 4023 movs r3, #64 + 13848 0036 0022 movs r2, #0 + 13849 0038 E254 strb r2, [r4, r3] +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13850 .loc 1 5696 3 view .LVU4600 +5698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13851 .loc 1 5698 3 view .LVU4601 +5698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13852 .loc 1 5698 10 is_stmt 0 view .LVU4602 + 13853 003a 0020 movs r0, #0 + 13854 .L813: +5699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13855 .loc 1 5699 1 view .LVU4603 + 13856 003c 02B0 add sp, sp, #8 + 13857 @ sp needed + 13858 .LVL1043: +5699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13859 .loc 1 5699 1 view .LVU4604 + 13860 003e 10BD pop {r4, pc} + 13861 .LVL1044: + 13862 .L842: +5557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13863 .loc 1 5557 5 is_stmt 1 view .LVU4605 + 13864 0040 2368 ldr r3, [r4] + 13865 0042 1022 movs r2, #16 + 13866 .LVL1045: +5557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13867 .loc 1 5557 5 is_stmt 0 view .LVU4606 + 13868 0044 DA61 str r2, [r3, #28] +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13869 .loc 1 5560 5 is_stmt 1 view .LVU4607 +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 453 + + + 13870 .loc 1 5560 9 is_stmt 0 view .LVU4608 + 13871 0046 636C ldr r3, [r4, #68] +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13872 .loc 1 5560 21 view .LVU4609 + 13873 0048 0C3A subs r2, r2, #12 + 13874 004a 1343 orrs r3, r2 + 13875 004c 6364 str r3, [r4, #68] +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13876 .loc 1 5565 5 is_stmt 1 view .LVU4610 + 13877 004e 2021 movs r1, #32 + 13878 .LVL1046: +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13879 .loc 1 5565 5 is_stmt 0 view .LVU4611 + 13880 0050 2000 movs r0, r4 + 13881 0052 FFF7FEFF bl I2C_Enable_IRQ + 13882 .LVL1047: +5568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13883 .loc 1 5568 5 is_stmt 1 view .LVU4612 + 13884 0056 2000 movs r0, r4 + 13885 0058 FFF7FEFF bl I2C_Flush_TXDR + 13886 .LVL1048: + 13887 005c EAE7 b .L815 + 13888 .LVL1049: + 13889 .L816: +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13890 .loc 1 5579 8 view .LVU4613 +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13891 .loc 1 5579 11 is_stmt 0 view .LVU4614 + 13892 005e 0B06 lsls r3, r1, #24 + 13893 0060 01D5 bpl .L817 +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13894 .loc 1 5579 61 discriminator 1 view .LVU4615 + 13895 0062 5306 lsls r3, r2, #25 + 13896 0064 0BD4 bmi .L843 + 13897 .L817: +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13898 .loc 1 5632 8 is_stmt 1 view .LVU4616 +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13899 .loc 1 5632 11 is_stmt 0 view .LVU4617 + 13900 0066 4B06 lsls r3, r1, #25 + 13901 0068 01D5 bpl .L824 +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13902 .loc 1 5632 60 discriminator 1 view .LVU4618 + 13903 006a 5306 lsls r3, r2, #25 + 13904 006c 55D4 bmi .L844 + 13905 .L824: +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13906 .loc 1 5684 8 is_stmt 1 view .LVU4619 +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13907 .loc 1 5684 11 is_stmt 0 view .LVU4620 + 13908 006e 8B06 lsls r3, r1, #26 + 13909 0070 E0D5 bpl .L815 +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13910 .loc 1 5684 63 discriminator 1 view .LVU4621 + 13911 0072 9206 lsls r2, r2, #26 + 13912 0074 DED5 bpl .L815 + 13913 .LVL1050: + ARM GAS /tmp/cc4IUqI9.s page 454 + + +5688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13914 .loc 1 5688 5 is_stmt 1 view .LVU4622 + 13915 0076 2000 movs r0, r4 + 13916 0078 FFF7FEFF bl I2C_ITMasterCplt + 13917 .LVL1051: +5688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13918 .loc 1 5688 5 is_stmt 0 view .LVU4623 + 13919 007c DAE7 b .L815 + 13920 .LVL1052: + 13921 .L843: +5583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13922 .loc 1 5583 5 is_stmt 1 view .LVU4624 + 13923 007e 0121 movs r1, #1 + 13924 .LVL1053: +5583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13925 .loc 1 5583 5 is_stmt 0 view .LVU4625 + 13926 0080 2000 movs r0, r4 + 13927 0082 FFF7FEFF bl I2C_Disable_IRQ + 13928 .LVL1054: +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13929 .loc 1 5586 5 is_stmt 1 view .LVU4626 + 13930 0086 1021 movs r1, #16 + 13931 0088 2000 movs r0, r4 + 13932 008a FFF7FEFF bl I2C_Enable_IRQ + 13933 .LVL1055: +5588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13934 .loc 1 5588 5 view .LVU4627 +5588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13935 .loc 1 5588 13 is_stmt 0 view .LVU4628 + 13936 008e 638D ldrh r3, [r4, #42] + 13937 0090 9BB2 uxth r3, r3 +5588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13938 .loc 1 5588 8 view .LVU4629 + 13939 0092 002B cmp r3, #0 + 13940 0094 3CD0 beq .L818 +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13941 .loc 1 5591 7 is_stmt 1 view .LVU4630 +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13942 .loc 1 5591 15 is_stmt 0 view .LVU4631 + 13943 0096 638D ldrh r3, [r4, #42] + 13944 0098 9BB2 uxth r3, r3 +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13945 .loc 1 5591 10 view .LVU4632 + 13946 009a FF2B cmp r3, #255 + 13947 009c 23D9 bls .L819 +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13948 .loc 1 5594 9 is_stmt 1 view .LVU4633 +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13949 .loc 1 5594 13 is_stmt 0 view .LVU4634 + 13950 009e 2368 ldr r3, [r4] + 13951 00a0 9B69 ldr r3, [r3, #24] +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13952 .loc 1 5594 12 view .LVU4635 + 13953 00a2 DB03 lsls r3, r3, #15 + 13954 00a4 1CD5 bpl .L820 +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13955 .loc 1 5596 11 is_stmt 1 view .LVU4636 + ARM GAS /tmp/cc4IUqI9.s page 455 + + +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13956 .loc 1 5596 26 is_stmt 0 view .LVU4637 + 13957 00a6 0123 movs r3, #1 + 13958 00a8 2385 strh r3, [r4, #40] + 13959 .L821: +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13960 .loc 1 5602 9 is_stmt 1 view .LVU4638 +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13961 .loc 1 5602 48 is_stmt 0 view .LVU4639 + 13962 00aa E16C ldr r1, [r4, #76] +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13963 .loc 1 5602 75 view .LVU4640 + 13964 00ac 228D ldrh r2, [r4, #40] +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13965 .loc 1 5602 9 view .LVU4641 + 13966 00ae 8023 movs r3, #128 + 13967 00b0 D2B2 uxtb r2, r2 + 13968 00b2 89B2 uxth r1, r1 + 13969 00b4 0020 movs r0, #0 + 13970 00b6 0090 str r0, [sp] + 13971 00b8 5B04 lsls r3, r3, #17 + 13972 00ba 2000 movs r0, r4 + 13973 00bc FFF7FEFF bl I2C_TransferConfig + 13974 .LVL1056: + 13975 .L822: +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13976 .loc 1 5613 7 is_stmt 1 view .LVU4642 +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13977 .loc 1 5613 11 is_stmt 0 view .LVU4643 + 13978 00c0 638D ldrh r3, [r4, #42] +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13979 .loc 1 5613 30 view .LVU4644 + 13980 00c2 228D ldrh r2, [r4, #40] +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13981 .loc 1 5613 23 view .LVU4645 + 13982 00c4 9B1A subs r3, r3, r2 + 13983 00c6 9BB2 uxth r3, r3 + 13984 00c8 6385 strh r3, [r4, #42] +5616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13985 .loc 1 5616 7 is_stmt 1 view .LVU4646 +5616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13986 .loc 1 5616 15 is_stmt 0 view .LVU4647 + 13987 00ca 4123 movs r3, #65 + 13988 00cc E35C ldrb r3, [r4, r3] +5616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13989 .loc 1 5616 10 view .LVU4648 + 13990 00ce 222B cmp r3, #34 + 13991 00d0 17D0 beq .L845 +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13992 .loc 1 5622 9 is_stmt 1 view .LVU4649 +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13993 .loc 1 5622 13 is_stmt 0 view .LVU4650 + 13994 00d2 2268 ldr r2, [r4] +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13995 .loc 1 5622 23 view .LVU4651 + 13996 00d4 1168 ldr r1, [r2] +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 456 + + + 13997 .loc 1 5622 29 view .LVU4652 + 13998 00d6 8023 movs r3, #128 + 13999 00d8 DB01 lsls r3, r3, #7 + 14000 00da 0B43 orrs r3, r1 + 14001 00dc 1360 str r3, [r2] + 14002 00de A9E7 b .L815 + 14003 .L820: +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14004 .loc 1 5600 11 is_stmt 1 view .LVU4653 +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14005 .loc 1 5600 26 is_stmt 0 view .LVU4654 + 14006 00e0 FF23 movs r3, #255 + 14007 00e2 2385 strh r3, [r4, #40] + 14008 00e4 E1E7 b .L821 + 14009 .L819: +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14010 .loc 1 5607 9 is_stmt 1 view .LVU4655 +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14011 .loc 1 5607 30 is_stmt 0 view .LVU4656 + 14012 00e6 628D ldrh r2, [r4, #42] + 14013 00e8 92B2 uxth r2, r2 +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14014 .loc 1 5607 24 view .LVU4657 + 14015 00ea 2285 strh r2, [r4, #40] +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14016 .loc 1 5608 9 is_stmt 1 view .LVU4658 +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14017 .loc 1 5608 48 is_stmt 0 view .LVU4659 + 14018 00ec E16C ldr r1, [r4, #76] +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14019 .loc 1 5608 9 view .LVU4660 + 14020 00ee 8023 movs r3, #128 + 14021 00f0 D2B2 uxtb r2, r2 + 14022 00f2 89B2 uxth r1, r1 + 14023 00f4 0020 movs r0, #0 + 14024 00f6 0090 str r0, [sp] + 14025 00f8 9B04 lsls r3, r3, #18 + 14026 00fa 2000 movs r0, r4 + 14027 00fc FFF7FEFF bl I2C_TransferConfig + 14028 .LVL1057: + 14029 0100 DEE7 b .L822 + 14030 .L845: +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14031 .loc 1 5618 9 is_stmt 1 view .LVU4661 +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14032 .loc 1 5618 13 is_stmt 0 view .LVU4662 + 14033 0102 2268 ldr r2, [r4] +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14034 .loc 1 5618 23 view .LVU4663 + 14035 0104 1168 ldr r1, [r2] +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14036 .loc 1 5618 29 view .LVU4664 + 14037 0106 8023 movs r3, #128 + 14038 0108 1B02 lsls r3, r3, #8 + 14039 010a 0B43 orrs r3, r1 + 14040 010c 1360 str r3, [r2] + 14041 010e 91E7 b .L815 + ARM GAS /tmp/cc4IUqI9.s page 457 + + + 14042 .L818: +5629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14043 .loc 1 5629 7 is_stmt 1 view .LVU4665 + 14044 0110 4021 movs r1, #64 + 14045 0112 2000 movs r0, r4 + 14046 0114 FFF7FEFF bl I2C_ITError + 14047 .LVL1058: + 14048 0118 8CE7 b .L815 + 14049 .LVL1059: + 14050 .L844: +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14051 .loc 1 5636 5 view .LVU4666 + 14052 011a 0121 movs r1, #1 + 14053 .LVL1060: +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14054 .loc 1 5636 5 is_stmt 0 view .LVU4667 + 14055 011c 2000 movs r0, r4 + 14056 011e FFF7FEFF bl I2C_Disable_IRQ + 14057 .LVL1061: +5639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14058 .loc 1 5639 5 is_stmt 1 view .LVU4668 + 14059 0122 1021 movs r1, #16 + 14060 0124 2000 movs r0, r4 + 14061 0126 FFF7FEFF bl I2C_Enable_IRQ + 14062 .LVL1062: +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14063 .loc 1 5641 5 view .LVU4669 +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14064 .loc 1 5641 13 is_stmt 0 view .LVU4670 + 14065 012a 4123 movs r3, #65 + 14066 012c E35C ldrb r3, [r4, r3] +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14067 .loc 1 5641 8 view .LVU4671 + 14068 012e 222B cmp r3, #34 + 14069 0130 24D0 beq .L832 +5548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14070 .loc 1 5548 12 view .LVU4672 + 14071 0132 2048 ldr r0, .L847 + 14072 .L825: + 14073 .LVL1063: +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14074 .loc 1 5646 5 is_stmt 1 view .LVU4673 +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14075 .loc 1 5646 13 is_stmt 0 view .LVU4674 + 14076 0134 638D ldrh r3, [r4, #42] + 14077 0136 9BB2 uxth r3, r3 +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14078 .loc 1 5646 8 view .LVU4675 + 14079 0138 FF2B cmp r3, #255 + 14080 013a 24D9 bls .L826 +5649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14081 .loc 1 5649 7 is_stmt 1 view .LVU4676 +5649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14082 .loc 1 5649 11 is_stmt 0 view .LVU4677 + 14083 013c 2368 ldr r3, [r4] + 14084 013e 9B69 ldr r3, [r3, #24] +5649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 458 + + + 14085 .loc 1 5649 10 view .LVU4678 + 14086 0140 DB03 lsls r3, r3, #15 + 14087 0142 1DD5 bpl .L827 +5651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14088 .loc 1 5651 9 is_stmt 1 view .LVU4679 +5651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14089 .loc 1 5651 24 is_stmt 0 view .LVU4680 + 14090 0144 0123 movs r3, #1 + 14091 0146 2385 strh r3, [r4, #40] + 14092 .L828: +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14093 .loc 1 5659 7 is_stmt 1 view .LVU4681 +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14094 .loc 1 5659 46 is_stmt 0 view .LVU4682 + 14095 0148 E16C ldr r1, [r4, #76] +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14096 .loc 1 5659 73 view .LVU4683 + 14097 014a 228D ldrh r2, [r4, #40] +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14098 .loc 1 5659 7 view .LVU4684 + 14099 014c 8023 movs r3, #128 + 14100 014e D2B2 uxtb r2, r2 + 14101 0150 89B2 uxth r1, r1 + 14102 0152 0090 str r0, [sp] + 14103 0154 5B04 lsls r3, r3, #17 + 14104 0156 2000 movs r0, r4 + 14105 .LVL1064: +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14106 .loc 1 5659 7 view .LVU4685 + 14107 0158 FFF7FEFF bl I2C_TransferConfig + 14108 .LVL1065: + 14109 .L829: +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14110 .loc 1 5672 5 is_stmt 1 view .LVU4686 +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14111 .loc 1 5672 9 is_stmt 0 view .LVU4687 + 14112 015c 638D ldrh r3, [r4, #42] +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14113 .loc 1 5672 28 view .LVU4688 + 14114 015e 228D ldrh r2, [r4, #40] +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14115 .loc 1 5672 21 view .LVU4689 + 14116 0160 9B1A subs r3, r3, r2 + 14117 0162 9BB2 uxth r3, r3 + 14118 0164 6385 strh r3, [r4, #42] +5675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14119 .loc 1 5675 5 is_stmt 1 view .LVU4690 +5675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14120 .loc 1 5675 13 is_stmt 0 view .LVU4691 + 14121 0166 4123 movs r3, #65 + 14122 0168 E35C ldrb r3, [r4, r3] +5675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14123 .loc 1 5675 8 view .LVU4692 + 14124 016a 222B cmp r3, #34 + 14125 016c 18D0 beq .L846 +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14126 .loc 1 5681 7 is_stmt 1 view .LVU4693 + ARM GAS /tmp/cc4IUqI9.s page 459 + + +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14127 .loc 1 5681 11 is_stmt 0 view .LVU4694 + 14128 016e 2268 ldr r2, [r4] +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14129 .loc 1 5681 21 view .LVU4695 + 14130 0170 1168 ldr r1, [r2] +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14131 .loc 1 5681 27 view .LVU4696 + 14132 0172 8023 movs r3, #128 + 14133 0174 DB01 lsls r3, r3, #7 + 14134 0176 0B43 orrs r3, r1 + 14135 0178 1360 str r3, [r2] + 14136 017a 5BE7 b .L815 + 14137 .LVL1066: + 14138 .L832: +5643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14139 .loc 1 5643 17 view .LVU4697 + 14140 017c 0E48 ldr r0, .L847+4 + 14141 017e D9E7 b .L825 + 14142 .LVL1067: + 14143 .L827: +5655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14144 .loc 1 5655 9 is_stmt 1 view .LVU4698 +5655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14145 .loc 1 5655 24 is_stmt 0 view .LVU4699 + 14146 0180 FF23 movs r3, #255 + 14147 0182 2385 strh r3, [r4, #40] + 14148 0184 E0E7 b .L828 + 14149 .L826: +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14150 .loc 1 5664 7 is_stmt 1 view .LVU4700 +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14151 .loc 1 5664 28 is_stmt 0 view .LVU4701 + 14152 0186 628D ldrh r2, [r4, #42] + 14153 0188 92B2 uxth r2, r2 +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14154 .loc 1 5664 22 view .LVU4702 + 14155 018a 2285 strh r2, [r4, #40] +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14156 .loc 1 5667 7 is_stmt 1 view .LVU4703 +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14157 .loc 1 5667 46 is_stmt 0 view .LVU4704 + 14158 018c E16C ldr r1, [r4, #76] +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14159 .loc 1 5667 7 view .LVU4705 + 14160 018e 8023 movs r3, #128 + 14161 0190 D2B2 uxtb r2, r2 + 14162 0192 89B2 uxth r1, r1 + 14163 0194 0090 str r0, [sp] + 14164 0196 9B04 lsls r3, r3, #18 + 14165 0198 2000 movs r0, r4 + 14166 .LVL1068: +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14167 .loc 1 5667 7 view .LVU4706 + 14168 019a FFF7FEFF bl I2C_TransferConfig + 14169 .LVL1069: +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + ARM GAS /tmp/cc4IUqI9.s page 460 + + + 14170 .loc 1 5667 7 view .LVU4707 + 14171 019e DDE7 b .L829 + 14172 .L846: +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14173 .loc 1 5677 7 is_stmt 1 view .LVU4708 +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14174 .loc 1 5677 11 is_stmt 0 view .LVU4709 + 14175 01a0 2268 ldr r2, [r4] +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14176 .loc 1 5677 21 view .LVU4710 + 14177 01a2 1168 ldr r1, [r2] +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14178 .loc 1 5677 27 view .LVU4711 + 14179 01a4 8023 movs r3, #128 + 14180 01a6 1B02 lsls r3, r3, #8 + 14181 01a8 0B43 orrs r3, r1 + 14182 01aa 1360 str r3, [r2] + 14183 01ac 42E7 b .L815 + 14184 .LVL1070: + 14185 .L831: +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14186 .loc 1 5551 3 discriminator 1 view .LVU4712 + 14187 01ae 0220 movs r0, #2 + 14188 .LVL1071: +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14189 .loc 1 5551 3 discriminator 1 view .LVU4713 + 14190 01b0 44E7 b .L813 + 14191 .L848: + 14192 01b2 C046 .align 2 + 14193 .L847: + 14194 01b4 00200080 .word -2147475456 + 14195 01b8 00240080 .word -2147474432 + 14196 .cfi_endproc + 14197 .LFE93: + 14199 .section .text.I2C_Slave_ISR_DMA,"ax",%progbits + 14200 .align 1 + 14201 .syntax unified + 14202 .code 16 + 14203 .thumb_func + 14205 I2C_Slave_ISR_DMA: + 14206 .LVL1072: + 14207 .LFB94: +5711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 14208 .loc 1 5711 1 is_stmt 1 view -0 + 14209 .cfi_startproc + 14210 @ args = 0, pretend = 0, frame = 0 + 14211 @ frame_needed = 0, uses_anonymous_args = 0 +5711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 14212 .loc 1 5711 1 is_stmt 0 view .LVU4715 + 14213 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 14214 .cfi_def_cfa_offset 24 + 14215 .cfi_offset 3, -24 + 14216 .cfi_offset 4, -20 + 14217 .cfi_offset 5, -16 + 14218 .cfi_offset 6, -12 + 14219 .cfi_offset 7, -8 + 14220 .cfi_offset 14, -4 + ARM GAS /tmp/cc4IUqI9.s page 461 + + + 14221 0002 0400 movs r4, r0 +5712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 14222 .loc 1 5712 3 is_stmt 1 view .LVU4716 +5712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 14223 .loc 1 5712 12 is_stmt 0 view .LVU4717 + 14224 0004 C56A ldr r5, [r0, #44] + 14225 .LVL1073: +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 14226 .loc 1 5713 3 is_stmt 1 view .LVU4718 +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14227 .loc 1 5714 3 view .LVU4719 +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14228 .loc 1 5717 3 view .LVU4720 +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14229 .loc 1 5717 3 view .LVU4721 + 14230 0006 4023 movs r3, #64 + 14231 0008 C35C ldrb r3, [r0, r3] + 14232 000a 012B cmp r3, #1 + 14233 000c 00D1 bne .LCB13344 + 14234 000e 88E0 b .L867 @long jump + 14235 .LCB13344: +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14236 .loc 1 5717 3 discriminator 2 view .LVU4722 + 14237 0010 0123 movs r3, #1 + 14238 0012 4020 movs r0, #64 + 14239 .LVL1074: +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14240 .loc 1 5717 3 is_stmt 0 discriminator 2 view .LVU4723 + 14241 0014 2354 strb r3, [r4, r0] +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14242 .loc 1 5717 3 is_stmt 1 discriminator 2 view .LVU4724 +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14243 .loc 1 5720 3 view .LVU4725 +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14244 .loc 1 5720 8 is_stmt 0 view .LVU4726 + 14245 0016 4809 lsrs r0, r1, #5 +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14246 .loc 1 5720 6 view .LVU4727 + 14247 0018 0342 tst r3, r0 + 14248 001a 01D0 beq .L851 +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14249 .loc 1 5720 58 discriminator 1 view .LVU4728 + 14250 001c 9306 lsls r3, r2, #26 + 14251 001e 1AD4 bmi .L875 + 14252 .L851: +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14253 .loc 1 5726 8 is_stmt 1 view .LVU4729 +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14254 .loc 1 5726 11 is_stmt 0 view .LVU4730 + 14255 0020 CB06 lsls r3, r1, #27 + 14256 0022 71D5 bpl .L853 +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14257 .loc 1 5726 60 discriminator 1 view .LVU4731 + 14258 0024 D306 lsls r3, r2, #27 + 14259 0026 6FD5 bpl .L853 +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 14260 .loc 1 5733 5 is_stmt 1 view .LVU4732 + ARM GAS /tmp/cc4IUqI9.s page 462 + + +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 14261 .loc 1 5733 10 is_stmt 0 view .LVU4733 + 14262 0028 930B lsrs r3, r2, #14 + 14263 002a 0120 movs r0, #1 + 14264 002c 0700 movs r7, r0 + 14265 002e 1F40 ands r7, r3 +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 14266 .loc 1 5733 8 view .LVU4734 + 14267 0030 1842 tst r0, r3 + 14268 0032 01D1 bne .L854 +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 14269 .loc 1 5733 68 discriminator 1 view .LVU4735 + 14270 0034 1304 lsls r3, r2, #16 + 14271 0036 63D5 bpl .L855 + 14272 .L854: +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14273 .loc 1 5737 7 is_stmt 1 view .LVU4736 +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14274 .loc 1 5737 15 is_stmt 0 view .LVU4737 + 14275 0038 E36B ldr r3, [r4, #60] +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14276 .loc 1 5737 10 view .LVU4738 + 14277 003a 002B cmp r3, #0 + 14278 003c 0FD0 beq .L868 +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14279 .loc 1 5739 9 is_stmt 1 view .LVU4739 +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14280 .loc 1 5739 13 is_stmt 0 view .LVU4740 + 14281 003e D20B lsrs r2, r2, #15 + 14282 .LVL1075: +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14283 .loc 1 5739 13 view .LVU4741 + 14284 0040 0126 movs r6, #1 + 14285 0042 3000 movs r0, r6 + 14286 0044 1040 ands r0, r2 +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14287 .loc 1 5739 12 view .LVU4742 + 14288 0046 1642 tst r6, r2 + 14289 0048 0AD0 beq .L856 +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14290 .loc 1 5741 11 is_stmt 1 view .LVU4743 +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14291 .loc 1 5741 15 is_stmt 0 view .LVU4744 + 14292 004a 1B68 ldr r3, [r3] + 14293 004c 5B68 ldr r3, [r3, #4] +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14294 .loc 1 5741 14 view .LVU4745 + 14295 004e 002B cmp r3, #0 + 14296 0050 2CD0 beq .L869 +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 14297 .loc 1 5713 12 view .LVU4746 + 14298 0052 0020 movs r0, #0 + 14299 0054 04E0 b .L856 + 14300 .LVL1076: + 14301 .L875: +5724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14302 .loc 1 5724 5 is_stmt 1 view .LVU4747 + ARM GAS /tmp/cc4IUqI9.s page 463 + + + 14303 0056 2000 movs r0, r4 + 14304 0058 FFF7FEFF bl I2C_ITSlaveCplt + 14305 .LVL1077: +5724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14306 .loc 1 5724 5 is_stmt 0 view .LVU4748 + 14307 005c 58E0 b .L852 + 14308 .LVL1078: + 14309 .L868: +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 14310 .loc 1 5713 12 view .LVU4749 + 14311 005e 0020 movs r0, #0 + 14312 .LVL1079: + 14313 .L856: +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14314 .loc 1 5749 7 is_stmt 1 view .LVU4750 +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14315 .loc 1 5749 15 is_stmt 0 view .LVU4751 + 14316 0060 A36B ldr r3, [r4, #56] +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14317 .loc 1 5749 10 view .LVU4752 + 14318 0062 002B cmp r3, #0 + 14319 0064 05D0 beq .L857 +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14320 .loc 1 5751 9 is_stmt 1 view .LVU4753 +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14321 .loc 1 5751 12 is_stmt 0 view .LVU4754 + 14322 0066 002F cmp r7, #0 + 14323 0068 03D0 beq .L857 +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14324 .loc 1 5753 11 is_stmt 1 view .LVU4755 +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14325 .loc 1 5753 15 is_stmt 0 view .LVU4756 + 14326 006a 1B68 ldr r3, [r3] + 14327 006c 5B68 ldr r3, [r3, #4] +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14328 .loc 1 5753 14 view .LVU4757 + 14329 006e 002B cmp r3, #0 + 14330 0070 1ED0 beq .L858 + 14331 .L857: +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14332 .loc 1 5760 7 is_stmt 1 view .LVU4758 +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14333 .loc 1 5760 10 is_stmt 0 view .LVU4759 + 14334 0072 0128 cmp r0, #1 + 14335 0074 1CD0 beq .L858 +5791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14336 .loc 1 5791 9 is_stmt 1 view .LVU4760 + 14337 0076 2368 ldr r3, [r4] + 14338 0078 1022 movs r2, #16 + 14339 007a DA61 str r2, [r3, #28] +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14340 .loc 1 5794 9 view .LVU4761 +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14341 .loc 1 5794 13 is_stmt 0 view .LVU4762 + 14342 007c 636C ldr r3, [r4, #68] +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14343 .loc 1 5794 25 view .LVU4763 + ARM GAS /tmp/cc4IUqI9.s page 464 + + + 14344 007e 0C3A subs r2, r2, #12 + 14345 0080 1343 orrs r3, r2 + 14346 0082 6364 str r3, [r4, #68] +5797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14347 .loc 1 5797 9 is_stmt 1 view .LVU4764 +5797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14348 .loc 1 5797 18 is_stmt 0 view .LVU4765 + 14349 0084 4123 movs r3, #65 + 14350 0086 E35C ldrb r3, [r4, r3] + 14351 0088 DBB2 uxtb r3, r3 + 14352 .LVL1080: +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14353 .loc 1 5799 9 is_stmt 1 view .LVU4766 +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14354 .loc 1 5799 12 is_stmt 0 view .LVU4767 + 14355 008a 002D cmp r5, #0 + 14356 008c 03D0 beq .L862 +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14357 .loc 1 5799 45 discriminator 1 view .LVU4768 + 14358 008e 8022 movs r2, #128 + 14359 0090 5204 lsls r2, r2, #17 + 14360 0092 9542 cmp r5, r2 + 14361 0094 3CD1 bne .L852 + 14362 .L862: +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14363 .loc 1 5801 11 is_stmt 1 view .LVU4769 +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14364 .loc 1 5801 14 is_stmt 0 view .LVU4770 + 14365 0096 212B cmp r3, #33 + 14366 0098 2BD0 beq .L863 +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14367 .loc 1 5801 51 discriminator 1 view .LVU4771 + 14368 009a 292B cmp r3, #41 + 14369 009c 29D0 beq .L863 +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14370 .loc 1 5805 16 is_stmt 1 view .LVU4772 +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14371 .loc 1 5805 19 is_stmt 0 view .LVU4773 + 14372 009e 222B cmp r3, #34 + 14373 00a0 01D0 beq .L866 +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14374 .loc 1 5805 56 discriminator 1 view .LVU4774 + 14375 00a2 2A2B cmp r3, #42 + 14376 00a4 27D1 bne .L865 + 14377 .L866: +5807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14378 .loc 1 5807 13 is_stmt 1 view .LVU4775 +5807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14379 .loc 1 5807 33 is_stmt 0 view .LVU4776 + 14380 00a6 2223 movs r3, #34 + 14381 .LVL1081: +5807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14382 .loc 1 5807 33 view .LVU4777 + 14383 00a8 2363 str r3, [r4, #48] + 14384 00aa 24E0 b .L865 + 14385 .LVL1082: + 14386 .L869: + ARM GAS /tmp/cc4IUqI9.s page 465 + + +5743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14387 .loc 1 5743 26 view .LVU4778 + 14388 00ac 0120 movs r0, #1 + 14389 00ae D7E7 b .L856 + 14390 .LVL1083: + 14391 .L858: +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 14392 .loc 1 5762 9 is_stmt 1 view .LVU4779 +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 14393 .loc 1 5762 18 is_stmt 0 view .LVU4780 + 14394 00b0 4123 movs r3, #65 + 14395 00b2 E35C ldrb r3, [r4, r3] +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 14396 .loc 1 5762 12 view .LVU4781 + 14397 00b4 282B cmp r3, #40 + 14398 00b6 07D0 beq .L876 + 14399 .L860: +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14400 .loc 1 5769 14 is_stmt 1 view .LVU4782 +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14401 .loc 1 5769 23 is_stmt 0 view .LVU4783 + 14402 00b8 4123 movs r3, #65 + 14403 00ba E35C ldrb r3, [r4, r3] +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14404 .loc 1 5769 17 view .LVU4784 + 14405 00bc 292B cmp r3, #41 + 14406 00be 0BD0 beq .L877 + 14407 .L861: +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14408 .loc 1 5784 11 is_stmt 1 view .LVU4785 + 14409 00c0 2368 ldr r3, [r4] + 14410 00c2 1022 movs r2, #16 + 14411 00c4 DA61 str r2, [r3, #28] + 14412 00c6 23E0 b .L852 + 14413 .L876: +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 14414 .loc 1 5762 51 is_stmt 0 discriminator 1 view .LVU4786 + 14415 00c8 8023 movs r3, #128 + 14416 00ca 9B04 lsls r3, r3, #18 + 14417 00cc 9D42 cmp r5, r3 + 14418 00ce F3D1 bne .L860 +5767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14419 .loc 1 5767 11 is_stmt 1 view .LVU4787 + 14420 00d0 2000 movs r0, r4 + 14421 00d2 FFF7FEFF bl I2C_ITListenCplt + 14422 .LVL1084: +5767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14423 .loc 1 5767 11 is_stmt 0 view .LVU4788 + 14424 00d6 1BE0 b .L852 + 14425 .LVL1085: + 14426 .L877: +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14427 .loc 1 5769 64 discriminator 1 view .LVU4789 + 14428 00d8 134B ldr r3, .L879 + 14429 00da 9D42 cmp r5, r3 + 14430 00dc F0D0 beq .L861 +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 466 + + + 14431 .loc 1 5772 11 is_stmt 1 view .LVU4790 + 14432 00de 2368 ldr r3, [r4] + 14433 00e0 1022 movs r2, #16 + 14434 00e2 DA61 str r2, [r3, #28] +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14435 .loc 1 5775 11 view .LVU4791 + 14436 00e4 2000 movs r0, r4 + 14437 00e6 FFF7FEFF bl I2C_Flush_TXDR + 14438 .LVL1086: +5779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14439 .loc 1 5779 11 view .LVU4792 + 14440 00ea 2000 movs r0, r4 + 14441 00ec FFF7FEFF bl I2C_ITSlaveSeqCplt + 14442 .LVL1087: + 14443 00f0 0EE0 b .L852 + 14444 .LVL1088: + 14445 .L863: +5803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14446 .loc 1 5803 13 view .LVU4793 +5803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14447 .loc 1 5803 33 is_stmt 0 view .LVU4794 + 14448 00f2 2123 movs r3, #33 + 14449 .LVL1089: +5803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14450 .loc 1 5803 33 view .LVU4795 + 14451 00f4 2363 str r3, [r4, #48] + 14452 .L865: +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14453 .loc 1 5815 11 is_stmt 1 view .LVU4796 +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14454 .loc 1 5815 33 is_stmt 0 view .LVU4797 + 14455 00f6 616C ldr r1, [r4, #68] + 14456 .LVL1090: +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14457 .loc 1 5815 11 view .LVU4798 + 14458 00f8 2000 movs r0, r4 + 14459 .LVL1091: +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14460 .loc 1 5815 11 view .LVU4799 + 14461 00fa FFF7FEFF bl I2C_ITError + 14462 .LVL1092: + 14463 00fe 07E0 b .L852 + 14464 .LVL1093: + 14465 .L855: +5822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14466 .loc 1 5822 7 is_stmt 1 view .LVU4800 + 14467 0100 2368 ldr r3, [r4] + 14468 0102 1022 movs r2, #16 + 14469 .LVL1094: +5822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14470 .loc 1 5822 7 is_stmt 0 view .LVU4801 + 14471 0104 DA61 str r2, [r3, #28] + 14472 0106 03E0 b .L852 + 14473 .LVL1095: + 14474 .L853: +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 14475 .loc 1 5825 8 is_stmt 1 view .LVU4802 + ARM GAS /tmp/cc4IUqI9.s page 467 + + +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 14476 .loc 1 5825 11 is_stmt 0 view .LVU4803 + 14477 0108 0B07 lsls r3, r1, #28 + 14478 010a 01D5 bpl .L852 +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 14479 .loc 1 5825 62 discriminator 1 view .LVU4804 + 14480 010c 1207 lsls r2, r2, #28 + 14481 010e 04D4 bmi .L878 + 14482 .LVL1096: + 14483 .L852: +5833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14484 .loc 1 5833 3 is_stmt 1 view .LVU4805 +5836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14485 .loc 1 5836 3 view .LVU4806 +5836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14486 .loc 1 5836 3 view .LVU4807 + 14487 0110 4023 movs r3, #64 + 14488 0112 0022 movs r2, #0 + 14489 0114 E254 strb r2, [r4, r3] +5836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14490 .loc 1 5836 3 view .LVU4808 +5838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14491 .loc 1 5838 3 view .LVU4809 +5838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14492 .loc 1 5838 10 is_stmt 0 view .LVU4810 + 14493 0116 0020 movs r0, #0 + 14494 .L850: +5839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14495 .loc 1 5839 1 view .LVU4811 + 14496 @ sp needed + 14497 .LVL1097: + 14498 .LVL1098: +5839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14499 .loc 1 5839 1 view .LVU4812 + 14500 0118 F8BD pop {r3, r4, r5, r6, r7, pc} + 14501 .LVL1099: + 14502 .L878: +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14503 .loc 1 5828 5 is_stmt 1 view .LVU4813 + 14504 011a 2000 movs r0, r4 + 14505 011c FFF7FEFF bl I2C_ITAddrCplt + 14506 .LVL1100: +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14507 .loc 1 5828 5 is_stmt 0 view .LVU4814 + 14508 0120 F6E7 b .L852 + 14509 .LVL1101: + 14510 .L867: +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14511 .loc 1 5717 3 discriminator 1 view .LVU4815 + 14512 0122 0220 movs r0, #2 + 14513 .LVL1102: +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14514 .loc 1 5717 3 discriminator 1 view .LVU4816 + 14515 0124 F8E7 b .L850 + 14516 .L880: + 14517 0126 C046 .align 2 + 14518 .L879: + ARM GAS /tmp/cc4IUqI9.s page 468 + + + 14519 0128 0000FFFF .word -65536 + 14520 .cfi_endproc + 14521 .LFE94: + 14523 .section .text.I2C_Master_ISR_DMA,"ax",%progbits + 14524 .align 1 + 14525 .syntax unified + 14526 .code 16 + 14527 .thumb_func + 14529 I2C_Master_ISR_DMA: + 14530 .LVL1103: + 14531 .LFB92: +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 14532 .loc 1 5399 1 is_stmt 1 view -0 + 14533 .cfi_startproc + 14534 @ args = 0, pretend = 0, frame = 0 + 14535 @ frame_needed = 0, uses_anonymous_args = 0 +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 14536 .loc 1 5399 1 is_stmt 0 view .LVU4818 + 14537 0000 10B5 push {r4, lr} + 14538 .cfi_def_cfa_offset 8 + 14539 .cfi_offset 4, -8 + 14540 .cfi_offset 14, -4 + 14541 0002 82B0 sub sp, sp, #8 + 14542 .cfi_def_cfa_offset 16 + 14543 0004 0400 movs r4, r0 +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 14544 .loc 1 5400 3 is_stmt 1 view .LVU4819 +5401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14545 .loc 1 5401 3 view .LVU4820 +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14546 .loc 1 5404 3 view .LVU4821 +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14547 .loc 1 5404 3 view .LVU4822 + 14548 0006 4023 movs r3, #64 + 14549 0008 C35C ldrb r3, [r0, r3] + 14550 000a 012B cmp r3, #1 + 14551 000c 00D1 bne .LCB13678 + 14552 000e 9BE0 b .L895 @long jump + 14553 .LCB13678: +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14554 .loc 1 5404 3 discriminator 2 view .LVU4823 + 14555 0010 0123 movs r3, #1 + 14556 0012 4020 movs r0, #64 + 14557 .LVL1104: +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14558 .loc 1 5404 3 is_stmt 0 discriminator 2 view .LVU4824 + 14559 0014 2354 strb r3, [r4, r0] +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14560 .loc 1 5404 3 is_stmt 1 discriminator 2 view .LVU4825 +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14561 .loc 1 5406 3 view .LVU4826 +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14562 .loc 1 5406 8 is_stmt 0 view .LVU4827 + 14563 0016 0809 lsrs r0, r1, #4 +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14564 .loc 1 5406 6 view .LVU4828 + 14565 0018 0342 tst r3, r0 + ARM GAS /tmp/cc4IUqI9.s page 469 + + + 14566 001a 01D0 beq .L883 +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14567 .loc 1 5406 55 discriminator 1 view .LVU4829 + 14568 001c D306 lsls r3, r2, #27 + 14569 001e 1ED4 bmi .L905 + 14570 .L883: +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14571 .loc 1 5423 8 is_stmt 1 view .LVU4830 +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14572 .loc 1 5423 11 is_stmt 0 view .LVU4831 + 14573 0020 0B06 lsls r3, r1, #24 + 14574 0022 00D4 bmi .LCB13701 + 14575 0024 69E0 b .L885 @long jump + 14576 .LCB13701: +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14577 .loc 1 5423 61 discriminator 1 view .LVU4832 + 14578 0026 5306 lsls r3, r2, #25 + 14579 0028 00D4 bmi .LCB13706 + 14580 002a 66E0 b .L885 @long jump + 14581 .LCB13706: +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14582 .loc 1 5427 5 is_stmt 1 view .LVU4833 + 14583 002c 2268 ldr r2, [r4] + 14584 .LVL1105: +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14585 .loc 1 5427 5 is_stmt 0 view .LVU4834 + 14586 002e 1368 ldr r3, [r2] + 14587 0030 4021 movs r1, #64 + 14588 .LVL1106: +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14589 .loc 1 5427 5 view .LVU4835 + 14590 0032 8B43 bics r3, r1 + 14591 0034 1360 str r3, [r2] +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14592 .loc 1 5429 5 is_stmt 1 view .LVU4836 +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14593 .loc 1 5429 13 is_stmt 0 view .LVU4837 + 14594 0036 638D ldrh r3, [r4, #42] + 14595 0038 9BB2 uxth r3, r3 +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14596 .loc 1 5429 8 view .LVU4838 + 14597 003a 002B cmp r3, #0 + 14598 003c 50D0 beq .L886 +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14599 .loc 1 5432 7 is_stmt 1 view .LVU4839 +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14600 .loc 1 5432 35 is_stmt 0 view .LVU4840 + 14601 003e 2268 ldr r2, [r4] +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14602 .loc 1 5432 45 view .LVU4841 + 14603 0040 5168 ldr r1, [r2, #4] +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14604 .loc 1 5432 18 view .LVU4842 + 14605 0042 8905 lsls r1, r1, #22 + 14606 0044 890D lsrs r1, r1, #22 + 14607 .LVL1107: +5435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 470 + + + 14608 .loc 1 5435 7 is_stmt 1 view .LVU4843 +5435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14609 .loc 1 5435 15 is_stmt 0 view .LVU4844 + 14610 0046 638D ldrh r3, [r4, #42] + 14611 0048 9BB2 uxth r3, r3 +5435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14612 .loc 1 5435 10 view .LVU4845 + 14613 004a FF2B cmp r3, #255 + 14614 004c 20D9 bls .L887 +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14615 .loc 1 5438 9 is_stmt 1 view .LVU4846 +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14616 .loc 1 5438 13 is_stmt 0 view .LVU4847 + 14617 004e 9369 ldr r3, [r2, #24] +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14618 .loc 1 5438 12 view .LVU4848 + 14619 0050 DB03 lsls r3, r3, #15 + 14620 0052 18D5 bpl .L888 +5440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14621 .loc 1 5440 11 is_stmt 1 view .LVU4849 +5440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14622 .loc 1 5440 26 is_stmt 0 view .LVU4850 + 14623 0054 0123 movs r3, #1 + 14624 0056 2385 strh r3, [r4, #40] +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14625 .loc 1 5446 18 view .LVU4851 + 14626 0058 8023 movs r3, #128 + 14627 005a 5B04 lsls r3, r3, #17 + 14628 005c 1FE0 b .L889 + 14629 .LVL1108: + 14630 .L905: +5410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14631 .loc 1 5410 5 is_stmt 1 view .LVU4852 + 14632 005e 2368 ldr r3, [r4] + 14633 0060 1022 movs r2, #16 + 14634 .LVL1109: +5410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14635 .loc 1 5410 5 is_stmt 0 view .LVU4853 + 14636 0062 DA61 str r2, [r3, #28] +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14637 .loc 1 5413 5 is_stmt 1 view .LVU4854 +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14638 .loc 1 5413 9 is_stmt 0 view .LVU4855 + 14639 0064 636C ldr r3, [r4, #68] +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14640 .loc 1 5413 21 view .LVU4856 + 14641 0066 0C3A subs r2, r2, #12 + 14642 0068 1343 orrs r3, r2 + 14643 006a 6364 str r3, [r4, #68] +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14644 .loc 1 5418 5 is_stmt 1 view .LVU4857 + 14645 006c 2021 movs r1, #32 + 14646 .LVL1110: +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14647 .loc 1 5418 5 is_stmt 0 view .LVU4858 + 14648 006e 2000 movs r0, r4 + 14649 0070 FFF7FEFF bl I2C_Enable_IRQ + ARM GAS /tmp/cc4IUqI9.s page 471 + + + 14650 .LVL1111: +5421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14651 .loc 1 5421 5 is_stmt 1 view .LVU4859 + 14652 0074 2000 movs r0, r4 + 14653 0076 FFF7FEFF bl I2C_Flush_TXDR + 14654 .LVL1112: + 14655 .L884: +5529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14656 .loc 1 5529 3 view .LVU4860 +5532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14657 .loc 1 5532 3 view .LVU4861 +5532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14658 .loc 1 5532 3 view .LVU4862 + 14659 007a 4023 movs r3, #64 + 14660 007c 0022 movs r2, #0 + 14661 007e E254 strb r2, [r4, r3] +5532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14662 .loc 1 5532 3 view .LVU4863 +5534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14663 .loc 1 5534 3 view .LVU4864 +5534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14664 .loc 1 5534 10 is_stmt 0 view .LVU4865 + 14665 0080 0020 movs r0, #0 + 14666 .L882: +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14667 .loc 1 5535 1 view .LVU4866 + 14668 0082 02B0 add sp, sp, #8 + 14669 @ sp needed + 14670 .LVL1113: +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14671 .loc 1 5535 1 view .LVU4867 + 14672 0084 10BD pop {r4, pc} + 14673 .LVL1114: + 14674 .L888: +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14675 .loc 1 5444 11 is_stmt 1 view .LVU4868 +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14676 .loc 1 5444 26 is_stmt 0 view .LVU4869 + 14677 0086 FF23 movs r3, #255 + 14678 0088 2385 strh r3, [r4, #40] +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14679 .loc 1 5446 18 view .LVU4870 + 14680 008a 8023 movs r3, #128 + 14681 008c 5B04 lsls r3, r3, #17 + 14682 008e 06E0 b .L889 + 14683 .L887: +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 14684 .loc 1 5450 9 is_stmt 1 view .LVU4871 +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 14685 .loc 1 5450 30 is_stmt 0 view .LVU4872 + 14686 0090 638D ldrh r3, [r4, #42] +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 14687 .loc 1 5450 24 view .LVU4873 + 14688 0092 2385 strh r3, [r4, #40] +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14689 .loc 1 5451 9 is_stmt 1 view .LVU4874 +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 472 + + + 14690 .loc 1 5451 17 is_stmt 0 view .LVU4875 + 14691 0094 E26A ldr r2, [r4, #44] +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14692 .loc 1 5451 12 view .LVU4876 + 14693 0096 2D4B ldr r3, .L907 + 14694 0098 9A42 cmp r2, r3 + 14695 009a 17D0 beq .L896 +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14696 .loc 1 5453 11 is_stmt 1 view .LVU4877 +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14697 .loc 1 5453 20 is_stmt 0 view .LVU4878 + 14698 009c E36A ldr r3, [r4, #44] + 14699 .LVL1115: + 14700 .L889: +5462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14701 .loc 1 5462 7 is_stmt 1 view .LVU4879 +5462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14702 .loc 1 5462 57 is_stmt 0 view .LVU4880 + 14703 009e 228D ldrh r2, [r4, #40] +5462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14704 .loc 1 5462 7 view .LVU4881 + 14705 00a0 D2B2 uxtb r2, r2 + 14706 00a2 0020 movs r0, #0 + 14707 00a4 0090 str r0, [sp] + 14708 00a6 2000 movs r0, r4 + 14709 00a8 FFF7FEFF bl I2C_TransferConfig + 14710 .LVL1116: +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14711 .loc 1 5465 7 is_stmt 1 view .LVU4882 +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14712 .loc 1 5465 11 is_stmt 0 view .LVU4883 + 14713 00ac 638D ldrh r3, [r4, #42] +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14714 .loc 1 5465 30 view .LVU4884 + 14715 00ae 228D ldrh r2, [r4, #40] +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14716 .loc 1 5465 23 view .LVU4885 + 14717 00b0 9B1A subs r3, r3, r2 + 14718 00b2 9BB2 uxth r3, r3 + 14719 00b4 6385 strh r3, [r4, #42] +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14720 .loc 1 5468 7 is_stmt 1 view .LVU4886 +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14721 .loc 1 5468 15 is_stmt 0 view .LVU4887 + 14722 00b6 4123 movs r3, #65 + 14723 00b8 E35C ldrb r3, [r4, r3] +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14724 .loc 1 5468 10 view .LVU4888 + 14725 00ba 222B cmp r3, #34 + 14726 00bc 09D0 beq .L906 +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14727 .loc 1 5474 9 is_stmt 1 view .LVU4889 +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14728 .loc 1 5474 13 is_stmt 0 view .LVU4890 + 14729 00be 2268 ldr r2, [r4] +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14730 .loc 1 5474 23 view .LVU4891 + ARM GAS /tmp/cc4IUqI9.s page 473 + + + 14731 00c0 1168 ldr r1, [r2] +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14732 .loc 1 5474 29 view .LVU4892 + 14733 00c2 8023 movs r3, #128 + 14734 00c4 DB01 lsls r3, r3, #7 + 14735 00c6 0B43 orrs r3, r1 + 14736 00c8 1360 str r3, [r2] + 14737 00ca D6E7 b .L884 + 14738 .LVL1117: + 14739 .L896: +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14740 .loc 1 5457 20 view .LVU4893 + 14741 00cc 8023 movs r3, #128 + 14742 00ce 9B04 lsls r3, r3, #18 + 14743 00d0 E5E7 b .L889 + 14744 .LVL1118: + 14745 .L906: +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14746 .loc 1 5470 9 is_stmt 1 view .LVU4894 +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14747 .loc 1 5470 13 is_stmt 0 view .LVU4895 + 14748 00d2 2268 ldr r2, [r4] +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14749 .loc 1 5470 23 view .LVU4896 + 14750 00d4 1168 ldr r1, [r2] +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14751 .loc 1 5470 29 view .LVU4897 + 14752 00d6 8023 movs r3, #128 + 14753 00d8 1B02 lsls r3, r3, #8 + 14754 00da 0B43 orrs r3, r1 + 14755 00dc 1360 str r3, [r2] + 14756 00de CCE7 b .L884 + 14757 .LVL1119: + 14758 .L886: +5480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14759 .loc 1 5480 7 is_stmt 1 view .LVU4898 +5480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14760 .loc 1 5480 11 is_stmt 0 view .LVU4899 + 14761 00e0 2368 ldr r3, [r4] + 14762 00e2 5B68 ldr r3, [r3, #4] +5480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14763 .loc 1 5480 10 view .LVU4900 + 14764 00e4 9B01 lsls r3, r3, #6 + 14765 00e6 03D4 bmi .L891 +5483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14766 .loc 1 5483 9 is_stmt 1 view .LVU4901 + 14767 00e8 2000 movs r0, r4 + 14768 00ea FFF7FEFF bl I2C_ITMasterSeqCplt + 14769 .LVL1120: + 14770 00ee C4E7 b .L884 + 14771 .L891: +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14772 .loc 1 5489 9 view .LVU4902 + 14773 00f0 4021 movs r1, #64 + 14774 00f2 2000 movs r0, r4 + 14775 00f4 FFF7FEFF bl I2C_ITError + 14776 .LVL1121: + ARM GAS /tmp/cc4IUqI9.s page 474 + + + 14777 00f8 BFE7 b .L884 + 14778 .LVL1122: + 14779 .L885: +5493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14780 .loc 1 5493 8 view .LVU4903 +5493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14781 .loc 1 5493 11 is_stmt 0 view .LVU4904 + 14782 00fa 4B06 lsls r3, r1, #25 + 14783 00fc 1CD5 bpl .L892 +5493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14784 .loc 1 5493 60 discriminator 1 view .LVU4905 + 14785 00fe 5306 lsls r3, r2, #25 + 14786 0100 1AD5 bpl .L892 +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14787 .loc 1 5496 5 is_stmt 1 view .LVU4906 +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14788 .loc 1 5496 13 is_stmt 0 view .LVU4907 + 14789 0102 638D ldrh r3, [r4, #42] + 14790 0104 9BB2 uxth r3, r3 +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14791 .loc 1 5496 8 view .LVU4908 + 14792 0106 002B cmp r3, #0 + 14793 0108 11D1 bne .L893 +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14794 .loc 1 5498 7 is_stmt 1 view .LVU4909 +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14795 .loc 1 5498 11 is_stmt 0 view .LVU4910 + 14796 010a 2268 ldr r2, [r4] + 14797 .LVL1123: +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14798 .loc 1 5498 11 view .LVU4911 + 14799 010c 5368 ldr r3, [r2, #4] +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14800 .loc 1 5498 10 view .LVU4912 + 14801 010e 9B01 lsls r3, r3, #6 + 14802 0110 B3D4 bmi .L884 +5501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14803 .loc 1 5501 9 is_stmt 1 view .LVU4913 +5501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14804 .loc 1 5501 17 is_stmt 0 view .LVU4914 + 14805 0112 E16A ldr r1, [r4, #44] + 14806 .LVL1124: +5501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14807 .loc 1 5501 12 view .LVU4915 + 14808 0114 0D4B ldr r3, .L907 + 14809 0116 9942 cmp r1, r3 + 14810 0118 05D1 bne .L894 +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14811 .loc 1 5504 11 is_stmt 1 view .LVU4916 +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14812 .loc 1 5504 25 is_stmt 0 view .LVU4917 + 14813 011a 5168 ldr r1, [r2, #4] +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14814 .loc 1 5504 31 view .LVU4918 + 14815 011c 8023 movs r3, #128 + 14816 011e DB01 lsls r3, r3, #7 + 14817 0120 0B43 orrs r3, r1 + ARM GAS /tmp/cc4IUqI9.s page 475 + + + 14818 0122 5360 str r3, [r2, #4] + 14819 0124 A9E7 b .L884 + 14820 .L894: +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14821 .loc 1 5509 11 is_stmt 1 view .LVU4919 + 14822 0126 2000 movs r0, r4 + 14823 0128 FFF7FEFF bl I2C_ITMasterSeqCplt + 14824 .LVL1125: + 14825 012c A5E7 b .L884 + 14826 .LVL1126: + 14827 .L893: +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14828 .loc 1 5517 7 view .LVU4920 + 14829 012e 4021 movs r1, #64 + 14830 .LVL1127: +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14831 .loc 1 5517 7 is_stmt 0 view .LVU4921 + 14832 0130 2000 movs r0, r4 + 14833 0132 FFF7FEFF bl I2C_ITError + 14834 .LVL1128: +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14835 .loc 1 5517 7 view .LVU4922 + 14836 0136 A0E7 b .L884 + 14837 .LVL1129: + 14838 .L892: +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14839 .loc 1 5520 8 is_stmt 1 view .LVU4923 +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14840 .loc 1 5520 11 is_stmt 0 view .LVU4924 + 14841 0138 8B06 lsls r3, r1, #26 + 14842 013a 9ED5 bpl .L884 +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14843 .loc 1 5520 63 discriminator 1 view .LVU4925 + 14844 013c 9206 lsls r2, r2, #26 + 14845 013e 9CD5 bpl .L884 + 14846 .LVL1130: +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14847 .loc 1 5524 5 is_stmt 1 view .LVU4926 + 14848 0140 2000 movs r0, r4 + 14849 0142 FFF7FEFF bl I2C_ITMasterCplt + 14850 .LVL1131: +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14851 .loc 1 5524 5 is_stmt 0 view .LVU4927 + 14852 0146 98E7 b .L884 + 14853 .LVL1132: + 14854 .L895: +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14855 .loc 1 5404 3 discriminator 1 view .LVU4928 + 14856 0148 0220 movs r0, #2 + 14857 .LVL1133: +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14858 .loc 1 5404 3 discriminator 1 view .LVU4929 + 14859 014a 9AE7 b .L882 + 14860 .L908: + 14861 .align 2 + 14862 .L907: + 14863 014c 0000FFFF .word -65536 + ARM GAS /tmp/cc4IUqI9.s page 476 + + + 14864 .cfi_endproc + 14865 .LFE92: + 14867 .section .text.I2C_DMAError,"ax",%progbits + 14868 .align 1 + 14869 .syntax unified + 14870 .code 16 + 14871 .thumb_func + 14873 I2C_DMAError: + 14874 .LVL1134: + 14875 .LFB110: +6948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14876 .loc 1 6948 1 is_stmt 1 view -0 + 14877 .cfi_startproc + 14878 @ args = 0, pretend = 0, frame = 0 + 14879 @ frame_needed = 0, uses_anonymous_args = 0 +6948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14880 .loc 1 6948 1 is_stmt 0 view .LVU4931 + 14881 0000 10B5 push {r4, lr} + 14882 .cfi_def_cfa_offset 8 + 14883 .cfi_offset 4, -8 + 14884 .cfi_offset 14, -4 +6950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14885 .loc 1 6950 3 is_stmt 1 view .LVU4932 +6950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14886 .loc 1 6950 22 is_stmt 0 view .LVU4933 + 14887 0002 406A ldr r0, [r0, #36] + 14888 .LVL1135: +6953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14889 .loc 1 6953 3 is_stmt 1 view .LVU4934 +6953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14890 .loc 1 6953 7 is_stmt 0 view .LVU4935 + 14891 0004 0268 ldr r2, [r0] +6953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14892 .loc 1 6953 17 view .LVU4936 + 14893 0006 5168 ldr r1, [r2, #4] +6953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14894 .loc 1 6953 23 view .LVU4937 + 14895 0008 8023 movs r3, #128 + 14896 000a 1B02 lsls r3, r3, #8 + 14897 000c 0B43 orrs r3, r1 + 14898 000e 5360 str r3, [r2, #4] +6956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14899 .loc 1 6956 3 is_stmt 1 view .LVU4938 + 14900 0010 1021 movs r1, #16 + 14901 0012 FFF7FEFF bl I2C_ITError + 14902 .LVL1136: +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14903 .loc 1 6957 1 is_stmt 0 view .LVU4939 + 14904 @ sp needed + 14905 0016 10BD pop {r4, pc} + 14906 .cfi_endproc + 14907 .LFE110: + 14909 .section .text.I2C_DMAMasterTransmitCplt,"ax",%progbits + 14910 .align 1 + 14911 .syntax unified + 14912 .code 16 + 14913 .thumb_func + ARM GAS /tmp/cc4IUqI9.s page 477 + + + 14915 I2C_DMAMasterTransmitCplt: + 14916 .LVL1137: + 14917 .LFB106: +6780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14918 .loc 1 6780 1 is_stmt 1 view -0 + 14919 .cfi_startproc + 14920 @ args = 0, pretend = 0, frame = 0 + 14921 @ frame_needed = 0, uses_anonymous_args = 0 +6780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14922 .loc 1 6780 1 is_stmt 0 view .LVU4941 + 14923 0000 10B5 push {r4, lr} + 14924 .cfi_def_cfa_offset 8 + 14925 .cfi_offset 4, -8 + 14926 .cfi_offset 14, -4 +6782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14927 .loc 1 6782 3 is_stmt 1 view .LVU4942 +6782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14928 .loc 1 6782 22 is_stmt 0 view .LVU4943 + 14929 0002 446A ldr r4, [r0, #36] + 14930 .LVL1138: +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14931 .loc 1 6785 3 is_stmt 1 view .LVU4944 +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14932 .loc 1 6785 7 is_stmt 0 view .LVU4945 + 14933 0004 2268 ldr r2, [r4] +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14934 .loc 1 6785 17 view .LVU4946 + 14935 0006 1368 ldr r3, [r2] +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14936 .loc 1 6785 23 view .LVU4947 + 14937 0008 1549 ldr r1, .L917 + 14938 000a 0B40 ands r3, r1 + 14939 000c 1360 str r3, [r2] +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14940 .loc 1 6788 3 is_stmt 1 view .LVU4948 +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14941 .loc 1 6788 11 is_stmt 0 view .LVU4949 + 14942 000e 638D ldrh r3, [r4, #42] + 14943 0010 9BB2 uxth r3, r3 +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14944 .loc 1 6788 6 view .LVU4950 + 14945 0012 002B cmp r3, #0 + 14946 0014 16D0 beq .L916 +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14947 .loc 1 6797 5 is_stmt 1 view .LVU4951 +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14948 .loc 1 6797 9 is_stmt 0 view .LVU4952 + 14949 0016 616A ldr r1, [r4, #36] +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14950 .loc 1 6797 27 view .LVU4953 + 14951 0018 238D ldrh r3, [r4, #40] +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14952 .loc 1 6797 20 view .LVU4954 + 14953 001a C918 adds r1, r1, r3 + 14954 001c 6162 str r1, [r4, #36] +6800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14955 .loc 1 6800 5 is_stmt 1 view .LVU4955 + ARM GAS /tmp/cc4IUqI9.s page 478 + + +6800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14956 .loc 1 6800 13 is_stmt 0 view .LVU4956 + 14957 001e 638D ldrh r3, [r4, #42] + 14958 0020 9BB2 uxth r3, r3 +6800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14959 .loc 1 6800 8 view .LVU4957 + 14960 0022 FF2B cmp r3, #255 + 14961 0024 13D9 bls .L913 +6802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14962 .loc 1 6802 7 is_stmt 1 view .LVU4958 +6802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14963 .loc 1 6802 22 is_stmt 0 view .LVU4959 + 14964 0026 FF23 movs r3, #255 + 14965 0028 2385 strh r3, [r4, #40] + 14966 .L914: +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14967 .loc 1 6810 5 is_stmt 1 view .LVU4960 +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14968 .loc 1 6810 81 is_stmt 0 view .LVU4961 + 14969 002a 2268 ldr r2, [r4] +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14970 .loc 1 6810 76 view .LVU4962 + 14971 002c 2832 adds r2, r2, #40 +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14972 .loc 1 6811 30 view .LVU4963 + 14973 002e 238D ldrh r3, [r4, #40] +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14974 .loc 1 6810 9 view .LVU4964 + 14975 0030 A06B ldr r0, [r4, #56] + 14976 .LVL1139: +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14977 .loc 1 6810 9 view .LVU4965 + 14978 0032 FFF7FEFF bl HAL_DMA_Start_IT + 14979 .LVL1140: +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14980 .loc 1 6810 8 discriminator 1 view .LVU4966 + 14981 0036 0028 cmp r0, #0 + 14982 0038 0CD0 beq .L915 +6814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14983 .loc 1 6814 7 is_stmt 1 view .LVU4967 + 14984 003a 1021 movs r1, #16 + 14985 003c 2000 movs r0, r4 + 14986 003e FFF7FEFF bl I2C_ITError + 14987 .LVL1141: + 14988 .L910: +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14989 .loc 1 6822 1 is_stmt 0 view .LVU4968 + 14990 @ sp needed + 14991 .LVL1142: +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14992 .loc 1 6822 1 view .LVU4969 + 14993 0042 10BD pop {r4, pc} + 14994 .LVL1143: + 14995 .L916: +6791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14996 .loc 1 6791 5 is_stmt 1 view .LVU4970 + 14997 0044 2021 movs r1, #32 + ARM GAS /tmp/cc4IUqI9.s page 479 + + + 14998 0046 2000 movs r0, r4 + 14999 .LVL1144: +6791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15000 .loc 1 6791 5 is_stmt 0 view .LVU4971 + 15001 0048 FFF7FEFF bl I2C_Enable_IRQ + 15002 .LVL1145: + 15003 004c F9E7 b .L910 + 15004 .LVL1146: + 15005 .L913: +6806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15006 .loc 1 6806 7 is_stmt 1 view .LVU4972 +6806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15007 .loc 1 6806 28 is_stmt 0 view .LVU4973 + 15008 004e 638D ldrh r3, [r4, #42] +6806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15009 .loc 1 6806 22 view .LVU4974 + 15010 0050 2385 strh r3, [r4, #40] + 15011 0052 EAE7 b .L914 + 15012 .LVL1147: + 15013 .L915: +6819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15014 .loc 1 6819 7 is_stmt 1 view .LVU4975 + 15015 0054 4021 movs r1, #64 + 15016 0056 2000 movs r0, r4 + 15017 0058 FFF7FEFF bl I2C_Enable_IRQ + 15018 .LVL1148: +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15019 .loc 1 6822 1 is_stmt 0 view .LVU4976 + 15020 005c F1E7 b .L910 + 15021 .L918: + 15022 005e C046 .align 2 + 15023 .L917: + 15024 0060 FFBFFFFF .word -16385 + 15025 .cfi_endproc + 15026 .LFE106: + 15028 .section .text.I2C_DMAMasterReceiveCplt,"ax",%progbits + 15029 .align 1 + 15030 .syntax unified + 15031 .code 16 + 15032 .thumb_func + 15034 I2C_DMAMasterReceiveCplt: + 15035 .LVL1149: + 15036 .LFB108: +6860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 15037 .loc 1 6860 1 is_stmt 1 view -0 + 15038 .cfi_startproc + 15039 @ args = 0, pretend = 0, frame = 0 + 15040 @ frame_needed = 0, uses_anonymous_args = 0 +6860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 15041 .loc 1 6860 1 is_stmt 0 view .LVU4978 + 15042 0000 10B5 push {r4, lr} + 15043 .cfi_def_cfa_offset 8 + 15044 .cfi_offset 4, -8 + 15045 .cfi_offset 14, -4 +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15046 .loc 1 6862 3 is_stmt 1 view .LVU4979 +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/cc4IUqI9.s page 480 + + + 15047 .loc 1 6862 22 is_stmt 0 view .LVU4980 + 15048 0002 446A ldr r4, [r0, #36] + 15049 .LVL1150: +6865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15050 .loc 1 6865 3 is_stmt 1 view .LVU4981 +6865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15051 .loc 1 6865 7 is_stmt 0 view .LVU4982 + 15052 0004 2268 ldr r2, [r4] +6865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15053 .loc 1 6865 17 view .LVU4983 + 15054 0006 1368 ldr r3, [r2] +6865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15055 .loc 1 6865 23 view .LVU4984 + 15056 0008 1849 ldr r1, .L927 + 15057 000a 0B40 ands r3, r1 + 15058 000c 1360 str r3, [r2] +6868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15059 .loc 1 6868 3 is_stmt 1 view .LVU4985 +6868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15060 .loc 1 6868 11 is_stmt 0 view .LVU4986 + 15061 000e 638D ldrh r3, [r4, #42] + 15062 0010 9BB2 uxth r3, r3 +6868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15063 .loc 1 6868 6 view .LVU4987 + 15064 0012 002B cmp r3, #0 + 15065 0014 0ED0 beq .L926 +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15066 .loc 1 6877 5 is_stmt 1 view .LVU4988 +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15067 .loc 1 6877 9 is_stmt 0 view .LVU4989 + 15068 0016 626A ldr r2, [r4, #36] +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15069 .loc 1 6877 27 view .LVU4990 + 15070 0018 238D ldrh r3, [r4, #40] +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15071 .loc 1 6877 20 view .LVU4991 + 15072 001a D218 adds r2, r2, r3 + 15073 001c 6262 str r2, [r4, #36] +6880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15074 .loc 1 6880 5 is_stmt 1 view .LVU4992 +6880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15075 .loc 1 6880 13 is_stmt 0 view .LVU4993 + 15076 001e 638D ldrh r3, [r4, #42] + 15077 0020 9BB2 uxth r3, r3 +6880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15078 .loc 1 6880 8 view .LVU4994 + 15079 0022 FF2B cmp r3, #255 + 15080 0024 0ED9 bls .L922 +6883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15081 .loc 1 6883 7 is_stmt 1 view .LVU4995 +6883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15082 .loc 1 6883 11 is_stmt 0 view .LVU4996 + 15083 0026 2368 ldr r3, [r4] + 15084 0028 9B69 ldr r3, [r3, #24] +6883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15085 .loc 1 6883 10 view .LVU4997 + 15086 002a DB03 lsls r3, r3, #15 + ARM GAS /tmp/cc4IUqI9.s page 481 + + + 15087 002c 07D5 bpl .L923 +6885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15088 .loc 1 6885 9 is_stmt 1 view .LVU4998 +6885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15089 .loc 1 6885 24 is_stmt 0 view .LVU4999 + 15090 002e 0123 movs r3, #1 + 15091 0030 2385 strh r3, [r4, #40] + 15092 0032 09E0 b .L924 + 15093 .L926: +6871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15094 .loc 1 6871 5 is_stmt 1 view .LVU5000 + 15095 0034 2021 movs r1, #32 + 15096 0036 2000 movs r0, r4 + 15097 .LVL1151: +6871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15098 .loc 1 6871 5 is_stmt 0 view .LVU5001 + 15099 0038 FFF7FEFF bl I2C_Enable_IRQ + 15100 .LVL1152: + 15101 003c 10E0 b .L919 + 15102 .LVL1153: + 15103 .L923: +6889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15104 .loc 1 6889 9 is_stmt 1 view .LVU5002 +6889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15105 .loc 1 6889 24 is_stmt 0 view .LVU5003 + 15106 003e FF23 movs r3, #255 + 15107 0040 2385 strh r3, [r4, #40] + 15108 0042 01E0 b .L924 + 15109 .L922: +6894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15110 .loc 1 6894 7 is_stmt 1 view .LVU5004 +6894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15111 .loc 1 6894 28 is_stmt 0 view .LVU5005 + 15112 0044 638D ldrh r3, [r4, #42] +6894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15113 .loc 1 6894 22 view .LVU5006 + 15114 0046 2385 strh r3, [r4, #40] + 15115 .L924: +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 15116 .loc 1 6898 5 is_stmt 1 view .LVU5007 +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 15117 .loc 1 6898 55 is_stmt 0 view .LVU5008 + 15118 0048 2168 ldr r1, [r4] +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 15119 .loc 1 6898 50 view .LVU5009 + 15120 004a 2431 adds r1, r1, #36 +6899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15121 .loc 1 6899 30 view .LVU5010 + 15122 004c 238D ldrh r3, [r4, #40] +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 15123 .loc 1 6898 9 view .LVU5011 + 15124 004e E06B ldr r0, [r4, #60] + 15125 .LVL1154: +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 15126 .loc 1 6898 9 view .LVU5012 + 15127 0050 FFF7FEFF bl HAL_DMA_Start_IT + 15128 .LVL1155: + ARM GAS /tmp/cc4IUqI9.s page 482 + + +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 15129 .loc 1 6898 8 discriminator 1 view .LVU5013 + 15130 0054 0028 cmp r0, #0 + 15131 0056 04D0 beq .L925 +6902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15132 .loc 1 6902 7 is_stmt 1 view .LVU5014 + 15133 0058 1021 movs r1, #16 + 15134 005a 2000 movs r0, r4 + 15135 005c FFF7FEFF bl I2C_ITError + 15136 .LVL1156: + 15137 .L919: +6910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15138 .loc 1 6910 1 is_stmt 0 view .LVU5015 + 15139 @ sp needed + 15140 .LVL1157: +6910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15141 .loc 1 6910 1 view .LVU5016 + 15142 0060 10BD pop {r4, pc} + 15143 .LVL1158: + 15144 .L925: +6907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15145 .loc 1 6907 7 is_stmt 1 view .LVU5017 + 15146 0062 4021 movs r1, #64 + 15147 0064 2000 movs r0, r4 + 15148 0066 FFF7FEFF bl I2C_Enable_IRQ + 15149 .LVL1159: +6910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15150 .loc 1 6910 1 is_stmt 0 view .LVU5018 + 15151 006a F9E7 b .L919 + 15152 .L928: + 15153 .align 2 + 15154 .L927: + 15155 006c FF7FFFFF .word -32769 + 15156 .cfi_endproc + 15157 .LFE108: + 15159 .section .text.I2C_Mem_ISR_IT,"ax",%progbits + 15160 .align 1 + 15161 .syntax unified + 15162 .code 16 + 15163 .thumb_func + 15165 I2C_Mem_ISR_IT: + 15166 .LVL1160: + 15167 .LFB90: +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 15168 .loc 1 5100 1 is_stmt 1 view -0 + 15169 .cfi_startproc + 15170 @ args = 0, pretend = 0, frame = 0 + 15171 @ frame_needed = 0, uses_anonymous_args = 0 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 15172 .loc 1 5100 1 is_stmt 0 view .LVU5020 + 15173 0000 70B5 push {r4, r5, r6, lr} + 15174 .cfi_def_cfa_offset 16 + 15175 .cfi_offset 4, -16 + 15176 .cfi_offset 5, -12 + 15177 .cfi_offset 6, -8 + 15178 .cfi_offset 14, -4 + 15179 0002 82B0 sub sp, sp, #8 + ARM GAS /tmp/cc4IUqI9.s page 483 + + + 15180 .cfi_def_cfa_offset 24 + 15181 0004 0400 movs r4, r0 + 15182 0006 0D00 movs r5, r1 + 15183 0008 1600 movs r6, r2 +5101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 15184 .loc 1 5101 3 is_stmt 1 view .LVU5021 + 15185 .LVL1161: +5102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15186 .loc 1 5102 3 view .LVU5022 +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15187 .loc 1 5105 3 view .LVU5023 +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15188 .loc 1 5105 3 view .LVU5024 + 15189 000a 4023 movs r3, #64 + 15190 000c C35C ldrb r3, [r0, r3] + 15191 000e 012B cmp r3, #1 + 15192 0010 00D1 bne .LCB14280 + 15193 0012 C3E0 b .L946 @long jump + 15194 .LCB14280: +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15195 .loc 1 5105 3 discriminator 2 view .LVU5025 + 15196 0014 0123 movs r3, #1 + 15197 0016 4022 movs r2, #64 + 15198 .LVL1162: +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15199 .loc 1 5105 3 is_stmt 0 discriminator 2 view .LVU5026 + 15200 0018 8354 strb r3, [r0, r2] +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15201 .loc 1 5105 3 is_stmt 1 discriminator 2 view .LVU5027 +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 15202 .loc 1 5107 3 view .LVU5028 +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 15203 .loc 1 5107 8 is_stmt 0 view .LVU5029 + 15204 001a 0A09 lsrs r2, r1, #4 +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 15205 .loc 1 5107 6 view .LVU5030 + 15206 001c 1342 tst r3, r2 + 15207 001e 01D0 beq .L931 +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 15208 .loc 1 5107 58 discriminator 1 view .LVU5031 + 15209 0020 F306 lsls r3, r6, #27 + 15210 0022 1ED4 bmi .L959 + 15211 .L931: +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 15212 .loc 1 5121 8 is_stmt 1 view .LVU5032 +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 15213 .loc 1 5121 11 is_stmt 0 view .LVU5033 + 15214 0024 6B07 lsls r3, r5, #29 + 15215 0026 26D5 bpl .L933 +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 15216 .loc 1 5121 65 discriminator 1 view .LVU5034 + 15217 0028 7307 lsls r3, r6, #29 + 15218 002a 24D5 bpl .L933 +5125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15219 .loc 1 5125 5 is_stmt 1 view .LVU5035 +5125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15220 .loc 1 5125 16 is_stmt 0 view .LVU5036 + ARM GAS /tmp/cc4IUqI9.s page 484 + + + 15221 002c 0423 movs r3, #4 + 15222 002e 9D43 bics r5, r3 + 15223 .LVL1163: +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15224 .loc 1 5128 5 is_stmt 1 view .LVU5037 +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15225 .loc 1 5128 36 is_stmt 0 view .LVU5038 + 15226 0030 2368 ldr r3, [r4] +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15227 .loc 1 5128 46 view .LVU5039 + 15228 0032 5A6A ldr r2, [r3, #36] +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15229 .loc 1 5128 10 view .LVU5040 + 15230 0034 636A ldr r3, [r4, #36] +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15231 .loc 1 5128 21 view .LVU5041 + 15232 0036 1A70 strb r2, [r3] +5131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15233 .loc 1 5131 5 is_stmt 1 view .LVU5042 +5131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15234 .loc 1 5131 9 is_stmt 0 view .LVU5043 + 15235 0038 636A ldr r3, [r4, #36] +5131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15236 .loc 1 5131 19 view .LVU5044 + 15237 003a 0133 adds r3, r3, #1 + 15238 003c 6362 str r3, [r4, #36] +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 15239 .loc 1 5133 5 is_stmt 1 view .LVU5045 +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 15240 .loc 1 5133 9 is_stmt 0 view .LVU5046 + 15241 003e 238D ldrh r3, [r4, #40] +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 15242 .loc 1 5133 19 view .LVU5047 + 15243 0040 013B subs r3, r3, #1 + 15244 0042 2385 strh r3, [r4, #40] +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15245 .loc 1 5134 5 is_stmt 1 view .LVU5048 +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15246 .loc 1 5134 9 is_stmt 0 view .LVU5049 + 15247 0044 638D ldrh r3, [r4, #42] +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15248 .loc 1 5134 20 view .LVU5050 + 15249 0046 013B subs r3, r3, #1 + 15250 0048 9BB2 uxth r3, r3 + 15251 004a 6385 strh r3, [r4, #42] + 15252 .LVL1164: + 15253 .L932: +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15254 .loc 1 5234 3 is_stmt 1 view .LVU5051 +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 15255 .loc 1 5236 3 view .LVU5052 +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 15256 .loc 1 5236 6 is_stmt 0 view .LVU5053 + 15257 004c AB06 lsls r3, r5, #26 + 15258 004e 02D5 bpl .L945 +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 15259 .loc 1 5236 61 discriminator 1 view .LVU5054 + ARM GAS /tmp/cc4IUqI9.s page 485 + + + 15260 0050 B606 lsls r6, r6, #26 + 15261 0052 00D5 bpl .LCB14352 + 15262 0054 9DE0 b .L960 @long jump + 15263 .LCB14352: + 15264 .LVL1165: + 15265 .L945: +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15266 .loc 1 5244 3 is_stmt 1 view .LVU5055 +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15267 .loc 1 5244 3 view .LVU5056 + 15268 0056 4023 movs r3, #64 + 15269 0058 0022 movs r2, #0 + 15270 005a E254 strb r2, [r4, r3] +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15271 .loc 1 5244 3 view .LVU5057 +5246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15272 .loc 1 5246 3 view .LVU5058 +5246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15273 .loc 1 5246 10 is_stmt 0 view .LVU5059 + 15274 005c 0020 movs r0, #0 + 15275 .L930: +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15276 .loc 1 5247 1 view .LVU5060 + 15277 005e 02B0 add sp, sp, #8 + 15278 @ sp needed + 15279 .LVL1166: + 15280 .LVL1167: +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15281 .loc 1 5247 1 view .LVU5061 + 15282 0060 70BD pop {r4, r5, r6, pc} + 15283 .LVL1168: + 15284 .L959: +5111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15285 .loc 1 5111 5 is_stmt 1 view .LVU5062 + 15286 0062 0368 ldr r3, [r0] + 15287 0064 1022 movs r2, #16 + 15288 0066 DA61 str r2, [r3, #28] +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15289 .loc 1 5116 5 view .LVU5063 +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15290 .loc 1 5116 9 is_stmt 0 view .LVU5064 + 15291 0068 436C ldr r3, [r0, #68] +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15292 .loc 1 5116 21 view .LVU5065 + 15293 006a 0C3A subs r2, r2, #12 + 15294 006c 1343 orrs r3, r2 + 15295 006e 4364 str r3, [r0, #68] +5119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15296 .loc 1 5119 5 is_stmt 1 view .LVU5066 + 15297 0070 FFF7FEFF bl I2C_Flush_TXDR + 15298 .LVL1169: +5119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15299 .loc 1 5119 5 is_stmt 0 view .LVU5067 + 15300 0074 EAE7 b .L932 + 15301 .LVL1170: + 15302 .L933: +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + ARM GAS /tmp/cc4IUqI9.s page 486 + + + 15303 .loc 1 5136 8 is_stmt 1 view .LVU5068 +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 15304 .loc 1 5136 11 is_stmt 0 view .LVU5069 + 15305 0076 AB07 lsls r3, r5, #30 + 15306 0078 1AD5 bpl .L934 +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 15307 .loc 1 5136 65 discriminator 1 view .LVU5070 + 15308 007a B307 lsls r3, r6, #30 + 15309 007c 18D5 bpl .L934 +5139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15310 .loc 1 5139 5 is_stmt 1 view .LVU5071 +5139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15311 .loc 1 5139 13 is_stmt 0 view .LVU5072 + 15312 007e 236D ldr r3, [r4, #80] +5139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15313 .loc 1 5139 8 view .LVU5073 + 15314 0080 0133 adds r3, r3, #1 + 15315 0082 06D0 beq .L961 +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15316 .loc 1 5153 7 is_stmt 1 view .LVU5074 +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15317 .loc 1 5153 11 is_stmt 0 view .LVU5075 + 15318 0084 2368 ldr r3, [r4] +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15319 .loc 1 5153 34 view .LVU5076 + 15320 0086 226D ldr r2, [r4, #80] +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15321 .loc 1 5153 28 view .LVU5077 + 15322 0088 9A62 str r2, [r3, #40] +5156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15323 .loc 1 5156 7 is_stmt 1 view .LVU5078 +5156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15324 .loc 1 5156 24 is_stmt 0 view .LVU5079 + 15325 008a 0123 movs r3, #1 + 15326 008c 5B42 rsbs r3, r3, #0 + 15327 008e 2365 str r3, [r4, #80] + 15328 0090 DCE7 b .L932 + 15329 .L961: +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15330 .loc 1 5142 7 is_stmt 1 view .LVU5080 +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15331 .loc 1 5142 35 is_stmt 0 view .LVU5081 + 15332 0092 626A ldr r2, [r4, #36] +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15333 .loc 1 5142 11 view .LVU5082 + 15334 0094 2368 ldr r3, [r4] +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15335 .loc 1 5142 30 view .LVU5083 + 15336 0096 1278 ldrb r2, [r2] +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15337 .loc 1 5142 28 view .LVU5084 + 15338 0098 9A62 str r2, [r3, #40] +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15339 .loc 1 5145 7 is_stmt 1 view .LVU5085 +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15340 .loc 1 5145 11 is_stmt 0 view .LVU5086 + 15341 009a 636A ldr r3, [r4, #36] + ARM GAS /tmp/cc4IUqI9.s page 487 + + +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15342 .loc 1 5145 21 view .LVU5087 + 15343 009c 0133 adds r3, r3, #1 + 15344 009e 6362 str r3, [r4, #36] +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 15345 .loc 1 5147 7 is_stmt 1 view .LVU5088 +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 15346 .loc 1 5147 11 is_stmt 0 view .LVU5089 + 15347 00a0 238D ldrh r3, [r4, #40] +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 15348 .loc 1 5147 21 view .LVU5090 + 15349 00a2 013B subs r3, r3, #1 + 15350 00a4 2385 strh r3, [r4, #40] +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15351 .loc 1 5148 7 is_stmt 1 view .LVU5091 +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15352 .loc 1 5148 11 is_stmt 0 view .LVU5092 + 15353 00a6 638D ldrh r3, [r4, #42] +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15354 .loc 1 5148 22 view .LVU5093 + 15355 00a8 013B subs r3, r3, #1 + 15356 00aa 9BB2 uxth r3, r3 + 15357 00ac 6385 strh r3, [r4, #42] + 15358 00ae CDE7 b .L932 + 15359 .L934: +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 15360 .loc 1 5159 8 is_stmt 1 view .LVU5094 +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 15361 .loc 1 5159 11 is_stmt 0 view .LVU5095 + 15362 00b0 2B06 lsls r3, r5, #24 + 15363 00b2 34D5 bpl .L936 +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 15364 .loc 1 5159 64 discriminator 1 view .LVU5096 + 15365 00b4 7306 lsls r3, r6, #25 + 15366 00b6 32D5 bpl .L936 +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15367 .loc 1 5162 5 is_stmt 1 view .LVU5097 +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15368 .loc 1 5162 14 is_stmt 0 view .LVU5098 + 15369 00b8 638D ldrh r3, [r4, #42] + 15370 00ba 9BB2 uxth r3, r3 +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15371 .loc 1 5162 8 view .LVU5099 + 15372 00bc 002B cmp r3, #0 + 15373 00be 29D0 beq .L937 +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15374 .loc 1 5162 41 discriminator 1 view .LVU5100 + 15375 00c0 238D ldrh r3, [r4, #40] +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15376 .loc 1 5162 33 discriminator 1 view .LVU5101 + 15377 00c2 002B cmp r3, #0 + 15378 00c4 26D1 bne .L937 +5164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15379 .loc 1 5164 7 is_stmt 1 view .LVU5102 +5164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15380 .loc 1 5164 15 is_stmt 0 view .LVU5103 + 15381 00c6 638D ldrh r3, [r4, #42] + ARM GAS /tmp/cc4IUqI9.s page 488 + + + 15382 00c8 9BB2 uxth r3, r3 +5164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15383 .loc 1 5164 10 view .LVU5104 + 15384 00ca FF2B cmp r3, #255 + 15385 00cc 14D9 bls .L938 +5167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15386 .loc 1 5167 9 is_stmt 1 view .LVU5105 +5167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15387 .loc 1 5167 13 is_stmt 0 view .LVU5106 + 15388 00ce 2368 ldr r3, [r4] + 15389 00d0 9B69 ldr r3, [r3, #24] +5167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15390 .loc 1 5167 12 view .LVU5107 + 15391 00d2 DB03 lsls r3, r3, #15 + 15392 00d4 0DD5 bpl .L939 +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15393 .loc 1 5169 11 is_stmt 1 view .LVU5108 +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15394 .loc 1 5169 26 is_stmt 0 view .LVU5109 + 15395 00d6 0123 movs r3, #1 + 15396 00d8 2385 strh r3, [r4, #40] + 15397 .L940: +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 15398 .loc 1 5175 9 is_stmt 1 view .LVU5110 +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 15399 .loc 1 5175 48 is_stmt 0 view .LVU5111 + 15400 00da E16C ldr r1, [r4, #76] + 15401 .LVL1171: +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 15402 .loc 1 5175 75 view .LVU5112 + 15403 00dc 228D ldrh r2, [r4, #40] +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 15404 .loc 1 5175 9 view .LVU5113 + 15405 00de 8023 movs r3, #128 + 15406 00e0 D2B2 uxtb r2, r2 + 15407 00e2 89B2 uxth r1, r1 + 15408 00e4 0020 movs r0, #0 + 15409 .LVL1172: +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 15410 .loc 1 5175 9 view .LVU5114 + 15411 00e6 0090 str r0, [sp] + 15412 00e8 5B04 lsls r3, r3, #17 + 15413 00ea 2000 movs r0, r4 + 15414 00ec FFF7FEFF bl I2C_TransferConfig + 15415 .LVL1173: + 15416 00f0 ACE7 b .L932 + 15417 .LVL1174: + 15418 .L939: +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15419 .loc 1 5173 11 is_stmt 1 view .LVU5115 +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15420 .loc 1 5173 26 is_stmt 0 view .LVU5116 + 15421 00f2 FF23 movs r3, #255 + 15422 00f4 2385 strh r3, [r4, #40] + 15423 00f6 F0E7 b .L940 + 15424 .L938: +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + ARM GAS /tmp/cc4IUqI9.s page 489 + + + 15425 .loc 1 5180 9 is_stmt 1 view .LVU5117 +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 15426 .loc 1 5180 30 is_stmt 0 view .LVU5118 + 15427 00f8 628D ldrh r2, [r4, #42] + 15428 00fa 92B2 uxth r2, r2 +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 15429 .loc 1 5180 24 view .LVU5119 + 15430 00fc 2285 strh r2, [r4, #40] +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 15431 .loc 1 5181 9 is_stmt 1 view .LVU5120 +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 15432 .loc 1 5181 48 is_stmt 0 view .LVU5121 + 15433 00fe E16C ldr r1, [r4, #76] + 15434 .LVL1175: +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 15435 .loc 1 5181 9 view .LVU5122 + 15436 0100 8023 movs r3, #128 + 15437 0102 D2B2 uxtb r2, r2 + 15438 0104 89B2 uxth r1, r1 + 15439 0106 0020 movs r0, #0 + 15440 .LVL1176: +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 15441 .loc 1 5181 9 view .LVU5123 + 15442 0108 0090 str r0, [sp] + 15443 010a 9B04 lsls r3, r3, #18 + 15444 010c 2000 movs r0, r4 + 15445 010e FFF7FEFF bl I2C_TransferConfig + 15446 .LVL1177: + 15447 0112 9BE7 b .L932 + 15448 .LVL1178: + 15449 .L937: +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15450 .loc 1 5189 7 is_stmt 1 view .LVU5124 + 15451 0114 4021 movs r1, #64 + 15452 .LVL1179: +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15453 .loc 1 5189 7 is_stmt 0 view .LVU5125 + 15454 0116 2000 movs r0, r4 + 15455 .LVL1180: +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15456 .loc 1 5189 7 view .LVU5126 + 15457 0118 FFF7FEFF bl I2C_ITError + 15458 .LVL1181: + 15459 011c 96E7 b .L932 + 15460 .LVL1182: + 15461 .L936: +5192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 15462 .loc 1 5192 8 is_stmt 1 view .LVU5127 +5192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 15463 .loc 1 5192 11 is_stmt 0 view .LVU5128 + 15464 011e 6B06 lsls r3, r5, #25 + 15465 0120 00D4 bmi .LCB14569 + 15466 0122 93E7 b .L932 @long jump + 15467 .LCB14569: +5192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 15468 .loc 1 5192 63 discriminator 1 view .LVU5129 + 15469 0124 7306 lsls r3, r6, #25 + ARM GAS /tmp/cc4IUqI9.s page 490 + + + 15470 0126 00D4 bmi .LCB14574 + 15471 0128 90E7 b .L932 @long jump + 15472 .LCB14574: +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15473 .loc 1 5196 5 is_stmt 1 view .LVU5130 + 15474 012a 0121 movs r1, #1 + 15475 .LVL1183: +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15476 .loc 1 5196 5 is_stmt 0 view .LVU5131 + 15477 012c 2000 movs r0, r4 + 15478 .LVL1184: +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15479 .loc 1 5196 5 view .LVU5132 + 15480 012e FFF7FEFF bl I2C_Disable_IRQ + 15481 .LVL1185: +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15482 .loc 1 5199 5 is_stmt 1 view .LVU5133 + 15483 0132 0221 movs r1, #2 + 15484 0134 2000 movs r0, r4 + 15485 0136 FFF7FEFF bl I2C_Enable_IRQ + 15486 .LVL1186: +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15487 .loc 1 5201 5 view .LVU5134 +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15488 .loc 1 5201 13 is_stmt 0 view .LVU5135 + 15489 013a 4123 movs r3, #65 + 15490 013c E35C ldrb r3, [r4, r3] +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15491 .loc 1 5201 8 view .LVU5136 + 15492 013e 222B cmp r3, #34 + 15493 0140 15D0 beq .L947 +5101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 15494 .loc 1 5101 12 view .LVU5137 + 15495 0142 1748 ldr r0, .L962 + 15496 .L941: + 15497 .LVL1187: +5206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15498 .loc 1 5206 5 is_stmt 1 view .LVU5138 +5206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15499 .loc 1 5206 13 is_stmt 0 view .LVU5139 + 15500 0144 638D ldrh r3, [r4, #42] + 15501 0146 9BB2 uxth r3, r3 +5206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15502 .loc 1 5206 8 view .LVU5140 + 15503 0148 FF2B cmp r3, #255 + 15504 014a 15D9 bls .L942 +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15505 .loc 1 5209 7 is_stmt 1 view .LVU5141 +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15506 .loc 1 5209 11 is_stmt 0 view .LVU5142 + 15507 014c 2368 ldr r3, [r4] + 15508 014e 9B69 ldr r3, [r3, #24] +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15509 .loc 1 5209 10 view .LVU5143 + 15510 0150 DB03 lsls r3, r3, #15 + 15511 0152 0ED5 bpl .L943 +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 491 + + + 15512 .loc 1 5211 9 is_stmt 1 view .LVU5144 +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15513 .loc 1 5211 24 is_stmt 0 view .LVU5145 + 15514 0154 0123 movs r3, #1 + 15515 0156 2385 strh r3, [r4, #40] + 15516 .L944: +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 15517 .loc 1 5219 7 is_stmt 1 view .LVU5146 +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 15518 .loc 1 5219 46 is_stmt 0 view .LVU5147 + 15519 0158 E16C ldr r1, [r4, #76] +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 15520 .loc 1 5219 73 view .LVU5148 + 15521 015a 228D ldrh r2, [r4, #40] +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 15522 .loc 1 5219 7 view .LVU5149 + 15523 015c 8023 movs r3, #128 + 15524 015e D2B2 uxtb r2, r2 + 15525 0160 89B2 uxth r1, r1 + 15526 0162 0090 str r0, [sp] + 15527 0164 5B04 lsls r3, r3, #17 + 15528 0166 2000 movs r0, r4 + 15529 .LVL1188: +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 15530 .loc 1 5219 7 view .LVU5150 + 15531 0168 FFF7FEFF bl I2C_TransferConfig + 15532 .LVL1189: +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 15533 .loc 1 5219 7 view .LVU5151 + 15534 016c 6EE7 b .L932 + 15535 .LVL1190: + 15536 .L947: +5203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15537 .loc 1 5203 17 view .LVU5152 + 15538 016e 0D48 ldr r0, .L962+4 + 15539 0170 E8E7 b .L941 + 15540 .LVL1191: + 15541 .L943: +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15542 .loc 1 5215 9 is_stmt 1 view .LVU5153 +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15543 .loc 1 5215 24 is_stmt 0 view .LVU5154 + 15544 0172 FF23 movs r3, #255 + 15545 0174 2385 strh r3, [r4, #40] + 15546 0176 EFE7 b .L944 + 15547 .L942: +5224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15548 .loc 1 5224 7 is_stmt 1 view .LVU5155 +5224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15549 .loc 1 5224 28 is_stmt 0 view .LVU5156 + 15550 0178 628D ldrh r2, [r4, #42] + 15551 017a 92B2 uxth r2, r2 +5224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15552 .loc 1 5224 22 view .LVU5157 + 15553 017c 2285 strh r2, [r4, #40] +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 15554 .loc 1 5227 7 is_stmt 1 view .LVU5158 + ARM GAS /tmp/cc4IUqI9.s page 492 + + +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 15555 .loc 1 5227 46 is_stmt 0 view .LVU5159 + 15556 017e E16C ldr r1, [r4, #76] +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 15557 .loc 1 5227 7 view .LVU5160 + 15558 0180 8023 movs r3, #128 + 15559 0182 D2B2 uxtb r2, r2 + 15560 0184 89B2 uxth r1, r1 + 15561 0186 0090 str r0, [sp] + 15562 0188 9B04 lsls r3, r3, #18 + 15563 018a 2000 movs r0, r4 + 15564 .LVL1192: +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 15565 .loc 1 5227 7 view .LVU5161 + 15566 018c FFF7FEFF bl I2C_TransferConfig + 15567 .LVL1193: +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 15568 .loc 1 5227 7 view .LVU5162 + 15569 0190 5CE7 b .L932 + 15570 .LVL1194: + 15571 .L960: +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15572 .loc 1 5240 5 is_stmt 1 view .LVU5163 + 15573 0192 2900 movs r1, r5 + 15574 0194 2000 movs r0, r4 + 15575 0196 FFF7FEFF bl I2C_ITMasterCplt + 15576 .LVL1195: + 15577 019a 5CE7 b .L945 + 15578 .LVL1196: + 15579 .L946: +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15580 .loc 1 5105 3 is_stmt 0 discriminator 1 view .LVU5164 + 15581 019c 0220 movs r0, #2 + 15582 .LVL1197: +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15583 .loc 1 5105 3 discriminator 1 view .LVU5165 + 15584 019e 5EE7 b .L930 + 15585 .L963: + 15586 .align 2 + 15587 .L962: + 15588 01a0 00200080 .word -2147475456 + 15589 01a4 00240080 .word -2147474432 + 15590 .cfi_endproc + 15591 .LFE90: + 15593 .section .text.HAL_I2C_ER_IRQHandler,"ax",%progbits + 15594 .align 1 + 15595 .global HAL_I2C_ER_IRQHandler + 15596 .syntax unified + 15597 .code 16 + 15598 .thumb_func + 15600 HAL_I2C_ER_IRQHandler: + 15601 .LVL1198: + 15602 .LFB75: +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 15603 .loc 1 4658 1 is_stmt 1 view -0 + 15604 .cfi_startproc + 15605 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc4IUqI9.s page 493 + + + 15606 @ frame_needed = 0, uses_anonymous_args = 0 +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 15607 .loc 1 4658 1 is_stmt 0 view .LVU5167 + 15608 0000 70B5 push {r4, r5, r6, lr} + 15609 .cfi_def_cfa_offset 16 + 15610 .cfi_offset 4, -16 + 15611 .cfi_offset 5, -12 + 15612 .cfi_offset 6, -8 + 15613 .cfi_offset 14, -4 +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 15614 .loc 1 4659 3 is_stmt 1 view .LVU5168 +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 15615 .loc 1 4659 24 is_stmt 0 view .LVU5169 + 15616 0002 0268 ldr r2, [r0] +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 15617 .loc 1 4659 12 view .LVU5170 + 15618 0004 9369 ldr r3, [r2, #24] + 15619 .LVL1199: +4660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 15620 .loc 1 4660 3 is_stmt 1 view .LVU5171 +4660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 15621 .loc 1 4660 12 is_stmt 0 view .LVU5172 + 15622 0006 1168 ldr r1, [r2] + 15623 .LVL1200: +4661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15624 .loc 1 4661 3 is_stmt 1 view .LVU5173 +4664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15625 .loc 1 4664 3 view .LVU5174 +4664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15626 .loc 1 4664 6 is_stmt 0 view .LVU5175 + 15627 0008 DC05 lsls r4, r3, #23 + 15628 000a 08D5 bpl .L965 +4664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15629 .loc 1 4664 57 discriminator 1 view .LVU5176 + 15630 000c 0C06 lsls r4, r1, #24 + 15631 000e 06D5 bpl .L965 +4667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15632 .loc 1 4667 5 is_stmt 1 view .LVU5177 +4667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15633 .loc 1 4667 9 is_stmt 0 view .LVU5178 + 15634 0010 446C ldr r4, [r0, #68] +4667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15635 .loc 1 4667 21 view .LVU5179 + 15636 0012 0125 movs r5, #1 + 15637 0014 2C43 orrs r4, r5 + 15638 0016 4464 str r4, [r0, #68] +4670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15639 .loc 1 4670 5 is_stmt 1 view .LVU5180 + 15640 0018 8024 movs r4, #128 + 15641 001a 6400 lsls r4, r4, #1 + 15642 001c D461 str r4, [r2, #28] + 15643 .L965: +4674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15644 .loc 1 4674 3 view .LVU5181 +4674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15645 .loc 1 4674 6 is_stmt 0 view .LVU5182 + 15646 001e 5A05 lsls r2, r3, #21 + ARM GAS /tmp/cc4IUqI9.s page 494 + + + 15647 0020 09D5 bpl .L966 +4674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15648 .loc 1 4674 56 discriminator 1 view .LVU5183 + 15649 0022 0A06 lsls r2, r1, #24 + 15650 0024 07D5 bpl .L966 +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15651 .loc 1 4677 5 is_stmt 1 view .LVU5184 +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15652 .loc 1 4677 9 is_stmt 0 view .LVU5185 + 15653 0026 426C ldr r2, [r0, #68] +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15654 .loc 1 4677 21 view .LVU5186 + 15655 0028 0824 movs r4, #8 + 15656 002a 2243 orrs r2, r4 + 15657 002c 4264 str r2, [r0, #68] +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15658 .loc 1 4680 5 is_stmt 1 view .LVU5187 + 15659 002e 0268 ldr r2, [r0] + 15660 0030 8024 movs r4, #128 + 15661 0032 E400 lsls r4, r4, #3 + 15662 0034 D461 str r4, [r2, #28] + 15663 .L966: +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15664 .loc 1 4684 3 view .LVU5188 +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15665 .loc 1 4684 6 is_stmt 0 view .LVU5189 + 15666 0036 9B05 lsls r3, r3, #22 + 15667 0038 09D5 bpl .L967 + 15668 .LVL1201: +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15669 .loc 1 4684 57 discriminator 1 view .LVU5190 + 15670 003a 0906 lsls r1, r1, #24 + 15671 003c 07D5 bpl .L967 + 15672 .LVL1202: +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15673 .loc 1 4687 5 is_stmt 1 view .LVU5191 +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15674 .loc 1 4687 9 is_stmt 0 view .LVU5192 + 15675 003e 436C ldr r3, [r0, #68] +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15676 .loc 1 4687 21 view .LVU5193 + 15677 0040 0222 movs r2, #2 + 15678 0042 1343 orrs r3, r2 + 15679 0044 4364 str r3, [r0, #68] +4690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15680 .loc 1 4690 5 is_stmt 1 view .LVU5194 + 15681 0046 0368 ldr r3, [r0] + 15682 0048 FF32 adds r2, r2, #255 + 15683 004a FF32 adds r2, r2, #255 + 15684 004c DA61 str r2, [r3, #28] + 15685 .L967: +4694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15686 .loc 1 4694 3 view .LVU5195 +4694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15687 .loc 1 4694 12 is_stmt 0 view .LVU5196 + 15688 004e 416C ldr r1, [r0, #68] + 15689 .LVL1203: + ARM GAS /tmp/cc4IUqI9.s page 495 + + +4697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15690 .loc 1 4697 3 is_stmt 1 view .LVU5197 +4697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15691 .loc 1 4697 17 is_stmt 0 view .LVU5198 + 15692 0050 0B23 movs r3, #11 +4697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15693 .loc 1 4697 6 view .LVU5199 + 15694 0052 0B42 tst r3, r1 + 15695 0054 00D1 bne .L975 + 15696 .LVL1204: + 15697 .L964: +4701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15698 .loc 1 4701 1 view .LVU5200 + 15699 @ sp needed + 15700 0056 70BD pop {r4, r5, r6, pc} + 15701 .LVL1205: + 15702 .L975: +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15703 .loc 1 4699 5 is_stmt 1 view .LVU5201 + 15704 0058 FFF7FEFF bl I2C_ITError + 15705 .LVL1206: +4701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15706 .loc 1 4701 1 is_stmt 0 view .LVU5202 + 15707 005c FBE7 b .L964 + 15708 .cfi_endproc + 15709 .LFE75: + 15711 .section .text.I2C_DMAAbort,"ax",%progbits + 15712 .align 1 + 15713 .syntax unified + 15714 .code 16 + 15715 .thumb_func + 15717 I2C_DMAAbort: + 15718 .LVL1207: + 15719 .LFB111: +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 15720 .loc 1 6967 1 is_stmt 1 view -0 + 15721 .cfi_startproc + 15722 @ args = 0, pretend = 0, frame = 0 + 15723 @ frame_needed = 0, uses_anonymous_args = 0 +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 15724 .loc 1 6967 1 is_stmt 0 view .LVU5204 + 15725 0000 10B5 push {r4, lr} + 15726 .cfi_def_cfa_offset 8 + 15727 .cfi_offset 4, -8 + 15728 .cfi_offset 14, -4 +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15729 .loc 1 6969 3 is_stmt 1 view .LVU5205 +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15730 .loc 1 6969 22 is_stmt 0 view .LVU5206 + 15731 0002 406A ldr r0, [r0, #36] + 15732 .LVL1208: +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15733 .loc 1 6972 3 is_stmt 1 view .LVU5207 +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15734 .loc 1 6972 11 is_stmt 0 view .LVU5208 + 15735 0004 836B ldr r3, [r0, #56] +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/cc4IUqI9.s page 496 + + + 15736 .loc 1 6972 6 view .LVU5209 + 15737 0006 002B cmp r3, #0 + 15738 0008 01D0 beq .L977 +6974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15739 .loc 1 6974 5 is_stmt 1 view .LVU5210 +6974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15740 .loc 1 6974 37 is_stmt 0 view .LVU5211 + 15741 000a 0022 movs r2, #0 + 15742 000c 5A63 str r2, [r3, #52] + 15743 .L977: +6976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15744 .loc 1 6976 3 is_stmt 1 view .LVU5212 +6976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15745 .loc 1 6976 11 is_stmt 0 view .LVU5213 + 15746 000e C36B ldr r3, [r0, #60] +6976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15747 .loc 1 6976 6 view .LVU5214 + 15748 0010 002B cmp r3, #0 + 15749 0012 01D0 beq .L978 +6978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15750 .loc 1 6978 5 is_stmt 1 view .LVU5215 +6978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15751 .loc 1 6978 37 is_stmt 0 view .LVU5216 + 15752 0014 0022 movs r2, #0 + 15753 0016 5A63 str r2, [r3, #52] + 15754 .L978: +6981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15755 .loc 1 6981 3 is_stmt 1 view .LVU5217 + 15756 0018 FFF7FEFF bl I2C_TreatErrorCallback + 15757 .LVL1209: +6982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15758 .loc 1 6982 1 is_stmt 0 view .LVU5218 + 15759 @ sp needed + 15760 001c 10BD pop {r4, pc} + 15761 .cfi_endproc + 15762 .LFE111: + 15764 .section .text.HAL_I2C_GetState,"ax",%progbits + 15765 .align 1 + 15766 .global HAL_I2C_GetState + 15767 .syntax unified + 15768 .code 16 + 15769 .thumb_func + 15771 HAL_I2C_GetState: + 15772 .LVL1210: + 15773 .LFB86: +4892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return I2C handle state */ + 15774 .loc 1 4892 1 is_stmt 1 view -0 + 15775 .cfi_startproc + 15776 @ args = 0, pretend = 0, frame = 0 + 15777 @ frame_needed = 0, uses_anonymous_args = 0 + 15778 @ link register save eliminated. +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15779 .loc 1 4894 3 view .LVU5220 +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15780 .loc 1 4894 14 is_stmt 0 view .LVU5221 + 15781 0000 4123 movs r3, #65 + 15782 0002 C05C ldrb r0, [r0, r3] + ARM GAS /tmp/cc4IUqI9.s page 497 + + + 15783 .LVL1211: +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15784 .loc 1 4894 14 view .LVU5222 + 15785 0004 C0B2 uxtb r0, r0 +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15786 .loc 1 4895 1 view .LVU5223 + 15787 @ sp needed + 15788 0006 7047 bx lr + 15789 .cfi_endproc + 15790 .LFE86: + 15792 .section .text.HAL_I2C_GetMode,"ax",%progbits + 15793 .align 1 + 15794 .global HAL_I2C_GetMode + 15795 .syntax unified + 15796 .code 16 + 15797 .thumb_func + 15799 HAL_I2C_GetMode: + 15800 .LVL1212: + 15801 .LFB87: +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->Mode; + 15802 .loc 1 4904 1 is_stmt 1 view -0 + 15803 .cfi_startproc + 15804 @ args = 0, pretend = 0, frame = 0 + 15805 @ frame_needed = 0, uses_anonymous_args = 0 + 15806 @ link register save eliminated. +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15807 .loc 1 4905 3 view .LVU5225 +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15808 .loc 1 4905 14 is_stmt 0 view .LVU5226 + 15809 0000 4223 movs r3, #66 + 15810 0002 C05C ldrb r0, [r0, r3] + 15811 .LVL1213: +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15812 .loc 1 4905 14 view .LVU5227 + 15813 0004 C0B2 uxtb r0, r0 +4906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15814 .loc 1 4906 1 view .LVU5228 + 15815 @ sp needed + 15816 0006 7047 bx lr + 15817 .cfi_endproc + 15818 .LFE87: + 15820 .section .text.HAL_I2C_GetError,"ax",%progbits + 15821 .align 1 + 15822 .global HAL_I2C_GetError + 15823 .syntax unified + 15824 .code 16 + 15825 .thumb_func + 15827 HAL_I2C_GetError: + 15828 .LVL1214: + 15829 .LFB88: +4915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->ErrorCode; + 15830 .loc 1 4915 1 is_stmt 1 view -0 + 15831 .cfi_startproc + 15832 @ args = 0, pretend = 0, frame = 0 + 15833 @ frame_needed = 0, uses_anonymous_args = 0 + 15834 @ link register save eliminated. +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/cc4IUqI9.s page 498 + + + 15835 .loc 1 4916 3 view .LVU5230 +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15836 .loc 1 4916 14 is_stmt 0 view .LVU5231 + 15837 0000 406C ldr r0, [r0, #68] + 15838 .LVL1215: +4917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15839 .loc 1 4917 1 view .LVU5232 + 15840 @ sp needed + 15841 0002 7047 bx lr + 15842 .cfi_endproc + 15843 .LFE88: + 15845 .text + 15846 .Letext0: + 15847 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 15848 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 15849 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 15850 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 15851 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 15852 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 15853 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h" + 15854 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/cc4IUqI9.s page 499 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_i2c.c + /tmp/cc4IUqI9.s:19 .text.I2C_Flush_TXDR:00000000 $t + /tmp/cc4IUqI9.s:24 .text.I2C_Flush_TXDR:00000000 I2C_Flush_TXDR + /tmp/cc4IUqI9.s:64 .text.I2C_TransferConfig:00000000 $t + /tmp/cc4IUqI9.s:69 .text.I2C_TransferConfig:00000000 I2C_TransferConfig + /tmp/cc4IUqI9.s:127 .text.I2C_TransferConfig:00000030 $d + /tmp/cc4IUqI9.s:132 .text.I2C_Enable_IRQ:00000000 $t + /tmp/cc4IUqI9.s:137 .text.I2C_Enable_IRQ:00000000 I2C_Enable_IRQ + /tmp/cc4IUqI9.s:313 .text.I2C_Enable_IRQ:00000088 $d + /tmp/cc4IUqI9.s:14529 .text.I2C_Master_ISR_DMA:00000000 I2C_Master_ISR_DMA + /tmp/cc4IUqI9.s:14205 .text.I2C_Slave_ISR_DMA:00000000 I2C_Slave_ISR_DMA + /tmp/cc4IUqI9.s:13780 .text.I2C_Mem_ISR_DMA:00000000 I2C_Mem_ISR_DMA + /tmp/cc4IUqI9.s:320 .text.I2C_Disable_IRQ:00000000 $t + /tmp/cc4IUqI9.s:325 .text.I2C_Disable_IRQ:00000000 I2C_Disable_IRQ + /tmp/cc4IUqI9.s:466 .text.I2C_ConvertOtherXferOptions:00000000 $t + /tmp/cc4IUqI9.s:471 .text.I2C_ConvertOtherXferOptions:00000000 I2C_ConvertOtherXferOptions + /tmp/cc4IUqI9.s:516 .text.I2C_IsErrorOccurred:00000000 $t + /tmp/cc4IUqI9.s:521 .text.I2C_IsErrorOccurred:00000000 I2C_IsErrorOccurred + /tmp/cc4IUqI9.s:838 .text.I2C_IsErrorOccurred:00000114 $d + /tmp/cc4IUqI9.s:843 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 $t + /tmp/cc4IUqI9.s:848 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 I2C_WaitOnTXISFlagUntilTimeout + /tmp/cc4IUqI9.s:954 .text.I2C_WaitOnFlagUntilTimeout:00000000 $t + /tmp/cc4IUqI9.s:959 .text.I2C_WaitOnFlagUntilTimeout:00000000 I2C_WaitOnFlagUntilTimeout + /tmp/cc4IUqI9.s:1097 .text.I2C_RequestMemoryWrite:00000000 $t + /tmp/cc4IUqI9.s:1102 .text.I2C_RequestMemoryWrite:00000000 I2C_RequestMemoryWrite + /tmp/cc4IUqI9.s:1222 .text.I2C_RequestMemoryWrite:00000074 $d + /tmp/cc4IUqI9.s:1227 .text.I2C_RequestMemoryRead:00000000 $t + /tmp/cc4IUqI9.s:1232 .text.I2C_RequestMemoryRead:00000000 I2C_RequestMemoryRead + /tmp/cc4IUqI9.s:1348 .text.I2C_RequestMemoryRead:00000070 $d + /tmp/cc4IUqI9.s:1353 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 $t + /tmp/cc4IUqI9.s:1358 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 I2C_WaitOnSTOPFlagUntilTimeout + /tmp/cc4IUqI9.s:1464 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 $t + /tmp/cc4IUqI9.s:1469 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 I2C_WaitOnRXNEFlagUntilTimeout + /tmp/cc4IUqI9.s:1644 .text.I2C_WaitOnRXNEFlagUntilTimeout:0000009c $d + /tmp/cc4IUqI9.s:1649 .text.HAL_I2C_MspInit:00000000 $t + /tmp/cc4IUqI9.s:1655 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit + /tmp/cc4IUqI9.s:1671 .text.HAL_I2C_Init:00000000 $t + /tmp/cc4IUqI9.s:1677 .text.HAL_I2C_Init:00000000 HAL_I2C_Init + /tmp/cc4IUqI9.s:1892 .text.HAL_I2C_Init:000000cc $d + /tmp/cc4IUqI9.s:1900 .text.HAL_I2C_MspDeInit:00000000 $t + /tmp/cc4IUqI9.s:1906 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit + /tmp/cc4IUqI9.s:1922 .text.HAL_I2C_DeInit:00000000 $t + /tmp/cc4IUqI9.s:1928 .text.HAL_I2C_DeInit:00000000 HAL_I2C_DeInit + /tmp/cc4IUqI9.s:2000 .text.HAL_I2C_Master_Transmit:00000000 $t + /tmp/cc4IUqI9.s:2006 .text.HAL_I2C_Master_Transmit:00000000 HAL_I2C_Master_Transmit + /tmp/cc4IUqI9.s:2380 .text.HAL_I2C_Master_Transmit:00000190 $d + /tmp/cc4IUqI9.s:2386 .text.HAL_I2C_Master_Receive:00000000 $t + /tmp/cc4IUqI9.s:2392 .text.HAL_I2C_Master_Receive:00000000 HAL_I2C_Master_Receive + /tmp/cc4IUqI9.s:2716 .text.HAL_I2C_Master_Receive:0000016c $d + /tmp/cc4IUqI9.s:2722 .text.HAL_I2C_Slave_Transmit:00000000 $t + /tmp/cc4IUqI9.s:2728 .text.HAL_I2C_Slave_Transmit:00000000 HAL_I2C_Slave_Transmit + /tmp/cc4IUqI9.s:3225 .text.HAL_I2C_Slave_Transmit:00000208 $d + /tmp/cc4IUqI9.s:3230 .text.HAL_I2C_Slave_Receive:00000000 $t + /tmp/cc4IUqI9.s:3236 .text.HAL_I2C_Slave_Receive:00000000 HAL_I2C_Slave_Receive + /tmp/cc4IUqI9.s:3622 .text.HAL_I2C_Slave_Receive:0000018c $d + /tmp/cc4IUqI9.s:3627 .text.HAL_I2C_Master_Transmit_IT:00000000 $t + ARM GAS /tmp/cc4IUqI9.s page 500 + + + /tmp/cc4IUqI9.s:3633 .text.HAL_I2C_Master_Transmit_IT:00000000 HAL_I2C_Master_Transmit_IT + /tmp/cc4IUqI9.s:3835 .text.HAL_I2C_Master_Transmit_IT:000000b8 $d + /tmp/cc4IUqI9.s:13362 .text.I2C_Master_ISR_IT:00000000 I2C_Master_ISR_IT + /tmp/cc4IUqI9.s:3842 .text.HAL_I2C_Master_Receive_IT:00000000 $t + /tmp/cc4IUqI9.s:3848 .text.HAL_I2C_Master_Receive_IT:00000000 HAL_I2C_Master_Receive_IT + /tmp/cc4IUqI9.s:4005 .text.HAL_I2C_Master_Receive_IT:00000088 $d + /tmp/cc4IUqI9.s:4012 .text.HAL_I2C_Slave_Transmit_IT:00000000 $t + /tmp/cc4IUqI9.s:4018 .text.HAL_I2C_Slave_Transmit_IT:00000000 HAL_I2C_Slave_Transmit_IT + /tmp/cc4IUqI9.s:4167 .text.HAL_I2C_Slave_Transmit_IT:00000080 $d + /tmp/cc4IUqI9.s:12735 .text.I2C_Slave_ISR_IT:00000000 I2C_Slave_ISR_IT + /tmp/cc4IUqI9.s:4175 .text.HAL_I2C_Slave_Receive_IT:00000000 $t + /tmp/cc4IUqI9.s:4181 .text.HAL_I2C_Slave_Receive_IT:00000000 HAL_I2C_Slave_Receive_IT + /tmp/cc4IUqI9.s:4291 .text.HAL_I2C_Slave_Receive_IT:00000058 $d + /tmp/cc4IUqI9.s:4299 .text.HAL_I2C_Master_Transmit_DMA:00000000 $t + /tmp/cc4IUqI9.s:4305 .text.HAL_I2C_Master_Transmit_DMA:00000000 HAL_I2C_Master_Transmit_DMA + /tmp/cc4IUqI9.s:4688 .text.HAL_I2C_Master_Transmit_DMA:00000170 $d + /tmp/cc4IUqI9.s:14915 .text.I2C_DMAMasterTransmitCplt:00000000 I2C_DMAMasterTransmitCplt + /tmp/cc4IUqI9.s:14873 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z#q_;~g$w=4e|-Ht71LKREj=EUL)hE**O)#kV|?@<3`6$wK}=sU^szlRLP-^tLIgb4Lj;Lq#JkLi05`Y?o~KHk2mF}W8Y=hGWu}5!2UiVA>|?^!j*@EL?y6n~~!?iNkUO zAa{m0PWh7LJB-8jtqa*#DY;g_&Ml+*Zi7A)IrU*V_~`(-u)bSDey{-PzPux2`d)@U z#(V$q`i8~yZ3*eCg0RtgzDYbM{@V{%&{M?L=I%lo5PzT1#*M+h`=E3gsneJDotWJ2&B(QA z6>Z<1&B!HVa=n_7D~-t|A;)>C|9Ja~As6Tu7RWW_jpl>)GTpwS5l`(xh zv^5VhtUvC3czq|u^qmUhcwWMPyuK4-`sP933J6hOBmTU;OQp}3YdI#(1H3ZHk-R9T z?=|T2Gv7mMO*+v~MN;ynWBd^zoVZ?itGabWGop zkiL^b`reD_+m6nAO$L2`is`!r`X#4bGsi2js&3Hw!<&)E{w*J@VUU(OBb<2%d4E_xm`s zi638o&&2f2f<9k==R?lh_t%)dpFtn@UHr%E`yi&TBBbv^2z!0p)C}AA8uT$=|MB{| z#pJd%BR3=__deu&8&Id$H(7E%pN}AS^>|M?n@E*H4n;A=B=DJsats*a{9prUUykya zzOzoo`yG5{kYgG7Srn7&jm~)37?;NXz1;j*zUxlG@9CgoHbdre{P}!;5Yu4+Z8toZjlCNGp+5d?jmb6i&a%J39+!JEX5SXbZ4Egf z^X2EUn0?6$FyFvjp7nPF{=9uJK`sb|fF=88MaFYqUSgInstance)); + 40 .loc 1 99 3 is_stmt 1 view .LVU2 + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); + 41 .loc 1 100 3 view .LVU3 + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 42 .loc 1 102 3 view .LVU4 + 43 .loc 1 102 11 is_stmt 0 view .LVU5 + 44 0002 4123 movs r3, #65 + 45 0004 C35C ldrb r3, [r0, r3] + 46 .loc 1 102 6 view .LVU6 + 47 0006 202B cmp r3, #32 + 48 0008 20D1 bne .L3 + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 49 .loc 1 105 5 is_stmt 1 view .LVU7 + 50 .loc 1 105 5 view .LVU8 + 51 000a 2033 adds r3, r3, #32 + 52 000c C35C ldrb r3, [r0, r3] + 53 000e 012B cmp r3, #1 + 54 0010 1ED0 beq .L4 + 55 .loc 1 105 5 discriminator 2 view .LVU9 + 56 0012 4024 movs r4, #64 + 57 0014 0122 movs r2, #1 + 58 0016 0255 strb r2, [r0, r4] + 59 .loc 1 105 5 discriminator 2 view .LVU10 + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 60 .loc 1 107 5 view .LVU11 + 61 .loc 1 107 17 is_stmt 0 view .LVU12 + 62 0018 4125 movs r5, #65 + 63 001a 2423 movs r3, #36 + 64 001c 4355 strb r3, [r0, r5] + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + ARM GAS /tmp/cchtPf09.s page 4 + + + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 65 .loc 1 110 5 is_stmt 1 view .LVU13 + 66 001e 0668 ldr r6, [r0] + 67 0020 3368 ldr r3, [r6] + 68 0022 9343 bics r3, r2 + 69 0024 3360 str r3, [r6] + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Reset I2Cx ANOFF bit */ + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); + 70 .loc 1 113 5 view .LVU14 + 71 .loc 1 113 9 is_stmt 0 view .LVU15 + 72 0026 0668 ldr r6, [r0] + 73 .loc 1 113 19 view .LVU16 + 74 0028 3368 ldr r3, [r6] + 75 .loc 1 113 25 view .LVU17 + 76 002a 0A4F ldr r7, .L5 + 77 002c 3B40 ands r3, r7 + 78 002e 3360 str r3, [r6] + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Set analog filter bit*/ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= AnalogFilter; + 79 .loc 1 116 5 is_stmt 1 view .LVU18 + 80 .loc 1 116 9 is_stmt 0 view .LVU19 + 81 0030 0668 ldr r6, [r0] + 82 .loc 1 116 19 view .LVU20 + 83 0032 3368 ldr r3, [r6] + 84 .loc 1 116 25 view .LVU21 + 85 0034 0B43 orrs r3, r1 + 86 0036 3360 str r3, [r6] + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 87 .loc 1 118 5 is_stmt 1 view .LVU22 + 88 0038 0168 ldr r1, [r0] + 89 .LVL1: + 90 .loc 1 118 5 is_stmt 0 view .LVU23 + 91 003a 0B68 ldr r3, [r1] + 92 003c 1343 orrs r3, r2 + 93 003e 0B60 str r3, [r1] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 94 .loc 1 120 5 is_stmt 1 view .LVU24 + 95 .loc 1 120 17 is_stmt 0 view .LVU25 + 96 0040 2023 movs r3, #32 + 97 0042 4355 strb r3, [r0, r5] + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 98 .loc 1 123 5 is_stmt 1 view .LVU26 + 99 .loc 1 123 5 view .LVU27 + 100 0044 0023 movs r3, #0 + 101 0046 0355 strb r3, [r0, r4] + 102 .loc 1 123 5 view .LVU28 + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 103 .loc 1 125 5 view .LVU29 + 104 .loc 1 125 12 is_stmt 0 view .LVU30 + ARM GAS /tmp/cchtPf09.s page 5 + + + 105 0048 0020 movs r0, #0 + 106 .LVL2: + 107 .L2: + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 108 .loc 1 131 1 view .LVU31 + 109 @ sp needed + 110 004a F0BD pop {r4, r5, r6, r7, pc} + 111 .LVL3: + 112 .L3: + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 113 .loc 1 129 12 view .LVU32 + 114 004c 0220 movs r0, #2 + 115 .LVL4: + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 116 .loc 1 129 12 view .LVU33 + 117 004e FCE7 b .L2 + 118 .LVL5: + 119 .L4: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 120 .loc 1 105 5 discriminator 1 view .LVU34 + 121 0050 0220 movs r0, #2 + 122 .LVL6: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 123 .loc 1 105 5 discriminator 1 view .LVU35 + 124 0052 FAE7 b .L2 + 125 .L6: + 126 .align 2 + 127 .L5: + 128 0054 FFEFFFFF .word -4097 + 129 .cfi_endproc + 130 .LFE40: + 132 .section .text.HAL_I2CEx_ConfigDigitalFilter,"ax",%progbits + 133 .align 1 + 134 .global HAL_I2CEx_ConfigDigitalFilter + 135 .syntax unified + 136 .code 16 + 137 .thumb_func + 139 HAL_I2CEx_ConfigDigitalFilter: + 140 .LVL7: + 141 .LFB41: + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Configure I2C Digital noise filter. + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 142 .loc 1 141 1 is_stmt 1 view -0 + 143 .cfi_startproc + ARM GAS /tmp/cchtPf09.s page 6 + + + 144 @ args = 0, pretend = 0, frame = 0 + 145 @ frame_needed = 0, uses_anonymous_args = 0 + 146 .loc 1 141 1 is_stmt 0 view .LVU37 + 147 0000 F0B5 push {r4, r5, r6, r7, lr} + 148 .cfi_def_cfa_offset 20 + 149 .cfi_offset 4, -20 + 150 .cfi_offset 5, -16 + 151 .cfi_offset 6, -12 + 152 .cfi_offset 7, -8 + 153 .cfi_offset 14, -4 + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** uint32_t tmpreg; + 154 .loc 1 142 3 is_stmt 1 view .LVU38 + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 155 .loc 1 145 3 view .LVU39 + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); + 156 .loc 1 146 3 view .LVU40 + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 157 .loc 1 148 3 view .LVU41 + 158 .loc 1 148 11 is_stmt 0 view .LVU42 + 159 0002 4123 movs r3, #65 + 160 0004 C35C ldrb r3, [r0, r3] + 161 .loc 1 148 6 view .LVU43 + 162 0006 202B cmp r3, #32 + 163 0008 1ED1 bne .L9 + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 164 .loc 1 151 5 is_stmt 1 view .LVU44 + 165 .loc 1 151 5 view .LVU45 + 166 000a 2033 adds r3, r3, #32 + 167 000c C35C ldrb r3, [r0, r3] + 168 000e 012B cmp r3, #1 + 169 0010 1CD0 beq .L10 + 170 .loc 1 151 5 discriminator 2 view .LVU46 + 171 0012 4024 movs r4, #64 + 172 0014 0122 movs r2, #1 + 173 0016 0255 strb r2, [r0, r4] + 174 .loc 1 151 5 discriminator 2 view .LVU47 + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 175 .loc 1 153 5 view .LVU48 + 176 .loc 1 153 17 is_stmt 0 view .LVU49 + 177 0018 4125 movs r5, #65 + 178 001a 2423 movs r3, #36 + 179 001c 4355 strb r3, [r0, r5] + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 180 .loc 1 156 5 is_stmt 1 view .LVU50 + 181 001e 0668 ldr r6, [r0] + 182 0020 3368 ldr r3, [r6] + 183 0022 9343 bics r3, r2 + 184 0024 3360 str r3, [r6] + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + ARM GAS /tmp/cchtPf09.s page 7 + + + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Get the old register value */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg = hi2c->Instance->CR1; + 185 .loc 1 159 5 view .LVU51 + 186 .loc 1 159 18 is_stmt 0 view .LVU52 + 187 0026 0668 ldr r6, [r0] + 188 .loc 1 159 12 view .LVU53 + 189 0028 3368 ldr r3, [r6] + 190 .LVL8: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Reset I2Cx DNF bits [11:8] */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg &= ~(I2C_CR1_DNF); + 191 .loc 1 162 5 is_stmt 1 view .LVU54 + 192 .loc 1 162 12 is_stmt 0 view .LVU55 + 193 002a 094F ldr r7, .L11 + 194 002c 3B40 ands r3, r7 + 195 .LVL9: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Set I2Cx DNF coefficient */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg |= DigitalFilter << 8U; + 196 .loc 1 165 5 is_stmt 1 view .LVU56 + 197 .loc 1 165 29 is_stmt 0 view .LVU57 + 198 002e 0902 lsls r1, r1, #8 + 199 .LVL10: + 200 .loc 1 165 12 view .LVU58 + 201 0030 1943 orrs r1, r3 + 202 .LVL11: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Store the new register value */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 = tmpreg; + 203 .loc 1 168 5 is_stmt 1 view .LVU59 + 204 .loc 1 168 25 is_stmt 0 view .LVU60 + 205 0032 3160 str r1, [r6] + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 206 .loc 1 170 5 is_stmt 1 view .LVU61 + 207 0034 0168 ldr r1, [r0] + 208 .LVL12: + 209 .loc 1 170 5 is_stmt 0 view .LVU62 + 210 0036 0B68 ldr r3, [r1] + 211 0038 1343 orrs r3, r2 + 212 003a 0B60 str r3, [r1] + 213 .LVL13: + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 214 .loc 1 172 5 is_stmt 1 view .LVU63 + 215 .loc 1 172 17 is_stmt 0 view .LVU64 + 216 003c 2023 movs r3, #32 + 217 003e 4355 strb r3, [r0, r5] + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 218 .loc 1 175 5 is_stmt 1 view .LVU65 + 219 .loc 1 175 5 view .LVU66 + 220 0040 0023 movs r3, #0 + 221 0042 0355 strb r3, [r0, r4] + 222 .loc 1 175 5 view .LVU67 + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + ARM GAS /tmp/cchtPf09.s page 8 + + + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 223 .loc 1 177 5 view .LVU68 + 224 .loc 1 177 12 is_stmt 0 view .LVU69 + 225 0044 0020 movs r0, #0 + 226 .LVL14: + 227 .L8: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 228 .loc 1 183 1 view .LVU70 + 229 @ sp needed + 230 0046 F0BD pop {r4, r5, r6, r7, pc} + 231 .LVL15: + 232 .L9: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 233 .loc 1 181 12 view .LVU71 + 234 0048 0220 movs r0, #2 + 235 .LVL16: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 236 .loc 1 181 12 view .LVU72 + 237 004a FCE7 b .L8 + 238 .LVL17: + 239 .L10: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 240 .loc 1 151 5 discriminator 1 view .LVU73 + 241 004c 0220 movs r0, #2 + 242 .LVL18: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 243 .loc 1 151 5 discriminator 1 view .LVU74 + 244 004e FAE7 b .L8 + 245 .L12: + 246 .align 2 + 247 .L11: + 248 0050 FFF0FFFF .word -3841 + 249 .cfi_endproc + 250 .LFE41: + 252 .section .text.HAL_I2CEx_EnableWakeUp,"ax",%progbits + 253 .align 1 + 254 .global HAL_I2CEx_EnableWakeUp + 255 .syntax unified + 256 .code 16 + 257 .thumb_func + 259 HAL_I2CEx_EnableWakeUp: + 260 .LVL19: + 261 .LFB42: + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @} + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #if defined(I2C_CR1_WUPEN) + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief WakeUp Mode Functions + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @verbatim + ARM GAS /tmp/cchtPf09.s page 9 + + + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### WakeUp Mode Functions ##### + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Configure Wake Up Feature + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @endverbatim + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Enable I2C wakeup from Stop mode(s). + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c) + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 262 .loc 1 210 1 is_stmt 1 view -0 + 263 .cfi_startproc + 264 @ args = 0, pretend = 0, frame = 0 + 265 @ frame_needed = 0, uses_anonymous_args = 0 + 266 .loc 1 210 1 is_stmt 0 view .LVU76 + 267 0000 70B5 push {r4, r5, r6, lr} + 268 .cfi_def_cfa_offset 16 + 269 .cfi_offset 4, -16 + 270 .cfi_offset 5, -12 + 271 .cfi_offset 6, -8 + 272 .cfi_offset 14, -4 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + 273 .loc 1 212 3 is_stmt 1 view .LVU77 + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 274 .loc 1 214 3 view .LVU78 + 275 .loc 1 214 11 is_stmt 0 view .LVU79 + 276 0002 4123 movs r3, #65 + 277 0004 C35C ldrb r3, [r0, r3] + 278 .loc 1 214 6 view .LVU80 + 279 0006 202B cmp r3, #32 + 280 0008 1DD1 bne .L15 + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 281 .loc 1 217 5 is_stmt 1 view .LVU81 + 282 .loc 1 217 5 view .LVU82 + 283 000a 2033 adds r3, r3, #32 + 284 000c C35C ldrb r3, [r0, r3] + 285 000e 012B cmp r3, #1 + 286 0010 1BD0 beq .L16 + 287 .loc 1 217 5 discriminator 2 view .LVU83 + 288 0012 4021 movs r1, #64 + 289 0014 0122 movs r2, #1 + 290 0016 4254 strb r2, [r0, r1] + 291 .loc 1 217 5 discriminator 2 view .LVU84 + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + ARM GAS /tmp/cchtPf09.s page 10 + + + 292 .loc 1 219 5 view .LVU85 + 293 .loc 1 219 17 is_stmt 0 view .LVU86 + 294 0018 4124 movs r4, #65 + 295 001a 2423 movs r3, #36 + 296 001c 0355 strb r3, [r0, r4] + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 297 .loc 1 222 5 is_stmt 1 view .LVU87 + 298 001e 0568 ldr r5, [r0] + 299 0020 2B68 ldr r3, [r5] + 300 0022 9343 bics r3, r2 + 301 0024 2B60 str r3, [r5] + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= I2C_CR1_WUPEN; + 302 .loc 1 225 5 view .LVU88 + 303 .loc 1 225 9 is_stmt 0 view .LVU89 + 304 0026 0568 ldr r5, [r0] + 305 .loc 1 225 19 view .LVU90 + 306 0028 2E68 ldr r6, [r5] + 307 .loc 1 225 25 view .LVU91 + 308 002a 8023 movs r3, #128 + 309 002c DB02 lsls r3, r3, #11 + 310 002e 3343 orrs r3, r6 + 311 0030 2B60 str r3, [r5] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 312 .loc 1 227 5 is_stmt 1 view .LVU92 + 313 0032 0568 ldr r5, [r0] + 314 0034 2B68 ldr r3, [r5] + 315 0036 1343 orrs r3, r2 + 316 0038 2B60 str r3, [r5] + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 317 .loc 1 229 5 view .LVU93 + 318 .loc 1 229 17 is_stmt 0 view .LVU94 + 319 003a 2023 movs r3, #32 + 320 003c 0355 strb r3, [r0, r4] + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 321 .loc 1 232 5 is_stmt 1 view .LVU95 + 322 .loc 1 232 5 view .LVU96 + 323 003e 0023 movs r3, #0 + 324 0040 4354 strb r3, [r0, r1] + 325 .loc 1 232 5 view .LVU97 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 326 .loc 1 234 5 view .LVU98 + 327 .loc 1 234 12 is_stmt 0 view .LVU99 + 328 0042 0020 movs r0, #0 + 329 .LVL20: + 330 .L14: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + ARM GAS /tmp/cchtPf09.s page 11 + + + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 331 .loc 1 240 1 view .LVU100 + 332 @ sp needed + 333 0044 70BD pop {r4, r5, r6, pc} + 334 .LVL21: + 335 .L15: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 336 .loc 1 238 12 view .LVU101 + 337 0046 0220 movs r0, #2 + 338 .LVL22: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 339 .loc 1 238 12 view .LVU102 + 340 0048 FCE7 b .L14 + 341 .LVL23: + 342 .L16: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 343 .loc 1 217 5 discriminator 1 view .LVU103 + 344 004a 0220 movs r0, #2 + 345 .LVL24: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 346 .loc 1 217 5 discriminator 1 view .LVU104 + 347 004c FAE7 b .L14 + 348 .cfi_endproc + 349 .LFE42: + 351 .section .text.HAL_I2CEx_DisableWakeUp,"ax",%progbits + 352 .align 1 + 353 .global HAL_I2CEx_DisableWakeUp + 354 .syntax unified + 355 .code 16 + 356 .thumb_func + 358 HAL_I2CEx_DisableWakeUp: + 359 .LVL25: + 360 .LFB43: + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Disable I2C wakeup from Stop mode(s). + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 361 .loc 1 249 1 is_stmt 1 view -0 + 362 .cfi_startproc + 363 @ args = 0, pretend = 0, frame = 0 + 364 @ frame_needed = 0, uses_anonymous_args = 0 + 365 .loc 1 249 1 is_stmt 0 view .LVU106 + 366 0000 70B5 push {r4, r5, r6, lr} + 367 .cfi_def_cfa_offset 16 + 368 .cfi_offset 4, -16 + 369 .cfi_offset 5, -12 + 370 .cfi_offset 6, -8 + 371 .cfi_offset 14, -4 + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + ARM GAS /tmp/cchtPf09.s page 12 + + + 372 .loc 1 251 3 is_stmt 1 view .LVU107 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 373 .loc 1 253 3 view .LVU108 + 374 .loc 1 253 11 is_stmt 0 view .LVU109 + 375 0002 4123 movs r3, #65 + 376 0004 C35C ldrb r3, [r0, r3] + 377 .loc 1 253 6 view .LVU110 + 378 0006 202B cmp r3, #32 + 379 0008 1CD1 bne .L19 + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 380 .loc 1 256 5 is_stmt 1 view .LVU111 + 381 .loc 1 256 5 view .LVU112 + 382 000a 2033 adds r3, r3, #32 + 383 000c C35C ldrb r3, [r0, r3] + 384 000e 012B cmp r3, #1 + 385 0010 1AD0 beq .L20 + 386 .loc 1 256 5 discriminator 2 view .LVU113 + 387 0012 4021 movs r1, #64 + 388 0014 0122 movs r2, #1 + 389 0016 4254 strb r2, [r0, r1] + 390 .loc 1 256 5 discriminator 2 view .LVU114 + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 391 .loc 1 258 5 view .LVU115 + 392 .loc 1 258 17 is_stmt 0 view .LVU116 + 393 0018 4124 movs r4, #65 + 394 001a 2423 movs r3, #36 + 395 001c 0355 strb r3, [r0, r4] + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 396 .loc 1 261 5 is_stmt 1 view .LVU117 + 397 001e 0568 ldr r5, [r0] + 398 0020 2B68 ldr r3, [r5] + 399 0022 9343 bics r3, r2 + 400 0024 2B60 str r3, [r5] + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN); + 401 .loc 1 264 5 view .LVU118 + 402 .loc 1 264 9 is_stmt 0 view .LVU119 + 403 0026 0568 ldr r5, [r0] + 404 .loc 1 264 19 view .LVU120 + 405 0028 2B68 ldr r3, [r5] + 406 .loc 1 264 25 view .LVU121 + 407 002a 084E ldr r6, .L21 + 408 002c 3340 ands r3, r6 + 409 002e 2B60 str r3, [r5] + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 410 .loc 1 266 5 is_stmt 1 view .LVU122 + 411 0030 0568 ldr r5, [r0] + 412 0032 2B68 ldr r3, [r5] + 413 0034 1343 orrs r3, r2 + ARM GAS /tmp/cchtPf09.s page 13 + + + 414 0036 2B60 str r3, [r5] + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 415 .loc 1 268 5 view .LVU123 + 416 .loc 1 268 17 is_stmt 0 view .LVU124 + 417 0038 2023 movs r3, #32 + 418 003a 0355 strb r3, [r0, r4] + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 419 .loc 1 271 5 is_stmt 1 view .LVU125 + 420 .loc 1 271 5 view .LVU126 + 421 003c 0023 movs r3, #0 + 422 003e 4354 strb r3, [r0, r1] + 423 .loc 1 271 5 view .LVU127 + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 424 .loc 1 273 5 view .LVU128 + 425 .loc 1 273 12 is_stmt 0 view .LVU129 + 426 0040 0020 movs r0, #0 + 427 .LVL26: + 428 .L18: + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 429 .loc 1 279 1 view .LVU130 + 430 @ sp needed + 431 0042 70BD pop {r4, r5, r6, pc} + 432 .LVL27: + 433 .L19: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 434 .loc 1 277 12 view .LVU131 + 435 0044 0220 movs r0, #2 + 436 .LVL28: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 437 .loc 1 277 12 view .LVU132 + 438 0046 FCE7 b .L18 + 439 .LVL29: + 440 .L20: + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 441 .loc 1 256 5 discriminator 1 view .LVU133 + 442 0048 0220 movs r0, #2 + 443 .LVL30: + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 444 .loc 1 256 5 discriminator 1 view .LVU134 + 445 004a FAE7 b .L18 + 446 .L22: + 447 .align 2 + 448 .L21: + 449 004c FFFFFBFF .word -262145 + 450 .cfi_endproc + 451 .LFE43: + 453 .section .text.HAL_I2CEx_EnableFastModePlus,"ax",%progbits + 454 .align 1 + ARM GAS /tmp/cchtPf09.s page 14 + + + 455 .global HAL_I2CEx_EnableFastModePlus + 456 .syntax unified + 457 .code 16 + 458 .thumb_func + 460 HAL_I2CEx_EnableFastModePlus: + 461 .LVL31: + 462 .LFB44: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @} + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #endif /* I2C_CR1_WUPEN */ + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Fast Mode Plus Functions + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @verbatim + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### Fast Mode Plus Functions ##### + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Configure Fast Mode Plus + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @endverbatim + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Enable the I2C fast mode plus driving capability. + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be enabled on all selected + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be enabled + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval None + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus) + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 463 .loc 1 313 1 is_stmt 1 view -0 + 464 .cfi_startproc + 465 @ args = 0, pretend = 0, frame = 8 + 466 @ frame_needed = 0, uses_anonymous_args = 0 + 467 @ link register save eliminated. + 468 .loc 1 313 1 is_stmt 0 view .LVU136 + 469 0000 82B0 sub sp, sp, #8 + 470 .cfi_def_cfa_offset 8 + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameter */ + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 471 .loc 1 315 3 is_stmt 1 view .LVU137 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 472 .loc 1 318 3 view .LVU138 + 473 .LBB2: + ARM GAS /tmp/cchtPf09.s page 15 + + + 474 .loc 1 318 3 view .LVU139 + 475 .loc 1 318 3 view .LVU140 + 476 0002 074A ldr r2, .L24 + 477 0004 9169 ldr r1, [r2, #24] + 478 0006 0123 movs r3, #1 + 479 0008 1943 orrs r1, r3 + 480 000a 9161 str r1, [r2, #24] + 481 .loc 1 318 3 view .LVU141 + 482 000c 9269 ldr r2, [r2, #24] + 483 000e 1340 ands r3, r2 + 484 0010 0193 str r3, [sp, #4] + 485 .loc 1 318 3 view .LVU142 + 486 0012 019B ldr r3, [sp, #4] + 487 .LBE2: + 488 .loc 1 318 3 view .LVU143 + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable fast mode plus driving capability for selected pin */ + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 489 .loc 1 321 3 view .LVU144 + 490 0014 034A ldr r2, .L24+4 + 491 0016 1368 ldr r3, [r2] + 492 0018 0343 orrs r3, r0 + 493 001a 1360 str r3, [r2] + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 494 .loc 1 322 1 is_stmt 0 view .LVU145 + 495 001c 02B0 add sp, sp, #8 + 496 @ sp needed + 497 001e 7047 bx lr + 498 .L25: + 499 .align 2 + 500 .L24: + 501 0020 00100240 .word 1073876992 + 502 0024 00000140 .word 1073807360 + 503 .cfi_endproc + 504 .LFE44: + 506 .section .text.HAL_I2CEx_DisableFastModePlus,"ax",%progbits + 507 .align 1 + 508 .global HAL_I2CEx_DisableFastModePlus + 509 .syntax unified + 510 .code 16 + 511 .thumb_func + 513 HAL_I2CEx_DisableFastModePlus: + 514 .LVL32: + 515 .LFB45: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Disable the I2C fast mode plus driving capability. + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be disabled on all selected + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be disabled + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval None + ARM GAS /tmp/cchtPf09.s page 16 + + + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 516 .loc 1 338 1 is_stmt 1 view -0 + 517 .cfi_startproc + 518 @ args = 0, pretend = 0, frame = 8 + 519 @ frame_needed = 0, uses_anonymous_args = 0 + 520 @ link register save eliminated. + 521 .loc 1 338 1 is_stmt 0 view .LVU147 + 522 0000 82B0 sub sp, sp, #8 + 523 .cfi_def_cfa_offset 8 + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameter */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 524 .loc 1 340 3 is_stmt 1 view .LVU148 + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 525 .loc 1 343 3 view .LVU149 + 526 .LBB3: + 527 .loc 1 343 3 view .LVU150 + 528 .loc 1 343 3 view .LVU151 + 529 0002 074A ldr r2, .L27 + 530 0004 9169 ldr r1, [r2, #24] + 531 0006 0123 movs r3, #1 + 532 0008 1943 orrs r1, r3 + 533 000a 9161 str r1, [r2, #24] + 534 .loc 1 343 3 view .LVU152 + 535 000c 9269 ldr r2, [r2, #24] + 536 000e 1340 ands r3, r2 + 537 0010 0193 str r3, [sp, #4] + 538 .loc 1 343 3 view .LVU153 + 539 0012 019B ldr r3, [sp, #4] + 540 .LBE3: + 541 .loc 1 343 3 view .LVU154 + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable fast mode plus driving capability for selected pin */ + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 542 .loc 1 346 3 view .LVU155 + 543 0014 034A ldr r2, .L27+4 + 544 0016 1368 ldr r3, [r2] + 545 0018 8343 bics r3, r0 + 546 001a 1360 str r3, [r2] + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 547 .loc 1 347 1 is_stmt 0 view .LVU156 + 548 001c 02B0 add sp, sp, #8 + 549 @ sp needed + 550 001e 7047 bx lr + 551 .L28: + 552 .align 2 + 553 .L27: + 554 0020 00100240 .word 1073876992 + 555 0024 00000140 .word 1073807360 + 556 .cfi_endproc + 557 .LFE45: + 559 .text + 560 .Letext0: + 561 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + ARM GAS /tmp/cchtPf09.s page 17 + + + 562 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 563 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 564 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 565 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 566 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h" + ARM GAS /tmp/cchtPf09.s page 18 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_i2c_ex.c + /tmp/cchtPf09.s:19 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t + /tmp/cchtPf09.s:25 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter + /tmp/cchtPf09.s:128 .text.HAL_I2CEx_ConfigAnalogFilter:00000054 $d + /tmp/cchtPf09.s:133 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t + /tmp/cchtPf09.s:139 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter + /tmp/cchtPf09.s:248 .text.HAL_I2CEx_ConfigDigitalFilter:00000050 $d + /tmp/cchtPf09.s:253 .text.HAL_I2CEx_EnableWakeUp:00000000 $t + /tmp/cchtPf09.s:259 .text.HAL_I2CEx_EnableWakeUp:00000000 HAL_I2CEx_EnableWakeUp + /tmp/cchtPf09.s:352 .text.HAL_I2CEx_DisableWakeUp:00000000 $t + /tmp/cchtPf09.s:358 .text.HAL_I2CEx_DisableWakeUp:00000000 HAL_I2CEx_DisableWakeUp + /tmp/cchtPf09.s:449 .text.HAL_I2CEx_DisableWakeUp:0000004c $d + /tmp/cchtPf09.s:454 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t + /tmp/cchtPf09.s:460 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus + /tmp/cchtPf09.s:501 .text.HAL_I2CEx_EnableFastModePlus:00000020 $d + /tmp/cchtPf09.s:507 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t + /tmp/cchtPf09.s:513 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus + /tmp/cchtPf09.s:554 .text.HAL_I2CEx_DisableFastModePlus:00000020 $d + +NO UNDEFINED SYMBOLS diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o new file mode 100644 index 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z^$*j20e$)d1Ja+O^$GnK2+2OJ6X*vCVYH6gZO;9AM(ui;SN)?souO1eMF=~K%x4K< z?-cWQ6Tz-&5)F_XeKiLB_LPYR-AHj@z@B+ano2-Z?_7xFhl@%C559Dc(X$&pl~cde3?Jr|e;`$?2TCL(UxZVcP-oN%|Jlw-;ImxRpFvOVJ~04h;!ljJXgpE#oVg*I{drW J>CR |= (uint32_t)PWR_CR_DBP; + 69 .loc 1 88 3 view .LVU5 + 70 .loc 1 88 6 is_stmt 0 view .LVU6 + 71 0000 034A ldr r2, .L5 + 72 0002 1168 ldr r1, [r2] + 73 .loc 1 88 11 view .LVU7 + 74 0004 8023 movs r3, #128 + 75 0006 5B00 lsls r3, r3, #1 + 76 0008 0B43 orrs r3, r1 + 77 000a 1360 str r3, [r2] + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 78 .loc 1 89 1 view .LVU8 + 79 @ sp needed + 80 000c 7047 bx lr + 81 .L6: + 82 000e C046 .align 2 + 83 .L5: + 84 0010 00700040 .word 1073770496 + 85 .cfi_endproc + ARM GAS /tmp/cco6kzQ6.s page 4 + + + 86 .LFE41: + 88 .section .text.HAL_PWR_DisableBkUpAccess,"ax",%progbits + 89 .align 1 + 90 .global HAL_PWR_DisableBkUpAccess + 91 .syntax unified + 92 .code 16 + 93 .thumb_func + 95 HAL_PWR_DisableBkUpAccess: + 96 .LFB42: + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables access to the backup domain (RTC registers, RTC + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * backup data registers when present). + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void) + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 97 .loc 1 99 1 is_stmt 1 view -0 + 98 .cfi_startproc + 99 @ args = 0, pretend = 0, frame = 0 + 100 @ frame_needed = 0, uses_anonymous_args = 0 + 101 @ link register save eliminated. + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR &= ~((uint32_t)PWR_CR_DBP); + 102 .loc 1 100 3 view .LVU10 + 103 .loc 1 100 6 is_stmt 0 view .LVU11 + 104 0000 024A ldr r2, .L8 + 105 0002 1368 ldr r3, [r2] + 106 .loc 1 100 11 view .LVU12 + 107 0004 0249 ldr r1, .L8+4 + 108 0006 0B40 ands r3, r1 + 109 0008 1360 str r3, [r2] + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 110 .loc 1 101 1 view .LVU13 + 111 @ sp needed + 112 000a 7047 bx lr + 113 .L9: + 114 .align 2 + 115 .L8: + 116 000c 00700040 .word 1073770496 + 117 0010 FFFEFFFF .word -257 + 118 .cfi_endproc + 119 .LFE42: + 121 .section .text.HAL_PWR_EnableWakeUpPin,"ax",%progbits + 122 .align 1 + 123 .global HAL_PWR_EnableWakeUpPin + 124 .syntax unified + 125 .code 16 + 126 .thumb_func + 128 HAL_PWR_EnableWakeUpPin: + 129 .LVL0: + 130 .LFB43: + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @} + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + ARM GAS /tmp/cco6kzQ6.s page 5 + + + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Low Power modes configuration functions + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @verbatim + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ##### Peripheral Control functions ##### + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** WakeUp pin configuration *** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================================ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** forced in input pull down configuration and is active on rising edges. + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) There are two WakeUp pins, and up to eight Wakeup pins on STM32F07x & STM32F09x devices. + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 1 on PA.00. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 2 on PC.13. + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 3 on PE.06.(STM32F07x/STM32F09x) + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 4 on PA.02.(STM32F07x/STM32F09x) + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 5 on PC.05.(STM32F07x/STM32F09x) + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 6 on PB.05.(STM32F07x/STM32F09x) + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 7 on PB.15.(STM32F07x/STM32F09x) + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 8 on PF.02.(STM32F07x/STM32F09x) + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Low Power modes configuration *** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ===================================== + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The devices feature 3 low-power modes: + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Sleep mode: Cortex-M0 core stopped, peripherals kept running. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Stop mode: all clocks are stopped, regulator running, regulator + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** in low power mode + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Standby mode: 1.2V domain powered off (mode not available on STM32F0x8 devices). + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Sleep mode *** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================== + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_S + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** functions with + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Any peripheral interrupt acknowledged by the nested vectored interrupt + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** controller (NVIC) can wake up the device from Sleep mode. + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Stop mode *** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================= + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI, + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** and the HSE RC oscillators are disabled. Internal SRAM and register contents + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** are preserved. + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The voltage regulator can be configured either in normal or low-power mode. + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** To minimize the consumption. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + ARM GAS /tmp/cco6kzQ6.s page 6 + + + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPEN + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** function with: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Main regulator ON. + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Low Power regulator ON. + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode. + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Some specific communication peripherals (CEC, USART, I2C) interrupts, + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** when programmed in wakeup mode (the peripheral must be + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** programmed in wakeup mode and the corresponding interrupt vector + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** must be enabled in the NVIC) + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Standby mode *** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ==================== + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Standby mode allows to achieve the lowest power consumption. It is based + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** on the Cortex-M0 deep sleep mode, with the voltage regulator disabled. + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** the HSE oscillator are also switched off. SRAM and register contents are lost + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** except for the RTC registers, RTC backup registers and Standby circuitry. + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The voltage regulator is OFF. + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) WKUP pin rising edge, RTC alarm (Alarm A), RTC wakeup, + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tamper event, time-stamp event, external reset in NRST pin, IWDG reset. + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Auto-wakeup (AWU) from low-power mode *** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ============================================= + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** Wakeup event, a tamper event, a time-stamp event, or a comparator event, + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** without depending on an external interrupt (Auto-wakeup mode). + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) RTC auto-wakeup (AWU) from the Stop and Standby modes + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions. + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Comparator auto-wakeup (AWU) from the Stop mode + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for c + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** to be sensitive to to the selected edges (falling, rising or falling + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** and rising) (Interrupt or Event modes) using the EXTI_Init() function. + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+++) Configure the comparator to generate the event. + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @endverbatim + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + ARM GAS /tmp/cco6kzQ6.s page 7 + + + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enables the WakeUp PINx functionality. + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to enable. + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be value of : + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @ref PWREx_WakeUp_Pins + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 131 .loc 1 230 1 is_stmt 1 view -0 + 132 .cfi_startproc + 133 @ args = 0, pretend = 0, frame = 0 + 134 @ frame_needed = 0, uses_anonymous_args = 0 + 135 @ link register save eliminated. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 136 .loc 1 232 3 view .LVU15 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Enable the EWUPx pin */ + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(PWR->CSR, WakeUpPinx); + 137 .loc 1 234 3 view .LVU16 + 138 0000 024A ldr r2, .L11 + 139 0002 5368 ldr r3, [r2, #4] + 140 0004 0343 orrs r3, r0 + 141 0006 5360 str r3, [r2, #4] + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 142 .loc 1 235 1 is_stmt 0 view .LVU17 + 143 @ sp needed + 144 0008 7047 bx lr + 145 .L12: + 146 000a C046 .align 2 + 147 .L11: + 148 000c 00700040 .word 1073770496 + 149 .cfi_endproc + 150 .LFE43: + 152 .section .text.HAL_PWR_DisableWakeUpPin,"ax",%progbits + 153 .align 1 + 154 .global HAL_PWR_DisableWakeUpPin + 155 .syntax unified + 156 .code 16 + 157 .thumb_func + 159 HAL_PWR_DisableWakeUpPin: + 160 .LVL1: + 161 .LFB44: + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables the WakeUp PINx functionality. + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to disable. + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be values of : + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @ref PWREx_WakeUp_Pins + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 162 .loc 1 245 1 is_stmt 1 view -0 + 163 .cfi_startproc + ARM GAS /tmp/cco6kzQ6.s page 8 + + + 164 @ args = 0, pretend = 0, frame = 0 + 165 @ frame_needed = 0, uses_anonymous_args = 0 + 166 @ link register save eliminated. + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 167 .loc 1 247 3 view .LVU19 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Disable the EWUPx pin */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(PWR->CSR, WakeUpPinx); + 168 .loc 1 249 3 view .LVU20 + 169 0000 024A ldr r2, .L14 + 170 0002 5368 ldr r3, [r2, #4] + 171 0004 8343 bics r3, r0 + 172 0006 5360 str r3, [r2, #4] + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 173 .loc 1 250 1 is_stmt 0 view .LVU21 + 174 @ sp needed + 175 0008 7047 bx lr + 176 .L15: + 177 000a C046 .align 2 + 178 .L14: + 179 000c 00700040 .word 1073770496 + 180 .cfi_endproc + 181 .LFE44: + 183 .section .text.HAL_PWR_EnterSLEEPMode,"ax",%progbits + 184 .align 1 + 185 .global HAL_PWR_EnterSLEEPMode + 186 .syntax unified + 187 .code 16 + 188 .thumb_func + 190 HAL_PWR_EnterSLEEPMode: + 191 .LVL2: + 192 .LFB45: + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters Sleep mode. + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Sleep mode, all I/O pins keep the same state as in Run mode. + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in SLEEP mode. + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * On STM32F0 devices, this parameter is a dummy value and it is ignored + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * as regulator can't be modified in this mode. Parameter is kept for platform + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * compatibility. + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction. + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * When WFI entry is used, tick interrupt have to be disabled if not desired as + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * the interrupt wake up source. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 193 .loc 1 268 1 is_stmt 1 view -0 + 194 .cfi_startproc + 195 @ args = 0, pretend = 0, frame = 0 + 196 @ frame_needed = 0, uses_anonymous_args = 0 + 197 @ link register save eliminated. + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); + ARM GAS /tmp/cco6kzQ6.s page 9 + + + 198 .loc 1 270 3 view .LVU23 + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); + 199 .loc 1 271 3 view .LVU24 + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SLEEPDEEP bit of Cortex System Control Register */ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 200 .loc 1 274 3 view .LVU25 + 201 .loc 1 274 6 is_stmt 0 view .LVU26 + 202 0000 064A ldr r2, .L20 + 203 0002 1369 ldr r3, [r2, #16] + 204 .loc 1 274 12 view .LVU27 + 205 0004 0420 movs r0, #4 + 206 .LVL3: + 207 .loc 1 274 12 view .LVU28 + 208 0006 8343 bics r3, r0 + 209 0008 1361 str r3, [r2, #16] + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select SLEEP mode entry -------------------------------------------------*/ + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** if(SLEEPEntry == PWR_SLEEPENTRY_WFI) + 210 .loc 1 277 3 is_stmt 1 view .LVU29 + 211 .loc 1 277 5 is_stmt 0 view .LVU30 + 212 000a 0129 cmp r1, #1 + 213 000c 03D0 beq .L19 + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** else + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Event */ + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __SEV(); + 214 .loc 1 285 5 is_stmt 1 view .LVU31 + 215 .syntax divided + 216 @ 285 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 217 000e 40BF sev + 218 @ 0 "" 2 + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 219 .loc 1 286 5 view .LVU32 + 220 @ 286 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 221 0010 20BF wfe + 222 @ 0 "" 2 + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 223 .loc 1 287 5 view .LVU33 + 224 @ 287 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 225 0012 20BF wfe + 226 @ 0 "" 2 + 227 .thumb + 228 .syntax unified + 229 .L16: + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 230 .loc 1 289 1 is_stmt 0 view .LVU34 + 231 @ sp needed + 232 0014 7047 bx lr + 233 .L19: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 234 .loc 1 280 5 is_stmt 1 view .LVU35 + ARM GAS /tmp/cco6kzQ6.s page 10 + + + 235 .syntax divided + 236 @ 280 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 237 0016 30BF wfi + 238 @ 0 "" 2 + 239 .thumb + 240 .syntax unified + 241 0018 FCE7 b .L16 + 242 .L21: + 243 001a C046 .align 2 + 244 .L20: + 245 001c 00ED00E0 .word -536810240 + 246 .cfi_endproc + 247 .LFE45: + 249 .section .text.HAL_PWR_EnterSTOPMode,"ax",%progbits + 250 .align 1 + 251 .global HAL_PWR_EnterSTOPMode + 252 .syntax unified + 253 .code 16 + 254 .thumb_func + 256 HAL_PWR_EnterSTOPMode: + 257 .LVL4: + 258 .LFB46: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters STOP mode. + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event, + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * the HSI RC oscillator is selected as system clock. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note When the voltage regulator operates in low power mode, an additional + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * startup delay is incurred when waking up from Stop mode. + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * By keeping the internal regulator ON during Stop mode, the consumption + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * is higher although the startup time is reduced. + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in STOP mode. + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction. + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 259 .loc 1 311 1 view -0 + 260 .cfi_startproc + 261 @ args = 0, pretend = 0, frame = 0 + 262 @ frame_needed = 0, uses_anonymous_args = 0 + 263 .loc 1 311 1 is_stmt 0 view .LVU37 + 264 0000 10B5 push {r4, lr} + 265 .cfi_def_cfa_offset 8 + 266 .cfi_offset 4, -8 + 267 .cfi_offset 14, -4 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** uint32_t tmpreg = 0; + 268 .loc 1 312 3 is_stmt 1 view .LVU38 + 269 .LVL5: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + ARM GAS /tmp/cco6kzQ6.s page 11 + + + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); + 270 .loc 1 315 3 view .LVU39 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); + 271 .loc 1 316 3 view .LVU40 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select the regulator state in STOP mode ---------------------------------*/ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg = PWR->CR; + 272 .loc 1 319 3 view .LVU41 + 273 .loc 1 319 10 is_stmt 0 view .LVU42 + 274 0002 0C4A ldr r2, .L26 + 275 0004 1368 ldr r3, [r2] + 276 .LVL6: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear PDDS and LPDS bits */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS); + 277 .loc 1 322 3 is_stmt 1 view .LVU43 + 278 .loc 1 322 10 is_stmt 0 view .LVU44 + 279 0006 0324 movs r4, #3 + 280 0008 A343 bics r3, r4 + 281 .LVL7: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set LPDS bit according to Regulator value */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg |= Regulator; + 282 .loc 1 325 3 is_stmt 1 view .LVU45 + 283 .loc 1 325 10 is_stmt 0 view .LVU46 + 284 000a 0343 orrs r3, r0 + 285 .LVL8: + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Store the new value */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR = tmpreg; + 286 .loc 1 328 3 is_stmt 1 view .LVU47 + 287 .loc 1 328 11 is_stmt 0 view .LVU48 + 288 000c 1360 str r3, [r2] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 289 .loc 1 331 3 is_stmt 1 view .LVU49 + 290 .loc 1 331 6 is_stmt 0 view .LVU50 + 291 000e 0A4A ldr r2, .L26+4 + 292 0010 1369 ldr r3, [r2, #16] + 293 .LVL9: + 294 .loc 1 331 12 view .LVU51 + 295 0012 0420 movs r0, #4 + 296 .LVL10: + 297 .loc 1 331 12 view .LVU52 + 298 0014 0343 orrs r3, r0 + 299 0016 1361 str r3, [r2, #16] + 300 .LVL11: + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select STOP mode entry --------------------------------------------------*/ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** if(STOPEntry == PWR_STOPENTRY_WFI) + 301 .loc 1 334 3 is_stmt 1 view .LVU53 + 302 .loc 1 334 5 is_stmt 0 view .LVU54 + 303 0018 0129 cmp r1, #1 + 304 001a 08D0 beq .L25 + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + ARM GAS /tmp/cco6kzQ6.s page 12 + + + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** else + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Event */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __SEV(); + 305 .loc 1 342 5 is_stmt 1 view .LVU55 + 306 .syntax divided + 307 @ 342 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 308 001c 40BF sev + 309 @ 0 "" 2 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 310 .loc 1 343 5 view .LVU56 + 311 @ 343 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 312 001e 20BF wfe + 313 @ 0 "" 2 + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 314 .loc 1 344 5 view .LVU57 + 315 @ 344 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 316 0020 20BF wfe + 317 @ 0 "" 2 + 318 .thumb + 319 .syntax unified + 320 .L24: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 321 .loc 1 348 3 view .LVU58 + 322 .loc 1 348 6 is_stmt 0 view .LVU59 + 323 0022 054A ldr r2, .L26+4 + 324 0024 1369 ldr r3, [r2, #16] + 325 .loc 1 348 12 view .LVU60 + 326 0026 0421 movs r1, #4 + 327 .LVL12: + 328 .loc 1 348 12 view .LVU61 + 329 0028 8B43 bics r3, r1 + 330 002a 1361 str r3, [r2, #16] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 331 .loc 1 349 1 view .LVU62 + 332 @ sp needed + 333 .loc 1 349 1 view .LVU63 + 334 002c 10BD pop {r4, pc} + 335 .LVL13: + 336 .L25: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 337 .loc 1 337 5 is_stmt 1 view .LVU64 + 338 .syntax divided + 339 @ 337 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 340 002e 30BF wfi + 341 @ 0 "" 2 + 342 .thumb + 343 .syntax unified + 344 0030 F7E7 b .L24 + 345 .L27: + 346 0032 C046 .align 2 + ARM GAS /tmp/cco6kzQ6.s page 13 + + + 347 .L26: + 348 0034 00700040 .word 1073770496 + 349 0038 00ED00E0 .word -536810240 + 350 .cfi_endproc + 351 .LFE46: + 353 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits + 354 .align 1 + 355 .global HAL_PWR_EnterSTANDBYMode + 356 .syntax unified + 357 .code 16 + 358 .thumb_func + 360 HAL_PWR_EnterSTANDBYMode: + 361 .LFB47: + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters STANDBY mode. + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Standby mode, all I/O pins are high impedance except for: + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - Reset pad (still available) + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - RTC alternate function pins if configured for tamper, time-stamp, RTC + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Alarm out, or RTC clock calibration out. + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - WKUP pins if enabled. + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * STM32F0x8 devices, the Stop mode is available, but it is + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * aningless to distinguish between voltage regulator in Low power + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * mode and voltage regulator in Run mode because the regulator + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * not used and the core is supplied directly from an external source. + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Consequently, the Standby mode is not available on those devices. + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSTANDBYMode(void) + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 362 .loc 1 366 1 view -0 + 363 .cfi_startproc + 364 @ args = 0, pretend = 0, frame = 0 + 365 @ frame_needed = 0, uses_anonymous_args = 0 + 366 @ link register save eliminated. + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select STANDBY mode */ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR |= (uint32_t)PWR_CR_PDDS; + 367 .loc 1 368 3 view .LVU66 + 368 .loc 1 368 6 is_stmt 0 view .LVU67 + 369 0000 054A ldr r2, .L29 + 370 0002 1368 ldr r3, [r2] + 371 .loc 1 368 11 view .LVU68 + 372 0004 0221 movs r1, #2 + 373 0006 0B43 orrs r3, r1 + 374 0008 1360 str r3, [r2] + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 375 .loc 1 371 3 is_stmt 1 view .LVU69 + 376 .loc 1 371 6 is_stmt 0 view .LVU70 + 377 000a 044A ldr r2, .L29+4 + 378 000c 1369 ldr r3, [r2, #16] + 379 .loc 1 371 12 view .LVU71 + 380 000e 0231 adds r1, r1, #2 + 381 0010 0B43 orrs r3, r1 + 382 0012 1361 str r3, [r2, #16] + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + ARM GAS /tmp/cco6kzQ6.s page 14 + + + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* This option is used to ensure that store operations are completed */ + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #if defined ( __CC_ARM) + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __force_stores(); + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #endif + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 383 .loc 1 378 3 is_stmt 1 view .LVU72 + 384 .syntax divided + 385 @ 378 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 386 0014 30BF wfi + 387 @ 0 "" 2 + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 388 .loc 1 379 1 is_stmt 0 view .LVU73 + 389 .thumb + 390 .syntax unified + 391 @ sp needed + 392 0016 7047 bx lr + 393 .L30: + 394 .align 2 + 395 .L29: + 396 0018 00700040 .word 1073770496 + 397 001c 00ED00E0 .word -536810240 + 398 .cfi_endproc + 399 .LFE47: + 401 .section .text.HAL_PWR_EnableSleepOnExit,"ax",%progbits + 402 .align 1 + 403 .global HAL_PWR_EnableSleepOnExit + 404 .syntax unified + 405 .code 16 + 406 .thumb_func + 408 HAL_PWR_EnableSleepOnExit: + 409 .LFB48: + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Setting this bit is useful when the processor is expected to run only on + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * interruptions handling. + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableSleepOnExit(void) + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 410 .loc 1 390 1 is_stmt 1 view -0 + 411 .cfi_startproc + 412 @ args = 0, pretend = 0, frame = 0 + 413 @ frame_needed = 0, uses_anonymous_args = 0 + 414 @ link register save eliminated. + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPONEXIT bit of Cortex System Control Register */ + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 415 .loc 1 392 3 view .LVU75 + 416 0000 024A ldr r2, .L32 + 417 0002 1369 ldr r3, [r2, #16] + 418 0004 0221 movs r1, #2 + 419 0006 0B43 orrs r3, r1 + 420 0008 1361 str r3, [r2, #16] + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + ARM GAS /tmp/cco6kzQ6.s page 15 + + + 421 .loc 1 393 1 is_stmt 0 view .LVU76 + 422 @ sp needed + 423 000a 7047 bx lr + 424 .L33: + 425 .align 2 + 426 .L32: + 427 000c 00ED00E0 .word -536810240 + 428 .cfi_endproc + 429 .LFE48: + 431 .section .text.HAL_PWR_DisableSleepOnExit,"ax",%progbits + 432 .align 1 + 433 .global HAL_PWR_DisableSleepOnExit + 434 .syntax unified + 435 .code 16 + 436 .thumb_func + 438 HAL_PWR_DisableSleepOnExit: + 439 .LFB49: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void) + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 440 .loc 1 403 1 is_stmt 1 view -0 + 441 .cfi_startproc + 442 @ args = 0, pretend = 0, frame = 0 + 443 @ frame_needed = 0, uses_anonymous_args = 0 + 444 @ link register save eliminated. + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 445 .loc 1 405 3 view .LVU78 + 446 0000 024A ldr r2, .L35 + 447 0002 1369 ldr r3, [r2, #16] + 448 0004 0221 movs r1, #2 + 449 0006 8B43 bics r3, r1 + 450 0008 1361 str r3, [r2, #16] + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 451 .loc 1 406 1 is_stmt 0 view .LVU79 + 452 @ sp needed + 453 000a 7047 bx lr + 454 .L36: + 455 .align 2 + 456 .L35: + 457 000c 00ED00E0 .word -536810240 + 458 .cfi_endproc + 459 .LFE49: + 461 .section .text.HAL_PWR_EnableSEVOnPend,"ax",%progbits + 462 .align 1 + 463 .global HAL_PWR_EnableSEVOnPend + 464 .syntax unified + 465 .code 16 + 466 .thumb_func + 468 HAL_PWR_EnableSEVOnPend: + ARM GAS /tmp/cco6kzQ6.s page 16 + + + 469 .LFB50: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enables CORTEX M4 SEVONPEND bit. + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableSEVOnPend(void) + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 470 .loc 1 417 1 is_stmt 1 view -0 + 471 .cfi_startproc + 472 @ args = 0, pretend = 0, frame = 0 + 473 @ frame_needed = 0, uses_anonymous_args = 0 + 474 @ link register save eliminated. + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SEVONPEND bit of Cortex System Control Register */ + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 475 .loc 1 419 3 view .LVU81 + 476 0000 024A ldr r2, .L38 + 477 0002 1369 ldr r3, [r2, #16] + 478 0004 1021 movs r1, #16 + 479 0006 0B43 orrs r3, r1 + 480 0008 1361 str r3, [r2, #16] + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 481 .loc 1 420 1 is_stmt 0 view .LVU82 + 482 @ sp needed + 483 000a 7047 bx lr + 484 .L39: + 485 .align 2 + 486 .L38: + 487 000c 00ED00E0 .word -536810240 + 488 .cfi_endproc + 489 .LFE50: + 491 .section .text.HAL_PWR_DisableSEVOnPend,"ax",%progbits + 492 .align 1 + 493 .global HAL_PWR_DisableSEVOnPend + 494 .syntax unified + 495 .code 16 + 496 .thumb_func + 498 HAL_PWR_DisableSEVOnPend: + 499 .LFB51: + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables CORTEX M4 SEVONPEND bit. + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableSEVOnPend(void) + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 500 .loc 1 430 1 is_stmt 1 view -0 + 501 .cfi_startproc + 502 @ args = 0, pretend = 0, frame = 0 + 503 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cco6kzQ6.s page 17 + + + 504 @ link register save eliminated. + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SEVONPEND bit of Cortex System Control Register */ + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 505 .loc 1 432 3 view .LVU84 + 506 0000 024A ldr r2, .L41 + 507 0002 1369 ldr r3, [r2, #16] + 508 0004 1021 movs r1, #16 + 509 0006 8B43 bics r3, r1 + 510 0008 1361 str r3, [r2, #16] + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 511 .loc 1 433 1 is_stmt 0 view .LVU85 + 512 @ sp needed + 513 000a 7047 bx lr + 514 .L42: + 515 .align 2 + 516 .L41: + 517 000c 00ED00E0 .word -536810240 + 518 .cfi_endproc + 519 .LFE51: + 521 .text + 522 .Letext0: + 523 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 524 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 525 .file 4 "Drivers/CMSIS/Include/core_cm0.h" + 526 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + ARM GAS /tmp/cco6kzQ6.s page 18 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_pwr.c + /tmp/cco6kzQ6.s:19 .text.HAL_PWR_DeInit:00000000 $t + /tmp/cco6kzQ6.s:25 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit + /tmp/cco6kzQ6.s:50 .text.HAL_PWR_DeInit:00000018 $d + /tmp/cco6kzQ6.s:56 .text.HAL_PWR_EnableBkUpAccess:00000000 $t + /tmp/cco6kzQ6.s:62 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess + /tmp/cco6kzQ6.s:84 .text.HAL_PWR_EnableBkUpAccess:00000010 $d + /tmp/cco6kzQ6.s:89 .text.HAL_PWR_DisableBkUpAccess:00000000 $t + /tmp/cco6kzQ6.s:95 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess + /tmp/cco6kzQ6.s:116 .text.HAL_PWR_DisableBkUpAccess:0000000c $d + /tmp/cco6kzQ6.s:122 .text.HAL_PWR_EnableWakeUpPin:00000000 $t + /tmp/cco6kzQ6.s:128 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin + /tmp/cco6kzQ6.s:148 .text.HAL_PWR_EnableWakeUpPin:0000000c $d + /tmp/cco6kzQ6.s:153 .text.HAL_PWR_DisableWakeUpPin:00000000 $t + /tmp/cco6kzQ6.s:159 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin + /tmp/cco6kzQ6.s:179 .text.HAL_PWR_DisableWakeUpPin:0000000c $d + /tmp/cco6kzQ6.s:184 .text.HAL_PWR_EnterSLEEPMode:00000000 $t + /tmp/cco6kzQ6.s:190 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode + /tmp/cco6kzQ6.s:245 .text.HAL_PWR_EnterSLEEPMode:0000001c $d + /tmp/cco6kzQ6.s:250 .text.HAL_PWR_EnterSTOPMode:00000000 $t + /tmp/cco6kzQ6.s:256 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode + /tmp/cco6kzQ6.s:348 .text.HAL_PWR_EnterSTOPMode:00000034 $d + /tmp/cco6kzQ6.s:354 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t + /tmp/cco6kzQ6.s:360 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode + /tmp/cco6kzQ6.s:396 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d + /tmp/cco6kzQ6.s:402 .text.HAL_PWR_EnableSleepOnExit:00000000 $t + /tmp/cco6kzQ6.s:408 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit + /tmp/cco6kzQ6.s:427 .text.HAL_PWR_EnableSleepOnExit:0000000c $d + /tmp/cco6kzQ6.s:432 .text.HAL_PWR_DisableSleepOnExit:00000000 $t + /tmp/cco6kzQ6.s:438 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit + /tmp/cco6kzQ6.s:457 .text.HAL_PWR_DisableSleepOnExit:0000000c $d + /tmp/cco6kzQ6.s:462 .text.HAL_PWR_EnableSEVOnPend:00000000 $t + /tmp/cco6kzQ6.s:468 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend + /tmp/cco6kzQ6.s:487 .text.HAL_PWR_EnableSEVOnPend:0000000c $d + /tmp/cco6kzQ6.s:492 .text.HAL_PWR_DisableSEVOnPend:00000000 $t + /tmp/cco6kzQ6.s:498 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend + /tmp/cco6kzQ6.s:517 .text.HAL_PWR_DisableSEVOnPend:0000000c $d + +NO UNDEFINED SYMBOLS diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o new file mode 100644 index 0000000000000000000000000000000000000000..9c0580fe2a165ea5a0e1089aeee1396d56aa6df8 GIT binary patch literal 8628 zcmd5>Yiu0V6~1?7XTA2?j$=EC69SB56P&{C+Kw?MO~Cfri5=qDcB?cgsH9 z-Ercyh^B>5N+^Ut0ku&9Ay6brMO#6C01f@Y57Z)%S|Nm5wW@?#wdGM2(HE`zojZ4S zXC_V`|9a!Q-#zDi=iEE@J(Dkv?%T~dXHMd*i&Z7Yc5W6HtxrG~>tI`$cJ0ROu`SbD zU3`kEzsLray)7AKJUmDm26^S5 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Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.lst new file mode 100644 index 0000000..76090f5 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.lst @@ -0,0 +1,724 @@ +ARM GAS /tmp/ccFNd6U8.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_pwr_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c" + 18 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits + 19 .align 1 + 20 .global HAL_PWR_ConfigPVD + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_PWR_ConfigPVD: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @file stm32f0xx_hal_pwr_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * All rights reserved. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * in the root directory of this software component. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #include "stm32f0xx_hal.h" + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx + ARM GAS /tmp/ccFNd6U8.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWREx HAL module driver + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Private_Constants PWREx Private Constants + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_MODE_IT (0x00010000U) + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_MODE_EVT (0x00020000U) + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_RISING_EDGE (0x00000001U) + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_FALLING_EDGE (0x00000002U) + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @} + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** @verbatim + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** =============================================================================== + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ##### Peripheral extended control functions ##### + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** =============================================================================== + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *** PVD configuration *** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ========================= + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** [..] + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions. + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** -@- PVD is not available on STM32F030x4/x6/x8 + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *** VDDIO2 Monitor Configuration *** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ==================================== + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** [..] + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** to VREFInt Voltage + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) This monitor is internally connected to the EXTI line31 + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** and can generate an interrupt if enabled. This is done through + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWREx_EnableVddio2Monitor() function. + ARM GAS /tmp/ccFNd6U8.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** -@- VDDIO2 is available on STM32F07x/09x/04x + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** @endverbatim + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #if defined (STM32F031x6) || defined (STM32F051x8) || \ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F071xB) || defined (STM32F091xC) || \ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F042x6) || defined (STM32F072xB) + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * information for the PVD. + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * more details about the voltage threshold corresponding to each + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * detection level. + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 28 .loc 1 108 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check the parameters */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); + 33 .loc 1 110 3 view .LVU1 + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); + 34 .loc 1 111 3 view .LVU2 + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Set PLS[7:5] bits according to PVDLevel value */ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); + 35 .loc 1 114 3 view .LVU3 + 36 0000 1C4A ldr r2, .L10 + 37 0002 1368 ldr r3, [r2] + 38 0004 E021 movs r1, #224 + 39 0006 8B43 bics r3, r1 + 40 0008 0168 ldr r1, [r0] + 41 000a 0B43 orrs r3, r1 + 42 000c 1360 str r3, [r2] + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); + 43 .loc 1 117 3 view .LVU4 + 44 000e 1A4B ldr r3, .L10+4 + 45 0010 5968 ldr r1, [r3, #4] + 46 0012 1A4A ldr r2, .L10+8 + 47 0014 1140 ands r1, r2 + 48 0016 5960 str r1, [r3, #4] + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT(); + 49 .loc 1 118 3 view .LVU5 + 50 0018 1968 ldr r1, [r3] + 51 001a 1140 ands r1, r2 + 52 001c 1960 str r1, [r3] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); + 53 .loc 1 119 3 view .LVU6 + ARM GAS /tmp/ccFNd6U8.s page 4 + + + 54 001e 9968 ldr r1, [r3, #8] + 55 0020 1140 ands r1, r2 + 56 0022 9960 str r1, [r3, #8] + 57 .loc 1 119 44 view .LVU7 + 58 0024 D968 ldr r1, [r3, #12] + 59 0026 0A40 ands r2, r1 + 60 0028 DA60 str r2, [r3, #12] + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure interrupt mode */ + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) + 61 .loc 1 122 3 view .LVU8 + 62 .loc 1 122 17 is_stmt 0 view .LVU9 + 63 002a 4368 ldr r3, [r0, #4] + 64 .loc 1 122 5 view .LVU10 + 65 002c DB03 lsls r3, r3, #15 + 66 002e 05D5 bpl .L2 + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT(); + 67 .loc 1 124 5 is_stmt 1 view .LVU11 + 68 0030 114A ldr r2, .L10+4 + 69 0032 1168 ldr r1, [r2] + 70 0034 8023 movs r3, #128 + 71 0036 5B02 lsls r3, r3, #9 + 72 0038 0B43 orrs r3, r1 + 73 003a 1360 str r3, [r2] + 74 .L2: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure event mode */ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) + 75 .loc 1 128 3 view .LVU12 + 76 .loc 1 128 17 is_stmt 0 view .LVU13 + 77 003c 4368 ldr r3, [r0, #4] + 78 .loc 1 128 5 view .LVU14 + 79 003e 9B03 lsls r3, r3, #14 + 80 0040 05D5 bpl .L3 + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); + 81 .loc 1 130 5 is_stmt 1 view .LVU15 + 82 0042 0D4A ldr r2, .L10+4 + 83 0044 5168 ldr r1, [r2, #4] + 84 0046 8023 movs r3, #128 + 85 0048 5B02 lsls r3, r3, #9 + 86 004a 0B43 orrs r3, r1 + 87 004c 5360 str r3, [r2, #4] + 88 .L3: + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure the edge */ + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) + 89 .loc 1 134 3 view .LVU16 + 90 .loc 1 134 17 is_stmt 0 view .LVU17 + 91 004e 4368 ldr r3, [r0, #4] + 92 .loc 1 134 5 view .LVU18 + 93 0050 DB07 lsls r3, r3, #31 + 94 0052 05D5 bpl .L4 + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + ARM GAS /tmp/ccFNd6U8.s page 5 + + + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); + 95 .loc 1 136 5 is_stmt 1 view .LVU19 + 96 0054 084A ldr r2, .L10+4 + 97 0056 9168 ldr r1, [r2, #8] + 98 0058 8023 movs r3, #128 + 99 005a 5B02 lsls r3, r3, #9 + 100 005c 0B43 orrs r3, r1 + 101 005e 9360 str r3, [r2, #8] + 102 .L4: + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) + 103 .loc 1 139 3 view .LVU20 + 104 .loc 1 139 17 is_stmt 0 view .LVU21 + 105 0060 4368 ldr r3, [r0, #4] + 106 .loc 1 139 5 view .LVU22 + 107 0062 9B07 lsls r3, r3, #30 + 108 0064 05D5 bpl .L1 + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); + 109 .loc 1 141 5 is_stmt 1 view .LVU23 + 110 0066 044A ldr r2, .L10+4 + 111 0068 D168 ldr r1, [r2, #12] + 112 006a 8023 movs r3, #128 + 113 006c 5B02 lsls r3, r3, #9 + 114 006e 0B43 orrs r3, r1 + 115 0070 D360 str r3, [r2, #12] + 116 .L1: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 117 .loc 1 143 1 is_stmt 0 view .LVU24 + 118 @ sp needed + 119 0072 7047 bx lr + 120 .L11: + 121 .align 2 + 122 .L10: + 123 0074 00700040 .word 1073770496 + 124 0078 00040140 .word 1073808384 + 125 007c FFFFFEFF .word -65537 + 126 .cfi_endproc + 127 .LFE40: + 129 .section .text.HAL_PWR_EnablePVD,"ax",%progbits + 130 .align 1 + 131 .global HAL_PWR_EnablePVD + 132 .syntax unified + 133 .code 16 + 134 .thumb_func + 136 HAL_PWR_EnablePVD: + 137 .LFB41: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Enables the Power Voltage Detector(PVD). + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_EnablePVD(void) + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 138 .loc 1 150 1 is_stmt 1 view -0 + ARM GAS /tmp/ccFNd6U8.s page 6 + + + 139 .cfi_startproc + 140 @ args = 0, pretend = 0, frame = 0 + 141 @ frame_needed = 0, uses_anonymous_args = 0 + 142 @ link register save eliminated. + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** PWR->CR |= (uint32_t)PWR_CR_PVDE; + 143 .loc 1 151 3 view .LVU26 + 144 .loc 1 151 6 is_stmt 0 view .LVU27 + 145 0000 024A ldr r2, .L13 + 146 0002 1368 ldr r3, [r2] + 147 .loc 1 151 11 view .LVU28 + 148 0004 1021 movs r1, #16 + 149 0006 0B43 orrs r3, r1 + 150 0008 1360 str r3, [r2] + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 151 .loc 1 152 1 view .LVU29 + 152 @ sp needed + 153 000a 7047 bx lr + 154 .L14: + 155 .align 2 + 156 .L13: + 157 000c 00700040 .word 1073770496 + 158 .cfi_endproc + 159 .LFE41: + 161 .section .text.HAL_PWR_DisablePVD,"ax",%progbits + 162 .align 1 + 163 .global HAL_PWR_DisablePVD + 164 .syntax unified + 165 .code 16 + 166 .thumb_func + 168 HAL_PWR_DisablePVD: + 169 .LFB42: + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Disables the Power Voltage Detector(PVD). + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_DisablePVD(void) + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 170 .loc 1 159 1 is_stmt 1 view -0 + 171 .cfi_startproc + 172 @ args = 0, pretend = 0, frame = 0 + 173 @ frame_needed = 0, uses_anonymous_args = 0 + 174 @ link register save eliminated. + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** PWR->CR &= ~((uint32_t)PWR_CR_PVDE); + 175 .loc 1 160 3 view .LVU31 + 176 .loc 1 160 6 is_stmt 0 view .LVU32 + 177 0000 024A ldr r2, .L16 + 178 0002 1368 ldr r3, [r2] + 179 .loc 1 160 11 view .LVU33 + 180 0004 1021 movs r1, #16 + 181 0006 8B43 bics r3, r1 + 182 0008 1360 str r3, [r2] + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 183 .loc 1 161 1 view .LVU34 + 184 @ sp needed + 185 000a 7047 bx lr + 186 .L17: + ARM GAS /tmp/ccFNd6U8.s page 7 + + + 187 .align 2 + 188 .L16: + 189 000c 00700040 .word 1073770496 + 190 .cfi_endproc + 191 .LFE42: + 193 .section .text.HAL_PWR_PVDCallback,"ax",%progbits + 194 .align 1 + 195 .weak HAL_PWR_PVDCallback + 196 .syntax unified + 197 .code 16 + 198 .thumb_func + 200 HAL_PWR_PVDCallback: + 201 .LFB44: + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD interrupt request. + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler(). + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_PVD_IRQHandler(void) + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */ + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback(); + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWR PVD interrupt callback + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __weak void HAL_PWR_PVDCallback(void) + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 202 .loc 1 186 1 is_stmt 1 view -0 + 203 .cfi_startproc + 204 @ args = 0, pretend = 0, frame = 0 + 205 @ frame_needed = 0, uses_anonymous_args = 0 + 206 @ link register save eliminated. + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** the HAL_PWR_PVDCallback could be implemented in the user file + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 207 .loc 1 190 1 view .LVU36 + 208 @ sp needed + 209 0000 7047 bx lr + 210 .cfi_endproc + 211 .LFE44: + 213 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits + 214 .align 1 + 215 .global HAL_PWR_PVD_IRQHandler + 216 .syntax unified + 217 .code 16 + ARM GAS /tmp/ccFNd6U8.s page 8 + + + 218 .thumb_func + 220 HAL_PWR_PVD_IRQHandler: + 221 .LFB43: + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 222 .loc 1 169 1 view -0 + 223 .cfi_startproc + 224 @ args = 0, pretend = 0, frame = 0 + 225 @ frame_needed = 0, uses_anonymous_args = 0 + 226 0000 10B5 push {r4, lr} + 227 .cfi_def_cfa_offset 8 + 228 .cfi_offset 4, -8 + 229 .cfi_offset 14, -4 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 230 .loc 1 171 3 view .LVU38 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 231 .loc 1 171 6 is_stmt 0 view .LVU39 + 232 0002 064B ldr r3, .L23 + 233 0004 5B69 ldr r3, [r3, #20] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 234 .loc 1 171 5 view .LVU40 + 235 0006 DB03 lsls r3, r3, #15 + 236 0008 00D4 bmi .L22 + 237 .L19: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 238 .loc 1 179 1 view .LVU41 + 239 @ sp needed + 240 000a 10BD pop {r4, pc} + 241 .L22: + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 242 .loc 1 174 5 is_stmt 1 view .LVU42 + 243 000c FFF7FEFF bl HAL_PWR_PVDCallback + 244 .LVL1: + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 245 .loc 1 177 5 view .LVU43 + 246 0010 024B ldr r3, .L23 + 247 0012 8022 movs r2, #128 + 248 0014 5202 lsls r2, r2, #9 + 249 0016 5A61 str r2, [r3, #20] + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 250 .loc 1 179 1 is_stmt 0 view .LVU44 + 251 0018 F7E7 b .L19 + 252 .L24: + 253 001a C046 .align 2 + 254 .L23: + 255 001c 00040140 .word 1073808384 + 256 .cfi_endproc + 257 .LFE43: + 259 .section .text.HAL_PWREx_EnableVddio2Monitor,"ax",%progbits + 260 .align 1 + 261 .global HAL_PWREx_EnableVddio2Monitor + 262 .syntax unified + 263 .code 16 + 264 .thumb_func + 266 HAL_PWREx_EnableVddio2Monitor: + 267 .LFB45: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */ + ARM GAS /tmp/ccFNd6U8.s page 9 + + + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* defined (STM32F071xB) || defined (STM32F091xC) || */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* defined (STM32F042x6) || defined (STM32F072xB) */ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #if defined (STM32F042x6) || defined (STM32F048xx) || \ + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F091xC) || defined (STM32F098xx) + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection. + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint, + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** an interrupt is generated Irq line 1. + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** NVIS has to be enable by user. + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_EnableVddio2Monitor(void) + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 268 .loc 1 207 1 is_stmt 1 view -0 + 269 .cfi_startproc + 270 @ args = 0, pretend = 0, frame = 0 + 271 @ frame_needed = 0, uses_anonymous_args = 0 + 272 @ link register save eliminated. + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_ENABLE_IT(); + 273 .loc 1 208 3 view .LVU46 + 274 0000 044B ldr r3, .L26 + 275 0002 1968 ldr r1, [r3] + 276 0004 8022 movs r2, #128 + 277 0006 1206 lsls r2, r2, #24 + 278 0008 1143 orrs r1, r2 + 279 000a 1960 str r1, [r3] + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE(); + 280 .loc 1 209 3 view .LVU47 + 281 000c D968 ldr r1, [r3, #12] + 282 000e 0A43 orrs r2, r1 + 283 0010 DA60 str r2, [r3, #12] + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 284 .loc 1 210 1 is_stmt 0 view .LVU48 + 285 @ sp needed + 286 0012 7047 bx lr + 287 .L27: + 288 .align 2 + 289 .L26: + 290 0014 00040140 .word 1073808384 + 291 .cfi_endproc + 292 .LFE45: + 294 .section .text.HAL_PWREx_DisableVddio2Monitor,"ax",%progbits + 295 .align 1 + 296 .global HAL_PWREx_DisableVddio2Monitor + 297 .syntax unified + 298 .code 16 + 299 .thumb_func + 301 HAL_PWREx_DisableVddio2Monitor: + 302 .LFB46: + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Disable the Vddio2 Monitor. + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_DisableVddio2Monitor(void) + ARM GAS /tmp/ccFNd6U8.s page 10 + + + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 303 .loc 1 217 1 is_stmt 1 view -0 + 304 .cfi_startproc + 305 @ args = 0, pretend = 0, frame = 0 + 306 @ frame_needed = 0, uses_anonymous_args = 0 + 307 @ link register save eliminated. + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_DISABLE_IT(); + 308 .loc 1 218 3 view .LVU50 + 309 0000 064B ldr r3, .L29 + 310 0002 1A68 ldr r2, [r3] + 311 0004 5200 lsls r2, r2, #1 + 312 0006 5208 lsrs r2, r2, #1 + 313 0008 1A60 str r2, [r3] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE(); + 314 .loc 1 219 3 view .LVU51 + 315 .loc 1 219 3 view .LVU52 + 316 000a DA68 ldr r2, [r3, #12] + 317 000c 5200 lsls r2, r2, #1 + 318 000e 5208 lsrs r2, r2, #1 + 319 0010 DA60 str r2, [r3, #12] + 320 .loc 1 219 3 view .LVU53 + 321 0012 9A68 ldr r2, [r3, #8] + 322 0014 5200 lsls r2, r2, #1 + 323 0016 5208 lsrs r2, r2, #1 + 324 0018 9A60 str r2, [r3, #8] + 325 .loc 1 219 3 view .LVU54 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 326 .loc 1 221 1 is_stmt 0 view .LVU55 + 327 @ sp needed + 328 001a 7047 bx lr + 329 .L30: + 330 .align 2 + 331 .L29: + 332 001c 00040140 .word 1073808384 + 333 .cfi_endproc + 334 .LFE46: + 336 .section .text.HAL_PWREx_Vddio2MonitorCallback,"ax",%progbits + 337 .align 1 + 338 .weak HAL_PWREx_Vddio2MonitorCallback + 339 .syntax unified + 340 .code 16 + 341 .thumb_func + 343 HAL_PWREx_Vddio2MonitorCallback: + 344 .LFB48: + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief This function handles the PWR Vddio2 monitor interrupt request. + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler(). + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_Vddio2Monitor_IRQHandler(void) + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET) + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* PWR Vddio2 monitor interrupt user callback */ + ARM GAS /tmp/ccFNd6U8.s page 11 + + + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWREx_Vddio2MonitorCallback(); + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG(); + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWR Vddio2 Monitor interrupt callback + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __weak void HAL_PWREx_Vddio2MonitorCallback(void) + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 345 .loc 1 246 1 is_stmt 1 view -0 + 346 .cfi_startproc + 347 @ args = 0, pretend = 0, frame = 0 + 348 @ frame_needed = 0, uses_anonymous_args = 0 + 349 @ link register save eliminated. + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 350 .loc 1 250 1 view .LVU57 + 351 @ sp needed + 352 0000 7047 bx lr + 353 .cfi_endproc + 354 .LFE48: + 356 .section .text.HAL_PWREx_Vddio2Monitor_IRQHandler,"ax",%progbits + 357 .align 1 + 358 .global HAL_PWREx_Vddio2Monitor_IRQHandler + 359 .syntax unified + 360 .code 16 + 361 .thumb_func + 363 HAL_PWREx_Vddio2Monitor_IRQHandler: + 364 .LFB47: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 365 .loc 1 229 1 view -0 + 366 .cfi_startproc + 367 @ args = 0, pretend = 0, frame = 0 + 368 @ frame_needed = 0, uses_anonymous_args = 0 + 369 0000 10B5 push {r4, lr} + 370 .cfi_def_cfa_offset 8 + 371 .cfi_offset 4, -8 + 372 .cfi_offset 14, -4 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 373 .loc 1 231 3 view .LVU59 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 374 .loc 1 231 6 is_stmt 0 view .LVU60 + 375 0002 064B ldr r3, .L35 + 376 0004 5B69 ldr r3, [r3, #20] + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 377 .loc 1 231 5 view .LVU61 + 378 0006 002B cmp r3, #0 + 379 0008 00DB blt .L34 + 380 .L32: + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 381 .loc 1 239 1 view .LVU62 + ARM GAS /tmp/ccFNd6U8.s page 12 + + + 382 @ sp needed + 383 000a 10BD pop {r4, pc} + 384 .L34: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 385 .loc 1 234 5 is_stmt 1 view .LVU63 + 386 000c FFF7FEFF bl HAL_PWREx_Vddio2MonitorCallback + 387 .LVL2: + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 388 .loc 1 237 5 view .LVU64 + 389 0010 024B ldr r3, .L35 + 390 0012 8022 movs r2, #128 + 391 0014 1206 lsls r2, r2, #24 + 392 0016 5A61 str r2, [r3, #20] + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 393 .loc 1 239 1 is_stmt 0 view .LVU65 + 394 0018 F7E7 b .L32 + 395 .L36: + 396 001a C046 .align 2 + 397 .L35: + 398 001c 00040140 .word 1073808384 + 399 .cfi_endproc + 400 .LFE47: + 402 .text + 403 .Letext0: + 404 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 405 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 406 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 407 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h" + 408 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + ARM GAS /tmp/ccFNd6U8.s page 13 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_pwr_ex.c + /tmp/ccFNd6U8.s:19 .text.HAL_PWR_ConfigPVD:00000000 $t + /tmp/ccFNd6U8.s:25 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD + /tmp/ccFNd6U8.s:123 .text.HAL_PWR_ConfigPVD:00000074 $d + /tmp/ccFNd6U8.s:130 .text.HAL_PWR_EnablePVD:00000000 $t + /tmp/ccFNd6U8.s:136 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD + /tmp/ccFNd6U8.s:157 .text.HAL_PWR_EnablePVD:0000000c $d + /tmp/ccFNd6U8.s:162 .text.HAL_PWR_DisablePVD:00000000 $t + /tmp/ccFNd6U8.s:168 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD + /tmp/ccFNd6U8.s:189 .text.HAL_PWR_DisablePVD:0000000c $d + /tmp/ccFNd6U8.s:194 .text.HAL_PWR_PVDCallback:00000000 $t + /tmp/ccFNd6U8.s:200 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback + /tmp/ccFNd6U8.s:214 .text.HAL_PWR_PVD_IRQHandler:00000000 $t + /tmp/ccFNd6U8.s:220 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler + /tmp/ccFNd6U8.s:255 .text.HAL_PWR_PVD_IRQHandler:0000001c $d + /tmp/ccFNd6U8.s:260 .text.HAL_PWREx_EnableVddio2Monitor:00000000 $t + /tmp/ccFNd6U8.s:266 .text.HAL_PWREx_EnableVddio2Monitor:00000000 HAL_PWREx_EnableVddio2Monitor + /tmp/ccFNd6U8.s:290 .text.HAL_PWREx_EnableVddio2Monitor:00000014 $d + /tmp/ccFNd6U8.s:295 .text.HAL_PWREx_DisableVddio2Monitor:00000000 $t + /tmp/ccFNd6U8.s:301 .text.HAL_PWREx_DisableVddio2Monitor:00000000 HAL_PWREx_DisableVddio2Monitor + /tmp/ccFNd6U8.s:332 .text.HAL_PWREx_DisableVddio2Monitor:0000001c $d + /tmp/ccFNd6U8.s:337 .text.HAL_PWREx_Vddio2MonitorCallback:00000000 $t + /tmp/ccFNd6U8.s:343 .text.HAL_PWREx_Vddio2MonitorCallback:00000000 HAL_PWREx_Vddio2MonitorCallback + /tmp/ccFNd6U8.s:357 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:00000000 $t + /tmp/ccFNd6U8.s:363 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:00000000 HAL_PWREx_Vddio2Monitor_IRQHandler + /tmp/ccFNd6U8.s:398 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:0000001c $d + +NO UNDEFINED SYMBOLS diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o new file mode 100644 index 0000000000000000000000000000000000000000..f7e1148fff3e72ce42ed914608d13ca04c6899d6 GIT binary patch literal 6804 zcmd5=U2I#`9Y5z@U&o1)G)~fzq=nv;0xe)WNkb@Qg%l@glO`kBDNtZ@uI=mC;E&9{ zPSXiSU}(|?+d!-ju&QFxKxmsb9tIKKGsF`(K3Le;(;JK=2C1!y3&aI~@c2+6$&#U= z6DQ;edWaUMJmH|L?f zh;T(aOP11h0%0D|egiAOktuf%+OD=7;X>M@gbTGj0MQxHiWLj+w(SJ}6*6_Ce-;c~ z>&V&$cJPlN)!Bt48{khtW$HBaL7@ka6^F`Jdpx!dRmxaT3gw<})#@L;MYWJaG zetY<~@C}0z-W!}8`1&A5xQnTwL&JgFwcCaxvwa7{7?B+e&@drq(LW6cl=LEkG49e0 z2VFi6d|Mw6hb6w993jDH6R5=4ZZm4AVYt(-v*Q?hj6aT8IKr>%?n9$@cAvN^!h5d5 zGL-!YVcp%rh@d;b?+Ay{I=hur$+mrHl`g;1Xkji+i^7B5uGW;|Oc z8kLnwF&@iSEBWF|JW)qo$E5Mpv@g_~?Pyf!JttG=_ho63eVut+;rxk}Wkr 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z?~(-1pGbmdlO%WsRY>qmkOa>xN$`kv?3MjOyPz@!ndldI$E7Xm2mh3`kC8+@OVYld zBWrN2xN-v&w4|BSSsC5d*NmG(;{(H<77pDtTQ2GXk8vfyZVW?C#puS6Eh z)axupj+nEN-7}%p@16{;e$P9*HQ+rZVl}gLNz}VvTY{H)Kl?FTo*jPB)+fj%?YYuf zBEUH_(^yFtEBPvhPUuD^Q#03?Cu-F28{Nc!Qg3Zgt+G-o)~yy_iGDlFIOc@mCw-Y7 zz20*9no$PmNOB=&SXQl=X;>is-xDnXY)P^2s1&U~Z^CjGX&5=-u#83W<0wYy27Fk? z{}o63&0p^Zd`=2Th1S0p_e0?-6`#lavt@v=SfMA&l$mHN2hT^Sv9vAo`FjOzyD+P35V}7 zAKzJ!97CM=`tdn@XMB8f;43+s#l!cUkME*~565+r??;kv1U^b{U=e-h8)rb+&wRL- zac3M7CG3na^t~x@PUutMUULjc>IWsd*S+I+GwzgU;ivx6-RboAcfg^0t8j_*Y^QyP vIyTiwiKM65>@DD^Ag*|ERuEqgKC06*TCR, RCC_CR_HSION | RCC_CR_HSITRIM_4); + 44 .loc 1 216 3 is_stmt 1 view .LVU4 + 45 0008 284A ldr r2, .L17 + 46 000a 1368 ldr r3, [r2] + 47 000c 8121 movs r1, #129 + 48 000e 0B43 orrs r3, r1 + 49 0010 1360 str r3, [r2] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) + 50 .loc 1 219 3 view .LVU5 + 51 .LVL2: + 52 .L2: + 53 .loc 1 219 43 view .LVU6 + 54 .loc 1 219 10 is_stmt 0 view .LVU7 + 55 0012 264B ldr r3, .L17 + 56 0014 1B68 ldr r3, [r3] + 57 .loc 1 219 43 view .LVU8 + 58 0016 9B07 lsls r3, r3, #30 + 59 0018 07D4 bmi .L13 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) + 60 .loc 1 221 5 is_stmt 1 view .LVU9 + 61 .loc 1 221 10 is_stmt 0 view .LVU10 + 62 001a FFF7FEFF bl HAL_GetTick + 63 .LVL3: + 64 .loc 1 221 24 discriminator 1 view .LVU11 + 65 001e 001B subs r0, r0, r4 + ARM GAS /tmp/ccZlaZko.s page 6 + + + 66 .loc 1 221 8 discriminator 1 view .LVU12 + 67 0020 0228 cmp r0, #2 + 68 0022 F6D9 bls .L2 + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 69 .loc 1 223 14 view .LVU13 + 70 0024 0324 movs r4, #3 + 71 .LVL4: + 72 .L3: + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE[2:0] and MCOSEL[2:0] bits */ + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCO); + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI as SYSCLK status is enabled */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */ + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE; + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adapt Systick interrupt period */ + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if (HAL_InitTick(uwTickPrio) != HAL_OK) + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON); + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset HSEBYP bit */ + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get start tick */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLLRDY is cleared */ + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR register */ + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR); + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR2 register */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2); + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccZlaZko.s page 7 + + + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR3 register */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3); + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable all interrupts */ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CIR); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Clear all reset flags */ + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS(); + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 73 .loc 1 282 1 view .LVU14 + 74 0026 2000 movs r0, r4 + 75 @ sp needed + 76 0028 70BD pop {r4, r5, r6, pc} + 77 .LVL5: + 78 .L13: + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 79 .loc 1 228 3 is_stmt 1 view .LVU15 + 80 002a 204A ldr r2, .L17 + 81 002c 5368 ldr r3, [r2, #4] + 82 002e 2049 ldr r1, .L17+4 + 83 0030 0B40 ands r3, r1 + 84 0032 5360 str r3, [r2, #4] + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 85 .loc 1 231 3 view .LVU16 + 86 .L5: + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 87 .loc 1 231 44 view .LVU17 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 88 .loc 1 231 10 is_stmt 0 view .LVU18 + 89 0034 1D4B ldr r3, .L17 + 90 0036 5B68 ldr r3, [r3, #4] + 91 0038 0C22 movs r2, #12 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 92 .loc 1 231 44 view .LVU19 + 93 003a 1A42 tst r2, r3 + 94 003c 07D0 beq .L14 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 95 .loc 1 233 5 is_stmt 1 view .LVU20 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 96 .loc 1 233 10 is_stmt 0 view .LVU21 + 97 003e FFF7FEFF bl HAL_GetTick + 98 .LVL6: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 99 .loc 1 233 24 discriminator 1 view .LVU22 + 100 0042 001B subs r0, r0, r4 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 101 .loc 1 233 8 discriminator 1 view .LVU23 + 102 0044 1B4B ldr r3, .L17+8 + 103 0046 9842 cmp r0, r3 + 104 0048 F4D9 bls .L5 + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 105 .loc 1 235 14 view .LVU24 + 106 004a 0324 movs r4, #3 + 107 .LVL7: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + ARM GAS /tmp/ccZlaZko.s page 8 + + + 108 .loc 1 235 14 view .LVU25 + 109 004c EBE7 b .L3 + 110 .LVL8: + 111 .L14: + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 112 .loc 1 240 3 is_stmt 1 view .LVU26 + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 113 .loc 1 240 19 is_stmt 0 view .LVU27 + 114 004e 1A4B ldr r3, .L17+12 + 115 0050 1A4A ldr r2, .L17+16 + 116 0052 1A60 str r2, [r3] + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 117 .loc 1 243 3 is_stmt 1 view .LVU28 + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 118 .loc 1 243 7 is_stmt 0 view .LVU29 + 119 0054 1A4B ldr r3, .L17+20 + 120 0056 1868 ldr r0, [r3] + 121 0058 FFF7FEFF bl HAL_InitTick + 122 .LVL9: + 123 005c 041E subs r4, r0, #0 + 124 .LVL10: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 125 .loc 1 243 6 discriminator 1 view .LVU30 + 126 005e 01D0 beq .L15 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 127 .loc 1 245 12 view .LVU31 + 128 0060 0124 movs r4, #1 + 129 0062 E0E7 b .L3 + 130 .L15: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 131 .loc 1 249 3 is_stmt 1 view .LVU32 + 132 0064 114B ldr r3, .L17 + 133 0066 1A68 ldr r2, [r3] + 134 0068 1649 ldr r1, .L17+24 + 135 006a 0A40 ands r2, r1 + 136 006c 1A60 str r2, [r3] + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 137 .loc 1 252 3 view .LVU33 + 138 006e 1A68 ldr r2, [r3] + 139 0070 1549 ldr r1, .L17+28 + 140 0072 0A40 ands r2, r1 + 141 0074 1A60 str r2, [r3] + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 142 .loc 1 255 3 view .LVU34 + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 143 .loc 1 255 15 is_stmt 0 view .LVU35 + 144 0076 FFF7FEFF bl HAL_GetTick + 145 .LVL11: + 146 007a 0500 movs r5, r0 + 147 .LVL12: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 148 .loc 1 258 3 is_stmt 1 view .LVU36 + 149 .L7: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 150 .loc 1 258 42 view .LVU37 + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 151 .loc 1 258 9 is_stmt 0 view .LVU38 + ARM GAS /tmp/ccZlaZko.s page 9 + + + 152 007c 0B4B ldr r3, .L17 + 153 007e 1B68 ldr r3, [r3] + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 154 .loc 1 258 42 view .LVU39 + 155 0080 9B01 lsls r3, r3, #6 + 156 0082 06D5 bpl .L16 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 157 .loc 1 260 5 is_stmt 1 view .LVU40 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 158 .loc 1 260 9 is_stmt 0 view .LVU41 + 159 0084 FFF7FEFF bl HAL_GetTick + 160 .LVL13: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 161 .loc 1 260 23 discriminator 1 view .LVU42 + 162 0088 401B subs r0, r0, r5 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 163 .loc 1 260 7 discriminator 1 view .LVU43 + 164 008a 0228 cmp r0, #2 + 165 008c F6D9 bls .L7 + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 166 .loc 1 262 14 view .LVU44 + 167 008e 0324 movs r4, #3 + 168 0090 C9E7 b .L3 + 169 .L16: + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 170 .loc 1 267 3 is_stmt 1 view .LVU45 + 171 0092 064B ldr r3, .L17 + 172 0094 0022 movs r2, #0 + 173 0096 5A60 str r2, [r3, #4] + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 174 .loc 1 270 3 view .LVU46 + 175 0098 DA62 str r2, [r3, #44] + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 176 .loc 1 273 3 view .LVU47 + 177 009a 1A63 str r2, [r3, #48] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 178 .loc 1 276 3 view .LVU48 + 179 009c 9A60 str r2, [r3, #8] + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 180 .loc 1 279 3 view .LVU49 + 181 009e 596A ldr r1, [r3, #36] + 182 00a0 8022 movs r2, #128 + 183 00a2 5204 lsls r2, r2, #17 + 184 00a4 0A43 orrs r2, r1 + 185 00a6 5A62 str r2, [r3, #36] + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 186 .loc 1 281 3 view .LVU50 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 187 .loc 1 281 10 is_stmt 0 view .LVU51 + 188 00a8 BDE7 b .L3 + 189 .L18: + 190 00aa C046 .align 2 + 191 .L17: + 192 00ac 00100240 .word 1073876992 + 193 00b0 0CF8FFF0 .word -251660276 + 194 00b4 88130000 .word 5000 + 195 00b8 00000000 .word SystemCoreClock + ARM GAS /tmp/ccZlaZko.s page 10 + + + 196 00bc 00127A00 .word 8000000 + 197 00c0 00000000 .word uwTickPrio + 198 00c4 FFFFF6FE .word -17367041 + 199 00c8 FFFFFBFF .word -262145 + 200 .cfi_endproc + 201 .LFE40: + 203 .section .text.HAL_RCC_OscConfig,"ax",%progbits + 204 .align 1 + 205 .global HAL_RCC_OscConfig + 206 .syntax unified + 207 .code 16 + 208 .thumb_func + 210 HAL_RCC_OscConfig: + 211 .LVL14: + 212 .LFB41: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC_OscInitTypeDef. + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 213 .loc 1 299 1 is_stmt 1 view -0 + 214 .cfi_startproc + 215 @ args = 0, pretend = 0, frame = 8 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 .loc 1 299 1 is_stmt 0 view .LVU53 + 218 0000 70B5 push {r4, r5, r6, lr} + 219 .cfi_def_cfa_offset 16 + 220 .cfi_offset 4, -16 + 221 .cfi_offset 5, -12 + 222 .cfi_offset 6, -8 + 223 .cfi_offset 14, -4 + 224 0002 82B0 sub sp, sp, #8 + 225 .cfi_def_cfa_offset 24 + 226 0004 041E subs r4, r0, #0 + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 227 .loc 1 300 3 is_stmt 1 view .LVU54 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t pll_config; + 228 .loc 1 301 3 view .LVU55 + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t pll_config2; + 229 .loc 1 302 3 view .LVU56 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check Null pointer */ + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) + 230 .loc 1 305 3 view .LVU57 + 231 .loc 1 305 5 is_stmt 0 view .LVU58 + ARM GAS /tmp/ccZlaZko.s page 11 + + + 232 0006 00D1 bne .LCB192 + 233 0008 7FE2 b .L86 @long jump + 234 .LCB192: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); + 235 .loc 1 311 3 is_stmt 1 view .LVU59 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) + 236 .loc 1 314 3 view .LVU60 + 237 .loc 1 314 25 is_stmt 0 view .LVU61 + 238 000a 0368 ldr r3, [r0] + 239 .loc 1 314 5 view .LVU62 + 240 000c DB07 lsls r3, r3, #31 + 241 000e 2BD5 bpl .L21 + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); + 242 .loc 1 317 5 is_stmt 1 view .LVU63 + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) + 243 .loc 1 320 5 view .LVU64 + 244 .loc 1 320 9 is_stmt 0 view .LVU65 + 245 0010 B34B ldr r3, .L139 + 246 0012 5A68 ldr r2, [r3, #4] + 247 0014 0C23 movs r3, #12 + 248 0016 1340 ands r3, r2 + 249 .loc 1 320 7 view .LVU66 + 250 0018 042B cmp r3, #4 + 251 001a 1DD0 beq .L22 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 252 .loc 1 321 13 view .LVU67 + 253 001c B04B ldr r3, .L139 + 254 001e 5A68 ldr r2, [r3, #4] + 255 0020 0C23 movs r3, #12 + 256 0022 1340 ands r3, r2 + 257 .loc 1 321 8 view .LVU68 + 258 0024 082B cmp r3, #8 + 259 0026 0ED0 beq .L122 + 260 .L23: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); + 261 .loc 1 331 7 is_stmt 1 view .LVU69 + 262 .loc 1 331 7 view .LVU70 + ARM GAS /tmp/ccZlaZko.s page 12 + + + 263 0028 6368 ldr r3, [r4, #4] + 264 002a 012B cmp r3, #1 + 265 002c 41D0 beq .L123 + 266 .loc 1 331 7 discriminator 2 view .LVU71 + 267 002e 002B cmp r3, #0 + 268 0030 56D1 bne .L26 + 269 .loc 1 331 7 discriminator 4 view .LVU72 + 270 0032 AB4B ldr r3, .L139 + 271 0034 1A68 ldr r2, [r3] + 272 0036 AB49 ldr r1, .L139+4 + 273 0038 0A40 ands r2, r1 + 274 003a 1A60 str r2, [r3] + 275 .loc 1 331 7 discriminator 4 view .LVU73 + 276 003c 1A68 ldr r2, [r3] + 277 003e AA49 ldr r1, .L139+8 + 278 0040 0A40 ands r2, r1 + 279 0042 1A60 str r2, [r3] + 280 0044 3BE0 b .L25 + 281 .L122: + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 282 .loc 1 321 82 is_stmt 0 discriminator 1 view .LVU74 + 283 0046 A64B ldr r3, .L139 + 284 0048 5B68 ldr r3, [r3, #4] + 285 004a C022 movs r2, #192 + 286 004c 5202 lsls r2, r2, #9 + 287 004e 1340 ands r3, r2 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 288 .loc 1 321 78 discriminator 1 view .LVU75 + 289 0050 8022 movs r2, #128 + 290 0052 5202 lsls r2, r2, #9 + 291 0054 9342 cmp r3, r2 + 292 0056 E7D1 bne .L23 + 293 .L22: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 294 .loc 1 323 7 is_stmt 1 view .LVU76 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 295 .loc 1 323 11 is_stmt 0 view .LVU77 + 296 0058 A14B ldr r3, .L139 + 297 005a 1B68 ldr r3, [r3] + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 298 .loc 1 323 9 view .LVU78 + 299 005c 9B03 lsls r3, r3, #14 + 300 005e 03D5 bpl .L21 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 301 .loc 1 323 78 discriminator 1 view .LVU79 + 302 0060 6368 ldr r3, [r4, #4] + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 303 .loc 1 323 57 discriminator 1 view .LVU80 + 304 0062 002B cmp r3, #0 + 305 0064 00D1 bne .LCB258 + 306 0066 53E2 b .L124 @long jump + 307 .LCB258: + 308 .LVL15: + 309 .L21: + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSE State */ + ARM GAS /tmp/ccZlaZko.s page 13 + + + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSE is ready */ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSE is disabled */ + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) + 310 .loc 1 366 3 is_stmt 1 view .LVU81 + 311 .loc 1 366 25 is_stmt 0 view .LVU82 + 312 0068 2368 ldr r3, [r4] + 313 .loc 1 366 5 view .LVU83 + 314 006a 9B07 lsls r3, r3, #30 + 315 006c 77D5 bpl .L33 + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); + 316 .loc 1 369 5 is_stmt 1 view .LVU84 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); + 317 .loc 1 370 5 view .LVU85 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) + 318 .loc 1 373 5 view .LVU86 + 319 .loc 1 373 9 is_stmt 0 view .LVU87 + 320 006e 9C4B ldr r3, .L139 + 321 0070 5B68 ldr r3, [r3, #4] + 322 0072 0C22 movs r2, #12 + 323 .loc 1 373 7 view .LVU88 + 324 0074 1A42 tst r2, r3 + 325 0076 62D0 beq .L34 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 326 .loc 1 374 13 view .LVU89 + ARM GAS /tmp/ccZlaZko.s page 14 + + + 327 0078 994B ldr r3, .L139 + 328 007a 5A68 ldr r2, [r3, #4] + 329 007c 0C23 movs r3, #12 + 330 007e 1340 ands r3, r2 + 331 .loc 1 374 8 view .LVU90 + 332 0080 082B cmp r3, #8 + 333 0082 53D0 beq .L125 + 334 .L35: + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI State */ + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) + 335 .loc 1 391 7 is_stmt 1 view .LVU91 + 336 .loc 1 391 27 is_stmt 0 view .LVU92 + 337 0084 E368 ldr r3, [r4, #12] + 338 .loc 1 391 9 view .LVU93 + 339 0086 002B cmp r3, #0 + 340 0088 00D1 bne .LCB286 + 341 008a 8AE0 b .L37 @long jump + 342 .LCB286: + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); + 343 .loc 1 394 9 is_stmt 1 view .LVU94 + 344 008c 944A ldr r2, .L139 + 345 008e 1368 ldr r3, [r2] + 346 0090 0121 movs r1, #1 + 347 0092 0B43 orrs r3, r1 + 348 0094 1360 str r3, [r2] + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 349 .loc 1 397 9 view .LVU95 + 350 .loc 1 397 21 is_stmt 0 view .LVU96 + 351 0096 FFF7FEFF bl HAL_GetTick + 352 .LVL16: + 353 009a 0500 movs r5, r0 + 354 .LVL17: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 355 .loc 1 400 9 is_stmt 1 view .LVU97 + 356 .L38: + 357 .loc 1 400 51 view .LVU98 + ARM GAS /tmp/ccZlaZko.s page 15 + + + 358 .loc 1 400 15 is_stmt 0 view .LVU99 + 359 009c 904B ldr r3, .L139 + 360 009e 1B68 ldr r3, [r3] + 361 .loc 1 400 51 view .LVU100 + 362 00a0 9B07 lsls r3, r3, #30 + 363 00a2 75D4 bmi .L126 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 364 .loc 1 402 11 is_stmt 1 view .LVU101 + 365 .loc 1 402 15 is_stmt 0 view .LVU102 + 366 00a4 FFF7FEFF bl HAL_GetTick + 367 .LVL18: + 368 .loc 1 402 29 discriminator 1 view .LVU103 + 369 00a8 401B subs r0, r0, r5 + 370 .loc 1 402 13 discriminator 1 view .LVU104 + 371 00aa 0228 cmp r0, #2 + 372 00ac F6D9 bls .L38 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 373 .loc 1 404 20 view .LVU105 + 374 00ae 0320 movs r0, #3 + 375 00b0 2CE2 b .L20 + 376 .LVL19: + 377 .L123: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 378 .loc 1 331 7 is_stmt 1 discriminator 1 view .LVU106 + 379 00b2 8B4A ldr r2, .L139 + 380 00b4 1168 ldr r1, [r2] + 381 00b6 8023 movs r3, #128 + 382 00b8 5B02 lsls r3, r3, #9 + 383 00ba 0B43 orrs r3, r1 + 384 00bc 1360 str r3, [r2] + 385 .L25: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 386 .loc 1 331 7 discriminator 10 view .LVU107 + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 387 .loc 1 335 7 view .LVU108 + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 388 .loc 1 335 27 is_stmt 0 view .LVU109 + 389 00be 6368 ldr r3, [r4, #4] + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 390 .loc 1 335 9 view .LVU110 + 391 00c0 002B cmp r3, #0 + 392 00c2 25D0 beq .L28 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 393 .loc 1 338 9 is_stmt 1 view .LVU111 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 394 .loc 1 338 21 is_stmt 0 view .LVU112 + 395 00c4 FFF7FEFF bl HAL_GetTick + 396 .LVL20: + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 397 .loc 1 338 21 view .LVU113 + 398 00c8 0500 movs r5, r0 + 399 .LVL21: + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 400 .loc 1 341 9 is_stmt 1 view .LVU114 + 401 .L29: + ARM GAS /tmp/ccZlaZko.s page 16 + + + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 402 .loc 1 341 51 view .LVU115 + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 403 .loc 1 341 15 is_stmt 0 view .LVU116 + 404 00ca 854B ldr r3, .L139 + 405 00cc 1B68 ldr r3, [r3] + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 406 .loc 1 341 51 view .LVU117 + 407 00ce 9B03 lsls r3, r3, #14 + 408 00d0 CAD4 bmi .L21 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 409 .loc 1 343 11 is_stmt 1 view .LVU118 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 410 .loc 1 343 15 is_stmt 0 view .LVU119 + 411 00d2 FFF7FEFF bl HAL_GetTick + 412 .LVL22: + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 413 .loc 1 343 29 discriminator 1 view .LVU120 + 414 00d6 401B subs r0, r0, r5 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 415 .loc 1 343 13 discriminator 1 view .LVU121 + 416 00d8 6428 cmp r0, #100 + 417 00da F6D9 bls .L29 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 418 .loc 1 345 20 view .LVU122 + 419 00dc 0320 movs r0, #3 + 420 00de 15E2 b .L20 + 421 .LVL23: + 422 .L26: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 423 .loc 1 331 7 is_stmt 1 discriminator 5 view .LVU123 + 424 00e0 052B cmp r3, #5 + 425 00e2 09D0 beq .L127 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 426 .loc 1 331 7 discriminator 8 view .LVU124 + 427 00e4 7E4B ldr r3, .L139 + 428 00e6 1A68 ldr r2, [r3] + 429 00e8 7E49 ldr r1, .L139+4 + 430 00ea 0A40 ands r2, r1 + 431 00ec 1A60 str r2, [r3] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 432 .loc 1 331 7 discriminator 8 view .LVU125 + 433 00ee 1A68 ldr r2, [r3] + 434 00f0 7D49 ldr r1, .L139+8 + 435 00f2 0A40 ands r2, r1 + 436 00f4 1A60 str r2, [r3] + 437 00f6 E2E7 b .L25 + 438 .L127: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 439 .loc 1 331 7 discriminator 7 view .LVU126 + 440 00f8 794B ldr r3, .L139 + 441 00fa 1968 ldr r1, [r3] + 442 00fc 8022 movs r2, #128 + 443 00fe D202 lsls r2, r2, #11 + 444 0100 0A43 orrs r2, r1 + 445 0102 1A60 str r2, [r3] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccZlaZko.s page 17 + + + 446 .loc 1 331 7 discriminator 7 view .LVU127 + 447 0104 1968 ldr r1, [r3] + 448 0106 8022 movs r2, #128 + 449 0108 5202 lsls r2, r2, #9 + 450 010a 0A43 orrs r2, r1 + 451 010c 1A60 str r2, [r3] + 452 010e D6E7 b .L25 + 453 .L28: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 454 .loc 1 352 9 view .LVU128 + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 455 .loc 1 352 21 is_stmt 0 view .LVU129 + 456 0110 FFF7FEFF bl HAL_GetTick + 457 .LVL24: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 458 .loc 1 352 21 view .LVU130 + 459 0114 0500 movs r5, r0 + 460 .LVL25: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 461 .loc 1 355 9 is_stmt 1 view .LVU131 + 462 .L31: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 463 .loc 1 355 51 view .LVU132 + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 464 .loc 1 355 15 is_stmt 0 view .LVU133 + 465 0116 724B ldr r3, .L139 + 466 0118 1B68 ldr r3, [r3] + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 467 .loc 1 355 51 view .LVU134 + 468 011a 9B03 lsls r3, r3, #14 + 469 011c A4D5 bpl .L21 + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 470 .loc 1 357 12 is_stmt 1 view .LVU135 + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 471 .loc 1 357 16 is_stmt 0 view .LVU136 + 472 011e FFF7FEFF bl HAL_GetTick + 473 .LVL26: + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 474 .loc 1 357 30 discriminator 1 view .LVU137 + 475 0122 401B subs r0, r0, r5 + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 476 .loc 1 357 14 discriminator 1 view .LVU138 + 477 0124 6428 cmp r0, #100 + 478 0126 F6D9 bls .L31 + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 479 .loc 1 359 20 view .LVU139 + 480 0128 0320 movs r0, #3 + 481 012a EFE1 b .L20 + 482 .LVL27: + 483 .L125: + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 484 .loc 1 374 82 discriminator 1 view .LVU140 + 485 012c 6C4B ldr r3, .L139 + 486 012e 5B68 ldr r3, [r3, #4] + 487 0130 C022 movs r2, #192 + 488 0132 5202 lsls r2, r2, #9 + 489 0134 1340 ands r3, r2 + ARM GAS /tmp/ccZlaZko.s page 18 + + + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 490 .loc 1 374 78 discriminator 1 view .LVU141 + 491 0136 8022 movs r2, #128 + 492 0138 1202 lsls r2, r2, #8 + 493 013a 9342 cmp r3, r2 + 494 013c A2D1 bne .L35 + 495 .L34: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 496 .loc 1 377 7 is_stmt 1 view .LVU142 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 497 .loc 1 377 11 is_stmt 0 view .LVU143 + 498 013e 684B ldr r3, .L139 + 499 0140 1B68 ldr r3, [r3] + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 500 .loc 1 377 9 view .LVU144 + 501 0142 9B07 lsls r3, r3, #30 + 502 0144 03D5 bpl .L36 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 503 .loc 1 377 78 discriminator 1 view .LVU145 + 504 0146 E368 ldr r3, [r4, #12] + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 505 .loc 1 377 57 discriminator 1 view .LVU146 + 506 0148 012B cmp r3, #1 + 507 014a 00D0 beq .LCB448 + 508 014c E2E1 b .L90 @long jump + 509 .LCB448: + 510 .L36: + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 511 .loc 1 385 9 is_stmt 1 view .LVU147 + 512 014e 6449 ldr r1, .L139 + 513 0150 0B68 ldr r3, [r1] + 514 0152 F822 movs r2, #248 + 515 0154 9343 bics r3, r2 + 516 0156 2269 ldr r2, [r4, #16] + 517 0158 D200 lsls r2, r2, #3 + 518 015a 1343 orrs r3, r2 + 519 015c 0B60 str r3, [r1] + 520 .L33: + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is disabled */ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccZlaZko.s page 19 + + + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) + 521 .loc 1 431 3 view .LVU148 + 522 .loc 1 431 25 is_stmt 0 view .LVU149 + 523 015e 2368 ldr r3, [r4] + 524 .loc 1 431 5 view .LVU150 + 525 0160 1B07 lsls r3, r3, #28 + 526 0162 44D5 bpl .L42 + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); + 527 .loc 1 434 5 is_stmt 1 view .LVU151 + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSI State */ + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) + 528 .loc 1 437 5 view .LVU152 + 529 .loc 1 437 25 is_stmt 0 view .LVU153 + 530 0164 E369 ldr r3, [r4, #28] + 531 .loc 1 437 7 view .LVU154 + 532 0166 002B cmp r3, #0 + 533 0168 2ED0 beq .L43 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); + 534 .loc 1 440 7 is_stmt 1 view .LVU155 + 535 016a 5D4A ldr r2, .L139 + 536 016c 536A ldr r3, [r2, #36] + 537 016e 0121 movs r1, #1 + 538 0170 0B43 orrs r3, r1 + 539 0172 5362 str r3, [r2, #36] + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 540 .loc 1 443 7 view .LVU156 + 541 .loc 1 443 19 is_stmt 0 view .LVU157 + 542 0174 FFF7FEFF bl HAL_GetTick + 543 .LVL28: + 544 0178 0500 movs r5, r0 + 545 .LVL29: + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSI is ready */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 546 .loc 1 446 7 is_stmt 1 view .LVU158 + 547 .L44: + 548 .loc 1 446 49 view .LVU159 + 549 .loc 1 446 13 is_stmt 0 view .LVU160 + 550 017a 594B ldr r3, .L139 + 551 017c 5B6A ldr r3, [r3, #36] + 552 .loc 1 446 49 view .LVU161 + 553 017e 9B07 lsls r3, r3, #30 + 554 0180 35D4 bmi .L42 + ARM GAS /tmp/ccZlaZko.s page 20 + + + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 555 .loc 1 448 9 is_stmt 1 view .LVU162 + 556 .loc 1 448 13 is_stmt 0 view .LVU163 + 557 0182 FFF7FEFF bl HAL_GetTick + 558 .LVL30: + 559 .loc 1 448 27 discriminator 1 view .LVU164 + 560 0186 401B subs r0, r0, r5 + 561 .loc 1 448 11 discriminator 1 view .LVU165 + 562 0188 0228 cmp r0, #2 + 563 018a F6D9 bls .L44 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 564 .loc 1 450 18 view .LVU166 + 565 018c 0320 movs r0, #3 + 566 018e BDE1 b .L20 + 567 .L126: + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 568 .loc 1 409 9 is_stmt 1 view .LVU167 + 569 0190 5349 ldr r1, .L139 + 570 0192 0B68 ldr r3, [r1] + 571 0194 F822 movs r2, #248 + 572 0196 9343 bics r3, r2 + 573 0198 2269 ldr r2, [r4, #16] + 574 019a D200 lsls r2, r2, #3 + 575 019c 1343 orrs r3, r2 + 576 019e 0B60 str r3, [r1] + 577 01a0 DDE7 b .L33 + 578 .LVL31: + 579 .L37: + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 580 .loc 1 414 9 view .LVU168 + 581 01a2 4F4A ldr r2, .L139 + 582 01a4 1368 ldr r3, [r2] + 583 01a6 0121 movs r1, #1 + 584 01a8 8B43 bics r3, r1 + 585 01aa 1360 str r3, [r2] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 586 .loc 1 417 9 view .LVU169 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 587 .loc 1 417 21 is_stmt 0 view .LVU170 + 588 01ac FFF7FEFF bl HAL_GetTick + 589 .LVL32: + 590 01b0 0500 movs r5, r0 + 591 .LVL33: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 592 .loc 1 420 9 is_stmt 1 view .LVU171 + 593 .L40: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 594 .loc 1 420 51 view .LVU172 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 595 .loc 1 420 15 is_stmt 0 view .LVU173 + 596 01b2 4B4B ldr r3, .L139 + 597 01b4 1B68 ldr r3, [r3] + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 598 .loc 1 420 51 view .LVU174 + 599 01b6 9B07 lsls r3, r3, #30 + ARM GAS /tmp/ccZlaZko.s page 21 + + + 600 01b8 D1D5 bpl .L33 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 601 .loc 1 422 11 is_stmt 1 view .LVU175 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 602 .loc 1 422 15 is_stmt 0 view .LVU176 + 603 01ba FFF7FEFF bl HAL_GetTick + 604 .LVL34: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 605 .loc 1 422 29 discriminator 1 view .LVU177 + 606 01be 401B subs r0, r0, r5 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 607 .loc 1 422 13 discriminator 1 view .LVU178 + 608 01c0 0228 cmp r0, #2 + 609 01c2 F6D9 bls .L40 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 610 .loc 1 424 20 view .LVU179 + 611 01c4 0320 movs r0, #3 + 612 01c6 A1E1 b .L20 + 613 .LVL35: + 614 .L43: + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); + 615 .loc 1 457 7 is_stmt 1 view .LVU180 + 616 01c8 454A ldr r2, .L139 + 617 01ca 536A ldr r3, [r2, #36] + 618 01cc 0121 movs r1, #1 + 619 01ce 8B43 bics r3, r1 + 620 01d0 5362 str r3, [r2, #36] + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 621 .loc 1 460 7 view .LVU181 + 622 .loc 1 460 19 is_stmt 0 view .LVU182 + 623 01d2 FFF7FEFF bl HAL_GetTick + 624 .LVL36: + 625 01d6 0500 movs r5, r0 + 626 .LVL37: + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSI is disabled */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 627 .loc 1 463 7 is_stmt 1 view .LVU183 + 628 .L46: + 629 .loc 1 463 49 view .LVU184 + 630 .loc 1 463 13 is_stmt 0 view .LVU185 + 631 01d8 414B ldr r3, .L139 + 632 01da 5B6A ldr r3, [r3, #36] + 633 .loc 1 463 49 view .LVU186 + 634 01dc 9B07 lsls r3, r3, #30 + 635 01de 06D5 bpl .L42 + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 636 .loc 1 465 9 is_stmt 1 view .LVU187 + ARM GAS /tmp/ccZlaZko.s page 22 + + + 637 .loc 1 465 13 is_stmt 0 view .LVU188 + 638 01e0 FFF7FEFF bl HAL_GetTick + 639 .LVL38: + 640 .loc 1 465 27 discriminator 1 view .LVU189 + 641 01e4 401B subs r0, r0, r5 + 642 .loc 1 465 11 discriminator 1 view .LVU190 + 643 01e6 0228 cmp r0, #2 + 644 01e8 F6D9 bls .L46 + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 645 .loc 1 467 18 view .LVU191 + 646 01ea 0320 movs r0, #3 + 647 01ec 8EE1 b .L20 + 648 .LVL39: + 649 .L42: + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) + 650 .loc 1 473 3 is_stmt 1 view .LVU192 + 651 .loc 1 473 25 is_stmt 0 view .LVU193 + 652 01ee 2368 ldr r3, [r4] + 653 .loc 1 473 5 view .LVU194 + 654 01f0 5B07 lsls r3, r3, #29 + 655 01f2 00D4 bmi .LCB595 + 656 01f4 80E0 b .L48 @long jump + 657 .LCB595: + 658 .LBB2: + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; + 659 .loc 1 475 5 is_stmt 1 view .LVU195 + 660 .LVL40: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); + 661 .loc 1 478 5 view .LVU196 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 662 .loc 1 482 5 view .LVU197 + 663 .loc 1 482 8 is_stmt 0 view .LVU198 + 664 01f6 3A4B ldr r3, .L139 + 665 01f8 DB69 ldr r3, [r3, #28] + 666 .loc 1 482 7 view .LVU199 + 667 01fa DB00 lsls r3, r3, #3 + 668 01fc 1DD4 bmi .L95 + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 669 .loc 1 484 7 is_stmt 1 view .LVU200 + 670 .LBB3: + 671 .loc 1 484 7 view .LVU201 + 672 .loc 1 484 7 view .LVU202 + 673 01fe 384B ldr r3, .L139 + 674 0200 DA69 ldr r2, [r3, #28] + ARM GAS /tmp/ccZlaZko.s page 23 + + + 675 0202 8021 movs r1, #128 + 676 0204 4905 lsls r1, r1, #21 + 677 0206 0A43 orrs r2, r1 + 678 0208 DA61 str r2, [r3, #28] + 679 .loc 1 484 7 view .LVU203 + 680 020a DB69 ldr r3, [r3, #28] + 681 020c 0B40 ands r3, r1 + 682 020e 0193 str r3, [sp, #4] + 683 .loc 1 484 7 view .LVU204 + 684 0210 019B ldr r3, [sp, #4] + 685 .LBE3: + 686 .loc 1 484 7 view .LVU205 + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pwrclkchanged = SET; + 687 .loc 1 485 7 view .LVU206 + 688 .LVL41: + 689 .loc 1 485 21 is_stmt 0 view .LVU207 + 690 0212 0125 movs r5, #1 + 691 .LVL42: + 692 .L49: + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 693 .loc 1 488 5 is_stmt 1 view .LVU208 + 694 .loc 1 488 8 is_stmt 0 view .LVU209 + 695 0214 354B ldr r3, .L139+12 + 696 0216 1B68 ldr r3, [r3] + 697 .loc 1 488 7 view .LVU210 + 698 0218 DB05 lsls r3, r3, #23 + 699 021a 10D5 bpl .L128 + 700 .L50: + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable write access to Backup domain */ + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 701 .loc 1 506 5 is_stmt 1 view .LVU211 + 702 .loc 1 506 5 view .LVU212 + 703 021c A368 ldr r3, [r4, #8] + 704 021e 012B cmp r3, #1 + 705 0220 21D0 beq .L129 + 706 .loc 1 506 5 discriminator 2 view .LVU213 + 707 0222 002B cmp r3, #0 + 708 0224 36D1 bne .L55 + 709 .loc 1 506 5 discriminator 4 view .LVU214 + ARM GAS /tmp/ccZlaZko.s page 24 + + + 710 0226 2E4B ldr r3, .L139 + 711 0228 1A6A ldr r2, [r3, #32] + 712 022a 0121 movs r1, #1 + 713 022c 8A43 bics r2, r1 + 714 022e 1A62 str r2, [r3, #32] + 715 .loc 1 506 5 discriminator 4 view .LVU215 + 716 0230 1A6A ldr r2, [r3, #32] + 717 0232 0331 adds r1, r1, #3 + 718 0234 8A43 bics r2, r1 + 719 0236 1A62 str r2, [r3, #32] + 720 0238 1AE0 b .L54 + 721 .LVL43: + 722 .L95: + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 723 .loc 1 475 22 is_stmt 0 view .LVU216 + 724 023a 0025 movs r5, #0 + 725 023c EAE7 b .L49 + 726 .LVL44: + 727 .L128: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 728 .loc 1 491 7 is_stmt 1 view .LVU217 + 729 023e 2B4A ldr r2, .L139+12 + 730 0240 1168 ldr r1, [r2] + 731 0242 8023 movs r3, #128 + 732 0244 5B00 lsls r3, r3, #1 + 733 0246 0B43 orrs r3, r1 + 734 0248 1360 str r3, [r2] + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 735 .loc 1 494 7 view .LVU218 + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 736 .loc 1 494 19 is_stmt 0 view .LVU219 + 737 024a FFF7FEFF bl HAL_GetTick + 738 .LVL45: + 739 024e 0600 movs r6, r0 + 740 .LVL46: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 741 .loc 1 496 7 is_stmt 1 view .LVU220 + 742 .L51: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 743 .loc 1 496 13 view .LVU221 + 744 0250 264B ldr r3, .L139+12 + 745 0252 1B68 ldr r3, [r3] + 746 0254 DB05 lsls r3, r3, #23 + 747 0256 E1D4 bmi .L50 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 748 .loc 1 498 9 view .LVU222 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 749 .loc 1 498 13 is_stmt 0 view .LVU223 + 750 0258 FFF7FEFF bl HAL_GetTick + 751 .LVL47: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 752 .loc 1 498 27 discriminator 1 view .LVU224 + 753 025c 801B subs r0, r0, r6 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 754 .loc 1 498 11 discriminator 1 view .LVU225 + 755 025e 6428 cmp r0, #100 + 756 0260 F6D9 bls .L51 + ARM GAS /tmp/ccZlaZko.s page 25 + + + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 757 .loc 1 500 18 view .LVU226 + 758 0262 0320 movs r0, #3 + 759 0264 52E1 b .L20 + 760 .LVL48: + 761 .L129: + 762 .loc 1 506 5 is_stmt 1 discriminator 1 view .LVU227 + 763 0266 1E4A ldr r2, .L139 + 764 0268 136A ldr r3, [r2, #32] + 765 026a 0121 movs r1, #1 + 766 026c 0B43 orrs r3, r1 + 767 026e 1362 str r3, [r2, #32] + 768 .L54: + 769 .loc 1 506 5 discriminator 10 view .LVU228 + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) + 770 .loc 1 508 5 view .LVU229 + 771 .loc 1 508 25 is_stmt 0 view .LVU230 + 772 0270 A368 ldr r3, [r4, #8] + 773 .loc 1 508 7 view .LVU231 + 774 0272 002B cmp r3, #0 + 775 0274 24D0 beq .L57 + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 776 .loc 1 511 7 is_stmt 1 view .LVU232 + 777 .loc 1 511 19 is_stmt 0 view .LVU233 + 778 0276 FFF7FEFF bl HAL_GetTick + 779 .LVL49: + 780 027a 0600 movs r6, r0 + 781 .LVL50: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSE is ready */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 782 .loc 1 514 7 is_stmt 1 view .LVU234 + 783 .L58: + 784 .loc 1 514 49 view .LVU235 + 785 .loc 1 514 13 is_stmt 0 view .LVU236 + 786 027c 184B ldr r3, .L139 + 787 027e 1B6A ldr r3, [r3, #32] + 788 .loc 1 514 49 view .LVU237 + 789 0280 9B07 lsls r3, r3, #30 + 790 0282 37D4 bmi .L60 + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 791 .loc 1 516 9 is_stmt 1 view .LVU238 + 792 .loc 1 516 13 is_stmt 0 view .LVU239 + 793 0284 FFF7FEFF bl HAL_GetTick + 794 .LVL51: + 795 .loc 1 516 27 discriminator 1 view .LVU240 + 796 0288 801B subs r0, r0, r6 + 797 .loc 1 516 11 discriminator 1 view .LVU241 + 798 028a 194B ldr r3, .L139+16 + 799 028c 9842 cmp r0, r3 + 800 028e F5D9 bls .L58 + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + ARM GAS /tmp/ccZlaZko.s page 26 + + + 801 .loc 1 518 18 view .LVU242 + 802 0290 0320 movs r0, #3 + 803 0292 3BE1 b .L20 + 804 .LVL52: + 805 .L55: + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 806 .loc 1 506 5 is_stmt 1 discriminator 5 view .LVU243 + 807 0294 052B cmp r3, #5 + 808 0296 09D0 beq .L130 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 809 .loc 1 506 5 discriminator 8 view .LVU244 + 810 0298 114B ldr r3, .L139 + 811 029a 1A6A ldr r2, [r3, #32] + 812 029c 0121 movs r1, #1 + 813 029e 8A43 bics r2, r1 + 814 02a0 1A62 str r2, [r3, #32] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 815 .loc 1 506 5 discriminator 8 view .LVU245 + 816 02a2 1A6A ldr r2, [r3, #32] + 817 02a4 0331 adds r1, r1, #3 + 818 02a6 8A43 bics r2, r1 + 819 02a8 1A62 str r2, [r3, #32] + 820 02aa E1E7 b .L54 + 821 .L130: + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 822 .loc 1 506 5 discriminator 7 view .LVU246 + 823 02ac 0C4B ldr r3, .L139 + 824 02ae 1A6A ldr r2, [r3, #32] + 825 02b0 0421 movs r1, #4 + 826 02b2 0A43 orrs r2, r1 + 827 02b4 1A62 str r2, [r3, #32] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 828 .loc 1 506 5 discriminator 7 view .LVU247 + 829 02b6 1A6A ldr r2, [r3, #32] + 830 02b8 0339 subs r1, r1, #3 + 831 02ba 0A43 orrs r2, r1 + 832 02bc 1A62 str r2, [r3, #32] + 833 02be D7E7 b .L54 + 834 .L57: + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 835 .loc 1 525 7 view .LVU248 + 836 .loc 1 525 19 is_stmt 0 view .LVU249 + 837 02c0 FFF7FEFF bl HAL_GetTick + 838 .LVL53: + 839 02c4 0600 movs r6, r0 + 840 .LVL54: + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSE is disabled */ + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 841 .loc 1 528 7 is_stmt 1 view .LVU250 + 842 .L61: + ARM GAS /tmp/ccZlaZko.s page 27 + + + 843 .loc 1 528 49 view .LVU251 + 844 .loc 1 528 13 is_stmt 0 view .LVU252 + 845 02c6 064B ldr r3, .L139 + 846 02c8 1B6A ldr r3, [r3, #32] + 847 .loc 1 528 49 view .LVU253 + 848 02ca 9B07 lsls r3, r3, #30 + 849 02cc 12D5 bpl .L60 + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 850 .loc 1 530 9 is_stmt 1 view .LVU254 + 851 .loc 1 530 13 is_stmt 0 view .LVU255 + 852 02ce FFF7FEFF bl HAL_GetTick + 853 .LVL55: + 854 .loc 1 530 27 discriminator 1 view .LVU256 + 855 02d2 801B subs r0, r0, r6 + 856 .loc 1 530 11 discriminator 1 view .LVU257 + 857 02d4 064B ldr r3, .L139+16 + 858 02d6 9842 cmp r0, r3 + 859 02d8 F5D9 bls .L61 + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 860 .loc 1 532 18 view .LVU258 + 861 02da 0320 movs r0, #3 + 862 02dc 16E1 b .L20 + 863 .L140: + 864 02de C046 .align 2 + 865 .L139: + 866 02e0 00100240 .word 1073876992 + 867 02e4 FFFFFEFF .word -65537 + 868 02e8 FFFFFBFF .word -262145 + 869 02ec 00700040 .word 1073770496 + 870 02f0 88130000 .word 5000 + 871 .L60: + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Require to disable power clock if necessary */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(pwrclkchanged == SET) + 872 .loc 1 538 5 is_stmt 1 view .LVU259 + 873 .loc 1 538 7 is_stmt 0 view .LVU260 + 874 02f4 012D cmp r5, #1 + 875 02f6 39D0 beq .L131 + 876 .LVL56: + 877 .L48: + 878 .loc 1 538 7 view .LVU261 + 879 .LBE2: + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI14 Configuration --------------------------*/ + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14) + 880 .loc 1 545 3 is_stmt 1 view .LVU262 + 881 .loc 1 545 25 is_stmt 0 view .LVU263 + 882 02f8 2368 ldr r3, [r4] + ARM GAS /tmp/ccZlaZko.s page 28 + + + 883 .loc 1 545 5 view .LVU264 + 884 02fa DB06 lsls r3, r3, #27 + 885 02fc 10D5 bpl .L63 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State)); + 886 .loc 1 548 5 is_stmt 1 view .LVU265 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue)); + 887 .loc 1 549 5 view .LVU266 + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI14 State */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON) + 888 .loc 1 552 5 view .LVU267 + 889 .loc 1 552 25 is_stmt 0 view .LVU268 + 890 02fe 6369 ldr r3, [r4, #20] + 891 .loc 1 552 7 view .LVU269 + 892 0300 012B cmp r3, #1 + 893 0302 39D0 beq .L132 + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable ADC control of the Internal High Speed oscillator HSI14 */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_DISABLE(); + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_ENABLE(); + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL) + 894 .loc 1 575 10 is_stmt 1 view .LVU270 + 895 .loc 1 575 12 is_stmt 0 view .LVU271 + 896 0304 0533 adds r3, r3, #5 + 897 0306 57D1 bne .L67 + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable ADC control of the Internal High Speed oscillator HSI14 */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_ENABLE(); + 898 .loc 1 578 7 is_stmt 1 view .LVU272 + 899 0308 894A ldr r2, .L141 + 900 030a 536B ldr r3, [r2, #52] + 901 030c 0421 movs r1, #4 + 902 030e 8B43 bics r3, r1 + 903 0310 5363 str r3, [r2, #52] + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); + ARM GAS /tmp/ccZlaZko.s page 29 + + + 904 .loc 1 581 7 view .LVU273 + 905 0312 536B ldr r3, [r2, #52] + 906 0314 F431 adds r1, r1, #244 + 907 0316 8B43 bics r3, r1 + 908 0318 A169 ldr r1, [r4, #24] + 909 031a C900 lsls r1, r1, #3 + 910 031c 0B43 orrs r3, r1 + 911 031e 5363 str r3, [r2, #52] + 912 .L63: + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable ADC control of the Internal High Speed oscillator HSI14 */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_DISABLE(); + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_DISABLE(); + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI48 Configuration --------------------------*/ + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) + 913 .loc 1 607 3 view .LVU274 + 914 .loc 1 607 25 is_stmt 0 view .LVU275 + 915 0320 2368 ldr r3, [r4] + 916 .loc 1 607 5 view .LVU276 + 917 0322 9B06 lsls r3, r3, #26 + 918 0324 6ED5 bpl .L70 + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); + 919 .loc 1 610 5 is_stmt 1 view .LVU277 + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When the HSI48 is used as system clock it is not allowed to be disabled */ + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) || + 920 .loc 1 613 5 view .LVU278 + 921 .loc 1 613 9 is_stmt 0 view .LVU279 + 922 0326 824B ldr r3, .L141 + 923 0328 5A68 ldr r2, [r3, #4] + 924 032a 0C23 movs r3, #12 + 925 032c 1340 ands r3, r2 + 926 .loc 1 613 7 view .LVU280 + 927 032e 0C2B cmp r3, #12 + 928 0330 60D0 beq .L71 + ARM GAS /tmp/ccZlaZko.s page 30 + + + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC + 929 .loc 1 614 10 view .LVU281 + 930 0332 7F4B ldr r3, .L141 + 931 0334 5A68 ldr r2, [r3, #4] + 932 0336 0C23 movs r3, #12 + 933 0338 1340 ands r3, r2 + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC + 934 .loc 1 613 73 discriminator 1 view .LVU282 + 935 033a 082B cmp r3, #8 + 936 033c 53D0 beq .L133 + 937 .L72: + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI48 State */ + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) + 938 .loc 1 624 7 is_stmt 1 view .LVU283 + 939 .loc 1 624 27 is_stmt 0 view .LVU284 + 940 033e 236A ldr r3, [r4, #32] + 941 .loc 1 624 9 view .LVU285 + 942 0340 002B cmp r3, #0 + 943 0342 7ED0 beq .L73 + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI48). */ + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI48_ENABLE(); + 944 .loc 1 627 9 is_stmt 1 view .LVU286 + 945 0344 7A4A ldr r2, .L141 + 946 0346 516B ldr r1, [r2, #52] + 947 0348 8023 movs r3, #128 + 948 034a 5B02 lsls r3, r3, #9 + 949 034c 0B43 orrs r3, r1 + 950 034e 5363 str r3, [r2, #52] + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 951 .loc 1 630 9 view .LVU287 + 952 .loc 1 630 21 is_stmt 0 view .LVU288 + 953 0350 FFF7FEFF bl HAL_GetTick + 954 .LVL57: + 955 0354 0500 movs r5, r0 + 956 .LVL58: + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI48 is ready */ + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 957 .loc 1 633 9 is_stmt 1 view .LVU289 + 958 .L74: + 959 .loc 1 633 53 view .LVU290 + 960 .loc 1 633 15 is_stmt 0 view .LVU291 + 961 0356 764B ldr r3, .L141 + 962 0358 5B6B ldr r3, [r3, #52] + 963 .loc 1 633 53 view .LVU292 + 964 035a 9B03 lsls r3, r3, #14 + ARM GAS /tmp/ccZlaZko.s page 31 + + + 965 035c 52D4 bmi .L70 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) + 966 .loc 1 635 11 is_stmt 1 view .LVU293 + 967 .loc 1 635 15 is_stmt 0 view .LVU294 + 968 035e FFF7FEFF bl HAL_GetTick + 969 .LVL59: + 970 .loc 1 635 29 discriminator 1 view .LVU295 + 971 0362 401B subs r0, r0, r5 + 972 .loc 1 635 13 discriminator 1 view .LVU296 + 973 0364 0228 cmp r0, #2 + 974 0366 F6D9 bls .L74 + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 975 .loc 1 637 20 view .LVU297 + 976 0368 0320 movs r0, #3 + 977 036a CFE0 b .L20 + 978 .LVL60: + 979 .L131: + 980 .LBB4: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 981 .loc 1 540 7 is_stmt 1 view .LVU298 + 982 036c 704A ldr r2, .L141 + 983 036e D369 ldr r3, [r2, #28] + 984 0370 7049 ldr r1, .L141+4 + 985 0372 0B40 ands r3, r1 + 986 0374 D361 str r3, [r2, #28] + 987 0376 BFE7 b .L48 + 988 .LVL61: + 989 .L132: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 990 .loc 1 540 7 is_stmt 0 view .LVU299 + 991 .LBE4: + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 992 .loc 1 555 7 is_stmt 1 view .LVU300 + 993 0378 6D4B ldr r3, .L141 + 994 037a 5A6B ldr r2, [r3, #52] + 995 037c 0421 movs r1, #4 + 996 037e 0A43 orrs r2, r1 + 997 0380 5A63 str r2, [r3, #52] + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 998 .loc 1 558 7 view .LVU301 + 999 0382 5A6B ldr r2, [r3, #52] + 1000 0384 0339 subs r1, r1, #3 + 1001 0386 0A43 orrs r2, r1 + 1002 0388 5A63 str r2, [r3, #52] + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1003 .loc 1 561 7 view .LVU302 + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1004 .loc 1 561 19 is_stmt 0 view .LVU303 + 1005 038a FFF7FEFF bl HAL_GetTick + 1006 .LVL62: + 1007 038e 0500 movs r5, r0 + 1008 .LVL63: + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1009 .loc 1 564 7 is_stmt 1 view .LVU304 + 1010 .L65: + ARM GAS /tmp/ccZlaZko.s page 32 + + + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1011 .loc 1 564 51 view .LVU305 + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1012 .loc 1 564 13 is_stmt 0 view .LVU306 + 1013 0390 674B ldr r3, .L141 + 1014 0392 5B6B ldr r3, [r3, #52] + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1015 .loc 1 564 51 view .LVU307 + 1016 0394 9B07 lsls r3, r3, #30 + 1017 0396 06D4 bmi .L134 + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1018 .loc 1 566 9 is_stmt 1 view .LVU308 + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1019 .loc 1 566 13 is_stmt 0 view .LVU309 + 1020 0398 FFF7FEFF bl HAL_GetTick + 1021 .LVL64: + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1022 .loc 1 566 27 discriminator 1 view .LVU310 + 1023 039c 401B subs r0, r0, r5 + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1024 .loc 1 566 11 discriminator 1 view .LVU311 + 1025 039e 0228 cmp r0, #2 + 1026 03a0 F6D9 bls .L65 + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1027 .loc 1 568 18 view .LVU312 + 1028 03a2 0320 movs r0, #3 + 1029 03a4 B2E0 b .L20 + 1030 .L134: + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1031 .loc 1 573 7 is_stmt 1 view .LVU313 + 1032 03a6 6249 ldr r1, .L141 + 1033 03a8 4B6B ldr r3, [r1, #52] + 1034 03aa F822 movs r2, #248 + 1035 03ac 9343 bics r3, r2 + 1036 03ae A269 ldr r2, [r4, #24] + 1037 03b0 D200 lsls r2, r2, #3 + 1038 03b2 1343 orrs r3, r2 + 1039 03b4 4B63 str r3, [r1, #52] + 1040 03b6 B3E7 b .L63 + 1041 .LVL65: + 1042 .L67: + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1043 .loc 1 586 7 view .LVU314 + 1044 03b8 5D4B ldr r3, .L141 + 1045 03ba 5A6B ldr r2, [r3, #52] + 1046 03bc 0421 movs r1, #4 + 1047 03be 0A43 orrs r2, r1 + 1048 03c0 5A63 str r2, [r3, #52] + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1049 .loc 1 589 7 view .LVU315 + 1050 03c2 5A6B ldr r2, [r3, #52] + 1051 03c4 0339 subs r1, r1, #3 + 1052 03c6 8A43 bics r2, r1 + 1053 03c8 5A63 str r2, [r3, #52] + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1054 .loc 1 592 7 view .LVU316 + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccZlaZko.s page 33 + + + 1055 .loc 1 592 19 is_stmt 0 view .LVU317 + 1056 03ca FFF7FEFF bl HAL_GetTick + 1057 .LVL66: + 1058 03ce 0500 movs r5, r0 + 1059 .LVL67: + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1060 .loc 1 595 7 is_stmt 1 view .LVU318 + 1061 .L68: + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1062 .loc 1 595 51 view .LVU319 + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1063 .loc 1 595 13 is_stmt 0 view .LVU320 + 1064 03d0 574B ldr r3, .L141 + 1065 03d2 5B6B ldr r3, [r3, #52] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1066 .loc 1 595 51 view .LVU321 + 1067 03d4 9B07 lsls r3, r3, #30 + 1068 03d6 A3D5 bpl .L63 + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1069 .loc 1 597 9 is_stmt 1 view .LVU322 + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1070 .loc 1 597 13 is_stmt 0 view .LVU323 + 1071 03d8 FFF7FEFF bl HAL_GetTick + 1072 .LVL68: + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1073 .loc 1 597 27 discriminator 1 view .LVU324 + 1074 03dc 401B subs r0, r0, r5 + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1075 .loc 1 597 11 discriminator 1 view .LVU325 + 1076 03de 0228 cmp r0, #2 + 1077 03e0 F6D9 bls .L68 + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1078 .loc 1 599 18 view .LVU326 + 1079 03e2 0320 movs r0, #3 + 1080 03e4 92E0 b .L20 + 1081 .LVL69: + 1082 .L133: + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1083 .loc 1 614 79 view .LVU327 + 1084 03e6 524B ldr r3, .L141 + 1085 03e8 5B68 ldr r3, [r3, #4] + 1086 03ea C022 movs r2, #192 + 1087 03ec 5202 lsls r2, r2, #9 + 1088 03ee 1340 ands r3, r2 + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1089 .loc 1 614 75 view .LVU328 + 1090 03f0 9342 cmp r3, r2 + 1091 03f2 A4D1 bne .L72 + 1092 .L71: + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1093 .loc 1 616 7 is_stmt 1 view .LVU329 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1094 .loc 1 616 11 is_stmt 0 view .LVU330 + 1095 03f4 4E4B ldr r3, .L141 + 1096 03f6 5B6B ldr r3, [r3, #52] + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1097 .loc 1 616 9 view .LVU331 + ARM GAS /tmp/ccZlaZko.s page 34 + + + 1098 03f8 9B03 lsls r3, r3, #14 + 1099 03fa 03D5 bpl .L70 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1100 .loc 1 616 80 discriminator 1 view .LVU332 + 1101 03fc 236A ldr r3, [r4, #32] + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1102 .loc 1 616 59 discriminator 1 view .LVU333 + 1103 03fe 012B cmp r3, #1 + 1104 0400 00D0 beq .LCB1044 + 1105 0402 89E0 b .L101 @long jump + 1106 .LCB1044: + 1107 .L70: + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI48). */ + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI48_DISABLE(); + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI48 is ready */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); + 1108 .loc 1 664 3 is_stmt 1 view .LVU334 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) + 1109 .loc 1 665 3 view .LVU335 + 1110 .loc 1 665 30 is_stmt 0 view .LVU336 + 1111 0404 636A ldr r3, [r4, #36] + 1112 .loc 1 665 6 view .LVU337 + 1113 0406 002B cmp r3, #0 + 1114 0408 00D1 bne .LCB1051 + 1115 040a 87E0 b .L104 @long jump + 1116 .LCB1051: + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) + 1117 .loc 1 668 5 is_stmt 1 view .LVU338 + 1118 .loc 1 668 8 is_stmt 0 view .LVU339 + 1119 040c 484A ldr r2, .L141 + 1120 040e 5168 ldr r1, [r2, #4] + 1121 0410 0C22 movs r2, #12 + ARM GAS /tmp/ccZlaZko.s page 35 + + + 1122 0412 0A40 ands r2, r1 + 1123 .loc 1 668 7 view .LVU340 + 1124 0414 082A cmp r2, #8 + 1125 0416 60D0 beq .L78 + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) + 1126 .loc 1 670 7 is_stmt 1 view .LVU341 + 1127 .loc 1 670 9 is_stmt 0 view .LVU342 + 1128 0418 022B cmp r3, #2 + 1129 041a 25D0 beq .L135 + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the main PLL. */ + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */ + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the main PLL. */ + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is ready */ + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the main PLL. */ + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 1130 .loc 1 714 9 is_stmt 1 view .LVU343 + 1131 041c 444A ldr r2, .L141 + 1132 041e 1368 ldr r3, [r2] + ARM GAS /tmp/ccZlaZko.s page 36 + + + 1133 0420 4549 ldr r1, .L141+8 + 1134 0422 0B40 ands r3, r1 + 1135 0424 1360 str r3, [r2] + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1136 .loc 1 717 9 view .LVU344 + 1137 .loc 1 717 21 is_stmt 0 view .LVU345 + 1138 0426 FFF7FEFF bl HAL_GetTick + 1139 .LVL70: + 1140 042a 0400 movs r4, r0 + 1141 .LVL71: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 1142 .loc 1 720 9 is_stmt 1 view .LVU346 + 1143 .L84: + 1144 .loc 1 720 52 view .LVU347 + 1145 .loc 1 720 15 is_stmt 0 view .LVU348 + 1146 042c 404B ldr r3, .L141 + 1147 042e 1B68 ldr r3, [r3] + 1148 .loc 1 720 52 view .LVU349 + 1149 0430 9B01 lsls r3, r3, #6 + 1150 0432 50D5 bpl .L136 + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 1151 .loc 1 722 11 is_stmt 1 view .LVU350 + 1152 .loc 1 722 15 is_stmt 0 view .LVU351 + 1153 0434 FFF7FEFF bl HAL_GetTick + 1154 .LVL72: + 1155 .loc 1 722 29 discriminator 1 view .LVU352 + 1156 0438 001B subs r0, r0, r4 + 1157 .loc 1 722 13 discriminator 1 view .LVU353 + 1158 043a 0228 cmp r0, #2 + 1159 043c F6D9 bls .L84 + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 1160 .loc 1 724 20 view .LVU354 + 1161 043e 0320 movs r0, #3 + 1162 0440 64E0 b .L20 + 1163 .LVL73: + 1164 .L73: + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1165 .loc 1 644 9 is_stmt 1 view .LVU355 + 1166 0442 3B4A ldr r2, .L141 + 1167 0444 536B ldr r3, [r2, #52] + 1168 0446 3D49 ldr r1, .L141+12 + 1169 0448 0B40 ands r3, r1 + 1170 044a 5363 str r3, [r2, #52] + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1171 .loc 1 647 9 view .LVU356 + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1172 .loc 1 647 21 is_stmt 0 view .LVU357 + 1173 044c FFF7FEFF bl HAL_GetTick + 1174 .LVL74: + 1175 0450 0500 movs r5, r0 + 1176 .LVL75: + ARM GAS /tmp/ccZlaZko.s page 37 + + + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1177 .loc 1 650 9 is_stmt 1 view .LVU358 + 1178 .L76: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1179 .loc 1 650 53 view .LVU359 + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1180 .loc 1 650 15 is_stmt 0 view .LVU360 + 1181 0452 374B ldr r3, .L141 + 1182 0454 5B6B ldr r3, [r3, #52] + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1183 .loc 1 650 53 view .LVU361 + 1184 0456 9B03 lsls r3, r3, #14 + 1185 0458 D4D5 bpl .L70 + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1186 .loc 1 652 11 is_stmt 1 view .LVU362 + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1187 .loc 1 652 15 is_stmt 0 view .LVU363 + 1188 045a FFF7FEFF bl HAL_GetTick + 1189 .LVL76: + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1190 .loc 1 652 29 discriminator 1 view .LVU364 + 1191 045e 401B subs r0, r0, r5 + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1192 .loc 1 652 13 discriminator 1 view .LVU365 + 1193 0460 0228 cmp r0, #2 + 1194 0462 F6D9 bls .L76 + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1195 .loc 1 654 20 view .LVU366 + 1196 0464 0320 movs r0, #3 + 1197 0466 51E0 b .L20 + 1198 .LVL77: + 1199 .L135: + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 1200 .loc 1 673 9 is_stmt 1 view .LVU367 + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); + 1201 .loc 1 674 9 view .LVU368 + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1202 .loc 1 675 9 view .LVU369 + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1203 .loc 1 678 9 view .LVU370 + 1204 0468 314A ldr r2, .L141 + 1205 046a 1368 ldr r3, [r2] + 1206 046c 3249 ldr r1, .L141+8 + 1207 046e 0B40 ands r3, r1 + 1208 0470 1360 str r3, [r2] + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1209 .loc 1 681 9 view .LVU371 + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1210 .loc 1 681 21 is_stmt 0 view .LVU372 + 1211 0472 FFF7FEFF bl HAL_GetTick + 1212 .LVL78: + 1213 0476 0500 movs r5, r0 + 1214 .LVL79: + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1215 .loc 1 684 9 is_stmt 1 view .LVU373 + 1216 .L80: + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccZlaZko.s page 38 + + + 1217 .loc 1 684 52 view .LVU374 + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1218 .loc 1 684 15 is_stmt 0 view .LVU375 + 1219 0478 2D4B ldr r3, .L141 + 1220 047a 1B68 ldr r3, [r3] + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1221 .loc 1 684 52 view .LVU376 + 1222 047c 9B01 lsls r3, r3, #6 + 1223 047e 06D5 bpl .L137 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1224 .loc 1 686 11 is_stmt 1 view .LVU377 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1225 .loc 1 686 15 is_stmt 0 view .LVU378 + 1226 0480 FFF7FEFF bl HAL_GetTick + 1227 .LVL80: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1228 .loc 1 686 29 discriminator 1 view .LVU379 + 1229 0484 401B subs r0, r0, r5 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1230 .loc 1 686 13 discriminator 1 view .LVU380 + 1231 0486 0228 cmp r0, #2 + 1232 0488 F6D9 bls .L80 + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1233 .loc 1 688 20 view .LVU381 + 1234 048a 0320 movs r0, #3 + 1235 048c 3EE0 b .L20 + 1236 .L137: + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1237 .loc 1 693 9 is_stmt 1 view .LVU382 + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1238 .loc 1 693 9 view .LVU383 + 1239 048e 284B ldr r3, .L141 + 1240 0490 DA6A ldr r2, [r3, #44] + 1241 0492 0F21 movs r1, #15 + 1242 0494 8A43 bics r2, r1 + 1243 0496 216B ldr r1, [r4, #48] + 1244 0498 0A43 orrs r2, r1 + 1245 049a DA62 str r2, [r3, #44] + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1246 .loc 1 693 9 view .LVU384 + 1247 049c 5A68 ldr r2, [r3, #4] + 1248 049e 2849 ldr r1, .L141+16 + 1249 04a0 0A40 ands r2, r1 + 1250 04a2 E16A ldr r1, [r4, #44] + 1251 04a4 A06A ldr r0, [r4, #40] + 1252 04a6 0143 orrs r1, r0 + 1253 04a8 0A43 orrs r2, r1 + 1254 04aa 5A60 str r2, [r3, #4] + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1255 .loc 1 693 9 view .LVU385 + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1256 .loc 1 697 9 view .LVU386 + 1257 04ac 1968 ldr r1, [r3] + 1258 04ae 8022 movs r2, #128 + 1259 04b0 5204 lsls r2, r2, #17 + 1260 04b2 0A43 orrs r2, r1 + 1261 04b4 1A60 str r2, [r3] + ARM GAS /tmp/ccZlaZko.s page 39 + + + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1262 .loc 1 700 9 view .LVU387 + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1263 .loc 1 700 21 is_stmt 0 view .LVU388 + 1264 04b6 FFF7FEFF bl HAL_GetTick + 1265 .LVL81: + 1266 04ba 0400 movs r4, r0 + 1267 .LVL82: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1268 .loc 1 703 9 is_stmt 1 view .LVU389 + 1269 .L82: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1270 .loc 1 703 52 view .LVU390 + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1271 .loc 1 703 15 is_stmt 0 view .LVU391 + 1272 04bc 1C4B ldr r3, .L141 + 1273 04be 1B68 ldr r3, [r3] + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1274 .loc 1 703 52 view .LVU392 + 1275 04c0 9B01 lsls r3, r3, #6 + 1276 04c2 06D4 bmi .L138 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1277 .loc 1 705 11 is_stmt 1 view .LVU393 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1278 .loc 1 705 15 is_stmt 0 view .LVU394 + 1279 04c4 FFF7FEFF bl HAL_GetTick + 1280 .LVL83: + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1281 .loc 1 705 29 discriminator 1 view .LVU395 + 1282 04c8 001B subs r0, r0, r4 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1283 .loc 1 705 13 discriminator 1 view .LVU396 + 1284 04ca 0228 cmp r0, #2 + 1285 04cc F6D9 bls .L82 + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1286 .loc 1 707 20 view .LVU397 + 1287 04ce 0320 movs r0, #3 + 1288 04d0 1CE0 b .L20 + 1289 .L138: + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config = RCC->CFGR; + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + ARM GAS /tmp/ccZlaZko.s page 40 + + + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 1290 .loc 1 751 10 view .LVU398 + 1291 04d2 0020 movs r0, #0 + 1292 04d4 1AE0 b .L20 + 1293 .L136: + 1294 .loc 1 751 10 view .LVU399 + 1295 04d6 0020 movs r0, #0 + 1296 04d8 18E0 b .L20 + 1297 .LVL84: + 1298 .L78: + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1299 .loc 1 732 7 is_stmt 1 view .LVU400 + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1300 .loc 1 732 9 is_stmt 0 view .LVU401 + 1301 04da 012B cmp r3, #1 + 1302 04dc 20D0 beq .L108 + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 1303 .loc 1 739 9 is_stmt 1 view .LVU402 + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 1304 .loc 1 739 21 is_stmt 0 view .LVU403 + 1305 04de 144B ldr r3, .L141 + 1306 04e0 5A68 ldr r2, [r3, #4] + 1307 .LVL85: + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 1308 .loc 1 740 9 is_stmt 1 view .LVU404 + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 1309 .loc 1 740 21 is_stmt 0 view .LVU405 + 1310 04e2 D86A ldr r0, [r3, #44] + 1311 .LVL86: + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1312 .loc 1 741 9 is_stmt 1 view .LVU406 + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1313 .loc 1 741 13 is_stmt 0 view .LVU407 + 1314 04e4 C023 movs r3, #192 + 1315 04e6 5B02 lsls r3, r3, #9 + 1316 04e8 1340 ands r3, r2 + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1317 .loc 1 741 78 view .LVU408 + 1318 04ea A16A ldr r1, [r4, #40] + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1319 .loc 1 741 11 view .LVU409 + 1320 04ec 8B42 cmp r3, r1 + 1321 04ee 19D1 bne .L109 + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1322 .loc 1 742 13 view .LVU410 + 1323 04f0 0F23 movs r3, #15 + 1324 04f2 0340 ands r3, r0 + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1325 .loc 1 742 78 view .LVU411 + ARM GAS /tmp/ccZlaZko.s page 41 + + + 1326 04f4 216B ldr r1, [r4, #48] + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1327 .loc 1 741 90 discriminator 1 view .LVU412 + 1328 04f6 8B42 cmp r3, r1 + 1329 04f8 16D1 bne .L110 + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1330 .loc 1 743 13 view .LVU413 + 1331 04fa F023 movs r3, #240 + 1332 04fc 9B03 lsls r3, r3, #14 + 1333 04fe 1A40 ands r2, r3 + 1334 .LVL87: + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1335 .loc 1 743 78 view .LVU414 + 1336 0500 E36A ldr r3, [r4, #44] + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1337 .loc 1 742 90 view .LVU415 + 1338 0502 9A42 cmp r2, r3 + 1339 0504 12D1 bne .L111 + 1340 .loc 1 751 10 view .LVU416 + 1341 0506 0020 movs r0, #0 + 1342 .LVL88: + 1343 .loc 1 751 10 view .LVU417 + 1344 0508 00E0 b .L20 + 1345 .LVL89: + 1346 .L86: + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1347 .loc 1 307 12 view .LVU418 + 1348 050a 0120 movs r0, #1 + 1349 .LVL90: + 1350 .L20: + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1351 .loc 1 752 1 view .LVU419 + 1352 050c 02B0 add sp, sp, #8 + 1353 @ sp needed + 1354 050e 70BD pop {r4, r5, r6, pc} + 1355 .LVL91: + 1356 .L124: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1357 .loc 1 325 16 view .LVU420 + 1358 0510 0120 movs r0, #1 + 1359 .LVL92: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1360 .loc 1 325 16 view .LVU421 + 1361 0512 FBE7 b .L20 + 1362 .L90: + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1363 .loc 1 379 16 view .LVU422 + 1364 0514 0120 movs r0, #1 + 1365 0516 F9E7 b .L20 + 1366 .L101: + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1367 .loc 1 618 16 view .LVU423 + 1368 0518 0120 movs r0, #1 + 1369 051a F7E7 b .L20 + 1370 .L104: + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1371 .loc 1 751 10 view .LVU424 + ARM GAS /tmp/ccZlaZko.s page 42 + + + 1372 051c 0020 movs r0, #0 + 1373 051e F5E7 b .L20 + 1374 .L108: + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1375 .loc 1 734 16 view .LVU425 + 1376 0520 0120 movs r0, #1 + 1377 0522 F3E7 b .L20 + 1378 .LVL93: + 1379 .L109: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1380 .loc 1 745 18 view .LVU426 + 1381 0524 0120 movs r0, #1 + 1382 .LVL94: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1383 .loc 1 745 18 view .LVU427 + 1384 0526 F1E7 b .L20 + 1385 .LVL95: + 1386 .L110: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1387 .loc 1 745 18 view .LVU428 + 1388 0528 0120 movs r0, #1 + 1389 .LVL96: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1390 .loc 1 745 18 view .LVU429 + 1391 052a EFE7 b .L20 + 1392 .LVL97: + 1393 .L111: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1394 .loc 1 745 18 view .LVU430 + 1395 052c 0120 movs r0, #1 + 1396 .LVL98: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1397 .loc 1 745 18 view .LVU431 + 1398 052e EDE7 b .L20 + 1399 .L142: + 1400 .align 2 + 1401 .L141: + 1402 0530 00100240 .word 1073876992 + 1403 0534 FFFFFFEF .word -268435457 + 1404 0538 FFFFFFFE .word -16777217 + 1405 053c FFFFFEFF .word -65537 + 1406 0540 FF7FC2FF .word -4030465 + 1407 .cfi_endproc + 1408 .LFE41: + 1410 .section .text.HAL_RCC_MCOConfig,"ax",%progbits + 1411 .align 1 + 1412 .global HAL_RCC_MCOConfig + 1413 .syntax unified + 1414 .code 16 + 1415 .thumb_func + 1417 HAL_RCC_MCOConfig: + 1418 .LVL99: + 1419 .LFB43: + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. + ARM GAS /tmp/ccZlaZko.s page 43 + + + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param FLatency FLASH Latency + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked). + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * occur when the clock source will be ready. + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * currently used as system clock source. + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check Null pointer */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HCLK) of the device. */ + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the highest APB divider in order to ensure that we do not go through + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */ + ARM GAS /tmp/ccZlaZko.s page 44 + + + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new HCLK clock divider */ + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSE ready flag */ + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the PLL ready flag */ + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48) + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI48 is selected as System Clock Source */ + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48) + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI48 ready flag */ + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */ + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI ready flag */ + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + ARM GAS /tmp/ccZlaZko.s page 45 + + + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/ + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_InitTick (TICK_INT_PRIORITY); + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC clocks control functions + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### Peripheral Control functions ##### + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** frequencies. + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + ARM GAS /tmp/ccZlaZko.s page 46 + + + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE) + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI14 HSI14 selected as MCO clock + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @if STM32F042x6 + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F048xx + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F071xB + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F072xB + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F078xx + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F091xC + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F098xx + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F030x6 + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F030xC + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F031x6 + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F038xx + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F070x6 + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F070xB + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endif + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock + ARM GAS /tmp/ccZlaZko.s page 47 + + + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI14 HSI14 selected as MCO clock +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1420 .loc 1 1017 1 is_stmt 1 view -0 + 1421 .cfi_startproc + 1422 @ args = 0, pretend = 0, frame = 24 + 1423 @ frame_needed = 0, uses_anonymous_args = 0 + 1424 .loc 1 1017 1 is_stmt 0 view .LVU433 + 1425 0000 70B5 push {r4, r5, r6, lr} + 1426 .cfi_def_cfa_offset 16 + 1427 .cfi_offset 4, -16 + 1428 .cfi_offset 5, -12 + 1429 .cfi_offset 6, -8 + 1430 .cfi_offset 14, -4 + 1431 0002 86B0 sub sp, sp, #24 + 1432 .cfi_def_cfa_offset 40 + 1433 0004 0D00 movs r5, r1 + 1434 0006 1600 movs r6, r2 +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** GPIO_InitTypeDef gpio; + 1435 .loc 1 1018 3 is_stmt 1 view .LVU434 +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); + 1436 .loc 1 1021 3 view .LVU435 +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); + 1437 .loc 1 1022 3 view .LVU436 +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); + ARM GAS /tmp/ccZlaZko.s page 48 + + + 1438 .loc 1 1023 3 view .LVU437 +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Prevent unused argument(s) compilation warning */ +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** UNUSED(RCC_MCOx); + 1439 .loc 1 1026 3 view .LVU438 +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP; + 1440 .loc 1 1029 3 view .LVU439 + 1441 .loc 1 1029 18 is_stmt 0 view .LVU440 + 1442 0008 0223 movs r3, #2 + 1443 000a 0293 str r3, [sp, #8] +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; + 1444 .loc 1 1030 3 is_stmt 1 view .LVU441 + 1445 .loc 1 1030 18 is_stmt 0 view .LVU442 + 1446 000c 0133 adds r3, r3, #1 + 1447 000e 0493 str r3, [sp, #16] +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; + 1448 .loc 1 1031 3 is_stmt 1 view .LVU443 + 1449 .loc 1 1031 18 is_stmt 0 view .LVU444 + 1450 0010 0023 movs r3, #0 + 1451 0012 0393 str r3, [sp, #12] +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; + 1452 .loc 1 1032 3 is_stmt 1 view .LVU445 + 1453 .loc 1 1032 18 is_stmt 0 view .LVU446 + 1454 0014 8022 movs r2, #128 + 1455 .LVL100: + 1456 .loc 1 1032 18 view .LVU447 + 1457 0016 5200 lsls r2, r2, #1 + 1458 0018 0192 str r2, [sp, #4] +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; + 1459 .loc 1 1033 3 is_stmt 1 view .LVU448 + 1460 .loc 1 1033 18 is_stmt 0 view .LVU449 + 1461 001a 0593 str r3, [sp, #20] +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* MCO1 Clock Enable */ +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MCO1_CLK_ENABLE(); + 1462 .loc 1 1036 3 is_stmt 1 view .LVU450 + 1463 .LBB5: + 1464 .loc 1 1036 3 view .LVU451 + 1465 .loc 1 1036 3 view .LVU452 + 1466 001c 0B4C ldr r4, .L144 + 1467 001e 6369 ldr r3, [r4, #20] + 1468 0020 8022 movs r2, #128 + 1469 0022 9202 lsls r2, r2, #10 + 1470 0024 1343 orrs r3, r2 + 1471 0026 6361 str r3, [r4, #20] + 1472 .loc 1 1036 3 view .LVU453 + 1473 0028 6369 ldr r3, [r4, #20] + 1474 002a 1340 ands r3, r2 + 1475 002c 0093 str r3, [sp] + 1476 .loc 1 1036 3 view .LVU454 + 1477 002e 009B ldr r3, [sp] + 1478 .LBE5: + 1479 .loc 1 1036 3 view .LVU455 +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio); + ARM GAS /tmp/ccZlaZko.s page 49 + + + 1480 .loc 1 1038 3 view .LVU456 + 1481 0030 9020 movs r0, #144 + 1482 .LVL101: + 1483 .loc 1 1038 3 is_stmt 0 view .LVU457 + 1484 0032 01A9 add r1, sp, #4 + 1485 .LVL102: + 1486 .loc 1 1038 3 view .LVU458 + 1487 0034 C005 lsls r0, r0, #23 + 1488 0036 FFF7FEFF bl HAL_GPIO_Init + 1489 .LVL103: +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the MCO clock source */ +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv); + 1490 .loc 1 1041 3 is_stmt 1 view .LVU459 + 1491 003a 6268 ldr r2, [r4, #4] + 1492 003c 044B ldr r3, .L144+4 + 1493 003e 1A40 ands r2, r3 + 1494 0040 3543 orrs r5, r6 + 1495 .LVL104: + 1496 .loc 1 1041 3 is_stmt 0 view .LVU460 + 1497 0042 2A43 orrs r2, r5 + 1498 0044 6260 str r2, [r4, #4] +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1499 .loc 1 1042 1 view .LVU461 + 1500 0046 06B0 add sp, sp, #24 + 1501 @ sp needed + 1502 .LVL105: + 1503 .loc 1 1042 1 view .LVU462 + 1504 0048 70BD pop {r4, r5, r6, pc} + 1505 .L145: + 1506 004a C046 .align 2 + 1507 .L144: + 1508 004c 00100240 .word 1073876992 + 1509 0050 FFFFFF80 .word -2130706433 + 1510 .cfi_endproc + 1511 .LFE43: + 1513 .section .text.HAL_RCC_EnableCSS,"ax",%progbits + 1514 .align 1 + 1515 .global HAL_RCC_EnableCSS + 1516 .syntax unified + 1517 .code 16 + 1518 .thumb_func + 1520 HAL_RCC_EnableCSS: + 1521 .LFB44: +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Enables the Clock Security System. +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector. +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1522 .loc 1 1054 1 is_stmt 1 view -0 + ARM GAS /tmp/ccZlaZko.s page 50 + + + 1523 .cfi_startproc + 1524 @ args = 0, pretend = 0, frame = 0 + 1525 @ frame_needed = 0, uses_anonymous_args = 0 + 1526 @ link register save eliminated. +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_CSSON) ; + 1527 .loc 1 1055 3 view .LVU464 + 1528 0000 034A ldr r2, .L147 + 1529 0002 1168 ldr r1, [r2] + 1530 0004 8023 movs r3, #128 + 1531 0006 1B03 lsls r3, r3, #12 + 1532 0008 0B43 orrs r3, r1 + 1533 000a 1360 str r3, [r2] +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1534 .loc 1 1056 1 is_stmt 0 view .LVU465 + 1535 @ sp needed + 1536 000c 7047 bx lr + 1537 .L148: + 1538 000e C046 .align 2 + 1539 .L147: + 1540 0010 00100240 .word 1073876992 + 1541 .cfi_endproc + 1542 .LFE44: + 1544 .section .text.HAL_RCC_DisableCSS,"ax",%progbits + 1545 .align 1 + 1546 .global HAL_RCC_DisableCSS + 1547 .syntax unified + 1548 .code 16 + 1549 .thumb_func + 1551 HAL_RCC_DisableCSS: + 1552 .LFB45: +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Disables the Clock Security System. +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1553 .loc 1 1063 1 is_stmt 1 view -0 + 1554 .cfi_startproc + 1555 @ args = 0, pretend = 0, frame = 0 + 1556 @ frame_needed = 0, uses_anonymous_args = 0 + 1557 @ link register save eliminated. +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_CSSON) ; + 1558 .loc 1 1064 3 view .LVU467 + 1559 0000 024A ldr r2, .L150 + 1560 0002 1368 ldr r3, [r2] + 1561 0004 0249 ldr r1, .L150+4 + 1562 0006 0B40 ands r3, r1 + 1563 0008 1360 str r3, [r2] +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1564 .loc 1 1065 1 is_stmt 0 view .LVU468 + 1565 @ sp needed + 1566 000a 7047 bx lr + 1567 .L151: + 1568 .align 2 + 1569 .L150: + 1570 000c 00100240 .word 1073876992 + ARM GAS /tmp/ccZlaZko.s page 51 + + + 1571 0010 FFFFF7FF .word -524289 + 1572 .cfi_endproc + 1573 .LFE45: + 1575 .global __aeabi_uidiv + 1576 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits + 1577 .align 1 + 1578 .global HAL_RCC_GetSysClockFreq + 1579 .syntax unified + 1580 .code 16 + 1581 .thumb_func + 1583 HAL_RCC_GetSysClockFreq: + 1584 .LFB46: +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * constant and the selected clock source: +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * divided by PREDIV factor(**) +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * divided by PREDIV factor(**) or depending on STM32F0xxxx devices either a value based +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * on HSI_VALUE divided by 2 or HSI_VALUE divided by PREDIV factor(*) multiplied by the +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * PLL factor. +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * in voltage and temperature. +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * have wrong result. +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * value for HSE crystal. +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This function can be used by the user application to compute the +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters. +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval SYSCLK frequency +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1585 .loc 1 1099 1 is_stmt 1 view -0 + 1586 .cfi_startproc + 1587 @ args = 0, pretend = 0, frame = 0 + 1588 @ frame_needed = 0, uses_anonymous_args = 0 + 1589 0000 10B5 push {r4, lr} + 1590 .cfi_def_cfa_offset 8 + 1591 .cfi_offset 4, -8 + 1592 .cfi_offset 14, -4 +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, + 1593 .loc 1 1100 3 view .LVU470 +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; + ARM GAS /tmp/ccZlaZko.s page 52 + + +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, + 1594 .loc 1 1102 3 view .LVU471 +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; + 1595 .loc 1 1105 3 view .LVU472 + 1596 .LVL106: +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; + 1597 .loc 1 1106 3 view .LVU473 +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tmpreg = RCC->CFGR; + 1598 .loc 1 1108 3 view .LVU474 + 1599 .loc 1 1108 10 is_stmt 0 view .LVU475 + 1600 0002 184B ldr r3, .L160 + 1601 0004 5A68 ldr r2, [r3, #4] + 1602 .LVL107: +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS) + 1603 .loc 1 1111 3 is_stmt 1 view .LVU476 + 1604 .loc 1 1111 18 is_stmt 0 view .LVU477 + 1605 0006 0C23 movs r3, #12 + 1606 0008 1340 ands r3, r2 + 1607 .loc 1 1111 3 view .LVU478 + 1608 000a 082B cmp r3, #8 + 1609 000c 03D0 beq .L153 + 1610 000e 0C2B cmp r3, #12 + 1611 0010 25D1 bne .L157 +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV) +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48) +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */ +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI48_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */ +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ + ARM GAS /tmp/ccZlaZko.s page 53 + + +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = pllclk; +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48) +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */ +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSI48_VALUE; + 1612 .loc 1 1150 20 view .LVU479 + 1613 0012 1548 ldr r0, .L160+4 + 1614 .LVL108: + 1615 .L152: +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */ +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** default: /* HSI used as system clock */ +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return sysclockfreq; +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1616 .loc 1 1162 1 view .LVU480 + 1617 @ sp needed + 1618 0014 10BD pop {r4, pc} + 1619 .LVL109: + 1620 .L153: +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT + 1621 .loc 1 1120 7 is_stmt 1 view .LVU481 +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT + 1622 .loc 1 1120 72 is_stmt 0 view .LVU482 + 1623 0016 910C lsrs r1, r2, #18 + 1624 0018 0F23 movs r3, #15 + 1625 001a 1940 ands r1, r3 +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT + 1626 .loc 1 1120 34 view .LVU483 + 1627 001c 1348 ldr r0, .L160+8 + 1628 001e 445C ldrb r4, [r0, r1] + 1629 .LVL110: +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1630 .loc 1 1121 7 is_stmt 1 view .LVU484 +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1631 .loc 1 1121 49 is_stmt 0 view .LVU485 + 1632 0020 1049 ldr r1, .L160 + 1633 0022 C96A ldr r1, [r1, #44] +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1634 .loc 1 1121 77 view .LVU486 + 1635 0024 0B40 ands r3, r1 +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1636 .loc 1 1121 34 view .LVU487 + 1637 0026 1249 ldr r1, .L160+12 + 1638 0028 C95C ldrb r1, [r1, r3] + 1639 .LVL111: + ARM GAS /tmp/ccZlaZko.s page 54 + + +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1640 .loc 1 1122 7 is_stmt 1 view .LVU488 +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1641 .loc 1 1122 19 is_stmt 0 view .LVU489 + 1642 002a C023 movs r3, #192 + 1643 002c 5B02 lsls r3, r3, #9 + 1644 002e 1A40 ands r2, r3 + 1645 .LVL112: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1646 .loc 1 1122 10 view .LVU490 + 1647 0030 8023 movs r3, #128 + 1648 0032 5B02 lsls r3, r3, #9 + 1649 0034 9A42 cmp r2, r3 + 1650 0036 08D0 beq .L158 +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1651 .loc 1 1128 12 is_stmt 1 view .LVU491 +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1652 .loc 1 1128 15 is_stmt 0 view .LVU492 + 1653 0038 C023 movs r3, #192 + 1654 003a 5B02 lsls r3, r3, #9 + 1655 003c 9A42 cmp r2, r3 + 1656 003e 09D0 beq .L159 +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1657 .loc 1 1138 9 is_stmt 1 view .LVU493 +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1658 .loc 1 1138 18 is_stmt 0 view .LVU494 + 1659 0040 0C48 ldr r0, .L160+16 + 1660 0042 FFF7FEFF bl __aeabi_uidiv + 1661 .LVL113: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1662 .loc 1 1138 16 view .LVU495 + 1663 0046 6043 muls r0, r4 + 1664 .LVL114: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1665 .loc 1 1138 16 view .LVU496 + 1666 0048 E4E7 b .L152 + 1667 .LVL115: + 1668 .L158: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1669 .loc 1 1125 9 is_stmt 1 view .LVU497 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1670 .loc 1 1125 18 is_stmt 0 view .LVU498 + 1671 004a 0A48 ldr r0, .L160+16 + 1672 004c FFF7FEFF bl __aeabi_uidiv + 1673 .LVL116: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1674 .loc 1 1125 16 view .LVU499 + 1675 0050 6043 muls r0, r4 + 1676 .LVL117: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1677 .loc 1 1125 16 view .LVU500 + 1678 0052 DFE7 b .L152 + 1679 .LVL118: + 1680 .L159: +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1681 .loc 1 1131 9 is_stmt 1 view .LVU501 +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + ARM GAS /tmp/ccZlaZko.s page 55 + + + 1682 .loc 1 1131 18 is_stmt 0 view .LVU502 + 1683 0054 0448 ldr r0, .L160+4 + 1684 0056 FFF7FEFF bl __aeabi_uidiv + 1685 .LVL119: +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1686 .loc 1 1131 16 view .LVU503 + 1687 005a 6043 muls r0, r4 + 1688 .LVL120: +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1689 .loc 1 1131 16 view .LVU504 + 1690 005c DAE7 b .L152 + 1691 .LVL121: + 1692 .L157: +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1693 .loc 1 1111 3 view .LVU505 + 1694 005e 0548 ldr r0, .L160+16 + 1695 .LVL122: +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1696 .loc 1 1161 3 is_stmt 1 view .LVU506 +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1697 .loc 1 1161 10 is_stmt 0 view .LVU507 + 1698 0060 D8E7 b .L152 + 1699 .L161: + 1700 0062 C046 .align 2 + 1701 .L160: + 1702 0064 00100240 .word 1073876992 + 1703 0068 006CDC02 .word 48000000 + 1704 006c 00000000 .word aPLLMULFactorTable.1 + 1705 0070 00000000 .word aPredivFactorTable.0 + 1706 0074 00127A00 .word 8000000 + 1707 .cfi_endproc + 1708 .LFE46: + 1710 .section .text.HAL_RCC_ClockConfig,"ax",%progbits + 1711 .align 1 + 1712 .global HAL_RCC_ClockConfig + 1713 .syntax unified + 1714 .code 16 + 1715 .thumb_func + 1717 HAL_RCC_ClockConfig: + 1718 .LVL123: + 1719 .LFB42: + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 1720 .loc 1 778 1 is_stmt 1 view -0 + 1721 .cfi_startproc + 1722 @ args = 0, pretend = 0, frame = 0 + 1723 @ frame_needed = 0, uses_anonymous_args = 0 + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 1724 .loc 1 778 1 is_stmt 0 view .LVU509 + 1725 0000 70B5 push {r4, r5, r6, lr} + 1726 .cfi_def_cfa_offset 16 + 1727 .cfi_offset 4, -16 + 1728 .cfi_offset 5, -12 + 1729 .cfi_offset 6, -8 + 1730 .cfi_offset 14, -4 + 1731 0002 0400 movs r4, r0 + 1732 0004 0D00 movs r5, r1 + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccZlaZko.s page 56 + + + 1733 .loc 1 779 3 is_stmt 1 view .LVU510 + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1734 .loc 1 782 3 view .LVU511 + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1735 .loc 1 782 5 is_stmt 0 view .LVU512 + 1736 0006 0028 cmp r0, #0 + 1737 0008 00D1 bne .LCB1642 + 1738 000a 86E0 b .L176 @long jump + 1739 .LCB1642: + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + 1740 .loc 1 788 3 is_stmt 1 view .LVU513 + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1741 .loc 1 789 3 view .LVU514 + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1742 .loc 1 796 3 view .LVU515 + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1743 .loc 1 796 17 is_stmt 0 view .LVU516 + 1744 000c 474B ldr r3, .L195 + 1745 000e 1A68 ldr r2, [r3] + 1746 0010 0123 movs r3, #1 + 1747 0012 1340 ands r3, r2 + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1748 .loc 1 796 5 view .LVU517 + 1749 0014 8B42 cmp r3, r1 + 1750 0016 0AD2 bcs .L164 + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1751 .loc 1 799 5 is_stmt 1 view .LVU518 + 1752 0018 4449 ldr r1, .L195 + 1753 .LVL124: + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1754 .loc 1 799 5 is_stmt 0 view .LVU519 + 1755 001a 0B68 ldr r3, [r1] + 1756 001c 0122 movs r2, #1 + 1757 001e 9343 bics r3, r2 + 1758 0020 2B43 orrs r3, r5 + 1759 0022 0B60 str r3, [r1] + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1760 .loc 1 803 5 is_stmt 1 view .LVU520 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1761 .loc 1 803 8 is_stmt 0 view .LVU521 + 1762 0024 0B68 ldr r3, [r1] + 1763 0026 1A40 ands r2, r3 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1764 .loc 1 803 7 view .LVU522 + 1765 0028 AA42 cmp r2, r5 + 1766 002a 00D0 beq .LCB1664 + 1767 002c 77E0 b .L177 @long jump + 1768 .LCB1664: + 1769 .L164: + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1770 .loc 1 810 3 is_stmt 1 view .LVU523 + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1771 .loc 1 810 25 is_stmt 0 view .LVU524 + 1772 002e 2368 ldr r3, [r4] + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1773 .loc 1 810 5 view .LVU525 + 1774 0030 9A07 lsls r2, r3, #30 + ARM GAS /tmp/ccZlaZko.s page 57 + + + 1775 0032 0ED5 bpl .L165 + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1776 .loc 1 814 5 is_stmt 1 view .LVU526 + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1777 .loc 1 814 7 is_stmt 0 view .LVU527 + 1778 0034 5B07 lsls r3, r3, #29 + 1779 0036 05D5 bpl .L166 + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1780 .loc 1 816 7 is_stmt 1 view .LVU528 + 1781 0038 3D4A ldr r2, .L195+4 + 1782 003a 5168 ldr r1, [r2, #4] + 1783 003c E023 movs r3, #224 + 1784 003e DB00 lsls r3, r3, #3 + 1785 0040 0B43 orrs r3, r1 + 1786 0042 5360 str r3, [r2, #4] + 1787 .L166: + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 1788 .loc 1 820 5 view .LVU529 + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1789 .loc 1 821 5 view .LVU530 + 1790 0044 3A4A ldr r2, .L195+4 + 1791 0046 5368 ldr r3, [r2, #4] + 1792 0048 F021 movs r1, #240 + 1793 004a 8B43 bics r3, r1 + 1794 004c A168 ldr r1, [r4, #8] + 1795 004e 0B43 orrs r3, r1 + 1796 0050 5360 str r3, [r2, #4] + 1797 .L165: + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1798 .loc 1 825 3 view .LVU531 + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1799 .loc 1 825 25 is_stmt 0 view .LVU532 + 1800 0052 2368 ldr r3, [r4] + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1801 .loc 1 825 5 view .LVU533 + 1802 0054 DB07 lsls r3, r3, #31 + 1803 0056 35D5 bpl .L167 + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1804 .loc 1 827 5 is_stmt 1 view .LVU534 + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1805 .loc 1 830 5 view .LVU535 + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1806 .loc 1 830 25 is_stmt 0 view .LVU536 + 1807 0058 6368 ldr r3, [r4, #4] + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1808 .loc 1 830 7 view .LVU537 + 1809 005a 012B cmp r3, #1 + 1810 005c 09D0 beq .L191 + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1811 .loc 1 839 10 is_stmt 1 view .LVU538 + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1812 .loc 1 839 12 is_stmt 0 view .LVU539 + 1813 005e 022B cmp r3, #2 + 1814 0060 24D0 beq .L192 + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1815 .loc 1 849 10 is_stmt 1 view .LVU540 + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccZlaZko.s page 58 + + + 1816 .loc 1 849 12 is_stmt 0 view .LVU541 + 1817 0062 032B cmp r3, #3 + 1818 0064 28D0 beq .L193 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1819 .loc 1 862 7 is_stmt 1 view .LVU542 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1820 .loc 1 862 10 is_stmt 0 view .LVU543 + 1821 0066 324A ldr r2, .L195+4 + 1822 0068 1268 ldr r2, [r2] + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1823 .loc 1 862 9 view .LVU544 + 1824 006a 9207 lsls r2, r2, #30 + 1825 006c 05D4 bmi .L169 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1826 .loc 1 864 16 view .LVU545 + 1827 006e 0120 movs r0, #1 + 1828 .LVL125: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1829 .loc 1 864 16 view .LVU546 + 1830 0070 52E0 b .L163 + 1831 .LVL126: + 1832 .L191: + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1833 .loc 1 833 7 is_stmt 1 view .LVU547 + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1834 .loc 1 833 10 is_stmt 0 view .LVU548 + 1835 0072 2F4A ldr r2, .L195+4 + 1836 0074 1268 ldr r2, [r2] + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1837 .loc 1 833 9 view .LVU549 + 1838 0076 9203 lsls r2, r2, #14 + 1839 0078 53D5 bpl .L194 + 1840 .L169: + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1841 .loc 1 867 5 is_stmt 1 view .LVU550 + 1842 007a 2D49 ldr r1, .L195+4 + 1843 007c 4A68 ldr r2, [r1, #4] + 1844 007e 0320 movs r0, #3 + 1845 .LVL127: + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1846 .loc 1 867 5 is_stmt 0 view .LVU551 + 1847 0080 8243 bics r2, r0 + 1848 0082 1343 orrs r3, r2 + 1849 0084 4B60 str r3, [r1, #4] + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1850 .loc 1 870 5 is_stmt 1 view .LVU552 + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1851 .loc 1 870 17 is_stmt 0 view .LVU553 + 1852 0086 FFF7FEFF bl HAL_GetTick + 1853 .LVL128: + 1854 008a 0600 movs r6, r0 + 1855 .LVL129: + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1856 .loc 1 872 5 is_stmt 1 view .LVU554 + 1857 .L172: + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1858 .loc 1 872 42 view .LVU555 + ARM GAS /tmp/ccZlaZko.s page 59 + + + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1859 .loc 1 872 12 is_stmt 0 view .LVU556 + 1860 008c 284B ldr r3, .L195+4 + 1861 008e 5B68 ldr r3, [r3, #4] + 1862 0090 0C22 movs r2, #12 + 1863 0092 1A40 ands r2, r3 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1864 .loc 1 872 63 view .LVU557 + 1865 0094 6368 ldr r3, [r4, #4] + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1866 .loc 1 872 78 view .LVU558 + 1867 0096 9B00 lsls r3, r3, #2 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1868 .loc 1 872 42 view .LVU559 + 1869 0098 9A42 cmp r2, r3 + 1870 009a 13D0 beq .L167 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1871 .loc 1 874 7 is_stmt 1 view .LVU560 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1872 .loc 1 874 11 is_stmt 0 view .LVU561 + 1873 009c FFF7FEFF bl HAL_GetTick + 1874 .LVL130: + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1875 .loc 1 874 25 discriminator 1 view .LVU562 + 1876 00a0 801B subs r0, r0, r6 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1877 .loc 1 874 9 discriminator 1 view .LVU563 + 1878 00a2 244B ldr r3, .L195+8 + 1879 00a4 9842 cmp r0, r3 + 1880 00a6 F1D9 bls .L172 + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1881 .loc 1 876 16 view .LVU564 + 1882 00a8 0320 movs r0, #3 + 1883 00aa 35E0 b .L163 + 1884 .LVL131: + 1885 .L192: + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1886 .loc 1 842 7 is_stmt 1 view .LVU565 + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1887 .loc 1 842 10 is_stmt 0 view .LVU566 + 1888 00ac 204A ldr r2, .L195+4 + 1889 00ae 1268 ldr r2, [r2] + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1890 .loc 1 842 9 view .LVU567 + 1891 00b0 9201 lsls r2, r2, #6 + 1892 00b2 E2D4 bmi .L169 + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1893 .loc 1 844 16 view .LVU568 + 1894 00b4 0120 movs r0, #1 + 1895 .LVL132: + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1896 .loc 1 844 16 view .LVU569 + 1897 00b6 2FE0 b .L163 + 1898 .LVL133: + 1899 .L193: + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1900 .loc 1 852 7 is_stmt 1 view .LVU570 + ARM GAS /tmp/ccZlaZko.s page 60 + + + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1901 .loc 1 852 10 is_stmt 0 view .LVU571 + 1902 00b8 1D4A ldr r2, .L195+4 + 1903 00ba 526B ldr r2, [r2, #52] + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1904 .loc 1 852 9 view .LVU572 + 1905 00bc 9203 lsls r2, r2, #14 + 1906 00be DCD4 bmi .L169 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1907 .loc 1 854 16 view .LVU573 + 1908 00c0 0120 movs r0, #1 + 1909 .LVL134: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1910 .loc 1 854 16 view .LVU574 + 1911 00c2 29E0 b .L163 + 1912 .L167: + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1913 .loc 1 882 3 is_stmt 1 view .LVU575 + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1914 .loc 1 882 17 is_stmt 0 view .LVU576 + 1915 00c4 194B ldr r3, .L195 + 1916 00c6 1A68 ldr r2, [r3] + 1917 00c8 0123 movs r3, #1 + 1918 00ca 1340 ands r3, r2 + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1919 .loc 1 882 5 view .LVU577 + 1920 00cc AB42 cmp r3, r5 + 1921 00ce 09D9 bls .L174 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1922 .loc 1 885 5 is_stmt 1 view .LVU578 + 1923 00d0 1649 ldr r1, .L195 + 1924 00d2 0B68 ldr r3, [r1] + 1925 00d4 0122 movs r2, #1 + 1926 00d6 9343 bics r3, r2 + 1927 00d8 2B43 orrs r3, r5 + 1928 00da 0B60 str r3, [r1] + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1929 .loc 1 889 5 view .LVU579 + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1930 .loc 1 889 8 is_stmt 0 view .LVU580 + 1931 00dc 0B68 ldr r3, [r1] + 1932 00de 1A40 ands r2, r3 + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1933 .loc 1 889 7 view .LVU581 + 1934 00e0 AA42 cmp r2, r5 + 1935 00e2 20D1 bne .L183 + 1936 .L174: + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1937 .loc 1 896 3 is_stmt 1 view .LVU582 + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1938 .loc 1 896 25 is_stmt 0 view .LVU583 + 1939 00e4 2368 ldr r3, [r4] + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1940 .loc 1 896 5 view .LVU584 + 1941 00e6 5B07 lsls r3, r3, #29 + 1942 00e8 06D5 bpl .L175 + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); + ARM GAS /tmp/ccZlaZko.s page 61 + + + 1943 .loc 1 898 5 is_stmt 1 view .LVU585 + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1944 .loc 1 899 5 view .LVU586 + 1945 00ea 114A ldr r2, .L195+4 + 1946 00ec 5368 ldr r3, [r2, #4] + 1947 00ee 1249 ldr r1, .L195+12 + 1948 00f0 0B40 ands r3, r1 + 1949 00f2 E168 ldr r1, [r4, #12] + 1950 00f4 0B43 orrs r3, r1 + 1951 00f6 5360 str r3, [r2, #4] + 1952 .L175: + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1953 .loc 1 903 3 view .LVU587 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1954 .loc 1 903 21 is_stmt 0 view .LVU588 + 1955 00f8 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1956 .LVL135: + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1957 .loc 1 903 68 discriminator 1 view .LVU589 + 1958 00fc 0C4B ldr r3, .L195+4 + 1959 00fe 5A68 ldr r2, [r3, #4] + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1960 .loc 1 903 91 discriminator 1 view .LVU590 + 1961 0100 1209 lsrs r2, r2, #4 + 1962 0102 0F23 movs r3, #15 + 1963 0104 1340 ands r3, r2 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1964 .loc 1 903 63 discriminator 1 view .LVU591 + 1965 0106 0D4A ldr r2, .L195+16 + 1966 0108 D35C ldrb r3, [r2, r3] + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1967 .loc 1 903 47 discriminator 1 view .LVU592 + 1968 010a D840 lsrs r0, r0, r3 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1969 .loc 1 903 19 discriminator 1 view .LVU593 + 1970 010c 0C4B ldr r3, .L195+20 + 1971 010e 1860 str r0, [r3] + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1972 .loc 1 906 3 is_stmt 1 view .LVU594 + 1973 0110 0320 movs r0, #3 + 1974 0112 FFF7FEFF bl HAL_InitTick + 1975 .LVL136: + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1976 .loc 1 908 3 view .LVU595 + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1977 .loc 1 908 10 is_stmt 0 view .LVU596 + 1978 0116 0020 movs r0, #0 + 1979 .L163: + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1980 .loc 1 909 1 view .LVU597 + 1981 @ sp needed + 1982 .LVL137: + 1983 .LVL138: + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1984 .loc 1 909 1 view .LVU598 + 1985 0118 70BD pop {r4, r5, r6, pc} + 1986 .LVL139: + ARM GAS /tmp/ccZlaZko.s page 62 + + + 1987 .L176: + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1988 .loc 1 784 12 view .LVU599 + 1989 011a 0120 movs r0, #1 + 1990 .LVL140: + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1991 .loc 1 784 12 view .LVU600 + 1992 011c FCE7 b .L163 + 1993 .LVL141: + 1994 .L177: + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1995 .loc 1 805 14 view .LVU601 + 1996 011e 0120 movs r0, #1 + 1997 .LVL142: + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1998 .loc 1 805 14 view .LVU602 + 1999 0120 FAE7 b .L163 + 2000 .LVL143: + 2001 .L194: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2002 .loc 1 835 16 view .LVU603 + 2003 0122 0120 movs r0, #1 + 2004 .LVL144: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2005 .loc 1 835 16 view .LVU604 + 2006 0124 F8E7 b .L163 + 2007 .L183: + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2008 .loc 1 891 14 view .LVU605 + 2009 0126 0120 movs r0, #1 + 2010 0128 F6E7 b .L163 + 2011 .L196: + 2012 012a C046 .align 2 + 2013 .L195: + 2014 012c 00200240 .word 1073881088 + 2015 0130 00100240 .word 1073876992 + 2016 0134 88130000 .word 5000 + 2017 0138 FFF8FFFF .word -1793 + 2018 013c 00000000 .word AHBPrescTable + 2019 0140 00000000 .word SystemCoreClock + 2020 .cfi_endproc + 2021 .LFE42: + 2023 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits + 2024 .align 1 + 2025 .global HAL_RCC_GetHCLKFreq + 2026 .syntax unified + 2027 .code 16 + 2028 .thumb_func + 2030 HAL_RCC_GetHCLKFreq: + 2031 .LFB47: +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the HCLK frequency +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency + ARM GAS /tmp/ccZlaZko.s page 63 + + +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * and updated within this function +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HCLK frequency +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2032 .loc 1 1174 1 is_stmt 1 view -0 + 2033 .cfi_startproc + 2034 @ args = 0, pretend = 0, frame = 0 + 2035 @ frame_needed = 0, uses_anonymous_args = 0 + 2036 @ link register save eliminated. +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return SystemCoreClock; + 2037 .loc 1 1175 3 view .LVU607 + 2038 .loc 1 1175 10 is_stmt 0 view .LVU608 + 2039 0000 014B ldr r3, .L198 + 2040 .loc 1 1175 10 discriminator 1 view .LVU609 + 2041 0002 1868 ldr r0, [r3] +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2042 .loc 1 1176 1 view .LVU610 + 2043 @ sp needed + 2044 0004 7047 bx lr + 2045 .L199: + 2046 0006 C046 .align 2 + 2047 .L198: + 2048 0008 00000000 .word SystemCoreClock + 2049 .cfi_endproc + 2050 .LFE47: + 2052 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits + 2053 .align 1 + 2054 .global HAL_RCC_GetPCLK1Freq + 2055 .syntax unified + 2056 .code 16 + 2057 .thumb_func + 2059 HAL_RCC_GetPCLK1Freq: + 2060 .LFB48: +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval PCLK1 frequency +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2061 .loc 1 1185 1 is_stmt 1 view -0 + 2062 .cfi_startproc + 2063 @ args = 0, pretend = 0, frame = 0 + 2064 @ frame_needed = 0, uses_anonymous_args = 0 + 2065 0000 10B5 push {r4, lr} + 2066 .cfi_def_cfa_offset 8 + 2067 .cfi_offset 4, -8 + 2068 .cfi_offset 14, -4 +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNU + 2069 .loc 1 1187 3 view .LVU612 + 2070 .loc 1 1187 11 is_stmt 0 view .LVU613 + 2071 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq + 2072 .LVL145: + ARM GAS /tmp/ccZlaZko.s page 64 + + + 2073 .loc 1 1187 54 discriminator 1 view .LVU614 + 2074 0006 044B ldr r3, .L201 + 2075 0008 5A68 ldr r2, [r3, #4] + 2076 .loc 1 1187 78 discriminator 1 view .LVU615 + 2077 000a 120A lsrs r2, r2, #8 + 2078 000c 0723 movs r3, #7 + 2079 000e 1340 ands r3, r2 + 2080 .loc 1 1187 49 discriminator 1 view .LVU616 + 2081 0010 024A ldr r2, .L201+4 + 2082 0012 D35C ldrb r3, [r2, r3] + 2083 .loc 1 1187 33 discriminator 1 view .LVU617 + 2084 0014 D840 lsrs r0, r0, r3 +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2085 .loc 1 1188 1 view .LVU618 + 2086 @ sp needed + 2087 0016 10BD pop {r4, pc} + 2088 .L202: + 2089 .align 2 + 2090 .L201: + 2091 0018 00100240 .word 1073876992 + 2092 001c 00000000 .word APBPrescTable + 2093 .cfi_endproc + 2094 .LFE48: + 2096 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits + 2097 .align 1 + 2098 .global HAL_RCC_GetOscConfig + 2099 .syntax unified + 2100 .code 16 + 2101 .thumb_func + 2103 HAL_RCC_GetOscConfig: + 2104 .LVL146: + 2105 .LFB49: +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC configuration registers. +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * will be configured. +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2106 .loc 1 1198 1 is_stmt 1 view -0 + 2107 .cfi_startproc + 2108 @ args = 0, pretend = 0, frame = 0 + 2109 @ frame_needed = 0, uses_anonymous_args = 0 + 2110 @ link register save eliminated. +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL); + 2111 .loc 1 1200 3 view .LVU620 +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \ + 2112 .loc 1 1203 3 view .LVU621 + 2113 .loc 1 1203 37 is_stmt 0 view .LVU622 + 2114 0000 1F23 movs r3, #31 + 2115 0002 0360 str r3, [r0] + ARM GAS /tmp/ccZlaZko.s page 65 + + +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI14; +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType |= RCC_OSCILLATORTYPE_HSI48; + 2116 .loc 1 1206 3 is_stmt 1 view .LVU623 + 2117 .loc 1 1206 37 is_stmt 0 view .LVU624 + 2118 0004 2033 adds r3, r3, #32 + 2119 0006 0360 str r3, [r0] +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) + 2120 .loc 1 1211 3 is_stmt 1 view .LVU625 + 2121 .loc 1 1211 10 is_stmt 0 view .LVU626 + 2122 0008 324B ldr r3, .L218 + 2123 000a 1B68 ldr r3, [r3] + 2124 .loc 1 1211 5 view .LVU627 + 2125 000c 5B03 lsls r3, r3, #13 + 2126 000e 40D5 bpl .L204 +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; + 2127 .loc 1 1213 5 is_stmt 1 view .LVU628 + 2128 .loc 1 1213 33 is_stmt 0 view .LVU629 + 2129 0010 0523 movs r3, #5 + 2130 0012 4360 str r3, [r0, #4] + 2131 .L205: +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) + 2132 .loc 1 1225 3 is_stmt 1 view .LVU630 + 2133 .loc 1 1225 10 is_stmt 0 view .LVU631 + 2134 0014 2F4B ldr r3, .L218 + 2135 0016 1B68 ldr r3, [r3] + 2136 .loc 1 1225 5 view .LVU632 + 2137 0018 DB07 lsls r3, r3, #31 + 2138 001a 44D5 bpl .L207 +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; + 2139 .loc 1 1227 5 is_stmt 1 view .LVU633 + 2140 .loc 1 1227 33 is_stmt 0 view .LVU634 + 2141 001c 0123 movs r3, #1 + 2142 001e C360 str r3, [r0, #12] + 2143 .L208: +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + ARM GAS /tmp/ccZlaZko.s page 66 + + +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_B + 2144 .loc 1 1234 3 is_stmt 1 view .LVU635 + 2145 .loc 1 1234 59 is_stmt 0 view .LVU636 + 2146 0020 2C49 ldr r1, .L218 + 2147 0022 0A68 ldr r2, [r1] + 2148 .loc 1 1234 44 view .LVU637 + 2149 0024 D208 lsrs r2, r2, #3 + 2150 0026 1F23 movs r3, #31 + 2151 0028 1340 ands r3, r2 + 2152 .loc 1 1234 42 view .LVU638 + 2153 002a 0361 str r3, [r0, #16] +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) + 2154 .loc 1 1237 3 is_stmt 1 view .LVU639 + 2155 .loc 1 1237 10 is_stmt 0 view .LVU640 + 2156 002c 0B6A ldr r3, [r1, #32] + 2157 .loc 1 1237 5 view .LVU641 + 2158 002e 5B07 lsls r3, r3, #29 + 2159 0030 3CD5 bpl .L209 +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; + 2160 .loc 1 1239 5 is_stmt 1 view .LVU642 + 2161 .loc 1 1239 33 is_stmt 0 view .LVU643 + 2162 0032 0523 movs r3, #5 + 2163 0034 8360 str r3, [r0, #8] + 2164 .L210: +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) + 2165 .loc 1 1251 3 is_stmt 1 view .LVU644 + 2166 .loc 1 1251 10 is_stmt 0 view .LVU645 + 2167 0036 274B ldr r3, .L218 + 2168 0038 5B6A ldr r3, [r3, #36] + 2169 .loc 1 1251 5 view .LVU646 + 2170 003a DB07 lsls r3, r3, #31 + 2171 003c 40D5 bpl .L212 +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; + 2172 .loc 1 1253 5 is_stmt 1 view .LVU647 + 2173 .loc 1 1253 33 is_stmt 0 view .LVU648 + 2174 003e 0123 movs r3, #1 + 2175 0040 C361 str r3, [r0, #28] + 2176 .L213: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccZlaZko.s page 67 + + +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI14 configuration -----------------------------------------------*/ +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR2 & RCC_CR2_HSI14ON) == RCC_CR2_HSI14ON) + 2177 .loc 1 1261 3 is_stmt 1 view .LVU649 + 2178 .loc 1 1261 10 is_stmt 0 view .LVU650 + 2179 0042 244B ldr r3, .L218 + 2180 0044 5B6B ldr r3, [r3, #52] + 2181 .loc 1 1261 5 view .LVU651 + 2182 0046 DB07 lsls r3, r3, #31 + 2183 0048 3DD5 bpl .L214 +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14State = RCC_HSI_ON; + 2184 .loc 1 1263 5 is_stmt 1 view .LVU652 + 2185 .loc 1 1263 35 is_stmt 0 view .LVU653 + 2186 004a 0123 movs r3, #1 + 2187 004c 4361 str r3, [r0, #20] + 2188 .L215: +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14State = RCC_HSI_OFF; +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14CalibrationValue = (uint32_t)((RCC->CR2 & RCC_CR2_HSI14TRIM) >> RCC_HSI14 + 2189 .loc 1 1270 3 is_stmt 1 view .LVU654 + 2190 .loc 1 1270 61 is_stmt 0 view .LVU655 + 2191 004e 214A ldr r2, .L218 + 2192 0050 516B ldr r1, [r2, #52] + 2193 .loc 1 1270 46 view .LVU656 + 2194 0052 C908 lsrs r1, r1, #3 + 2195 0054 1F23 movs r3, #31 + 2196 0056 0B40 ands r3, r1 + 2197 .loc 1 1270 44 view .LVU657 + 2198 0058 8361 str r3, [r0, #24] +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI48 configuration if any-----------------------------------------*/ +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI48State = __HAL_RCC_GET_HSI48_STATE(); + 2199 .loc 1 1274 3 is_stmt 1 view .LVU658 + 2200 .loc 1 1274 35 is_stmt 0 view .LVU659 + 2201 005a 536B ldr r3, [r2, #52] + 2202 005c 8021 movs r1, #128 + 2203 005e 4902 lsls r1, r1, #9 + 2204 0060 0B40 ands r3, r1 + 2205 0062 591E subs r1, r3, #1 + 2206 0064 8B41 sbcs r3, r3, r1 + 2207 .loc 1 1274 33 view .LVU660 + 2208 0066 0362 str r3, [r0, #32] +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) + 2209 .loc 1 1278 3 is_stmt 1 view .LVU661 + 2210 .loc 1 1278 10 is_stmt 0 view .LVU662 + 2211 0068 1368 ldr r3, [r2] + ARM GAS /tmp/ccZlaZko.s page 68 + + + 2212 .loc 1 1278 5 view .LVU663 + 2213 006a DB01 lsls r3, r3, #7 + 2214 006c 2ED5 bpl .L216 +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; + 2215 .loc 1 1280 5 is_stmt 1 view .LVU664 + 2216 .loc 1 1280 37 is_stmt 0 view .LVU665 + 2217 006e 0223 movs r3, #2 + 2218 0070 4362 str r3, [r0, #36] + 2219 .L217: +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC); + 2220 .loc 1 1286 3 is_stmt 1 view .LVU666 + 2221 .loc 1 1286 52 is_stmt 0 view .LVU667 + 2222 0072 184B ldr r3, .L218 + 2223 0074 5A68 ldr r2, [r3, #4] + 2224 .loc 1 1286 38 view .LVU668 + 2225 0076 C021 movs r1, #192 + 2226 0078 4902 lsls r1, r1, #9 + 2227 007a 0A40 ands r2, r1 + 2228 .loc 1 1286 36 view .LVU669 + 2229 007c 8262 str r2, [r0, #40] +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); + 2230 .loc 1 1287 3 is_stmt 1 view .LVU670 + 2231 .loc 1 1287 49 is_stmt 0 view .LVU671 + 2232 007e 5A68 ldr r2, [r3, #4] + 2233 .loc 1 1287 35 view .LVU672 + 2234 0080 F021 movs r1, #240 + 2235 0082 8903 lsls r1, r1, #14 + 2236 0084 0A40 ands r2, r1 + 2237 .loc 1 1287 33 view .LVU673 + 2238 0086 C262 str r2, [r0, #44] +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV); + 2239 .loc 1 1288 3 is_stmt 1 view .LVU674 + 2240 .loc 1 1288 49 is_stmt 0 view .LVU675 + 2241 0088 DA6A ldr r2, [r3, #44] + 2242 .loc 1 1288 35 view .LVU676 + 2243 008a 0F23 movs r3, #15 + 2244 008c 1340 ands r3, r2 + 2245 .loc 1 1288 33 view .LVU677 + 2246 008e 0363 str r3, [r0, #48] +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2247 .loc 1 1289 1 view .LVU678 + 2248 @ sp needed + 2249 0090 7047 bx lr + 2250 .L204: +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2251 .loc 1 1215 8 is_stmt 1 view .LVU679 +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2252 .loc 1 1215 15 is_stmt 0 view .LVU680 + 2253 0092 104B ldr r3, .L218 + 2254 0094 1B68 ldr r3, [r3] +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccZlaZko.s page 69 + + + 2255 .loc 1 1215 10 view .LVU681 + 2256 0096 DB03 lsls r3, r3, #15 + 2257 0098 02D5 bpl .L206 +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2258 .loc 1 1217 5 is_stmt 1 view .LVU682 +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2259 .loc 1 1217 33 is_stmt 0 view .LVU683 + 2260 009a 0123 movs r3, #1 + 2261 009c 4360 str r3, [r0, #4] + 2262 009e B9E7 b .L205 + 2263 .L206: +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2264 .loc 1 1221 5 is_stmt 1 view .LVU684 +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2265 .loc 1 1221 33 is_stmt 0 view .LVU685 + 2266 00a0 0023 movs r3, #0 + 2267 00a2 4360 str r3, [r0, #4] + 2268 00a4 B6E7 b .L205 + 2269 .L207: +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2270 .loc 1 1231 5 is_stmt 1 view .LVU686 +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2271 .loc 1 1231 33 is_stmt 0 view .LVU687 + 2272 00a6 0023 movs r3, #0 + 2273 00a8 C360 str r3, [r0, #12] + 2274 00aa B9E7 b .L208 + 2275 .L209: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2276 .loc 1 1241 8 is_stmt 1 view .LVU688 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2277 .loc 1 1241 15 is_stmt 0 view .LVU689 + 2278 00ac 094B ldr r3, .L218 + 2279 00ae 1B6A ldr r3, [r3, #32] +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2280 .loc 1 1241 10 view .LVU690 + 2281 00b0 DB07 lsls r3, r3, #31 + 2282 00b2 02D5 bpl .L211 +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2283 .loc 1 1243 5 is_stmt 1 view .LVU691 +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2284 .loc 1 1243 33 is_stmt 0 view .LVU692 + 2285 00b4 0123 movs r3, #1 + 2286 00b6 8360 str r3, [r0, #8] + 2287 00b8 BDE7 b .L210 + 2288 .L211: +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2289 .loc 1 1247 5 is_stmt 1 view .LVU693 +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2290 .loc 1 1247 33 is_stmt 0 view .LVU694 + 2291 00ba 0023 movs r3, #0 + 2292 00bc 8360 str r3, [r0, #8] + 2293 00be BAE7 b .L210 + 2294 .L212: +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2295 .loc 1 1257 5 is_stmt 1 view .LVU695 +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2296 .loc 1 1257 33 is_stmt 0 view .LVU696 + ARM GAS /tmp/ccZlaZko.s page 70 + + + 2297 00c0 0023 movs r3, #0 + 2298 00c2 C361 str r3, [r0, #28] + 2299 00c4 BDE7 b .L213 + 2300 .L214: +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2301 .loc 1 1267 5 is_stmt 1 view .LVU697 +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2302 .loc 1 1267 35 is_stmt 0 view .LVU698 + 2303 00c6 0023 movs r3, #0 + 2304 00c8 4361 str r3, [r0, #20] + 2305 00ca C0E7 b .L215 + 2306 .L216: +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2307 .loc 1 1284 5 is_stmt 1 view .LVU699 +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2308 .loc 1 1284 37 is_stmt 0 view .LVU700 + 2309 00cc 0123 movs r3, #1 + 2310 00ce 4362 str r3, [r0, #36] + 2311 00d0 CFE7 b .L217 + 2312 .L219: + 2313 00d2 C046 .align 2 + 2314 .L218: + 2315 00d4 00100240 .word 1073876992 + 2316 .cfi_endproc + 2317 .LFE49: + 2319 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits + 2320 .align 1 + 2321 .global HAL_RCC_GetClockConfig + 2322 .syntax unified + 2323 .code 16 + 2324 .thumb_func + 2326 HAL_RCC_GetClockConfig: + 2327 .LVL147: + 2328 .LFB50: +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC configuration registers. +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the current clock configuration. +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2329 .loc 1 1300 1 is_stmt 1 view -0 + 2330 .cfi_startproc + 2331 @ args = 0, pretend = 0, frame = 0 + 2332 @ frame_needed = 0, uses_anonymous_args = 0 + 2333 .loc 1 1300 1 is_stmt 0 view .LVU702 + 2334 0000 10B5 push {r4, lr} + 2335 .cfi_def_cfa_offset 8 + 2336 .cfi_offset 4, -8 + 2337 .cfi_offset 14, -4 +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL); + 2338 .loc 1 1302 3 is_stmt 1 view .LVU703 + ARM GAS /tmp/ccZlaZko.s page 71 + + +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(pFLatency != NULL); + 2339 .loc 1 1303 3 view .LVU704 +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1; + 2340 .loc 1 1306 3 view .LVU705 + 2341 .loc 1 1306 32 is_stmt 0 view .LVU706 + 2342 0002 0723 movs r3, #7 + 2343 0004 0360 str r3, [r0] +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); + 2344 .loc 1 1309 3 is_stmt 1 view .LVU707 + 2345 .loc 1 1309 51 is_stmt 0 view .LVU708 + 2346 0006 0A4B ldr r3, .L221 + 2347 0008 5C68 ldr r4, [r3, #4] + 2348 .loc 1 1309 37 view .LVU709 + 2349 000a 0322 movs r2, #3 + 2350 000c 2240 ands r2, r4 + 2351 .loc 1 1309 35 view .LVU710 + 2352 000e 4260 str r2, [r0, #4] +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); + 2353 .loc 1 1312 3 is_stmt 1 view .LVU711 + 2354 .loc 1 1312 52 is_stmt 0 view .LVU712 + 2355 0010 5C68 ldr r4, [r3, #4] + 2356 .loc 1 1312 38 view .LVU713 + 2357 0012 F022 movs r2, #240 + 2358 0014 2240 ands r2, r4 + 2359 .loc 1 1312 36 view .LVU714 + 2360 0016 8260 str r2, [r0, #8] +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); + 2361 .loc 1 1315 3 is_stmt 1 view .LVU715 + 2362 .loc 1 1315 53 is_stmt 0 view .LVU716 + 2363 0018 5B68 ldr r3, [r3, #4] + 2364 .loc 1 1315 39 view .LVU717 + 2365 001a E022 movs r2, #224 + 2366 001c D200 lsls r2, r2, #3 + 2367 001e 1340 ands r3, r2 + 2368 .loc 1 1315 37 view .LVU718 + 2369 0020 C360 str r3, [r0, #12] +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *pFLatency = __HAL_FLASH_GET_LATENCY(); + 2370 .loc 1 1317 3 is_stmt 1 view .LVU719 + 2371 .loc 1 1317 16 is_stmt 0 view .LVU720 + 2372 0022 044B ldr r3, .L221+4 + 2373 0024 1A68 ldr r2, [r3] + 2374 0026 0123 movs r3, #1 + 2375 0028 1340 ands r3, r2 + 2376 .loc 1 1317 14 view .LVU721 + 2377 002a 0B60 str r3, [r1] +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2378 .loc 1 1318 1 view .LVU722 + 2379 @ sp needed + ARM GAS /tmp/ccZlaZko.s page 72 + + + 2380 002c 10BD pop {r4, pc} + 2381 .L222: + 2382 002e C046 .align 2 + 2383 .L221: + 2384 0030 00100240 .word 1073876992 + 2385 0034 00200240 .word 1073881088 + 2386 .cfi_endproc + 2387 .LFE50: + 2389 .section .text.HAL_RCC_CSSCallback,"ax",%progbits + 2390 .align 1 + 2391 .weak HAL_RCC_CSSCallback + 2392 .syntax unified + 2393 .code 16 + 2394 .thumb_func + 2396 HAL_RCC_CSSCallback: + 2397 .LFB52: +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check RCC CSSF flag */ +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_RCC_CSSCallback(); +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval none +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2398 .loc 1 1343 1 is_stmt 1 view -0 + 2399 .cfi_startproc + 2400 @ args = 0, pretend = 0, frame = 0 + 2401 @ frame_needed = 0, uses_anonymous_args = 0 + 2402 @ link register save eliminated. +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2403 .loc 1 1347 1 view .LVU724 + 2404 @ sp needed + 2405 0000 7047 bx lr + 2406 .cfi_endproc + 2407 .LFE52: + 2409 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits + 2410 .align 1 + ARM GAS /tmp/ccZlaZko.s page 73 + + + 2411 .global HAL_RCC_NMI_IRQHandler + 2412 .syntax unified + 2413 .code 16 + 2414 .thumb_func + 2416 HAL_RCC_NMI_IRQHandler: + 2417 .LFB51: +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check RCC CSSF flag */ + 2418 .loc 1 1326 1 view -0 + 2419 .cfi_startproc + 2420 @ args = 0, pretend = 0, frame = 0 + 2421 @ frame_needed = 0, uses_anonymous_args = 0 + 2422 0000 10B5 push {r4, lr} + 2423 .cfi_def_cfa_offset 8 + 2424 .cfi_offset 4, -8 + 2425 .cfi_offset 14, -4 +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2426 .loc 1 1328 3 view .LVU726 +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2427 .loc 1 1328 6 is_stmt 0 view .LVU727 + 2428 0002 054B ldr r3, .L228 + 2429 0004 9B68 ldr r3, [r3, #8] +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2430 .loc 1 1328 5 view .LVU728 + 2431 0006 1B06 lsls r3, r3, #24 + 2432 0008 00D4 bmi .L227 + 2433 .L224: +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2434 .loc 1 1336 1 view .LVU729 + 2435 @ sp needed + 2436 000a 10BD pop {r4, pc} + 2437 .L227: +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2438 .loc 1 1331 5 is_stmt 1 view .LVU730 + 2439 000c FFF7FEFF bl HAL_RCC_CSSCallback + 2440 .LVL148: +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2441 .loc 1 1334 5 view .LVU731 + 2442 0010 024B ldr r3, .L228+4 + 2443 0012 8022 movs r2, #128 + 2444 0014 1A70 strb r2, [r3] +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2445 .loc 1 1336 1 is_stmt 0 view .LVU732 + 2446 0016 F8E7 b .L224 + 2447 .L229: + 2448 .align 2 + 2449 .L228: + 2450 0018 00100240 .word 1073876992 + 2451 001c 0A100240 .word 1073877002 + 2452 .cfi_endproc + 2453 .LFE51: + 2455 .section .rodata.aPredivFactorTable.0,"a" + 2456 .align 2 + 2459 aPredivFactorTable.0: + 2460 0000 01020304 .ascii "\001\002\003\004\005\006\007\010\011\012\013\014\015" + 2460 05060708 + 2460 090A0B0C + 2460 0D + ARM GAS /tmp/ccZlaZko.s page 74 + + + 2461 000d 0E0F10 .ascii "\016\017\020" + 2462 .section .rodata.aPLLMULFactorTable.1,"a" + 2463 .align 2 + 2466 aPLLMULFactorTable.1: + 2467 0000 02030405 .ascii "\002\003\004\005\006\007\010\011\012\013\014\015\016" + 2467 06070809 + 2467 0A0B0C0D + 2467 0E + 2468 000d 0F1010 .ascii "\017\020\020" + 2469 .text + 2470 .Letext0: + 2471 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 2472 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 2473 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 2474 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 2475 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 2476 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 2477 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + 2478 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 2479 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccZlaZko.s page 75 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_rcc.c + /tmp/ccZlaZko.s:19 .text.HAL_RCC_DeInit:00000000 $t + /tmp/ccZlaZko.s:25 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit + /tmp/ccZlaZko.s:192 .text.HAL_RCC_DeInit:000000ac $d + /tmp/ccZlaZko.s:204 .text.HAL_RCC_OscConfig:00000000 $t + /tmp/ccZlaZko.s:210 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig + /tmp/ccZlaZko.s:866 .text.HAL_RCC_OscConfig:000002e0 $d + /tmp/ccZlaZko.s:874 .text.HAL_RCC_OscConfig:000002f4 $t + /tmp/ccZlaZko.s:1402 .text.HAL_RCC_OscConfig:00000530 $d + /tmp/ccZlaZko.s:1411 .text.HAL_RCC_MCOConfig:00000000 $t + /tmp/ccZlaZko.s:1417 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig + /tmp/ccZlaZko.s:1508 .text.HAL_RCC_MCOConfig:0000004c $d + /tmp/ccZlaZko.s:1514 .text.HAL_RCC_EnableCSS:00000000 $t + /tmp/ccZlaZko.s:1520 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS + /tmp/ccZlaZko.s:1540 .text.HAL_RCC_EnableCSS:00000010 $d + /tmp/ccZlaZko.s:1545 .text.HAL_RCC_DisableCSS:00000000 $t + /tmp/ccZlaZko.s:1551 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS + /tmp/ccZlaZko.s:1570 .text.HAL_RCC_DisableCSS:0000000c $d + /tmp/ccZlaZko.s:1577 .text.HAL_RCC_GetSysClockFreq:00000000 $t + /tmp/ccZlaZko.s:1583 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq + /tmp/ccZlaZko.s:1702 .text.HAL_RCC_GetSysClockFreq:00000064 $d + /tmp/ccZlaZko.s:2466 .rodata.aPLLMULFactorTable.1:00000000 aPLLMULFactorTable.1 + /tmp/ccZlaZko.s:2459 .rodata.aPredivFactorTable.0:00000000 aPredivFactorTable.0 + /tmp/ccZlaZko.s:1711 .text.HAL_RCC_ClockConfig:00000000 $t + /tmp/ccZlaZko.s:1717 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig + /tmp/ccZlaZko.s:2014 .text.HAL_RCC_ClockConfig:0000012c $d + /tmp/ccZlaZko.s:2024 .text.HAL_RCC_GetHCLKFreq:00000000 $t + /tmp/ccZlaZko.s:2030 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq + /tmp/ccZlaZko.s:2048 .text.HAL_RCC_GetHCLKFreq:00000008 $d + /tmp/ccZlaZko.s:2053 .text.HAL_RCC_GetPCLK1Freq:00000000 $t + /tmp/ccZlaZko.s:2059 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq + /tmp/ccZlaZko.s:2091 .text.HAL_RCC_GetPCLK1Freq:00000018 $d + /tmp/ccZlaZko.s:2097 .text.HAL_RCC_GetOscConfig:00000000 $t + /tmp/ccZlaZko.s:2103 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig + /tmp/ccZlaZko.s:2315 .text.HAL_RCC_GetOscConfig:000000d4 $d + /tmp/ccZlaZko.s:2320 .text.HAL_RCC_GetClockConfig:00000000 $t + /tmp/ccZlaZko.s:2326 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig + /tmp/ccZlaZko.s:2384 .text.HAL_RCC_GetClockConfig:00000030 $d + /tmp/ccZlaZko.s:2390 .text.HAL_RCC_CSSCallback:00000000 $t + /tmp/ccZlaZko.s:2396 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback + /tmp/ccZlaZko.s:2410 .text.HAL_RCC_NMI_IRQHandler:00000000 $t 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b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d @@ -0,0 +1,60 @@ +build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.lst b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.lst new file mode 100644 index 0000000..b10f191 --- /dev/null +++ b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.lst @@ -0,0 +1,2750 @@ +ARM GAS /tmp/ccnKkcg2.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_rcc_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c" + 18 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits + 19 .align 1 + 20 .global HAL_RCCEx_PeriphCLKConfig + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_RCCEx_PeriphCLKConfig: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @file stm32f0xx_hal_rcc_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + Extended Clock Recovery System Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * All rights reserved. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the root directory of this software component. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/ + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #include "stm32f0xx_hal.h" + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccnKkcg2.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver. + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CRS) + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Constants RCCEx Private Constants + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Bit position in register */ + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_CFGR_FELIM_BITNUMBER 16 + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_CR_TRIM_BITNUMBER 8 + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_ISR_FECAP_BITNUMBER 16 + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* CRS */ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @verbatim + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions ##### + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequencies. + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the backup registers) are set to their reset values. + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endverbatim + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + ARM GAS /tmp/ccnKkcg2.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef. + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * (USART, RTC, I2C, CEC and USB). + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Care must be taken when @ref HAL_RCCEx_PeriphCLKConfig() is used to select + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the RTC clock source; in this case the Backup domain will be reset in + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * order to modify the RTC Clock source, as consequence RTC registers (including + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the backup registers) and RCC_BDCR register are set to their reset values. + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval HAL status + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 28 .loc 1 103 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 8 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 103 1 is_stmt 0 view .LVU1 + 33 0000 70B5 push {r4, r5, r6, lr} + 34 .cfi_def_cfa_offset 16 + 35 .cfi_offset 4, -16 + 36 .cfi_offset 5, -12 + 37 .cfi_offset 6, -8 + 38 .cfi_offset 14, -4 + 39 0002 82B0 sub sp, sp, #8 + 40 .cfi_def_cfa_offset 24 + 41 0004 0400 movs r4, r0 + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 42 .loc 1 104 3 is_stmt 1 view .LVU2 + 43 .LVL1: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U; + 44 .loc 1 105 3 view .LVU3 + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); + 45 .loc 1 108 3 view .LVU4 + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*---------------------------- RTC configuration -------------------------------*/ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) + 46 .loc 1 111 3 view .LVU5 + 47 .loc 1 111 21 is_stmt 0 view .LVU6 + 48 0006 0368 ldr r3, [r0] + 49 .loc 1 111 5 view .LVU7 + 50 0008 DB03 lsls r3, r3, #15 + 51 000a 39D5 bpl .L2 + 52 .LBB2: + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); + 53 .loc 1 114 5 is_stmt 1 view .LVU8 + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET; + 54 .loc 1 116 5 view .LVU9 + 55 .LVL2: + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccnKkcg2.s page 4 + + + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** power domain is done. */ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 56 .loc 1 121 5 view .LVU10 + 57 .loc 1 121 8 is_stmt 0 view .LVU11 + 58 000c 484B ldr r3, .L27 + 59 000e DB69 ldr r3, [r3, #28] + 60 .loc 1 121 7 view .LVU12 + 61 0010 DB00 lsls r3, r3, #3 + 62 0012 5FD4 bmi .L14 + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 63 .loc 1 123 5 is_stmt 1 view .LVU13 + 64 .LBB3: + 65 .loc 1 123 5 view .LVU14 + 66 .loc 1 123 5 view .LVU15 + 67 0014 464B ldr r3, .L27 + 68 0016 DA69 ldr r2, [r3, #28] + 69 0018 8021 movs r1, #128 + 70 001a 4905 lsls r1, r1, #21 + 71 001c 0A43 orrs r2, r1 + 72 001e DA61 str r2, [r3, #28] + 73 .loc 1 123 5 view .LVU16 + 74 0020 DB69 ldr r3, [r3, #28] + 75 0022 0B40 ands r3, r1 + 76 0024 0193 str r3, [sp, #4] + 77 .loc 1 123 5 view .LVU17 + 78 0026 019B ldr r3, [sp, #4] + 79 .LBE3: + 80 .loc 1 123 5 view .LVU18 + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 81 .loc 1 124 7 view .LVU19 + 82 .LVL3: + 83 .loc 1 124 21 is_stmt 0 view .LVU20 + 84 0028 0125 movs r5, #1 + 85 .LVL4: + 86 .L3: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 87 .loc 1 127 5 is_stmt 1 view .LVU21 + 88 .loc 1 127 8 is_stmt 0 view .LVU22 + 89 002a 424B ldr r3, .L27+4 + 90 002c 1B68 ldr r3, [r3] + 91 .loc 1 127 7 view .LVU23 + 92 002e DB05 lsls r3, r3, #23 + 93 0030 52D5 bpl .L24 + 94 .LVL5: + 95 .L4: + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */ + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccnKkcg2.s page 5 + + + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); + 96 .loc 1 145 5 is_stmt 1 view .LVU24 + 97 .loc 1 145 20 is_stmt 0 view .LVU25 + 98 0032 3F4B ldr r3, .L27 + 99 0034 1A6A ldr r2, [r3, #32] + 100 .loc 1 145 14 view .LVU26 + 101 0036 C023 movs r3, #192 + 102 0038 9B00 lsls r3, r3, #2 + 103 003a 1100 movs r1, r2 + 104 003c 1940 ands r1, r3 + 105 .LVL6: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 106 .loc 1 146 5 is_stmt 1 view .LVU27 + 107 .loc 1 146 7 is_stmt 0 view .LVU28 + 108 003e 1A42 tst r2, r3 + 109 0040 15D0 beq .L8 + 110 .loc 1 146 64 discriminator 1 view .LVU29 + 111 0042 6368 ldr r3, [r4, #4] + 112 .loc 1 146 84 discriminator 1 view .LVU30 + 113 0044 C022 movs r2, #192 + 114 0046 9200 lsls r2, r2, #2 + 115 0048 1340 ands r3, r2 + 116 .loc 1 146 34 discriminator 1 view .LVU31 + 117 004a 8B42 cmp r3, r1 + 118 004c 0FD0 beq .L8 + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); + 119 .loc 1 149 7 is_stmt 1 view .LVU32 + 120 .loc 1 149 22 is_stmt 0 view .LVU33 + 121 004e 384B ldr r3, .L27 + 122 0050 1A6A ldr r2, [r3, #32] + 123 .loc 1 149 16 view .LVU34 + 124 0052 3949 ldr r1, .L27+8 + 125 .LVL7: + 126 .loc 1 149 16 view .LVU35 + 127 0054 1140 ands r1, r2 + 128 .LVL8: + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE(); + 129 .loc 1 151 7 is_stmt 1 view .LVU36 + 130 0056 1E6A ldr r6, [r3, #32] + 131 0058 8020 movs r0, #128 + 132 005a 4002 lsls r0, r0, #9 + 133 005c 3043 orrs r0, r6 + 134 005e 1862 str r0, [r3, #32] + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + ARM GAS /tmp/ccnKkcg2.s page 6 + + + 135 .loc 1 152 7 view .LVU37 + 136 0060 186A ldr r0, [r3, #32] + 137 0062 364E ldr r6, .L27+12 + 138 0064 3040 ands r0, r6 + 139 0066 1862 str r0, [r3, #32] + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** RCC->BDCR = temp_reg; + 140 .loc 1 154 7 view .LVU38 + 141 .loc 1 154 17 is_stmt 0 view .LVU39 + 142 0068 1962 str r1, [r3, #32] + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) + 143 .loc 1 157 7 is_stmt 1 view .LVU40 + 144 .loc 1 157 10 is_stmt 0 view .LVU41 + 145 006a D207 lsls r2, r2, #31 + 146 006c 48D4 bmi .L25 + 147 .LVL9: + 148 .L8: + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Start Tick */ + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait till LSE is ready */ + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); + 149 .loc 1 172 5 is_stmt 1 view .LVU42 + 150 006e 304A ldr r2, .L27 + 151 0070 136A ldr r3, [r2, #32] + 152 0072 3149 ldr r1, .L27+8 + 153 0074 0B40 ands r3, r1 + 154 0076 6168 ldr r1, [r4, #4] + 155 0078 0B43 orrs r3, r1 + 156 007a 1362 str r3, [r2, #32] + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(pwrclkchanged == SET) + 157 .loc 1 175 5 view .LVU43 + 158 .loc 1 175 7 is_stmt 0 view .LVU44 + 159 007c 012D cmp r5, #1 + 160 007e 4ED0 beq .L26 + 161 .LVL10: + 162 .L2: + 163 .loc 1 175 7 view .LVU45 + 164 .LBE2: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccnKkcg2.s page 7 + + + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------- USART1 Configuration ------------------------*/ + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) + 165 .loc 1 182 3 is_stmt 1 view .LVU46 + 166 .loc 1 182 21 is_stmt 0 view .LVU47 + 167 0080 2368 ldr r3, [r4] + 168 .loc 1 182 5 view .LVU48 + 169 0082 DB07 lsls r3, r3, #31 + 170 0084 06D5 bpl .L11 + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); + 171 .loc 1 185 5 is_stmt 1 view .LVU49 + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); + 172 .loc 1 188 5 view .LVU50 + 173 0086 2A4A ldr r2, .L27 + 174 0088 136B ldr r3, [r2, #48] + 175 008a 0321 movs r1, #3 + 176 008c 8B43 bics r3, r1 + 177 008e A168 ldr r1, [r4, #8] + 178 0090 0B43 orrs r3, r1 + 179 0092 1363 str r3, [r2, #48] + 180 .L11: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*----------------------------- USART2 Configuration --------------------------*/ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */ + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F091xC) || defined(STM32F098xx) + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*----------------------------- USART3 Configuration --------------------------*/ + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART3 clock source */ + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F091xC || STM32F098xx */ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ I2C1 Configuration ------------------------*/ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) + 181 .loc 1 218 3 view .LVU51 + 182 .loc 1 218 21 is_stmt 0 view .LVU52 + ARM GAS /tmp/ccnKkcg2.s page 8 + + + 183 0094 2368 ldr r3, [r4] + 184 .loc 1 218 5 view .LVU53 + 185 0096 9B06 lsls r3, r3, #26 + 186 0098 06D5 bpl .L12 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); + 187 .loc 1 221 5 is_stmt 1 view .LVU54 + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); + 188 .loc 1 224 5 view .LVU55 + 189 009a 254A ldr r2, .L27 + 190 009c 136B ldr r3, [r2, #48] + 191 009e 1021 movs r1, #16 + 192 00a0 8B43 bics r3, r1 + 193 00a2 E168 ldr r1, [r4, #12] + 194 00a4 0B43 orrs r3, r1 + 195 00a6 1363 str r3, [r2, #48] + 196 .L12: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ USB Configuration ------------------------*/ + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) + 197 .loc 1 229 3 view .LVU56 + 198 .loc 1 229 21 is_stmt 0 view .LVU57 + 199 00a8 2368 ldr r3, [r4] + 200 .loc 1 229 5 view .LVU58 + 201 00aa 9B03 lsls r3, r3, #14 + 202 00ac 06D5 bpl .L13 + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); + 203 .loc 1 232 5 is_stmt 1 view .LVU59 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USB clock source */ + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); + 204 .loc 1 235 5 view .LVU60 + 205 00ae 204A ldr r2, .L27 + 206 00b0 136B ldr r3, [r2, #48] + 207 00b2 8021 movs r1, #128 + 208 00b4 8B43 bics r3, r1 + 209 00b6 6169 ldr r1, [r4, #20] + 210 00b8 0B43 orrs r3, r1 + 211 00ba 1363 str r3, [r2, #48] + 212 .L13: + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx)\ + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F051x8) || defined(STM32F058xx)\ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ CEC clock Configuration -------------------*/ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) + 213 .loc 1 244 3 view .LVU61 + ARM GAS /tmp/ccnKkcg2.s page 9 + + + 214 .loc 1 244 21 is_stmt 0 view .LVU62 + 215 00bc 2368 ldr r3, [r4] + 216 .loc 1 244 5 view .LVU63 + 217 00be 5B05 lsls r3, r3, #21 + 218 00c0 32D5 bpl .L17 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); + 219 .loc 1 247 5 is_stmt 1 view .LVU64 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); + 220 .loc 1 250 5 view .LVU65 + 221 00c2 1B4A ldr r2, .L27 + 222 00c4 136B ldr r3, [r2, #48] + 223 00c6 4021 movs r1, #64 + 224 00c8 8B43 bics r3, r1 + 225 00ca 2169 ldr r1, [r4, #16] + 226 00cc 0B43 orrs r3, r1 + 227 00ce 1363 str r3, [r2, #48] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || */ + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F051x8 || STM32F058xx || */ + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_OK; + 228 .loc 1 257 10 is_stmt 0 view .LVU66 + 229 00d0 0020 movs r0, #0 + 230 00d2 2AE0 b .L6 + 231 .LVL11: + 232 .L14: + 233 .LBB4: + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 234 .loc 1 116 22 view .LVU67 + 235 00d4 0025 movs r5, #0 + 236 00d6 A8E7 b .L3 + 237 .LVL12: + 238 .L24: + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 239 .loc 1 130 7 is_stmt 1 view .LVU68 + 240 00d8 164A ldr r2, .L27+4 + 241 00da 1168 ldr r1, [r2] + 242 00dc 8023 movs r3, #128 + 243 00de 5B00 lsls r3, r3, #1 + 244 00e0 0B43 orrs r3, r1 + 245 00e2 1360 str r3, [r2] + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 246 .loc 1 133 7 view .LVU69 + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 247 .loc 1 133 19 is_stmt 0 view .LVU70 + 248 00e4 FFF7FEFF bl HAL_GetTick + 249 .LVL13: + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 250 .loc 1 133 19 view .LVU71 + 251 00e8 0600 movs r6, r0 + 252 .LVL14: + ARM GAS /tmp/ccnKkcg2.s page 10 + + + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 253 .loc 1 135 7 is_stmt 1 view .LVU72 + 254 .L5: + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 255 .loc 1 135 13 view .LVU73 + 256 00ea 124B ldr r3, .L27+4 + 257 00ec 1B68 ldr r3, [r3] + 258 00ee DB05 lsls r3, r3, #23 + 259 00f0 9FD4 bmi .L4 + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 260 .loc 1 137 9 view .LVU74 + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 261 .loc 1 137 13 is_stmt 0 view .LVU75 + 262 00f2 FFF7FEFF bl HAL_GetTick + 263 .LVL15: + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 264 .loc 1 137 27 discriminator 1 view .LVU76 + 265 00f6 801B subs r0, r0, r6 + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 266 .loc 1 137 11 discriminator 1 view .LVU77 + 267 00f8 6428 cmp r0, #100 + 268 00fa F6D9 bls .L5 + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 269 .loc 1 139 18 view .LVU78 + 270 00fc 0320 movs r0, #3 + 271 00fe 14E0 b .L6 + 272 .LVL16: + 273 .L25: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 274 .loc 1 160 9 is_stmt 1 view .LVU79 + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 275 .loc 1 160 21 is_stmt 0 view .LVU80 + 276 0100 FFF7FEFF bl HAL_GetTick + 277 .LVL17: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 278 .loc 1 160 21 view .LVU81 + 279 0104 0600 movs r6, r0 + 280 .LVL18: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 281 .loc 1 163 9 is_stmt 1 view .LVU82 + 282 .L9: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 283 .loc 1 163 51 view .LVU83 + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 284 .loc 1 163 15 is_stmt 0 view .LVU84 + 285 0106 0A4B ldr r3, .L27 + 286 0108 1B6A ldr r3, [r3, #32] + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 287 .loc 1 163 51 view .LVU85 + 288 010a 9B07 lsls r3, r3, #30 + 289 010c AFD4 bmi .L8 + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 290 .loc 1 165 11 is_stmt 1 view .LVU86 + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 291 .loc 1 165 15 is_stmt 0 view .LVU87 + 292 010e FFF7FEFF bl HAL_GetTick + 293 .LVL19: + ARM GAS /tmp/ccnKkcg2.s page 11 + + + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 294 .loc 1 165 29 discriminator 1 view .LVU88 + 295 0112 801B subs r0, r0, r6 + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 296 .loc 1 165 13 discriminator 1 view .LVU89 + 297 0114 0A4B ldr r3, .L27+16 + 298 0116 9842 cmp r0, r3 + 299 0118 F5D9 bls .L9 + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 300 .loc 1 167 20 view .LVU90 + 301 011a 0320 movs r0, #3 + 302 011c 05E0 b .L6 + 303 .LVL20: + 304 .L26: + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 305 .loc 1 177 7 is_stmt 1 view .LVU91 + 306 011e D369 ldr r3, [r2, #28] + 307 0120 0849 ldr r1, .L27+20 + 308 0122 0B40 ands r3, r1 + 309 0124 D361 str r3, [r2, #28] + 310 0126 ABE7 b .L2 + 311 .LVL21: + 312 .L17: + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 313 .loc 1 177 7 is_stmt 0 view .LVU92 + 314 .LBE4: + 315 .loc 1 257 10 view .LVU93 + 316 0128 0020 movs r0, #0 + 317 .L6: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 318 .loc 1 258 1 view .LVU94 + 319 012a 02B0 add sp, sp, #8 + 320 @ sp needed + 321 .LVL22: + 322 .loc 1 258 1 view .LVU95 + 323 012c 70BD pop {r4, r5, r6, pc} + 324 .L28: + 325 012e C046 .align 2 + 326 .L27: + 327 0130 00100240 .word 1073876992 + 328 0134 00700040 .word 1073770496 + 329 0138 FFFCFFFF .word -769 + 330 013c FFFFFEFF .word -65537 + 331 0140 88130000 .word 5000 + 332 0144 FFFFFFEF .word -268435457 + 333 .cfi_endproc + 334 .LFE40: + 336 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits + 337 .align 1 + 338 .global HAL_RCCEx_GetPeriphCLKConfig + 339 .syntax unified + 340 .code 16 + 341 .thumb_func + 343 HAL_RCCEx_GetPeriphCLKConfig: + 344 .LVL23: + 345 .LFB41: + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccnKkcg2.s page 12 + + + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Get the RCC_ClkInitStruct according to the internal + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * RCC configuration registers. + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * (USART, RTC, I2C, CEC and USB). + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 346 .loc 1 269 1 is_stmt 1 view -0 + 347 .cfi_startproc + 348 @ args = 0, pretend = 0, frame = 0 + 349 @ frame_needed = 0, uses_anonymous_args = 0 + 350 @ link register save eliminated. + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Common part first */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK + 351 .loc 1 272 3 view .LVU97 + 352 .loc 1 272 39 is_stmt 0 view .LVU98 + 353 0000 0E4B ldr r3, .L30 + 354 0002 0360 str r3, [r0] + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the RTC configuration --------------------------------------------*/ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE(); + 355 .loc 1 274 3 is_stmt 1 view .LVU99 + 356 .loc 1 274 38 is_stmt 0 view .LVU100 + 357 0004 0E4B ldr r3, .L30+4 + 358 0006 1A6A ldr r2, [r3, #32] + 359 0008 C021 movs r1, #192 + 360 000a 8900 lsls r1, r1, #2 + 361 000c 0A40 ands r2, r1 + 362 .loc 1 274 36 view .LVU101 + 363 000e 4260 str r2, [r0, #4] + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE(); + 364 .loc 1 276 3 is_stmt 1 view .LVU102 + 365 .loc 1 276 41 is_stmt 0 view .LVU103 + 366 0010 196B ldr r1, [r3, #48] + 367 0012 0322 movs r2, #3 + 368 0014 0A40 ands r2, r1 + 369 .loc 1 276 39 view .LVU104 + 370 0016 8260 str r2, [r0, #8] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the I2C1 clock source -----------------------------------------------*/ + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); + 371 .loc 1 278 3 is_stmt 1 view .LVU105 + 372 .loc 1 278 39 is_stmt 0 view .LVU106 + 373 0018 196B ldr r1, [r3, #48] + 374 001a 1022 movs r2, #16 + 375 001c 0A40 ands r2, r1 + 376 .loc 1 278 37 view .LVU107 + 377 001e C260 str r2, [r0, #12] + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART2; + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART2 clock source ---------------------------------------------*/ + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE(); + ARM GAS /tmp/ccnKkcg2.s page 13 + + + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F091xC) || defined(STM32F098xx) + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART3; + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART3 clock source ---------------------------------------------*/ + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F091xC || STM32F098xx */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB; + 378 .loc 1 295 3 is_stmt 1 view .LVU108 + 379 .loc 1 295 39 is_stmt 0 view .LVU109 + 380 0020 084A ldr r2, .L30+8 + 381 0022 0260 str r2, [r0] + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USB clock source ---------------------------------------------*/ + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE(); + 382 .loc 1 297 3 is_stmt 1 view .LVU110 + 383 .loc 1 297 38 is_stmt 0 view .LVU111 + 384 0024 196B ldr r1, [r3, #48] + 385 0026 8022 movs r2, #128 + 386 0028 0A40 ands r2, r1 + 387 .loc 1 297 36 view .LVU112 + 388 002a 4261 str r2, [r0, #20] + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx)\ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F051x8) || defined(STM32F058xx)\ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_CEC; + 389 .loc 1 304 3 is_stmt 1 view .LVU113 + 390 .loc 1 304 39 is_stmt 0 view .LVU114 + 391 002c 064A ldr r2, .L30+12 + 392 002e 0260 str r2, [r0] + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the CEC clock source ------------------------------------------------*/ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE(); + 393 .loc 1 306 3 is_stmt 1 view .LVU115 + 394 .loc 1 306 38 is_stmt 0 view .LVU116 + 395 0030 1A6B ldr r2, [r3, #48] + 396 0032 4023 movs r3, #64 + 397 0034 1340 ands r3, r2 + 398 .loc 1 306 36 view .LVU117 + 399 0036 0361 str r3, [r0, #16] + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || */ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F051x8 || STM32F058xx || */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 400 .loc 1 312 1 view .LVU118 + 401 @ sp needed + 402 0038 7047 bx lr + 403 .L31: + 404 003a C046 .align 2 + 405 .L30: + 406 003c 21000100 .word 65569 + ARM GAS /tmp/ccnKkcg2.s page 14 + + + 407 0040 00100240 .word 1073876992 + 408 0044 21000300 .word 196641 + 409 0048 21040300 .word 197665 + 410 .cfi_endproc + 411 .LFE41: + 413 .global __aeabi_uidiv + 414 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits + 415 .align 1 + 416 .global HAL_RCCEx_GetPeriphCLKFreq + 417 .syntax unified + 418 .code 16 + 419 .thumb_func + 421 HAL_RCCEx_GetPeriphCLKFreq: + 422 .LVL24: + 423 .LFB42: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Returns the peripheral clock frequency + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Returns 0 if peripheral clock is unknown + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be one of the following values: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F042x6 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F048xx + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F051x8 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F058xx + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F070x6 + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F070xB + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F071xB + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F072xB + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F078xx + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + ARM GAS /tmp/ccnKkcg2.s page 15 + + + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F091xC + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART2 peripheral clock + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F098xx + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART2 peripheral clock + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral) + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 424 .loc 1 369 1 is_stmt 1 view -0 + 425 .cfi_startproc + 426 @ args = 0, pretend = 0, frame = 0 + 427 @ frame_needed = 0, uses_anonymous_args = 0 + 428 .loc 1 369 1 is_stmt 0 view .LVU120 + 429 0000 10B5 push {r4, lr} + 430 .cfi_def_cfa_offset 8 + 431 .cfi_offset 4, -8 + 432 .cfi_offset 14, -4 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t frequency = 0U; + 433 .loc 1 371 3 is_stmt 1 view .LVU121 + 434 .LVL25: + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t srcclk = 0U; + 435 .loc 1 373 3 view .LVU122 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(USB) + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t pllmull = 0U, pllsource = 0U, predivfactor = 0U; + 436 .loc 1 375 3 view .LVU123 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* USB */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); + 437 .loc 1 379 3 view .LVU124 + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** switch (PeriphClk) + 438 .loc 1 381 3 view .LVU125 + 439 0002 8023 movs r3, #128 + 440 0004 DB00 lsls r3, r3, #3 + 441 0006 9842 cmp r0, r3 + 442 0008 00D1 bne .LCB398 + 443 000a ACE0 b .L33 @long jump + 444 .LCB398: + 445 000c 30D9 bls .L59 + 446 000e 8023 movs r3, #128 + 447 0010 5B02 lsls r3, r3, #9 + 448 0012 9842 cmp r0, r3 + 449 0014 41D0 beq .L38 + 450 0016 8023 movs r3, #128 + 451 0018 9B02 lsls r3, r3, #10 + 452 001a 9842 cmp r0, r3 + 453 001c 3BD1 bne .L60 + ARM GAS /tmp/ccnKkcg2.s page 16 + + + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC: + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current RTC source */ + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE(); + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if RTC clock selection is LSE */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSI is ready and if RTC clock selection is LSI */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSI_VALUE; + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/ + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 32U; + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1: + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART1 source */ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE(); + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is PCLK1 */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK1) + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART1 clock selection is HSI */ + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is SYSCLK */ + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK) + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART1 clock selection is LSE */ + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2: + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART2 source */ + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE(); + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is PCLK1 */ + ARM GAS /tmp/ccnKkcg2.s page 17 + + + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART2CLKSOURCE_PCLK1) + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART2 clock selection is HSI */ + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is SYSCLK */ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK) + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART2 clock selection is LSE */ + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART3: + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART3 source */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART3_SOURCE(); + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is PCLK1 */ + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART3CLKSOURCE_PCLK1) + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART3 clock selection is HSI */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is SYSCLK */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK) + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART3 clock selection is LSE */ + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current I2C1 source */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE(); + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C1 clock selection is HSI */ + ARM GAS /tmp/ccnKkcg2.s page 18 + + + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is SYSCLK */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK) + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(USB) + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB: + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USB source */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE(); + 454 .loc 1 511 7 view .LVU126 + 455 .loc 1 511 16 is_stmt 0 view .LVU127 + 456 001e 5D4B ldr r3, .L71 + 457 0020 1B6B ldr r3, [r3, #48] + 458 .LVL26: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if PLL is ready and if USB clock selection is PLL */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_USBCLKSOURCE_PLL) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) + 459 .loc 1 514 7 is_stmt 1 view .LVU128 + 460 .loc 1 514 10 is_stmt 0 view .LVU129 + 461 0022 1B06 lsls r3, r3, #24 + 462 0024 00D4 bmi .LCB417 + 463 0026 94E0 b .L46 @long jump + 464 .LCB417: + 465 .LVL27: + 466 .loc 1 514 48 discriminator 1 view .LVU130 + 467 0028 5A4B ldr r3, .L71 + 468 002a 1A68 ldr r2, [r3] + 469 002c 8023 movs r3, #128 + 470 002e 9B04 lsls r3, r3, #18 + 471 0030 1000 movs r0, r2 + 472 .LVL28: + 473 .loc 1 514 48 discriminator 1 view .LVU131 + 474 0032 1840 ands r0, r3 + 475 .loc 1 514 44 discriminator 1 view .LVU132 + 476 0034 1A42 tst r2, r3 + 477 0036 42D0 beq .L32 + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get PLL clock source and multiplication factor ----------------------*/ + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + 478 .loc 1 517 9 is_stmt 1 view .LVU133 + 479 .loc 1 517 27 is_stmt 0 view .LVU134 + 480 0038 564A ldr r2, .L71 + 481 003a 5068 ldr r0, [r2, #4] + 482 .LVL29: + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 483 .loc 1 518 9 is_stmt 1 view .LVU135 + 484 .loc 1 518 27 is_stmt 0 view .LVU136 + 485 003c 5368 ldr r3, [r2, #4] + 486 .loc 1 518 22 view .LVU137 + 487 003e C021 movs r1, #192 + ARM GAS /tmp/ccnKkcg2.s page 19 + + + 488 0040 4902 lsls r1, r1, #9 + 489 0042 0B40 ands r3, r1 + 490 .LVL30: + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = (pllmull >> RCC_CFGR_PLLMUL_BITNUMBER) + 2U; + 491 .loc 1 519 9 is_stmt 1 view .LVU138 + 492 .loc 1 519 33 is_stmt 0 view .LVU139 + 493 0044 800C lsrs r0, r0, #18 + 494 .LVL31: + 495 .loc 1 519 33 view .LVU140 + 496 0046 0F21 movs r1, #15 + 497 0048 0840 ands r0, r1 + 498 .loc 1 519 22 view .LVU141 + 499 004a 841C adds r4, r0, #2 + 500 .LVL32: + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U; + 501 .loc 1 520 9 is_stmt 1 view .LVU142 + 502 .loc 1 520 28 is_stmt 0 view .LVU143 + 503 004c D26A ldr r2, [r2, #44] + 504 .loc 1 520 36 view .LVU144 + 505 004e 1140 ands r1, r2 + 506 .loc 1 520 22 view .LVU145 + 507 0050 0131 adds r1, r1, #1 + 508 .LVL33: + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + 509 .loc 1 522 9 is_stmt 1 view .LVU146 + 510 .loc 1 522 12 is_stmt 0 view .LVU147 + 511 0052 8022 movs r2, #128 + 512 0054 5202 lsls r2, r2, #9 + 513 0056 9342 cmp r3, r2 + 514 0058 00D1 bne .LCB454 + 515 005a 70E0 b .L61 @long jump + 516 .LCB454: + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : frequency = HSE/PREDIV * PLLMUL */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSE_VALUE/predivfactor) * pllmull; + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CR2_HSI48ON) + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) + 517 .loc 1 528 14 is_stmt 1 view .LVU148 + 518 .loc 1 528 17 is_stmt 0 view .LVU149 + 519 005c C022 movs r2, #192 + 520 005e 5202 lsls r2, r2, #9 + 521 0060 9342 cmp r3, r2 + 522 0062 00D1 bne .LCB459 + 523 0064 70E0 b .L62 @long jump + 524 .LCB459: + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI48 used as PLL clock source : frequency = HSI48/PREDIV * PLLMUL */ + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI48_VALUE / predivfactor) * pllmull; + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CR2_HSI48ON */ + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F078xx) || defined(STM32F072xB) || + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : frequency = HSI/PREDIV * PLLMUL */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI_VALUE / predivfactor) * pllmull; + ARM GAS /tmp/ccnKkcg2.s page 20 + + + 525 .loc 1 538 11 is_stmt 1 view .LVU150 + 526 .loc 1 538 34 is_stmt 0 view .LVU151 + 527 0066 4C48 ldr r0, .L71+4 + 528 0068 FFF7FEFF bl __aeabi_uidiv + 529 .LVL34: + 530 .loc 1 538 21 view .LVU152 + 531 006c 6043 muls r0, r4 + 532 .LVL35: + 533 .loc 1 538 21 view .LVU153 + 534 006e 26E0 b .L32 + 535 .LVL36: + 536 .L59: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 537 .loc 1 381 3 view .LVU154 + 538 0070 0128 cmp r0, #1 + 539 0072 3CD0 beq .L35 + 540 0074 2028 cmp r0, #32 + 541 0076 0CD1 bne .L63 + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 542 .loc 1 493 7 is_stmt 1 view .LVU155 + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 543 .loc 1 493 16 is_stmt 0 view .LVU156 + 544 0078 464B ldr r3, .L71 + 545 007a 1B6B ldr r3, [r3, #48] + 546 .LVL37: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 547 .loc 1 496 7 is_stmt 1 view .LVU157 + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 548 .loc 1 496 10 is_stmt 0 view .LVU158 + 549 007c DB06 lsls r3, r3, #27 + 550 007e 5BD4 bmi .L45 + 551 .LVL38: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 552 .loc 1 496 49 discriminator 1 view .LVU159 + 553 0080 444B ldr r3, .L71 + 554 0082 1B68 ldr r3, [r3] + 555 0084 0222 movs r2, #2 + 556 0086 1000 movs r0, r2 + 557 .LVL39: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 558 .loc 1 496 49 discriminator 1 view .LVU160 + 559 0088 1840 ands r0, r3 + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 560 .loc 1 496 45 discriminator 1 view .LVU161 + 561 008a 1A42 tst r2, r3 + 562 008c 17D0 beq .L32 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 563 .loc 1 498 19 view .LVU162 + 564 008e 4248 ldr r0, .L71+4 + 565 0090 15E0 b .L32 + 566 .LVL40: + 567 .L63: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 568 .loc 1 381 3 view .LVU163 + 569 0092 0020 movs r0, #0 + 570 .LVL41: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccnKkcg2.s page 21 + + + 571 .loc 1 381 3 view .LVU164 + 572 0094 13E0 b .L32 + 573 .LVL42: + 574 .L60: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 575 .loc 1 381 3 view .LVU165 + 576 0096 0020 movs r0, #0 + 577 .LVL43: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 578 .loc 1 381 3 view .LVU166 + 579 0098 11E0 b .L32 + 580 .LVL44: + 581 .L38: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 582 .loc 1 386 7 is_stmt 1 view .LVU167 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 583 .loc 1 386 16 is_stmt 0 view .LVU168 + 584 009a 3E4B ldr r3, .L71 + 585 009c 1B6A ldr r3, [r3, #32] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 586 .loc 1 386 14 view .LVU169 + 587 009e C022 movs r2, #192 + 588 00a0 9200 lsls r2, r2, #2 + 589 00a2 1340 ands r3, r2 + 590 .LVL45: + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 591 .loc 1 389 7 is_stmt 1 view .LVU170 + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 592 .loc 1 389 10 is_stmt 0 view .LVU171 + 593 00a4 8022 movs r2, #128 + 594 00a6 5200 lsls r2, r2, #1 + 595 00a8 9342 cmp r3, r2 + 596 00aa 09D0 beq .L64 + 597 .L40: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 598 .loc 1 394 12 is_stmt 1 view .LVU172 + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 599 .loc 1 394 15 is_stmt 0 view .LVU173 + 600 00ac 8022 movs r2, #128 + 601 00ae 9200 lsls r2, r2, #2 + 602 00b0 9342 cmp r3, r2 + 603 00b2 0CD0 beq .L65 + 604 .L41: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 605 .loc 1 399 12 is_stmt 1 view .LVU174 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 606 .loc 1 399 15 is_stmt 0 view .LVU175 + 607 00b4 C022 movs r2, #192 + 608 00b6 9200 lsls r2, r2, #2 + 609 00b8 9342 cmp r3, r2 + 610 00ba 0ED0 beq .L66 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 611 .loc 1 371 12 view .LVU176 + 612 00bc 0020 movs r0, #0 + 613 .LVL46: + 614 .L32: + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #else + ARM GAS /tmp/ccnKkcg2.s page 22 + + + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : frequency = HSI/2U * PLLMUL */ + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI_VALUE >> 1U) * pllmull; + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB */ + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CR2_HSI48ON) + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI48 is ready and if USB clock selection is HSI48 */ + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USBCLKSOURCE_HSI48) && (HAL_IS_BIT_SET(RCC->CR2, RCC_CR2_HSI48RDY))) + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI48_VALUE; + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CR2_HSI48ON */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* USB */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CEC) + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_CEC: + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current CEC source */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_CEC_SOURCE(); + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if CEC clock selection is HSI */ + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_CECCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if CEC clock selection is LSE */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_CECCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* CEC */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** default: + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return(frequency); + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 615 .loc 1 580 1 view .LVU177 + 616 @ sp needed + 617 00be 10BD pop {r4, pc} + 618 .LVL47: + 619 .L64: + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 620 .loc 1 389 48 discriminator 1 view .LVU178 + 621 00c0 344A ldr r2, .L71 + 622 00c2 126A ldr r2, [r2, #32] + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 623 .loc 1 389 44 discriminator 1 view .LVU179 + 624 00c4 9207 lsls r2, r2, #30 + 625 00c6 F1D5 bpl .L40 + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 626 .loc 1 391 19 view .LVU180 + 627 00c8 8020 movs r0, #128 + ARM GAS /tmp/ccnKkcg2.s page 23 + + + 628 .LVL48: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 629 .loc 1 391 19 view .LVU181 + 630 00ca 0002 lsls r0, r0, #8 + 631 00cc F7E7 b .L32 + 632 .LVL49: + 633 .L65: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 634 .loc 1 394 53 discriminator 1 view .LVU182 + 635 00ce 314A ldr r2, .L71 + 636 00d0 526A ldr r2, [r2, #36] + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 637 .loc 1 394 49 discriminator 1 view .LVU183 + 638 00d2 9207 lsls r2, r2, #30 + 639 00d4 EED5 bpl .L41 + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 640 .loc 1 396 19 view .LVU184 + 641 00d6 3148 ldr r0, .L71+8 + 642 .LVL50: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 643 .loc 1 396 19 view .LVU185 + 644 00d8 F1E7 b .L32 + 645 .LVL51: + 646 .L66: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 647 .loc 1 399 59 discriminator 1 view .LVU186 + 648 00da 2E4B ldr r3, .L71 + 649 .LVL52: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 650 .loc 1 399 59 discriminator 1 view .LVU187 + 651 00dc 1A68 ldr r2, [r3] + 652 00de 8023 movs r3, #128 + 653 00e0 9B02 lsls r3, r3, #10 + 654 00e2 1000 movs r0, r2 + 655 .LVL53: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 656 .loc 1 399 59 discriminator 1 view .LVU188 + 657 00e4 1840 ands r0, r3 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 658 .loc 1 399 55 discriminator 1 view .LVU189 + 659 00e6 1A42 tst r2, r3 + 660 00e8 E9D0 beq .L32 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 661 .loc 1 401 19 view .LVU190 + 662 00ea 2D48 ldr r0, .L71+12 + 663 00ec E7E7 b .L32 + 664 .LVL54: + 665 .L35: + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 666 .loc 1 408 7 is_stmt 1 view .LVU191 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 667 .loc 1 408 16 is_stmt 0 view .LVU192 + 668 00ee 294B ldr r3, .L71 + 669 00f0 1B6B ldr r3, [r3, #48] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 670 .loc 1 408 14 view .LVU193 + 671 00f2 0322 movs r2, #3 + ARM GAS /tmp/ccnKkcg2.s page 24 + + + 672 00f4 1100 movs r1, r2 + 673 00f6 1940 ands r1, r3 + 674 .LVL55: + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 675 .loc 1 411 7 is_stmt 1 view .LVU194 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 676 .loc 1 411 10 is_stmt 0 view .LVU195 + 677 00f8 1A42 tst r2, r3 + 678 00fa 07D0 beq .L67 + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 679 .loc 1 416 12 is_stmt 1 view .LVU196 + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 680 .loc 1 416 15 is_stmt 0 view .LVU197 + 681 00fc 0329 cmp r1, #3 + 682 00fe 08D0 beq .L68 + 683 .L43: + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 684 .loc 1 421 12 is_stmt 1 view .LVU198 + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 685 .loc 1 421 15 is_stmt 0 view .LVU199 + 686 0100 0129 cmp r1, #1 + 687 0102 0CD0 beq .L69 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 688 .loc 1 426 12 is_stmt 1 view .LVU200 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 689 .loc 1 426 15 is_stmt 0 view .LVU201 + 690 0104 0229 cmp r1, #2 + 691 0106 0DD0 beq .L70 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 692 .loc 1 371 12 view .LVU202 + 693 0108 0020 movs r0, #0 + 694 .LVL56: + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 695 .loc 1 371 12 view .LVU203 + 696 010a D8E7 b .L32 + 697 .LVL57: + 698 .L67: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 699 .loc 1 413 9 is_stmt 1 view .LVU204 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 700 .loc 1 413 21 is_stmt 0 view .LVU205 + 701 010c FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 702 .LVL58: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 703 .loc 1 413 21 view .LVU206 + 704 0110 D5E7 b .L32 + 705 .LVL59: + 706 .L68: + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 707 .loc 1 416 56 discriminator 1 view .LVU207 + 708 0112 204B ldr r3, .L71 + 709 0114 1B68 ldr r3, [r3] + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 710 .loc 1 416 52 discriminator 1 view .LVU208 + 711 0116 9B07 lsls r3, r3, #30 + 712 0118 F2D5 bpl .L43 + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccnKkcg2.s page 25 + + + 713 .loc 1 418 19 view .LVU209 + 714 011a 1F48 ldr r0, .L71+4 + 715 .LVL60: + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 716 .loc 1 418 19 view .LVU210 + 717 011c CFE7 b .L32 + 718 .LVL61: + 719 .L69: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 720 .loc 1 423 9 is_stmt 1 view .LVU211 + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 721 .loc 1 423 21 is_stmt 0 view .LVU212 + 722 011e FFF7FEFF bl HAL_RCC_GetSysClockFreq + 723 .LVL62: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 724 .loc 1 423 21 view .LVU213 + 725 0122 CCE7 b .L32 + 726 .LVL63: + 727 .L70: + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 728 .loc 1 426 56 discriminator 1 view .LVU214 + 729 0124 1B4B ldr r3, .L71 + 730 0126 1B6A ldr r3, [r3, #32] + 731 0128 0222 movs r2, #2 + 732 012a 1000 movs r0, r2 + 733 .LVL64: + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 734 .loc 1 426 56 discriminator 1 view .LVU215 + 735 012c 1840 ands r0, r3 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 736 .loc 1 426 52 discriminator 1 view .LVU216 + 737 012e 1A42 tst r2, r3 + 738 0130 C5D0 beq .L32 + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 739 .loc 1 428 19 view .LVU217 + 740 0132 8020 movs r0, #128 + 741 0134 0002 lsls r0, r0, #8 + 742 0136 C2E7 b .L32 + 743 .LVL65: + 744 .L45: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 745 .loc 1 503 9 is_stmt 1 view .LVU218 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 746 .loc 1 503 21 is_stmt 0 view .LVU219 + 747 0138 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 748 .LVL66: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 749 .loc 1 503 21 view .LVU220 + 750 013c BFE7 b .L32 + 751 .LVL67: + 752 .L61: + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 753 .loc 1 525 11 is_stmt 1 view .LVU221 + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 754 .loc 1 525 33 is_stmt 0 view .LVU222 + 755 013e 1648 ldr r0, .L71+4 + 756 0140 FFF7FEFF bl __aeabi_uidiv + ARM GAS /tmp/ccnKkcg2.s page 26 + + + 757 .LVL68: + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 758 .loc 1 525 21 view .LVU223 + 759 0144 6043 muls r0, r4 + 760 .LVL69: + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 761 .loc 1 525 21 view .LVU224 + 762 0146 BAE7 b .L32 + 763 .LVL70: + 764 .L62: + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 765 .loc 1 531 11 is_stmt 1 view .LVU225 + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 766 .loc 1 531 36 is_stmt 0 view .LVU226 + 767 0148 1648 ldr r0, .L71+16 + 768 014a FFF7FEFF bl __aeabi_uidiv + 769 .LVL71: + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 770 .loc 1 531 21 view .LVU227 + 771 014e 6043 muls r0, r4 + 772 .LVL72: + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 773 .loc 1 531 21 view .LVU228 + 774 0150 B5E7 b .L32 + 775 .LVL73: + 776 .L46: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 777 .loc 1 547 55 discriminator 1 view .LVU229 + 778 0152 104B ldr r3, .L71 + 779 0154 5A6B ldr r2, [r3, #52] + 780 0156 8023 movs r3, #128 + 781 0158 9B02 lsls r3, r3, #10 + 782 015a 1000 movs r0, r2 + 783 .LVL74: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 784 .loc 1 547 55 discriminator 1 view .LVU230 + 785 015c 1840 ands r0, r3 + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 786 .loc 1 547 51 discriminator 1 view .LVU231 + 787 015e 1A42 tst r2, r3 + 788 0160 ADD0 beq .L32 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 789 .loc 1 549 19 view .LVU232 + 790 0162 1048 ldr r0, .L71+16 + 791 0164 ABE7 b .L32 + 792 .LVL75: + 793 .L33: + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 794 .loc 1 559 7 is_stmt 1 view .LVU233 + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 795 .loc 1 559 16 is_stmt 0 view .LVU234 + 796 0166 0B4B ldr r3, .L71 + 797 0168 1B6B ldr r3, [r3, #48] + 798 .LVL76: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 799 .loc 1 562 7 is_stmt 1 view .LVU235 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccnKkcg2.s page 27 + + + 800 .loc 1 562 10 is_stmt 0 view .LVU236 + 801 016a 5B06 lsls r3, r3, #25 + 802 016c 08D4 bmi .L49 + 803 .LVL77: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 804 .loc 1 562 48 discriminator 1 view .LVU237 + 805 016e 094B ldr r3, .L71 + 806 0170 1B68 ldr r3, [r3] + 807 0172 0222 movs r2, #2 + 808 0174 1000 movs r0, r2 + 809 .LVL78: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 810 .loc 1 562 48 discriminator 1 view .LVU238 + 811 0176 1840 ands r0, r3 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 812 .loc 1 562 44 discriminator 1 view .LVU239 + 813 0178 1A42 tst r2, r3 + 814 017a A0D0 beq .L32 + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 815 .loc 1 564 19 view .LVU240 + 816 017c 0648 ldr r0, .L71+4 + 817 017e 9EE7 b .L32 + 818 .LVL79: + 819 .L49: + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 820 .loc 1 567 53 discriminator 1 view .LVU241 + 821 0180 044B ldr r3, .L71 + 822 0182 1B6A ldr r3, [r3, #32] + 823 0184 0222 movs r2, #2 + 824 0186 1000 movs r0, r2 + 825 .LVL80: + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 826 .loc 1 567 53 discriminator 1 view .LVU242 + 827 0188 1840 ands r0, r3 + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 828 .loc 1 567 49 discriminator 1 view .LVU243 + 829 018a 1A42 tst r2, r3 + 830 018c 97D0 beq .L32 + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 831 .loc 1 569 19 view .LVU244 + 832 018e 8020 movs r0, #128 + 833 0190 0002 lsls r0, r0, #8 + 834 .LVL81: + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 835 .loc 1 579 3 is_stmt 1 view .LVU245 + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 836 .loc 1 579 9 is_stmt 0 view .LVU246 + 837 0192 94E7 b .L32 + 838 .L72: + 839 .align 2 + 840 .L71: + 841 0194 00100240 .word 1073876992 + 842 0198 00127A00 .word 8000000 + 843 019c 409C0000 .word 40000 + 844 01a0 90D00300 .word 250000 + 845 01a4 006CDC02 .word 48000000 + 846 .cfi_endproc + ARM GAS /tmp/ccnKkcg2.s page 28 + + + 847 .LFE42: + 849 .section .text.HAL_RCCEx_CRSConfig,"ax",%progbits + 850 .align 1 + 851 .global HAL_RCCEx_CRSConfig + 852 .syntax unified + 853 .code 16 + 854 .thumb_func + 856 HAL_RCCEx_CRSConfig: + 857 .LVL82: + 858 .LFB43: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CRS) + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended Clock Recovery System Control functions + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @verbatim + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ##### Extended Clock Recovery System Control functions ##### + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** For devices with Clock Recovery System feature (CRS), RCC Extension HAL driver can be used as + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) In System clock config, HSI48 needs to be enabled + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Enable CRS clock in IP MSP init which will use CRS functions + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Call CRS functions as follows: + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) Prepare synchronization configuration necessary for HSI48 calibration + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Default values can be set for frequency Error Measurement (reload and error lim + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** and also HSI48 oscillator smooth trimming. + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Macro __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** directly reload value with target and synchronization frequencies values + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) Call function HAL_RCCEx_CRSConfig which + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Reset CRS registers to their default values. + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Configure CRS registers with synchronization configuration + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Enable automatic calibration and frequency error counter feature + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** periodic USB SOF will not be generated by the host. No SYNC signal will therefore be + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** should be used as SYNC signal. + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) A polling function is provided to wait for complete synchronization + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Call function HAL_RCCEx_CRSWaitSynchronization() + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) According to CRS status, user can decide to adjust again the calibration or con + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** application if synchronization is OK + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) User can retrieve information related to synchronization in calling function + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRSGetSynchronizationInfo() + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Regarding synchronization status and synchronization information, user can try a new cali + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** in changing synchronization configuration and call again HAL_RCCEx_CRSConfig. + ARM GAS /tmp/ccnKkcg2.s page 29 + + + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** Note: When the SYNC event is detected during the downcounting phase (before reaching the + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** it means that the actual frequency is lower than the target (and so, that the TRIM value + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** incremented), while when it is detected during the upcounting phase it means that the ac + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** is higher (and that the TRIM value should be decremented). + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interr + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** through CRS Handler (RCC_IRQn/RCC_IRQHandler) + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Call function HAL_RCCEx_CRSConfig() + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Enable RCC_IRQn (thanks to NVIC functions) + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Enable CRS interrupt (__HAL_RCC_CRS_ENABLE_IT) + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Implement CRS status management in the following user callbacks called from + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_IRQHandler(): + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_SyncOkCallback() + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_SyncWarnCallback() + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_ExpectedSyncCallback() + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_ErrorCallback() + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) To force a SYNC EVENT, user can use the function HAL_RCCEx_CRSSoftwareSynchronizationGene + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** This function can be called before calling HAL_RCCEx_CRSConfig (for instance in Systick h + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endverbatim + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Start automatic synchronization for polling mode + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param pInit Pointer on RCC_CRSInitTypeDef structure + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit) + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 859 .loc 1 658 1 is_stmt 1 view -0 + 860 .cfi_startproc + 861 @ args = 0, pretend = 0, frame = 0 + 862 @ frame_needed = 0, uses_anonymous_args = 0 + 863 @ link register save eliminated. + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t value = 0U; + 864 .loc 1 659 3 view .LVU248 + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler)); + 865 .loc 1 662 3 view .LVU249 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source)); + 866 .loc 1 663 3 view .LVU250 + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity)); + 867 .loc 1 664 3 view .LVU251 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue)); + 868 .loc 1 665 3 view .LVU252 + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue)); + 869 .loc 1 666 3 view .LVU253 + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue)); + 870 .loc 1 667 3 view .LVU254 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CONFIGURATION */ + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Before configuration, reset CRS registers to their default values*/ + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_FORCE_RESET(); + ARM GAS /tmp/ccnKkcg2.s page 30 + + + 871 .loc 1 672 3 view .LVU255 + 872 0000 104B ldr r3, .L74 + 873 0002 1969 ldr r1, [r3, #16] + 874 0004 8022 movs r2, #128 + 875 0006 1205 lsls r2, r2, #20 + 876 0008 0A43 orrs r2, r1 + 877 000a 1A61 str r2, [r3, #16] + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_RELEASE_RESET(); + 878 .loc 1 673 3 view .LVU256 + 879 000c 1A69 ldr r2, [r3, #16] + 880 000e 0E49 ldr r1, .L74+4 + 881 0010 0A40 ands r2, r1 + 882 0012 1A61 str r2, [r3, #16] + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCDIV[2:0] bits according to Prescaler value */ + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCSRC[1:0] bits according to Source value */ + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCSPOL bit according to Polarity value */ + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value = (pInit->Prescaler | pInit->Source | pInit->Polarity); + 883 .loc 1 678 3 view .LVU257 + 884 .loc 1 678 17 is_stmt 0 view .LVU258 + 885 0014 0368 ldr r3, [r0] + 886 .loc 1 678 36 view .LVU259 + 887 0016 4268 ldr r2, [r0, #4] + 888 .loc 1 678 29 view .LVU260 + 889 0018 1343 orrs r3, r2 + 890 .loc 1 678 52 view .LVU261 + 891 001a 8268 ldr r2, [r0, #8] + 892 .loc 1 678 9 view .LVU262 + 893 001c 1343 orrs r3, r2 + 894 .LVL83: + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the RELOAD[15:0] bits according to ReloadValue value */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value |= pInit->ReloadValue; + 895 .loc 1 680 3 is_stmt 1 view .LVU263 + 896 .loc 1 680 17 is_stmt 0 view .LVU264 + 897 001e C268 ldr r2, [r0, #12] + 898 .loc 1 680 9 view .LVU265 + 899 0020 1343 orrs r3, r2 + 900 .LVL84: + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the FELIM[7:0] bits according to ErrorLimitValue value */ + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_BITNUMBER); + 901 .loc 1 682 3 is_stmt 1 view .LVU266 + 902 .loc 1 682 18 is_stmt 0 view .LVU267 + 903 0022 0269 ldr r2, [r0, #16] + 904 .loc 1 682 36 view .LVU268 + 905 0024 1204 lsls r2, r2, #16 + 906 .loc 1 682 9 view .LVU269 + 907 0026 1A43 orrs r2, r3 + 908 .LVL85: + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->CFGR, value); + 909 .loc 1 683 3 is_stmt 1 view .LVU270 + 910 0028 084B ldr r3, .L74+8 + 911 002a 5A60 str r2, [r3, #4] + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Adjust HSI48 oscillator smooth trimming */ + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */ + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER)); + 912 .loc 1 687 3 view .LVU271 + ARM GAS /tmp/ccnKkcg2.s page 31 + + + 913 002c 1A68 ldr r2, [r3] + 914 .LVL86: + 915 .loc 1 687 3 is_stmt 0 view .LVU272 + 916 002e 0849 ldr r1, .L74+12 + 917 0030 0A40 ands r2, r1 + 918 0032 4169 ldr r1, [r0, #20] + 919 0034 0902 lsls r1, r1, #8 + 920 0036 0A43 orrs r2, r1 + 921 0038 1A60 str r2, [r3] + 922 .LVL87: + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* START AUTOMATIC SYNCHRONIZATION*/ + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Enable Automatic trimming & Frequency error counter */ + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); + 923 .loc 1 692 3 is_stmt 1 view .LVU273 + 924 003a 1A68 ldr r2, [r3] + 925 003c 6021 movs r1, #96 + 926 003e 0A43 orrs r2, r1 + 927 0040 1A60 str r2, [r3] + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 928 .loc 1 693 1 is_stmt 0 view .LVU274 + 929 @ sp needed + 930 0042 7047 bx lr + 931 .L75: + 932 .align 2 + 933 .L74: + 934 0044 00100240 .word 1073876992 + 935 0048 FFFFFFF7 .word -134217729 + 936 004c 006C0040 .word 1073769472 + 937 0050 FFC0FFFF .word -16129 + 938 .cfi_endproc + 939 .LFE43: + 941 .section .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate,"ax",%progbits + 942 .align 1 + 943 .global HAL_RCCEx_CRSSoftwareSynchronizationGenerate + 944 .syntax unified + 945 .code 16 + 946 .thumb_func + 948 HAL_RCCEx_CRSSoftwareSynchronizationGenerate: + 949 .LFB44: + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Generate the software synchronization event + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void) + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 950 .loc 1 700 1 is_stmt 1 view -0 + 951 .cfi_startproc + 952 @ args = 0, pretend = 0, frame = 0 + 953 @ frame_needed = 0, uses_anonymous_args = 0 + 954 @ link register save eliminated. + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_SWSYNC); + 955 .loc 1 701 3 view .LVU276 + 956 0000 024A ldr r2, .L77 + 957 0002 1368 ldr r3, [r2] + ARM GAS /tmp/ccnKkcg2.s page 32 + + + 958 0004 8021 movs r1, #128 + 959 0006 0B43 orrs r3, r1 + 960 0008 1360 str r3, [r2] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 961 .loc 1 702 1 is_stmt 0 view .LVU277 + 962 @ sp needed + 963 000a 7047 bx lr + 964 .L78: + 965 .align 2 + 966 .L77: + 967 000c 006C0040 .word 1073769472 + 968 .cfi_endproc + 969 .LFE44: + 971 .section .text.HAL_RCCEx_CRSGetSynchronizationInfo,"ax",%progbits + 972 .align 1 + 973 .global HAL_RCCEx_CRSGetSynchronizationInfo + 974 .syntax unified + 975 .code 16 + 976 .thumb_func + 978 HAL_RCCEx_CRSGetSynchronizationInfo: + 979 .LVL88: + 980 .LFB45: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Return synchronization info + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo) + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 981 .loc 1 710 1 is_stmt 1 view -0 + 982 .cfi_startproc + 983 @ args = 0, pretend = 0, frame = 0 + 984 @ frame_needed = 0, uses_anonymous_args = 0 + 985 @ link register save eliminated. + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameter */ + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(pSynchroInfo != NULL); + 986 .loc 1 712 3 view .LVU279 + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the reload value */ + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); + 987 .loc 1 715 3 view .LVU280 + 988 .loc 1 715 42 is_stmt 0 view .LVU281 + 989 0000 094A ldr r2, .L80 + 990 0002 5368 ldr r3, [r2, #4] + 991 .loc 1 715 31 view .LVU282 + 992 0004 1B04 lsls r3, r3, #16 + 993 0006 1B0C lsrs r3, r3, #16 + 994 .loc 1 715 29 view .LVU283 + 995 0008 0360 str r3, [r0] + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get HSI48 oscillator smooth trimming */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BI + 996 .loc 1 718 3 is_stmt 1 view .LVU284 + 997 .loc 1 718 52 is_stmt 0 view .LVU285 + 998 000a 1168 ldr r1, [r2] + 999 .loc 1 718 41 view .LVU286 + ARM GAS /tmp/ccnKkcg2.s page 33 + + + 1000 000c 090A lsrs r1, r1, #8 + 1001 000e 3F23 movs r3, #63 + 1002 0010 0B40 ands r3, r1 + 1003 .loc 1 718 39 view .LVU287 + 1004 0012 4360 str r3, [r0, #4] + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Frequency error capture */ + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BI + 1005 .loc 1 721 3 is_stmt 1 view .LVU288 + 1006 .loc 1 721 47 is_stmt 0 view .LVU289 + 1007 0014 9368 ldr r3, [r2, #8] + 1008 .loc 1 721 36 view .LVU290 + 1009 0016 1B0C lsrs r3, r3, #16 + 1010 .loc 1 721 34 view .LVU291 + 1011 0018 8360 str r3, [r0, #8] + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Frequency error direction */ + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); + 1012 .loc 1 724 3 is_stmt 1 view .LVU292 + 1013 .loc 1 724 49 is_stmt 0 view .LVU293 + 1014 001a 9368 ldr r3, [r2, #8] + 1015 .loc 1 724 38 view .LVU294 + 1016 001c 8022 movs r2, #128 + 1017 001e 1202 lsls r2, r2, #8 + 1018 0020 1340 ands r3, r2 + 1019 .loc 1 724 36 view .LVU295 + 1020 0022 C360 str r3, [r0, #12] + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1021 .loc 1 725 1 view .LVU296 + 1022 @ sp needed + 1023 0024 7047 bx lr + 1024 .L81: + 1025 0026 C046 .align 2 + 1026 .L80: + 1027 0028 006C0040 .word 1073769472 + 1028 .cfi_endproc + 1029 .LFE45: + 1031 .section .text.HAL_RCCEx_CRSWaitSynchronization,"ax",%progbits + 1032 .align 1 + 1033 .global HAL_RCCEx_CRSWaitSynchronization + 1034 .syntax unified + 1035 .code 16 + 1036 .thumb_func + 1038 HAL_RCCEx_CRSWaitSynchronization: + 1039 .LVL89: + 1040 .LFB46: + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Wait for CRS Synchronization status. + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param Timeout Duration of the timeout + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Timeout is based on the maximum time to receive a SYNC event based on synchronization + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * frequency. + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned. + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval Combination of Synchronization status + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values: + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TIMEOUT + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCOK + ARM GAS /tmp/ccnKkcg2.s page 34 + + + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCWARN + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout) + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1041 .loc 1 743 1 is_stmt 1 view -0 + 1042 .cfi_startproc + 1043 @ args = 0, pretend = 0, frame = 0 + 1044 @ frame_needed = 0, uses_anonymous_args = 0 + 1045 .loc 1 743 1 is_stmt 0 view .LVU298 + 1046 0000 70B5 push {r4, r5, r6, lr} + 1047 .cfi_def_cfa_offset 16 + 1048 .cfi_offset 4, -16 + 1049 .cfi_offset 5, -12 + 1050 .cfi_offset 6, -8 + 1051 .cfi_offset 14, -4 + 1052 0002 0500 movs r5, r0 + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE; + 1053 .loc 1 744 3 is_stmt 1 view .LVU299 + 1054 .LVL90: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 1055 .loc 1 745 3 view .LVU300 + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get timeout */ + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 1056 .loc 1 748 3 view .LVU301 + 1057 .loc 1 748 15 is_stmt 0 view .LVU302 + 1058 0004 FFF7FEFF bl HAL_GetTick + 1059 .LVL91: + 1060 .loc 1 748 15 view .LVU303 + 1061 0008 0600 movs r6, r0 + 1062 .LVL92: + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 1063 .loc 1 744 12 view .LVU304 + 1064 000a 0024 movs r4, #0 + 1065 000c 3AE0 b .L90 + 1066 .LVL93: + 1067 .L101: + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for CRS flag or timeout detection */ + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** do + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(Timeout != HAL_MAX_DELAY) + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 1068 .loc 1 755 31 discriminator 1 view .LVU305 + 1069 000e FFF7FEFF bl HAL_GetTick + 1070 .LVL94: + 1071 .loc 1 755 45 discriminator 1 view .LVU306 + 1072 0012 801B subs r0, r0, r6 + 1073 .loc 1 755 26 discriminator 1 view .LVU307 + 1074 0014 A842 cmp r0, r5 + 1075 0016 3BD8 bhi .L92 + 1076 .LVL95: + 1077 .L83: + ARM GAS /tmp/ccnKkcg2.s page 35 + + + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus = RCC_CRS_TIMEOUT; + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */ + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK)) + 1078 .loc 1 761 5 is_stmt 1 view .LVU308 + 1079 .loc 1 761 8 is_stmt 0 view .LVU309 + 1080 0018 1F4B ldr r3, .L102 + 1081 001a 9B68 ldr r3, [r3, #8] + 1082 .loc 1 761 7 view .LVU310 + 1083 001c DB07 lsls r3, r3, #31 + 1084 001e 04D5 bpl .L84 + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC event OK */ + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCOK; + 1085 .loc 1 764 7 is_stmt 1 view .LVU311 + 1086 .loc 1 764 17 is_stmt 0 view .LVU312 + 1087 0020 0223 movs r3, #2 + 1088 0022 1C43 orrs r4, r3 + 1089 .LVL96: + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK bit */ + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK); + 1090 .loc 1 767 7 is_stmt 1 view .LVU313 + 1091 .loc 1 767 7 view .LVU314 + 1092 .loc 1 767 7 discriminator 2 view .LVU315 + 1093 0024 1C4B ldr r3, .L102 + 1094 0026 0122 movs r2, #1 + 1095 0028 DA60 str r2, [r3, #12] + 1096 .L84: + 1097 .loc 1 767 7 discriminator 4 view .LVU316 + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */ + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN)) + 1098 .loc 1 771 5 view .LVU317 + 1099 .loc 1 771 8 is_stmt 0 view .LVU318 + 1100 002a 1B4B ldr r3, .L102 + 1101 002c 9B68 ldr r3, [r3, #8] + 1102 .loc 1 771 7 view .LVU319 + 1103 002e 9B07 lsls r3, r3, #30 + 1104 0030 04D5 bpl .L85 + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC warning */ + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCWARN; + 1105 .loc 1 774 7 is_stmt 1 view .LVU320 + 1106 .loc 1 774 17 is_stmt 0 view .LVU321 + 1107 0032 0423 movs r3, #4 + 1108 0034 1C43 orrs r4, r3 + 1109 .LVL97: + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN bit */ + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN); + 1110 .loc 1 777 7 is_stmt 1 view .LVU322 + 1111 .loc 1 777 7 view .LVU323 + 1112 .loc 1 777 7 discriminator 2 view .LVU324 + ARM GAS /tmp/ccnKkcg2.s page 36 + + + 1113 0036 184B ldr r3, .L102 + 1114 0038 0222 movs r2, #2 + 1115 003a DA60 str r2, [r3, #12] + 1116 .L85: + 1117 .loc 1 777 7 discriminator 4 view .LVU325 + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS TRIM overflow flag */ + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF)) + 1118 .loc 1 781 5 view .LVU326 + 1119 .loc 1 781 8 is_stmt 0 view .LVU327 + 1120 003c 164B ldr r3, .L102 + 1121 003e 9B68 ldr r3, [r3, #8] + 1122 .loc 1 781 7 view .LVU328 + 1123 0040 5B05 lsls r3, r3, #21 + 1124 0042 04D5 bpl .L86 + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Error */ + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_TRIMOVF; + 1125 .loc 1 784 7 is_stmt 1 view .LVU329 + 1126 .loc 1 784 17 is_stmt 0 view .LVU330 + 1127 0044 2023 movs r3, #32 + 1128 0046 1C43 orrs r4, r3 + 1129 .LVL98: + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */ + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF); + 1130 .loc 1 787 7 is_stmt 1 view .LVU331 + 1131 .loc 1 787 7 view .LVU332 + 1132 .loc 1 787 7 discriminator 1 view .LVU333 + 1133 0048 134B ldr r3, .L102 + 1134 004a 0422 movs r2, #4 + 1135 004c DA60 str r2, [r3, #12] + 1136 .L86: + 1137 .loc 1 787 7 discriminator 4 view .LVU334 + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Error flag */ + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR)) + 1138 .loc 1 791 5 view .LVU335 + 1139 .loc 1 791 8 is_stmt 0 view .LVU336 + 1140 004e 124B ldr r3, .L102 + 1141 0050 9B68 ldr r3, [r3, #8] + 1142 .loc 1 791 7 view .LVU337 + 1143 0052 DB05 lsls r3, r3, #23 + 1144 0054 04D5 bpl .L87 + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Error */ + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCERR; + 1145 .loc 1 794 7 is_stmt 1 view .LVU338 + 1146 .loc 1 794 17 is_stmt 0 view .LVU339 + 1147 0056 0823 movs r3, #8 + 1148 0058 1C43 orrs r4, r3 + 1149 .LVL99: + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */ + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR); + ARM GAS /tmp/ccnKkcg2.s page 37 + + + 1150 .loc 1 797 7 is_stmt 1 view .LVU340 + 1151 .loc 1 797 7 view .LVU341 + 1152 .loc 1 797 7 discriminator 1 view .LVU342 + 1153 005a 0F4B ldr r3, .L102 + 1154 005c 0422 movs r2, #4 + 1155 005e DA60 str r2, [r3, #12] + 1156 .L87: + 1157 .loc 1 797 7 discriminator 4 view .LVU343 + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNC Missed flag */ + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS)) + 1158 .loc 1 801 5 view .LVU344 + 1159 .loc 1 801 8 is_stmt 0 view .LVU345 + 1160 0060 0D4B ldr r3, .L102 + 1161 0062 9B68 ldr r3, [r3, #8] + 1162 .loc 1 801 7 view .LVU346 + 1163 0064 9B05 lsls r3, r3, #22 + 1164 0066 04D5 bpl .L88 + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Missed */ + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCMISS; + 1165 .loc 1 804 7 is_stmt 1 view .LVU347 + 1166 .loc 1 804 17 is_stmt 0 view .LVU348 + 1167 0068 1023 movs r3, #16 + 1168 006a 1C43 orrs r4, r3 + 1169 .LVL100: + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC Missed bit */ + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS); + 1170 .loc 1 807 7 is_stmt 1 view .LVU349 + 1171 .loc 1 807 7 view .LVU350 + 1172 .loc 1 807 7 discriminator 1 view .LVU351 + 1173 006c 0A4B ldr r3, .L102 + 1174 006e 0422 movs r2, #4 + 1175 0070 DA60 str r2, [r3, #12] + 1176 .L88: + 1177 .loc 1 807 7 discriminator 4 view .LVU352 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */ + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC)) + 1178 .loc 1 811 5 view .LVU353 + 1179 .loc 1 811 8 is_stmt 0 view .LVU354 + 1180 0072 094B ldr r3, .L102 + 1181 0074 9B68 ldr r3, [r3, #8] + 1182 .loc 1 811 7 view .LVU355 + 1183 0076 1B07 lsls r3, r3, #28 + 1184 0078 02D5 bpl .L89 + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */ + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC); + 1185 .loc 1 814 7 is_stmt 1 view .LVU356 + 1186 .loc 1 814 7 view .LVU357 + 1187 .loc 1 814 7 discriminator 2 view .LVU358 + 1188 007a 074B ldr r3, .L102 + 1189 007c 0822 movs r2, #8 + ARM GAS /tmp/ccnKkcg2.s page 38 + + + 1190 007e DA60 str r2, [r3, #12] + 1191 .L89: + 1192 .loc 1 814 7 discriminator 4 view .LVU359 + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } while(RCC_CRS_NONE == crsstatus); + 1193 .loc 1 816 24 view .LVU360 + 1194 0080 002C cmp r4, #0 + 1195 0082 07D1 bne .L100 + 1196 .LVL101: + 1197 .L90: + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1198 .loc 1 751 3 view .LVU361 + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1199 .loc 1 753 5 view .LVU362 + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1200 .loc 1 753 7 is_stmt 0 view .LVU363 + 1201 0084 6B1C adds r3, r5, #1 + 1202 0086 C7D0 beq .L83 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1203 .loc 1 755 7 is_stmt 1 view .LVU364 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1204 .loc 1 755 9 is_stmt 0 view .LVU365 + 1205 0088 002D cmp r5, #0 + 1206 008a C0D1 bne .L101 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1207 .loc 1 757 19 view .LVU366 + 1208 008c 0124 movs r4, #1 + 1209 .LVL102: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1210 .loc 1 757 19 view .LVU367 + 1211 008e C3E7 b .L83 + 1212 .LVL103: + 1213 .L92: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1214 .loc 1 757 19 view .LVU368 + 1215 0090 0124 movs r4, #1 + 1216 .LVL104: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1217 .loc 1 757 19 view .LVU369 + 1218 0092 C1E7 b .L83 + 1219 .LVL105: + 1220 .L100: + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return crsstatus; + 1221 .loc 1 818 3 is_stmt 1 view .LVU370 + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1222 .loc 1 819 1 is_stmt 0 view .LVU371 + 1223 0094 2000 movs r0, r4 + 1224 @ sp needed + 1225 .LVL106: + 1226 .LVL107: + 1227 .LVL108: + 1228 .loc 1 819 1 view .LVU372 + 1229 0096 70BD pop {r4, r5, r6, pc} + 1230 .L103: + 1231 .align 2 + 1232 .L102: + ARM GAS /tmp/ccnKkcg2.s page 39 + + + 1233 0098 006C0040 .word 1073769472 + 1234 .cfi_endproc + 1235 .LFE46: + 1237 .section .text.HAL_RCCEx_CRS_SyncOkCallback,"ax",%progbits + 1238 .align 1 + 1239 .weak HAL_RCCEx_CRS_SyncOkCallback + 1240 .syntax unified + 1241 .code 16 + 1242 .thumb_func + 1244 HAL_RCCEx_CRS_SyncOkCallback: + 1245 .LFB48: + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Handle the Clock Recovery System interrupt request. + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRS_IRQHandler(void) + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE; + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */ + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itflags = READ_REG(CRS->ISR); + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR); + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */ + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET)) + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK flag */ + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC); + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncOkCallback(); + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */ + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RES + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN flag */ + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC); + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncWarnCallback(); + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */ + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET)) + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */ + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC); + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ExpectedSyncCallback(); + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Error flags */ + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET)) + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET) + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccnKkcg2.s page 40 + + + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCERR; + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET) + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCMISS; + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET) + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_TRIMOVF; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error flags */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ERRC); + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user error callback */ + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ErrorCallback(crserror); + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCOK interrupt callback. + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncOkCallback(void) + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1246 .loc 1 891 1 is_stmt 1 view -0 + 1247 .cfi_startproc + 1248 @ args = 0, pretend = 0, frame = 0 + 1249 @ frame_needed = 0, uses_anonymous_args = 0 + 1250 @ link register save eliminated. + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1251 .loc 1 895 1 view .LVU374 + 1252 @ sp needed + 1253 0000 7047 bx lr + 1254 .cfi_endproc + 1255 .LFE48: + 1257 .section .text.HAL_RCCEx_CRS_SyncWarnCallback,"ax",%progbits + 1258 .align 1 + 1259 .weak HAL_RCCEx_CRS_SyncWarnCallback + 1260 .syntax unified + 1261 .code 16 + 1262 .thumb_func + 1264 HAL_RCCEx_CRS_SyncWarnCallback: + 1265 .LFB49: + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCWARN interrupt callback. + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncWarnCallback(void) + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1266 .loc 1 902 1 view -0 + 1267 .cfi_startproc + ARM GAS /tmp/ccnKkcg2.s page 41 + + + 1268 @ args = 0, pretend = 0, frame = 0 + 1269 @ frame_needed = 0, uses_anonymous_args = 0 + 1270 @ link register save eliminated. + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1271 .loc 1 906 1 view .LVU376 + 1272 @ sp needed + 1273 0000 7047 bx lr + 1274 .cfi_endproc + 1275 .LFE49: + 1277 .section .text.HAL_RCCEx_CRS_ExpectedSyncCallback,"ax",%progbits + 1278 .align 1 + 1279 .weak HAL_RCCEx_CRS_ExpectedSyncCallback + 1280 .syntax unified + 1281 .code 16 + 1282 .thumb_func + 1284 HAL_RCCEx_CRS_ExpectedSyncCallback: + 1285 .LFB50: + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Expected SYNC interrupt callback. + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void) + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1286 .loc 1 913 1 view -0 + 1287 .cfi_startproc + 1288 @ args = 0, pretend = 0, frame = 0 + 1289 @ frame_needed = 0, uses_anonymous_args = 0 + 1290 @ link register save eliminated. + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1291 .loc 1 917 1 view .LVU378 + 1292 @ sp needed + 1293 0000 7047 bx lr + 1294 .cfi_endproc + 1295 .LFE50: + 1297 .section .text.HAL_RCCEx_CRS_ErrorCallback,"ax",%progbits + 1298 .align 1 + 1299 .weak HAL_RCCEx_CRS_ErrorCallback + 1300 .syntax unified + 1301 .code 16 + 1302 .thumb_func + 1304 HAL_RCCEx_CRS_ErrorCallback: + 1305 .LVL109: + 1306 .LFB51: + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Error interrupt callback. + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param Error Combination of Error status. + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values: + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS + ARM GAS /tmp/ccnKkcg2.s page 42 + + + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error) + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1307 .loc 1 929 1 view -0 + 1308 .cfi_startproc + 1309 @ args = 0, pretend = 0, frame = 0 + 1310 @ frame_needed = 0, uses_anonymous_args = 0 + 1311 @ link register save eliminated. + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Prevent unused argument(s) compilation warning */ + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** UNUSED(Error); + 1312 .loc 1 931 3 view .LVU380 + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1313 .loc 1 936 1 is_stmt 0 view .LVU381 + 1314 @ sp needed + 1315 0000 7047 bx lr + 1316 .cfi_endproc + 1317 .LFE51: + 1319 .section .text.HAL_RCCEx_CRS_IRQHandler,"ax",%progbits + 1320 .align 1 + 1321 .global HAL_RCCEx_CRS_IRQHandler + 1322 .syntax unified + 1323 .code 16 + 1324 .thumb_func + 1326 HAL_RCCEx_CRS_IRQHandler: + 1327 .LFB47: + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE; + 1328 .loc 1 826 1 is_stmt 1 view -0 + 1329 .cfi_startproc + 1330 @ args = 0, pretend = 0, frame = 0 + 1331 @ frame_needed = 0, uses_anonymous_args = 0 + 1332 0000 10B5 push {r4, lr} + 1333 .cfi_def_cfa_offset 8 + 1334 .cfi_offset 4, -8 + 1335 .cfi_offset 14, -4 + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */ + 1336 .loc 1 827 3 view .LVU383 + 1337 .LVL110: + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR); + 1338 .loc 1 829 3 view .LVU384 + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR); + 1339 .loc 1 829 12 is_stmt 0 view .LVU385 + 1340 0002 1D4A ldr r2, .L130 + 1341 0004 9368 ldr r3, [r2, #8] + 1342 .LVL111: + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1343 .loc 1 830 3 is_stmt 1 view .LVU386 + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1344 .loc 1 830 12 is_stmt 0 view .LVU387 + 1345 0006 1268 ldr r2, [r2] + 1346 .LVL112: + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccnKkcg2.s page 43 + + + 1347 .loc 1 833 3 is_stmt 1 view .LVU388 + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1348 .loc 1 833 5 is_stmt 0 view .LVU389 + 1349 0008 D907 lsls r1, r3, #31 + 1350 000a 01D5 bpl .L109 + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1351 .loc 1 833 49 discriminator 1 view .LVU390 + 1352 000c D107 lsls r1, r2, #31 + 1353 000e 20D4 bmi .L127 + 1354 .L109: + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1355 .loc 1 842 8 is_stmt 1 view .LVU391 + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1356 .loc 1 842 10 is_stmt 0 view .LVU392 + 1357 0010 9907 lsls r1, r3, #30 + 1358 0012 01D5 bpl .L111 + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1359 .loc 1 842 56 discriminator 1 view .LVU393 + 1360 0014 9107 lsls r1, r2, #30 + 1361 0016 22D4 bmi .L128 + 1362 .L111: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1363 .loc 1 851 8 is_stmt 1 view .LVU394 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1364 .loc 1 851 10 is_stmt 0 view .LVU395 + 1365 0018 1907 lsls r1, r3, #28 + 1366 001a 01D5 bpl .L112 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1367 .loc 1 851 53 discriminator 1 view .LVU396 + 1368 001c 1107 lsls r1, r2, #28 + 1369 001e 24D4 bmi .L129 + 1370 .L112: + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1371 .loc 1 862 5 is_stmt 1 view .LVU397 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1372 .loc 1 862 7 is_stmt 0 view .LVU398 + 1373 0020 5907 lsls r1, r3, #29 + 1374 0022 1BD5 bpl .L108 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1375 .loc 1 862 48 discriminator 1 view .LVU399 + 1376 0024 5207 lsls r2, r2, #29 + 1377 0026 19D5 bpl .L108 + 1378 .LVL113: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1379 .loc 1 864 7 is_stmt 1 view .LVU400 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1380 .loc 1 864 19 is_stmt 0 view .LVU401 + 1381 0028 8022 movs r2, #128 + 1382 002a 5200 lsls r2, r2, #1 + 1383 002c 1800 movs r0, r3 + 1384 002e 1040 ands r0, r2 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1385 .loc 1 864 9 view .LVU402 + 1386 0030 1342 tst r3, r2 + 1387 0032 00D0 beq .L113 + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1388 .loc 1 866 18 view .LVU403 + ARM GAS /tmp/ccnKkcg2.s page 44 + + + 1389 0034 0820 movs r0, #8 + 1390 .L113: + 1391 .LVL114: + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1392 .loc 1 868 7 is_stmt 1 view .LVU404 + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1393 .loc 1 868 9 is_stmt 0 view .LVU405 + 1394 0036 9A05 lsls r2, r3, #22 + 1395 0038 01D5 bpl .L114 + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1396 .loc 1 870 9 is_stmt 1 view .LVU406 + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1397 .loc 1 870 18 is_stmt 0 view .LVU407 + 1398 003a 1022 movs r2, #16 + 1399 003c 1043 orrs r0, r2 + 1400 .LVL115: + 1401 .L114: + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1402 .loc 1 872 7 is_stmt 1 view .LVU408 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1403 .loc 1 872 9 is_stmt 0 view .LVU409 + 1404 003e 5B05 lsls r3, r3, #21 + 1405 0040 01D5 bpl .L115 + 1406 .LVL116: + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1407 .loc 1 874 9 is_stmt 1 view .LVU410 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1408 .loc 1 874 18 is_stmt 0 view .LVU411 + 1409 0042 2023 movs r3, #32 + 1410 0044 1843 orrs r0, r3 + 1411 .LVL117: + 1412 .L115: + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1413 .loc 1 878 7 is_stmt 1 view .LVU412 + 1414 0046 0C4B ldr r3, .L130 + 1415 0048 0422 movs r2, #4 + 1416 004a DA60 str r2, [r3, #12] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1417 .loc 1 881 7 view .LVU413 + 1418 004c FFF7FEFF bl HAL_RCCEx_CRS_ErrorCallback + 1419 .LVL118: + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1420 .loc 1 884 1 is_stmt 0 view .LVU414 + 1421 0050 04E0 b .L108 + 1422 .LVL119: + 1423 .L127: + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1424 .loc 1 836 5 is_stmt 1 view .LVU415 + 1425 0052 094B ldr r3, .L130 + 1426 .LVL120: + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1427 .loc 1 836 5 is_stmt 0 view .LVU416 + 1428 0054 0122 movs r2, #1 + 1429 .LVL121: + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1430 .loc 1 836 5 view .LVU417 + 1431 0056 DA60 str r2, [r3, #12] + ARM GAS /tmp/ccnKkcg2.s page 45 + + + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1432 .loc 1 839 5 is_stmt 1 view .LVU418 + 1433 0058 FFF7FEFF bl HAL_RCCEx_CRS_SyncOkCallback + 1434 .LVL122: + 1435 .L108: + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1436 .loc 1 884 1 is_stmt 0 view .LVU419 + 1437 @ sp needed + 1438 005c 10BD pop {r4, pc} + 1439 .LVL123: + 1440 .L128: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1441 .loc 1 845 5 is_stmt 1 view .LVU420 + 1442 005e 064B ldr r3, .L130 + 1443 .LVL124: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1444 .loc 1 845 5 is_stmt 0 view .LVU421 + 1445 0060 0222 movs r2, #2 + 1446 .LVL125: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1447 .loc 1 845 5 view .LVU422 + 1448 0062 DA60 str r2, [r3, #12] + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1449 .loc 1 848 5 is_stmt 1 view .LVU423 + 1450 0064 FFF7FEFF bl HAL_RCCEx_CRS_SyncWarnCallback + 1451 .LVL126: + 1452 0068 F8E7 b .L108 + 1453 .LVL127: + 1454 .L129: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1455 .loc 1 854 5 view .LVU424 + 1456 006a 034B ldr r3, .L130 + 1457 .LVL128: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1458 .loc 1 854 5 is_stmt 0 view .LVU425 + 1459 006c 0822 movs r2, #8 + 1460 .LVL129: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1461 .loc 1 854 5 view .LVU426 + 1462 006e DA60 str r2, [r3, #12] + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1463 .loc 1 857 5 is_stmt 1 view .LVU427 + 1464 0070 FFF7FEFF bl HAL_RCCEx_CRS_ExpectedSyncCallback + 1465 .LVL130: + 1466 0074 F2E7 b .L108 + 1467 .L131: + 1468 0076 C046 .align 2 + 1469 .L130: + 1470 0078 006C0040 .word 1073769472 + 1471 .cfi_endproc + 1472 .LFE47: + 1474 .text + 1475 .Letext0: + 1476 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1477 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1478 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 1479 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + ARM GAS /tmp/ccnKkcg2.s page 46 + + + 1480 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1481 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h" + 1482 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + 1483 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccnKkcg2.s page 47 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_rcc_ex.c + /tmp/ccnKkcg2.s:19 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t + /tmp/ccnKkcg2.s:25 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig + /tmp/ccnKkcg2.s:327 .text.HAL_RCCEx_PeriphCLKConfig:00000130 $d + /tmp/ccnKkcg2.s:337 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t + /tmp/ccnKkcg2.s:343 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig + /tmp/ccnKkcg2.s:406 .text.HAL_RCCEx_GetPeriphCLKConfig:0000003c $d + /tmp/ccnKkcg2.s:415 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t + /tmp/ccnKkcg2.s:421 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq + /tmp/ccnKkcg2.s:841 .text.HAL_RCCEx_GetPeriphCLKFreq:00000194 $d + /tmp/ccnKkcg2.s:850 .text.HAL_RCCEx_CRSConfig:00000000 $t + /tmp/ccnKkcg2.s:856 .text.HAL_RCCEx_CRSConfig:00000000 HAL_RCCEx_CRSConfig + /tmp/ccnKkcg2.s:934 .text.HAL_RCCEx_CRSConfig:00000044 $d + /tmp/ccnKkcg2.s:942 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:00000000 $t + /tmp/ccnKkcg2.s:948 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:00000000 HAL_RCCEx_CRSSoftwareSynchronizationGenerate + /tmp/ccnKkcg2.s:967 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000c $d + /tmp/ccnKkcg2.s:972 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000000 $t + /tmp/ccnKkcg2.s:978 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000000 HAL_RCCEx_CRSGetSynchronizationInfo + /tmp/ccnKkcg2.s:1027 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000028 $d + /tmp/ccnKkcg2.s:1032 .text.HAL_RCCEx_CRSWaitSynchronization:00000000 $t + /tmp/ccnKkcg2.s:1038 .text.HAL_RCCEx_CRSWaitSynchronization:00000000 HAL_RCCEx_CRSWaitSynchronization + /tmp/ccnKkcg2.s:1233 .text.HAL_RCCEx_CRSWaitSynchronization:00000098 $d + /tmp/ccnKkcg2.s:1238 .text.HAL_RCCEx_CRS_SyncOkCallback:00000000 $t + /tmp/ccnKkcg2.s:1244 .text.HAL_RCCEx_CRS_SyncOkCallback:00000000 HAL_RCCEx_CRS_SyncOkCallback + /tmp/ccnKkcg2.s:1258 .text.HAL_RCCEx_CRS_SyncWarnCallback:00000000 $t + /tmp/ccnKkcg2.s:1264 .text.HAL_RCCEx_CRS_SyncWarnCallback:00000000 HAL_RCCEx_CRS_SyncWarnCallback + /tmp/ccnKkcg2.s:1278 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:00000000 $t + /tmp/ccnKkcg2.s:1284 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:00000000 HAL_RCCEx_CRS_ExpectedSyncCallback + /tmp/ccnKkcg2.s:1298 .text.HAL_RCCEx_CRS_ErrorCallback:00000000 $t + /tmp/ccnKkcg2.s:1304 .text.HAL_RCCEx_CRS_ErrorCallback:00000000 HAL_RCCEx_CRS_ErrorCallback + /tmp/ccnKkcg2.s:1320 .text.HAL_RCCEx_CRS_IRQHandler:00000000 $t + /tmp/ccnKkcg2.s:1326 .text.HAL_RCCEx_CRS_IRQHandler:00000000 HAL_RCCEx_CRS_IRQHandler + /tmp/ccnKkcg2.s:1470 .text.HAL_RCCEx_CRS_IRQHandler:00000078 $d + +UNDEFINED SYMBOLS +HAL_GetTick +__aeabi_uidiv +HAL_RCC_GetPCLK1Freq +HAL_RCC_GetSysClockFreq diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o b/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o new file mode 100644 index 0000000000000000000000000000000000000000..6cedc0dbb6198a8db60b141b13c0cef5329744a0 GIT binary patch literal 15268 zcmd5@dw5&Lm7lp+SCS>imMuH+E6MdEFNozwOqz!Sj+KXBNsR44NT7}^%a#&ZHjxplml=*wS{(mO`K@?`?r~AnpR;+b`Wx3|&47bPFs?oBf@+Bl${k z`q=$vC*1p+^O$qa%$%7!_gY-Lx@`^ToFxip^VuZD*uIN|M5_}ppUq=)+0dicf7im) z;AwT~cvI`?&}r6vYEA2#p^?&N&Eb91cRJ*3;0O6(KBuv@ICxs?7{8>oXxoYM!z_mt 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zyF>I9+GEsxJw4ID4r7K54nD7kL$SD=b*UAlPcbR1Xr%ufwJ`m~Um8X(G5io=fIbA8 z&G$up15jGovCiX*$D^U1;W!Nc`GxikY<+m^G77CbbHTC~r4)D4!}1p;U5{i`@MsWc z(?6w0`(CihQLn&7I&|4_(LQOmw--bkc!`p*w-XGr z-isjUy)sb}dNhV+znK>rdvyi)*xHhQ520?hH-wINftM%=d*27ctVjE(E1?8T==~~9 zkACe_u`Q|i(9ElaaE3ImC`hd5cM^SasZ zedp1;K27iFdGsDi(|h1NdMDHL9)#Xr3QQJ|qPz?}bAQ{=UmcPPT=b4adeqZCUV&#rr5 zFHsV*Ea;j2-hc&jGnB|L9$!hnbJOg7$IaNTgfU>kURj#G%o^hiLH6hiP-0w`rrDc| zPWDY<@1it&ag#mTQxf*prP*-U-C(X5UR;Ce-2|Gq9H(>*~p#?7mW$n$x^U@FInstance)); + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->Base_MspInitCallback == NULL) + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback(htim); + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_Base_MspInit(htim); + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Time Base configuration */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM Base peripheral + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim) + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->Base_MspDeInitCallback == NULL) + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback(htim); + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_Base_MspDeInit(htim); + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM channels state */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Base MSP. + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/cchCqftX.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_Base_MspInit could be implemented in the user file + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM Base MSP. + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_Base_MspDeInit could be implemented in the user file + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Base generation. + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM state */ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State != HAL_TIM_STATE_READY) + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + ARM GAS /tmp/cchCqftX.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Base generation. + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim) + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Base generation in interrupt mode. + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM state */ + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State != HAL_TIM_STATE_READY) + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Update interrupt */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Base generation in interrupt mode. + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Update interrupt */ + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Base generation in DMA mode. + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData The source Buffer address. + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to peripheral. + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, const uint32_t *pData, uint16_t L + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_BUSY) + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_READY) + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->A + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Update DMA request */ + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE); + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Base generation in DMA mode. + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Update DMA request */ + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE); + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group2 TIM Output Compare functions + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Output Compare functions + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM Output Compare functions ##### + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM Output Compare. + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM Output Compare. + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Output Compare. + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Output Compare. + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Output Compare and enable interrupt. + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Output Compare and disable interrupt. + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Output Compare and enable DMA transfer. + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Output Compare and disable DMA transfer. + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Output Compare according to the specified + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init() + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim) + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + ARM GAS /tmp/cchCqftX.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->OC_MspInitCallback == NULL) + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback(htim); + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_MspInit(htim); + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the base time for the Output Compare */ + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim) + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->OC_MspDeInitCallback == NULL) + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback(htim); + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_MspDeInit(htim); + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM channels state */ + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Output Compare MSP. + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OC_MspInit could be implemented in the user file + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM Output Compare MSP. + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/cchCqftX.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OC_MspDeInit could be implemented in the user file + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation. + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be enabled + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Output compare channel */ + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 16 + + + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation. + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be disabled + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Output compare channel */ + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation in interrupt mode. + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be enabled + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + ARM GAS /tmp/cchCqftX.s page 17 + + + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Output compare channel */ + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + ARM GAS /tmp/cchCqftX.s page 18 + + + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation in interrupt mode. + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be disabled + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: + ARM GAS /tmp/cchCqftX.s page 19 + + +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Output compare channel */ +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation in DMA mode. +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be enabled +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData The source Buffer address. +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *p +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint16_t Length) +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) + ARM GAS /tmp/cchCqftX.s page 20 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ + ARM GAS /tmp/cchCqftX.s page 21 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance-> +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 22 + + +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Output compare channel */ +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation in DMA mode. +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be disabled +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + ARM GAS /tmp/cchCqftX.s page 23 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Output compare channel */ +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group3 TIM PWM functions +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM PWM functions +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + ARM GAS /tmp/cchCqftX.s page 24 + + +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM PWM functions ##### +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM PWM. +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM PWM. +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM PWM. +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM PWM. +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM PWM and enable interrupt. +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM PWM and disable interrupt. +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM PWM and enable DMA transfer. +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM PWM and disable DMA transfer. +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM PWM Time Base according to the specified +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->PWM_MspInitCallback == NULL) +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + ARM GAS /tmp/cchCqftX.s page 25 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback(htim); +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_MspInit(htim); +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the base time for the PWM */ +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim) +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->PWM_MspDeInitCallback == NULL) +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback(htim); +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_MspDeInit(htim); +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM channels state */ + ARM GAS /tmp/cchCqftX.s page 26 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM PWM MSP. +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PWM_MspInit could be implemented in the user file +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM PWM MSP. +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim) +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PWM_MspDeInit could be implemented in the user file +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the PWM signal generation. +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 27 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the PWM signal generation. +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare channel */ +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + ARM GAS /tmp/cchCqftX.s page 28 + + +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the PWM signal generation in interrupt mode. +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be enabled +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ + ARM GAS /tmp/cchCqftX.s page 29 + + +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the PWM signal generation in interrupt mode. +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled + ARM GAS /tmp/cchCqftX.s page 30 + + +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare channel */ +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ + ARM GAS /tmp/cchCqftX.s page 31 + + +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM PWM signal generation in DMA mode. +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData The source Buffer address. +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t * +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint16_t Length) +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 32 + + +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + ARM GAS /tmp/cchCqftX.s page 33 + + +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Output Capture/Compare 3 request */ +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance-> +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 34 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM PWM signal generation in DMA mode. +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + ARM GAS /tmp/cchCqftX.s page 35 + + +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare channel */ +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group4 TIM Input Capture functions +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Input Capture functions +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM Input Capture functions ##### +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM Input Capture. +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM Input Capture. +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Input Capture. +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Input Capture. +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Input Capture and enable interrupt. +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Input Capture and disable interrupt. +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Input Capture and enable DMA transfer. +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Input Capture and disable DMA transfer. +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Input Capture Time base according to the specified + ARM GAS /tmp/cchCqftX.s page 36 + + +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init() +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->IC_MspInitCallback == NULL) +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback(htim); +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_MspInit(htim); +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the base time for the input capture */ +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 37 + + +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim) +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->IC_MspDeInitCallback == NULL) +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback(htim); +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_MspDeInit(htim); +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM channels state */ +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Input Capture MSP. +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/cchCqftX.s page 38 + + +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_IC_MspInit could be implemented in the user file +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM Input Capture MSP. +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim) +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_IC_MspDeInit could be implemented in the user file +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement. +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_state != HAL_TIM_CHANNEL_STATE_READY) +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Input Capture channel */ +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + ARM GAS /tmp/cchCqftX.s page 39 + + +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement. +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channel */ +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement in interrupt mode. +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + ARM GAS /tmp/cchCqftX.s page 40 + + +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_state != HAL_TIM_CHANNEL_STATE_READY) +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 41 + + +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Input Capture channel */ +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement in interrupt mode. +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 42 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channel */ +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement in DMA mode. +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData The destination Buffer address. +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); + ARM GAS /tmp/cchCqftX.s page 43 + + +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_state == HAL_TIM_CHANNEL_STATE_BUSY) +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if ((channel_state == HAL_TIM_CHANNEL_STATE_READY) +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Input Capture channel */ +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + ARM GAS /tmp/cchCqftX.s page 44 + + +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)p +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +2469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)p +2479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +2480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 45 + + +2484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +2490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement in DMA mode. +2514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); +2530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channel */ +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +2537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +2539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + ARM GAS /tmp/cchCqftX.s page 46 + + +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +2547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +2549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +2553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +2561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 DMA request */ +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +2565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +2574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group5 TIM One Pulse functions +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM One Pulse functions +2592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +2595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM One Pulse functions ##### +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +2597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + ARM GAS /tmp/cchCqftX.s page 47 + + +2598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM One Pulse. +2600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM One Pulse. +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM One Pulse. +2602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM One Pulse. +2603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM One Pulse and enable interrupt. +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM One Pulse and disable interrupt. +2605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM One Pulse and enable DMA transfer. +2606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM One Pulse and disable DMA transfer. +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +2609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +2610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM One Pulse Time Base according to the specified +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +2614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +2615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +2616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +2617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_OnePulse_DeInit() before HAL_TIM_OnePulse_Init() +2618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note When the timer instance is initialized in One Pulse mode, timer +2619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * channels 1 and channel 2 are reserved and cannot be used for other +2620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * purpose. +2621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OnePulseMode Select the One pulse mode. +2623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated. +2625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated. +2626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) +2632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_MODE(OnePulseMode)); +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +2642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +2645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +2648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); +2652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->OnePulse_MspInitCallback == NULL) +2654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 48 + + +2655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; +2656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +2658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback(htim); +2659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +2660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OnePulse_MspInit(htim); +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Time base in the One Pulse Mode */ +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the OPM Bit */ +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CR1 &= ~TIM_CR1_OPM; +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the OPM Mode */ +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CR1 |= OnePulseMode; +2676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +2679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ +2681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +2688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM One Pulse +2694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim) +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->OnePulse_MspDeInitCallback == NULL) +2709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +2711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 49 + + +2712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ +2713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback(htim); +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +2715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OnePulse_MspDeInit(htim); +2717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +2721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +2725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +2727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +2730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM One Pulse MSP. +2739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim) +2743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +2746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OnePulse_MspInit could be implemented in the user file +2749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM One Pulse MSP. +2754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +2756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) +2758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +2761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file +2764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM One Pulse signal generation. + ARM GAS /tmp/cchCqftX.s page 50 + + +2769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel See note above +2775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(OutputChannel); +2786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channels state */ +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +2790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +2792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare and the Input Capture channels +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2 +2804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** No need to enable the counter, it's enabled automatically by hardware +2809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (the counter starts in response to a stimulus and generate a pulse */ +2810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +2812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +2813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +2818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM One Pulse signal generation. + ARM GAS /tmp/cchCqftX.s page 51 + + +2826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel See note above +2832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(OutputChannel); +2838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare and the Input Capture channels +2840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) +2841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ +2844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +2847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +2852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM One Pulse signal generation in interrupt mode. +2869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel See note above +2875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + ARM GAS /tmp/cchCqftX.s page 52 + + +2883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(OutputChannel); +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channels state */ +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +2892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare and the Input Capture channels +2903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2 +2904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** No need to enable the counter, it's enabled automatically by hardware +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (the counter starts in response to a stimulus and generate a pulse */ +2910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +2916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +2918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +2924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM One Pulse signal generation in interrupt mode. +2932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel See note above +2938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + ARM GAS /tmp/cchCqftX.s page 53 + + +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(OutputChannel); +2944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +2947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +2949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare and the Input Capture channels +2952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) +2953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +2957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +2958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +2963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group6 TIM Encoder functions +2983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Encoder functions +2984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +2985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +2986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +2987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM Encoder functions ##### +2988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +2989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +2990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +2991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM Encoder. +2992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM Encoder. +2993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Encoder. +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Encoder. +2995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Encoder and enable interrupt. +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Encoder and disable interrupt. + ARM GAS /tmp/cchCqftX.s page 54 + + +2997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Encoder and enable DMA transfer. +2998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Encoder and disable DMA transfer. +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +3002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Encoder Interface and initialize the associated handle. +3005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +3006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +3007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +3008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_Encoder_DeInit() before HAL_TIM_Encoder_Init() +3009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Encoder mode and External clock mode 2 are not compatible and must not be selected toge +3010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: A call for @ref HAL_TIM_Encoder_Init will erase the settings of @ref HAL_TIM_Config +3011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * using TIM_CLOCKSOURCE_ETRMODE2 and vice versa +3012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note When the timer instance is initialized in Encoder mode, timer +3013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * channels 1 and channel 2 are reserved and cannot be used for other +3014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * purpose. +3015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM Encoder Interface configuration structure +3017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sCon +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +3022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; +3024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) +3027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity)); +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity)); +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); +3042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); +3043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +3051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ + ARM GAS /tmp/cchCqftX.s page 55 + + +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->Encoder_MspInitCallback == NULL) +3057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; +3059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback(htim); +3062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_Encoder_MspInit(htim); +3065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +3070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the SMS and ECE bits */ +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); +3073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Time base in the Encoder Mode */ +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +3076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +3079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; +3082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = htim->Instance->CCER; +3085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the encoder Mode */ +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= sConfig->EncoderMode; +3088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Capture Compare 1 and the Capture Compare 2 as input */ +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); +3092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ +3094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); +3098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TI1 and the TI2 Polarities */ +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); +3103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +3106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 = tmpccmr1; +3109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ + ARM GAS /tmp/cchCqftX.s page 56 + + +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER = tmpccer; +3112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +3115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +3117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM Encoder interface +3131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim) +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +3138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->Encoder_MspDeInitCallback == NULL) +3146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +3148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback(htim); +3151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_Encoder_MspDeInit(htim); +3154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +3158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +3160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +3161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +3162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +3164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +3167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 57 + + +3168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +3170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Encoder Interface MSP. +3176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +3178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim) +3180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +3182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +3183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +3185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_Encoder_MspInit could be implemented in the user file +3186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM Encoder Interface MSP. +3191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +3193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim) +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +3197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +3198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +3200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_Encoder_MspDeInit could be implemented in the user file +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface. +3206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ + ARM GAS /tmp/cchCqftX.s page 58 + + +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) +3229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the encoder interface channels */ +3270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +3271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +3279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 59 + + +3282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +3285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface. +3300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +3316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +3324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +3330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + ARM GAS /tmp/cchCqftX.s page 60 + + +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface in interrupt mode. +3360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) +3383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + ARM GAS /tmp/cchCqftX.s page 61 + + +3396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the encoder interface channels */ +3424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the capture compare Interrupts 1 and/or 2 */ +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +3435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +3442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +3446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +3447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + ARM GAS /tmp/cchCqftX.s page 62 + + +3453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface in interrupt mode. +3460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +3462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare Interrupts 1 */ +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +3481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare Interrupts 2 */ +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +3488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare Interrupts 1 and 2 */ +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +3496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +3497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 63 + + +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface in DMA mode. +3522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData1 The destination Buffer address for IC1. +3529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData2 The destination Buffer address for IC2. +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. +3531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pD +3534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t *pData2, uint16_t Length) +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +3551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) +3554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData1 == NULL) || (Length == 0U)) +3556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 64 + + +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) +3573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +3576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if ((channel_2_state == HAL_TIM_CHANNEL_STATE_READY) +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData2 == NULL) || (Length == 0U)) +3581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) +3599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +3603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) +3608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((((pData1 == NULL) || (pData2 == NULL))) || (Length == 0U)) +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + ARM GAS /tmp/cchCqftX.s page 65 + + +3624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +3628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +3630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +3637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +3640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +3641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +3647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +3649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +3658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError; +3665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +3668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +3674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +3676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 66 + + +3681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +3685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +3692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +3695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +3696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +3707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +3710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +3711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +3713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +3718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +3720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface in DMA mode. + ARM GAS /tmp/cchCqftX.s page 67 + + +3738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare DMA Request 1 */ +3758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare DMA Request 2 */ +3766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +3768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare DMA Request 1 and 2 */ +3775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +3776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +3779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/cchCqftX.s page 68 + + +3795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +3804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management +3806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM IRQ handler management +3807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +3808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +3810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### IRQ handler management ##### +3811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +3812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +3813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides Timer IRQ handler function. +3814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +3816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +3817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief This function handles TIM interrupts requests. +3820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +3822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t itsource = htim->Instance->DIER; +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t itflag = htim->Instance->SR; +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 1 event */ +3829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) +3830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +3836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) +3839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Output compare event */ +3847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); + ARM GAS /tmp/cchCqftX.s page 69 + + +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 2 event */ +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) +3863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); +3867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) +3870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Output compare event */ +3878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 3 event */ +3892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) +3893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +3898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) +3900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Output compare event */ +3908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + ARM GAS /tmp/cchCqftX.s page 70 + + +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 4 event */ +3922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) +3925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +3928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) +3930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Output compare event */ +3938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TIM Update event */ +3952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) +3953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) +3955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedCallback(htim); +3959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PeriodElapsedCallback(htim); +3961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TIM Break input event */ +3965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) + ARM GAS /tmp/cchCqftX.s page 71 + + +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) +3968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK); +3970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->BreakCallback(htim); +3972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIMEx_BreakCallback(htim); +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TIM Trigger detection event */ +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) +3979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); +3983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerCallback(htim); +3985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_TriggerCallback(htim); +3987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TIM commutation event */ +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) +3992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) +3994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); +3996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationCallback(htim); +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIMEx_CommutCallback(htim); +4000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +4001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +4007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group8 TIM Peripheral Control functions +4010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Peripheral Control functions +4011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +4014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### Peripheral Control functions ##### +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +4016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +4017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure External Clock source. +4020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure Complementary channels, break features and dead time. +4021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure Master and the Slave synchronization. +4022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure the DMA Burst Mode. + ARM GAS /tmp/cchCqftX.s page 72 + + +4023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +4025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +4026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Output Compare Channels according to the specified +4030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_OC_InitTypeDef. +4031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle +4032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM Output Compare configuration structure +4033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to configure +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_OC_InitTypeDef *sConfig, +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t Channel) +4044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); +4051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +4054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +4056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the TIM Channel 1 in Output Compare */ +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, sConfig); +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +4068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the TIM Channel 2 in Output Compare */ +4073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, sConfig); +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + ARM GAS /tmp/cchCqftX.s page 73 + + +4080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the TIM Channel 3 in Output Compare */ +4083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC3_SetConfig(htim->Instance, sConfig); +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +4088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the TIM Channel 4 in Output Compare */ +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC4_SetConfig(htim->Instance, sConfig); +4094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +4103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Input Capture Channels according to the specified +4109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_IC_InitTypeDef. +4110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM IC handle +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM Input Capture configuration structure +4112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to configure +4113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConf +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); +4127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); +4130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +4133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +4135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TI1 Configuration */ + ARM GAS /tmp/cchCqftX.s page 74 + + +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_SetConfig(htim->Instance, +4138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); +4141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC1PSC Bits */ +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; +4144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the IC1PSC value */ +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->ICPrescaler; +4147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TI2 Configuration */ +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI2_SetConfig(htim->Instance, +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); +4157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC2PSC Bits */ +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; +4160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the IC2PSC value */ +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U); +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_3) +4165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TI3 Configuration */ +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI3_SetConfig(htim->Instance, +4170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC3PSC Bits */ +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; +4176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the IC3PSC value */ +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->ICPrescaler; +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_4) +4181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TI4 Configuration */ +4183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI4_SetConfig(htim->Instance, +4186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); +4189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC4PSC Bits */ +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; +4192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the IC4PSC value */ + ARM GAS /tmp/cchCqftX.s page 75 + + +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +4202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM PWM channels according to the specified +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_OC_InitTypeDef. +4209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +4210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM PWM configuration structure +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be configured +4212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_OC_InitTypeDef *sConfig, +4221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t Channel) +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); +4227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); +4228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); +4230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +4233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +4235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +4237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Channel 1 in PWM mode */ +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, sConfig); +4243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Preload enable bit for channel1 */ +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Output Fast mode */ +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 76 + + +4251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +4254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Channel 2 in PWM mode */ +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, sConfig); +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Preload enable bit for channel2 */ +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Output Fast mode */ +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +4271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Channel 3 in PWM mode */ +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC3_SetConfig(htim->Instance, sConfig); +4277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Preload enable bit for channel3 */ +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Output Fast mode */ +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; +4284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +4288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Channel 4 in PWM mode */ +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC4_SetConfig(htim->Instance, sConfig); +4294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Preload enable bit for channel4 */ +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Output Fast mode */ +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; +4301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 77 + + +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +4310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM One Pulse Channels according to the specified +4316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_OnePulse_InitTypeDef. +4317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +4318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM One Pulse configuration structure +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel TIM output channel to configure +4320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param InputChannel TIM input Channel to configure +4324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note To output a waveform with a minimum delay user can enable the fast +4328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * mode by calling the @ref __HAL_TIM_ENABLE_OCxFAST macro. Then CCx +4329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * output is forced in response to the edge detection on TIx input, +4330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * without taking in account the comparison. +4331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef +4334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t OutputChannel, uint32_t InputChannel) +4335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC_InitTypeDef temp1; +4338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(OutputChannel)); +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); +4342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (OutputChannel != InputChannel) +4344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Extract the Output compare configuration from sConfig structure */ +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCMode = sConfig->OCMode; +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; +4357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (OutputChannel) +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +4361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, &temp1); + ARM GAS /tmp/cchCqftX.s page 78 + + +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +4369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, &temp1); +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +4382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (InputChannel) +4384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +4386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); +4391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC1PSC Bits */ +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Trigger source */ +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Slave Mode */ +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +4406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); +4411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC2PSC Bits */ +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Trigger source */ +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Slave Mode */ +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + ARM GAS /tmp/cchCqftX.s page 79 + + +4422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +4434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral +4445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data write +4447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note This function should be used only when BurstLength is equal to DMA data transfer length + ARM GAS /tmp/cchCqftX.s page 80 + + +4479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, +4482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstRequestSrc, const uint32_t *BurstBuffer +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstLength) +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; +4486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, B +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); +4489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral +4497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data write +4499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param DataLength Data length. This parameter can be one value +4531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between 1 and 0xFFFF. +4532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddre +4535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstRequestSrc, const uint32_t *BurstB + ARM GAS /tmp/cchCqftX.s page 81 + + +4536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstLength, uint32_t DataLength) +4537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); +4546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY) +4548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY) +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((BurstBuffer == NULL) && (BurstLength > 0U)) +4554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY; +4560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) +4568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_UPDATE: +4570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; +4574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; +4577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, +4580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC1: +4588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 82 + + +4593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +4595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, +4598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC2: +4606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +4613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC3: +4624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +4631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, +4634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC4: +4642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +4649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 83 + + +4650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, +4652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_COM: +4660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA commutation callbacks */ +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +4664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; +4667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, +4670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_TRIGGER: +4678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA trigger callbacks */ +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; +4682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; +4685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, +4688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +4701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the DMA Burst Mode */ +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->DCR = (BurstBaseAddress | BurstLength); +4704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ +4705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); +4706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 84 + + +4707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +4709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM DMA Burst mode +4714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources to disable +4716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Abort the DMA transfer (at least disable the DMA channel) */ +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) +4727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_UPDATE: +4729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC1: +4734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC2: +4739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC3: +4744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC4: +4749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_COM: +4754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]); +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_TRIGGER: +4759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]); +4761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: + ARM GAS /tmp/cchCqftX.s page 85 + + +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +4769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Update DMA request */ +4771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); +4772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +4778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory +4783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data read +4785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note This function should be used only when BurstLength is equal to DMA data transfer length +4817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, +4820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint + ARM GAS /tmp/cchCqftX.s page 86 + + +4821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; +4823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, Bu +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); +4826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory +4833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data read +4835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param DataLength Data length. This parameter can be one value +4867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between 1 and 0xFFFF. +4868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddres +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstRequestSrc, uint32_t *BurstBuffer, +4872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstLength, uint32_t DataLength) +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); + ARM GAS /tmp/cchCqftX.s page 87 + + +4878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); +4881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); +4882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY) +4884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +4886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY) +4888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((BurstBuffer == NULL) && (BurstLength > 0U)) +4890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY; +4896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +4901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_UPDATE: +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; +4909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; +4912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_ +4915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC1: +4923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +4926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +4927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +4930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +4933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 88 + + +4935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC2: +4941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +4944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +4945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +4951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC3: +4959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +4963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +4966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC4: +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +4981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +4984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +4987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 89 + + +4992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_COM: +4995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA commutation callbacks */ +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +4998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (ui +5005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_TRIGGER: +5013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA trigger callbacks */ +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; +5020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32 +5023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +5024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +5026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +5036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the DMA Burst Mode */ +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->DCR = (BurstBaseAddress | BurstLength); +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +5045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +5046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + ARM GAS /tmp/cchCqftX.s page 90 + + +5049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stop the DMA burst reading +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources to disable. +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Abort the DMA transfer (at least disable the DMA channel) */ +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) +5063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_UPDATE: +5065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC1: +5070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC2: +5075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC3: +5080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC4: +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_COM: +5090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]); +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_TRIGGER: +5095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]); +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 91 + + +5106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Update DMA request */ +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); +5108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +5110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +5111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +5115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Generate a software event +5119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param EventSource specifies the event source. +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source +5124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source +5125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source +5126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source +5127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_COM: Timer COM event source +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source +5129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source +5130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Basic timers can only generate an update event. +5131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_EVENTSOURCE_COM is relevant only with advanced timer instances. +5132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_EVENTSOURCE_BREAK are relevant only for timer instances +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * supporting a break input. +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource) +5138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +5141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_EVENT_SOURCE(EventSource)); +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM state */ +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the event sources */ +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->EGR = EventSource; +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM state */ +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +5158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the OCRef clear feature + ARM GAS /tmp/cchCqftX.s page 92 + + +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that +5165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * contains the OCREF clear feature and parameters for the TIM peripheral. +5166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel specifies the TIM Channel +5167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +5170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +5171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_ClearInputConfigTypeDef *sClearInputConfig, +5176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t Channel) +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); +5182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); +5183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (sClearInputConfig->ClearInputSource) +5190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_NONE: +5192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Clear the OCREF clear selection bit and the the ETR Bits */ +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_OCCS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE +5195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_OCREFCLR: +5198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Clear the OCREF clear selection bit */ +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS); +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_ETR: +5205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); +5210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* When OCRef clear feature is used with ETR source, ETR prescaler must be off */ +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputPrescaler != TIM_CLEARINPUTPRESCALER_DIV1) +5213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, + ARM GAS /tmp/cchCqftX.s page 93 + + +5220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPolarity, +5222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputFilter); +5223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the OCREF clear selection bit */ +5225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS); +5226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +5235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +5237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +5239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 1 */ +5243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +5246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 1 */ +5248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); +5249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +5253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 2 */ +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); +5258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +5260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 2 */ +5262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); +5263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 3 */ +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); +5272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +5274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 3 */ +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); + ARM GAS /tmp/cchCqftX.s page 94 + + +5277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +5281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 4 */ +5285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); +5286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 4 */ +5290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the clock source to be used +5308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that +5310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * contains the clock source information for the TIM peripheral. +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef * +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +5317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); +5325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +5331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (sClockSourceConfig->ClockSource) +5333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 95 + + +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_INTERNAL: +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +5337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ETRMODE1: +5341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/ +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); +5344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check ETR input conditioning related parameters */ +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the ETR Clock source */ +5351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +5352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the External clock mode1 and the ETRF trigger */ +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); +5359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +5361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ETRMODE2: +5365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/ +5367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance)); +5368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check ETR input conditioning related parameters */ +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the ETR Clock source */ +5375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the External clock mode2 */ +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SMCR_ECE; +5381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI1: +5385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 */ +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check TI1 input conditioning related parameters */ +5390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + ARM GAS /tmp/cchCqftX.s page 96 + + +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +5394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); +5397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI2: +5401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/ +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check TI2 input conditioning related parameters */ +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI2_ConfigInputStage(htim->Instance, +5410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI1ED: +5417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 */ +5419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check TI1 input conditioning related parameters */ +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +5426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR0: +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR1: +5434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR2: +5435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR3: +5436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports internal trigger input */ +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); +5439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 97 + + +5448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Selects the signal connected to the TI1 input: direct from CH1_input +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * or a XOR combination between CH1_input, CH2_input & CH3_input +5458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle. +5459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TI1_Selection Indicate whether or not channel 1 is connected to the +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * output of a XOR gate. +5461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input +5463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3 +5464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * pins are connected to the TI1 input (XOR combination) +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection) +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = htim->Instance->CR2; +5477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the TI1 selection */ +5479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_TI1S; +5480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TI1 selection */ +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= TI1_Selection; +5483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMxCR2 */ +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CR2 = tmpcr2; +5486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +5488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the TIM in Slave mode +5492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle. +5493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that +5494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * contains the selected trigger (internal trigger input, filtered +5495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * timer input or external trigger input) and the Slave mode +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (Disable, Reset, Gated, Trigger, External clock mode 1). +5497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); +5503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); + ARM GAS /tmp/cchCqftX.s page 98 + + +5505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) +5511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable Trigger Interrupt */ +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); +5519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable Trigger DMA request */ +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); +5522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the TIM in Slave mode in interrupt mode +5532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle. +5533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that +5534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * contains the selected trigger (internal trigger input, filtered +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * timer input or external trigger input) and the Slave mode +5536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (Disable, Reset, Gated, Trigger, External clock mode 1). +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, +5540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig) +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); +5544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); +5546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) +5552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable Trigger Interrupt */ +5559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER); +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable Trigger DMA request */ + ARM GAS /tmp/cchCqftX.s page 99 + + +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); +5563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +5569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Read the captured value from Capture Compare unit +5573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle. +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +5575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +5578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +5580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval Captured value +5581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel) +5583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpreg = 0U; +5585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +5587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +5589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +5592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return the capture 1 value */ +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpreg = htim->Instance->CCR1; +5595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +5599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return the capture 2 value */ +5604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpreg = htim->Instance->CCR2; +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +5610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return the capture 3 value */ +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpreg = htim->Instance->CCR3; +5616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 100 + + +5619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +5621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +5624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return the capture 4 value */ +5626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpreg = htim->Instance->CCR4; +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return tmpreg; +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +5640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions +5643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Callbacks functions +5644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +5645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +5647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM Callbacks functions ##### +5648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +5649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +5650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides TIM callback functions: +5651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Period elapsed callback +5652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Output Compare callback +5653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Input capture callback +5654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Trigger callback +5655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Error callback +5656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +5658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Period elapsed callback in non-blocking mode +5663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PeriodElapsedCallback could be implemented in the user file +5673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 101 + + +5676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Period elapsed half complete callback in non-blocking mode +5678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *htim) +5682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PeriodElapsedHalfCpltCallback could be implemented in the user file +5688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Output Compare callback in non-blocking mode +5693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM OC handle +5694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) +5697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file +5703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Input Capture callback in non-blocking mode +5708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM IC handle +5709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) +5712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_IC_CaptureCallback could be implemented in the user file +5718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Input Capture half complete callback in non-blocking mode +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM IC handle +5724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *htim) +5727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_IC_CaptureHalfCpltCallback could be implemented in the user file + ARM GAS /tmp/cchCqftX.s page 102 + + +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief PWM Pulse finished callback in non-blocking mode +5738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) +5742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file +5748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief PWM Pulse finished half complete callback in non-blocking mode +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *htim) +5757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PWM_PulseFinishedHalfCpltCallback could be implemented in the user file +5763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Hall Trigger detection callback in non-blocking mode +5768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_TriggerCallback could be implemented in the user file +5778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Hall Trigger detection half complete callback in non-blocking mode +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *htim) +5787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + ARM GAS /tmp/cchCqftX.s page 103 + + +5790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_TriggerHalfCpltCallback could be implemented in the user file +5793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer error callback in non-blocking mode +5798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim) +5802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_ErrorCallback could be implemented in the user file +5808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +5812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Register a User TIM callback to be used instead of the weak predefined callback +5814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim tim handle +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param CallbackID ID of the callback to be registered +5816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPINIT_CB_ID Base MspInit Callback ID +5818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPDEINIT_CB_ID Base MspDeInit Callback ID +5819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPINIT_CB_ID IC MspInit Callback ID +5820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPDEINIT_CB_ID IC MspDeInit Callback ID +5821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPINIT_CB_ID OC MspInit Callback ID +5822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPDEINIT_CB_ID OC MspDeInit Callback ID +5823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPINIT_CB_ID PWM MspInit Callback ID +5824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID +5826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID +5827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPDEINIT_CB_ID Encoder MspDeInit Callback ID +5829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID Hall Sensor MspInit Callback ID +5830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID Hall Sensor MspDeInit Callback ID +5831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_CB_ID Period Elapsed Callback ID +5832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID Period Elapsed half complete Callback ID +5833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_CB_ID Trigger Callback ID +5834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_HALF_CB_ID Trigger half complete Callback ID +5835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_CB_ID Input Capture Callback ID +5836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_HALF_CB_ID Input Capture half complete Callback ID +5837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_DELAY_ELAPSED_CB_ID Output Compare Delay Elapsed Callback ID +5838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_CB_ID PWM Pulse Finished Callback ID +5839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID PWM Pulse Finished half complete Callb +5840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ERROR_CB_ID Error Callback ID +5841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_CB_ID Commutation Callback ID +5842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_HALF_CB_ID Commutation half complete Callback ID +5843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BREAK_CB_ID Break Callback ID +5844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pCallback pointer to the callback function +5845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval status +5846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + ARM GAS /tmp/cchCqftX.s page 104 + + +5847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef Callb +5848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** pTIM_CallbackTypeDef pCallback) +5849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (pCallback == NULL) +5853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_READY) +5858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (CallbackID) +5860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +5862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = pCallback; +5863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +5866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = pCallback; +5867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +5870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = pCallback; +5871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +5874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = pCallback; +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +5878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = pCallback; +5879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +5882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = pCallback; +5883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +5886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = pCallback; +5887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +5890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = pCallback; +5891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +5894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = pCallback; +5895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +5898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = pCallback; +5899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +5902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = pCallback; +5903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 105 + + +5904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +5906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = pCallback; +5907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +5910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspInitCallback = pCallback; +5911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +5914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = pCallback; +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_CB_ID : +5918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedCallback = pCallback; +5919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID : +5922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback = pCallback; +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_TRIGGER_CB_ID : +5926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerCallback = pCallback; +5927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_TRIGGER_HALF_CB_ID : +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerHalfCpltCallback = pCallback; +5931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_CB_ID : +5934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback = pCallback; +5935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_HALF_CB_ID : +5938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback = pCallback; +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_DELAY_ELAPSED_CB_ID : +5942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback = pCallback; +5943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_CB_ID : +5946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback = pCallback; +5947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID : +5950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback = pCallback; +5951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ERROR_CB_ID : +5954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->ErrorCallback = pCallback; +5955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_COMMUTATION_CB_ID : +5958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationCallback = pCallback; +5959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 106 + + +5961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_COMMUTATION_HALF_CB_ID : +5962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationHalfCpltCallback = pCallback; +5963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BREAK_CB_ID : +5966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->BreakCallback = pCallback; +5967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_RESET) +5976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (CallbackID) +5978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +5980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = pCallback; +5981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +5984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = pCallback; +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +5988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = pCallback; +5989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +5992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = pCallback; +5993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = pCallback; +5997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = pCallback; +6001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = pCallback; +6005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = pCallback; +6009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = pCallback; +6013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = pCallback; +6017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 107 + + +6018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = pCallback; +6021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = pCallback; +6025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspInitCallback = pCallback; +6029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = pCallback; +6033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +6036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Unregister a TIM callback +6052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * TIM callback is redirected to the weak predefined callback +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim tim handle +6054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param CallbackID ID of the callback to be unregistered +6055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +6056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPINIT_CB_ID Base MspInit Callback ID +6057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPDEINIT_CB_ID Base MspDeInit Callback ID +6058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPINIT_CB_ID IC MspInit Callback ID +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPDEINIT_CB_ID IC MspDeInit Callback ID +6060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPINIT_CB_ID OC MspInit Callback ID +6061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPDEINIT_CB_ID OC MspDeInit Callback ID +6062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPINIT_CB_ID PWM MspInit Callback ID +6063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID +6064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID +6065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID +6066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID +6067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPDEINIT_CB_ID Encoder MspDeInit Callback ID +6068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID Hall Sensor MspInit Callback ID +6069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID Hall Sensor MspDeInit Callback ID +6070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_CB_ID Period Elapsed Callback ID +6071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID Period Elapsed half complete Callback ID +6072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_CB_ID Trigger Callback ID +6073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_HALF_CB_ID Trigger half complete Callback ID +6074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_CB_ID Input Capture Callback ID + ARM GAS /tmp/cchCqftX.s page 108 + + +6075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_HALF_CB_ID Input Capture half complete Callback ID +6076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_DELAY_ELAPSED_CB_ID Output Compare Delay Elapsed Callback ID +6077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_CB_ID PWM Pulse Finished Callback ID +6078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID PWM Pulse Finished half complete Callb +6079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ERROR_CB_ID Error Callback ID +6080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_CB_ID Commutation Callback ID +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_HALF_CB_ID Commutation half complete Callback ID +6082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BREAK_CB_ID Break Callback ID +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval status +6084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef Cal +6086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +6088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_READY) +6090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (CallbackID) +6092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +6094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Base MspInit Callback */ +6095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; +6096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +6099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Base Msp DeInit Callback */ +6100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; +6101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +6104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Msp Init Callback */ +6105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +6106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +6109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Msp DeInit Callback */ +6110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +6111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +6114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Msp Init Callback */ +6115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Msp DeInit Callback */ +6120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Msp Init Callback */ +6125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Msp DeInit Callback */ +6130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 109 + + +6132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak One Pulse Msp Init Callback */ +6135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; +6136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak One Pulse Msp DeInit Callback */ +6140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +6141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Encoder Msp Init Callback */ +6145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; +6146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Encoder Msp DeInit Callback */ +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +6151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp Init Callback */ +6155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; +6156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp DeInit Callback */ +6160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; +6161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_CB_ID : +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Period Elapsed Callback */ +6165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID : +6169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Period Elapsed half complete Callback */ +6170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_TRIGGER_CB_ID : +6174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Trigger Callback */ +6175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerCallback = HAL_TIM_TriggerCallback; +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_TRIGGER_HALF_CB_ID : +6179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Trigger half complete Callback */ +6180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; +6181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_CB_ID : +6184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Capture Callback */ +6185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; +6186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_HALF_CB_ID : + ARM GAS /tmp/cchCqftX.s page 110 + + +6189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Capture half complete Callback */ +6190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_DELAY_ELAPSED_CB_ID : +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Delay Elapsed Callback */ +6195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_CB_ID : +6199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Pulse Finished Callback */ +6200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; +6201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID : +6204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Pulse Finished half complete Callback */ +6205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; +6206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ERROR_CB_ID : +6209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Error Callback */ +6210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->ErrorCallback = HAL_TIM_ErrorCallback; +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_COMMUTATION_CB_ID : +6214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Commutation Callback */ +6215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationCallback = HAL_TIMEx_CommutCallback; +6216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_COMMUTATION_HALF_CB_ID : +6219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Commutation half complete Callback */ +6220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BREAK_CB_ID : +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Break Callback */ +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->BreakCallback = HAL_TIMEx_BreakCallback; +6226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +6229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_RESET) +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (CallbackID) +6237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +6239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Base MspInit Callback */ +6240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +6244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Base Msp DeInit Callback */ +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; + ARM GAS /tmp/cchCqftX.s page 111 + + +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +6249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Msp Init Callback */ +6250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +6254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Msp DeInit Callback */ +6255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +6256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +6259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Msp Init Callback */ +6260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; +6261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Msp DeInit Callback */ +6265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; +6266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Msp Init Callback */ +6270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +6271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Msp DeInit Callback */ +6275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak One Pulse Msp Init Callback */ +6280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak One Pulse Msp DeInit Callback */ +6285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Encoder Msp Init Callback */ +6290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; +6291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Encoder Msp DeInit Callback */ +6295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp Init Callback */ +6300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; +6301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 112 + + +6303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp DeInit Callback */ +6305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; +6306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +6309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +6321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group10 TIM Peripheral State functions +6329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Peripheral State functions +6330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +6331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +6332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### Peripheral State functions ##### +6334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +6335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This subsection permits to get in run-time the status of the peripheral +6337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** and the data flow. +6338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +6340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM Base handle state. +6345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *htim) +6349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM OC handle state. +6355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(const TIM_HandleTypeDef *htim) +6359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 113 + + +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM PWM handle state. +6365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *htim) +6369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM Input Capture handle state. +6375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM IC handle +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *htim) +6379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM One Pulse Mode handle state. +6385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM OPM handle +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *htim) +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM Encoder Mode handle state. +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +6396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *htim) +6399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM Encoder Mode handle state. +6405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +6406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval Active channel +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *htim) +6409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->Channel; +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return actual state of the TIM channel. +6415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel + ARM GAS /tmp/cchCqftX.s page 114 + + +6417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +6418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +6419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +6420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +6422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 +6424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval TIM Channel state +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channe +6427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state; +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +6431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +6432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +6434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return channel_state; +6436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return actual state of a DMA burst operation. +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +6441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval DMA burst state +6442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim) +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); +6447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->DMABurstState; +6449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +6453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +6457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Private_Functions TIM Private Functions +6460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +6461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA error callback +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_DMAError(DMA_HandleTypeDef *hdma) +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 115 + + +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->ErrorCallback(htim); +6499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ErrorCallback(htim); +6501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Delay Pulse complete callback. +6508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma) +6512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/cchCqftX.s page 116 + + +6531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +6554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +6558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +6560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Delay Pulse half complete callback. +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma) +6571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 117 + + +6588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +6593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback(htim); +6597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedHalfCpltCallback(htim); +6599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Capture complete callback. +6606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma) +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 118 + + +6645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +6656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +6660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +6662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Capture half complete callback. +6669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *hdma) +6673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +6695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback(htim); +6699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureHalfCpltCallback(htim); +6701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + ARM GAS /tmp/cchCqftX.s page 119 + + +6702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Period Elapse complete callback. +6708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma) +6712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->hdma[TIM_DMA_ID_UPDATE]->Init.Mode == DMA_NORMAL) +6716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedCallback(htim); +6722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PeriodElapsedCallback(htim); +6724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Period Elapse half complete callback. +6729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *hdma) +6733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback(htim); +6738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PeriodElapsedHalfCpltCallback(htim); +6740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Trigger callback. +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma) +6749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->hdma[TIM_DMA_ID_TRIGGER]->Init.Mode == DMA_NORMAL) +6753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerCallback(htim); + ARM GAS /tmp/cchCqftX.s page 120 + + +6759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_TriggerCallback(htim); +6761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Trigger half complete callback. +6766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma) +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerHalfCpltCallback(htim); +6775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_TriggerHalfCpltCallback(htim); +6777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Time Base configuration +6782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx TIM peripheral +6783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Structure TIM Base configuration structure +6784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) +6787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr1; +6789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 = TIMx->CR1; +6790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set TIM Time Base Unit parameters ---------------------------------------*/ +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) +6793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Counter Mode */ +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); +6796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) +6800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the clock division */ +6802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 &= ~TIM_CR1_CKD; +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; +6804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the auto-reload preload */ +6807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); +6808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR1 = tmpcr1; +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Autoreload value */ +6812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->ARR = (uint32_t)Structure->Period ; +6813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Prescaler value */ +6815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->PSC = Structure->Prescaler; + ARM GAS /tmp/cchCqftX.s page 121 + + +6816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) +6818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Repetition Counter value */ +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->RCR = Structure->RepetitionCounter; +6821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Generate an update event to reload the Prescaler +6824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** and the repetition counter (only for advanced timer) value immediately */ +6825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->EGR = TIM_EGR_UG; +6826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ +6828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) +6829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Clear the update flag */ +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); +6832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer Output Compare 1 configuration +6837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +6838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OC_Config The output configuration structure +6839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +6842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 27 .loc 1 6842 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 .loc 1 6842 1 is_stmt 0 view .LVU1 + 32 0000 30B5 push {r4, r5, lr} + 33 .cfi_def_cfa_offset 12 + 34 .cfi_offset 4, -12 + 35 .cfi_offset 5, -8 + 36 .cfi_offset 14, -4 +6843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + 37 .loc 1 6843 3 is_stmt 1 view .LVU2 +6844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 38 .loc 1 6844 3 view .LVU3 +6845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 39 .loc 1 6845 3 view .LVU4 +6846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +6848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 40 .loc 1 6848 3 view .LVU5 + 41 .loc 1 6848 11 is_stmt 0 view .LVU6 + 42 0002 056A ldr r5, [r0, #32] + 43 .LVL1: +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +6851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; + 44 .loc 1 6851 3 is_stmt 1 view .LVU7 + 45 .loc 1 6851 7 is_stmt 0 view .LVU8 + 46 0004 036A ldr r3, [r0, #32] + 47 .loc 1 6851 14 view .LVU9 + ARM GAS /tmp/cchCqftX.s page 122 + + + 48 0006 0122 movs r2, #1 + 49 0008 9343 bics r3, r2 + 50 000a 0362 str r3, [r0, #32] +6852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +6854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 51 .loc 1 6854 3 is_stmt 1 view .LVU10 + 52 .loc 1 6854 10 is_stmt 0 view .LVU11 + 53 000c 4268 ldr r2, [r0, #4] + 54 .LVL2: +6855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +6857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx = TIMx->CCMR1; + 55 .loc 1 6857 3 is_stmt 1 view .LVU12 + 56 .loc 1 6857 12 is_stmt 0 view .LVU13 + 57 000e 8369 ldr r3, [r0, #24] + 58 .LVL3: +6858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare Mode Bits */ +6860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_OC1M; + 59 .loc 1 6860 3 is_stmt 1 view .LVU14 +6861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC1S; + 60 .loc 1 6861 3 view .LVU15 + 61 .loc 1 6861 12 is_stmt 0 view .LVU16 + 62 0010 7324 movs r4, #115 + 63 0012 A343 bics r3, r4 + 64 .LVL4: +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Output Compare Mode */ +6863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx |= OC_Config->OCMode; + 65 .loc 1 6863 3 is_stmt 1 view .LVU17 + 66 .loc 1 6863 24 is_stmt 0 view .LVU18 + 67 0014 0C68 ldr r4, [r1] + 68 .loc 1 6863 12 view .LVU19 + 69 0016 1C43 orrs r4, r3 + 70 .LVL5: +6864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Polarity level */ +6866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1P; + 71 .loc 1 6866 3 is_stmt 1 view .LVU20 + 72 .loc 1 6866 11 is_stmt 0 view .LVU21 + 73 0018 0223 movs r3, #2 + 74 001a 9D43 bics r5, r3 + 75 .LVL6: +6867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ +6868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= OC_Config->OCPolarity; + 76 .loc 1 6868 3 is_stmt 1 view .LVU22 + 77 .loc 1 6868 23 is_stmt 0 view .LVU23 + 78 001c 8B68 ldr r3, [r1, #8] + 79 .loc 1 6868 11 view .LVU24 + 80 001e 2B43 orrs r3, r5 + 81 .LVL7: +6869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) + 82 .loc 1 6870 3 is_stmt 1 view .LVU25 + 83 .loc 1 6870 6 is_stmt 0 view .LVU26 + 84 0020 124D ldr r5, .L6 + 85 0022 A842 cmp r0, r5 + ARM GAS /tmp/cchCqftX.s page 123 + + + 86 0024 05D0 beq .L2 + 87 .loc 1 6870 7 discriminator 1 view .LVU27 + 88 0026 124D ldr r5, .L6+4 + 89 0028 A842 cmp r0, r5 + 90 002a 02D0 beq .L2 + 91 .loc 1 6870 7 discriminator 2 view .LVU28 + 92 002c 114D ldr r5, .L6+8 + 93 002e A842 cmp r0, r5 + 94 0030 06D1 bne .L3 + 95 .L2: +6871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +6873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + 96 .loc 1 6873 5 is_stmt 1 view .LVU29 +6874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N Polarity level */ +6876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1NP; + 97 .loc 1 6876 5 view .LVU30 + 98 .loc 1 6876 13 is_stmt 0 view .LVU31 + 99 0032 0825 movs r5, #8 + 100 0034 AB43 bics r3, r5 + 101 .LVL8: + 102 .loc 1 6876 13 view .LVU32 + 103 0036 1D00 movs r5, r3 + 104 .LVL9: +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ +6878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= OC_Config->OCNPolarity; + 105 .loc 1 6878 5 is_stmt 1 view .LVU33 + 106 .loc 1 6878 25 is_stmt 0 view .LVU34 + 107 0038 CB68 ldr r3, [r1, #12] + 108 .LVL10: + 109 .loc 1 6878 13 view .LVU35 + 110 003a 2B43 orrs r3, r5 + 111 .LVL11: +6879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ +6880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1NE; + 112 .loc 1 6880 5 is_stmt 1 view .LVU36 + 113 .loc 1 6880 13 is_stmt 0 view .LVU37 + 114 003c 0425 movs r5, #4 + 115 003e AB43 bics r3, r5 + 116 .LVL12: + 117 .L3: +6881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 118 .loc 1 6883 3 is_stmt 1 view .LVU38 + 119 .loc 1 6883 6 is_stmt 0 view .LVU39 + 120 0040 0A4D ldr r5, .L6 + 121 0042 A842 cmp r0, r5 + 122 0044 05D0 beq .L4 + 123 .loc 1 6883 7 discriminator 1 view .LVU40 + 124 0046 0A4D ldr r5, .L6+4 + 125 0048 A842 cmp r0, r5 + 126 004a 02D0 beq .L4 + 127 .loc 1 6883 7 discriminator 2 view .LVU41 + 128 004c 094D ldr r5, .L6+8 + 129 004e A842 cmp r0, r5 + ARM GAS /tmp/cchCqftX.s page 124 + + + 130 0050 05D1 bne .L5 + 131 .L4: +6884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +6886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + 132 .loc 1 6886 5 is_stmt 1 view .LVU42 +6887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 133 .loc 1 6887 5 view .LVU43 +6888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +6890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS1; + 134 .loc 1 6890 5 view .LVU44 + 135 .LVL13: +6891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS1N; + 136 .loc 1 6891 5 view .LVU45 + 137 .loc 1 6891 12 is_stmt 0 view .LVU46 + 138 0052 094D ldr r5, .L6+12 + 139 0054 2A40 ands r2, r5 + 140 .LVL14: +6892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ +6893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= OC_Config->OCIdleState; + 141 .loc 1 6893 5 is_stmt 1 view .LVU47 + 142 .loc 1 6893 24 is_stmt 0 view .LVU48 + 143 0056 4D69 ldr r5, [r1, #20] + 144 .loc 1 6893 12 view .LVU49 + 145 0058 1543 orrs r5, r2 + 146 .LVL15: +6894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ +6895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= OC_Config->OCNIdleState; + 147 .loc 1 6895 5 is_stmt 1 view .LVU50 + 148 .loc 1 6895 24 is_stmt 0 view .LVU51 + 149 005a 8A69 ldr r2, [r1, #24] + 150 .loc 1 6895 12 view .LVU52 + 151 005c 2A43 orrs r2, r5 + 152 .LVL16: + 153 .L5: +6896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CR2 */ +6899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 154 .loc 1 6899 3 is_stmt 1 view .LVU53 + 155 .loc 1 6899 13 is_stmt 0 view .LVU54 + 156 005e 4260 str r2, [r0, #4] +6900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +6902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx; + 157 .loc 1 6902 3 is_stmt 1 view .LVU55 + 158 .loc 1 6902 15 is_stmt 0 view .LVU56 + 159 0060 8461 str r4, [r0, #24] +6903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare Register value */ +6905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCR1 = OC_Config->Pulse; + 160 .loc 1 6905 3 is_stmt 1 view .LVU57 + 161 .loc 1 6905 25 is_stmt 0 view .LVU58 + 162 0062 4A68 ldr r2, [r1, #4] + 163 .LVL17: + 164 .loc 1 6905 14 view .LVU59 + ARM GAS /tmp/cchCqftX.s page 125 + + + 165 0064 4263 str r2, [r0, #52] +6906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ +6908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 166 .loc 1 6908 3 is_stmt 1 view .LVU60 + 167 .loc 1 6908 14 is_stmt 0 view .LVU61 + 168 0066 0362 str r3, [r0, #32] +6909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 169 .loc 1 6909 1 view .LVU62 + 170 @ sp needed + 171 .LVL18: + 172 .loc 1 6909 1 view .LVU63 + 173 0068 30BD pop {r4, r5, pc} + 174 .L7: + 175 006a C046 .align 2 + 176 .L6: + 177 006c 002C0140 .word 1073818624 + 178 0070 00440140 .word 1073824768 + 179 0074 00480140 .word 1073825792 + 180 0078 FFFCFFFF .word -769 + 181 .cfi_endproc + 182 .LFE145: + 184 .section .text.TIM_OC3_SetConfig,"ax",%progbits + 185 .align 1 + 186 .syntax unified + 187 .code 16 + 188 .thumb_func + 190 TIM_OC3_SetConfig: + 191 .LVL19: + 192 .LFB147: +6910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer Output Compare 2 configuration +6913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +6914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OC_Config The output configuration structure +6915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +6918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; +6920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; +6921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; +6922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; +6925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +6930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = TIMx->CR2; +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +6933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx = TIMx->CCMR1; +6934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +6936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_OC2M; + ARM GAS /tmp/cchCqftX.s page 126 + + +6937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC2S; +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Output Compare Mode */ +6940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx |= (OC_Config->OCMode << 8U); +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Polarity level */ +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2P; +6944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 4U); +6946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) +6948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); +6950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N Polarity level */ +6952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2NP; +6953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCNPolarity << 4U); +6955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ +6956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2NE; +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) +6960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +6962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); +6964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +6966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS2; +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS2N; +6968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 2U); +6970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ +6971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCNIdleState << 2U); +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CR2 */ +6975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR2 = tmpcr2; +6976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +6978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx; +6979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare Register value */ +6981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCR2 = OC_Config->Pulse; +6982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ +6984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; +6985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer Output Compare 3 configuration +6989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +6990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OC_Config The output configuration structure +6991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) + ARM GAS /tmp/cchCqftX.s page 127 + + +6994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 193 .loc 1 6994 1 is_stmt 1 view -0 + 194 .cfi_startproc + 195 @ args = 0, pretend = 0, frame = 0 + 196 @ frame_needed = 0, uses_anonymous_args = 0 + 197 .loc 1 6994 1 is_stmt 0 view .LVU65 + 198 0000 30B5 push {r4, r5, lr} + 199 .cfi_def_cfa_offset 12 + 200 .cfi_offset 4, -12 + 201 .cfi_offset 5, -8 + 202 .cfi_offset 14, -4 +6995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + 203 .loc 1 6995 3 is_stmt 1 view .LVU66 +6996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 204 .loc 1 6996 3 view .LVU67 +6997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 205 .loc 1 6997 3 view .LVU68 +6998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 206 .loc 1 7000 3 view .LVU69 + 207 .loc 1 7000 11 is_stmt 0 view .LVU70 + 208 0002 046A ldr r4, [r0, #32] + 209 .LVL20: +7001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 3: Reset the CC2E Bit */ +7003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC3E; + 210 .loc 1 7003 3 is_stmt 1 view .LVU71 + 211 .loc 1 7003 7 is_stmt 0 view .LVU72 + 212 0004 036A ldr r3, [r0, #32] + 213 .loc 1 7003 14 view .LVU73 + 214 0006 164A ldr r2, .L13 + 215 0008 1340 ands r3, r2 + 216 000a 0362 str r3, [r0, #32] +7004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 217 .loc 1 7006 3 is_stmt 1 view .LVU74 + 218 .loc 1 7006 10 is_stmt 0 view .LVU75 + 219 000c 4268 ldr r2, [r0, #4] + 220 .LVL21: +7007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR2 register value */ +7009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx = TIMx->CCMR2; + 221 .loc 1 7009 3 is_stmt 1 view .LVU76 + 222 .loc 1 7009 12 is_stmt 0 view .LVU77 + 223 000e C369 ldr r3, [r0, #28] + 224 .LVL22: +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +7012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_OC3M; + 225 .loc 1 7012 3 is_stmt 1 view .LVU78 +7013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_CC3S; + 226 .loc 1 7013 3 view .LVU79 + 227 .loc 1 7013 12 is_stmt 0 view .LVU80 + 228 0010 7325 movs r5, #115 + 229 0012 AB43 bics r3, r5 + ARM GAS /tmp/cchCqftX.s page 128 + + + 230 .LVL23: +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Output Compare Mode */ +7015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx |= OC_Config->OCMode; + 231 .loc 1 7015 3 is_stmt 1 view .LVU81 + 232 .loc 1 7015 24 is_stmt 0 view .LVU82 + 233 0014 0D68 ldr r5, [r1] + 234 .loc 1 7015 12 view .LVU83 + 235 0016 1D43 orrs r5, r3 + 236 .LVL24: +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Polarity level */ +7018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3P; + 237 .loc 1 7018 3 is_stmt 1 view .LVU84 + 238 .loc 1 7018 11 is_stmt 0 view .LVU85 + 239 0018 124B ldr r3, .L13+4 + 240 001a 1C40 ands r4, r3 + 241 .LVL25: +7019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 8U); + 242 .loc 1 7020 3 is_stmt 1 view .LVU86 + 243 .loc 1 7020 24 is_stmt 0 view .LVU87 + 244 001c 8B68 ldr r3, [r1, #8] + 245 .loc 1 7020 37 view .LVU88 + 246 001e 1B02 lsls r3, r3, #8 + 247 .loc 1 7020 11 view .LVU89 + 248 0020 2343 orrs r3, r4 + 249 .LVL26: +7021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) + 250 .loc 1 7022 3 is_stmt 1 view .LVU90 + 251 .loc 1 7022 6 is_stmt 0 view .LVU91 + 252 0022 114C ldr r4, .L13+8 + 253 0024 A042 cmp r0, r4 + 254 0026 06D0 beq .L12 +7023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); +7025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N Polarity level */ +7027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3NP; +7028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ +7029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCNPolarity << 8U); +7030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ +7031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3NE; +7032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 255 .loc 1 7034 3 is_stmt 1 view .LVU92 + 256 .loc 1 7034 7 is_stmt 0 discriminator 1 view .LVU93 + 257 0028 104C ldr r4, .L13+12 + 258 002a A042 cmp r0, r4 + 259 002c 0AD0 beq .L10 + 260 .loc 1 7034 7 discriminator 2 view .LVU94 + 261 002e 104C ldr r4, .L13+16 + 262 0030 A042 cmp r0, r4 + 263 0032 0FD1 bne .L11 + 264 0034 06E0 b .L10 + 265 .L12: + ARM GAS /tmp/cchCqftX.s page 129 + + +7024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 266 .loc 1 7024 5 is_stmt 1 view .LVU95 +7027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 267 .loc 1 7027 5 view .LVU96 +7027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 268 .loc 1 7027 13 is_stmt 0 view .LVU97 + 269 0036 0F4C ldr r4, .L13+20 + 270 0038 1C40 ands r4, r3 + 271 .LVL27: +7029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 272 .loc 1 7029 5 is_stmt 1 view .LVU98 +7029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 273 .loc 1 7029 26 is_stmt 0 view .LVU99 + 274 003a CB68 ldr r3, [r1, #12] +7029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 275 .loc 1 7029 40 view .LVU100 + 276 003c 1B02 lsls r3, r3, #8 +7029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 277 .loc 1 7029 13 view .LVU101 + 278 003e 2343 orrs r3, r4 + 279 .LVL28: +7031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 280 .loc 1 7031 5 is_stmt 1 view .LVU102 +7031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 281 .loc 1 7031 13 is_stmt 0 view .LVU103 + 282 0040 0D4C ldr r4, .L13+24 + 283 0042 2340 ands r3, r4 + 284 .LVL29: + 285 .loc 1 7034 3 is_stmt 1 view .LVU104 + 286 .L10: +7035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +7037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + 287 .loc 1 7037 5 view .LVU105 +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 288 .loc 1 7038 5 view .LVU106 +7039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +7041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS3; + 289 .loc 1 7041 5 view .LVU107 +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS3N; + 290 .loc 1 7042 5 view .LVU108 + 291 .loc 1 7042 12 is_stmt 0 view .LVU109 + 292 0044 0D4C ldr r4, .L13+28 + 293 0046 2240 ands r2, r4 + 294 .LVL30: +7043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ +7044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 4U); + 295 .loc 1 7044 5 is_stmt 1 view .LVU110 + 296 .loc 1 7044 25 is_stmt 0 view .LVU111 + 297 0048 4C69 ldr r4, [r1, #20] + 298 .loc 1 7044 39 view .LVU112 + 299 004a 2401 lsls r4, r4, #4 + 300 .loc 1 7044 12 view .LVU113 + 301 004c 1443 orrs r4, r2 + 302 .LVL31: +7045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + ARM GAS /tmp/cchCqftX.s page 130 + + +7046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCNIdleState << 4U); + 303 .loc 1 7046 5 is_stmt 1 view .LVU114 + 304 .loc 1 7046 25 is_stmt 0 view .LVU115 + 305 004e 8A69 ldr r2, [r1, #24] + 306 .loc 1 7046 40 view .LVU116 + 307 0050 1201 lsls r2, r2, #4 + 308 .loc 1 7046 12 view .LVU117 + 309 0052 2243 orrs r2, r4 + 310 .LVL32: + 311 .L11: +7047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CR2 */ +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 312 .loc 1 7050 3 is_stmt 1 view .LVU118 + 313 .loc 1 7050 13 is_stmt 0 view .LVU119 + 314 0054 4260 str r2, [r0, #4] +7051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR2 */ +7053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR2 = tmpccmrx; + 315 .loc 1 7053 3 is_stmt 1 view .LVU120 + 316 .loc 1 7053 15 is_stmt 0 view .LVU121 + 317 0056 C561 str r5, [r0, #28] +7054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCR3 = OC_Config->Pulse; + 318 .loc 1 7056 3 is_stmt 1 view .LVU122 + 319 .loc 1 7056 25 is_stmt 0 view .LVU123 + 320 0058 4A68 ldr r2, [r1, #4] + 321 .LVL33: + 322 .loc 1 7056 14 view .LVU124 + 323 005a C263 str r2, [r0, #60] +7057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ +7059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 324 .loc 1 7059 3 is_stmt 1 view .LVU125 + 325 .loc 1 7059 14 is_stmt 0 view .LVU126 + 326 005c 0362 str r3, [r0, #32] +7060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 327 .loc 1 7060 1 view .LVU127 + 328 @ sp needed + 329 .LVL34: + 330 .loc 1 7060 1 view .LVU128 + 331 005e 30BD pop {r4, r5, pc} + 332 .L14: + 333 .align 2 + 334 .L13: + 335 0060 FFFEFFFF .word -257 + 336 0064 FFFDFFFF .word -513 + 337 0068 002C0140 .word 1073818624 + 338 006c 00440140 .word 1073824768 + 339 0070 00480140 .word 1073825792 + 340 0074 FFF7FFFF .word -2049 + 341 0078 FFFBFFFF .word -1025 + 342 007c FFCFFFFF .word -12289 + 343 .cfi_endproc + 344 .LFE147: + ARM GAS /tmp/cchCqftX.s page 131 + + + 346 .section .text.TIM_OC4_SetConfig,"ax",%progbits + 347 .align 1 + 348 .syntax unified + 349 .code 16 + 350 .thumb_func + 352 TIM_OC4_SetConfig: + 353 .LVL35: + 354 .LFB148: +7061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer Output Compare 4 configuration +7064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OC_Config The output configuration structure +7066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +7069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 355 .loc 1 7069 1 is_stmt 1 view -0 + 356 .cfi_startproc + 357 @ args = 0, pretend = 0, frame = 0 + 358 @ frame_needed = 0, uses_anonymous_args = 0 + 359 .loc 1 7069 1 is_stmt 0 view .LVU130 + 360 0000 30B5 push {r4, r5, lr} + 361 .cfi_def_cfa_offset 12 + 362 .cfi_offset 4, -12 + 363 .cfi_offset 5, -8 + 364 .cfi_offset 14, -4 +7070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + 365 .loc 1 7070 3 is_stmt 1 view .LVU131 +7071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 366 .loc 1 7071 3 view .LVU132 +7072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 367 .loc 1 7072 3 view .LVU133 +7073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 368 .loc 1 7075 3 view .LVU134 + 369 .loc 1 7075 11 is_stmt 0 view .LVU135 + 370 0002 046A ldr r4, [r0, #32] + 371 .LVL36: +7076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ +7078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC4E; + 372 .loc 1 7078 3 is_stmt 1 view .LVU136 + 373 .loc 1 7078 7 is_stmt 0 view .LVU137 + 374 0004 036A ldr r3, [r0, #32] + 375 .loc 1 7078 14 view .LVU138 + 376 0006 114A ldr r2, .L18 + 377 0008 1340 ands r3, r2 + 378 000a 0362 str r3, [r0, #32] +7079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 379 .loc 1 7081 3 is_stmt 1 view .LVU139 + 380 .loc 1 7081 10 is_stmt 0 view .LVU140 + 381 000c 4568 ldr r5, [r0, #4] + 382 .LVL37: + ARM GAS /tmp/cchCqftX.s page 132 + + +7082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR2 register value */ +7084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx = TIMx->CCMR2; + 383 .loc 1 7084 3 is_stmt 1 view .LVU141 + 384 .loc 1 7084 12 is_stmt 0 view .LVU142 + 385 000e C369 ldr r3, [r0, #28] + 386 .LVL38: +7085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +7087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_OC4M; + 387 .loc 1 7087 3 is_stmt 1 view .LVU143 +7088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_CC4S; + 388 .loc 1 7088 3 view .LVU144 + 389 .loc 1 7088 12 is_stmt 0 view .LVU145 + 390 0010 0F4A ldr r2, .L18+4 + 391 0012 1340 ands r3, r2 + 392 .LVL39: +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Output Compare Mode */ +7091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx |= (OC_Config->OCMode << 8U); + 393 .loc 1 7091 3 is_stmt 1 view .LVU146 + 394 .loc 1 7091 25 is_stmt 0 view .LVU147 + 395 0014 0A68 ldr r2, [r1] + 396 .loc 1 7091 34 view .LVU148 + 397 0016 1202 lsls r2, r2, #8 + 398 .loc 1 7091 12 view .LVU149 + 399 0018 1A43 orrs r2, r3 + 400 .LVL40: +7092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Polarity level */ +7094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC4P; + 401 .loc 1 7094 3 is_stmt 1 view .LVU150 + 402 .loc 1 7094 11 is_stmt 0 view .LVU151 + 403 001a 0E4B ldr r3, .L18+8 + 404 001c 1C40 ands r4, r3 + 405 .LVL41: +7095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 12U); + 406 .loc 1 7096 3 is_stmt 1 view .LVU152 + 407 .loc 1 7096 24 is_stmt 0 view .LVU153 + 408 001e 8B68 ldr r3, [r1, #8] + 409 .loc 1 7096 37 view .LVU154 + 410 0020 1B03 lsls r3, r3, #12 + 411 .loc 1 7096 11 view .LVU155 + 412 0022 2343 orrs r3, r4 + 413 .LVL42: +7097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 414 .loc 1 7098 3 is_stmt 1 view .LVU156 + 415 .loc 1 7098 6 is_stmt 0 view .LVU157 + 416 0024 0C4C ldr r4, .L18+12 + 417 0026 A042 cmp r0, r4 + 418 0028 05D0 beq .L16 + 419 .loc 1 7098 7 discriminator 1 view .LVU158 + 420 002a 0C4C ldr r4, .L18+16 + 421 002c A042 cmp r0, r4 + 422 002e 02D0 beq .L16 + ARM GAS /tmp/cchCqftX.s page 133 + + + 423 .loc 1 7098 7 discriminator 2 view .LVU159 + 424 0030 0B4C ldr r4, .L18+20 + 425 0032 A042 cmp r0, r4 + 426 0034 04D1 bne .L17 + 427 .L16: +7099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +7101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 428 .loc 1 7101 5 is_stmt 1 view .LVU160 +7102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare IDLE State */ +7104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS4; + 429 .loc 1 7104 5 view .LVU161 + 430 .loc 1 7104 12 is_stmt 0 view .LVU162 + 431 0036 0B4C ldr r4, .L18+24 + 432 0038 2C40 ands r4, r5 + 433 .LVL43: +7105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ +7107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 6U); + 434 .loc 1 7107 5 is_stmt 1 view .LVU163 + 435 .loc 1 7107 25 is_stmt 0 view .LVU164 + 436 003a 4D69 ldr r5, [r1, #20] + 437 .loc 1 7107 39 view .LVU165 + 438 003c AD01 lsls r5, r5, #6 + 439 .loc 1 7107 12 view .LVU166 + 440 003e 2543 orrs r5, r4 + 441 .LVL44: + 442 .L17: +7108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CR2 */ +7111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 443 .loc 1 7111 3 is_stmt 1 view .LVU167 + 444 .loc 1 7111 13 is_stmt 0 view .LVU168 + 445 0040 4560 str r5, [r0, #4] +7112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR2 */ +7114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR2 = tmpccmrx; + 446 .loc 1 7114 3 is_stmt 1 view .LVU169 + 447 .loc 1 7114 15 is_stmt 0 view .LVU170 + 448 0042 C261 str r2, [r0, #28] +7115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCR4 = OC_Config->Pulse; + 449 .loc 1 7117 3 is_stmt 1 view .LVU171 + 450 .loc 1 7117 25 is_stmt 0 view .LVU172 + 451 0044 4A68 ldr r2, [r1, #4] + 452 .LVL45: + 453 .loc 1 7117 14 view .LVU173 + 454 0046 0264 str r2, [r0, #64] + 455 .LVL46: +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 456 .loc 1 7120 3 is_stmt 1 view .LVU174 + 457 .loc 1 7120 14 is_stmt 0 view .LVU175 + ARM GAS /tmp/cchCqftX.s page 134 + + + 458 0048 0362 str r3, [r0, #32] +7121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 459 .loc 1 7121 1 view .LVU176 + 460 @ sp needed + 461 .LVL47: + 462 .loc 1 7121 1 view .LVU177 + 463 004a 30BD pop {r4, r5, pc} + 464 .L19: + 465 .align 2 + 466 .L18: + 467 004c FFEFFFFF .word -4097 + 468 0050 FF8CFFFF .word -29441 + 469 0054 FFDFFFFF .word -8193 + 470 0058 002C0140 .word 1073818624 + 471 005c 00440140 .word 1073824768 + 472 0060 00480140 .word 1073825792 + 473 0064 FFBFFFFF .word -16385 + 474 .cfi_endproc + 475 .LFE148: + 477 .section .text.TIM_TI1_ConfigInputStage,"ax",%progbits + 478 .align 1 + 479 .syntax unified + 480 .code 16 + 481 .thumb_func + 483 TIM_TI1_ConfigInputStage: + 484 .LVL48: + 485 .LFB151: +7122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Slave Timer configuration function +7125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +7126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sSlaveConfig Slave timer configuration +7127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, +7130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig) +7131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +7133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; +7135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; +7136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +7138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +7139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Trigger Selection Bits */ +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_TS; +7142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Input Trigger source */ +7143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= sSlaveConfig->InputTrigger; +7144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the slave mode Bits */ +7146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_SMS; +7147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the slave mode */ +7148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= sSlaveConfig->SlaveMode; +7149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +7151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + ARM GAS /tmp/cchCqftX.s page 135 + + +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the trigger prescaler, filter, and polarity */ +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (sSlaveConfig->InputTrigger) +7155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ETRF: +7157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); +7160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); +7161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the ETR Trigger source */ +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +7165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, +7166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_TI1F_ED: +7172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED) +7178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +7180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = htim->Instance->CCER; +7184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; +7185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; +7186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; +7189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); +7190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 = tmpccmr1; +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER = tmpccer; +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_TI1FP1: +7198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure TI1 Filter and Polarity */ +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +7206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 136 + + +7209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_TI2FP2: +7212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure TI2 Filter and Polarity */ +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI2_ConfigInputStage(htim->Instance, +7220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ITR0: +7226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ITR1: +7227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ITR2: +7228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ITR3: +7229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameter */ +7231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +7232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +7237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +7241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the TI1 as Input. +7245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 1 is selected to be connected to IC1. +7254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 1 is selected to be connected to IC2. +7255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 1 is selected to be connected to TRC. +7256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1 +7260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (on channel2 path) is used as the input signal. Therefore CCMR1 must be +7261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter) +7265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 137 + + +7266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; +7267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; +7268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; +7271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; +7272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; +7273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Input */ +7275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CC2_INSTANCE(TIMx) != RESET) +7276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_CC1S; +7278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; +7279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +7281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= TIM_CCMR1_CC1S_0; +7283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); +7288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC1E Bit */ +7290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); +7291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); +7292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1; +7295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; +7296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the Polarity and Filter for TI1. +7300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil +7311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 486 .loc 1 7311 1 is_stmt 1 view -0 + 487 .cfi_startproc + 488 @ args = 0, pretend = 0, frame = 0 + 489 @ frame_needed = 0, uses_anonymous_args = 0 + 490 .loc 1 7311 1 is_stmt 0 view .LVU179 + 491 0000 30B5 push {r4, r5, lr} + 492 .cfi_def_cfa_offset 12 + 493 .cfi_offset 4, -12 + 494 .cfi_offset 5, -8 + 495 .cfi_offset 14, -4 +7312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + ARM GAS /tmp/cchCqftX.s page 138 + + + 496 .loc 1 7312 3 is_stmt 1 view .LVU180 +7313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 497 .loc 1 7313 3 view .LVU181 +7314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 498 .loc 1 7316 3 view .LVU182 + 499 .loc 1 7316 11 is_stmt 0 view .LVU183 + 500 0002 036A ldr r3, [r0, #32] + 501 .LVL49: +7317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; + 502 .loc 1 7317 3 is_stmt 1 view .LVU184 + 503 .loc 1 7317 7 is_stmt 0 view .LVU185 + 504 0004 046A ldr r4, [r0, #32] + 505 .loc 1 7317 14 view .LVU186 + 506 0006 0125 movs r5, #1 + 507 0008 AC43 bics r4, r5 + 508 000a 0462 str r4, [r0, #32] +7318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 509 .loc 1 7318 3 is_stmt 1 view .LVU187 + 510 .loc 1 7318 12 is_stmt 0 view .LVU188 + 511 000c 8469 ldr r4, [r0, #24] + 512 .LVL50: +7319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; + 513 .loc 1 7321 3 is_stmt 1 view .LVU189 + 514 .loc 1 7321 12 is_stmt 0 view .LVU190 + 515 000e EF35 adds r5, r5, #239 + 516 0010 AC43 bics r4, r5 + 517 .LVL51: +7322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (TIM_ICFilter << 4U); + 518 .loc 1 7322 3 is_stmt 1 view .LVU191 + 519 .loc 1 7322 29 is_stmt 0 view .LVU192 + 520 0012 1201 lsls r2, r2, #4 + 521 .LVL52: + 522 .loc 1 7322 12 view .LVU193 + 523 0014 2243 orrs r2, r4 + 524 .LVL53: +7323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC1E Bit */ +7325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); + 525 .loc 1 7325 3 is_stmt 1 view .LVU194 + 526 .loc 1 7325 11 is_stmt 0 view .LVU195 + 527 0016 0A24 movs r4, #10 + 528 0018 A343 bics r3, r4 + 529 .LVL54: +7326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= TIM_ICPolarity; + 530 .loc 1 7326 3 is_stmt 1 view .LVU196 + 531 .loc 1 7326 11 is_stmt 0 view .LVU197 + 532 001a 0B43 orrs r3, r1 + 533 .LVL55: +7327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1; + 534 .loc 1 7329 3 is_stmt 1 view .LVU198 + 535 .loc 1 7329 15 is_stmt 0 view .LVU199 + ARM GAS /tmp/cchCqftX.s page 139 + + + 536 001c 8261 str r2, [r0, #24] +7330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 537 .loc 1 7330 3 is_stmt 1 view .LVU200 + 538 .loc 1 7330 14 is_stmt 0 view .LVU201 + 539 001e 0362 str r3, [r0, #32] +7331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 540 .loc 1 7331 1 view .LVU202 + 541 @ sp needed + 542 0020 30BD pop {r4, r5, pc} + 543 .cfi_endproc + 544 .LFE151: + 546 .section .text.TIM_TI2_SetConfig,"ax",%progbits + 547 .align 1 + 548 .syntax unified + 549 .code 16 + 550 .thumb_func + 552 TIM_TI2_SetConfig: + 553 .LVL56: + 554 .LFB152: +7332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the TI2 as Input. +7335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 2 is selected to be connected to IC2. +7344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 2 is selected to be connected to IC1. +7345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 2 is selected to be connected to TRC. +7346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2 +7350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR1 must be +7351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter) +7355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 555 .loc 1 7355 1 is_stmt 1 view -0 + 556 .cfi_startproc + 557 @ args = 0, pretend = 0, frame = 0 + 558 @ frame_needed = 0, uses_anonymous_args = 0 + 559 .loc 1 7355 1 is_stmt 0 view .LVU204 + 560 0000 70B5 push {r4, r5, r6, lr} + 561 .cfi_def_cfa_offset 16 + 562 .cfi_offset 4, -16 + 563 .cfi_offset 5, -12 + 564 .cfi_offset 6, -8 + 565 .cfi_offset 14, -4 +7356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 566 .loc 1 7356 3 is_stmt 1 view .LVU205 +7357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + ARM GAS /tmp/cchCqftX.s page 140 + + + 567 .loc 1 7357 3 view .LVU206 +7358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +7360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 568 .loc 1 7360 3 view .LVU207 + 569 .loc 1 7360 11 is_stmt 0 view .LVU208 + 570 0002 046A ldr r4, [r0, #32] + 571 .LVL57: +7361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; + 572 .loc 1 7361 3 is_stmt 1 view .LVU209 + 573 .loc 1 7361 7 is_stmt 0 view .LVU210 + 574 0004 056A ldr r5, [r0, #32] + 575 .loc 1 7361 14 view .LVU211 + 576 0006 1026 movs r6, #16 + 577 0008 B543 bics r5, r6 + 578 000a 0562 str r5, [r0, #32] +7362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 579 .loc 1 7362 3 is_stmt 1 view .LVU212 + 580 .loc 1 7362 12 is_stmt 0 view .LVU213 + 581 000c 8569 ldr r5, [r0, #24] + 582 .LVL58: +7363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Input */ +7365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_CC2S; + 583 .loc 1 7365 3 is_stmt 1 view .LVU214 + 584 .loc 1 7365 12 is_stmt 0 view .LVU215 + 585 000e 084E ldr r6, .L22 + 586 0010 3540 ands r5, r6 + 587 .LVL59: +7366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (TIM_ICSelection << 8U); + 588 .loc 1 7366 3 is_stmt 1 view .LVU216 + 589 .loc 1 7366 32 is_stmt 0 view .LVU217 + 590 0012 1202 lsls r2, r2, #8 + 591 .LVL60: + 592 .loc 1 7366 12 view .LVU218 + 593 0014 2A43 orrs r2, r5 + 594 .LVL61: +7367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC2F; + 595 .loc 1 7369 3 is_stmt 1 view .LVU219 + 596 .loc 1 7369 12 is_stmt 0 view .LVU220 + 597 0016 074D ldr r5, .L22+4 + 598 0018 2A40 ands r2, r5 + 599 .LVL62: +7370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F); + 600 .loc 1 7370 3 is_stmt 1 view .LVU221 + 601 .loc 1 7370 38 is_stmt 0 view .LVU222 + 602 001a 1B07 lsls r3, r3, #28 + 603 .LVL63: + 604 .loc 1 7370 38 view .LVU223 + 605 001c 1B0C lsrs r3, r3, #16 + 606 .loc 1 7370 12 view .LVU224 + 607 001e 1343 orrs r3, r2 + 608 .LVL64: +7371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC2E Bit */ + ARM GAS /tmp/cchCqftX.s page 141 + + +7373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 609 .loc 1 7373 3 is_stmt 1 view .LVU225 + 610 .loc 1 7373 11 is_stmt 0 view .LVU226 + 611 0020 A022 movs r2, #160 + 612 0022 9443 bics r4, r2 + 613 .LVL65: +7374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); + 614 .loc 1 7374 3 is_stmt 1 view .LVU227 + 615 .loc 1 7374 31 is_stmt 0 view .LVU228 + 616 0024 0901 lsls r1, r1, #4 + 617 .LVL66: + 618 .loc 1 7374 38 view .LVU229 + 619 0026 0A40 ands r2, r1 + 620 .loc 1 7374 11 view .LVU230 + 621 0028 2243 orrs r2, r4 + 622 .LVL67: +7375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1 ; + 623 .loc 1 7377 3 is_stmt 1 view .LVU231 + 624 .loc 1 7377 15 is_stmt 0 view .LVU232 + 625 002a 8361 str r3, [r0, #24] +7378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 626 .loc 1 7378 3 is_stmt 1 view .LVU233 + 627 .loc 1 7378 14 is_stmt 0 view .LVU234 + 628 002c 0262 str r2, [r0, #32] +7379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 629 .loc 1 7379 1 view .LVU235 + 630 @ sp needed + 631 002e 70BD pop {r4, r5, r6, pc} + 632 .L23: + 633 .align 2 + 634 .L22: + 635 0030 FFFCFFFF .word -769 + 636 0034 FF0FFFFF .word -61441 + 637 .cfi_endproc + 638 .LFE152: + 640 .section .text.TIM_TI2_ConfigInputStage,"ax",%progbits + 641 .align 1 + 642 .syntax unified + 643 .code 16 + 644 .thumb_func + 646 TIM_TI2_ConfigInputStage: + 647 .LVL68: + 648 .LFB153: +7380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the Polarity and Filter for TI2. +7383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + ARM GAS /tmp/cchCqftX.s page 142 + + +7392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil +7394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 649 .loc 1 7394 1 is_stmt 1 view -0 + 650 .cfi_startproc + 651 @ args = 0, pretend = 0, frame = 0 + 652 @ frame_needed = 0, uses_anonymous_args = 0 + 653 .loc 1 7394 1 is_stmt 0 view .LVU237 + 654 0000 30B5 push {r4, r5, lr} + 655 .cfi_def_cfa_offset 12 + 656 .cfi_offset 4, -12 + 657 .cfi_offset 5, -8 + 658 .cfi_offset 14, -4 +7395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 659 .loc 1 7395 3 is_stmt 1 view .LVU238 +7396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 660 .loc 1 7396 3 view .LVU239 +7397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +7399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 661 .loc 1 7399 3 view .LVU240 + 662 .loc 1 7399 11 is_stmt 0 view .LVU241 + 663 0002 036A ldr r3, [r0, #32] + 664 .LVL69: +7400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; + 665 .loc 1 7400 3 is_stmt 1 view .LVU242 + 666 .loc 1 7400 7 is_stmt 0 view .LVU243 + 667 0004 046A ldr r4, [r0, #32] + 668 .loc 1 7400 14 view .LVU244 + 669 0006 1025 movs r5, #16 + 670 0008 AC43 bics r4, r5 + 671 000a 0462 str r4, [r0, #32] +7401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 672 .loc 1 7401 3 is_stmt 1 view .LVU245 + 673 .loc 1 7401 12 is_stmt 0 view .LVU246 + 674 000c 8469 ldr r4, [r0, #24] + 675 .LVL70: +7402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC2F; + 676 .loc 1 7404 3 is_stmt 1 view .LVU247 + 677 .loc 1 7404 12 is_stmt 0 view .LVU248 + 678 000e 054D ldr r5, .L25 + 679 0010 2C40 ands r4, r5 + 680 .LVL71: +7405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (TIM_ICFilter << 12U); + 681 .loc 1 7405 3 is_stmt 1 view .LVU249 + 682 .loc 1 7405 29 is_stmt 0 view .LVU250 + 683 0012 1203 lsls r2, r2, #12 + 684 .LVL72: + 685 .loc 1 7405 12 view .LVU251 + 686 0014 2243 orrs r2, r4 + 687 .LVL73: +7406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC2E Bit */ +7408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 688 .loc 1 7408 3 is_stmt 1 view .LVU252 + ARM GAS /tmp/cchCqftX.s page 143 + + + 689 .loc 1 7408 11 is_stmt 0 view .LVU253 + 690 0016 A024 movs r4, #160 + 691 0018 A343 bics r3, r4 + 692 .LVL74: +7409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity << 4U); + 693 .loc 1 7409 3 is_stmt 1 view .LVU254 + 694 .loc 1 7409 30 is_stmt 0 view .LVU255 + 695 001a 0901 lsls r1, r1, #4 + 696 .LVL75: + 697 .loc 1 7409 11 view .LVU256 + 698 001c 1943 orrs r1, r3 + 699 .LVL76: +7410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1 ; + 700 .loc 1 7412 3 is_stmt 1 view .LVU257 + 701 .loc 1 7412 15 is_stmt 0 view .LVU258 + 702 001e 8261 str r2, [r0, #24] +7413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 703 .loc 1 7413 3 is_stmt 1 view .LVU259 + 704 .loc 1 7413 14 is_stmt 0 view .LVU260 + 705 0020 0162 str r1, [r0, #32] +7414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 706 .loc 1 7414 1 view .LVU261 + 707 @ sp needed + 708 0022 30BD pop {r4, r5, pc} + 709 .L26: + 710 .align 2 + 711 .L25: + 712 0024 FF0FFFFF .word -61441 + 713 .cfi_endproc + 714 .LFE153: + 716 .section .text.TIM_TI3_SetConfig,"ax",%progbits + 717 .align 1 + 718 .syntax unified + 719 .code 16 + 720 .thumb_func + 722 TIM_TI3_SetConfig: + 723 .LVL77: + 724 .LFB154: +7415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the TI3 as Input. +7418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 3 is selected to be connected to IC3. +7427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 3 is selected to be connected to IC4. +7428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 3 is selected to be connected to TRC. +7429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + ARM GAS /tmp/cchCqftX.s page 144 + + +7432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4 +7433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR2 must be +7434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter) +7438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 725 .loc 1 7438 1 is_stmt 1 view -0 + 726 .cfi_startproc + 727 @ args = 0, pretend = 0, frame = 0 + 728 @ frame_needed = 0, uses_anonymous_args = 0 + 729 .loc 1 7438 1 is_stmt 0 view .LVU263 + 730 0000 70B5 push {r4, r5, r6, lr} + 731 .cfi_def_cfa_offset 16 + 732 .cfi_offset 4, -16 + 733 .cfi_offset 5, -12 + 734 .cfi_offset 6, -8 + 735 .cfi_offset 14, -4 +7439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr2; + 736 .loc 1 7439 3 is_stmt 1 view .LVU264 +7440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 737 .loc 1 7440 3 view .LVU265 +7441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 3: Reset the CC3E Bit */ +7443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 738 .loc 1 7443 3 view .LVU266 + 739 .loc 1 7443 11 is_stmt 0 view .LVU267 + 740 0002 056A ldr r5, [r0, #32] + 741 .LVL78: +7444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC3E; + 742 .loc 1 7444 3 is_stmt 1 view .LVU268 + 743 .loc 1 7444 7 is_stmt 0 view .LVU269 + 744 0004 046A ldr r4, [r0, #32] + 745 .loc 1 7444 14 view .LVU270 + 746 0006 0C4E ldr r6, .L28 + 747 0008 3440 ands r4, r6 + 748 000a 0462 str r4, [r0, #32] +7445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 = TIMx->CCMR2; + 749 .loc 1 7445 3 is_stmt 1 view .LVU271 + 750 .loc 1 7445 12 is_stmt 0 view .LVU272 + 751 000c C469 ldr r4, [r0, #28] + 752 .LVL79: +7446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Input */ +7448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_CC3S; + 753 .loc 1 7448 3 is_stmt 1 view .LVU273 + 754 .loc 1 7448 12 is_stmt 0 view .LVU274 + 755 000e 0536 adds r6, r6, #5 + 756 0010 FF36 adds r6, r6, #255 + 757 0012 B443 bics r4, r6 + 758 .LVL80: +7449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 |= TIM_ICSelection; + 759 .loc 1 7449 3 is_stmt 1 view .LVU275 + 760 .loc 1 7449 12 is_stmt 0 view .LVU276 + 761 0014 1443 orrs r4, r2 + 762 .LVL81: +7450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 145 + + +7451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_IC3F; + 763 .loc 1 7452 3 is_stmt 1 view .LVU277 + 764 .loc 1 7452 12 is_stmt 0 view .LVU278 + 765 0016 F022 movs r2, #240 + 766 .LVL82: + 767 .loc 1 7452 12 view .LVU279 + 768 0018 9443 bics r4, r2 + 769 .LVL83: +7453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F); + 770 .loc 1 7453 3 is_stmt 1 view .LVU280 + 771 .loc 1 7453 30 is_stmt 0 view .LVU281 + 772 001a 1A01 lsls r2, r3, #4 + 773 .loc 1 7453 37 view .LVU282 + 774 001c FF23 movs r3, #255 + 775 .LVL84: + 776 .loc 1 7453 37 view .LVU283 + 777 001e 1340 ands r3, r2 + 778 .loc 1 7453 12 view .LVU284 + 779 0020 2343 orrs r3, r4 + 780 .LVL85: +7454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC3E Bit */ +7456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); + 781 .loc 1 7456 3 is_stmt 1 view .LVU285 + 782 .loc 1 7456 11 is_stmt 0 view .LVU286 + 783 0022 064A ldr r2, .L28+4 + 784 0024 1540 ands r5, r2 + 785 .LVL86: +7457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); + 786 .loc 1 7457 3 is_stmt 1 view .LVU287 + 787 .loc 1 7457 31 is_stmt 0 view .LVU288 + 788 0026 0902 lsls r1, r1, #8 + 789 .LVL87: + 790 .loc 1 7457 38 view .LVU289 + 791 0028 A022 movs r2, #160 + 792 002a 1201 lsls r2, r2, #4 + 793 002c 1140 ands r1, r2 + 794 .loc 1 7457 11 view .LVU290 + 795 002e 2943 orrs r1, r5 + 796 .LVL88: +7458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR2 and CCER registers */ +7460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR2 = tmpccmr2; + 797 .loc 1 7460 3 is_stmt 1 view .LVU291 + 798 .loc 1 7460 15 is_stmt 0 view .LVU292 + 799 0030 C361 str r3, [r0, #28] +7461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 800 .loc 1 7461 3 is_stmt 1 view .LVU293 + 801 .loc 1 7461 14 is_stmt 0 view .LVU294 + 802 0032 0162 str r1, [r0, #32] +7462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 803 .loc 1 7462 1 view .LVU295 + 804 @ sp needed + 805 0034 70BD pop {r4, r5, r6, pc} + 806 .L29: + 807 0036 C046 .align 2 + ARM GAS /tmp/cchCqftX.s page 146 + + + 808 .L28: + 809 0038 FFFEFFFF .word -257 + 810 003c FFF5FFFF .word -2561 + 811 .cfi_endproc + 812 .LFE154: + 814 .section .text.TIM_TI4_SetConfig,"ax",%progbits + 815 .align 1 + 816 .syntax unified + 817 .code 16 + 818 .thumb_func + 820 TIM_TI4_SetConfig: + 821 .LVL89: + 822 .LFB155: +7463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the TI4 as Input. +7466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 4 is selected to be connected to IC4. +7475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 4 is selected to be connected to IC3. +7476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 4 is selected to be connected to TRC. +7477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3 +7480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR2 must be +7481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter) +7486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 823 .loc 1 7486 1 is_stmt 1 view -0 + 824 .cfi_startproc + 825 @ args = 0, pretend = 0, frame = 0 + 826 @ frame_needed = 0, uses_anonymous_args = 0 + 827 .loc 1 7486 1 is_stmt 0 view .LVU297 + 828 0000 70B5 push {r4, r5, r6, lr} + 829 .cfi_def_cfa_offset 16 + 830 .cfi_offset 4, -16 + 831 .cfi_offset 5, -12 + 832 .cfi_offset 6, -8 + 833 .cfi_offset 14, -4 +7487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr2; + 834 .loc 1 7487 3 is_stmt 1 view .LVU298 +7488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 835 .loc 1 7488 3 view .LVU299 +7489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ +7491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 836 .loc 1 7491 3 view .LVU300 + 837 .loc 1 7491 11 is_stmt 0 view .LVU301 + ARM GAS /tmp/cchCqftX.s page 147 + + + 838 0002 046A ldr r4, [r0, #32] + 839 .LVL90: +7492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC4E; + 840 .loc 1 7492 3 is_stmt 1 view .LVU302 + 841 .loc 1 7492 7 is_stmt 0 view .LVU303 + 842 0004 056A ldr r5, [r0, #32] + 843 .loc 1 7492 14 view .LVU304 + 844 0006 0B4E ldr r6, .L31 + 845 0008 3540 ands r5, r6 + 846 000a 0562 str r5, [r0, #32] +7493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 = TIMx->CCMR2; + 847 .loc 1 7493 3 is_stmt 1 view .LVU305 + 848 .loc 1 7493 12 is_stmt 0 view .LVU306 + 849 000c C569 ldr r5, [r0, #28] + 850 .LVL91: +7494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Input */ +7496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_CC4S; + 851 .loc 1 7496 3 is_stmt 1 view .LVU307 + 852 .loc 1 7496 12 is_stmt 0 view .LVU308 + 853 000e 0A4E ldr r6, .L31+4 + 854 0010 3540 ands r5, r6 + 855 .LVL92: +7497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 |= (TIM_ICSelection << 8U); + 856 .loc 1 7497 3 is_stmt 1 view .LVU309 + 857 .loc 1 7497 32 is_stmt 0 view .LVU310 + 858 0012 1202 lsls r2, r2, #8 + 859 .LVL93: + 860 .loc 1 7497 12 view .LVU311 + 861 0014 2A43 orrs r2, r5 + 862 .LVL94: +7498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_IC4F; + 863 .loc 1 7500 3 is_stmt 1 view .LVU312 + 864 .loc 1 7500 12 is_stmt 0 view .LVU313 + 865 0016 094D ldr r5, .L31+8 + 866 0018 2A40 ands r2, r5 + 867 .LVL95: +7501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F); + 868 .loc 1 7501 3 is_stmt 1 view .LVU314 + 869 .loc 1 7501 38 is_stmt 0 view .LVU315 + 870 001a 1B07 lsls r3, r3, #28 + 871 .LVL96: + 872 .loc 1 7501 38 view .LVU316 + 873 001c 1B0C lsrs r3, r3, #16 + 874 .loc 1 7501 12 view .LVU317 + 875 001e 1343 orrs r3, r2 + 876 .LVL97: +7502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC4E Bit */ +7504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); + 877 .loc 1 7504 3 is_stmt 1 view .LVU318 + 878 .loc 1 7504 11 is_stmt 0 view .LVU319 + 879 0020 074A ldr r2, .L31+12 + 880 0022 1440 ands r4, r2 + 881 .LVL98: + ARM GAS /tmp/cchCqftX.s page 148 + + +7505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); + 882 .loc 1 7505 3 is_stmt 1 view .LVU320 + 883 .loc 1 7505 31 is_stmt 0 view .LVU321 + 884 0024 0903 lsls r1, r1, #12 + 885 .LVL99: + 886 .loc 1 7505 39 view .LVU322 + 887 0026 A022 movs r2, #160 + 888 0028 1202 lsls r2, r2, #8 + 889 002a 1140 ands r1, r2 + 890 .loc 1 7505 11 view .LVU323 + 891 002c 2143 orrs r1, r4 + 892 .LVL100: +7506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR2 and CCER registers */ +7508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR2 = tmpccmr2; + 893 .loc 1 7508 3 is_stmt 1 view .LVU324 + 894 .loc 1 7508 15 is_stmt 0 view .LVU325 + 895 002e C361 str r3, [r0, #28] +7509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer ; + 896 .loc 1 7509 3 is_stmt 1 view .LVU326 + 897 .loc 1 7509 14 is_stmt 0 view .LVU327 + 898 0030 0162 str r1, [r0, #32] +7510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 899 .loc 1 7510 1 view .LVU328 + 900 @ sp needed + 901 0032 70BD pop {r4, r5, r6, pc} + 902 .L32: + 903 .align 2 + 904 .L31: + 905 0034 FFEFFFFF .word -4097 + 906 0038 FFFCFFFF .word -769 + 907 003c FF0FFFFF .word -61441 + 908 0040 FF5FFFFF .word -40961 + 909 .cfi_endproc + 910 .LFE155: + 912 .section .text.TIM_ITRx_SetConfig,"ax",%progbits + 913 .align 1 + 914 .syntax unified + 915 .code 16 + 916 .thumb_func + 918 TIM_ITRx_SetConfig: + 919 .LVL101: + 920 .LFB156: +7511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Selects the Input Trigger source +7514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param InputTriggerSource The Input Trigger source. +7516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ITR0: Internal Trigger 0 +7518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ITR1: Internal Trigger 1 +7519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ITR2: Internal Trigger 2 +7520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ITR3: Internal Trigger 3 +7521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_TI1F_ED: TI1 Edge Detector +7522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 +7523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 +7524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ETRF: External Trigger input + ARM GAS /tmp/cchCqftX.s page 149 + + +7525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) +7528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 921 .loc 1 7528 1 is_stmt 1 view -0 + 922 .cfi_startproc + 923 @ args = 0, pretend = 0, frame = 0 + 924 @ frame_needed = 0, uses_anonymous_args = 0 + 925 @ link register save eliminated. +7529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 926 .loc 1 7529 3 view .LVU330 +7530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +7532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = TIMx->SMCR; + 927 .loc 1 7532 3 view .LVU331 + 928 .loc 1 7532 11 is_stmt 0 view .LVU332 + 929 0000 8368 ldr r3, [r0, #8] + 930 .LVL102: +7533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the TS Bits */ +7534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_TS; + 931 .loc 1 7534 3 is_stmt 1 view .LVU333 + 932 .loc 1 7534 11 is_stmt 0 view .LVU334 + 933 0002 7022 movs r2, #112 + 934 0004 9343 bics r3, r2 + 935 .LVL103: +7535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Input Trigger source and the slave mode*/ +7536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); + 936 .loc 1 7536 3 is_stmt 1 view .LVU335 + 937 .loc 1 7536 11 is_stmt 0 view .LVU336 + 938 0006 0B43 orrs r3, r1 + 939 .LVL104: + 940 .loc 1 7536 11 view .LVU337 + 941 0008 693A subs r2, r2, #105 + 942 .loc 1 7536 11 view .LVU338 + 943 000a 1343 orrs r3, r2 + 944 .LVL105: +7537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +7538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->SMCR = tmpsmcr; + 945 .loc 1 7538 3 is_stmt 1 view .LVU339 + 946 .loc 1 7538 14 is_stmt 0 view .LVU340 + 947 000c 8360 str r3, [r0, #8] +7539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 948 .loc 1 7539 1 view .LVU341 + 949 @ sp needed + 950 000e 7047 bx lr + 951 .cfi_endproc + 952 .LFE156: + 954 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits + 955 .align 1 + 956 .weak HAL_TIM_Base_MspInit + 957 .syntax unified + 958 .code 16 + 959 .thumb_func + 961 HAL_TIM_Base_MspInit: + 962 .LVL106: + 963 .LFB42: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/cchCqftX.s page 150 + + + 964 .loc 1 370 1 is_stmt 1 view -0 + 965 .cfi_startproc + 966 @ args = 0, pretend = 0, frame = 0 + 967 @ frame_needed = 0, uses_anonymous_args = 0 + 968 @ link register save eliminated. + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 969 .loc 1 372 3 view .LVU343 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 970 .loc 1 377 1 is_stmt 0 view .LVU344 + 971 @ sp needed + 972 0000 7047 bx lr + 973 .cfi_endproc + 974 .LFE42: + 976 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits + 977 .align 1 + 978 .weak HAL_TIM_Base_MspDeInit + 979 .syntax unified + 980 .code 16 + 981 .thumb_func + 983 HAL_TIM_Base_MspDeInit: + 984 .LVL107: + 985 .LFB43: + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 986 .loc 1 385 1 is_stmt 1 view -0 + 987 .cfi_startproc + 988 @ args = 0, pretend = 0, frame = 0 + 989 @ frame_needed = 0, uses_anonymous_args = 0 + 990 @ link register save eliminated. + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 991 .loc 1 387 3 view .LVU346 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 992 .loc 1 392 1 is_stmt 0 view .LVU347 + 993 @ sp needed + 994 0000 7047 bx lr + 995 .cfi_endproc + 996 .LFE43: + 998 .section .text.HAL_TIM_Base_DeInit,"ax",%progbits + 999 .align 1 + 1000 .global HAL_TIM_Base_DeInit + 1001 .syntax unified + 1002 .code 16 + 1003 .thumb_func + 1005 HAL_TIM_Base_DeInit: + 1006 .LVL108: + 1007 .LFB41: + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1008 .loc 1 327 1 is_stmt 1 view -0 + 1009 .cfi_startproc + 1010 @ args = 0, pretend = 0, frame = 0 + 1011 @ frame_needed = 0, uses_anonymous_args = 0 + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1012 .loc 1 327 1 is_stmt 0 view .LVU349 + 1013 0000 10B5 push {r4, lr} + 1014 .cfi_def_cfa_offset 8 + 1015 .cfi_offset 4, -8 + 1016 .cfi_offset 14, -4 + 1017 0002 0400 movs r4, r0 + ARM GAS /tmp/cchCqftX.s page 151 + + + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1018 .loc 1 329 3 is_stmt 1 view .LVU350 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1019 .loc 1 331 3 view .LVU351 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1020 .loc 1 331 15 is_stmt 0 view .LVU352 + 1021 0004 3D23 movs r3, #61 + 1022 0006 0222 movs r2, #2 + 1023 0008 C254 strb r2, [r0, r3] + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1024 .loc 1 334 3 is_stmt 1 view .LVU353 + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1025 .loc 1 334 3 view .LVU354 + 1026 000a 0368 ldr r3, [r0] + 1027 000c 196A ldr r1, [r3, #32] + 1028 000e 134A ldr r2, .L38 + 1029 0010 1142 tst r1, r2 + 1030 0012 07D1 bne .L37 + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1031 .loc 1 334 3 discriminator 1 view .LVU355 + 1032 0014 196A ldr r1, [r3, #32] + 1033 0016 124A ldr r2, .L38+4 + 1034 0018 1142 tst r1, r2 + 1035 001a 03D1 bne .L37 + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1036 .loc 1 334 3 discriminator 3 view .LVU356 + 1037 001c 1A68 ldr r2, [r3] + 1038 001e 0121 movs r1, #1 + 1039 0020 8A43 bics r2, r1 + 1040 0022 1A60 str r2, [r3] + 1041 .L37: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1042 .loc 1 334 3 discriminator 5 view .LVU357 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1043 .loc 1 345 3 view .LVU358 + 1044 0024 2000 movs r0, r4 + 1045 .LVL109: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1046 .loc 1 345 3 is_stmt 0 view .LVU359 + 1047 0026 FFF7FEFF bl HAL_TIM_Base_MspDeInit + 1048 .LVL110: + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1049 .loc 1 349 3 is_stmt 1 view .LVU360 + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1050 .loc 1 349 23 is_stmt 0 view .LVU361 + 1051 002a 0023 movs r3, #0 + 1052 002c 4622 movs r2, #70 + 1053 002e A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1054 .loc 1 352 3 is_stmt 1 view .LVU362 + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1055 .loc 1 352 3 view .LVU363 + 1056 0030 083A subs r2, r2, #8 + 1057 0032 A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1058 .loc 1 352 3 view .LVU364 + 1059 0034 0132 adds r2, r2, #1 + ARM GAS /tmp/cchCqftX.s page 152 + + + 1060 0036 A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1061 .loc 1 352 3 view .LVU365 + 1062 0038 0132 adds r2, r2, #1 + 1063 003a A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1064 .loc 1 352 3 view .LVU366 + 1065 003c 0132 adds r2, r2, #1 + 1066 003e A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1067 .loc 1 352 3 view .LVU367 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1068 .loc 1 353 3 view .LVU368 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1069 .loc 1 353 3 view .LVU369 + 1070 0040 0132 adds r2, r2, #1 + 1071 0042 A354 strb r3, [r4, r2] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1072 .loc 1 353 3 view .LVU370 + 1073 0044 0132 adds r2, r2, #1 + 1074 0046 A354 strb r3, [r4, r2] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1075 .loc 1 353 3 view .LVU371 + 1076 0048 0132 adds r2, r2, #1 + 1077 004a A354 strb r3, [r4, r2] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1078 .loc 1 353 3 view .LVU372 + 1079 004c 0132 adds r2, r2, #1 + 1080 004e A354 strb r3, [r4, r2] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1081 .loc 1 353 3 view .LVU373 + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1082 .loc 1 356 3 view .LVU374 + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1083 .loc 1 356 15 is_stmt 0 view .LVU375 + 1084 0050 083A subs r2, r2, #8 + 1085 0052 A354 strb r3, [r4, r2] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1086 .loc 1 359 3 is_stmt 1 view .LVU376 + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1087 .loc 1 359 3 view .LVU377 + 1088 0054 013A subs r2, r2, #1 + 1089 0056 A354 strb r3, [r4, r2] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1090 .loc 1 359 3 view .LVU378 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1091 .loc 1 361 3 view .LVU379 + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1092 .loc 1 362 1 is_stmt 0 view .LVU380 + 1093 0058 0020 movs r0, #0 + 1094 @ sp needed + 1095 .LVL111: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1096 .loc 1 362 1 view .LVU381 + 1097 005a 10BD pop {r4, pc} + 1098 .L39: + 1099 .align 2 + ARM GAS /tmp/cchCqftX.s page 153 + + + 1100 .L38: + 1101 005c 11110000 .word 4369 + 1102 0060 44040000 .word 1092 + 1103 .cfi_endproc + 1104 .LFE41: + 1106 .section .text.HAL_TIM_Base_Start,"ax",%progbits + 1107 .align 1 + 1108 .global HAL_TIM_Base_Start + 1109 .syntax unified + 1110 .code 16 + 1111 .thumb_func + 1113 HAL_TIM_Base_Start: + 1114 .LVL112: + 1115 .LFB44: + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 1116 .loc 1 401 1 is_stmt 1 view -0 + 1117 .cfi_startproc + 1118 @ args = 0, pretend = 0, frame = 0 + 1119 @ frame_needed = 0, uses_anonymous_args = 0 + 1120 @ link register save eliminated. + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1121 .loc 1 402 3 view .LVU383 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1122 .loc 1 405 3 view .LVU384 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1123 .loc 1 408 3 view .LVU385 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1124 .loc 1 408 11 is_stmt 0 view .LVU386 + 1125 0000 3D23 movs r3, #61 + 1126 0002 C35C ldrb r3, [r0, r3] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1127 .loc 1 408 6 view .LVU387 + 1128 0004 012B cmp r3, #1 + 1129 0006 1ED1 bne .L44 + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1130 .loc 1 414 3 is_stmt 1 view .LVU388 + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1131 .loc 1 414 15 is_stmt 0 view .LVU389 + 1132 0008 3C33 adds r3, r3, #60 + 1133 000a 0222 movs r2, #2 + 1134 000c C254 strb r2, [r0, r3] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1135 .loc 1 417 3 is_stmt 1 view .LVU390 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1136 .loc 1 417 7 is_stmt 0 view .LVU391 + 1137 000e 0368 ldr r3, [r0] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1138 .loc 1 417 6 view .LVU392 + 1139 0010 0F4A ldr r2, .L46 + 1140 0012 9342 cmp r3, r2 + 1141 0014 0CD0 beq .L42 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1142 .loc 1 417 7 discriminator 1 view .LVU393 + 1143 0016 8022 movs r2, #128 + 1144 0018 D205 lsls r2, r2, #23 + 1145 001a 9342 cmp r3, r2 + 1146 001c 08D0 beq .L42 + ARM GAS /tmp/cchCqftX.s page 154 + + + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1147 .loc 1 417 7 discriminator 2 view .LVU394 + 1148 001e 0D4A ldr r2, .L46+4 + 1149 0020 9342 cmp r3, r2 + 1150 0022 05D0 beq .L42 + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1151 .loc 1 427 5 is_stmt 1 view .LVU395 + 1152 0024 1A68 ldr r2, [r3] + 1153 0026 0121 movs r1, #1 + 1154 0028 0A43 orrs r2, r1 + 1155 002a 1A60 str r2, [r3] + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1156 .loc 1 431 10 is_stmt 0 view .LVU396 + 1157 002c 0020 movs r0, #0 + 1158 .LVL113: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1159 .loc 1 431 10 view .LVU397 + 1160 002e 0BE0 b .L41 + 1161 .LVL114: + 1162 .L42: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1163 .loc 1 419 5 is_stmt 1 view .LVU398 + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1164 .loc 1 419 29 is_stmt 0 view .LVU399 + 1165 0030 9968 ldr r1, [r3, #8] + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1166 .loc 1 419 13 view .LVU400 + 1167 0032 0722 movs r2, #7 + 1168 0034 0A40 ands r2, r1 + 1169 .LVL115: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1170 .loc 1 420 5 is_stmt 1 view .LVU401 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1171 .loc 1 420 8 is_stmt 0 view .LVU402 + 1172 0036 062A cmp r2, #6 + 1173 0038 07D0 beq .L45 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1174 .loc 1 422 7 is_stmt 1 view .LVU403 + 1175 003a 1A68 ldr r2, [r3] + 1176 .LVL116: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1177 .loc 1 422 7 is_stmt 0 view .LVU404 + 1178 003c 0121 movs r1, #1 + 1179 .LVL117: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1180 .loc 1 422 7 view .LVU405 + 1181 003e 0A43 orrs r2, r1 + 1182 0040 1A60 str r2, [r3] + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1183 .loc 1 431 10 view .LVU406 + 1184 0042 0020 movs r0, #0 + 1185 .LVL118: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1186 .loc 1 431 10 view .LVU407 + 1187 0044 00E0 b .L41 + 1188 .LVL119: + 1189 .L44: + ARM GAS /tmp/cchCqftX.s page 155 + + + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1190 .loc 1 410 12 view .LVU408 + 1191 0046 0120 movs r0, #1 + 1192 .LVL120: + 1193 .L41: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1194 .loc 1 432 1 view .LVU409 + 1195 @ sp needed + 1196 0048 7047 bx lr + 1197 .LVL121: + 1198 .L45: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1199 .loc 1 431 10 view .LVU410 + 1200 004a 0020 movs r0, #0 + 1201 .LVL122: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1202 .loc 1 431 10 view .LVU411 + 1203 004c FCE7 b .L41 + 1204 .L47: + 1205 004e C046 .align 2 + 1206 .L46: + 1207 0050 002C0140 .word 1073818624 + 1208 0054 00040040 .word 1073742848 + 1209 .cfi_endproc + 1210 .LFE44: + 1212 .section .text.HAL_TIM_Base_Stop,"ax",%progbits + 1213 .align 1 + 1214 .global HAL_TIM_Base_Stop + 1215 .syntax unified + 1216 .code 16 + 1217 .thumb_func + 1219 HAL_TIM_Base_Stop: + 1220 .LVL123: + 1221 .LFB45: + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1222 .loc 1 440 1 is_stmt 1 view -0 + 1223 .cfi_startproc + 1224 @ args = 0, pretend = 0, frame = 0 + 1225 @ frame_needed = 0, uses_anonymous_args = 0 + 1226 @ link register save eliminated. + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1227 .loc 1 442 3 view .LVU413 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1228 .loc 1 445 3 view .LVU414 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1229 .loc 1 445 3 view .LVU415 + 1230 0000 0368 ldr r3, [r0] + 1231 0002 196A ldr r1, [r3, #32] + 1232 0004 074A ldr r2, .L50 + 1233 0006 1142 tst r1, r2 + 1234 0008 07D1 bne .L49 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1235 .loc 1 445 3 discriminator 1 view .LVU416 + 1236 000a 196A ldr r1, [r3, #32] + 1237 000c 064A ldr r2, .L50+4 + 1238 000e 1142 tst r1, r2 + 1239 0010 03D1 bne .L49 + ARM GAS /tmp/cchCqftX.s page 156 + + + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1240 .loc 1 445 3 discriminator 3 view .LVU417 + 1241 0012 1A68 ldr r2, [r3] + 1242 0014 0121 movs r1, #1 + 1243 0016 8A43 bics r2, r1 + 1244 0018 1A60 str r2, [r3] + 1245 .L49: + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1246 .loc 1 445 3 discriminator 5 view .LVU418 + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1247 .loc 1 448 3 view .LVU419 + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1248 .loc 1 448 15 is_stmt 0 view .LVU420 + 1249 001a 3D23 movs r3, #61 + 1250 001c 0122 movs r2, #1 + 1251 001e C254 strb r2, [r0, r3] + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1252 .loc 1 451 3 is_stmt 1 view .LVU421 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1253 .loc 1 452 1 is_stmt 0 view .LVU422 + 1254 0020 0020 movs r0, #0 + 1255 .LVL124: + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1256 .loc 1 452 1 view .LVU423 + 1257 @ sp needed + 1258 0022 7047 bx lr + 1259 .L51: + 1260 .align 2 + 1261 .L50: + 1262 0024 11110000 .word 4369 + 1263 0028 44040000 .word 1092 + 1264 .cfi_endproc + 1265 .LFE45: + 1267 .section .text.HAL_TIM_Base_Start_IT,"ax",%progbits + 1268 .align 1 + 1269 .global HAL_TIM_Base_Start_IT + 1270 .syntax unified + 1271 .code 16 + 1272 .thumb_func + 1274 HAL_TIM_Base_Start_IT: + 1275 .LVL125: + 1276 .LFB46: + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 1277 .loc 1 460 1 is_stmt 1 view -0 + 1278 .cfi_startproc + 1279 @ args = 0, pretend = 0, frame = 0 + 1280 @ frame_needed = 0, uses_anonymous_args = 0 + 1281 @ link register save eliminated. + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1282 .loc 1 461 3 view .LVU425 + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1283 .loc 1 464 3 view .LVU426 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1284 .loc 1 467 3 view .LVU427 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1285 .loc 1 467 11 is_stmt 0 view .LVU428 + 1286 0000 3D23 movs r3, #61 + ARM GAS /tmp/cchCqftX.s page 157 + + + 1287 0002 C35C ldrb r3, [r0, r3] + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1288 .loc 1 467 6 view .LVU429 + 1289 0004 012B cmp r3, #1 + 1290 0006 23D1 bne .L56 + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1291 .loc 1 473 3 is_stmt 1 view .LVU430 + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1292 .loc 1 473 15 is_stmt 0 view .LVU431 + 1293 0008 3C33 adds r3, r3, #60 + 1294 000a 0222 movs r2, #2 + 1295 000c C254 strb r2, [r0, r3] + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1296 .loc 1 476 3 is_stmt 1 view .LVU432 + 1297 000e 0268 ldr r2, [r0] + 1298 0010 D368 ldr r3, [r2, #12] + 1299 0012 0121 movs r1, #1 + 1300 0014 0B43 orrs r3, r1 + 1301 0016 D360 str r3, [r2, #12] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1302 .loc 1 479 3 view .LVU433 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1303 .loc 1 479 7 is_stmt 0 view .LVU434 + 1304 0018 0368 ldr r3, [r0] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1305 .loc 1 479 6 view .LVU435 + 1306 001a 0F4A ldr r2, .L58 + 1307 001c 9342 cmp r3, r2 + 1308 001e 0CD0 beq .L54 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1309 .loc 1 479 7 discriminator 1 view .LVU436 + 1310 0020 8022 movs r2, #128 + 1311 0022 D205 lsls r2, r2, #23 + 1312 0024 9342 cmp r3, r2 + 1313 0026 08D0 beq .L54 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1314 .loc 1 479 7 discriminator 2 view .LVU437 + 1315 0028 0C4A ldr r2, .L58+4 + 1316 002a 9342 cmp r3, r2 + 1317 002c 05D0 beq .L54 + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1318 .loc 1 489 5 is_stmt 1 view .LVU438 + 1319 002e 1A68 ldr r2, [r3] + 1320 0030 0121 movs r1, #1 + 1321 0032 0A43 orrs r2, r1 + 1322 0034 1A60 str r2, [r3] + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1323 .loc 1 493 10 is_stmt 0 view .LVU439 + 1324 0036 0020 movs r0, #0 + 1325 .LVL126: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1326 .loc 1 493 10 view .LVU440 + 1327 0038 0BE0 b .L53 + 1328 .LVL127: + 1329 .L54: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1330 .loc 1 481 5 is_stmt 1 view .LVU441 + ARM GAS /tmp/cchCqftX.s page 158 + + + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1331 .loc 1 481 29 is_stmt 0 view .LVU442 + 1332 003a 9968 ldr r1, [r3, #8] + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1333 .loc 1 481 13 view .LVU443 + 1334 003c 0722 movs r2, #7 + 1335 003e 0A40 ands r2, r1 + 1336 .LVL128: + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1337 .loc 1 482 5 is_stmt 1 view .LVU444 + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1338 .loc 1 482 8 is_stmt 0 view .LVU445 + 1339 0040 062A cmp r2, #6 + 1340 0042 07D0 beq .L57 + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1341 .loc 1 484 7 is_stmt 1 view .LVU446 + 1342 0044 1A68 ldr r2, [r3] + 1343 .LVL129: + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1344 .loc 1 484 7 is_stmt 0 view .LVU447 + 1345 0046 0121 movs r1, #1 + 1346 .LVL130: + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1347 .loc 1 484 7 view .LVU448 + 1348 0048 0A43 orrs r2, r1 + 1349 004a 1A60 str r2, [r3] + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1350 .loc 1 493 10 view .LVU449 + 1351 004c 0020 movs r0, #0 + 1352 .LVL131: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1353 .loc 1 493 10 view .LVU450 + 1354 004e 00E0 b .L53 + 1355 .LVL132: + 1356 .L56: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1357 .loc 1 469 12 view .LVU451 + 1358 0050 0120 movs r0, #1 + 1359 .LVL133: + 1360 .L53: + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1361 .loc 1 494 1 view .LVU452 + 1362 @ sp needed + 1363 0052 7047 bx lr + 1364 .LVL134: + 1365 .L57: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1366 .loc 1 493 10 view .LVU453 + 1367 0054 0020 movs r0, #0 + 1368 .LVL135: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1369 .loc 1 493 10 view .LVU454 + 1370 0056 FCE7 b .L53 + 1371 .L59: + 1372 .align 2 + 1373 .L58: + 1374 0058 002C0140 .word 1073818624 + ARM GAS /tmp/cchCqftX.s page 159 + + + 1375 005c 00040040 .word 1073742848 + 1376 .cfi_endproc + 1377 .LFE46: + 1379 .section .text.HAL_TIM_Base_Stop_IT,"ax",%progbits + 1380 .align 1 + 1381 .global HAL_TIM_Base_Stop_IT + 1382 .syntax unified + 1383 .code 16 + 1384 .thumb_func + 1386 HAL_TIM_Base_Stop_IT: + 1387 .LVL136: + 1388 .LFB47: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1389 .loc 1 502 1 is_stmt 1 view -0 + 1390 .cfi_startproc + 1391 @ args = 0, pretend = 0, frame = 0 + 1392 @ frame_needed = 0, uses_anonymous_args = 0 + 1393 @ link register save eliminated. + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1394 .loc 1 504 3 view .LVU456 + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1395 .loc 1 507 3 view .LVU457 + 1396 0000 0268 ldr r2, [r0] + 1397 0002 D368 ldr r3, [r2, #12] + 1398 0004 0121 movs r1, #1 + 1399 0006 8B43 bics r3, r1 + 1400 0008 D360 str r3, [r2, #12] + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1401 .loc 1 510 3 view .LVU458 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1402 .loc 1 510 3 view .LVU459 + 1403 000a 0368 ldr r3, [r0] + 1404 000c 196A ldr r1, [r3, #32] + 1405 000e 084A ldr r2, .L62 + 1406 0010 1142 tst r1, r2 + 1407 0012 07D1 bne .L61 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1408 .loc 1 510 3 discriminator 1 view .LVU460 + 1409 0014 196A ldr r1, [r3, #32] + 1410 0016 074A ldr r2, .L62+4 + 1411 0018 1142 tst r1, r2 + 1412 001a 03D1 bne .L61 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1413 .loc 1 510 3 discriminator 3 view .LVU461 + 1414 001c 1A68 ldr r2, [r3] + 1415 001e 0121 movs r1, #1 + 1416 0020 8A43 bics r2, r1 + 1417 0022 1A60 str r2, [r3] + 1418 .L61: + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1419 .loc 1 510 3 discriminator 5 view .LVU462 + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1420 .loc 1 513 3 view .LVU463 + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1421 .loc 1 513 15 is_stmt 0 view .LVU464 + 1422 0024 3D23 movs r3, #61 + 1423 0026 0122 movs r2, #1 + ARM GAS /tmp/cchCqftX.s page 160 + + + 1424 0028 C254 strb r2, [r0, r3] + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1425 .loc 1 516 3 is_stmt 1 view .LVU465 + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1426 .loc 1 517 1 is_stmt 0 view .LVU466 + 1427 002a 0020 movs r0, #0 + 1428 .LVL137: + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1429 .loc 1 517 1 view .LVU467 + 1430 @ sp needed + 1431 002c 7047 bx lr + 1432 .L63: + 1433 002e C046 .align 2 + 1434 .L62: + 1435 0030 11110000 .word 4369 + 1436 0034 44040000 .word 1092 + 1437 .cfi_endproc + 1438 .LFE47: + 1440 .section .text.HAL_TIM_Base_Start_DMA,"ax",%progbits + 1441 .align 1 + 1442 .global HAL_TIM_Base_Start_DMA + 1443 .syntax unified + 1444 .code 16 + 1445 .thumb_func + 1447 HAL_TIM_Base_Start_DMA: + 1448 .LVL138: + 1449 .LFB48: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 1450 .loc 1 527 1 is_stmt 1 view -0 + 1451 .cfi_startproc + 1452 @ args = 0, pretend = 0, frame = 0 + 1453 @ frame_needed = 0, uses_anonymous_args = 0 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 1454 .loc 1 527 1 is_stmt 0 view .LVU469 + 1455 0000 70B5 push {r4, r5, r6, lr} + 1456 .cfi_def_cfa_offset 16 + 1457 .cfi_offset 4, -16 + 1458 .cfi_offset 5, -12 + 1459 .cfi_offset 6, -8 + 1460 .cfi_offset 14, -4 + 1461 0002 0400 movs r4, r0 + 1462 0004 1300 movs r3, r2 + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1463 .loc 1 528 3 is_stmt 1 view .LVU470 + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1464 .loc 1 531 3 view .LVU471 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1465 .loc 1 534 3 view .LVU472 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1466 .loc 1 534 11 is_stmt 0 view .LVU473 + 1467 0006 3D20 movs r0, #61 + 1468 .LVL139: + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1469 .loc 1 534 11 view .LVU474 + 1470 0008 205C ldrb r0, [r4, r0] + 1471 000a C5B2 uxtb r5, r0 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 161 + + + 1472 .loc 1 534 6 view .LVU475 + 1473 000c 0228 cmp r0, #2 + 1474 000e 3DD0 beq .L65 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1475 .loc 1 538 8 is_stmt 1 view .LVU476 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1476 .loc 1 538 16 is_stmt 0 view .LVU477 + 1477 0010 3D22 movs r2, #61 + 1478 .LVL140: + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1479 .loc 1 538 16 view .LVU478 + 1480 0012 A05C ldrb r0, [r4, r2] + 1481 0014 C5B2 uxtb r5, r0 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1482 .loc 1 538 11 view .LVU479 + 1483 0016 0128 cmp r0, #1 + 1484 0018 37D1 bne .L68 + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1485 .loc 1 540 5 is_stmt 1 view .LVU480 + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1486 .loc 1 540 8 is_stmt 0 view .LVU481 + 1487 001a 0029 cmp r1, #0 + 1488 001c 36D0 beq .L65 + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1489 .loc 1 540 25 discriminator 1 view .LVU482 + 1490 001e 002B cmp r3, #0 + 1491 0020 34D0 beq .L65 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1492 .loc 1 546 7 is_stmt 1 view .LVU483 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1493 .loc 1 546 19 is_stmt 0 view .LVU484 + 1494 0022 0130 adds r0, r0, #1 + 1495 0024 A054 strb r0, [r4, r2] + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1496 .loc 1 555 3 is_stmt 1 view .LVU485 + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1497 .loc 1 555 13 is_stmt 0 view .LVU486 + 1498 0026 226A ldr r2, [r4, #32] + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1499 .loc 1 555 51 view .LVU487 + 1500 0028 1A48 ldr r0, .L70 + 1501 002a 9062 str r0, [r2, #40] + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1502 .loc 1 556 3 is_stmt 1 view .LVU488 + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1503 .loc 1 556 13 is_stmt 0 view .LVU489 + 1504 002c 226A ldr r2, [r4, #32] + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1505 .loc 1 556 55 view .LVU490 + 1506 002e 1A48 ldr r0, .L70+4 + 1507 0030 D062 str r0, [r2, #44] + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1508 .loc 1 559 3 is_stmt 1 view .LVU491 + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1509 .loc 1 559 13 is_stmt 0 view .LVU492 + 1510 0032 226A ldr r2, [r4, #32] + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 162 + + + 1511 .loc 1 559 52 view .LVU493 + 1512 0034 1948 ldr r0, .L70+8 + 1513 0036 1063 str r0, [r2, #48] + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1514 .loc 1 562 3 is_stmt 1 view .LVU494 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1515 .loc 1 562 87 is_stmt 0 view .LVU495 + 1516 0038 2268 ldr r2, [r4] + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1517 .loc 1 562 82 view .LVU496 + 1518 003a 2C32 adds r2, r2, #44 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1519 .loc 1 562 7 view .LVU497 + 1520 003c 206A ldr r0, [r4, #32] + 1521 003e FFF7FEFF bl HAL_DMA_Start_IT + 1522 .LVL141: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1523 .loc 1 562 6 discriminator 1 view .LVU498 + 1524 0042 0028 cmp r0, #0 + 1525 0044 22D1 bne .L65 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1526 .loc 1 570 3 is_stmt 1 view .LVU499 + 1527 0046 2268 ldr r2, [r4] + 1528 0048 D168 ldr r1, [r2, #12] + 1529 004a 8023 movs r3, #128 + 1530 004c 5B00 lsls r3, r3, #1 + 1531 004e 0B43 orrs r3, r1 + 1532 0050 D360 str r3, [r2, #12] + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1533 .loc 1 573 3 view .LVU500 + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1534 .loc 1 573 7 is_stmt 0 view .LVU501 + 1535 0052 2368 ldr r3, [r4] + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1536 .loc 1 573 6 view .LVU502 + 1537 0054 124A ldr r2, .L70+12 + 1538 0056 9342 cmp r3, r2 + 1539 0058 0CD0 beq .L66 + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1540 .loc 1 573 7 discriminator 1 view .LVU503 + 1541 005a 8022 movs r2, #128 + 1542 005c D205 lsls r2, r2, #23 + 1543 005e 9342 cmp r3, r2 + 1544 0060 08D0 beq .L66 + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1545 .loc 1 573 7 discriminator 2 view .LVU504 + 1546 0062 104A ldr r2, .L70+16 + 1547 0064 9342 cmp r3, r2 + 1548 0066 05D0 beq .L66 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1549 .loc 1 583 5 is_stmt 1 view .LVU505 + 1550 0068 1A68 ldr r2, [r3] + 1551 006a 0121 movs r1, #1 + 1552 006c 0A43 orrs r2, r1 + 1553 006e 1A60 str r2, [r3] + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1554 .loc 1 587 10 is_stmt 0 view .LVU506 + ARM GAS /tmp/cchCqftX.s page 163 + + + 1555 0070 0500 movs r5, r0 + 1556 0072 0BE0 b .L65 + 1557 .L66: + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1558 .loc 1 575 5 is_stmt 1 view .LVU507 + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1559 .loc 1 575 29 is_stmt 0 view .LVU508 + 1560 0074 9968 ldr r1, [r3, #8] + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1561 .loc 1 575 13 view .LVU509 + 1562 0076 0722 movs r2, #7 + 1563 0078 0A40 ands r2, r1 + 1564 .LVL142: + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1565 .loc 1 576 5 is_stmt 1 view .LVU510 + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1566 .loc 1 576 8 is_stmt 0 view .LVU511 + 1567 007a 062A cmp r2, #6 + 1568 007c 08D0 beq .L69 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1569 .loc 1 578 7 is_stmt 1 view .LVU512 + 1570 007e 1A68 ldr r2, [r3] + 1571 .LVL143: + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1572 .loc 1 578 7 is_stmt 0 view .LVU513 + 1573 0080 0121 movs r1, #1 + 1574 .LVL144: + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1575 .loc 1 578 7 view .LVU514 + 1576 0082 0A43 orrs r2, r1 + 1577 0084 1A60 str r2, [r3] + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1578 .loc 1 587 10 view .LVU515 + 1579 0086 0500 movs r5, r0 + 1580 0088 00E0 b .L65 + 1581 .LVL145: + 1582 .L68: + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1583 .loc 1 551 12 view .LVU516 + 1584 008a 0125 movs r5, #1 + 1585 .LVL146: + 1586 .L65: + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1587 .loc 1 588 1 view .LVU517 + 1588 008c 2800 movs r0, r5 + 1589 @ sp needed + 1590 .LVL147: + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1591 .loc 1 588 1 view .LVU518 + 1592 008e 70BD pop {r4, r5, r6, pc} + 1593 .LVL148: + 1594 .L69: + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1595 .loc 1 587 10 view .LVU519 + 1596 0090 0500 movs r5, r0 + 1597 0092 FBE7 b .L65 + 1598 .L71: + ARM GAS /tmp/cchCqftX.s page 164 + + + 1599 .align 2 + 1600 .L70: + 1601 0094 00000000 .word TIM_DMAPeriodElapsedCplt + 1602 0098 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 1603 009c 00000000 .word TIM_DMAError + 1604 00a0 002C0140 .word 1073818624 + 1605 00a4 00040040 .word 1073742848 + 1606 .cfi_endproc + 1607 .LFE48: + 1609 .section .text.HAL_TIM_Base_Stop_DMA,"ax",%progbits + 1610 .align 1 + 1611 .global HAL_TIM_Base_Stop_DMA + 1612 .syntax unified + 1613 .code 16 + 1614 .thumb_func + 1616 HAL_TIM_Base_Stop_DMA: + 1617 .LVL149: + 1618 .LFB49: + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1619 .loc 1 596 1 is_stmt 1 view -0 + 1620 .cfi_startproc + 1621 @ args = 0, pretend = 0, frame = 0 + 1622 @ frame_needed = 0, uses_anonymous_args = 0 + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1623 .loc 1 596 1 is_stmt 0 view .LVU521 + 1624 0000 10B5 push {r4, lr} + 1625 .cfi_def_cfa_offset 8 + 1626 .cfi_offset 4, -8 + 1627 .cfi_offset 14, -4 + 1628 0002 0400 movs r4, r0 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1629 .loc 1 598 3 is_stmt 1 view .LVU522 + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1630 .loc 1 601 3 view .LVU523 + 1631 0004 0268 ldr r2, [r0] + 1632 0006 D368 ldr r3, [r2, #12] + 1633 0008 0B49 ldr r1, .L74 + 1634 000a 0B40 ands r3, r1 + 1635 000c D360 str r3, [r2, #12] + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1636 .loc 1 603 3 view .LVU524 + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1637 .loc 1 603 9 is_stmt 0 view .LVU525 + 1638 000e 006A ldr r0, [r0, #32] + 1639 .LVL150: + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1640 .loc 1 603 9 view .LVU526 + 1641 0010 FFF7FEFF bl HAL_DMA_Abort_IT + 1642 .LVL151: + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1643 .loc 1 606 3 is_stmt 1 view .LVU527 + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1644 .loc 1 606 3 view .LVU528 + 1645 0014 2368 ldr r3, [r4] + 1646 0016 196A ldr r1, [r3, #32] + 1647 0018 084A ldr r2, .L74+4 + 1648 001a 1142 tst r1, r2 + ARM GAS /tmp/cchCqftX.s page 165 + + + 1649 001c 07D1 bne .L73 + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1650 .loc 1 606 3 discriminator 1 view .LVU529 + 1651 001e 196A ldr r1, [r3, #32] + 1652 0020 074A ldr r2, .L74+8 + 1653 0022 1142 tst r1, r2 + 1654 0024 03D1 bne .L73 + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1655 .loc 1 606 3 discriminator 3 view .LVU530 + 1656 0026 1A68 ldr r2, [r3] + 1657 0028 0121 movs r1, #1 + 1658 002a 8A43 bics r2, r1 + 1659 002c 1A60 str r2, [r3] + 1660 .L73: + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1661 .loc 1 606 3 discriminator 5 view .LVU531 + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1662 .loc 1 609 3 view .LVU532 + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1663 .loc 1 609 15 is_stmt 0 view .LVU533 + 1664 002e 3D23 movs r3, #61 + 1665 0030 0122 movs r2, #1 + 1666 0032 E254 strb r2, [r4, r3] + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1667 .loc 1 612 3 is_stmt 1 view .LVU534 + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1668 .loc 1 613 1 is_stmt 0 view .LVU535 + 1669 0034 0020 movs r0, #0 + 1670 @ sp needed + 1671 .LVL152: + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1672 .loc 1 613 1 view .LVU536 + 1673 0036 10BD pop {r4, pc} + 1674 .L75: + 1675 .align 2 + 1676 .L74: + 1677 0038 FFFEFFFF .word -257 + 1678 003c 11110000 .word 4369 + 1679 0040 44040000 .word 1092 + 1680 .cfi_endproc + 1681 .LFE49: + 1683 .section .text.HAL_TIM_OC_MspInit,"ax",%progbits + 1684 .align 1 + 1685 .weak HAL_TIM_OC_MspInit + 1686 .syntax unified + 1687 .code 16 + 1688 .thumb_func + 1690 HAL_TIM_OC_MspInit: + 1691 .LVL153: + 1692 .LFB52: + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1693 .loc 1 754 1 is_stmt 1 view -0 + 1694 .cfi_startproc + 1695 @ args = 0, pretend = 0, frame = 0 + 1696 @ frame_needed = 0, uses_anonymous_args = 0 + 1697 @ link register save eliminated. + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 166 + + + 1698 .loc 1 756 3 view .LVU538 + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1699 .loc 1 761 1 is_stmt 0 view .LVU539 + 1700 @ sp needed + 1701 0000 7047 bx lr + 1702 .cfi_endproc + 1703 .LFE52: + 1705 .section .text.HAL_TIM_OC_MspDeInit,"ax",%progbits + 1706 .align 1 + 1707 .weak HAL_TIM_OC_MspDeInit + 1708 .syntax unified + 1709 .code 16 + 1710 .thumb_func + 1712 HAL_TIM_OC_MspDeInit: + 1713 .LVL154: + 1714 .LFB53: + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1715 .loc 1 769 1 is_stmt 1 view -0 + 1716 .cfi_startproc + 1717 @ args = 0, pretend = 0, frame = 0 + 1718 @ frame_needed = 0, uses_anonymous_args = 0 + 1719 @ link register save eliminated. + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1720 .loc 1 771 3 view .LVU541 + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1721 .loc 1 776 1 is_stmt 0 view .LVU542 + 1722 @ sp needed + 1723 0000 7047 bx lr + 1724 .cfi_endproc + 1725 .LFE53: + 1727 .section .text.HAL_TIM_OC_DeInit,"ax",%progbits + 1728 .align 1 + 1729 .global HAL_TIM_OC_DeInit + 1730 .syntax unified + 1731 .code 16 + 1732 .thumb_func + 1734 HAL_TIM_OC_DeInit: + 1735 .LVL155: + 1736 .LFB51: + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1737 .loc 1 711 1 is_stmt 1 view -0 + 1738 .cfi_startproc + 1739 @ args = 0, pretend = 0, frame = 0 + 1740 @ frame_needed = 0, uses_anonymous_args = 0 + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1741 .loc 1 711 1 is_stmt 0 view .LVU544 + 1742 0000 10B5 push {r4, lr} + 1743 .cfi_def_cfa_offset 8 + 1744 .cfi_offset 4, -8 + 1745 .cfi_offset 14, -4 + 1746 0002 0400 movs r4, r0 + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1747 .loc 1 713 3 is_stmt 1 view .LVU545 + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1748 .loc 1 715 3 view .LVU546 + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1749 .loc 1 715 15 is_stmt 0 view .LVU547 + ARM GAS /tmp/cchCqftX.s page 167 + + + 1750 0004 3D23 movs r3, #61 + 1751 0006 0222 movs r2, #2 + 1752 0008 C254 strb r2, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1753 .loc 1 718 3 is_stmt 1 view .LVU548 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1754 .loc 1 718 3 view .LVU549 + 1755 000a 0368 ldr r3, [r0] + 1756 000c 196A ldr r1, [r3, #32] + 1757 000e 134A ldr r2, .L80 + 1758 0010 1142 tst r1, r2 + 1759 0012 07D1 bne .L79 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1760 .loc 1 718 3 discriminator 1 view .LVU550 + 1761 0014 196A ldr r1, [r3, #32] + 1762 0016 124A ldr r2, .L80+4 + 1763 0018 1142 tst r1, r2 + 1764 001a 03D1 bne .L79 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1765 .loc 1 718 3 discriminator 3 view .LVU551 + 1766 001c 1A68 ldr r2, [r3] + 1767 001e 0121 movs r1, #1 + 1768 0020 8A43 bics r2, r1 + 1769 0022 1A60 str r2, [r3] + 1770 .L79: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1771 .loc 1 718 3 discriminator 5 view .LVU552 + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1772 .loc 1 729 3 view .LVU553 + 1773 0024 2000 movs r0, r4 + 1774 .LVL156: + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1775 .loc 1 729 3 is_stmt 0 view .LVU554 + 1776 0026 FFF7FEFF bl HAL_TIM_OC_MspDeInit + 1777 .LVL157: + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1778 .loc 1 733 3 is_stmt 1 view .LVU555 + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1779 .loc 1 733 23 is_stmt 0 view .LVU556 + 1780 002a 0023 movs r3, #0 + 1781 002c 4622 movs r2, #70 + 1782 002e A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1783 .loc 1 736 3 is_stmt 1 view .LVU557 + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1784 .loc 1 736 3 view .LVU558 + 1785 0030 083A subs r2, r2, #8 + 1786 0032 A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1787 .loc 1 736 3 view .LVU559 + 1788 0034 0132 adds r2, r2, #1 + 1789 0036 A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1790 .loc 1 736 3 view .LVU560 + 1791 0038 0132 adds r2, r2, #1 + 1792 003a A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + ARM GAS /tmp/cchCqftX.s page 168 + + + 1793 .loc 1 736 3 view .LVU561 + 1794 003c 0132 adds r2, r2, #1 + 1795 003e A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1796 .loc 1 736 3 view .LVU562 + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1797 .loc 1 737 3 view .LVU563 + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1798 .loc 1 737 3 view .LVU564 + 1799 0040 0132 adds r2, r2, #1 + 1800 0042 A354 strb r3, [r4, r2] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1801 .loc 1 737 3 view .LVU565 + 1802 0044 0132 adds r2, r2, #1 + 1803 0046 A354 strb r3, [r4, r2] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1804 .loc 1 737 3 view .LVU566 + 1805 0048 0132 adds r2, r2, #1 + 1806 004a A354 strb r3, [r4, r2] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1807 .loc 1 737 3 view .LVU567 + 1808 004c 0132 adds r2, r2, #1 + 1809 004e A354 strb r3, [r4, r2] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1810 .loc 1 737 3 view .LVU568 + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1811 .loc 1 740 3 view .LVU569 + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1812 .loc 1 740 15 is_stmt 0 view .LVU570 + 1813 0050 083A subs r2, r2, #8 + 1814 0052 A354 strb r3, [r4, r2] + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1815 .loc 1 743 3 is_stmt 1 view .LVU571 + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1816 .loc 1 743 3 view .LVU572 + 1817 0054 013A subs r2, r2, #1 + 1818 0056 A354 strb r3, [r4, r2] + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1819 .loc 1 743 3 view .LVU573 + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1820 .loc 1 745 3 view .LVU574 + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1821 .loc 1 746 1 is_stmt 0 view .LVU575 + 1822 0058 0020 movs r0, #0 + 1823 @ sp needed + 1824 .LVL158: + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1825 .loc 1 746 1 view .LVU576 + 1826 005a 10BD pop {r4, pc} + 1827 .L81: + 1828 .align 2 + 1829 .L80: + 1830 005c 11110000 .word 4369 + 1831 0060 44040000 .word 1092 + 1832 .cfi_endproc + 1833 .LFE51: + 1835 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits + ARM GAS /tmp/cchCqftX.s page 169 + + + 1836 .align 1 + 1837 .weak HAL_TIM_PWM_MspInit + 1838 .syntax unified + 1839 .code 16 + 1840 .thumb_func + 1842 HAL_TIM_PWM_MspInit: + 1843 .LVL159: + 1844 .LFB62: +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1845 .loc 1 1419 1 is_stmt 1 view -0 + 1846 .cfi_startproc + 1847 @ args = 0, pretend = 0, frame = 0 + 1848 @ frame_needed = 0, uses_anonymous_args = 0 + 1849 @ link register save eliminated. +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1850 .loc 1 1421 3 view .LVU578 +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1851 .loc 1 1426 1 is_stmt 0 view .LVU579 + 1852 @ sp needed + 1853 0000 7047 bx lr + 1854 .cfi_endproc + 1855 .LFE62: + 1857 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits + 1858 .align 1 + 1859 .weak HAL_TIM_PWM_MspDeInit + 1860 .syntax unified + 1861 .code 16 + 1862 .thumb_func + 1864 HAL_TIM_PWM_MspDeInit: + 1865 .LVL160: + 1866 .LFB63: +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1867 .loc 1 1434 1 is_stmt 1 view -0 + 1868 .cfi_startproc + 1869 @ args = 0, pretend = 0, frame = 0 + 1870 @ frame_needed = 0, uses_anonymous_args = 0 + 1871 @ link register save eliminated. +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1872 .loc 1 1436 3 view .LVU581 +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1873 .loc 1 1441 1 is_stmt 0 view .LVU582 + 1874 @ sp needed + 1875 0000 7047 bx lr + 1876 .cfi_endproc + 1877 .LFE63: + 1879 .section .text.HAL_TIM_PWM_DeInit,"ax",%progbits + 1880 .align 1 + 1881 .global HAL_TIM_PWM_DeInit + 1882 .syntax unified + 1883 .code 16 + 1884 .thumb_func + 1886 HAL_TIM_PWM_DeInit: + 1887 .LVL161: + 1888 .LFB61: +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1889 .loc 1 1376 1 is_stmt 1 view -0 + 1890 .cfi_startproc + ARM GAS /tmp/cchCqftX.s page 170 + + + 1891 @ args = 0, pretend = 0, frame = 0 + 1892 @ frame_needed = 0, uses_anonymous_args = 0 +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1893 .loc 1 1376 1 is_stmt 0 view .LVU584 + 1894 0000 10B5 push {r4, lr} + 1895 .cfi_def_cfa_offset 8 + 1896 .cfi_offset 4, -8 + 1897 .cfi_offset 14, -4 + 1898 0002 0400 movs r4, r0 +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1899 .loc 1 1378 3 is_stmt 1 view .LVU585 +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1900 .loc 1 1380 3 view .LVU586 +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1901 .loc 1 1380 15 is_stmt 0 view .LVU587 + 1902 0004 3D23 movs r3, #61 + 1903 0006 0222 movs r2, #2 + 1904 0008 C254 strb r2, [r0, r3] +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1905 .loc 1 1383 3 is_stmt 1 view .LVU588 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1906 .loc 1 1383 3 view .LVU589 + 1907 000a 0368 ldr r3, [r0] + 1908 000c 196A ldr r1, [r3, #32] + 1909 000e 134A ldr r2, .L86 + 1910 0010 1142 tst r1, r2 + 1911 0012 07D1 bne .L85 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1912 .loc 1 1383 3 discriminator 1 view .LVU590 + 1913 0014 196A ldr r1, [r3, #32] + 1914 0016 124A ldr r2, .L86+4 + 1915 0018 1142 tst r1, r2 + 1916 001a 03D1 bne .L85 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1917 .loc 1 1383 3 discriminator 3 view .LVU591 + 1918 001c 1A68 ldr r2, [r3] + 1919 001e 0121 movs r1, #1 + 1920 0020 8A43 bics r2, r1 + 1921 0022 1A60 str r2, [r3] + 1922 .L85: +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1923 .loc 1 1383 3 discriminator 5 view .LVU592 +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1924 .loc 1 1394 3 view .LVU593 + 1925 0024 2000 movs r0, r4 + 1926 .LVL162: +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1927 .loc 1 1394 3 is_stmt 0 view .LVU594 + 1928 0026 FFF7FEFF bl HAL_TIM_PWM_MspDeInit + 1929 .LVL163: +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1930 .loc 1 1398 3 is_stmt 1 view .LVU595 +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1931 .loc 1 1398 23 is_stmt 0 view .LVU596 + 1932 002a 0023 movs r3, #0 + 1933 002c 4622 movs r2, #70 + 1934 002e A354 strb r3, [r4, r2] + ARM GAS /tmp/cchCqftX.s page 171 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1935 .loc 1 1401 3 is_stmt 1 view .LVU597 +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1936 .loc 1 1401 3 view .LVU598 + 1937 0030 083A subs r2, r2, #8 + 1938 0032 A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1939 .loc 1 1401 3 view .LVU599 + 1940 0034 0132 adds r2, r2, #1 + 1941 0036 A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1942 .loc 1 1401 3 view .LVU600 + 1943 0038 0132 adds r2, r2, #1 + 1944 003a A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1945 .loc 1 1401 3 view .LVU601 + 1946 003c 0132 adds r2, r2, #1 + 1947 003e A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1948 .loc 1 1401 3 view .LVU602 +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1949 .loc 1 1402 3 view .LVU603 +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1950 .loc 1 1402 3 view .LVU604 + 1951 0040 0132 adds r2, r2, #1 + 1952 0042 A354 strb r3, [r4, r2] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1953 .loc 1 1402 3 view .LVU605 + 1954 0044 0132 adds r2, r2, #1 + 1955 0046 A354 strb r3, [r4, r2] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1956 .loc 1 1402 3 view .LVU606 + 1957 0048 0132 adds r2, r2, #1 + 1958 004a A354 strb r3, [r4, r2] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1959 .loc 1 1402 3 view .LVU607 + 1960 004c 0132 adds r2, r2, #1 + 1961 004e A354 strb r3, [r4, r2] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1962 .loc 1 1402 3 view .LVU608 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1963 .loc 1 1405 3 view .LVU609 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1964 .loc 1 1405 15 is_stmt 0 view .LVU610 + 1965 0050 083A subs r2, r2, #8 + 1966 0052 A354 strb r3, [r4, r2] +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1967 .loc 1 1408 3 is_stmt 1 view .LVU611 +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1968 .loc 1 1408 3 view .LVU612 + 1969 0054 013A subs r2, r2, #1 + 1970 0056 A354 strb r3, [r4, r2] +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1971 .loc 1 1408 3 view .LVU613 +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1972 .loc 1 1410 3 view .LVU614 +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 172 + + + 1973 .loc 1 1411 1 is_stmt 0 view .LVU615 + 1974 0058 0020 movs r0, #0 + 1975 @ sp needed + 1976 .LVL164: +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1977 .loc 1 1411 1 view .LVU616 + 1978 005a 10BD pop {r4, pc} + 1979 .L87: + 1980 .align 2 + 1981 .L86: + 1982 005c 11110000 .word 4369 + 1983 0060 44040000 .word 1092 + 1984 .cfi_endproc + 1985 .LFE61: + 1987 .section .text.HAL_TIM_IC_MspInit,"ax",%progbits + 1988 .align 1 + 1989 .weak HAL_TIM_IC_MspInit + 1990 .syntax unified + 1991 .code 16 + 1992 .thumb_func + 1994 HAL_TIM_IC_MspInit: + 1995 .LVL165: + 1996 .LFB72: +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1997 .loc 1 2083 1 is_stmt 1 view -0 + 1998 .cfi_startproc + 1999 @ args = 0, pretend = 0, frame = 0 + 2000 @ frame_needed = 0, uses_anonymous_args = 0 + 2001 @ link register save eliminated. +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2002 .loc 1 2085 3 view .LVU618 +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2003 .loc 1 2090 1 is_stmt 0 view .LVU619 + 2004 @ sp needed + 2005 0000 7047 bx lr + 2006 .cfi_endproc + 2007 .LFE72: + 2009 .section .text.HAL_TIM_IC_MspDeInit,"ax",%progbits + 2010 .align 1 + 2011 .weak HAL_TIM_IC_MspDeInit + 2012 .syntax unified + 2013 .code 16 + 2014 .thumb_func + 2016 HAL_TIM_IC_MspDeInit: + 2017 .LVL166: + 2018 .LFB73: +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2019 .loc 1 2098 1 is_stmt 1 view -0 + 2020 .cfi_startproc + 2021 @ args = 0, pretend = 0, frame = 0 + 2022 @ frame_needed = 0, uses_anonymous_args = 0 + 2023 @ link register save eliminated. +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2024 .loc 1 2100 3 view .LVU621 +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2025 .loc 1 2105 1 is_stmt 0 view .LVU622 + 2026 @ sp needed + ARM GAS /tmp/cchCqftX.s page 173 + + + 2027 0000 7047 bx lr + 2028 .cfi_endproc + 2029 .LFE73: + 2031 .section .text.HAL_TIM_IC_DeInit,"ax",%progbits + 2032 .align 1 + 2033 .global HAL_TIM_IC_DeInit + 2034 .syntax unified + 2035 .code 16 + 2036 .thumb_func + 2038 HAL_TIM_IC_DeInit: + 2039 .LVL167: + 2040 .LFB71: +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2041 .loc 1 2040 1 is_stmt 1 view -0 + 2042 .cfi_startproc + 2043 @ args = 0, pretend = 0, frame = 0 + 2044 @ frame_needed = 0, uses_anonymous_args = 0 +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2045 .loc 1 2040 1 is_stmt 0 view .LVU624 + 2046 0000 10B5 push {r4, lr} + 2047 .cfi_def_cfa_offset 8 + 2048 .cfi_offset 4, -8 + 2049 .cfi_offset 14, -4 + 2050 0002 0400 movs r4, r0 +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2051 .loc 1 2042 3 is_stmt 1 view .LVU625 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2052 .loc 1 2044 3 view .LVU626 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2053 .loc 1 2044 15 is_stmt 0 view .LVU627 + 2054 0004 3D23 movs r3, #61 + 2055 0006 0222 movs r2, #2 + 2056 0008 C254 strb r2, [r0, r3] +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2057 .loc 1 2047 3 is_stmt 1 view .LVU628 +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2058 .loc 1 2047 3 view .LVU629 + 2059 000a 0368 ldr r3, [r0] + 2060 000c 196A ldr r1, [r3, #32] + 2061 000e 134A ldr r2, .L92 + 2062 0010 1142 tst r1, r2 + 2063 0012 07D1 bne .L91 +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2064 .loc 1 2047 3 discriminator 1 view .LVU630 + 2065 0014 196A ldr r1, [r3, #32] + 2066 0016 124A ldr r2, .L92+4 + 2067 0018 1142 tst r1, r2 + 2068 001a 03D1 bne .L91 +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2069 .loc 1 2047 3 discriminator 3 view .LVU631 + 2070 001c 1A68 ldr r2, [r3] + 2071 001e 0121 movs r1, #1 + 2072 0020 8A43 bics r2, r1 + 2073 0022 1A60 str r2, [r3] + 2074 .L91: +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2075 .loc 1 2047 3 discriminator 5 view .LVU632 + ARM GAS /tmp/cchCqftX.s page 174 + + +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2076 .loc 1 2058 3 view .LVU633 + 2077 0024 2000 movs r0, r4 + 2078 .LVL168: +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2079 .loc 1 2058 3 is_stmt 0 view .LVU634 + 2080 0026 FFF7FEFF bl HAL_TIM_IC_MspDeInit + 2081 .LVL169: +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2082 .loc 1 2062 3 is_stmt 1 view .LVU635 +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2083 .loc 1 2062 23 is_stmt 0 view .LVU636 + 2084 002a 0023 movs r3, #0 + 2085 002c 4622 movs r2, #70 + 2086 002e A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2087 .loc 1 2065 3 is_stmt 1 view .LVU637 +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2088 .loc 1 2065 3 view .LVU638 + 2089 0030 083A subs r2, r2, #8 + 2090 0032 A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2091 .loc 1 2065 3 view .LVU639 + 2092 0034 0132 adds r2, r2, #1 + 2093 0036 A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2094 .loc 1 2065 3 view .LVU640 + 2095 0038 0132 adds r2, r2, #1 + 2096 003a A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2097 .loc 1 2065 3 view .LVU641 + 2098 003c 0132 adds r2, r2, #1 + 2099 003e A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2100 .loc 1 2065 3 view .LVU642 +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2101 .loc 1 2066 3 view .LVU643 +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2102 .loc 1 2066 3 view .LVU644 + 2103 0040 0132 adds r2, r2, #1 + 2104 0042 A354 strb r3, [r4, r2] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2105 .loc 1 2066 3 view .LVU645 + 2106 0044 0132 adds r2, r2, #1 + 2107 0046 A354 strb r3, [r4, r2] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2108 .loc 1 2066 3 view .LVU646 + 2109 0048 0132 adds r2, r2, #1 + 2110 004a A354 strb r3, [r4, r2] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2111 .loc 1 2066 3 view .LVU647 + 2112 004c 0132 adds r2, r2, #1 + 2113 004e A354 strb r3, [r4, r2] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2114 .loc 1 2066 3 view .LVU648 +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2115 .loc 1 2069 3 view .LVU649 + ARM GAS /tmp/cchCqftX.s page 175 + + +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2116 .loc 1 2069 15 is_stmt 0 view .LVU650 + 2117 0050 083A subs r2, r2, #8 + 2118 0052 A354 strb r3, [r4, r2] +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2119 .loc 1 2072 3 is_stmt 1 view .LVU651 +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2120 .loc 1 2072 3 view .LVU652 + 2121 0054 013A subs r2, r2, #1 + 2122 0056 A354 strb r3, [r4, r2] +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2123 .loc 1 2072 3 view .LVU653 +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2124 .loc 1 2074 3 view .LVU654 +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2125 .loc 1 2075 1 is_stmt 0 view .LVU655 + 2126 0058 0020 movs r0, #0 + 2127 @ sp needed + 2128 .LVL170: +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2129 .loc 1 2075 1 view .LVU656 + 2130 005a 10BD pop {r4, pc} + 2131 .L93: + 2132 .align 2 + 2133 .L92: + 2134 005c 11110000 .word 4369 + 2135 0060 44040000 .word 1092 + 2136 .cfi_endproc + 2137 .LFE71: + 2139 .section .text.HAL_TIM_OnePulse_MspInit,"ax",%progbits + 2140 .align 1 + 2141 .weak HAL_TIM_OnePulse_MspInit + 2142 .syntax unified + 2143 .code 16 + 2144 .thumb_func + 2146 HAL_TIM_OnePulse_MspInit: + 2147 .LVL171: + 2148 .LFB82: +2743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2149 .loc 1 2743 1 is_stmt 1 view -0 + 2150 .cfi_startproc + 2151 @ args = 0, pretend = 0, frame = 0 + 2152 @ frame_needed = 0, uses_anonymous_args = 0 + 2153 @ link register save eliminated. +2745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2154 .loc 1 2745 3 view .LVU658 +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2155 .loc 1 2750 1 is_stmt 0 view .LVU659 + 2156 @ sp needed + 2157 0000 7047 bx lr + 2158 .cfi_endproc + 2159 .LFE82: + 2161 .section .text.HAL_TIM_OnePulse_MspDeInit,"ax",%progbits + 2162 .align 1 + 2163 .weak HAL_TIM_OnePulse_MspDeInit + 2164 .syntax unified + 2165 .code 16 + ARM GAS /tmp/cchCqftX.s page 176 + + + 2166 .thumb_func + 2168 HAL_TIM_OnePulse_MspDeInit: + 2169 .LVL172: + 2170 .LFB83: +2758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2171 .loc 1 2758 1 is_stmt 1 view -0 + 2172 .cfi_startproc + 2173 @ args = 0, pretend = 0, frame = 0 + 2174 @ frame_needed = 0, uses_anonymous_args = 0 + 2175 @ link register save eliminated. +2760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2176 .loc 1 2760 3 view .LVU661 +2765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2177 .loc 1 2765 1 is_stmt 0 view .LVU662 + 2178 @ sp needed + 2179 0000 7047 bx lr + 2180 .cfi_endproc + 2181 .LFE83: + 2183 .section .text.HAL_TIM_OnePulse_DeInit,"ax",%progbits + 2184 .align 1 + 2185 .global HAL_TIM_OnePulse_DeInit + 2186 .syntax unified + 2187 .code 16 + 2188 .thumb_func + 2190 HAL_TIM_OnePulse_DeInit: + 2191 .LVL173: + 2192 .LFB81: +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2193 .loc 1 2698 1 is_stmt 1 view -0 + 2194 .cfi_startproc + 2195 @ args = 0, pretend = 0, frame = 0 + 2196 @ frame_needed = 0, uses_anonymous_args = 0 +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2197 .loc 1 2698 1 is_stmt 0 view .LVU664 + 2198 0000 10B5 push {r4, lr} + 2199 .cfi_def_cfa_offset 8 + 2200 .cfi_offset 4, -8 + 2201 .cfi_offset 14, -4 + 2202 0002 0400 movs r4, r0 +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2203 .loc 1 2700 3 is_stmt 1 view .LVU665 +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2204 .loc 1 2702 3 view .LVU666 +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2205 .loc 1 2702 15 is_stmt 0 view .LVU667 + 2206 0004 3D23 movs r3, #61 + 2207 0006 0222 movs r2, #2 + 2208 0008 C254 strb r2, [r0, r3] +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2209 .loc 1 2705 3 is_stmt 1 view .LVU668 +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2210 .loc 1 2705 3 view .LVU669 + 2211 000a 0368 ldr r3, [r0] + 2212 000c 196A ldr r1, [r3, #32] + 2213 000e 0F4A ldr r2, .L98 + 2214 0010 1142 tst r1, r2 + 2215 0012 07D1 bne .L97 + ARM GAS /tmp/cchCqftX.s page 177 + + +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2216 .loc 1 2705 3 discriminator 1 view .LVU670 + 2217 0014 196A ldr r1, [r3, #32] + 2218 0016 0E4A ldr r2, .L98+4 + 2219 0018 1142 tst r1, r2 + 2220 001a 03D1 bne .L97 +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2221 .loc 1 2705 3 discriminator 3 view .LVU671 + 2222 001c 1A68 ldr r2, [r3] + 2223 001e 0121 movs r1, #1 + 2224 0020 8A43 bics r2, r1 + 2225 0022 1A60 str r2, [r3] + 2226 .L97: +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2227 .loc 1 2705 3 discriminator 5 view .LVU672 +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2228 .loc 1 2716 3 view .LVU673 + 2229 0024 2000 movs r0, r4 + 2230 .LVL174: +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2231 .loc 1 2716 3 is_stmt 0 view .LVU674 + 2232 0026 FFF7FEFF bl HAL_TIM_OnePulse_MspDeInit + 2233 .LVL175: +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2234 .loc 1 2720 3 is_stmt 1 view .LVU675 +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2235 .loc 1 2720 23 is_stmt 0 view .LVU676 + 2236 002a 0023 movs r3, #0 + 2237 002c 4622 movs r2, #70 + 2238 002e A354 strb r3, [r4, r2] +2723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2239 .loc 1 2723 3 is_stmt 1 view .LVU677 + 2240 0030 083A subs r2, r2, #8 + 2241 0032 A354 strb r3, [r4, r2] +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 2242 .loc 1 2724 3 view .LVU678 + 2243 0034 0132 adds r2, r2, #1 + 2244 0036 A354 strb r3, [r4, r2] +2725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2245 .loc 1 2725 3 view .LVU679 + 2246 0038 0332 adds r2, r2, #3 + 2247 003a A354 strb r3, [r4, r2] +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2248 .loc 1 2726 3 view .LVU680 + 2249 003c 0132 adds r2, r2, #1 + 2250 003e A354 strb r3, [r4, r2] +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2251 .loc 1 2729 3 view .LVU681 +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2252 .loc 1 2729 15 is_stmt 0 view .LVU682 + 2253 0040 063A subs r2, r2, #6 + 2254 0042 A354 strb r3, [r4, r2] +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2255 .loc 1 2732 3 is_stmt 1 view .LVU683 +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2256 .loc 1 2732 3 view .LVU684 + 2257 0044 013A subs r2, r2, #1 + ARM GAS /tmp/cchCqftX.s page 178 + + + 2258 0046 A354 strb r3, [r4, r2] +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2259 .loc 1 2732 3 view .LVU685 +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2260 .loc 1 2734 3 view .LVU686 +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2261 .loc 1 2735 1 is_stmt 0 view .LVU687 + 2262 0048 0020 movs r0, #0 + 2263 @ sp needed + 2264 .LVL176: +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2265 .loc 1 2735 1 view .LVU688 + 2266 004a 10BD pop {r4, pc} + 2267 .L99: + 2268 .align 2 + 2269 .L98: + 2270 004c 11110000 .word 4369 + 2271 0050 44040000 .word 1092 + 2272 .cfi_endproc + 2273 .LFE81: + 2275 .section .text.HAL_TIM_Encoder_MspInit,"ax",%progbits + 2276 .align 1 + 2277 .weak HAL_TIM_Encoder_MspInit + 2278 .syntax unified + 2279 .code 16 + 2280 .thumb_func + 2282 HAL_TIM_Encoder_MspInit: + 2283 .LVL177: + 2284 .LFB90: +3180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2285 .loc 1 3180 1 is_stmt 1 view -0 + 2286 .cfi_startproc + 2287 @ args = 0, pretend = 0, frame = 0 + 2288 @ frame_needed = 0, uses_anonymous_args = 0 + 2289 @ link register save eliminated. +3182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2290 .loc 1 3182 3 view .LVU690 +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2291 .loc 1 3187 1 is_stmt 0 view .LVU691 + 2292 @ sp needed + 2293 0000 7047 bx lr + 2294 .cfi_endproc + 2295 .LFE90: + 2297 .section .text.HAL_TIM_Encoder_MspDeInit,"ax",%progbits + 2298 .align 1 + 2299 .weak HAL_TIM_Encoder_MspDeInit + 2300 .syntax unified + 2301 .code 16 + 2302 .thumb_func + 2304 HAL_TIM_Encoder_MspDeInit: + 2305 .LVL178: + 2306 .LFB91: +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2307 .loc 1 3195 1 is_stmt 1 view -0 + 2308 .cfi_startproc + 2309 @ args = 0, pretend = 0, frame = 0 + 2310 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cchCqftX.s page 179 + + + 2311 @ link register save eliminated. +3197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2312 .loc 1 3197 3 view .LVU693 +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2313 .loc 1 3202 1 is_stmt 0 view .LVU694 + 2314 @ sp needed + 2315 0000 7047 bx lr + 2316 .cfi_endproc + 2317 .LFE91: + 2319 .section .text.HAL_TIM_Encoder_DeInit,"ax",%progbits + 2320 .align 1 + 2321 .global HAL_TIM_Encoder_DeInit + 2322 .syntax unified + 2323 .code 16 + 2324 .thumb_func + 2326 HAL_TIM_Encoder_DeInit: + 2327 .LVL179: + 2328 .LFB89: +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2329 .loc 1 3135 1 is_stmt 1 view -0 + 2330 .cfi_startproc + 2331 @ args = 0, pretend = 0, frame = 0 + 2332 @ frame_needed = 0, uses_anonymous_args = 0 +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2333 .loc 1 3135 1 is_stmt 0 view .LVU696 + 2334 0000 10B5 push {r4, lr} + 2335 .cfi_def_cfa_offset 8 + 2336 .cfi_offset 4, -8 + 2337 .cfi_offset 14, -4 + 2338 0002 0400 movs r4, r0 +3137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2339 .loc 1 3137 3 is_stmt 1 view .LVU697 +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2340 .loc 1 3139 3 view .LVU698 +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2341 .loc 1 3139 15 is_stmt 0 view .LVU699 + 2342 0004 3D23 movs r3, #61 + 2343 0006 0222 movs r2, #2 + 2344 0008 C254 strb r2, [r0, r3] +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2345 .loc 1 3142 3 is_stmt 1 view .LVU700 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2346 .loc 1 3142 3 view .LVU701 + 2347 000a 0368 ldr r3, [r0] + 2348 000c 196A ldr r1, [r3, #32] + 2349 000e 0F4A ldr r2, .L104 + 2350 0010 1142 tst r1, r2 + 2351 0012 07D1 bne .L103 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2352 .loc 1 3142 3 discriminator 1 view .LVU702 + 2353 0014 196A ldr r1, [r3, #32] + 2354 0016 0E4A ldr r2, .L104+4 + 2355 0018 1142 tst r1, r2 + 2356 001a 03D1 bne .L103 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2357 .loc 1 3142 3 discriminator 3 view .LVU703 + 2358 001c 1A68 ldr r2, [r3] + ARM GAS /tmp/cchCqftX.s page 180 + + + 2359 001e 0121 movs r1, #1 + 2360 0020 8A43 bics r2, r1 + 2361 0022 1A60 str r2, [r3] + 2362 .L103: +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2363 .loc 1 3142 3 discriminator 5 view .LVU704 +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2364 .loc 1 3153 3 view .LVU705 + 2365 0024 2000 movs r0, r4 + 2366 .LVL180: +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2367 .loc 1 3153 3 is_stmt 0 view .LVU706 + 2368 0026 FFF7FEFF bl HAL_TIM_Encoder_MspDeInit + 2369 .LVL181: +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2370 .loc 1 3157 3 is_stmt 1 view .LVU707 +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2371 .loc 1 3157 23 is_stmt 0 view .LVU708 + 2372 002a 0023 movs r3, #0 + 2373 002c 4622 movs r2, #70 + 2374 002e A354 strb r3, [r4, r2] +3160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2375 .loc 1 3160 3 is_stmt 1 view .LVU709 + 2376 0030 083A subs r2, r2, #8 + 2377 0032 A354 strb r3, [r4, r2] +3161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 2378 .loc 1 3161 3 view .LVU710 + 2379 0034 0132 adds r2, r2, #1 + 2380 0036 A354 strb r3, [r4, r2] +3162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2381 .loc 1 3162 3 view .LVU711 + 2382 0038 0332 adds r2, r2, #3 + 2383 003a A354 strb r3, [r4, r2] +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2384 .loc 1 3163 3 view .LVU712 + 2385 003c 0132 adds r2, r2, #1 + 2386 003e A354 strb r3, [r4, r2] +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2387 .loc 1 3166 3 view .LVU713 +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2388 .loc 1 3166 15 is_stmt 0 view .LVU714 + 2389 0040 063A subs r2, r2, #6 + 2390 0042 A354 strb r3, [r4, r2] +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2391 .loc 1 3169 3 is_stmt 1 view .LVU715 +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2392 .loc 1 3169 3 view .LVU716 + 2393 0044 013A subs r2, r2, #1 + 2394 0046 A354 strb r3, [r4, r2] +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2395 .loc 1 3169 3 view .LVU717 +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2396 .loc 1 3171 3 view .LVU718 +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2397 .loc 1 3172 1 is_stmt 0 view .LVU719 + 2398 0048 0020 movs r0, #0 + 2399 @ sp needed + ARM GAS /tmp/cchCqftX.s page 181 + + + 2400 .LVL182: +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2401 .loc 1 3172 1 view .LVU720 + 2402 004a 10BD pop {r4, pc} + 2403 .L105: + 2404 .align 2 + 2405 .L104: + 2406 004c 11110000 .word 4369 + 2407 0050 44040000 .word 1092 + 2408 .cfi_endproc + 2409 .LFE89: + 2411 .section .text.HAL_TIM_DMABurst_MultiWriteStart,"ax",%progbits + 2412 .align 1 + 2413 .global HAL_TIM_DMABurst_MultiWriteStart + 2414 .syntax unified + 2415 .code 16 + 2416 .thumb_func + 2418 HAL_TIM_DMABurst_MultiWriteStart: + 2419 .LVL183: + 2420 .LFB104: +4537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2421 .loc 1 4537 1 is_stmt 1 view -0 + 2422 .cfi_startproc + 2423 @ args = 8, pretend = 0, frame = 0 + 2424 @ frame_needed = 0, uses_anonymous_args = 0 +4537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2425 .loc 1 4537 1 is_stmt 0 view .LVU722 + 2426 0000 70B5 push {r4, r5, r6, lr} + 2427 .cfi_def_cfa_offset 16 + 2428 .cfi_offset 4, -16 + 2429 .cfi_offset 5, -12 + 2430 .cfi_offset 6, -8 + 2431 .cfi_offset 14, -4 + 2432 0002 0400 movs r4, r0 + 2433 0004 0E00 movs r6, r1 + 2434 0006 1500 movs r5, r2 + 2435 0008 1900 movs r1, r3 + 2436 .LVL184: +4538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2437 .loc 1 4538 3 is_stmt 1 view .LVU723 +4541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); + 2438 .loc 1 4541 3 view .LVU724 +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); + 2439 .loc 1 4542 3 view .LVU725 +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); + 2440 .loc 1 4543 3 view .LVU726 +4544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); + 2441 .loc 1 4544 3 view .LVU727 +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2442 .loc 1 4545 3 view .LVU728 +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2443 .loc 1 4547 3 view .LVU729 +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2444 .loc 1 4547 11 is_stmt 0 view .LVU730 + 2445 000a 4623 movs r3, #70 + 2446 .LVL185: +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 182 + + + 2447 .loc 1 4547 11 view .LVU731 + 2448 000c C35C ldrb r3, [r0, r3] + 2449 000e D8B2 uxtb r0, r3 + 2450 .LVL186: +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2451 .loc 1 4547 6 view .LVU732 + 2452 0010 022B cmp r3, #2 + 2453 0012 31D0 beq .L107 +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2454 .loc 1 4551 8 is_stmt 1 view .LVU733 +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2455 .loc 1 4551 16 is_stmt 0 view .LVU734 + 2456 0014 4623 movs r3, #70 + 2457 0016 E35C ldrb r3, [r4, r3] + 2458 0018 D8B2 uxtb r0, r3 +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2459 .loc 1 4551 11 view .LVU735 + 2460 001a 012B cmp r3, #1 + 2461 001c 2DD0 beq .L126 + 2462 .LVL187: + 2463 .L108: +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2464 .loc 1 4565 3 is_stmt 1 view .LVU736 +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2465 .loc 1 4567 3 view .LVU737 + 2466 001e 8023 movs r3, #128 + 2467 0020 1B01 lsls r3, r3, #4 + 2468 0022 9D42 cmp r5, r3 + 2469 0024 00D1 bne .LCB2050 + 2470 0026 7BE0 b .L110 @long jump + 2471 .LCB2050: + 2472 0028 33D8 bhi .L111 + 2473 002a 8023 movs r3, #128 + 2474 002c 9B00 lsls r3, r3, #2 + 2475 002e 9D42 cmp r5, r3 + 2476 0030 50D0 beq .L112 + 2477 0032 8023 movs r3, #128 + 2478 0034 DB00 lsls r3, r3, #3 + 2479 0036 9D42 cmp r5, r3 + 2480 0038 5FD0 beq .L113 + 2481 003a 8023 movs r3, #128 + 2482 003c 5B00 lsls r3, r3, #1 + 2483 003e 9D42 cmp r5, r3 + 2484 0040 25D1 bne .L127 +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2485 .loc 1 4572 7 view .LVU738 +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2486 .loc 1 4572 17 is_stmt 0 view .LVU739 + 2487 0042 236A ldr r3, [r4, #32] +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2488 .loc 1 4572 55 view .LVU740 + 2489 0044 554A ldr r2, .L131 + 2490 0046 9A62 str r2, [r3, #40] +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2491 .loc 1 4573 7 is_stmt 1 view .LVU741 +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2492 .loc 1 4573 17 is_stmt 0 view .LVU742 + ARM GAS /tmp/cchCqftX.s page 183 + + + 2493 0048 236A ldr r3, [r4, #32] +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2494 .loc 1 4573 59 view .LVU743 + 2495 004a 554A ldr r2, .L131+4 + 2496 004c DA62 str r2, [r3, #44] +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2497 .loc 1 4576 7 is_stmt 1 view .LVU744 +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2498 .loc 1 4576 17 is_stmt 0 view .LVU745 + 2499 004e 236A ldr r3, [r4, #32] +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2500 .loc 1 4576 56 view .LVU746 + 2501 0050 544A ldr r2, .L131+8 + 2502 0052 1A63 str r2, [r3, #48] +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2503 .loc 1 4579 7 is_stmt 1 view .LVU747 +4580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2504 .loc 1 4580 43 is_stmt 0 view .LVU748 + 2505 0054 2268 ldr r2, [r4] +4580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2506 .loc 1 4580 38 view .LVU749 + 2507 0056 4C32 adds r2, r2, #76 +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2508 .loc 1 4579 11 view .LVU750 + 2509 0058 206A ldr r0, [r4, #32] + 2510 005a 059B ldr r3, [sp, #20] + 2511 005c FFF7FEFF bl HAL_DMA_Start_IT + 2512 .LVL188: +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2513 .loc 1 4579 10 discriminator 1 view .LVU751 + 2514 0060 0028 cmp r0, #0 + 2515 0062 00D0 beq .LCB2086 + 2516 0064 98E0 b .L128 @long jump + 2517 .LCB2086: + 2518 .L118: + 2519 .LVL189: +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2520 .loc 1 4703 5 is_stmt 1 view .LVU752 +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2521 .loc 1 4703 9 is_stmt 0 view .LVU753 + 2522 0066 2268 ldr r2, [r4] +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2523 .loc 1 4703 45 view .LVU754 + 2524 0068 049B ldr r3, [sp, #16] + 2525 006a 1E43 orrs r6, r3 + 2526 .LVL190: +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2527 .loc 1 4703 25 view .LVU755 + 2528 006c 9664 str r6, [r2, #72] +4705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2529 .loc 1 4705 5 is_stmt 1 view .LVU756 + 2530 006e 2268 ldr r2, [r4] + 2531 0070 D368 ldr r3, [r2, #12] + 2532 0072 2B43 orrs r3, r5 + 2533 0074 D360 str r3, [r2, #12] + 2534 0076 0020 movs r0, #0 + 2535 .L107: + ARM GAS /tmp/cchCqftX.s page 184 + + +4710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2536 .loc 1 4710 1 is_stmt 0 view .LVU757 + 2537 @ sp needed + 2538 .LVL191: + 2539 .LVL192: +4710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2540 .loc 1 4710 1 view .LVU758 + 2541 0078 70BD pop {r4, r5, r6, pc} + 2542 .LVL193: + 2543 .L126: +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2544 .loc 1 4553 5 is_stmt 1 view .LVU759 +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2545 .loc 1 4553 8 is_stmt 0 view .LVU760 + 2546 007a 0029 cmp r1, #0 + 2547 007c 03D0 beq .L129 + 2548 .L109: +4559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2549 .loc 1 4559 7 is_stmt 1 view .LVU761 +4559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2550 .loc 1 4559 27 is_stmt 0 view .LVU762 + 2551 007e 4623 movs r3, #70 + 2552 0080 0222 movs r2, #2 + 2553 .LVL194: +4559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2554 .loc 1 4559 27 view .LVU763 + 2555 0082 E254 strb r2, [r4, r3] + 2556 0084 CBE7 b .L108 + 2557 .LVL195: + 2558 .L129: +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2559 .loc 1 4553 31 discriminator 1 view .LVU764 + 2560 0086 049B ldr r3, [sp, #16] + 2561 0088 002B cmp r3, #0 + 2562 008a F8D0 beq .L109 + 2563 008c F4E7 b .L107 + 2564 .LVL196: + 2565 .L127: +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2566 .loc 1 4567 3 view .LVU765 + 2567 008e 0120 movs r0, #1 + 2568 0090 F2E7 b .L107 + 2569 .L111: + 2570 0092 8023 movs r3, #128 + 2571 0094 9B01 lsls r3, r3, #6 + 2572 0096 9D42 cmp r5, r3 + 2573 0098 56D0 beq .L115 + 2574 009a 8023 movs r3, #128 + 2575 009c DB01 lsls r3, r3, #7 + 2576 009e 9D42 cmp r5, r3 + 2577 00a0 66D0 beq .L116 + 2578 00a2 8023 movs r3, #128 + 2579 00a4 5B01 lsls r3, r3, #5 + 2580 00a6 9D42 cmp r5, r3 + 2581 00a8 12D1 bne .L130 +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2582 .loc 1 4644 7 is_stmt 1 view .LVU766 + ARM GAS /tmp/cchCqftX.s page 185 + + +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2583 .loc 1 4644 17 is_stmt 0 view .LVU767 + 2584 00aa 236B ldr r3, [r4, #48] +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2585 .loc 1 4644 52 view .LVU768 + 2586 00ac 3E4A ldr r2, .L131+12 + 2587 00ae 9A62 str r2, [r3, #40] +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2588 .loc 1 4645 7 is_stmt 1 view .LVU769 +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2589 .loc 1 4645 17 is_stmt 0 view .LVU770 + 2590 00b0 236B ldr r3, [r4, #48] +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2591 .loc 1 4645 56 view .LVU771 + 2592 00b2 3E4A ldr r2, .L131+16 + 2593 00b4 DA62 str r2, [r3, #44] +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2594 .loc 1 4648 7 is_stmt 1 view .LVU772 +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2595 .loc 1 4648 17 is_stmt 0 view .LVU773 + 2596 00b6 236B ldr r3, [r4, #48] +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2597 .loc 1 4648 53 view .LVU774 + 2598 00b8 3A4A ldr r2, .L131+8 + 2599 00ba 1A63 str r2, [r3, #48] +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2600 .loc 1 4651 7 is_stmt 1 view .LVU775 +4652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2601 .loc 1 4652 43 is_stmt 0 view .LVU776 + 2602 00bc 2268 ldr r2, [r4] +4652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2603 .loc 1 4652 38 view .LVU777 + 2604 00be 4C32 adds r2, r2, #76 +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2605 .loc 1 4651 11 view .LVU778 + 2606 00c0 206B ldr r0, [r4, #48] + 2607 00c2 059B ldr r3, [sp, #20] + 2608 00c4 FFF7FEFF bl HAL_DMA_Start_IT + 2609 .LVL197: +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2610 .loc 1 4651 10 discriminator 1 view .LVU779 + 2611 00c8 0028 cmp r0, #0 + 2612 00ca CCD0 beq .L118 +4655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2613 .loc 1 4655 16 view .LVU780 + 2614 00cc 0120 movs r0, #1 + 2615 00ce D3E7 b .L107 + 2616 .LVL198: + 2617 .L130: +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2618 .loc 1 4567 3 view .LVU781 + 2619 00d0 0120 movs r0, #1 + 2620 00d2 D1E7 b .L107 + 2621 .L112: +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2622 .loc 1 4590 7 is_stmt 1 view .LVU782 +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + ARM GAS /tmp/cchCqftX.s page 186 + + + 2623 .loc 1 4590 17 is_stmt 0 view .LVU783 + 2624 00d4 636A ldr r3, [r4, #36] +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2625 .loc 1 4590 52 view .LVU784 + 2626 00d6 344A ldr r2, .L131+12 + 2627 00d8 9A62 str r2, [r3, #40] +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2628 .loc 1 4591 7 is_stmt 1 view .LVU785 +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2629 .loc 1 4591 17 is_stmt 0 view .LVU786 + 2630 00da 636A ldr r3, [r4, #36] +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2631 .loc 1 4591 56 view .LVU787 + 2632 00dc 334A ldr r2, .L131+16 + 2633 00de DA62 str r2, [r3, #44] +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2634 .loc 1 4594 7 is_stmt 1 view .LVU788 +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2635 .loc 1 4594 17 is_stmt 0 view .LVU789 + 2636 00e0 636A ldr r3, [r4, #36] +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2637 .loc 1 4594 53 view .LVU790 + 2638 00e2 304A ldr r2, .L131+8 + 2639 00e4 1A63 str r2, [r3, #48] +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2640 .loc 1 4597 7 is_stmt 1 view .LVU791 +4598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2641 .loc 1 4598 43 is_stmt 0 view .LVU792 + 2642 00e6 2268 ldr r2, [r4] +4598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2643 .loc 1 4598 38 view .LVU793 + 2644 00e8 4C32 adds r2, r2, #76 +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2645 .loc 1 4597 11 view .LVU794 + 2646 00ea 606A ldr r0, [r4, #36] + 2647 00ec 059B ldr r3, [sp, #20] + 2648 00ee FFF7FEFF bl HAL_DMA_Start_IT + 2649 .LVL199: +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2650 .loc 1 4597 10 discriminator 1 view .LVU795 + 2651 00f2 0028 cmp r0, #0 + 2652 00f4 B7D0 beq .L118 +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2653 .loc 1 4601 16 view .LVU796 + 2654 00f6 0120 movs r0, #1 + 2655 00f8 BEE7 b .L107 + 2656 .LVL200: + 2657 .L113: +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2658 .loc 1 4608 7 is_stmt 1 view .LVU797 +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2659 .loc 1 4608 17 is_stmt 0 view .LVU798 + 2660 00fa A36A ldr r3, [r4, #40] +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2661 .loc 1 4608 52 view .LVU799 + 2662 00fc 2A4A ldr r2, .L131+12 + 2663 00fe 9A62 str r2, [r3, #40] + ARM GAS /tmp/cchCqftX.s page 187 + + +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2664 .loc 1 4609 7 is_stmt 1 view .LVU800 +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2665 .loc 1 4609 17 is_stmt 0 view .LVU801 + 2666 0100 A36A ldr r3, [r4, #40] +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2667 .loc 1 4609 56 view .LVU802 + 2668 0102 2A4A ldr r2, .L131+16 + 2669 0104 DA62 str r2, [r3, #44] +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2670 .loc 1 4612 7 is_stmt 1 view .LVU803 +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2671 .loc 1 4612 17 is_stmt 0 view .LVU804 + 2672 0106 A36A ldr r3, [r4, #40] +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2673 .loc 1 4612 53 view .LVU805 + 2674 0108 264A ldr r2, .L131+8 + 2675 010a 1A63 str r2, [r3, #48] +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2676 .loc 1 4615 7 is_stmt 1 view .LVU806 +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2677 .loc 1 4616 43 is_stmt 0 view .LVU807 + 2678 010c 2268 ldr r2, [r4] +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2679 .loc 1 4616 38 view .LVU808 + 2680 010e 4C32 adds r2, r2, #76 +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2681 .loc 1 4615 11 view .LVU809 + 2682 0110 A06A ldr r0, [r4, #40] + 2683 0112 059B ldr r3, [sp, #20] + 2684 0114 FFF7FEFF bl HAL_DMA_Start_IT + 2685 .LVL201: +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2686 .loc 1 4615 10 discriminator 1 view .LVU810 + 2687 0118 0028 cmp r0, #0 + 2688 011a A4D0 beq .L118 +4619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2689 .loc 1 4619 16 view .LVU811 + 2690 011c 0120 movs r0, #1 + 2691 011e ABE7 b .L107 + 2692 .LVL202: + 2693 .L110: +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2694 .loc 1 4626 7 is_stmt 1 view .LVU812 +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2695 .loc 1 4626 17 is_stmt 0 view .LVU813 + 2696 0120 E36A ldr r3, [r4, #44] +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2697 .loc 1 4626 52 view .LVU814 + 2698 0122 214A ldr r2, .L131+12 + 2699 0124 9A62 str r2, [r3, #40] +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2700 .loc 1 4627 7 is_stmt 1 view .LVU815 +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2701 .loc 1 4627 17 is_stmt 0 view .LVU816 + 2702 0126 E36A ldr r3, [r4, #44] +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 188 + + + 2703 .loc 1 4627 56 view .LVU817 + 2704 0128 204A ldr r2, .L131+16 + 2705 012a DA62 str r2, [r3, #44] +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2706 .loc 1 4630 7 is_stmt 1 view .LVU818 +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2707 .loc 1 4630 17 is_stmt 0 view .LVU819 + 2708 012c E36A ldr r3, [r4, #44] +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2709 .loc 1 4630 53 view .LVU820 + 2710 012e 1D4A ldr r2, .L131+8 + 2711 0130 1A63 str r2, [r3, #48] +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2712 .loc 1 4633 7 is_stmt 1 view .LVU821 +4634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2713 .loc 1 4634 43 is_stmt 0 view .LVU822 + 2714 0132 2268 ldr r2, [r4] +4634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2715 .loc 1 4634 38 view .LVU823 + 2716 0134 4C32 adds r2, r2, #76 +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2717 .loc 1 4633 11 view .LVU824 + 2718 0136 E06A ldr r0, [r4, #44] + 2719 0138 059B ldr r3, [sp, #20] + 2720 013a FFF7FEFF bl HAL_DMA_Start_IT + 2721 .LVL203: +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2722 .loc 1 4633 10 discriminator 1 view .LVU825 + 2723 013e 0028 cmp r0, #0 + 2724 0140 00D1 bne .LCB2285 + 2725 0142 90E7 b .L118 @long jump + 2726 .LCB2285: +4637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2727 .loc 1 4637 16 view .LVU826 + 2728 0144 0120 movs r0, #1 + 2729 0146 97E7 b .L107 + 2730 .LVL204: + 2731 .L115: +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2732 .loc 1 4662 7 is_stmt 1 view .LVU827 +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2733 .loc 1 4662 17 is_stmt 0 view .LVU828 + 2734 0148 636B ldr r3, [r4, #52] +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2735 .loc 1 4662 60 view .LVU829 + 2736 014a 194A ldr r2, .L131+20 + 2737 014c 9A62 str r2, [r3, #40] +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2738 .loc 1 4663 7 is_stmt 1 view .LVU830 +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2739 .loc 1 4663 17 is_stmt 0 view .LVU831 + 2740 014e 636B ldr r3, [r4, #52] +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2741 .loc 1 4663 64 view .LVU832 + 2742 0150 184A ldr r2, .L131+24 + 2743 0152 DA62 str r2, [r3, #44] +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 189 + + + 2744 .loc 1 4666 7 is_stmt 1 view .LVU833 +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2745 .loc 1 4666 17 is_stmt 0 view .LVU834 + 2746 0154 636B ldr r3, [r4, #52] +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2747 .loc 1 4666 61 view .LVU835 + 2748 0156 134A ldr r2, .L131+8 + 2749 0158 1A63 str r2, [r3, #48] +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2750 .loc 1 4669 7 is_stmt 1 view .LVU836 +4670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2751 .loc 1 4670 43 is_stmt 0 view .LVU837 + 2752 015a 2268 ldr r2, [r4] +4670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2753 .loc 1 4670 38 view .LVU838 + 2754 015c 4C32 adds r2, r2, #76 +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2755 .loc 1 4669 11 view .LVU839 + 2756 015e 606B ldr r0, [r4, #52] + 2757 0160 059B ldr r3, [sp, #20] + 2758 0162 FFF7FEFF bl HAL_DMA_Start_IT + 2759 .LVL205: +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2760 .loc 1 4669 10 discriminator 1 view .LVU840 + 2761 0166 0028 cmp r0, #0 + 2762 0168 00D1 bne .LCB2316 + 2763 016a 7CE7 b .L118 @long jump + 2764 .LCB2316: +4673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2765 .loc 1 4673 16 view .LVU841 + 2766 016c 0120 movs r0, #1 + 2767 016e 83E7 b .L107 + 2768 .LVL206: + 2769 .L116: +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2770 .loc 1 4680 7 is_stmt 1 view .LVU842 +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2771 .loc 1 4680 17 is_stmt 0 view .LVU843 + 2772 0170 A36B ldr r3, [r4, #56] +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2773 .loc 1 4680 56 view .LVU844 + 2774 0172 114A ldr r2, .L131+28 + 2775 0174 9A62 str r2, [r3, #40] +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2776 .loc 1 4681 7 is_stmt 1 view .LVU845 +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2777 .loc 1 4681 17 is_stmt 0 view .LVU846 + 2778 0176 A36B ldr r3, [r4, #56] +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2779 .loc 1 4681 60 view .LVU847 + 2780 0178 104A ldr r2, .L131+32 + 2781 017a DA62 str r2, [r3, #44] +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2782 .loc 1 4684 7 is_stmt 1 view .LVU848 +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2783 .loc 1 4684 17 is_stmt 0 view .LVU849 + 2784 017c A36B ldr r3, [r4, #56] + ARM GAS /tmp/cchCqftX.s page 190 + + +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2785 .loc 1 4684 57 view .LVU850 + 2786 017e 094A ldr r2, .L131+8 + 2787 0180 1A63 str r2, [r3, #48] +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2788 .loc 1 4687 7 is_stmt 1 view .LVU851 +4688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2789 .loc 1 4688 43 is_stmt 0 view .LVU852 + 2790 0182 2268 ldr r2, [r4] +4688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2791 .loc 1 4688 38 view .LVU853 + 2792 0184 4C32 adds r2, r2, #76 +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2793 .loc 1 4687 11 view .LVU854 + 2794 0186 A06B ldr r0, [r4, #56] + 2795 0188 059B ldr r3, [sp, #20] + 2796 018a FFF7FEFF bl HAL_DMA_Start_IT + 2797 .LVL207: +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2798 .loc 1 4687 10 discriminator 1 view .LVU855 + 2799 018e 0028 cmp r0, #0 + 2800 0190 00D1 bne .LCB2347 + 2801 0192 68E7 b .L118 @long jump + 2802 .LCB2347: +4691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2803 .loc 1 4691 16 view .LVU856 + 2804 0194 0120 movs r0, #1 + 2805 0196 6FE7 b .L107 + 2806 .L128: +4583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2807 .loc 1 4583 16 view .LVU857 + 2808 0198 0120 movs r0, #1 + 2809 019a 6DE7 b .L107 + 2810 .L132: + 2811 .align 2 + 2812 .L131: + 2813 019c 00000000 .word TIM_DMAPeriodElapsedCplt + 2814 01a0 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 2815 01a4 00000000 .word TIM_DMAError + 2816 01a8 00000000 .word TIM_DMADelayPulseCplt + 2817 01ac 00000000 .word TIM_DMADelayPulseHalfCplt + 2818 01b0 00000000 .word TIMEx_DMACommutationCplt + 2819 01b4 00000000 .word TIMEx_DMACommutationHalfCplt + 2820 01b8 00000000 .word TIM_DMATriggerCplt + 2821 01bc 00000000 .word TIM_DMATriggerHalfCplt + 2822 .cfi_endproc + 2823 .LFE104: + 2825 .section .text.HAL_TIM_DMABurst_WriteStart,"ax",%progbits + 2826 .align 1 + 2827 .global HAL_TIM_DMABurst_WriteStart + 2828 .syntax unified + 2829 .code 16 + 2830 .thumb_func + 2832 HAL_TIM_DMABurst_WriteStart: + 2833 .LVL208: + 2834 .LFB103: +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; + ARM GAS /tmp/cchCqftX.s page 191 + + + 2835 .loc 1 4484 1 is_stmt 1 view -0 + 2836 .cfi_startproc + 2837 @ args = 4, pretend = 0, frame = 0 + 2838 @ frame_needed = 0, uses_anonymous_args = 0 +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; + 2839 .loc 1 4484 1 is_stmt 0 view .LVU859 + 2840 0000 10B5 push {r4, lr} + 2841 .cfi_def_cfa_offset 8 + 2842 .cfi_offset 4, -8 + 2843 .cfi_offset 14, -4 + 2844 0002 82B0 sub sp, sp, #8 + 2845 .cfi_def_cfa_offset 16 +4485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2846 .loc 1 4485 3 is_stmt 1 view .LVU860 +4487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 2847 .loc 1 4487 3 view .LVU861 +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2848 .loc 1 4488 60 is_stmt 0 view .LVU862 + 2849 0004 049C ldr r4, [sp, #16] + 2850 0006 240A lsrs r4, r4, #8 +4487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 2851 .loc 1 4487 12 view .LVU863 + 2852 0008 0134 adds r4, r4, #1 + 2853 000a 0194 str r4, [sp, #4] + 2854 000c 049C ldr r4, [sp, #16] + 2855 000e 0094 str r4, [sp] + 2856 0010 FFF7FEFF bl HAL_TIM_DMABurst_MultiWriteStart + 2857 .LVL209: +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2858 .loc 1 4492 3 is_stmt 1 view .LVU864 +4493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2859 .loc 1 4493 1 is_stmt 0 view .LVU865 + 2860 0014 02B0 add sp, sp, #8 + 2861 @ sp needed + 2862 0016 10BD pop {r4, pc} + 2863 .cfi_endproc + 2864 .LFE103: + 2866 .section .text.HAL_TIM_DMABurst_WriteStop,"ax",%progbits + 2867 .align 1 + 2868 .global HAL_TIM_DMABurst_WriteStop + 2869 .syntax unified + 2870 .code 16 + 2871 .thumb_func + 2873 HAL_TIM_DMABurst_WriteStop: + 2874 .LVL210: + 2875 .LFB105: +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2876 .loc 1 4719 1 is_stmt 1 view -0 + 2877 .cfi_startproc + 2878 @ args = 0, pretend = 0, frame = 0 + 2879 @ frame_needed = 0, uses_anonymous_args = 0 +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2880 .loc 1 4719 1 is_stmt 0 view .LVU867 + 2881 0000 70B5 push {r4, r5, r6, lr} + 2882 .cfi_def_cfa_offset 16 + 2883 .cfi_offset 4, -16 + 2884 .cfi_offset 5, -12 + ARM GAS /tmp/cchCqftX.s page 192 + + + 2885 .cfi_offset 6, -8 + 2886 .cfi_offset 14, -4 + 2887 0002 0500 movs r5, r0 + 2888 0004 0C00 movs r4, r1 +4720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2889 .loc 1 4720 3 is_stmt 1 view .LVU868 + 2890 .LVL211: +4723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2891 .loc 1 4723 3 view .LVU869 +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2892 .loc 1 4726 3 view .LVU870 + 2893 0006 8023 movs r3, #128 + 2894 0008 1B01 lsls r3, r3, #4 + 2895 000a 9942 cmp r1, r3 + 2896 000c 34D0 beq .L135 + 2897 000e 19D8 bhi .L136 + 2898 0010 8023 movs r3, #128 + 2899 0012 9B00 lsls r3, r3, #2 + 2900 0014 9942 cmp r1, r3 + 2901 0016 27D0 beq .L137 + 2902 0018 8023 movs r3, #128 + 2903 001a DB00 lsls r3, r3, #3 + 2904 001c 9942 cmp r1, r3 + 2905 001e 27D0 beq .L138 + 2906 0020 8023 movs r3, #128 + 2907 0022 5B00 lsls r3, r3, #1 + 2908 0024 9942 cmp r1, r3 + 2909 0026 0BD1 bne .L145 +4730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2910 .loc 1 4730 7 view .LVU871 +4730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2911 .loc 1 4730 13 is_stmt 0 view .LVU872 + 2912 0028 006A ldr r0, [r0, #32] + 2913 .LVL212: +4730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2914 .loc 1 4730 13 view .LVU873 + 2915 002a FFF7FEFF bl HAL_DMA_Abort_IT + 2916 .LVL213: +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2917 .loc 1 4731 7 is_stmt 1 view .LVU874 +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2918 .loc 1 4768 3 view .LVU875 + 2919 .L144: +4771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2920 .loc 1 4771 5 view .LVU876 + 2921 002e 2A68 ldr r2, [r5] + 2922 0030 D368 ldr r3, [r2, #12] + 2923 0032 A343 bics r3, r4 + 2924 0034 D360 str r3, [r2, #12] +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2925 .loc 1 4774 5 view .LVU877 +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2926 .loc 1 4774 25 is_stmt 0 view .LVU878 + 2927 0036 4623 movs r3, #70 + 2928 0038 0122 movs r2, #1 + 2929 003a EA54 strb r2, [r5, r3] + 2930 003c 0020 movs r0, #0 + ARM GAS /tmp/cchCqftX.s page 193 + + + 2931 .L140: + 2932 .LVL214: +4778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2933 .loc 1 4778 3 is_stmt 1 view .LVU879 +4779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2934 .loc 1 4779 1 is_stmt 0 view .LVU880 + 2935 @ sp needed + 2936 .LVL215: + 2937 .LVL216: +4779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2938 .loc 1 4779 1 view .LVU881 + 2939 003e 70BD pop {r4, r5, r6, pc} + 2940 .LVL217: + 2941 .L145: +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2942 .loc 1 4726 3 view .LVU882 + 2943 0040 0120 movs r0, #1 + 2944 .LVL218: +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2945 .loc 1 4726 3 view .LVU883 + 2946 0042 FCE7 b .L140 + 2947 .LVL219: + 2948 .L136: +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2949 .loc 1 4726 3 view .LVU884 + 2950 0044 8023 movs r3, #128 + 2951 0046 9B01 lsls r3, r3, #6 + 2952 0048 9942 cmp r1, r3 + 2953 004a 19D0 beq .L141 + 2954 004c 8023 movs r3, #128 + 2955 004e DB01 lsls r3, r3, #7 + 2956 0050 9942 cmp r1, r3 + 2957 0052 19D0 beq .L142 + 2958 0054 8023 movs r3, #128 + 2959 0056 5B01 lsls r3, r3, #5 + 2960 0058 9942 cmp r1, r3 + 2961 005a 03D1 bne .L146 +4750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2962 .loc 1 4750 7 is_stmt 1 view .LVU885 +4750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2963 .loc 1 4750 13 is_stmt 0 view .LVU886 + 2964 005c 006B ldr r0, [r0, #48] + 2965 .LVL220: +4750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2966 .loc 1 4750 13 view .LVU887 + 2967 005e FFF7FEFF bl HAL_DMA_Abort_IT + 2968 .LVL221: +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2969 .loc 1 4751 7 is_stmt 1 view .LVU888 +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2970 .loc 1 4768 3 view .LVU889 + 2971 0062 E4E7 b .L144 + 2972 .LVL222: + 2973 .L146: +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2974 .loc 1 4726 3 is_stmt 0 view .LVU890 + 2975 0064 0120 movs r0, #1 + ARM GAS /tmp/cchCqftX.s page 194 + + + 2976 .LVL223: +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2977 .loc 1 4726 3 view .LVU891 + 2978 0066 EAE7 b .L140 + 2979 .LVL224: + 2980 .L137: +4735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2981 .loc 1 4735 7 is_stmt 1 view .LVU892 +4735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2982 .loc 1 4735 13 is_stmt 0 view .LVU893 + 2983 0068 406A ldr r0, [r0, #36] + 2984 .LVL225: +4735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2985 .loc 1 4735 13 view .LVU894 + 2986 006a FFF7FEFF bl HAL_DMA_Abort_IT + 2987 .LVL226: +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2988 .loc 1 4736 7 is_stmt 1 view .LVU895 +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2989 .loc 1 4768 3 view .LVU896 + 2990 006e DEE7 b .L144 + 2991 .LVL227: + 2992 .L138: +4740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2993 .loc 1 4740 7 view .LVU897 +4740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2994 .loc 1 4740 13 is_stmt 0 view .LVU898 + 2995 0070 806A ldr r0, [r0, #40] + 2996 .LVL228: +4740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2997 .loc 1 4740 13 view .LVU899 + 2998 0072 FFF7FEFF bl HAL_DMA_Abort_IT + 2999 .LVL229: +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3000 .loc 1 4741 7 is_stmt 1 view .LVU900 +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3001 .loc 1 4768 3 view .LVU901 + 3002 0076 DAE7 b .L144 + 3003 .LVL230: + 3004 .L135: +4745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3005 .loc 1 4745 7 view .LVU902 +4745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3006 .loc 1 4745 13 is_stmt 0 view .LVU903 + 3007 0078 C06A ldr r0, [r0, #44] + 3008 .LVL231: +4745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3009 .loc 1 4745 13 view .LVU904 + 3010 007a FFF7FEFF bl HAL_DMA_Abort_IT + 3011 .LVL232: +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3012 .loc 1 4746 7 is_stmt 1 view .LVU905 +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3013 .loc 1 4768 3 view .LVU906 + 3014 007e D6E7 b .L144 + 3015 .LVL233: + 3016 .L141: + ARM GAS /tmp/cchCqftX.s page 195 + + +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3017 .loc 1 4755 7 view .LVU907 +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3018 .loc 1 4755 13 is_stmt 0 view .LVU908 + 3019 0080 406B ldr r0, [r0, #52] + 3020 .LVL234: +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3021 .loc 1 4755 13 view .LVU909 + 3022 0082 FFF7FEFF bl HAL_DMA_Abort_IT + 3023 .LVL235: +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3024 .loc 1 4756 7 is_stmt 1 view .LVU910 +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3025 .loc 1 4768 3 view .LVU911 + 3026 0086 D2E7 b .L144 + 3027 .LVL236: + 3028 .L142: +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3029 .loc 1 4760 7 view .LVU912 +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3030 .loc 1 4760 13 is_stmt 0 view .LVU913 + 3031 0088 806B ldr r0, [r0, #56] + 3032 .LVL237: +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3033 .loc 1 4760 13 view .LVU914 + 3034 008a FFF7FEFF bl HAL_DMA_Abort_IT + 3035 .LVL238: +4761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3036 .loc 1 4761 7 is_stmt 1 view .LVU915 +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3037 .loc 1 4768 3 view .LVU916 + 3038 008e CEE7 b .L144 + 3039 .cfi_endproc + 3040 .LFE105: + 3042 .section .text.HAL_TIM_DMABurst_MultiReadStart,"ax",%progbits + 3043 .align 1 + 3044 .global HAL_TIM_DMABurst_MultiReadStart + 3045 .syntax unified + 3046 .code 16 + 3047 .thumb_func + 3049 HAL_TIM_DMABurst_MultiReadStart: + 3050 .LVL239: + 3051 .LFB107: +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3052 .loc 1 4873 1 view -0 + 3053 .cfi_startproc + 3054 @ args = 8, pretend = 0, frame = 0 + 3055 @ frame_needed = 0, uses_anonymous_args = 0 +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3056 .loc 1 4873 1 is_stmt 0 view .LVU918 + 3057 0000 70B5 push {r4, r5, r6, lr} + 3058 .cfi_def_cfa_offset 16 + 3059 .cfi_offset 4, -16 + 3060 .cfi_offset 5, -12 + 3061 .cfi_offset 6, -8 + 3062 .cfi_offset 14, -4 + 3063 0002 0400 movs r4, r0 + ARM GAS /tmp/cchCqftX.s page 196 + + + 3064 0004 0E00 movs r6, r1 + 3065 0006 1500 movs r5, r2 + 3066 0008 1A00 movs r2, r3 + 3067 .LVL240: +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3068 .loc 1 4874 3 is_stmt 1 view .LVU919 +4877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); + 3069 .loc 1 4877 3 view .LVU920 +4878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); + 3070 .loc 1 4878 3 view .LVU921 +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); + 3071 .loc 1 4879 3 view .LVU922 +4880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); + 3072 .loc 1 4880 3 view .LVU923 +4881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3073 .loc 1 4881 3 view .LVU924 +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3074 .loc 1 4883 3 view .LVU925 +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3075 .loc 1 4883 11 is_stmt 0 view .LVU926 + 3076 000a 4623 movs r3, #70 + 3077 .LVL241: +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3078 .loc 1 4883 11 view .LVU927 + 3079 000c C35C ldrb r3, [r0, r3] + 3080 000e D8B2 uxtb r0, r3 + 3081 .LVL242: +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3082 .loc 1 4883 6 view .LVU928 + 3083 0010 022B cmp r3, #2 + 3084 0012 31D0 beq .L148 +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3085 .loc 1 4887 8 is_stmt 1 view .LVU929 +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3086 .loc 1 4887 16 is_stmt 0 view .LVU930 + 3087 0014 4623 movs r3, #70 + 3088 0016 E35C ldrb r3, [r4, r3] + 3089 0018 D8B2 uxtb r0, r3 +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3090 .loc 1 4887 11 view .LVU931 + 3091 001a 012B cmp r3, #1 + 3092 001c 2DD0 beq .L167 + 3093 .LVL243: + 3094 .L149: +4901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) + 3095 .loc 1 4901 3 is_stmt 1 view .LVU932 +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3096 .loc 1 4902 3 view .LVU933 + 3097 001e 8023 movs r3, #128 + 3098 0020 1B01 lsls r3, r3, #4 + 3099 0022 9D42 cmp r5, r3 + 3100 0024 00D1 bne .LCB2647 + 3101 0026 7BE0 b .L151 @long jump + 3102 .LCB2647: + 3103 0028 33D8 bhi .L152 + 3104 002a 8023 movs r3, #128 + 3105 002c 9B00 lsls r3, r3, #2 + ARM GAS /tmp/cchCqftX.s page 197 + + + 3106 002e 9D42 cmp r5, r3 + 3107 0030 50D0 beq .L153 + 3108 0032 8023 movs r3, #128 + 3109 0034 DB00 lsls r3, r3, #3 + 3110 0036 9D42 cmp r5, r3 + 3111 0038 5FD0 beq .L154 + 3112 003a 8023 movs r3, #128 + 3113 003c 5B00 lsls r3, r3, #1 + 3114 003e 9D42 cmp r5, r3 + 3115 0040 25D1 bne .L168 +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3116 .loc 1 4907 7 view .LVU934 +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3117 .loc 1 4907 17 is_stmt 0 view .LVU935 + 3118 0042 236A ldr r3, [r4, #32] +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3119 .loc 1 4907 55 view .LVU936 + 3120 0044 5549 ldr r1, .L172 + 3121 0046 9962 str r1, [r3, #40] +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3122 .loc 1 4908 7 is_stmt 1 view .LVU937 +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3123 .loc 1 4908 17 is_stmt 0 view .LVU938 + 3124 0048 236A ldr r3, [r4, #32] +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3125 .loc 1 4908 59 view .LVU939 + 3126 004a 5549 ldr r1, .L172+4 + 3127 004c D962 str r1, [r3, #44] +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3128 .loc 1 4911 7 is_stmt 1 view .LVU940 +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3129 .loc 1 4911 17 is_stmt 0 view .LVU941 + 3130 004e 236A ldr r3, [r4, #32] +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3131 .loc 1 4911 56 view .LVU942 + 3132 0050 5449 ldr r1, .L172+8 + 3133 0052 1963 str r1, [r3, #48] +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3134 .loc 1 4914 7 is_stmt 1 view .LVU943 +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3135 .loc 1 4914 74 is_stmt 0 view .LVU944 + 3136 0054 2168 ldr r1, [r4] +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3137 .loc 1 4914 69 view .LVU945 + 3138 0056 4C31 adds r1, r1, #76 +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3139 .loc 1 4914 11 view .LVU946 + 3140 0058 206A ldr r0, [r4, #32] + 3141 005a 059B ldr r3, [sp, #20] + 3142 005c FFF7FEFF bl HAL_DMA_Start_IT + 3143 .LVL244: +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3144 .loc 1 4914 10 discriminator 1 view .LVU947 + 3145 0060 0028 cmp r0, #0 + 3146 0062 00D0 beq .LCB2683 + 3147 0064 98E0 b .L169 @long jump + 3148 .LCB2683: + ARM GAS /tmp/cchCqftX.s page 198 + + + 3149 .L159: + 3150 .LVL245: +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3151 .loc 1 5038 5 is_stmt 1 view .LVU948 +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3152 .loc 1 5038 9 is_stmt 0 view .LVU949 + 3153 0066 2268 ldr r2, [r4] +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3154 .loc 1 5038 45 view .LVU950 + 3155 0068 049B ldr r3, [sp, #16] + 3156 006a 1E43 orrs r6, r3 + 3157 .LVL246: +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3158 .loc 1 5038 25 view .LVU951 + 3159 006c 9664 str r6, [r2, #72] +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3160 .loc 1 5041 5 is_stmt 1 view .LVU952 + 3161 006e 2268 ldr r2, [r4] + 3162 0070 D368 ldr r3, [r2, #12] + 3163 0072 2B43 orrs r3, r5 + 3164 0074 D360 str r3, [r2, #12] + 3165 0076 0020 movs r0, #0 + 3166 .L148: +5046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3167 .loc 1 5046 1 is_stmt 0 view .LVU953 + 3168 @ sp needed + 3169 .LVL247: + 3170 .LVL248: +5046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3171 .loc 1 5046 1 view .LVU954 + 3172 0078 70BD pop {r4, r5, r6, pc} + 3173 .LVL249: + 3174 .L167: +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3175 .loc 1 4889 5 is_stmt 1 view .LVU955 +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3176 .loc 1 4889 8 is_stmt 0 view .LVU956 + 3177 007a 002A cmp r2, #0 + 3178 007c 03D0 beq .L170 + 3179 .L150: +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3180 .loc 1 4895 7 is_stmt 1 view .LVU957 +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3181 .loc 1 4895 27 is_stmt 0 view .LVU958 + 3182 007e 4623 movs r3, #70 + 3183 0080 0221 movs r1, #2 + 3184 .LVL250: +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3185 .loc 1 4895 27 view .LVU959 + 3186 0082 E154 strb r1, [r4, r3] + 3187 0084 CBE7 b .L149 + 3188 .LVL251: + 3189 .L170: +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3190 .loc 1 4889 31 discriminator 1 view .LVU960 + 3191 0086 049B ldr r3, [sp, #16] + 3192 0088 002B cmp r3, #0 + ARM GAS /tmp/cchCqftX.s page 199 + + + 3193 008a F8D0 beq .L150 + 3194 008c F4E7 b .L148 + 3195 .LVL252: + 3196 .L168: +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3197 .loc 1 4902 3 view .LVU961 + 3198 008e 0120 movs r0, #1 + 3199 0090 F2E7 b .L148 + 3200 .L152: + 3201 0092 8023 movs r3, #128 + 3202 0094 9B01 lsls r3, r3, #6 + 3203 0096 9D42 cmp r5, r3 + 3204 0098 56D0 beq .L156 + 3205 009a 8023 movs r3, #128 + 3206 009c DB01 lsls r3, r3, #7 + 3207 009e 9D42 cmp r5, r3 + 3208 00a0 66D0 beq .L157 + 3209 00a2 8023 movs r3, #128 + 3210 00a4 5B01 lsls r3, r3, #5 + 3211 00a6 9D42 cmp r5, r3 + 3212 00a8 12D1 bne .L171 +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3213 .loc 1 4979 7 is_stmt 1 view .LVU962 +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3214 .loc 1 4979 17 is_stmt 0 view .LVU963 + 3215 00aa 236B ldr r3, [r4, #48] +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3216 .loc 1 4979 52 view .LVU964 + 3217 00ac 3E49 ldr r1, .L172+12 + 3218 00ae 9962 str r1, [r3, #40] +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3219 .loc 1 4980 7 is_stmt 1 view .LVU965 +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3220 .loc 1 4980 17 is_stmt 0 view .LVU966 + 3221 00b0 236B ldr r3, [r4, #48] +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3222 .loc 1 4980 56 view .LVU967 + 3223 00b2 3E49 ldr r1, .L172+16 + 3224 00b4 D962 str r1, [r3, #44] +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3225 .loc 1 4983 7 is_stmt 1 view .LVU968 +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3226 .loc 1 4983 17 is_stmt 0 view .LVU969 + 3227 00b6 236B ldr r3, [r4, #48] +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3228 .loc 1 4983 53 view .LVU970 + 3229 00b8 3A49 ldr r1, .L172+8 + 3230 00ba 1963 str r1, [r3, #48] +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3231 .loc 1 4986 7 is_stmt 1 view .LVU971 +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3232 .loc 1 4986 71 is_stmt 0 view .LVU972 + 3233 00bc 2168 ldr r1, [r4] +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3234 .loc 1 4986 66 view .LVU973 + 3235 00be 4C31 adds r1, r1, #76 +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + ARM GAS /tmp/cchCqftX.s page 200 + + + 3236 .loc 1 4986 11 view .LVU974 + 3237 00c0 206B ldr r0, [r4, #48] + 3238 00c2 059B ldr r3, [sp, #20] + 3239 00c4 FFF7FEFF bl HAL_DMA_Start_IT + 3240 .LVL253: +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3241 .loc 1 4986 10 discriminator 1 view .LVU975 + 3242 00c8 0028 cmp r0, #0 + 3243 00ca CCD0 beq .L159 +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3244 .loc 1 4990 16 view .LVU976 + 3245 00cc 0120 movs r0, #1 + 3246 00ce D3E7 b .L148 + 3247 .LVL254: + 3248 .L171: +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3249 .loc 1 4902 3 view .LVU977 + 3250 00d0 0120 movs r0, #1 + 3251 00d2 D1E7 b .L148 + 3252 .L153: +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3253 .loc 1 4925 7 is_stmt 1 view .LVU978 +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3254 .loc 1 4925 17 is_stmt 0 view .LVU979 + 3255 00d4 636A ldr r3, [r4, #36] +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3256 .loc 1 4925 52 view .LVU980 + 3257 00d6 3449 ldr r1, .L172+12 + 3258 00d8 9962 str r1, [r3, #40] +4926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3259 .loc 1 4926 7 is_stmt 1 view .LVU981 +4926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3260 .loc 1 4926 17 is_stmt 0 view .LVU982 + 3261 00da 636A ldr r3, [r4, #36] +4926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3262 .loc 1 4926 56 view .LVU983 + 3263 00dc 3349 ldr r1, .L172+16 + 3264 00de D962 str r1, [r3, #44] +4929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3265 .loc 1 4929 7 is_stmt 1 view .LVU984 +4929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3266 .loc 1 4929 17 is_stmt 0 view .LVU985 + 3267 00e0 636A ldr r3, [r4, #36] +4929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3268 .loc 1 4929 53 view .LVU986 + 3269 00e2 3049 ldr r1, .L172+8 + 3270 00e4 1963 str r1, [r3, #48] +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3271 .loc 1 4932 7 is_stmt 1 view .LVU987 +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3272 .loc 1 4932 71 is_stmt 0 view .LVU988 + 3273 00e6 2168 ldr r1, [r4] +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3274 .loc 1 4932 66 view .LVU989 + 3275 00e8 4C31 adds r1, r1, #76 +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3276 .loc 1 4932 11 view .LVU990 + ARM GAS /tmp/cchCqftX.s page 201 + + + 3277 00ea 606A ldr r0, [r4, #36] + 3278 00ec 059B ldr r3, [sp, #20] + 3279 00ee FFF7FEFF bl HAL_DMA_Start_IT + 3280 .LVL255: +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3281 .loc 1 4932 10 discriminator 1 view .LVU991 + 3282 00f2 0028 cmp r0, #0 + 3283 00f4 B7D0 beq .L159 +4936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3284 .loc 1 4936 16 view .LVU992 + 3285 00f6 0120 movs r0, #1 + 3286 00f8 BEE7 b .L148 + 3287 .LVL256: + 3288 .L154: +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3289 .loc 1 4943 7 is_stmt 1 view .LVU993 +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3290 .loc 1 4943 17 is_stmt 0 view .LVU994 + 3291 00fa A36A ldr r3, [r4, #40] +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3292 .loc 1 4943 52 view .LVU995 + 3293 00fc 2A49 ldr r1, .L172+12 + 3294 00fe 9962 str r1, [r3, #40] +4944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3295 .loc 1 4944 7 is_stmt 1 view .LVU996 +4944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3296 .loc 1 4944 17 is_stmt 0 view .LVU997 + 3297 0100 A36A ldr r3, [r4, #40] +4944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3298 .loc 1 4944 56 view .LVU998 + 3299 0102 2A49 ldr r1, .L172+16 + 3300 0104 D962 str r1, [r3, #44] +4947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3301 .loc 1 4947 7 is_stmt 1 view .LVU999 +4947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3302 .loc 1 4947 17 is_stmt 0 view .LVU1000 + 3303 0106 A36A ldr r3, [r4, #40] +4947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3304 .loc 1 4947 53 view .LVU1001 + 3305 0108 2649 ldr r1, .L172+8 + 3306 010a 1963 str r1, [r3, #48] +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3307 .loc 1 4950 7 is_stmt 1 view .LVU1002 +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3308 .loc 1 4950 71 is_stmt 0 view .LVU1003 + 3309 010c 2168 ldr r1, [r4] +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3310 .loc 1 4950 66 view .LVU1004 + 3311 010e 4C31 adds r1, r1, #76 +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3312 .loc 1 4950 11 view .LVU1005 + 3313 0110 A06A ldr r0, [r4, #40] + 3314 0112 059B ldr r3, [sp, #20] + 3315 0114 FFF7FEFF bl HAL_DMA_Start_IT + 3316 .LVL257: +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3317 .loc 1 4950 10 discriminator 1 view .LVU1006 + ARM GAS /tmp/cchCqftX.s page 202 + + + 3318 0118 0028 cmp r0, #0 + 3319 011a A4D0 beq .L159 +4954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3320 .loc 1 4954 16 view .LVU1007 + 3321 011c 0120 movs r0, #1 + 3322 011e ABE7 b .L148 + 3323 .LVL258: + 3324 .L151: +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3325 .loc 1 4961 7 is_stmt 1 view .LVU1008 +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3326 .loc 1 4961 17 is_stmt 0 view .LVU1009 + 3327 0120 E36A ldr r3, [r4, #44] +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3328 .loc 1 4961 52 view .LVU1010 + 3329 0122 2149 ldr r1, .L172+12 + 3330 0124 9962 str r1, [r3, #40] +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3331 .loc 1 4962 7 is_stmt 1 view .LVU1011 +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3332 .loc 1 4962 17 is_stmt 0 view .LVU1012 + 3333 0126 E36A ldr r3, [r4, #44] +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3334 .loc 1 4962 56 view .LVU1013 + 3335 0128 2049 ldr r1, .L172+16 + 3336 012a D962 str r1, [r3, #44] +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3337 .loc 1 4965 7 is_stmt 1 view .LVU1014 +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3338 .loc 1 4965 17 is_stmt 0 view .LVU1015 + 3339 012c E36A ldr r3, [r4, #44] +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3340 .loc 1 4965 53 view .LVU1016 + 3341 012e 1D49 ldr r1, .L172+8 + 3342 0130 1963 str r1, [r3, #48] +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3343 .loc 1 4968 7 is_stmt 1 view .LVU1017 +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3344 .loc 1 4968 71 is_stmt 0 view .LVU1018 + 3345 0132 2168 ldr r1, [r4] +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3346 .loc 1 4968 66 view .LVU1019 + 3347 0134 4C31 adds r1, r1, #76 +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3348 .loc 1 4968 11 view .LVU1020 + 3349 0136 E06A ldr r0, [r4, #44] + 3350 0138 059B ldr r3, [sp, #20] + 3351 013a FFF7FEFF bl HAL_DMA_Start_IT + 3352 .LVL259: +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3353 .loc 1 4968 10 discriminator 1 view .LVU1021 + 3354 013e 0028 cmp r0, #0 + 3355 0140 00D1 bne .LCB2882 + 3356 0142 90E7 b .L159 @long jump + 3357 .LCB2882: +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3358 .loc 1 4972 16 view .LVU1022 + ARM GAS /tmp/cchCqftX.s page 203 + + + 3359 0144 0120 movs r0, #1 + 3360 0146 97E7 b .L148 + 3361 .LVL260: + 3362 .L156: +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3363 .loc 1 4997 7 is_stmt 1 view .LVU1023 +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3364 .loc 1 4997 17 is_stmt 0 view .LVU1024 + 3365 0148 636B ldr r3, [r4, #52] +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3366 .loc 1 4997 60 view .LVU1025 + 3367 014a 1949 ldr r1, .L172+20 + 3368 014c 9962 str r1, [r3, #40] +4998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3369 .loc 1 4998 7 is_stmt 1 view .LVU1026 +4998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3370 .loc 1 4998 17 is_stmt 0 view .LVU1027 + 3371 014e 636B ldr r3, [r4, #52] +4998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3372 .loc 1 4998 64 view .LVU1028 + 3373 0150 1849 ldr r1, .L172+24 + 3374 0152 D962 str r1, [r3, #44] +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3375 .loc 1 5001 7 is_stmt 1 view .LVU1029 +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3376 .loc 1 5001 17 is_stmt 0 view .LVU1030 + 3377 0154 636B ldr r3, [r4, #52] +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3378 .loc 1 5001 61 view .LVU1031 + 3379 0156 1349 ldr r1, .L172+8 + 3380 0158 1963 str r1, [r3, #48] +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3381 .loc 1 5004 7 is_stmt 1 view .LVU1032 +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3382 .loc 1 5004 79 is_stmt 0 view .LVU1033 + 3383 015a 2168 ldr r1, [r4] +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3384 .loc 1 5004 74 view .LVU1034 + 3385 015c 4C31 adds r1, r1, #76 +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3386 .loc 1 5004 11 view .LVU1035 + 3387 015e 606B ldr r0, [r4, #52] + 3388 0160 059B ldr r3, [sp, #20] + 3389 0162 FFF7FEFF bl HAL_DMA_Start_IT + 3390 .LVL261: +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3391 .loc 1 5004 10 discriminator 1 view .LVU1036 + 3392 0166 0028 cmp r0, #0 + 3393 0168 00D1 bne .LCB2913 + 3394 016a 7CE7 b .L159 @long jump + 3395 .LCB2913: +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3396 .loc 1 5008 16 view .LVU1037 + 3397 016c 0120 movs r0, #1 + 3398 016e 83E7 b .L148 + 3399 .LVL262: + 3400 .L157: + ARM GAS /tmp/cchCqftX.s page 204 + + +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3401 .loc 1 5015 7 is_stmt 1 view .LVU1038 +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3402 .loc 1 5015 17 is_stmt 0 view .LVU1039 + 3403 0170 A36B ldr r3, [r4, #56] +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3404 .loc 1 5015 56 view .LVU1040 + 3405 0172 1149 ldr r1, .L172+28 + 3406 0174 9962 str r1, [r3, #40] +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3407 .loc 1 5016 7 is_stmt 1 view .LVU1041 +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3408 .loc 1 5016 17 is_stmt 0 view .LVU1042 + 3409 0176 A36B ldr r3, [r4, #56] +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3410 .loc 1 5016 60 view .LVU1043 + 3411 0178 1049 ldr r1, .L172+32 + 3412 017a D962 str r1, [r3, #44] +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3413 .loc 1 5019 7 is_stmt 1 view .LVU1044 +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3414 .loc 1 5019 17 is_stmt 0 view .LVU1045 + 3415 017c A36B ldr r3, [r4, #56] +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3416 .loc 1 5019 57 view .LVU1046 + 3417 017e 0949 ldr r1, .L172+8 + 3418 0180 1963 str r1, [r3, #48] +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3419 .loc 1 5022 7 is_stmt 1 view .LVU1047 +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3420 .loc 1 5022 75 is_stmt 0 view .LVU1048 + 3421 0182 2168 ldr r1, [r4] +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3422 .loc 1 5022 70 view .LVU1049 + 3423 0184 4C31 adds r1, r1, #76 +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3424 .loc 1 5022 11 view .LVU1050 + 3425 0186 A06B ldr r0, [r4, #56] + 3426 0188 059B ldr r3, [sp, #20] + 3427 018a FFF7FEFF bl HAL_DMA_Start_IT + 3428 .LVL263: +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3429 .loc 1 5022 10 discriminator 1 view .LVU1051 + 3430 018e 0028 cmp r0, #0 + 3431 0190 00D1 bne .LCB2944 + 3432 0192 68E7 b .L159 @long jump + 3433 .LCB2944: +5026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3434 .loc 1 5026 16 view .LVU1052 + 3435 0194 0120 movs r0, #1 + 3436 0196 6FE7 b .L148 + 3437 .L169: +4918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3438 .loc 1 4918 16 view .LVU1053 + 3439 0198 0120 movs r0, #1 + 3440 019a 6DE7 b .L148 + 3441 .L173: + ARM GAS /tmp/cchCqftX.s page 205 + + + 3442 .align 2 + 3443 .L172: + 3444 019c 00000000 .word TIM_DMAPeriodElapsedCplt + 3445 01a0 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 3446 01a4 00000000 .word TIM_DMAError + 3447 01a8 00000000 .word TIM_DMACaptureCplt + 3448 01ac 00000000 .word TIM_DMACaptureHalfCplt + 3449 01b0 00000000 .word TIMEx_DMACommutationCplt + 3450 01b4 00000000 .word TIMEx_DMACommutationHalfCplt + 3451 01b8 00000000 .word TIM_DMATriggerCplt + 3452 01bc 00000000 .word TIM_DMATriggerHalfCplt + 3453 .cfi_endproc + 3454 .LFE107: + 3456 .section .text.HAL_TIM_DMABurst_ReadStart,"ax",%progbits + 3457 .align 1 + 3458 .global HAL_TIM_DMABurst_ReadStart + 3459 .syntax unified + 3460 .code 16 + 3461 .thumb_func + 3463 HAL_TIM_DMABurst_ReadStart: + 3464 .LVL264: + 3465 .LFB106: +4821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; + 3466 .loc 1 4821 1 is_stmt 1 view -0 + 3467 .cfi_startproc + 3468 @ args = 4, pretend = 0, frame = 0 + 3469 @ frame_needed = 0, uses_anonymous_args = 0 +4821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; + 3470 .loc 1 4821 1 is_stmt 0 view .LVU1055 + 3471 0000 10B5 push {r4, lr} + 3472 .cfi_def_cfa_offset 8 + 3473 .cfi_offset 4, -8 + 3474 .cfi_offset 14, -4 + 3475 0002 82B0 sub sp, sp, #8 + 3476 .cfi_def_cfa_offset 16 +4822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3477 .loc 1 4822 3 is_stmt 1 view .LVU1056 +4824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 3478 .loc 1 4824 3 view .LVU1057 +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3479 .loc 1 4825 59 is_stmt 0 view .LVU1058 + 3480 0004 049C ldr r4, [sp, #16] + 3481 0006 240A lsrs r4, r4, #8 +4824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 3482 .loc 1 4824 12 view .LVU1059 + 3483 0008 0134 adds r4, r4, #1 + 3484 000a 0194 str r4, [sp, #4] + 3485 000c 049C ldr r4, [sp, #16] + 3486 000e 0094 str r4, [sp] + 3487 0010 FFF7FEFF bl HAL_TIM_DMABurst_MultiReadStart + 3488 .LVL265: +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3489 .loc 1 4828 3 is_stmt 1 view .LVU1060 +4829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3490 .loc 1 4829 1 is_stmt 0 view .LVU1061 + 3491 0014 02B0 add sp, sp, #8 + 3492 @ sp needed + ARM GAS /tmp/cchCqftX.s page 206 + + + 3493 0016 10BD pop {r4, pc} + 3494 .cfi_endproc + 3495 .LFE106: + 3497 .section .text.HAL_TIM_DMABurst_ReadStop,"ax",%progbits + 3498 .align 1 + 3499 .global HAL_TIM_DMABurst_ReadStop + 3500 .syntax unified + 3501 .code 16 + 3502 .thumb_func + 3504 HAL_TIM_DMABurst_ReadStop: + 3505 .LVL266: + 3506 .LFB108: +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3507 .loc 1 5055 1 is_stmt 1 view -0 + 3508 .cfi_startproc + 3509 @ args = 0, pretend = 0, frame = 0 + 3510 @ frame_needed = 0, uses_anonymous_args = 0 +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3511 .loc 1 5055 1 is_stmt 0 view .LVU1063 + 3512 0000 70B5 push {r4, r5, r6, lr} + 3513 .cfi_def_cfa_offset 16 + 3514 .cfi_offset 4, -16 + 3515 .cfi_offset 5, -12 + 3516 .cfi_offset 6, -8 + 3517 .cfi_offset 14, -4 + 3518 0002 0500 movs r5, r0 + 3519 0004 0C00 movs r4, r1 +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3520 .loc 1 5056 3 is_stmt 1 view .LVU1064 + 3521 .LVL267: +5059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3522 .loc 1 5059 3 view .LVU1065 +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3523 .loc 1 5062 3 view .LVU1066 + 3524 0006 8023 movs r3, #128 + 3525 0008 1B01 lsls r3, r3, #4 + 3526 000a 9942 cmp r1, r3 + 3527 000c 34D0 beq .L176 + 3528 000e 19D8 bhi .L177 + 3529 0010 8023 movs r3, #128 + 3530 0012 9B00 lsls r3, r3, #2 + 3531 0014 9942 cmp r1, r3 + 3532 0016 27D0 beq .L178 + 3533 0018 8023 movs r3, #128 + 3534 001a DB00 lsls r3, r3, #3 + 3535 001c 9942 cmp r1, r3 + 3536 001e 27D0 beq .L179 + 3537 0020 8023 movs r3, #128 + 3538 0022 5B00 lsls r3, r3, #1 + 3539 0024 9942 cmp r1, r3 + 3540 0026 0BD1 bne .L186 +5066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3541 .loc 1 5066 7 view .LVU1067 +5066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3542 .loc 1 5066 13 is_stmt 0 view .LVU1068 + 3543 0028 006A ldr r0, [r0, #32] + 3544 .LVL268: + ARM GAS /tmp/cchCqftX.s page 207 + + +5066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3545 .loc 1 5066 13 view .LVU1069 + 3546 002a FFF7FEFF bl HAL_DMA_Abort_IT + 3547 .LVL269: +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3548 .loc 1 5067 7 is_stmt 1 view .LVU1070 +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3549 .loc 1 5104 3 view .LVU1071 + 3550 .L185: +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3551 .loc 1 5107 5 view .LVU1072 + 3552 002e 2A68 ldr r2, [r5] + 3553 0030 D368 ldr r3, [r2, #12] + 3554 0032 A343 bics r3, r4 + 3555 0034 D360 str r3, [r2, #12] +5110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3556 .loc 1 5110 5 view .LVU1073 +5110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3557 .loc 1 5110 25 is_stmt 0 view .LVU1074 + 3558 0036 4623 movs r3, #70 + 3559 0038 0122 movs r2, #1 + 3560 003a EA54 strb r2, [r5, r3] + 3561 003c 0020 movs r0, #0 + 3562 .L181: + 3563 .LVL270: +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3564 .loc 1 5114 3 is_stmt 1 view .LVU1075 +5115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3565 .loc 1 5115 1 is_stmt 0 view .LVU1076 + 3566 @ sp needed + 3567 .LVL271: + 3568 .LVL272: +5115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3569 .loc 1 5115 1 view .LVU1077 + 3570 003e 70BD pop {r4, r5, r6, pc} + 3571 .LVL273: + 3572 .L186: +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3573 .loc 1 5062 3 view .LVU1078 + 3574 0040 0120 movs r0, #1 + 3575 .LVL274: +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3576 .loc 1 5062 3 view .LVU1079 + 3577 0042 FCE7 b .L181 + 3578 .LVL275: + 3579 .L177: +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3580 .loc 1 5062 3 view .LVU1080 + 3581 0044 8023 movs r3, #128 + 3582 0046 9B01 lsls r3, r3, #6 + 3583 0048 9942 cmp r1, r3 + 3584 004a 19D0 beq .L182 + 3585 004c 8023 movs r3, #128 + 3586 004e DB01 lsls r3, r3, #7 + 3587 0050 9942 cmp r1, r3 + 3588 0052 19D0 beq .L183 + 3589 0054 8023 movs r3, #128 + ARM GAS /tmp/cchCqftX.s page 208 + + + 3590 0056 5B01 lsls r3, r3, #5 + 3591 0058 9942 cmp r1, r3 + 3592 005a 03D1 bne .L187 +5086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3593 .loc 1 5086 7 is_stmt 1 view .LVU1081 +5086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3594 .loc 1 5086 13 is_stmt 0 view .LVU1082 + 3595 005c 006B ldr r0, [r0, #48] + 3596 .LVL276: +5086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3597 .loc 1 5086 13 view .LVU1083 + 3598 005e FFF7FEFF bl HAL_DMA_Abort_IT + 3599 .LVL277: +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3600 .loc 1 5087 7 is_stmt 1 view .LVU1084 +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3601 .loc 1 5104 3 view .LVU1085 + 3602 0062 E4E7 b .L185 + 3603 .LVL278: + 3604 .L187: +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3605 .loc 1 5062 3 is_stmt 0 view .LVU1086 + 3606 0064 0120 movs r0, #1 + 3607 .LVL279: +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3608 .loc 1 5062 3 view .LVU1087 + 3609 0066 EAE7 b .L181 + 3610 .LVL280: + 3611 .L178: +5071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3612 .loc 1 5071 7 is_stmt 1 view .LVU1088 +5071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3613 .loc 1 5071 13 is_stmt 0 view .LVU1089 + 3614 0068 406A ldr r0, [r0, #36] + 3615 .LVL281: +5071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3616 .loc 1 5071 13 view .LVU1090 + 3617 006a FFF7FEFF bl HAL_DMA_Abort_IT + 3618 .LVL282: +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3619 .loc 1 5072 7 is_stmt 1 view .LVU1091 +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3620 .loc 1 5104 3 view .LVU1092 + 3621 006e DEE7 b .L185 + 3622 .LVL283: + 3623 .L179: +5076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3624 .loc 1 5076 7 view .LVU1093 +5076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3625 .loc 1 5076 13 is_stmt 0 view .LVU1094 + 3626 0070 806A ldr r0, [r0, #40] + 3627 .LVL284: +5076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3628 .loc 1 5076 13 view .LVU1095 + 3629 0072 FFF7FEFF bl HAL_DMA_Abort_IT + 3630 .LVL285: +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 209 + + + 3631 .loc 1 5077 7 is_stmt 1 view .LVU1096 +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3632 .loc 1 5104 3 view .LVU1097 + 3633 0076 DAE7 b .L185 + 3634 .LVL286: + 3635 .L176: +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3636 .loc 1 5081 7 view .LVU1098 +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3637 .loc 1 5081 13 is_stmt 0 view .LVU1099 + 3638 0078 C06A ldr r0, [r0, #44] + 3639 .LVL287: +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3640 .loc 1 5081 13 view .LVU1100 + 3641 007a FFF7FEFF bl HAL_DMA_Abort_IT + 3642 .LVL288: +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3643 .loc 1 5082 7 is_stmt 1 view .LVU1101 +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3644 .loc 1 5104 3 view .LVU1102 + 3645 007e D6E7 b .L185 + 3646 .LVL289: + 3647 .L182: +5091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3648 .loc 1 5091 7 view .LVU1103 +5091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3649 .loc 1 5091 13 is_stmt 0 view .LVU1104 + 3650 0080 406B ldr r0, [r0, #52] + 3651 .LVL290: +5091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3652 .loc 1 5091 13 view .LVU1105 + 3653 0082 FFF7FEFF bl HAL_DMA_Abort_IT + 3654 .LVL291: +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3655 .loc 1 5092 7 is_stmt 1 view .LVU1106 +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3656 .loc 1 5104 3 view .LVU1107 + 3657 0086 D2E7 b .L185 + 3658 .LVL292: + 3659 .L183: +5096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3660 .loc 1 5096 7 view .LVU1108 +5096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3661 .loc 1 5096 13 is_stmt 0 view .LVU1109 + 3662 0088 806B ldr r0, [r0, #56] + 3663 .LVL293: +5096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3664 .loc 1 5096 13 view .LVU1110 + 3665 008a FFF7FEFF bl HAL_DMA_Abort_IT + 3666 .LVL294: +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3667 .loc 1 5097 7 is_stmt 1 view .LVU1111 +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3668 .loc 1 5104 3 view .LVU1112 + 3669 008e CEE7 b .L185 + 3670 .cfi_endproc + 3671 .LFE108: + ARM GAS /tmp/cchCqftX.s page 210 + + + 3673 .section .text.HAL_TIM_GenerateEvent,"ax",%progbits + 3674 .align 1 + 3675 .global HAL_TIM_GenerateEvent + 3676 .syntax unified + 3677 .code 16 + 3678 .thumb_func + 3680 HAL_TIM_GenerateEvent: + 3681 .LVL295: + 3682 .LFB109: +5138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 3683 .loc 1 5138 1 view -0 + 3684 .cfi_startproc + 3685 @ args = 0, pretend = 0, frame = 0 + 3686 @ frame_needed = 0, uses_anonymous_args = 0 +5138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 3687 .loc 1 5138 1 is_stmt 0 view .LVU1114 + 3688 0000 30B5 push {r4, r5, lr} + 3689 .cfi_def_cfa_offset 12 + 3690 .cfi_offset 4, -12 + 3691 .cfi_offset 5, -8 + 3692 .cfi_offset 14, -4 +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_EVENT_SOURCE(EventSource)); + 3693 .loc 1 5140 3 is_stmt 1 view .LVU1115 +5141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3694 .loc 1 5141 3 view .LVU1116 +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3695 .loc 1 5144 3 view .LVU1117 +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3696 .loc 1 5144 3 view .LVU1118 + 3697 0002 3C23 movs r3, #60 + 3698 0004 C35C ldrb r3, [r0, r3] + 3699 0006 012B cmp r3, #1 + 3700 0008 0CD0 beq .L190 +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3701 .loc 1 5144 3 discriminator 2 view .LVU1119 + 3702 000a 3C23 movs r3, #60 + 3703 000c 0124 movs r4, #1 + 3704 000e C454 strb r4, [r0, r3] +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3705 .loc 1 5144 3 discriminator 2 view .LVU1120 +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3706 .loc 1 5147 3 view .LVU1121 +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3707 .loc 1 5147 15 is_stmt 0 view .LVU1122 + 3708 0010 3D22 movs r2, #61 + 3709 0012 0225 movs r5, #2 + 3710 0014 8554 strb r5, [r0, r2] +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3711 .loc 1 5150 3 is_stmt 1 view .LVU1123 +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3712 .loc 1 5150 7 is_stmt 0 view .LVU1124 + 3713 0016 0568 ldr r5, [r0] +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3714 .loc 1 5150 23 view .LVU1125 + 3715 0018 6961 str r1, [r5, #20] +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3716 .loc 1 5153 3 is_stmt 1 view .LVU1126 + ARM GAS /tmp/cchCqftX.s page 211 + + +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3717 .loc 1 5153 15 is_stmt 0 view .LVU1127 + 3718 001a 8454 strb r4, [r0, r2] +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3719 .loc 1 5155 3 is_stmt 1 view .LVU1128 +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3720 .loc 1 5155 3 view .LVU1129 + 3721 001c 0022 movs r2, #0 + 3722 001e C254 strb r2, [r0, r3] +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3723 .loc 1 5155 3 view .LVU1130 +5158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3724 .loc 1 5158 3 view .LVU1131 +5158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3725 .loc 1 5158 10 is_stmt 0 view .LVU1132 + 3726 0020 0020 movs r0, #0 + 3727 .LVL296: + 3728 .L189: +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3729 .loc 1 5159 1 view .LVU1133 + 3730 @ sp needed + 3731 0022 30BD pop {r4, r5, pc} + 3732 .LVL297: + 3733 .L190: +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3734 .loc 1 5144 3 discriminator 1 view .LVU1134 + 3735 0024 0220 movs r0, #2 + 3736 .LVL298: +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3737 .loc 1 5144 3 discriminator 1 view .LVU1135 + 3738 0026 FCE7 b .L189 + 3739 .cfi_endproc + 3740 .LFE109: + 3742 .section .text.HAL_TIM_ConfigTI1Input,"ax",%progbits + 3743 .align 1 + 3744 .global HAL_TIM_ConfigTI1Input + 3745 .syntax unified + 3746 .code 16 + 3747 .thumb_func + 3749 HAL_TIM_ConfigTI1Input: + 3750 .LVL299: + 3751 .LFB112: +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 3752 .loc 1 5468 1 is_stmt 1 view -0 + 3753 .cfi_startproc + 3754 @ args = 0, pretend = 0, frame = 0 + 3755 @ frame_needed = 0, uses_anonymous_args = 0 + 3756 @ link register save eliminated. +5469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3757 .loc 1 5469 3 view .LVU1137 +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); + 3758 .loc 1 5472 3 view .LVU1138 +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3759 .loc 1 5473 3 view .LVU1139 +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3760 .loc 1 5476 3 view .LVU1140 +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 212 + + + 3761 .loc 1 5476 16 is_stmt 0 view .LVU1141 + 3762 0000 0268 ldr r2, [r0] +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3763 .loc 1 5476 10 view .LVU1142 + 3764 0002 5368 ldr r3, [r2, #4] + 3765 .LVL300: +5479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3766 .loc 1 5479 3 is_stmt 1 view .LVU1143 +5479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3767 .loc 1 5479 10 is_stmt 0 view .LVU1144 + 3768 0004 8020 movs r0, #128 + 3769 .LVL301: +5479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3770 .loc 1 5479 10 view .LVU1145 + 3771 0006 8343 bics r3, r0 + 3772 .LVL302: +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3773 .loc 1 5482 3 is_stmt 1 view .LVU1146 +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3774 .loc 1 5482 10 is_stmt 0 view .LVU1147 + 3775 0008 0B43 orrs r3, r1 + 3776 .LVL303: +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3777 .loc 1 5485 3 is_stmt 1 view .LVU1148 +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3778 .loc 1 5485 23 is_stmt 0 view .LVU1149 + 3779 000a 5360 str r3, [r2, #4] +5487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3780 .loc 1 5487 3 is_stmt 1 view .LVU1150 +5488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3781 .loc 1 5488 1 is_stmt 0 view .LVU1151 + 3782 000c 0020 movs r0, #0 + 3783 @ sp needed + 3784 000e 7047 bx lr + 3785 .cfi_endproc + 3786 .LFE112: + 3788 .section .text.HAL_TIM_ReadCapturedValue,"ax",%progbits + 3789 .align 1 + 3790 .global HAL_TIM_ReadCapturedValue + 3791 .syntax unified + 3792 .code 16 + 3793 .thumb_func + 3795 HAL_TIM_ReadCapturedValue: + 3796 .LVL304: + 3797 .LFB115: +5583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpreg = 0U; + 3798 .loc 1 5583 1 is_stmt 1 view -0 + 3799 .cfi_startproc + 3800 @ args = 0, pretend = 0, frame = 0 + 3801 @ frame_needed = 0, uses_anonymous_args = 0 + 3802 @ link register save eliminated. +5584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3803 .loc 1 5584 3 view .LVU1153 +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3804 .loc 1 5586 3 view .LVU1154 + 3805 0000 0829 cmp r1, #8 + 3806 0002 13D0 beq .L193 + ARM GAS /tmp/cchCqftX.s page 213 + + + 3807 0004 08D8 bhi .L194 + 3808 0006 0029 cmp r1, #0 + 3809 0008 0DD0 beq .L195 + 3810 000a 0429 cmp r1, #4 + 3811 000c 02D1 bne .L199 +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3812 .loc 1 5601 7 view .LVU1155 +5604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3813 .loc 1 5604 7 view .LVU1156 +5604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3814 .loc 1 5604 22 is_stmt 0 view .LVU1157 + 3815 000e 0368 ldr r3, [r0] +5604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3816 .loc 1 5604 14 view .LVU1158 + 3817 0010 986B ldr r0, [r3, #56] + 3818 .LVL305: +5606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3819 .loc 1 5606 7 is_stmt 1 view .LVU1159 + 3820 0012 0AE0 b .L192 + 3821 .LVL306: + 3822 .L199: +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3823 .loc 1 5586 3 is_stmt 0 view .LVU1160 + 3824 0014 0020 movs r0, #0 + 3825 .LVL307: +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3826 .loc 1 5586 3 view .LVU1161 + 3827 0016 08E0 b .L192 + 3828 .LVL308: + 3829 .L194: +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3830 .loc 1 5586 3 view .LVU1162 + 3831 0018 0C29 cmp r1, #12 + 3832 001a 02D1 bne .L200 +5623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3833 .loc 1 5623 7 is_stmt 1 view .LVU1163 +5626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3834 .loc 1 5626 7 view .LVU1164 +5626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3835 .loc 1 5626 22 is_stmt 0 view .LVU1165 + 3836 001c 0368 ldr r3, [r0] +5626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3837 .loc 1 5626 14 view .LVU1166 + 3838 001e 186C ldr r0, [r3, #64] + 3839 .LVL309: +5628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3840 .loc 1 5628 7 is_stmt 1 view .LVU1167 +5635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3841 .loc 1 5635 3 view .LVU1168 +5635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3842 .loc 1 5635 10 is_stmt 0 view .LVU1169 + 3843 0020 03E0 b .L192 + 3844 .LVL310: + 3845 .L200: +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3846 .loc 1 5586 3 view .LVU1170 + 3847 0022 0020 movs r0, #0 + ARM GAS /tmp/cchCqftX.s page 214 + + + 3848 .LVL311: +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3849 .loc 1 5586 3 view .LVU1171 + 3850 0024 01E0 b .L192 + 3851 .LVL312: + 3852 .L195: +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3853 .loc 1 5591 7 is_stmt 1 view .LVU1172 +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3854 .loc 1 5594 7 view .LVU1173 +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3855 .loc 1 5594 21 is_stmt 0 view .LVU1174 + 3856 0026 0368 ldr r3, [r0] +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3857 .loc 1 5594 14 view .LVU1175 + 3858 0028 586B ldr r0, [r3, #52] + 3859 .LVL313: +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3860 .loc 1 5596 7 is_stmt 1 view .LVU1176 + 3861 .L192: +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3862 .loc 1 5636 1 is_stmt 0 view .LVU1177 + 3863 @ sp needed + 3864 002a 7047 bx lr + 3865 .LVL314: + 3866 .L193: +5612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3867 .loc 1 5612 7 is_stmt 1 view .LVU1178 +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3868 .loc 1 5615 7 view .LVU1179 +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3869 .loc 1 5615 22 is_stmt 0 view .LVU1180 + 3870 002c 0368 ldr r3, [r0] +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3871 .loc 1 5615 14 view .LVU1181 + 3872 002e D86B ldr r0, [r3, #60] + 3873 .LVL315: +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3874 .loc 1 5617 7 is_stmt 1 view .LVU1182 + 3875 0030 FBE7 b .L192 + 3876 .cfi_endproc + 3877 .LFE115: + 3879 .section .text.HAL_TIM_PeriodElapsedCallback,"ax",%progbits + 3880 .align 1 + 3881 .weak HAL_TIM_PeriodElapsedCallback + 3882 .syntax unified + 3883 .code 16 + 3884 .thumb_func + 3886 HAL_TIM_PeriodElapsedCallback: + 3887 .LVL316: + 3888 .LFB116: +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 3889 .loc 1 5667 1 view -0 + 3890 .cfi_startproc + 3891 @ args = 0, pretend = 0, frame = 0 + 3892 @ frame_needed = 0, uses_anonymous_args = 0 + 3893 @ link register save eliminated. + ARM GAS /tmp/cchCqftX.s page 215 + + +5669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3894 .loc 1 5669 3 view .LVU1184 +5674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3895 .loc 1 5674 1 is_stmt 0 view .LVU1185 + 3896 @ sp needed + 3897 0000 7047 bx lr + 3898 .cfi_endproc + 3899 .LFE116: + 3901 .section .text.TIM_DMAPeriodElapsedCplt,"ax",%progbits + 3902 .align 1 + 3903 .syntax unified + 3904 .code 16 + 3905 .thumb_func + 3907 TIM_DMAPeriodElapsedCplt: + 3908 .LVL317: + 3909 .LFB140: +6712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3910 .loc 1 6712 1 is_stmt 1 view -0 + 3911 .cfi_startproc + 3912 @ args = 0, pretend = 0, frame = 0 + 3913 @ frame_needed = 0, uses_anonymous_args = 0 +6712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3914 .loc 1 6712 1 is_stmt 0 view .LVU1187 + 3915 0000 10B5 push {r4, lr} + 3916 .cfi_def_cfa_offset 8 + 3917 .cfi_offset 4, -8 + 3918 .cfi_offset 14, -4 +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3919 .loc 1 6713 3 is_stmt 1 view .LVU1188 +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3920 .loc 1 6713 22 is_stmt 0 view .LVU1189 + 3921 0002 406A ldr r0, [r0, #36] + 3922 .LVL318: +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3923 .loc 1 6715 3 is_stmt 1 view .LVU1190 +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3924 .loc 1 6715 17 is_stmt 0 view .LVU1191 + 3925 0004 036A ldr r3, [r0, #32] +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3926 .loc 1 6715 42 view .LVU1192 + 3927 0006 9B69 ldr r3, [r3, #24] +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3928 .loc 1 6715 6 view .LVU1193 + 3929 0008 002B cmp r3, #0 + 3930 000a 02D1 bne .L203 +6717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3931 .loc 1 6717 5 is_stmt 1 view .LVU1194 +6717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3932 .loc 1 6717 17 is_stmt 0 view .LVU1195 + 3933 000c 3D33 adds r3, r3, #61 + 3934 000e 0122 movs r2, #1 + 3935 0010 C254 strb r2, [r0, r3] + 3936 .L203: +6723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 3937 .loc 1 6723 3 is_stmt 1 view .LVU1196 + 3938 0012 FFF7FEFF bl HAL_TIM_PeriodElapsedCallback + 3939 .LVL319: + ARM GAS /tmp/cchCqftX.s page 216 + + +6725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3940 .loc 1 6725 1 is_stmt 0 view .LVU1197 + 3941 @ sp needed + 3942 0016 10BD pop {r4, pc} + 3943 .cfi_endproc + 3944 .LFE140: + 3946 .section .text.HAL_TIM_PeriodElapsedHalfCpltCallback,"ax",%progbits + 3947 .align 1 + 3948 .weak HAL_TIM_PeriodElapsedHalfCpltCallback + 3949 .syntax unified + 3950 .code 16 + 3951 .thumb_func + 3953 HAL_TIM_PeriodElapsedHalfCpltCallback: + 3954 .LVL320: + 3955 .LFB117: +5682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 3956 .loc 1 5682 1 is_stmt 1 view -0 + 3957 .cfi_startproc + 3958 @ args = 0, pretend = 0, frame = 0 + 3959 @ frame_needed = 0, uses_anonymous_args = 0 + 3960 @ link register save eliminated. +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3961 .loc 1 5684 3 view .LVU1199 +5689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3962 .loc 1 5689 1 is_stmt 0 view .LVU1200 + 3963 @ sp needed + 3964 0000 7047 bx lr + 3965 .cfi_endproc + 3966 .LFE117: + 3968 .section .text.TIM_DMAPeriodElapsedHalfCplt,"ax",%progbits + 3969 .align 1 + 3970 .syntax unified + 3971 .code 16 + 3972 .thumb_func + 3974 TIM_DMAPeriodElapsedHalfCplt: + 3975 .LVL321: + 3976 .LFB141: +6733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3977 .loc 1 6733 1 is_stmt 1 view -0 + 3978 .cfi_startproc + 3979 @ args = 0, pretend = 0, frame = 0 + 3980 @ frame_needed = 0, uses_anonymous_args = 0 +6733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3981 .loc 1 6733 1 is_stmt 0 view .LVU1202 + 3982 0000 10B5 push {r4, lr} + 3983 .cfi_def_cfa_offset 8 + 3984 .cfi_offset 4, -8 + 3985 .cfi_offset 14, -4 +6734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3986 .loc 1 6734 3 is_stmt 1 view .LVU1203 +6734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3987 .loc 1 6734 22 is_stmt 0 view .LVU1204 + 3988 0002 406A ldr r0, [r0, #36] + 3989 .LVL322: +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 3990 .loc 1 6739 3 is_stmt 1 view .LVU1205 + 3991 0004 FFF7FEFF bl HAL_TIM_PeriodElapsedHalfCpltCallback + ARM GAS /tmp/cchCqftX.s page 217 + + + 3992 .LVL323: +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3993 .loc 1 6741 1 is_stmt 0 view .LVU1206 + 3994 @ sp needed + 3995 0008 10BD pop {r4, pc} + 3996 .cfi_endproc + 3997 .LFE141: + 3999 .section .text.HAL_TIM_OC_DelayElapsedCallback,"ax",%progbits + 4000 .align 1 + 4001 .weak HAL_TIM_OC_DelayElapsedCallback + 4002 .syntax unified + 4003 .code 16 + 4004 .thumb_func + 4006 HAL_TIM_OC_DelayElapsedCallback: + 4007 .LVL324: + 4008 .LFB118: +5697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4009 .loc 1 5697 1 is_stmt 1 view -0 + 4010 .cfi_startproc + 4011 @ args = 0, pretend = 0, frame = 0 + 4012 @ frame_needed = 0, uses_anonymous_args = 0 + 4013 @ link register save eliminated. +5699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4014 .loc 1 5699 3 view .LVU1208 +5704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4015 .loc 1 5704 1 is_stmt 0 view .LVU1209 + 4016 @ sp needed + 4017 0000 7047 bx lr + 4018 .cfi_endproc + 4019 .LFE118: + 4021 .section .text.HAL_TIM_IC_CaptureCallback,"ax",%progbits + 4022 .align 1 + 4023 .weak HAL_TIM_IC_CaptureCallback + 4024 .syntax unified + 4025 .code 16 + 4026 .thumb_func + 4028 HAL_TIM_IC_CaptureCallback: + 4029 .LVL325: + 4030 .LFB119: +5712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4031 .loc 1 5712 1 is_stmt 1 view -0 + 4032 .cfi_startproc + 4033 @ args = 0, pretend = 0, frame = 0 + 4034 @ frame_needed = 0, uses_anonymous_args = 0 + 4035 @ link register save eliminated. +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4036 .loc 1 5714 3 view .LVU1211 +5719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4037 .loc 1 5719 1 is_stmt 0 view .LVU1212 + 4038 @ sp needed + 4039 0000 7047 bx lr + 4040 .cfi_endproc + 4041 .LFE119: + 4043 .section .text.TIM_DMACaptureCplt,"ax",%progbits + 4044 .align 1 + 4045 .global TIM_DMACaptureCplt + 4046 .syntax unified + ARM GAS /tmp/cchCqftX.s page 218 + + + 4047 .code 16 + 4048 .thumb_func + 4050 TIM_DMACaptureCplt: + 4051 .LVL326: + 4052 .LFB138: +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4053 .loc 1 6610 1 is_stmt 1 view -0 + 4054 .cfi_startproc + 4055 @ args = 0, pretend = 0, frame = 0 + 4056 @ frame_needed = 0, uses_anonymous_args = 0 +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4057 .loc 1 6610 1 is_stmt 0 view .LVU1214 + 4058 0000 10B5 push {r4, lr} + 4059 .cfi_def_cfa_offset 8 + 4060 .cfi_offset 4, -8 + 4061 .cfi_offset 14, -4 +6611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4062 .loc 1 6611 3 is_stmt 1 view .LVU1215 +6611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4063 .loc 1 6611 22 is_stmt 0 view .LVU1216 + 4064 0002 446A ldr r4, [r0, #36] + 4065 .LVL327: +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4066 .loc 1 6613 3 is_stmt 1 view .LVU1217 +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4067 .loc 1 6613 25 is_stmt 0 view .LVU1218 + 4068 0004 636A ldr r3, [r4, #36] +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4069 .loc 1 6613 6 view .LVU1219 + 4070 0006 8342 cmp r3, r0 + 4071 0008 0ED0 beq .L213 +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4072 .loc 1 6623 8 is_stmt 1 view .LVU1220 +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4073 .loc 1 6623 30 is_stmt 0 view .LVU1221 + 4074 000a A36A ldr r3, [r4, #40] +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4075 .loc 1 6623 11 view .LVU1222 + 4076 000c 8342 cmp r3, r0 + 4077 000e 16D0 beq .L214 +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4078 .loc 1 6633 8 is_stmt 1 view .LVU1223 +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4079 .loc 1 6633 30 is_stmt 0 view .LVU1224 + 4080 0010 E36A ldr r3, [r4, #44] +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4081 .loc 1 6633 11 view .LVU1225 + 4082 0012 8342 cmp r3, r0 + 4083 0014 1ED0 beq .L215 +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4084 .loc 1 6643 8 is_stmt 1 view .LVU1226 +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4085 .loc 1 6643 30 is_stmt 0 view .LVU1227 + 4086 0016 236B ldr r3, [r4, #48] +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4087 .loc 1 6643 11 view .LVU1228 + 4088 0018 8342 cmp r3, r0 + ARM GAS /tmp/cchCqftX.s page 219 + + + 4089 001a 26D0 beq .L216 + 4090 .L210: +6656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4091 .loc 1 6656 3 is_stmt 1 view .LVU1229 +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4092 .loc 1 6661 3 view .LVU1230 + 4093 001c 2000 movs r0, r4 + 4094 .LVL328: +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4095 .loc 1 6661 3 is_stmt 0 view .LVU1231 + 4096 001e FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4097 .LVL329: +6664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4098 .loc 1 6664 3 is_stmt 1 view .LVU1232 +6664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4099 .loc 1 6664 17 is_stmt 0 view .LVU1233 + 4100 0022 0023 movs r3, #0 + 4101 0024 2377 strb r3, [r4, #28] +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4102 .loc 1 6665 1 view .LVU1234 + 4103 @ sp needed + 4104 .LVL330: +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4105 .loc 1 6665 1 view .LVU1235 + 4106 0026 10BD pop {r4, pc} + 4107 .LVL331: + 4108 .L213: +6615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4109 .loc 1 6615 5 is_stmt 1 view .LVU1236 +6615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4110 .loc 1 6615 19 is_stmt 0 view .LVU1237 + 4111 0028 0123 movs r3, #1 + 4112 002a 2377 strb r3, [r4, #28] +6617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4113 .loc 1 6617 5 is_stmt 1 view .LVU1238 +6617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4114 .loc 1 6617 19 is_stmt 0 view .LVU1239 + 4115 002c 8369 ldr r3, [r0, #24] +6617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4116 .loc 1 6617 8 view .LVU1240 + 4117 002e 002B cmp r3, #0 + 4118 0030 F4D1 bne .L210 +6619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4119 .loc 1 6619 7 is_stmt 1 view .LVU1241 + 4120 0032 0133 adds r3, r3, #1 + 4121 0034 3E22 movs r2, #62 + 4122 0036 A354 strb r3, [r4, r2] +6620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4123 .loc 1 6620 7 view .LVU1242 + 4124 0038 0432 adds r2, r2, #4 + 4125 003a A354 strb r3, [r4, r2] + 4126 003c EEE7 b .L210 + 4127 .L214: +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4128 .loc 1 6625 5 view .LVU1243 +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4129 .loc 1 6625 19 is_stmt 0 view .LVU1244 + ARM GAS /tmp/cchCqftX.s page 220 + + + 4130 003e 0223 movs r3, #2 + 4131 0040 2377 strb r3, [r4, #28] +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4132 .loc 1 6627 5 is_stmt 1 view .LVU1245 +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4133 .loc 1 6627 19 is_stmt 0 view .LVU1246 + 4134 0042 8369 ldr r3, [r0, #24] +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4135 .loc 1 6627 8 view .LVU1247 + 4136 0044 002B cmp r3, #0 + 4137 0046 E9D1 bne .L210 +6629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4138 .loc 1 6629 7 is_stmt 1 view .LVU1248 + 4139 0048 0133 adds r3, r3, #1 + 4140 004a 3F22 movs r2, #63 + 4141 004c A354 strb r3, [r4, r2] +6630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4142 .loc 1 6630 7 view .LVU1249 + 4143 004e 0432 adds r2, r2, #4 + 4144 0050 A354 strb r3, [r4, r2] + 4145 0052 E3E7 b .L210 + 4146 .L215: +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4147 .loc 1 6635 5 view .LVU1250 +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4148 .loc 1 6635 19 is_stmt 0 view .LVU1251 + 4149 0054 0423 movs r3, #4 + 4150 0056 2377 strb r3, [r4, #28] +6637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4151 .loc 1 6637 5 is_stmt 1 view .LVU1252 +6637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4152 .loc 1 6637 19 is_stmt 0 view .LVU1253 + 4153 0058 8369 ldr r3, [r0, #24] +6637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4154 .loc 1 6637 8 view .LVU1254 + 4155 005a 002B cmp r3, #0 + 4156 005c DED1 bne .L210 +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 4157 .loc 1 6639 7 is_stmt 1 view .LVU1255 + 4158 005e 0133 adds r3, r3, #1 + 4159 0060 4022 movs r2, #64 + 4160 0062 A354 strb r3, [r4, r2] +6640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4161 .loc 1 6640 7 view .LVU1256 + 4162 0064 0432 adds r2, r2, #4 + 4163 0066 A354 strb r3, [r4, r2] + 4164 0068 D8E7 b .L210 + 4165 .L216: +6645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4166 .loc 1 6645 5 view .LVU1257 +6645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4167 .loc 1 6645 19 is_stmt 0 view .LVU1258 + 4168 006a 0823 movs r3, #8 + 4169 006c 2377 strb r3, [r4, #28] +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4170 .loc 1 6647 5 is_stmt 1 view .LVU1259 +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 221 + + + 4171 .loc 1 6647 19 is_stmt 0 view .LVU1260 + 4172 006e 8369 ldr r3, [r0, #24] +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4173 .loc 1 6647 8 view .LVU1261 + 4174 0070 002B cmp r3, #0 + 4175 0072 D3D1 bne .L210 +6649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 4176 .loc 1 6649 7 is_stmt 1 view .LVU1262 + 4177 0074 0133 adds r3, r3, #1 + 4178 0076 4122 movs r2, #65 + 4179 0078 A354 strb r3, [r4, r2] +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4180 .loc 1 6650 7 view .LVU1263 + 4181 007a 0432 adds r2, r2, #4 + 4182 007c A354 strb r3, [r4, r2] + 4183 007e CDE7 b .L210 + 4184 .cfi_endproc + 4185 .LFE138: + 4187 .section .text.HAL_TIM_IC_CaptureHalfCpltCallback,"ax",%progbits + 4188 .align 1 + 4189 .weak HAL_TIM_IC_CaptureHalfCpltCallback + 4190 .syntax unified + 4191 .code 16 + 4192 .thumb_func + 4194 HAL_TIM_IC_CaptureHalfCpltCallback: + 4195 .LVL332: + 4196 .LFB120: +5727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4197 .loc 1 5727 1 view -0 + 4198 .cfi_startproc + 4199 @ args = 0, pretend = 0, frame = 0 + 4200 @ frame_needed = 0, uses_anonymous_args = 0 + 4201 @ link register save eliminated. +5729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4202 .loc 1 5729 3 view .LVU1265 +5734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4203 .loc 1 5734 1 is_stmt 0 view .LVU1266 + 4204 @ sp needed + 4205 0000 7047 bx lr + 4206 .cfi_endproc + 4207 .LFE120: + 4209 .section .text.TIM_DMACaptureHalfCplt,"ax",%progbits + 4210 .align 1 + 4211 .global TIM_DMACaptureHalfCplt + 4212 .syntax unified + 4213 .code 16 + 4214 .thumb_func + 4216 TIM_DMACaptureHalfCplt: + 4217 .LVL333: + 4218 .LFB139: +6673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4219 .loc 1 6673 1 is_stmt 1 view -0 + 4220 .cfi_startproc + 4221 @ args = 0, pretend = 0, frame = 0 + 4222 @ frame_needed = 0, uses_anonymous_args = 0 +6673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4223 .loc 1 6673 1 is_stmt 0 view .LVU1268 + ARM GAS /tmp/cchCqftX.s page 222 + + + 4224 0000 10B5 push {r4, lr} + 4225 .cfi_def_cfa_offset 8 + 4226 .cfi_offset 4, -8 + 4227 .cfi_offset 14, -4 +6674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4228 .loc 1 6674 3 is_stmt 1 view .LVU1269 +6674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4229 .loc 1 6674 22 is_stmt 0 view .LVU1270 + 4230 0002 446A ldr r4, [r0, #36] + 4231 .LVL334: +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4232 .loc 1 6676 3 is_stmt 1 view .LVU1271 +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4233 .loc 1 6676 25 is_stmt 0 view .LVU1272 + 4234 0004 636A ldr r3, [r4, #36] +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4235 .loc 1 6676 6 view .LVU1273 + 4236 0006 8342 cmp r3, r0 + 4237 0008 0BD0 beq .L223 +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4238 .loc 1 6680 8 is_stmt 1 view .LVU1274 +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4239 .loc 1 6680 30 is_stmt 0 view .LVU1275 + 4240 000a A36A ldr r3, [r4, #40] +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4241 .loc 1 6680 11 view .LVU1276 + 4242 000c 8342 cmp r3, r0 + 4243 000e 10D0 beq .L224 +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4244 .loc 1 6684 8 is_stmt 1 view .LVU1277 +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4245 .loc 1 6684 30 is_stmt 0 view .LVU1278 + 4246 0010 E36A ldr r3, [r4, #44] +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4247 .loc 1 6684 11 view .LVU1279 + 4248 0012 8342 cmp r3, r0 + 4249 0014 10D0 beq .L225 +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4250 .loc 1 6688 8 is_stmt 1 view .LVU1280 +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4251 .loc 1 6688 30 is_stmt 0 view .LVU1281 + 4252 0016 236B ldr r3, [r4, #48] +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4253 .loc 1 6688 11 view .LVU1282 + 4254 0018 8342 cmp r3, r0 + 4255 001a 04D1 bne .L220 +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4256 .loc 1 6690 5 is_stmt 1 view .LVU1283 +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4257 .loc 1 6690 19 is_stmt 0 view .LVU1284 + 4258 001c 0823 movs r3, #8 + 4259 001e 2377 strb r3, [r4, #28] + 4260 0020 01E0 b .L220 + 4261 .L223: +6678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4262 .loc 1 6678 5 is_stmt 1 view .LVU1285 +6678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 223 + + + 4263 .loc 1 6678 19 is_stmt 0 view .LVU1286 + 4264 0022 0123 movs r3, #1 + 4265 0024 2377 strb r3, [r4, #28] + 4266 .L220: +6695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4267 .loc 1 6695 3 is_stmt 1 view .LVU1287 +6700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4268 .loc 1 6700 3 view .LVU1288 + 4269 0026 2000 movs r0, r4 + 4270 .LVL335: +6700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4271 .loc 1 6700 3 is_stmt 0 view .LVU1289 + 4272 0028 FFF7FEFF bl HAL_TIM_IC_CaptureHalfCpltCallback + 4273 .LVL336: +6703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4274 .loc 1 6703 3 is_stmt 1 view .LVU1290 +6703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4275 .loc 1 6703 17 is_stmt 0 view .LVU1291 + 4276 002c 0023 movs r3, #0 + 4277 002e 2377 strb r3, [r4, #28] +6704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4278 .loc 1 6704 1 view .LVU1292 + 4279 @ sp needed + 4280 .LVL337: +6704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4281 .loc 1 6704 1 view .LVU1293 + 4282 0030 10BD pop {r4, pc} + 4283 .LVL338: + 4284 .L224: +6682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4285 .loc 1 6682 5 is_stmt 1 view .LVU1294 +6682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4286 .loc 1 6682 19 is_stmt 0 view .LVU1295 + 4287 0032 0223 movs r3, #2 + 4288 0034 2377 strb r3, [r4, #28] + 4289 0036 F6E7 b .L220 + 4290 .L225: +6686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4291 .loc 1 6686 5 is_stmt 1 view .LVU1296 +6686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4292 .loc 1 6686 19 is_stmt 0 view .LVU1297 + 4293 0038 0423 movs r3, #4 + 4294 003a 2377 strb r3, [r4, #28] + 4295 003c F3E7 b .L220 + 4296 .cfi_endproc + 4297 .LFE139: + 4299 .section .text.HAL_TIM_PWM_PulseFinishedCallback,"ax",%progbits + 4300 .align 1 + 4301 .weak HAL_TIM_PWM_PulseFinishedCallback + 4302 .syntax unified + 4303 .code 16 + 4304 .thumb_func + 4306 HAL_TIM_PWM_PulseFinishedCallback: + 4307 .LVL339: + 4308 .LFB121: +5742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4309 .loc 1 5742 1 is_stmt 1 view -0 + ARM GAS /tmp/cchCqftX.s page 224 + + + 4310 .cfi_startproc + 4311 @ args = 0, pretend = 0, frame = 0 + 4312 @ frame_needed = 0, uses_anonymous_args = 0 + 4313 @ link register save eliminated. +5744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4314 .loc 1 5744 3 view .LVU1299 +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4315 .loc 1 5749 1 is_stmt 0 view .LVU1300 + 4316 @ sp needed + 4317 0000 7047 bx lr + 4318 .cfi_endproc + 4319 .LFE121: + 4321 .section .text.TIM_DMADelayPulseCplt,"ax",%progbits + 4322 .align 1 + 4323 .syntax unified + 4324 .code 16 + 4325 .thumb_func + 4327 TIM_DMADelayPulseCplt: + 4328 .LVL340: + 4329 .LFB136: +6512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4330 .loc 1 6512 1 is_stmt 1 view -0 + 4331 .cfi_startproc + 4332 @ args = 0, pretend = 0, frame = 0 + 4333 @ frame_needed = 0, uses_anonymous_args = 0 +6512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4334 .loc 1 6512 1 is_stmt 0 view .LVU1302 + 4335 0000 10B5 push {r4, lr} + 4336 .cfi_def_cfa_offset 8 + 4337 .cfi_offset 4, -8 + 4338 .cfi_offset 14, -4 +6513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4339 .loc 1 6513 3 is_stmt 1 view .LVU1303 +6513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4340 .loc 1 6513 22 is_stmt 0 view .LVU1304 + 4341 0002 446A ldr r4, [r0, #36] + 4342 .LVL341: +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4343 .loc 1 6515 3 is_stmt 1 view .LVU1305 +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4344 .loc 1 6515 25 is_stmt 0 view .LVU1306 + 4345 0004 636A ldr r3, [r4, #36] +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4346 .loc 1 6515 6 view .LVU1307 + 4347 0006 8342 cmp r3, r0 + 4348 0008 0ED0 beq .L232 +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4349 .loc 1 6524 8 is_stmt 1 view .LVU1308 +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4350 .loc 1 6524 30 is_stmt 0 view .LVU1309 + 4351 000a A36A ldr r3, [r4, #40] +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4352 .loc 1 6524 11 view .LVU1310 + 4353 000c 8342 cmp r3, r0 + 4354 000e 14D0 beq .L233 +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4355 .loc 1 6533 8 is_stmt 1 view .LVU1311 + ARM GAS /tmp/cchCqftX.s page 225 + + +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4356 .loc 1 6533 30 is_stmt 0 view .LVU1312 + 4357 0010 E36A ldr r3, [r4, #44] +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4358 .loc 1 6533 11 view .LVU1313 + 4359 0012 8342 cmp r3, r0 + 4360 0014 1AD0 beq .L234 +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4361 .loc 1 6542 8 is_stmt 1 view .LVU1314 +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4362 .loc 1 6542 30 is_stmt 0 view .LVU1315 + 4363 0016 236B ldr r3, [r4, #48] +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4364 .loc 1 6542 11 view .LVU1316 + 4365 0018 8342 cmp r3, r0 + 4366 001a 20D0 beq .L235 + 4367 .L229: +6554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4368 .loc 1 6554 3 is_stmt 1 view .LVU1317 +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4369 .loc 1 6559 3 view .LVU1318 + 4370 001c 2000 movs r0, r4 + 4371 .LVL342: +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4372 .loc 1 6559 3 is_stmt 0 view .LVU1319 + 4373 001e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4374 .LVL343: +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4375 .loc 1 6562 3 is_stmt 1 view .LVU1320 +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4376 .loc 1 6562 17 is_stmt 0 view .LVU1321 + 4377 0022 0023 movs r3, #0 + 4378 0024 2377 strb r3, [r4, #28] +6563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4379 .loc 1 6563 1 view .LVU1322 + 4380 @ sp needed + 4381 .LVL344: +6563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4382 .loc 1 6563 1 view .LVU1323 + 4383 0026 10BD pop {r4, pc} + 4384 .LVL345: + 4385 .L232: +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4386 .loc 1 6517 5 is_stmt 1 view .LVU1324 +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4387 .loc 1 6517 19 is_stmt 0 view .LVU1325 + 4388 0028 0123 movs r3, #1 + 4389 002a 2377 strb r3, [r4, #28] +6519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4390 .loc 1 6519 5 is_stmt 1 view .LVU1326 +6519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4391 .loc 1 6519 19 is_stmt 0 view .LVU1327 + 4392 002c 8369 ldr r3, [r0, #24] +6519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4393 .loc 1 6519 8 view .LVU1328 + 4394 002e 002B cmp r3, #0 + 4395 0030 F4D1 bne .L229 + ARM GAS /tmp/cchCqftX.s page 226 + + +6521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4396 .loc 1 6521 7 is_stmt 1 view .LVU1329 + 4397 0032 3E33 adds r3, r3, #62 + 4398 0034 0122 movs r2, #1 + 4399 0036 E254 strb r2, [r4, r3] + 4400 0038 F0E7 b .L229 + 4401 .L233: +6526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4402 .loc 1 6526 5 view .LVU1330 +6526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4403 .loc 1 6526 19 is_stmt 0 view .LVU1331 + 4404 003a 0223 movs r3, #2 + 4405 003c 2377 strb r3, [r4, #28] +6528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4406 .loc 1 6528 5 is_stmt 1 view .LVU1332 +6528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4407 .loc 1 6528 19 is_stmt 0 view .LVU1333 + 4408 003e 8369 ldr r3, [r0, #24] +6528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4409 .loc 1 6528 8 view .LVU1334 + 4410 0040 002B cmp r3, #0 + 4411 0042 EBD1 bne .L229 +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4412 .loc 1 6530 7 is_stmt 1 view .LVU1335 + 4413 0044 3F33 adds r3, r3, #63 + 4414 0046 0122 movs r2, #1 + 4415 0048 E254 strb r2, [r4, r3] + 4416 004a E7E7 b .L229 + 4417 .L234: +6535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4418 .loc 1 6535 5 view .LVU1336 +6535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4419 .loc 1 6535 19 is_stmt 0 view .LVU1337 + 4420 004c 0423 movs r3, #4 + 4421 004e 2377 strb r3, [r4, #28] +6537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4422 .loc 1 6537 5 is_stmt 1 view .LVU1338 +6537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4423 .loc 1 6537 19 is_stmt 0 view .LVU1339 + 4424 0050 8369 ldr r3, [r0, #24] +6537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4425 .loc 1 6537 8 view .LVU1340 + 4426 0052 002B cmp r3, #0 + 4427 0054 E2D1 bne .L229 +6539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4428 .loc 1 6539 7 is_stmt 1 view .LVU1341 + 4429 0056 4033 adds r3, r3, #64 + 4430 0058 0122 movs r2, #1 + 4431 005a E254 strb r2, [r4, r3] + 4432 005c DEE7 b .L229 + 4433 .L235: +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4434 .loc 1 6544 5 view .LVU1342 +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4435 .loc 1 6544 19 is_stmt 0 view .LVU1343 + 4436 005e 0823 movs r3, #8 + 4437 0060 2377 strb r3, [r4, #28] + ARM GAS /tmp/cchCqftX.s page 227 + + +6546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4438 .loc 1 6546 5 is_stmt 1 view .LVU1344 +6546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4439 .loc 1 6546 19 is_stmt 0 view .LVU1345 + 4440 0062 8369 ldr r3, [r0, #24] +6546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4441 .loc 1 6546 8 view .LVU1346 + 4442 0064 002B cmp r3, #0 + 4443 0066 D9D1 bne .L229 +6548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4444 .loc 1 6548 7 is_stmt 1 view .LVU1347 + 4445 0068 4133 adds r3, r3, #65 + 4446 006a 0122 movs r2, #1 + 4447 006c E254 strb r2, [r4, r3] + 4448 006e D5E7 b .L229 + 4449 .cfi_endproc + 4450 .LFE136: + 4452 .section .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback,"ax",%progbits + 4453 .align 1 + 4454 .weak HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 4455 .syntax unified + 4456 .code 16 + 4457 .thumb_func + 4459 HAL_TIM_PWM_PulseFinishedHalfCpltCallback: + 4460 .LVL346: + 4461 .LFB122: +5757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4462 .loc 1 5757 1 view -0 + 4463 .cfi_startproc + 4464 @ args = 0, pretend = 0, frame = 0 + 4465 @ frame_needed = 0, uses_anonymous_args = 0 + 4466 @ link register save eliminated. +5759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4467 .loc 1 5759 3 view .LVU1349 +5764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4468 .loc 1 5764 1 is_stmt 0 view .LVU1350 + 4469 @ sp needed + 4470 0000 7047 bx lr + 4471 .cfi_endproc + 4472 .LFE122: + 4474 .section .text.TIM_DMADelayPulseHalfCplt,"ax",%progbits + 4475 .align 1 + 4476 .global TIM_DMADelayPulseHalfCplt + 4477 .syntax unified + 4478 .code 16 + 4479 .thumb_func + 4481 TIM_DMADelayPulseHalfCplt: + 4482 .LVL347: + 4483 .LFB137: +6571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4484 .loc 1 6571 1 is_stmt 1 view -0 + 4485 .cfi_startproc + 4486 @ args = 0, pretend = 0, frame = 0 + 4487 @ frame_needed = 0, uses_anonymous_args = 0 +6571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4488 .loc 1 6571 1 is_stmt 0 view .LVU1352 + 4489 0000 10B5 push {r4, lr} + ARM GAS /tmp/cchCqftX.s page 228 + + + 4490 .cfi_def_cfa_offset 8 + 4491 .cfi_offset 4, -8 + 4492 .cfi_offset 14, -4 +6572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4493 .loc 1 6572 3 is_stmt 1 view .LVU1353 +6572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4494 .loc 1 6572 22 is_stmt 0 view .LVU1354 + 4495 0002 446A ldr r4, [r0, #36] + 4496 .LVL348: +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4497 .loc 1 6574 3 is_stmt 1 view .LVU1355 +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4498 .loc 1 6574 25 is_stmt 0 view .LVU1356 + 4499 0004 636A ldr r3, [r4, #36] +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4500 .loc 1 6574 6 view .LVU1357 + 4501 0006 8342 cmp r3, r0 + 4502 0008 0BD0 beq .L242 +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4503 .loc 1 6578 8 is_stmt 1 view .LVU1358 +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4504 .loc 1 6578 30 is_stmt 0 view .LVU1359 + 4505 000a A36A ldr r3, [r4, #40] +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4506 .loc 1 6578 11 view .LVU1360 + 4507 000c 8342 cmp r3, r0 + 4508 000e 10D0 beq .L243 +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4509 .loc 1 6582 8 is_stmt 1 view .LVU1361 +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4510 .loc 1 6582 30 is_stmt 0 view .LVU1362 + 4511 0010 E36A ldr r3, [r4, #44] +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4512 .loc 1 6582 11 view .LVU1363 + 4513 0012 8342 cmp r3, r0 + 4514 0014 10D0 beq .L244 +6586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4515 .loc 1 6586 8 is_stmt 1 view .LVU1364 +6586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4516 .loc 1 6586 30 is_stmt 0 view .LVU1365 + 4517 0016 236B ldr r3, [r4, #48] +6586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4518 .loc 1 6586 11 view .LVU1366 + 4519 0018 8342 cmp r3, r0 + 4520 001a 04D1 bne .L239 +6588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4521 .loc 1 6588 5 is_stmt 1 view .LVU1367 +6588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4522 .loc 1 6588 19 is_stmt 0 view .LVU1368 + 4523 001c 0823 movs r3, #8 + 4524 001e 2377 strb r3, [r4, #28] + 4525 0020 01E0 b .L239 + 4526 .L242: +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4527 .loc 1 6576 5 is_stmt 1 view .LVU1369 +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4528 .loc 1 6576 19 is_stmt 0 view .LVU1370 + ARM GAS /tmp/cchCqftX.s page 229 + + + 4529 0022 0123 movs r3, #1 + 4530 0024 2377 strb r3, [r4, #28] + 4531 .L239: +6593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4532 .loc 1 6593 3 is_stmt 1 view .LVU1371 +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4533 .loc 1 6598 3 view .LVU1372 + 4534 0026 2000 movs r0, r4 + 4535 .LVL349: +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4536 .loc 1 6598 3 is_stmt 0 view .LVU1373 + 4537 0028 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 4538 .LVL350: +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4539 .loc 1 6601 3 is_stmt 1 view .LVU1374 +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4540 .loc 1 6601 17 is_stmt 0 view .LVU1375 + 4541 002c 0023 movs r3, #0 + 4542 002e 2377 strb r3, [r4, #28] +6602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4543 .loc 1 6602 1 view .LVU1376 + 4544 @ sp needed + 4545 .LVL351: +6602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4546 .loc 1 6602 1 view .LVU1377 + 4547 0030 10BD pop {r4, pc} + 4548 .LVL352: + 4549 .L243: +6580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4550 .loc 1 6580 5 is_stmt 1 view .LVU1378 +6580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4551 .loc 1 6580 19 is_stmt 0 view .LVU1379 + 4552 0032 0223 movs r3, #2 + 4553 0034 2377 strb r3, [r4, #28] + 4554 0036 F6E7 b .L239 + 4555 .L244: +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4556 .loc 1 6584 5 is_stmt 1 view .LVU1380 +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4557 .loc 1 6584 19 is_stmt 0 view .LVU1381 + 4558 0038 0423 movs r3, #4 + 4559 003a 2377 strb r3, [r4, #28] + 4560 003c F3E7 b .L239 + 4561 .cfi_endproc + 4562 .LFE137: + 4564 .section .text.HAL_TIM_TriggerCallback,"ax",%progbits + 4565 .align 1 + 4566 .weak HAL_TIM_TriggerCallback + 4567 .syntax unified + 4568 .code 16 + 4569 .thumb_func + 4571 HAL_TIM_TriggerCallback: + 4572 .LVL353: + 4573 .LFB123: +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4574 .loc 1 5772 1 is_stmt 1 view -0 + 4575 .cfi_startproc + ARM GAS /tmp/cchCqftX.s page 230 + + + 4576 @ args = 0, pretend = 0, frame = 0 + 4577 @ frame_needed = 0, uses_anonymous_args = 0 + 4578 @ link register save eliminated. +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4579 .loc 1 5774 3 view .LVU1383 +5779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4580 .loc 1 5779 1 is_stmt 0 view .LVU1384 + 4581 @ sp needed + 4582 0000 7047 bx lr + 4583 .cfi_endproc + 4584 .LFE123: + 4586 .section .text.HAL_TIM_IRQHandler,"ax",%progbits + 4587 .align 1 + 4588 .global HAL_TIM_IRQHandler + 4589 .syntax unified + 4590 .code 16 + 4591 .thumb_func + 4593 HAL_TIM_IRQHandler: + 4594 .LVL354: + 4595 .LFB98: +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t itsource = htim->Instance->DIER; + 4596 .loc 1 3824 1 is_stmt 1 view -0 + 4597 .cfi_startproc + 4598 @ args = 0, pretend = 0, frame = 0 + 4599 @ frame_needed = 0, uses_anonymous_args = 0 +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t itsource = htim->Instance->DIER; + 4600 .loc 1 3824 1 is_stmt 0 view .LVU1386 + 4601 0000 70B5 push {r4, r5, r6, lr} + 4602 .cfi_def_cfa_offset 16 + 4603 .cfi_offset 4, -16 + 4604 .cfi_offset 5, -12 + 4605 .cfi_offset 6, -8 + 4606 .cfi_offset 14, -4 + 4607 0002 0400 movs r4, r0 +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t itflag = htim->Instance->SR; + 4608 .loc 1 3825 3 is_stmt 1 view .LVU1387 +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t itflag = htim->Instance->SR; + 4609 .loc 1 3825 27 is_stmt 0 view .LVU1388 + 4610 0004 0368 ldr r3, [r0] +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t itflag = htim->Instance->SR; + 4611 .loc 1 3825 12 view .LVU1389 + 4612 0006 DE68 ldr r6, [r3, #12] + 4613 .LVL355: +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4614 .loc 1 3826 3 is_stmt 1 view .LVU1390 +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4615 .loc 1 3826 12 is_stmt 0 view .LVU1391 + 4616 0008 1D69 ldr r5, [r3, #16] + 4617 .LVL356: +3829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4618 .loc 1 3829 3 is_stmt 1 view .LVU1392 +3829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4619 .loc 1 3829 6 is_stmt 0 view .LVU1393 + 4620 000a AA07 lsls r2, r5, #30 + 4621 000c 0ED5 bpl .L247 +3831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4622 .loc 1 3831 5 is_stmt 1 view .LVU1394 + ARM GAS /tmp/cchCqftX.s page 231 + + +3831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4623 .loc 1 3831 8 is_stmt 0 view .LVU1395 + 4624 000e B207 lsls r2, r6, #30 + 4625 0010 0CD5 bpl .L247 +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; + 4626 .loc 1 3834 9 is_stmt 1 view .LVU1396 + 4627 0012 0322 movs r2, #3 + 4628 0014 5242 rsbs r2, r2, #0 + 4629 0016 1A61 str r2, [r3, #16] +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4630 .loc 1 3835 9 view .LVU1397 +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4631 .loc 1 3835 23 is_stmt 0 view .LVU1398 + 4632 0018 0123 movs r3, #1 + 4633 001a 0377 strb r3, [r0, #28] +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4634 .loc 1 3838 9 is_stmt 1 view .LVU1399 +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4635 .loc 1 3838 18 is_stmt 0 view .LVU1400 + 4636 001c 0368 ldr r3, [r0] +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4637 .loc 1 3838 28 view .LVU1401 + 4638 001e 9B69 ldr r3, [r3, #24] +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4639 .loc 1 3838 12 view .LVU1402 + 4640 0020 9B07 lsls r3, r3, #30 + 4641 0022 51D0 beq .L248 +3843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4642 .loc 1 3843 11 is_stmt 1 view .LVU1403 + 4643 0024 FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4644 .LVL357: + 4645 .L249: +3857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4646 .loc 1 3857 9 view .LVU1404 +3857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4647 .loc 1 3857 23 is_stmt 0 view .LVU1405 + 4648 0028 0023 movs r3, #0 + 4649 002a 2377 strb r3, [r4, #28] + 4650 .L247: +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4651 .loc 1 3862 3 is_stmt 1 view .LVU1406 +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4652 .loc 1 3862 6 is_stmt 0 view .LVU1407 + 4653 002c 6B07 lsls r3, r5, #29 + 4654 002e 12D5 bpl .L250 +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4655 .loc 1 3864 5 is_stmt 1 view .LVU1408 +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4656 .loc 1 3864 8 is_stmt 0 view .LVU1409 + 4657 0030 7307 lsls r3, r6, #29 + 4658 0032 10D5 bpl .L250 +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; + 4659 .loc 1 3866 7 is_stmt 1 view .LVU1410 + 4660 0034 2368 ldr r3, [r4] + 4661 0036 0522 movs r2, #5 + 4662 0038 5242 rsbs r2, r2, #0 + 4663 003a 1A61 str r2, [r3, #16] + ARM GAS /tmp/cchCqftX.s page 232 + + +3867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4664 .loc 1 3867 7 view .LVU1411 +3867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4665 .loc 1 3867 21 is_stmt 0 view .LVU1412 + 4666 003c 0223 movs r3, #2 + 4667 003e 2377 strb r3, [r4, #28] +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4668 .loc 1 3869 7 is_stmt 1 view .LVU1413 +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4669 .loc 1 3869 16 is_stmt 0 view .LVU1414 + 4670 0040 2368 ldr r3, [r4] +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4671 .loc 1 3869 26 view .LVU1415 + 4672 0042 9A69 ldr r2, [r3, #24] +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4673 .loc 1 3869 34 view .LVU1416 + 4674 0044 C023 movs r3, #192 + 4675 0046 9B00 lsls r3, r3, #2 +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4676 .loc 1 3869 10 view .LVU1417 + 4677 0048 1A42 tst r2, r3 + 4678 004a 43D0 beq .L251 +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4679 .loc 1 3874 9 is_stmt 1 view .LVU1418 + 4680 004c 2000 movs r0, r4 + 4681 004e FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4682 .LVL358: + 4683 .L252: +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4684 .loc 1 3888 7 view .LVU1419 +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4685 .loc 1 3888 21 is_stmt 0 view .LVU1420 + 4686 0052 0023 movs r3, #0 + 4687 0054 2377 strb r3, [r4, #28] + 4688 .L250: +3892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4689 .loc 1 3892 3 is_stmt 1 view .LVU1421 +3892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4690 .loc 1 3892 6 is_stmt 0 view .LVU1422 + 4691 0056 2B07 lsls r3, r5, #28 + 4692 0058 10D5 bpl .L253 +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4693 .loc 1 3894 5 is_stmt 1 view .LVU1423 +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4694 .loc 1 3894 8 is_stmt 0 view .LVU1424 + 4695 005a 3307 lsls r3, r6, #28 + 4696 005c 0ED5 bpl .L253 +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; + 4697 .loc 1 3896 7 is_stmt 1 view .LVU1425 + 4698 005e 2368 ldr r3, [r4] + 4699 0060 0922 movs r2, #9 + 4700 0062 5242 rsbs r2, r2, #0 + 4701 0064 1A61 str r2, [r3, #16] +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4702 .loc 1 3897 7 view .LVU1426 +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4703 .loc 1 3897 21 is_stmt 0 view .LVU1427 + ARM GAS /tmp/cchCqftX.s page 233 + + + 4704 0066 0423 movs r3, #4 + 4705 0068 2377 strb r3, [r4, #28] +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4706 .loc 1 3899 7 is_stmt 1 view .LVU1428 +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4707 .loc 1 3899 16 is_stmt 0 view .LVU1429 + 4708 006a 2368 ldr r3, [r4] +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4709 .loc 1 3899 26 view .LVU1430 + 4710 006c DB69 ldr r3, [r3, #28] +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4711 .loc 1 3899 10 view .LVU1431 + 4712 006e 9B07 lsls r3, r3, #30 + 4713 0070 37D0 beq .L254 +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4714 .loc 1 3904 9 is_stmt 1 view .LVU1432 + 4715 0072 2000 movs r0, r4 + 4716 0074 FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4717 .LVL359: + 4718 .L255: +3918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4719 .loc 1 3918 7 view .LVU1433 +3918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4720 .loc 1 3918 21 is_stmt 0 view .LVU1434 + 4721 0078 0023 movs r3, #0 + 4722 007a 2377 strb r3, [r4, #28] + 4723 .L253: +3922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4724 .loc 1 3922 3 is_stmt 1 view .LVU1435 +3922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4725 .loc 1 3922 6 is_stmt 0 view .LVU1436 + 4726 007c EB06 lsls r3, r5, #27 + 4727 007e 12D5 bpl .L256 +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4728 .loc 1 3924 5 is_stmt 1 view .LVU1437 +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4729 .loc 1 3924 8 is_stmt 0 view .LVU1438 + 4730 0080 F306 lsls r3, r6, #27 + 4731 0082 10D5 bpl .L256 +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; + 4732 .loc 1 3926 7 is_stmt 1 view .LVU1439 + 4733 0084 2368 ldr r3, [r4] + 4734 0086 1122 movs r2, #17 + 4735 0088 5242 rsbs r2, r2, #0 + 4736 008a 1A61 str r2, [r3, #16] +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4737 .loc 1 3927 7 view .LVU1440 +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4738 .loc 1 3927 21 is_stmt 0 view .LVU1441 + 4739 008c 0823 movs r3, #8 + 4740 008e 2377 strb r3, [r4, #28] +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4741 .loc 1 3929 7 is_stmt 1 view .LVU1442 +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4742 .loc 1 3929 16 is_stmt 0 view .LVU1443 + 4743 0090 2368 ldr r3, [r4] +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 234 + + + 4744 .loc 1 3929 26 view .LVU1444 + 4745 0092 DA69 ldr r2, [r3, #28] +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4746 .loc 1 3929 34 view .LVU1445 + 4747 0094 C023 movs r3, #192 + 4748 0096 9B00 lsls r3, r3, #2 +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4749 .loc 1 3929 10 view .LVU1446 + 4750 0098 1A42 tst r2, r3 + 4751 009a 29D0 beq .L257 +3934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4752 .loc 1 3934 9 is_stmt 1 view .LVU1447 + 4753 009c 2000 movs r0, r4 + 4754 009e FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4755 .LVL360: + 4756 .L258: +3948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4757 .loc 1 3948 7 view .LVU1448 +3948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4758 .loc 1 3948 21 is_stmt 0 view .LVU1449 + 4759 00a2 0023 movs r3, #0 + 4760 00a4 2377 strb r3, [r4, #28] + 4761 .L256: +3952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4762 .loc 1 3952 3 is_stmt 1 view .LVU1450 +3952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4763 .loc 1 3952 6 is_stmt 0 view .LVU1451 + 4764 00a6 EB07 lsls r3, r5, #31 + 4765 00a8 01D5 bpl .L259 +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4766 .loc 1 3954 5 is_stmt 1 view .LVU1452 +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4767 .loc 1 3954 8 is_stmt 0 view .LVU1453 + 4768 00aa F307 lsls r3, r6, #31 + 4769 00ac 27D4 bmi .L279 + 4770 .L259: +3965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4771 .loc 1 3965 3 is_stmt 1 view .LVU1454 +3965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4772 .loc 1 3965 6 is_stmt 0 view .LVU1455 + 4773 00ae 2B06 lsls r3, r5, #24 + 4774 00b0 01D5 bpl .L260 +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4775 .loc 1 3967 5 is_stmt 1 view .LVU1456 +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4776 .loc 1 3967 8 is_stmt 0 view .LVU1457 + 4777 00b2 3306 lsls r3, r6, #24 + 4778 00b4 2BD4 bmi .L280 + 4779 .L260: +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4780 .loc 1 3978 3 is_stmt 1 view .LVU1458 +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4781 .loc 1 3978 6 is_stmt 0 view .LVU1459 + 4782 00b6 6B06 lsls r3, r5, #25 + 4783 00b8 01D5 bpl .L261 +3980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4784 .loc 1 3980 5 is_stmt 1 view .LVU1460 + ARM GAS /tmp/cchCqftX.s page 235 + + +3980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4785 .loc 1 3980 8 is_stmt 0 view .LVU1461 + 4786 00ba 7306 lsls r3, r6, #25 + 4787 00bc 2FD4 bmi .L281 + 4788 .L261: +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4789 .loc 1 3991 3 is_stmt 1 view .LVU1462 +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4790 .loc 1 3991 6 is_stmt 0 view .LVU1463 + 4791 00be AD06 lsls r5, r5, #26 + 4792 00c0 01D5 bpl .L246 + 4793 .LVL361: +3993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4794 .loc 1 3993 5 is_stmt 1 view .LVU1464 +3993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4795 .loc 1 3993 8 is_stmt 0 view .LVU1465 + 4796 00c2 B606 lsls r6, r6, #26 + 4797 00c4 33D4 bmi .L282 + 4798 .LVL362: + 4799 .L246: +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4800 .loc 1 4003 1 view .LVU1466 + 4801 @ sp needed + 4802 .LVL363: +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4803 .loc 1 4003 1 view .LVU1467 + 4804 00c6 70BD pop {r4, r5, r6, pc} + 4805 .LVL364: + 4806 .L248: +3853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4807 .loc 1 3853 11 is_stmt 1 view .LVU1468 + 4808 00c8 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4809 .LVL365: +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4810 .loc 1 3854 11 view .LVU1469 + 4811 00cc 2000 movs r0, r4 + 4812 00ce FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4813 .LVL366: + 4814 00d2 A9E7 b .L249 + 4815 .L251: +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4816 .loc 1 3884 9 view .LVU1470 + 4817 00d4 2000 movs r0, r4 + 4818 00d6 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4819 .LVL367: +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4820 .loc 1 3885 9 view .LVU1471 + 4821 00da 2000 movs r0, r4 + 4822 00dc FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4823 .LVL368: + 4824 00e0 B7E7 b .L252 + 4825 .L254: +3914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4826 .loc 1 3914 9 view .LVU1472 + 4827 00e2 2000 movs r0, r4 + 4828 00e4 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4829 .LVL369: + ARM GAS /tmp/cchCqftX.s page 236 + + +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4830 .loc 1 3915 9 view .LVU1473 + 4831 00e8 2000 movs r0, r4 + 4832 00ea FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4833 .LVL370: + 4834 00ee C3E7 b .L255 + 4835 .L257: +3944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4836 .loc 1 3944 9 view .LVU1474 + 4837 00f0 2000 movs r0, r4 + 4838 00f2 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4839 .LVL371: +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4840 .loc 1 3945 9 view .LVU1475 + 4841 00f6 2000 movs r0, r4 + 4842 00f8 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4843 .LVL372: + 4844 00fc D1E7 b .L258 + 4845 .L279: +3956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4846 .loc 1 3956 7 view .LVU1476 + 4847 00fe 2368 ldr r3, [r4] + 4848 0100 0222 movs r2, #2 + 4849 0102 5242 rsbs r2, r2, #0 + 4850 0104 1A61 str r2, [r3, #16] +3960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4851 .loc 1 3960 7 view .LVU1477 + 4852 0106 2000 movs r0, r4 + 4853 0108 FFF7FEFF bl HAL_TIM_PeriodElapsedCallback + 4854 .LVL373: + 4855 010c CFE7 b .L259 + 4856 .L280: +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4857 .loc 1 3969 7 view .LVU1478 + 4858 010e 2368 ldr r3, [r4] + 4859 0110 8122 movs r2, #129 + 4860 0112 5242 rsbs r2, r2, #0 + 4861 0114 1A61 str r2, [r3, #16] +3973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4862 .loc 1 3973 7 view .LVU1479 + 4863 0116 2000 movs r0, r4 + 4864 0118 FFF7FEFF bl HAL_TIMEx_BreakCallback + 4865 .LVL374: + 4866 011c CBE7 b .L260 + 4867 .L281: +3982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4868 .loc 1 3982 7 view .LVU1480 + 4869 011e 2368 ldr r3, [r4] + 4870 0120 4122 movs r2, #65 + 4871 0122 5242 rsbs r2, r2, #0 + 4872 0124 1A61 str r2, [r3, #16] +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4873 .loc 1 3986 7 view .LVU1481 + 4874 0126 2000 movs r0, r4 + 4875 0128 FFF7FEFF bl HAL_TIM_TriggerCallback + 4876 .LVL375: + 4877 012c C7E7 b .L261 + ARM GAS /tmp/cchCqftX.s page 237 + + + 4878 .LVL376: + 4879 .L282: +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4880 .loc 1 3995 7 view .LVU1482 + 4881 012e 2368 ldr r3, [r4] + 4882 0130 2122 movs r2, #33 + 4883 0132 5242 rsbs r2, r2, #0 + 4884 0134 1A61 str r2, [r3, #16] +3999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4885 .loc 1 3999 7 view .LVU1483 + 4886 0136 2000 movs r0, r4 + 4887 0138 FFF7FEFF bl HAL_TIMEx_CommutCallback + 4888 .LVL377: +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4889 .loc 1 4003 1 is_stmt 0 view .LVU1484 + 4890 013c C3E7 b .L246 + 4891 .cfi_endproc + 4892 .LFE98: + 4894 .section .text.TIM_DMATriggerCplt,"ax",%progbits + 4895 .align 1 + 4896 .syntax unified + 4897 .code 16 + 4898 .thumb_func + 4900 TIM_DMATriggerCplt: + 4901 .LVL378: + 4902 .LFB142: +6749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4903 .loc 1 6749 1 is_stmt 1 view -0 + 4904 .cfi_startproc + 4905 @ args = 0, pretend = 0, frame = 0 + 4906 @ frame_needed = 0, uses_anonymous_args = 0 +6749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4907 .loc 1 6749 1 is_stmt 0 view .LVU1486 + 4908 0000 10B5 push {r4, lr} + 4909 .cfi_def_cfa_offset 8 + 4910 .cfi_offset 4, -8 + 4911 .cfi_offset 14, -4 +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4912 .loc 1 6750 3 is_stmt 1 view .LVU1487 +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4913 .loc 1 6750 22 is_stmt 0 view .LVU1488 + 4914 0002 406A ldr r0, [r0, #36] + 4915 .LVL379: +6752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4916 .loc 1 6752 3 is_stmt 1 view .LVU1489 +6752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4917 .loc 1 6752 17 is_stmt 0 view .LVU1490 + 4918 0004 836B ldr r3, [r0, #56] +6752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4919 .loc 1 6752 43 view .LVU1491 + 4920 0006 9B69 ldr r3, [r3, #24] +6752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4921 .loc 1 6752 6 view .LVU1492 + 4922 0008 002B cmp r3, #0 + 4923 000a 02D1 bne .L284 +6754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4924 .loc 1 6754 5 is_stmt 1 view .LVU1493 + ARM GAS /tmp/cchCqftX.s page 238 + + +6754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4925 .loc 1 6754 17 is_stmt 0 view .LVU1494 + 4926 000c 3D33 adds r3, r3, #61 + 4927 000e 0122 movs r2, #1 + 4928 0010 C254 strb r2, [r0, r3] + 4929 .L284: +6760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4930 .loc 1 6760 3 is_stmt 1 view .LVU1495 + 4931 0012 FFF7FEFF bl HAL_TIM_TriggerCallback + 4932 .LVL380: +6762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4933 .loc 1 6762 1 is_stmt 0 view .LVU1496 + 4934 @ sp needed + 4935 0016 10BD pop {r4, pc} + 4936 .cfi_endproc + 4937 .LFE142: + 4939 .section .text.HAL_TIM_TriggerHalfCpltCallback,"ax",%progbits + 4940 .align 1 + 4941 .weak HAL_TIM_TriggerHalfCpltCallback + 4942 .syntax unified + 4943 .code 16 + 4944 .thumb_func + 4946 HAL_TIM_TriggerHalfCpltCallback: + 4947 .LVL381: + 4948 .LFB124: +5787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4949 .loc 1 5787 1 is_stmt 1 view -0 + 4950 .cfi_startproc + 4951 @ args = 0, pretend = 0, frame = 0 + 4952 @ frame_needed = 0, uses_anonymous_args = 0 + 4953 @ link register save eliminated. +5789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4954 .loc 1 5789 3 view .LVU1498 +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4955 .loc 1 5794 1 is_stmt 0 view .LVU1499 + 4956 @ sp needed + 4957 0000 7047 bx lr + 4958 .cfi_endproc + 4959 .LFE124: + 4961 .section .text.TIM_DMATriggerHalfCplt,"ax",%progbits + 4962 .align 1 + 4963 .syntax unified + 4964 .code 16 + 4965 .thumb_func + 4967 TIM_DMATriggerHalfCplt: + 4968 .LVL382: + 4969 .LFB143: +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4970 .loc 1 6770 1 is_stmt 1 view -0 + 4971 .cfi_startproc + 4972 @ args = 0, pretend = 0, frame = 0 + 4973 @ frame_needed = 0, uses_anonymous_args = 0 +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4974 .loc 1 6770 1 is_stmt 0 view .LVU1501 + 4975 0000 10B5 push {r4, lr} + 4976 .cfi_def_cfa_offset 8 + 4977 .cfi_offset 4, -8 + ARM GAS /tmp/cchCqftX.s page 239 + + + 4978 .cfi_offset 14, -4 +6771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4979 .loc 1 6771 3 is_stmt 1 view .LVU1502 +6771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4980 .loc 1 6771 22 is_stmt 0 view .LVU1503 + 4981 0002 406A ldr r0, [r0, #36] + 4982 .LVL383: +6776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4983 .loc 1 6776 3 is_stmt 1 view .LVU1504 + 4984 0004 FFF7FEFF bl HAL_TIM_TriggerHalfCpltCallback + 4985 .LVL384: +6778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4986 .loc 1 6778 1 is_stmt 0 view .LVU1505 + 4987 @ sp needed + 4988 0008 10BD pop {r4, pc} + 4989 .cfi_endproc + 4990 .LFE143: + 4992 .section .text.HAL_TIM_ErrorCallback,"ax",%progbits + 4993 .align 1 + 4994 .weak HAL_TIM_ErrorCallback + 4995 .syntax unified + 4996 .code 16 + 4997 .thumb_func + 4999 HAL_TIM_ErrorCallback: + 5000 .LVL385: + 5001 .LFB125: +5802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 5002 .loc 1 5802 1 is_stmt 1 view -0 + 5003 .cfi_startproc + 5004 @ args = 0, pretend = 0, frame = 0 + 5005 @ frame_needed = 0, uses_anonymous_args = 0 + 5006 @ link register save eliminated. +5804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5007 .loc 1 5804 3 view .LVU1507 +5809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5008 .loc 1 5809 1 is_stmt 0 view .LVU1508 + 5009 @ sp needed + 5010 0000 7047 bx lr + 5011 .cfi_endproc + 5012 .LFE125: + 5014 .section .text.TIM_DMAError,"ax",%progbits + 5015 .align 1 + 5016 .global TIM_DMAError + 5017 .syntax unified + 5018 .code 16 + 5019 .thumb_func + 5021 TIM_DMAError: + 5022 .LVL386: + 5023 .LFB135: +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5024 .loc 1 6469 1 is_stmt 1 view -0 + 5025 .cfi_startproc + 5026 @ args = 0, pretend = 0, frame = 0 + 5027 @ frame_needed = 0, uses_anonymous_args = 0 +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5028 .loc 1 6469 1 is_stmt 0 view .LVU1510 + 5029 0000 10B5 push {r4, lr} + ARM GAS /tmp/cchCqftX.s page 240 + + + 5030 .cfi_def_cfa_offset 8 + 5031 .cfi_offset 4, -8 + 5032 .cfi_offset 14, -4 +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5033 .loc 1 6470 3 is_stmt 1 view .LVU1511 +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5034 .loc 1 6470 22 is_stmt 0 view .LVU1512 + 5035 0002 446A ldr r4, [r0, #36] + 5036 .LVL387: +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5037 .loc 1 6472 3 is_stmt 1 view .LVU1513 +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5038 .loc 1 6472 25 is_stmt 0 view .LVU1514 + 5039 0004 636A ldr r3, [r4, #36] +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5040 .loc 1 6472 6 view .LVU1515 + 5041 0006 8342 cmp r3, r0 + 5042 0008 0CD0 beq .L294 +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5043 .loc 1 6477 8 is_stmt 1 view .LVU1516 +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5044 .loc 1 6477 30 is_stmt 0 view .LVU1517 + 5045 000a A36A ldr r3, [r4, #40] +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5046 .loc 1 6477 11 view .LVU1518 + 5047 000c 8342 cmp r3, r0 + 5048 000e 13D0 beq .L295 +6482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5049 .loc 1 6482 8 is_stmt 1 view .LVU1519 +6482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5050 .loc 1 6482 30 is_stmt 0 view .LVU1520 + 5051 0010 E36A ldr r3, [r4, #44] +6482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5052 .loc 1 6482 11 view .LVU1521 + 5053 0012 8342 cmp r3, r0 + 5054 0014 16D0 beq .L296 +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5055 .loc 1 6487 8 is_stmt 1 view .LVU1522 +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5056 .loc 1 6487 30 is_stmt 0 view .LVU1523 + 5057 0016 236B ldr r3, [r4, #48] +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5058 .loc 1 6487 11 view .LVU1524 + 5059 0018 8342 cmp r3, r0 + 5060 001a 19D0 beq .L297 +6494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5061 .loc 1 6494 5 is_stmt 1 view .LVU1525 +6494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5062 .loc 1 6494 17 is_stmt 0 view .LVU1526 + 5063 001c 3D23 movs r3, #61 + 5064 001e 0122 movs r2, #1 + 5065 0020 E254 strb r2, [r4, r3] + 5066 0022 03E0 b .L290 + 5067 .L294: +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 5068 .loc 1 6474 5 is_stmt 1 view .LVU1527 +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/cchCqftX.s page 241 + + + 5069 .loc 1 6474 19 is_stmt 0 view .LVU1528 + 5070 0024 0123 movs r3, #1 + 5071 0026 2377 strb r3, [r4, #28] +6475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5072 .loc 1 6475 5 is_stmt 1 view .LVU1529 + 5073 0028 3E22 movs r2, #62 + 5074 002a A354 strb r3, [r4, r2] + 5075 .L290: +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5076 .loc 1 6500 3 view .LVU1530 + 5077 002c 2000 movs r0, r4 + 5078 .LVL388: +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5079 .loc 1 6500 3 is_stmt 0 view .LVU1531 + 5080 002e FFF7FEFF bl HAL_TIM_ErrorCallback + 5081 .LVL389: +6503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5082 .loc 1 6503 3 is_stmt 1 view .LVU1532 +6503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5083 .loc 1 6503 17 is_stmt 0 view .LVU1533 + 5084 0032 0023 movs r3, #0 + 5085 0034 2377 strb r3, [r4, #28] +6504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5086 .loc 1 6504 1 view .LVU1534 + 5087 @ sp needed + 5088 .LVL390: +6504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5089 .loc 1 6504 1 view .LVU1535 + 5090 0036 10BD pop {r4, pc} + 5091 .LVL391: + 5092 .L295: +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 5093 .loc 1 6479 5 is_stmt 1 view .LVU1536 +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 5094 .loc 1 6479 19 is_stmt 0 view .LVU1537 + 5095 0038 0223 movs r3, #2 + 5096 003a 2377 strb r3, [r4, #28] +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5097 .loc 1 6480 5 is_stmt 1 view .LVU1538 + 5098 003c 3D33 adds r3, r3, #61 + 5099 003e 0122 movs r2, #1 + 5100 0040 E254 strb r2, [r4, r3] + 5101 0042 F3E7 b .L290 + 5102 .L296: +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 5103 .loc 1 6484 5 view .LVU1539 +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 5104 .loc 1 6484 19 is_stmt 0 view .LVU1540 + 5105 0044 0423 movs r3, #4 + 5106 0046 2377 strb r3, [r4, #28] +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5107 .loc 1 6485 5 is_stmt 1 view .LVU1541 + 5108 0048 3C33 adds r3, r3, #60 + 5109 004a 0122 movs r2, #1 + 5110 004c E254 strb r2, [r4, r3] + 5111 004e EDE7 b .L290 + 5112 .L297: + ARM GAS /tmp/cchCqftX.s page 242 + + +6489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 5113 .loc 1 6489 5 view .LVU1542 +6489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 5114 .loc 1 6489 19 is_stmt 0 view .LVU1543 + 5115 0050 0823 movs r3, #8 + 5116 0052 2377 strb r3, [r4, #28] +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5117 .loc 1 6490 5 is_stmt 1 view .LVU1544 + 5118 0054 3933 adds r3, r3, #57 + 5119 0056 0122 movs r2, #1 + 5120 0058 E254 strb r2, [r4, r3] + 5121 005a E7E7 b .L290 + 5122 .cfi_endproc + 5123 .LFE135: + 5125 .section .text.HAL_TIM_Base_GetState,"ax",%progbits + 5126 .align 1 + 5127 .global HAL_TIM_Base_GetState + 5128 .syntax unified + 5129 .code 16 + 5130 .thumb_func + 5132 HAL_TIM_Base_GetState: + 5133 .LVL392: + 5134 .LFB126: +6349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5135 .loc 1 6349 1 view -0 + 5136 .cfi_startproc + 5137 @ args = 0, pretend = 0, frame = 0 + 5138 @ frame_needed = 0, uses_anonymous_args = 0 + 5139 @ link register save eliminated. +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5140 .loc 1 6350 3 view .LVU1546 +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5141 .loc 1 6350 14 is_stmt 0 view .LVU1547 + 5142 0000 3D23 movs r3, #61 + 5143 0002 C05C ldrb r0, [r0, r3] + 5144 .LVL393: +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5145 .loc 1 6350 14 view .LVU1548 + 5146 0004 C0B2 uxtb r0, r0 +6351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5147 .loc 1 6351 1 view .LVU1549 + 5148 @ sp needed + 5149 0006 7047 bx lr + 5150 .cfi_endproc + 5151 .LFE126: + 5153 .section .text.HAL_TIM_OC_GetState,"ax",%progbits + 5154 .align 1 + 5155 .global HAL_TIM_OC_GetState + 5156 .syntax unified + 5157 .code 16 + 5158 .thumb_func + 5160 HAL_TIM_OC_GetState: + 5161 .LVL394: + 5162 .LFB127: +6359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5163 .loc 1 6359 1 is_stmt 1 view -0 + 5164 .cfi_startproc + ARM GAS /tmp/cchCqftX.s page 243 + + + 5165 @ args = 0, pretend = 0, frame = 0 + 5166 @ frame_needed = 0, uses_anonymous_args = 0 + 5167 @ link register save eliminated. +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5168 .loc 1 6360 3 view .LVU1551 +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5169 .loc 1 6360 14 is_stmt 0 view .LVU1552 + 5170 0000 3D23 movs r3, #61 + 5171 0002 C05C ldrb r0, [r0, r3] + 5172 .LVL395: +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5173 .loc 1 6360 14 view .LVU1553 + 5174 0004 C0B2 uxtb r0, r0 +6361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5175 .loc 1 6361 1 view .LVU1554 + 5176 @ sp needed + 5177 0006 7047 bx lr + 5178 .cfi_endproc + 5179 .LFE127: + 5181 .section .text.HAL_TIM_PWM_GetState,"ax",%progbits + 5182 .align 1 + 5183 .global HAL_TIM_PWM_GetState + 5184 .syntax unified + 5185 .code 16 + 5186 .thumb_func + 5188 HAL_TIM_PWM_GetState: + 5189 .LVL396: + 5190 .LFB128: +6369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5191 .loc 1 6369 1 is_stmt 1 view -0 + 5192 .cfi_startproc + 5193 @ args = 0, pretend = 0, frame = 0 + 5194 @ frame_needed = 0, uses_anonymous_args = 0 + 5195 @ link register save eliminated. +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5196 .loc 1 6370 3 view .LVU1556 +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5197 .loc 1 6370 14 is_stmt 0 view .LVU1557 + 5198 0000 3D23 movs r3, #61 + 5199 0002 C05C ldrb r0, [r0, r3] + 5200 .LVL397: +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5201 .loc 1 6370 14 view .LVU1558 + 5202 0004 C0B2 uxtb r0, r0 +6371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5203 .loc 1 6371 1 view .LVU1559 + 5204 @ sp needed + 5205 0006 7047 bx lr + 5206 .cfi_endproc + 5207 .LFE128: + 5209 .section .text.HAL_TIM_IC_GetState,"ax",%progbits + 5210 .align 1 + 5211 .global HAL_TIM_IC_GetState + 5212 .syntax unified + 5213 .code 16 + 5214 .thumb_func + 5216 HAL_TIM_IC_GetState: + ARM GAS /tmp/cchCqftX.s page 244 + + + 5217 .LVL398: + 5218 .LFB129: +6379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5219 .loc 1 6379 1 is_stmt 1 view -0 + 5220 .cfi_startproc + 5221 @ args = 0, pretend = 0, frame = 0 + 5222 @ frame_needed = 0, uses_anonymous_args = 0 + 5223 @ link register save eliminated. +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5224 .loc 1 6380 3 view .LVU1561 +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5225 .loc 1 6380 14 is_stmt 0 view .LVU1562 + 5226 0000 3D23 movs r3, #61 + 5227 0002 C05C ldrb r0, [r0, r3] + 5228 .LVL399: +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5229 .loc 1 6380 14 view .LVU1563 + 5230 0004 C0B2 uxtb r0, r0 +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5231 .loc 1 6381 1 view .LVU1564 + 5232 @ sp needed + 5233 0006 7047 bx lr + 5234 .cfi_endproc + 5235 .LFE129: + 5237 .section .text.HAL_TIM_OnePulse_GetState,"ax",%progbits + 5238 .align 1 + 5239 .global HAL_TIM_OnePulse_GetState + 5240 .syntax unified + 5241 .code 16 + 5242 .thumb_func + 5244 HAL_TIM_OnePulse_GetState: + 5245 .LVL400: + 5246 .LFB130: +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5247 .loc 1 6389 1 is_stmt 1 view -0 + 5248 .cfi_startproc + 5249 @ args = 0, pretend = 0, frame = 0 + 5250 @ frame_needed = 0, uses_anonymous_args = 0 + 5251 @ link register save eliminated. +6390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5252 .loc 1 6390 3 view .LVU1566 +6390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5253 .loc 1 6390 14 is_stmt 0 view .LVU1567 + 5254 0000 3D23 movs r3, #61 + 5255 0002 C05C ldrb r0, [r0, r3] + 5256 .LVL401: +6390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5257 .loc 1 6390 14 view .LVU1568 + 5258 0004 C0B2 uxtb r0, r0 +6391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5259 .loc 1 6391 1 view .LVU1569 + 5260 @ sp needed + 5261 0006 7047 bx lr + 5262 .cfi_endproc + 5263 .LFE130: + 5265 .section .text.HAL_TIM_Encoder_GetState,"ax",%progbits + 5266 .align 1 + ARM GAS /tmp/cchCqftX.s page 245 + + + 5267 .global HAL_TIM_Encoder_GetState + 5268 .syntax unified + 5269 .code 16 + 5270 .thumb_func + 5272 HAL_TIM_Encoder_GetState: + 5273 .LVL402: + 5274 .LFB131: +6399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5275 .loc 1 6399 1 is_stmt 1 view -0 + 5276 .cfi_startproc + 5277 @ args = 0, pretend = 0, frame = 0 + 5278 @ frame_needed = 0, uses_anonymous_args = 0 + 5279 @ link register save eliminated. +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5280 .loc 1 6400 3 view .LVU1571 +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5281 .loc 1 6400 14 is_stmt 0 view .LVU1572 + 5282 0000 3D23 movs r3, #61 + 5283 0002 C05C ldrb r0, [r0, r3] + 5284 .LVL403: +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5285 .loc 1 6400 14 view .LVU1573 + 5286 0004 C0B2 uxtb r0, r0 +6401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5287 .loc 1 6401 1 view .LVU1574 + 5288 @ sp needed + 5289 0006 7047 bx lr + 5290 .cfi_endproc + 5291 .LFE131: + 5293 .section .text.HAL_TIM_GetActiveChannel,"ax",%progbits + 5294 .align 1 + 5295 .global HAL_TIM_GetActiveChannel + 5296 .syntax unified + 5297 .code 16 + 5298 .thumb_func + 5300 HAL_TIM_GetActiveChannel: + 5301 .LVL404: + 5302 .LFB132: +6409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->Channel; + 5303 .loc 1 6409 1 is_stmt 1 view -0 + 5304 .cfi_startproc + 5305 @ args = 0, pretend = 0, frame = 0 + 5306 @ frame_needed = 0, uses_anonymous_args = 0 + 5307 @ link register save eliminated. +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5308 .loc 1 6410 3 view .LVU1576 +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5309 .loc 1 6410 14 is_stmt 0 discriminator 1 view .LVU1577 + 5310 0000 007F ldrb r0, [r0, #28] + 5311 .LVL405: +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5312 .loc 1 6411 1 view .LVU1578 + 5313 @ sp needed + 5314 0002 7047 bx lr + 5315 .cfi_endproc + 5316 .LFE132: + 5318 .section .text.HAL_TIM_GetChannelState,"ax",%progbits + ARM GAS /tmp/cchCqftX.s page 246 + + + 5319 .align 1 + 5320 .global HAL_TIM_GetChannelState + 5321 .syntax unified + 5322 .code 16 + 5323 .thumb_func + 5325 HAL_TIM_GetChannelState: + 5326 .LVL406: + 5327 .LFB133: +6427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state; + 5328 .loc 1 6427 1 is_stmt 1 view -0 + 5329 .cfi_startproc + 5330 @ args = 0, pretend = 0, frame = 0 + 5331 @ frame_needed = 0, uses_anonymous_args = 0 + 5332 @ link register save eliminated. +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5333 .loc 1 6428 3 view .LVU1580 +6431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5334 .loc 1 6431 3 view .LVU1581 +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5335 .loc 1 6433 3 view .LVU1582 +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5336 .loc 1 6433 19 is_stmt 0 view .LVU1583 + 5337 0000 0029 cmp r1, #0 + 5338 0002 03D1 bne .L306 +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5339 .loc 1 6433 19 discriminator 1 view .LVU1584 + 5340 0004 3E23 movs r3, #62 + 5341 0006 C05C ldrb r0, [r0, r3] + 5342 .LVL407: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5343 .loc 1 6433 19 discriminator 1 view .LVU1585 + 5344 0008 C0B2 uxtb r0, r0 + 5345 .L307: + 5346 .LVL408: +6435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5347 .loc 1 6435 3 is_stmt 1 view .LVU1586 +6436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5348 .loc 1 6436 1 is_stmt 0 view .LVU1587 + 5349 @ sp needed + 5350 000a 7047 bx lr + 5351 .LVL409: + 5352 .L306: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5353 .loc 1 6433 19 discriminator 2 view .LVU1588 + 5354 000c 0429 cmp r1, #4 + 5355 000e 05D0 beq .L310 +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5356 .loc 1 6433 19 discriminator 5 view .LVU1589 + 5357 0010 0829 cmp r1, #8 + 5358 0012 07D0 beq .L311 +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5359 .loc 1 6433 19 discriminator 8 view .LVU1590 + 5360 0014 4123 movs r3, #65 + 5361 0016 C05C ldrb r0, [r0, r3] + 5362 .LVL410: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5363 .loc 1 6433 19 discriminator 8 view .LVU1591 + ARM GAS /tmp/cchCqftX.s page 247 + + + 5364 0018 C0B2 uxtb r0, r0 + 5365 001a F6E7 b .L307 + 5366 .LVL411: + 5367 .L310: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5368 .loc 1 6433 19 discriminator 4 view .LVU1592 + 5369 001c 3F23 movs r3, #63 + 5370 001e C05C ldrb r0, [r0, r3] + 5371 .LVL412: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5372 .loc 1 6433 19 discriminator 4 view .LVU1593 + 5373 0020 C0B2 uxtb r0, r0 + 5374 0022 F2E7 b .L307 + 5375 .LVL413: + 5376 .L311: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5377 .loc 1 6433 19 discriminator 7 view .LVU1594 + 5378 0024 4023 movs r3, #64 + 5379 0026 C05C ldrb r0, [r0, r3] + 5380 .LVL414: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5381 .loc 1 6433 19 discriminator 7 view .LVU1595 + 5382 0028 C0B2 uxtb r0, r0 + 5383 002a EEE7 b .L307 + 5384 .cfi_endproc + 5385 .LFE133: + 5387 .section .text.HAL_TIM_DMABurstState,"ax",%progbits + 5388 .align 1 + 5389 .global HAL_TIM_DMABurstState + 5390 .syntax unified + 5391 .code 16 + 5392 .thumb_func + 5394 HAL_TIM_DMABurstState: + 5395 .LVL415: + 5396 .LFB134: +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 5397 .loc 1 6444 1 is_stmt 1 view -0 + 5398 .cfi_startproc + 5399 @ args = 0, pretend = 0, frame = 0 + 5400 @ frame_needed = 0, uses_anonymous_args = 0 + 5401 @ link register save eliminated. +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5402 .loc 1 6446 3 view .LVU1597 +6448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5403 .loc 1 6448 3 view .LVU1598 +6448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5404 .loc 1 6448 14 is_stmt 0 view .LVU1599 + 5405 0000 4623 movs r3, #70 + 5406 0002 C05C ldrb r0, [r0, r3] + 5407 .LVL416: +6448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5408 .loc 1 6448 14 view .LVU1600 + 5409 0004 C0B2 uxtb r0, r0 +6449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5410 .loc 1 6449 1 view .LVU1601 + 5411 @ sp needed + 5412 0006 7047 bx lr + ARM GAS /tmp/cchCqftX.s page 248 + + + 5413 .cfi_endproc + 5414 .LFE134: + 5416 .section .text.TIM_Base_SetConfig,"ax",%progbits + 5417 .align 1 + 5418 .global TIM_Base_SetConfig + 5419 .syntax unified + 5420 .code 16 + 5421 .thumb_func + 5423 TIM_Base_SetConfig: + 5424 .LVL417: + 5425 .LFB144: +6787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr1; + 5426 .loc 1 6787 1 is_stmt 1 view -0 + 5427 .cfi_startproc + 5428 @ args = 0, pretend = 0, frame = 0 + 5429 @ frame_needed = 0, uses_anonymous_args = 0 + 5430 @ link register save eliminated. +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 = TIMx->CR1; + 5431 .loc 1 6788 3 view .LVU1603 +6789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5432 .loc 1 6789 3 view .LVU1604 +6789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5433 .loc 1 6789 10 is_stmt 0 view .LVU1605 + 5434 0000 0368 ldr r3, [r0] + 5435 .LVL418: +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5436 .loc 1 6792 3 is_stmt 1 view .LVU1606 +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5437 .loc 1 6792 6 is_stmt 0 view .LVU1607 + 5438 0002 214A ldr r2, .L321 + 5439 0004 9042 cmp r0, r2 + 5440 0006 06D0 beq .L314 +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5441 .loc 1 6792 7 discriminator 1 view .LVU1608 + 5442 0008 8022 movs r2, #128 + 5443 000a D205 lsls r2, r2, #23 + 5444 000c 9042 cmp r0, r2 + 5445 000e 02D0 beq .L314 +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5446 .loc 1 6792 7 discriminator 2 view .LVU1609 + 5447 0010 1E4A ldr r2, .L321+4 + 5448 0012 9042 cmp r0, r2 + 5449 0014 03D1 bne .L315 + 5450 .L314: +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; + 5451 .loc 1 6795 5 is_stmt 1 view .LVU1610 +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; + 5452 .loc 1 6795 12 is_stmt 0 view .LVU1611 + 5453 0016 7022 movs r2, #112 + 5454 0018 9343 bics r3, r2 + 5455 .LVL419: +6796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5456 .loc 1 6796 5 is_stmt 1 view .LVU1612 +6796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5457 .loc 1 6796 24 is_stmt 0 view .LVU1613 + 5458 001a 4A68 ldr r2, [r1, #4] +6796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 249 + + + 5459 .loc 1 6796 12 view .LVU1614 + 5460 001c 1343 orrs r3, r2 + 5461 .LVL420: + 5462 .L315: +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5463 .loc 1 6799 3 is_stmt 1 view .LVU1615 +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5464 .loc 1 6799 6 is_stmt 0 view .LVU1616 + 5465 001e 1A4A ldr r2, .L321 + 5466 0020 9042 cmp r0, r2 + 5467 0022 0FD0 beq .L316 +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5468 .loc 1 6799 7 discriminator 1 view .LVU1617 + 5469 0024 8022 movs r2, #128 + 5470 0026 D205 lsls r2, r2, #23 + 5471 0028 9042 cmp r0, r2 + 5472 002a 0BD0 beq .L316 +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5473 .loc 1 6799 7 discriminator 2 view .LVU1618 + 5474 002c 174A ldr r2, .L321+4 + 5475 002e 9042 cmp r0, r2 + 5476 0030 08D0 beq .L316 +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5477 .loc 1 6799 7 discriminator 3 view .LVU1619 + 5478 0032 174A ldr r2, .L321+8 + 5479 0034 9042 cmp r0, r2 + 5480 0036 05D0 beq .L316 +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5481 .loc 1 6799 7 discriminator 4 view .LVU1620 + 5482 0038 164A ldr r2, .L321+12 + 5483 003a 9042 cmp r0, r2 + 5484 003c 02D0 beq .L316 +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5485 .loc 1 6799 7 discriminator 5 view .LVU1621 + 5486 003e 164A ldr r2, .L321+16 + 5487 0040 9042 cmp r0, r2 + 5488 0042 03D1 bne .L317 + 5489 .L316: +6802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; + 5490 .loc 1 6802 5 is_stmt 1 view .LVU1622 +6802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; + 5491 .loc 1 6802 12 is_stmt 0 view .LVU1623 + 5492 0044 154A ldr r2, .L321+20 + 5493 0046 1A40 ands r2, r3 + 5494 .LVL421: +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5495 .loc 1 6803 5 is_stmt 1 view .LVU1624 +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5496 .loc 1 6803 34 is_stmt 0 view .LVU1625 + 5497 0048 CB68 ldr r3, [r1, #12] +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5498 .loc 1 6803 12 view .LVU1626 + 5499 004a 1343 orrs r3, r2 + 5500 .LVL422: + 5501 .L317: +6807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5502 .loc 1 6807 3 is_stmt 1 view .LVU1627 + ARM GAS /tmp/cchCqftX.s page 250 + + + 5503 004c 8022 movs r2, #128 + 5504 004e 9343 bics r3, r2 + 5505 .LVL423: +6807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5506 .loc 1 6807 3 is_stmt 0 view .LVU1628 + 5507 0050 4A69 ldr r2, [r1, #20] + 5508 0052 1343 orrs r3, r2 + 5509 .LVL424: +6809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5510 .loc 1 6809 3 is_stmt 1 view .LVU1629 +6809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5511 .loc 1 6809 13 is_stmt 0 view .LVU1630 + 5512 0054 0360 str r3, [r0] +6812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5513 .loc 1 6812 3 is_stmt 1 view .LVU1631 +6812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5514 .loc 1 6812 34 is_stmt 0 view .LVU1632 + 5515 0056 8B68 ldr r3, [r1, #8] + 5516 .LVL425: +6812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5517 .loc 1 6812 13 view .LVU1633 + 5518 0058 C362 str r3, [r0, #44] + 5519 .LVL426: +6815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5520 .loc 1 6815 3 is_stmt 1 view .LVU1634 +6815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5521 .loc 1 6815 24 is_stmt 0 view .LVU1635 + 5522 005a 0B68 ldr r3, [r1] +6815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5523 .loc 1 6815 13 view .LVU1636 + 5524 005c 8362 str r3, [r0, #40] +6817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5525 .loc 1 6817 3 is_stmt 1 view .LVU1637 +6817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5526 .loc 1 6817 6 is_stmt 0 view .LVU1638 + 5527 005e 0A4B ldr r3, .L321 + 5528 0060 9842 cmp r0, r3 + 5529 0062 05D0 beq .L318 +6817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5530 .loc 1 6817 7 discriminator 1 view .LVU1639 + 5531 0064 0B4B ldr r3, .L321+12 + 5532 0066 9842 cmp r0, r3 + 5533 0068 02D0 beq .L318 +6817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5534 .loc 1 6817 7 discriminator 2 view .LVU1640 + 5535 006a 0B4B ldr r3, .L321+16 + 5536 006c 9842 cmp r0, r3 + 5537 006e 01D1 bne .L319 + 5538 .L318: +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5539 .loc 1 6820 5 is_stmt 1 view .LVU1641 +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5540 .loc 1 6820 26 is_stmt 0 view .LVU1642 + 5541 0070 0B69 ldr r3, [r1, #16] +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5542 .loc 1 6820 15 view .LVU1643 + 5543 0072 0363 str r3, [r0, #48] + ARM GAS /tmp/cchCqftX.s page 251 + + + 5544 .L319: +6825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5545 .loc 1 6825 3 is_stmt 1 view .LVU1644 +6825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5546 .loc 1 6825 13 is_stmt 0 view .LVU1645 + 5547 0074 0123 movs r3, #1 + 5548 0076 4361 str r3, [r0, #20] +6828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5549 .loc 1 6828 3 is_stmt 1 view .LVU1646 +6828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5550 .loc 1 6828 7 is_stmt 0 view .LVU1647 + 5551 0078 0269 ldr r2, [r0, #16] +6828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5552 .loc 1 6828 6 view .LVU1648 + 5553 007a 1342 tst r3, r2 + 5554 007c 03D0 beq .L313 +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5555 .loc 1 6831 5 is_stmt 1 view .LVU1649 + 5556 007e 0369 ldr r3, [r0, #16] + 5557 0080 0122 movs r2, #1 + 5558 0082 9343 bics r3, r2 + 5559 0084 0361 str r3, [r0, #16] + 5560 .L313: +6833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5561 .loc 1 6833 1 is_stmt 0 view .LVU1650 + 5562 @ sp needed + 5563 0086 7047 bx lr + 5564 .L322: + 5565 .align 2 + 5566 .L321: + 5567 0088 002C0140 .word 1073818624 + 5568 008c 00040040 .word 1073742848 + 5569 0090 00200040 .word 1073750016 + 5570 0094 00440140 .word 1073824768 + 5571 0098 00480140 .word 1073825792 + 5572 009c FFFCFFFF .word -769 + 5573 .cfi_endproc + 5574 .LFE144: + 5576 .section .text.HAL_TIM_Base_Init,"ax",%progbits + 5577 .align 1 + 5578 .global HAL_TIM_Base_Init + 5579 .syntax unified + 5580 .code 16 + 5581 .thumb_func + 5583 HAL_TIM_Base_Init: + 5584 .LVL427: + 5585 .LFB40: + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5586 .loc 1 267 1 is_stmt 1 view -0 + 5587 .cfi_startproc + 5588 @ args = 0, pretend = 0, frame = 0 + 5589 @ frame_needed = 0, uses_anonymous_args = 0 + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5590 .loc 1 267 1 is_stmt 0 view .LVU1652 + 5591 0000 70B5 push {r4, r5, r6, lr} + 5592 .cfi_def_cfa_offset 16 + 5593 .cfi_offset 4, -16 + ARM GAS /tmp/cchCqftX.s page 252 + + + 5594 .cfi_offset 5, -12 + 5595 .cfi_offset 6, -8 + 5596 .cfi_offset 14, -4 + 5597 0002 041E subs r4, r0, #0 + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5598 .loc 1 269 3 is_stmt 1 view .LVU1653 + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5599 .loc 1 269 6 is_stmt 0 view .LVU1654 + 5600 0004 26D0 beq .L326 + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5601 .loc 1 275 3 is_stmt 1 view .LVU1655 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5602 .loc 1 276 3 view .LVU1656 + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5603 .loc 1 277 3 view .LVU1657 + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5604 .loc 1 278 3 view .LVU1658 + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5605 .loc 1 279 3 view .LVU1659 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5606 .loc 1 281 3 view .LVU1660 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5607 .loc 1 281 11 is_stmt 0 view .LVU1661 + 5608 0006 3D23 movs r3, #61 + 5609 0008 C35C ldrb r3, [r0, r3] + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5610 .loc 1 281 6 view .LVU1662 + 5611 000a 002B cmp r3, #0 + 5612 000c 1CD0 beq .L327 + 5613 .LVL428: + 5614 .L325: + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5615 .loc 1 303 3 is_stmt 1 view .LVU1663 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5616 .loc 1 303 15 is_stmt 0 view .LVU1664 + 5617 000e 3D25 movs r5, #61 + 5618 0010 0223 movs r3, #2 + 5619 0012 6355 strb r3, [r4, r5] + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5620 .loc 1 306 3 is_stmt 1 view .LVU1665 + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5621 .loc 1 306 38 is_stmt 0 view .LVU1666 + 5622 0014 2100 movs r1, r4 + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5623 .loc 1 306 3 view .LVU1667 + 5624 0016 01C9 ldmia r1!, {r0} + 5625 0018 FFF7FEFF bl TIM_Base_SetConfig + 5626 .LVL429: + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5627 .loc 1 309 3 is_stmt 1 view .LVU1668 + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5628 .loc 1 309 23 is_stmt 0 view .LVU1669 + 5629 001c 0123 movs r3, #1 + 5630 001e 4622 movs r2, #70 + 5631 0020 A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5632 .loc 1 312 3 is_stmt 1 view .LVU1670 + ARM GAS /tmp/cchCqftX.s page 253 + + + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5633 .loc 1 312 3 view .LVU1671 + 5634 0022 083A subs r2, r2, #8 + 5635 0024 A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5636 .loc 1 312 3 view .LVU1672 + 5637 0026 0132 adds r2, r2, #1 + 5638 0028 A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5639 .loc 1 312 3 view .LVU1673 + 5640 002a 0132 adds r2, r2, #1 + 5641 002c A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5642 .loc 1 312 3 view .LVU1674 + 5643 002e 0132 adds r2, r2, #1 + 5644 0030 A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5645 .loc 1 312 3 view .LVU1675 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5646 .loc 1 313 3 view .LVU1676 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5647 .loc 1 313 3 view .LVU1677 + 5648 0032 0132 adds r2, r2, #1 + 5649 0034 A354 strb r3, [r4, r2] + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5650 .loc 1 313 3 view .LVU1678 + 5651 0036 0132 adds r2, r2, #1 + 5652 0038 A354 strb r3, [r4, r2] + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5653 .loc 1 313 3 view .LVU1679 + 5654 003a 0132 adds r2, r2, #1 + 5655 003c A354 strb r3, [r4, r2] + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5656 .loc 1 313 3 view .LVU1680 + 5657 003e 0132 adds r2, r2, #1 + 5658 0040 A354 strb r3, [r4, r2] + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5659 .loc 1 313 3 view .LVU1681 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5660 .loc 1 316 3 view .LVU1682 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5661 .loc 1 316 15 is_stmt 0 view .LVU1683 + 5662 0042 6355 strb r3, [r4, r5] + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5663 .loc 1 318 3 is_stmt 1 view .LVU1684 + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5664 .loc 1 318 10 is_stmt 0 view .LVU1685 + 5665 0044 0020 movs r0, #0 + 5666 .L324: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5667 .loc 1 319 1 view .LVU1686 + 5668 @ sp needed + 5669 .LVL430: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5670 .loc 1 319 1 view .LVU1687 + 5671 0046 70BD pop {r4, r5, r6, pc} + 5672 .LVL431: + ARM GAS /tmp/cchCqftX.s page 254 + + + 5673 .L327: + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5674 .loc 1 284 5 is_stmt 1 view .LVU1688 + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5675 .loc 1 284 16 is_stmt 0 view .LVU1689 + 5676 0048 3C33 adds r3, r3, #60 + 5677 004a 0022 movs r2, #0 + 5678 004c C254 strb r2, [r0, r3] + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5679 .loc 1 298 5 is_stmt 1 view .LVU1690 + 5680 004e FFF7FEFF bl HAL_TIM_Base_MspInit + 5681 .LVL432: + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5682 .loc 1 298 5 is_stmt 0 view .LVU1691 + 5683 0052 DCE7 b .L325 + 5684 .LVL433: + 5685 .L326: + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5686 .loc 1 271 12 view .LVU1692 + 5687 0054 0120 movs r0, #1 + 5688 .LVL434: + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5689 .loc 1 271 12 view .LVU1693 + 5690 0056 F6E7 b .L324 + 5691 .cfi_endproc + 5692 .LFE40: + 5694 .section .text.HAL_TIM_OC_Init,"ax",%progbits + 5695 .align 1 + 5696 .global HAL_TIM_OC_Init + 5697 .syntax unified + 5698 .code 16 + 5699 .thumb_func + 5701 HAL_TIM_OC_Init: + 5702 .LVL435: + 5703 .LFB50: + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5704 .loc 1 651 1 is_stmt 1 view -0 + 5705 .cfi_startproc + 5706 @ args = 0, pretend = 0, frame = 0 + 5707 @ frame_needed = 0, uses_anonymous_args = 0 + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5708 .loc 1 651 1 is_stmt 0 view .LVU1695 + 5709 0000 70B5 push {r4, r5, r6, lr} + 5710 .cfi_def_cfa_offset 16 + 5711 .cfi_offset 4, -16 + 5712 .cfi_offset 5, -12 + 5713 .cfi_offset 6, -8 + 5714 .cfi_offset 14, -4 + 5715 0002 041E subs r4, r0, #0 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5716 .loc 1 653 3 is_stmt 1 view .LVU1696 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5717 .loc 1 653 6 is_stmt 0 view .LVU1697 + 5718 0004 26D0 beq .L331 + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5719 .loc 1 659 3 is_stmt 1 view .LVU1698 + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + ARM GAS /tmp/cchCqftX.s page 255 + + + 5720 .loc 1 660 3 view .LVU1699 + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5721 .loc 1 661 3 view .LVU1700 + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5722 .loc 1 662 3 view .LVU1701 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5723 .loc 1 663 3 view .LVU1702 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5724 .loc 1 665 3 view .LVU1703 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5725 .loc 1 665 11 is_stmt 0 view .LVU1704 + 5726 0006 3D23 movs r3, #61 + 5727 0008 C35C ldrb r3, [r0, r3] + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5728 .loc 1 665 6 view .LVU1705 + 5729 000a 002B cmp r3, #0 + 5730 000c 1CD0 beq .L332 + 5731 .LVL436: + 5732 .L330: + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5733 .loc 1 687 3 is_stmt 1 view .LVU1706 + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5734 .loc 1 687 15 is_stmt 0 view .LVU1707 + 5735 000e 3D25 movs r5, #61 + 5736 0010 0223 movs r3, #2 + 5737 0012 6355 strb r3, [r4, r5] + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5738 .loc 1 690 3 is_stmt 1 view .LVU1708 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5739 .loc 1 690 39 is_stmt 0 view .LVU1709 + 5740 0014 2100 movs r1, r4 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5741 .loc 1 690 3 view .LVU1710 + 5742 0016 01C9 ldmia r1!, {r0} + 5743 0018 FFF7FEFF bl TIM_Base_SetConfig + 5744 .LVL437: + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5745 .loc 1 693 3 is_stmt 1 view .LVU1711 + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5746 .loc 1 693 23 is_stmt 0 view .LVU1712 + 5747 001c 0123 movs r3, #1 + 5748 001e 4622 movs r2, #70 + 5749 0020 A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5750 .loc 1 696 3 is_stmt 1 view .LVU1713 + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5751 .loc 1 696 3 view .LVU1714 + 5752 0022 083A subs r2, r2, #8 + 5753 0024 A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5754 .loc 1 696 3 view .LVU1715 + 5755 0026 0132 adds r2, r2, #1 + 5756 0028 A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5757 .loc 1 696 3 view .LVU1716 + 5758 002a 0132 adds r2, r2, #1 + 5759 002c A354 strb r3, [r4, r2] + ARM GAS /tmp/cchCqftX.s page 256 + + + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5760 .loc 1 696 3 view .LVU1717 + 5761 002e 0132 adds r2, r2, #1 + 5762 0030 A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5763 .loc 1 696 3 view .LVU1718 + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5764 .loc 1 697 3 view .LVU1719 + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5765 .loc 1 697 3 view .LVU1720 + 5766 0032 0132 adds r2, r2, #1 + 5767 0034 A354 strb r3, [r4, r2] + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5768 .loc 1 697 3 view .LVU1721 + 5769 0036 0132 adds r2, r2, #1 + 5770 0038 A354 strb r3, [r4, r2] + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5771 .loc 1 697 3 view .LVU1722 + 5772 003a 0132 adds r2, r2, #1 + 5773 003c A354 strb r3, [r4, r2] + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5774 .loc 1 697 3 view .LVU1723 + 5775 003e 0132 adds r2, r2, #1 + 5776 0040 A354 strb r3, [r4, r2] + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5777 .loc 1 697 3 view .LVU1724 + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5778 .loc 1 700 3 view .LVU1725 + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5779 .loc 1 700 15 is_stmt 0 view .LVU1726 + 5780 0042 6355 strb r3, [r4, r5] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5781 .loc 1 702 3 is_stmt 1 view .LVU1727 + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5782 .loc 1 702 10 is_stmt 0 view .LVU1728 + 5783 0044 0020 movs r0, #0 + 5784 .L329: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5785 .loc 1 703 1 view .LVU1729 + 5786 @ sp needed + 5787 .LVL438: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5788 .loc 1 703 1 view .LVU1730 + 5789 0046 70BD pop {r4, r5, r6, pc} + 5790 .LVL439: + 5791 .L332: + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5792 .loc 1 668 5 is_stmt 1 view .LVU1731 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5793 .loc 1 668 16 is_stmt 0 view .LVU1732 + 5794 0048 3C33 adds r3, r3, #60 + 5795 004a 0022 movs r2, #0 + 5796 004c C254 strb r2, [r0, r3] + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5797 .loc 1 682 5 is_stmt 1 view .LVU1733 + 5798 004e FFF7FEFF bl HAL_TIM_OC_MspInit + 5799 .LVL440: + ARM GAS /tmp/cchCqftX.s page 257 + + + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5800 .loc 1 682 5 is_stmt 0 view .LVU1734 + 5801 0052 DCE7 b .L330 + 5802 .LVL441: + 5803 .L331: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5804 .loc 1 655 12 view .LVU1735 + 5805 0054 0120 movs r0, #1 + 5806 .LVL442: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5807 .loc 1 655 12 view .LVU1736 + 5808 0056 F6E7 b .L329 + 5809 .cfi_endproc + 5810 .LFE50: + 5812 .section .text.HAL_TIM_PWM_Init,"ax",%progbits + 5813 .align 1 + 5814 .global HAL_TIM_PWM_Init + 5815 .syntax unified + 5816 .code 16 + 5817 .thumb_func + 5819 HAL_TIM_PWM_Init: + 5820 .LVL443: + 5821 .LFB60: +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5822 .loc 1 1316 1 is_stmt 1 view -0 + 5823 .cfi_startproc + 5824 @ args = 0, pretend = 0, frame = 0 + 5825 @ frame_needed = 0, uses_anonymous_args = 0 +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5826 .loc 1 1316 1 is_stmt 0 view .LVU1738 + 5827 0000 70B5 push {r4, r5, r6, lr} + 5828 .cfi_def_cfa_offset 16 + 5829 .cfi_offset 4, -16 + 5830 .cfi_offset 5, -12 + 5831 .cfi_offset 6, -8 + 5832 .cfi_offset 14, -4 + 5833 0002 041E subs r4, r0, #0 +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5834 .loc 1 1318 3 is_stmt 1 view .LVU1739 +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5835 .loc 1 1318 6 is_stmt 0 view .LVU1740 + 5836 0004 26D0 beq .L336 +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5837 .loc 1 1324 3 is_stmt 1 view .LVU1741 +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5838 .loc 1 1325 3 view .LVU1742 +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5839 .loc 1 1326 3 view .LVU1743 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5840 .loc 1 1327 3 view .LVU1744 +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5841 .loc 1 1328 3 view .LVU1745 +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5842 .loc 1 1330 3 view .LVU1746 +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5843 .loc 1 1330 11 is_stmt 0 view .LVU1747 + 5844 0006 3D23 movs r3, #61 + ARM GAS /tmp/cchCqftX.s page 258 + + + 5845 0008 C35C ldrb r3, [r0, r3] +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5846 .loc 1 1330 6 view .LVU1748 + 5847 000a 002B cmp r3, #0 + 5848 000c 1CD0 beq .L337 + 5849 .LVL444: + 5850 .L335: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5851 .loc 1 1352 3 is_stmt 1 view .LVU1749 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5852 .loc 1 1352 15 is_stmt 0 view .LVU1750 + 5853 000e 3D25 movs r5, #61 + 5854 0010 0223 movs r3, #2 + 5855 0012 6355 strb r3, [r4, r5] +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5856 .loc 1 1355 3 is_stmt 1 view .LVU1751 +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5857 .loc 1 1355 38 is_stmt 0 view .LVU1752 + 5858 0014 2100 movs r1, r4 +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5859 .loc 1 1355 3 view .LVU1753 + 5860 0016 01C9 ldmia r1!, {r0} + 5861 0018 FFF7FEFF bl TIM_Base_SetConfig + 5862 .LVL445: +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5863 .loc 1 1358 3 is_stmt 1 view .LVU1754 +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5864 .loc 1 1358 23 is_stmt 0 view .LVU1755 + 5865 001c 0123 movs r3, #1 + 5866 001e 4622 movs r2, #70 + 5867 0020 A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5868 .loc 1 1361 3 is_stmt 1 view .LVU1756 +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5869 .loc 1 1361 3 view .LVU1757 + 5870 0022 083A subs r2, r2, #8 + 5871 0024 A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5872 .loc 1 1361 3 view .LVU1758 + 5873 0026 0132 adds r2, r2, #1 + 5874 0028 A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5875 .loc 1 1361 3 view .LVU1759 + 5876 002a 0132 adds r2, r2, #1 + 5877 002c A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5878 .loc 1 1361 3 view .LVU1760 + 5879 002e 0132 adds r2, r2, #1 + 5880 0030 A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5881 .loc 1 1361 3 view .LVU1761 +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5882 .loc 1 1362 3 view .LVU1762 +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5883 .loc 1 1362 3 view .LVU1763 + 5884 0032 0132 adds r2, r2, #1 + 5885 0034 A354 strb r3, [r4, r2] + ARM GAS /tmp/cchCqftX.s page 259 + + +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5886 .loc 1 1362 3 view .LVU1764 + 5887 0036 0132 adds r2, r2, #1 + 5888 0038 A354 strb r3, [r4, r2] +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5889 .loc 1 1362 3 view .LVU1765 + 5890 003a 0132 adds r2, r2, #1 + 5891 003c A354 strb r3, [r4, r2] +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5892 .loc 1 1362 3 view .LVU1766 + 5893 003e 0132 adds r2, r2, #1 + 5894 0040 A354 strb r3, [r4, r2] +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5895 .loc 1 1362 3 view .LVU1767 +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5896 .loc 1 1365 3 view .LVU1768 +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5897 .loc 1 1365 15 is_stmt 0 view .LVU1769 + 5898 0042 6355 strb r3, [r4, r5] +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5899 .loc 1 1367 3 is_stmt 1 view .LVU1770 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5900 .loc 1 1367 10 is_stmt 0 view .LVU1771 + 5901 0044 0020 movs r0, #0 + 5902 .L334: +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5903 .loc 1 1368 1 view .LVU1772 + 5904 @ sp needed + 5905 .LVL446: +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5906 .loc 1 1368 1 view .LVU1773 + 5907 0046 70BD pop {r4, r5, r6, pc} + 5908 .LVL447: + 5909 .L337: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5910 .loc 1 1333 5 is_stmt 1 view .LVU1774 +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5911 .loc 1 1333 16 is_stmt 0 view .LVU1775 + 5912 0048 3C33 adds r3, r3, #60 + 5913 004a 0022 movs r2, #0 + 5914 004c C254 strb r2, [r0, r3] +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5915 .loc 1 1347 5 is_stmt 1 view .LVU1776 + 5916 004e FFF7FEFF bl HAL_TIM_PWM_MspInit + 5917 .LVL448: +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5918 .loc 1 1347 5 is_stmt 0 view .LVU1777 + 5919 0052 DCE7 b .L335 + 5920 .LVL449: + 5921 .L336: +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5922 .loc 1 1320 12 view .LVU1778 + 5923 0054 0120 movs r0, #1 + 5924 .LVL450: +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5925 .loc 1 1320 12 view .LVU1779 + 5926 0056 F6E7 b .L334 + ARM GAS /tmp/cchCqftX.s page 260 + + + 5927 .cfi_endproc + 5928 .LFE60: + 5930 .section .text.HAL_TIM_IC_Init,"ax",%progbits + 5931 .align 1 + 5932 .global HAL_TIM_IC_Init + 5933 .syntax unified + 5934 .code 16 + 5935 .thumb_func + 5937 HAL_TIM_IC_Init: + 5938 .LVL451: + 5939 .LFB70: +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5940 .loc 1 1980 1 is_stmt 1 view -0 + 5941 .cfi_startproc + 5942 @ args = 0, pretend = 0, frame = 0 + 5943 @ frame_needed = 0, uses_anonymous_args = 0 +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5944 .loc 1 1980 1 is_stmt 0 view .LVU1781 + 5945 0000 70B5 push {r4, r5, r6, lr} + 5946 .cfi_def_cfa_offset 16 + 5947 .cfi_offset 4, -16 + 5948 .cfi_offset 5, -12 + 5949 .cfi_offset 6, -8 + 5950 .cfi_offset 14, -4 + 5951 0002 041E subs r4, r0, #0 +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5952 .loc 1 1982 3 is_stmt 1 view .LVU1782 +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5953 .loc 1 1982 6 is_stmt 0 view .LVU1783 + 5954 0004 26D0 beq .L341 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5955 .loc 1 1988 3 is_stmt 1 view .LVU1784 +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5956 .loc 1 1989 3 view .LVU1785 +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5957 .loc 1 1990 3 view .LVU1786 +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5958 .loc 1 1991 3 view .LVU1787 +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5959 .loc 1 1992 3 view .LVU1788 +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5960 .loc 1 1994 3 view .LVU1789 +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5961 .loc 1 1994 11 is_stmt 0 view .LVU1790 + 5962 0006 3D23 movs r3, #61 + 5963 0008 C35C ldrb r3, [r0, r3] +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5964 .loc 1 1994 6 view .LVU1791 + 5965 000a 002B cmp r3, #0 + 5966 000c 1CD0 beq .L342 + 5967 .LVL452: + 5968 .L340: +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5969 .loc 1 2016 3 is_stmt 1 view .LVU1792 +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5970 .loc 1 2016 15 is_stmt 0 view .LVU1793 + 5971 000e 3D25 movs r5, #61 + ARM GAS /tmp/cchCqftX.s page 261 + + + 5972 0010 0223 movs r3, #2 + 5973 0012 6355 strb r3, [r4, r5] +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5974 .loc 1 2019 3 is_stmt 1 view .LVU1794 +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5975 .loc 1 2019 38 is_stmt 0 view .LVU1795 + 5976 0014 2100 movs r1, r4 +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5977 .loc 1 2019 3 view .LVU1796 + 5978 0016 01C9 ldmia r1!, {r0} + 5979 0018 FFF7FEFF bl TIM_Base_SetConfig + 5980 .LVL453: +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5981 .loc 1 2022 3 is_stmt 1 view .LVU1797 +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5982 .loc 1 2022 23 is_stmt 0 view .LVU1798 + 5983 001c 0123 movs r3, #1 + 5984 001e 4622 movs r2, #70 + 5985 0020 A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5986 .loc 1 2025 3 is_stmt 1 view .LVU1799 +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5987 .loc 1 2025 3 view .LVU1800 + 5988 0022 083A subs r2, r2, #8 + 5989 0024 A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5990 .loc 1 2025 3 view .LVU1801 + 5991 0026 0132 adds r2, r2, #1 + 5992 0028 A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5993 .loc 1 2025 3 view .LVU1802 + 5994 002a 0132 adds r2, r2, #1 + 5995 002c A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5996 .loc 1 2025 3 view .LVU1803 + 5997 002e 0132 adds r2, r2, #1 + 5998 0030 A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5999 .loc 1 2025 3 view .LVU1804 +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6000 .loc 1 2026 3 view .LVU1805 +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6001 .loc 1 2026 3 view .LVU1806 + 6002 0032 0132 adds r2, r2, #1 + 6003 0034 A354 strb r3, [r4, r2] +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6004 .loc 1 2026 3 view .LVU1807 + 6005 0036 0132 adds r2, r2, #1 + 6006 0038 A354 strb r3, [r4, r2] +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6007 .loc 1 2026 3 view .LVU1808 + 6008 003a 0132 adds r2, r2, #1 + 6009 003c A354 strb r3, [r4, r2] +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6010 .loc 1 2026 3 view .LVU1809 + 6011 003e 0132 adds r2, r2, #1 + 6012 0040 A354 strb r3, [r4, r2] + ARM GAS /tmp/cchCqftX.s page 262 + + +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6013 .loc 1 2026 3 view .LVU1810 +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6014 .loc 1 2029 3 view .LVU1811 +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6015 .loc 1 2029 15 is_stmt 0 view .LVU1812 + 6016 0042 6355 strb r3, [r4, r5] +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6017 .loc 1 2031 3 is_stmt 1 view .LVU1813 +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6018 .loc 1 2031 10 is_stmt 0 view .LVU1814 + 6019 0044 0020 movs r0, #0 + 6020 .L339: +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6021 .loc 1 2032 1 view .LVU1815 + 6022 @ sp needed + 6023 .LVL454: +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6024 .loc 1 2032 1 view .LVU1816 + 6025 0046 70BD pop {r4, r5, r6, pc} + 6026 .LVL455: + 6027 .L342: +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6028 .loc 1 1997 5 is_stmt 1 view .LVU1817 +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6029 .loc 1 1997 16 is_stmt 0 view .LVU1818 + 6030 0048 3C33 adds r3, r3, #60 + 6031 004a 0022 movs r2, #0 + 6032 004c C254 strb r2, [r0, r3] +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6033 .loc 1 2011 5 is_stmt 1 view .LVU1819 + 6034 004e FFF7FEFF bl HAL_TIM_IC_MspInit + 6035 .LVL456: +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6036 .loc 1 2011 5 is_stmt 0 view .LVU1820 + 6037 0052 DCE7 b .L340 + 6038 .LVL457: + 6039 .L341: +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6040 .loc 1 1984 12 view .LVU1821 + 6041 0054 0120 movs r0, #1 + 6042 .LVL458: +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6043 .loc 1 1984 12 view .LVU1822 + 6044 0056 F6E7 b .L339 + 6045 .cfi_endproc + 6046 .LFE70: + 6048 .section .text.HAL_TIM_OnePulse_Init,"ax",%progbits + 6049 .align 1 + 6050 .global HAL_TIM_OnePulse_Init + 6051 .syntax unified + 6052 .code 16 + 6053 .thumb_func + 6055 HAL_TIM_OnePulse_Init: + 6056 .LVL459: + 6057 .LFB80: +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + ARM GAS /tmp/cchCqftX.s page 263 + + + 6058 .loc 1 2629 1 is_stmt 1 view -0 + 6059 .cfi_startproc + 6060 @ args = 0, pretend = 0, frame = 0 + 6061 @ frame_needed = 0, uses_anonymous_args = 0 +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 6062 .loc 1 2629 1 is_stmt 0 view .LVU1824 + 6063 0000 70B5 push {r4, r5, r6, lr} + 6064 .cfi_def_cfa_offset 16 + 6065 .cfi_offset 4, -16 + 6066 .cfi_offset 5, -12 + 6067 .cfi_offset 6, -8 + 6068 .cfi_offset 14, -4 + 6069 0002 0400 movs r4, r0 + 6070 0004 0D00 movs r5, r1 +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6071 .loc 1 2631 3 is_stmt 1 view .LVU1825 +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6072 .loc 1 2631 6 is_stmt 0 view .LVU1826 + 6073 0006 0028 cmp r0, #0 + 6074 0008 27D0 beq .L346 +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 6075 .loc 1 2637 3 is_stmt 1 view .LVU1827 +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 6076 .loc 1 2638 3 view .LVU1828 +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_MODE(OnePulseMode)); + 6077 .loc 1 2639 3 view .LVU1829 +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 6078 .loc 1 2640 3 view .LVU1830 +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 6079 .loc 1 2641 3 view .LVU1831 +2642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6080 .loc 1 2642 3 view .LVU1832 +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6081 .loc 1 2644 3 view .LVU1833 +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6082 .loc 1 2644 11 is_stmt 0 view .LVU1834 + 6083 000a 3D23 movs r3, #61 + 6084 000c C35C ldrb r3, [r0, r3] +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6085 .loc 1 2644 6 view .LVU1835 + 6086 000e 002B cmp r3, #0 + 6087 0010 1DD0 beq .L347 + 6088 .LVL460: + 6089 .L345: +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6090 .loc 1 2666 3 is_stmt 1 view .LVU1836 +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6091 .loc 1 2666 15 is_stmt 0 view .LVU1837 + 6092 0012 3D26 movs r6, #61 + 6093 0014 0223 movs r3, #2 + 6094 0016 A355 strb r3, [r4, r6] +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6095 .loc 1 2669 3 is_stmt 1 view .LVU1838 +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6096 .loc 1 2669 38 is_stmt 0 view .LVU1839 + 6097 0018 2100 movs r1, r4 +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 264 + + + 6098 .loc 1 2669 3 view .LVU1840 + 6099 001a 01C9 ldmia r1!, {r0} + 6100 001c FFF7FEFF bl TIM_Base_SetConfig + 6101 .LVL461: +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6102 .loc 1 2672 3 is_stmt 1 view .LVU1841 +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6103 .loc 1 2672 7 is_stmt 0 view .LVU1842 + 6104 0020 2268 ldr r2, [r4] +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6105 .loc 1 2672 17 view .LVU1843 + 6106 0022 1368 ldr r3, [r2] +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6107 .loc 1 2672 23 view .LVU1844 + 6108 0024 0821 movs r1, #8 + 6109 0026 8B43 bics r3, r1 + 6110 0028 1360 str r3, [r2] +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6111 .loc 1 2675 3 is_stmt 1 view .LVU1845 +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6112 .loc 1 2675 7 is_stmt 0 view .LVU1846 + 6113 002a 2268 ldr r2, [r4] +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6114 .loc 1 2675 17 view .LVU1847 + 6115 002c 1368 ldr r3, [r2] +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6116 .loc 1 2675 23 view .LVU1848 + 6117 002e 2B43 orrs r3, r5 + 6118 0030 1360 str r3, [r2] +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6119 .loc 1 2678 3 is_stmt 1 view .LVU1849 +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6120 .loc 1 2678 23 is_stmt 0 view .LVU1850 + 6121 0032 0123 movs r3, #1 + 6122 0034 4622 movs r2, #70 + 6123 0036 A354 strb r3, [r4, r2] +2681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6124 .loc 1 2681 3 is_stmt 1 view .LVU1851 + 6125 0038 083A subs r2, r2, #8 + 6126 003a A354 strb r3, [r4, r2] +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 6127 .loc 1 2682 3 view .LVU1852 + 6128 003c 0132 adds r2, r2, #1 + 6129 003e A354 strb r3, [r4, r2] +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6130 .loc 1 2683 3 view .LVU1853 + 6131 0040 0332 adds r2, r2, #3 + 6132 0042 A354 strb r3, [r4, r2] +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6133 .loc 1 2684 3 view .LVU1854 + 6134 0044 0132 adds r2, r2, #1 + 6135 0046 A354 strb r3, [r4, r2] +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6136 .loc 1 2687 3 view .LVU1855 +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6137 .loc 1 2687 15 is_stmt 0 view .LVU1856 + 6138 0048 A355 strb r3, [r4, r6] + ARM GAS /tmp/cchCqftX.s page 265 + + +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6139 .loc 1 2689 3 is_stmt 1 view .LVU1857 +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6140 .loc 1 2689 10 is_stmt 0 view .LVU1858 + 6141 004a 0020 movs r0, #0 + 6142 .L344: +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6143 .loc 1 2690 1 view .LVU1859 + 6144 @ sp needed + 6145 .LVL462: + 6146 .LVL463: +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6147 .loc 1 2690 1 view .LVU1860 + 6148 004c 70BD pop {r4, r5, r6, pc} + 6149 .LVL464: + 6150 .L347: +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6151 .loc 1 2647 5 is_stmt 1 view .LVU1861 +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6152 .loc 1 2647 16 is_stmt 0 view .LVU1862 + 6153 004e 3C33 adds r3, r3, #60 + 6154 0050 0022 movs r2, #0 + 6155 0052 C254 strb r2, [r0, r3] +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6156 .loc 1 2661 5 is_stmt 1 view .LVU1863 + 6157 0054 FFF7FEFF bl HAL_TIM_OnePulse_MspInit + 6158 .LVL465: +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6159 .loc 1 2661 5 is_stmt 0 view .LVU1864 + 6160 0058 DBE7 b .L345 + 6161 .LVL466: + 6162 .L346: +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6163 .loc 1 2633 12 view .LVU1865 + 6164 005a 0120 movs r0, #1 + 6165 .LVL467: +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6166 .loc 1 2633 12 view .LVU1866 + 6167 005c F6E7 b .L344 + 6168 .cfi_endproc + 6169 .LFE80: + 6171 .section .text.HAL_TIM_Encoder_Init,"ax",%progbits + 6172 .align 1 + 6173 .global HAL_TIM_Encoder_Init + 6174 .syntax unified + 6175 .code 16 + 6176 .thumb_func + 6178 HAL_TIM_Encoder_Init: + 6179 .LVL468: + 6180 .LFB88: +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 6181 .loc 1 3020 1 is_stmt 1 view -0 + 6182 .cfi_startproc + 6183 @ args = 0, pretend = 0, frame = 0 + 6184 @ frame_needed = 0, uses_anonymous_args = 0 +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 6185 .loc 1 3020 1 is_stmt 0 view .LVU1868 + ARM GAS /tmp/cchCqftX.s page 266 + + + 6186 0000 F0B5 push {r4, r5, r6, r7, lr} + 6187 .cfi_def_cfa_offset 20 + 6188 .cfi_offset 4, -20 + 6189 .cfi_offset 5, -16 + 6190 .cfi_offset 6, -12 + 6191 .cfi_offset 7, -8 + 6192 .cfi_offset 14, -4 + 6193 0002 C646 mov lr, r8 + 6194 0004 00B5 push {lr} + 6195 .cfi_def_cfa_offset 24 + 6196 .cfi_offset 8, -24 + 6197 0006 0400 movs r4, r0 + 6198 0008 0D00 movs r5, r1 +3021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 6199 .loc 1 3021 3 is_stmt 1 view .LVU1869 +3022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 6200 .loc 1 3022 3 view .LVU1870 +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6201 .loc 1 3023 3 view .LVU1871 +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6202 .loc 1 3026 3 view .LVU1872 +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6203 .loc 1 3026 6 is_stmt 0 view .LVU1873 + 6204 000a 0028 cmp r0, #0 + 6205 000c 4DD0 beq .L351 +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 6206 .loc 1 3032 3 is_stmt 1 view .LVU1874 +3033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 6207 .loc 1 3033 3 view .LVU1875 +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 6208 .loc 1 3034 3 view .LVU1876 +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); + 6209 .loc 1 3035 3 view .LVU1877 +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); + 6210 .loc 1 3036 3 view .LVU1878 +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); + 6211 .loc 1 3037 3 view .LVU1879 +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity)); + 6212 .loc 1 3038 3 view .LVU1880 +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity)); + 6213 .loc 1 3039 3 view .LVU1881 +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 6214 .loc 1 3040 3 view .LVU1882 +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); + 6215 .loc 1 3041 3 view .LVU1883 +3042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 6216 .loc 1 3042 3 view .LVU1884 +3043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); + 6217 .loc 1 3043 3 view .LVU1885 +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 6218 .loc 1 3044 3 view .LVU1886 +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6219 .loc 1 3045 3 view .LVU1887 +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6220 .loc 1 3047 3 view .LVU1888 +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6221 .loc 1 3047 11 is_stmt 0 view .LVU1889 + ARM GAS /tmp/cchCqftX.s page 267 + + + 6222 000e 3D23 movs r3, #61 + 6223 0010 C35C ldrb r3, [r0, r3] +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6224 .loc 1 3047 6 view .LVU1890 + 6225 0012 002B cmp r3, #0 + 6226 0014 43D0 beq .L352 + 6227 .LVL469: + 6228 .L350: +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6229 .loc 1 3069 3 is_stmt 1 view .LVU1891 +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6230 .loc 1 3069 15 is_stmt 0 view .LVU1892 + 6231 0016 3D26 movs r6, #61 + 6232 0018 0223 movs r3, #2 + 6233 001a A355 strb r3, [r4, r6] +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6234 .loc 1 3072 3 is_stmt 1 view .LVU1893 +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6235 .loc 1 3072 7 is_stmt 0 view .LVU1894 + 6236 001c 2268 ldr r2, [r4] +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6237 .loc 1 3072 17 view .LVU1895 + 6238 001e 9368 ldr r3, [r2, #8] +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6239 .loc 1 3072 24 view .LVU1896 + 6240 0020 2349 ldr r1, .L353 + 6241 0022 0B40 ands r3, r1 + 6242 0024 9360 str r3, [r2, #8] +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6243 .loc 1 3075 3 is_stmt 1 view .LVU1897 +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6244 .loc 1 3075 38 is_stmt 0 view .LVU1898 + 6245 0026 2100 movs r1, r4 +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6246 .loc 1 3075 3 view .LVU1899 + 6247 0028 01C9 ldmia r1!, {r0} + 6248 002a FFF7FEFF bl TIM_Base_SetConfig + 6249 .LVL470: +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6250 .loc 1 3078 3 is_stmt 1 view .LVU1900 +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6251 .loc 1 3078 17 is_stmt 0 view .LVU1901 + 6252 002e 2168 ldr r1, [r4] +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6253 .loc 1 3078 11 view .LVU1902 + 6254 0030 8B68 ldr r3, [r1, #8] + 6255 .LVL471: +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6256 .loc 1 3081 3 is_stmt 1 view .LVU1903 +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6257 .loc 1 3081 12 is_stmt 0 view .LVU1904 + 6258 0032 8A69 ldr r2, [r1, #24] + 6259 .LVL472: +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6260 .loc 1 3084 3 is_stmt 1 view .LVU1905 +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6261 .loc 1 3084 11 is_stmt 0 view .LVU1906 + ARM GAS /tmp/cchCqftX.s page 268 + + + 6262 0034 0F6A ldr r7, [r1, #32] + 6263 .LVL473: +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6264 .loc 1 3087 3 is_stmt 1 view .LVU1907 +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6265 .loc 1 3087 21 is_stmt 0 view .LVU1908 + 6266 0036 2868 ldr r0, [r5] +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6267 .loc 1 3087 11 view .LVU1909 + 6268 0038 1843 orrs r0, r3 + 6269 003a 8046 mov r8, r0 + 6270 .LVL474: +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); + 6271 .loc 1 3090 3 is_stmt 1 view .LVU1910 +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); + 6272 .loc 1 3090 12 is_stmt 0 view .LVU1911 + 6273 003c 1D4B ldr r3, .L353+4 + 6274 003e 1A40 ands r2, r3 + 6275 .LVL475: +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6276 .loc 1 3091 3 is_stmt 1 view .LVU1912 +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6277 .loc 1 3091 23 is_stmt 0 view .LVU1913 + 6278 0040 AB68 ldr r3, [r5, #8] +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6279 .loc 1 3091 48 view .LVU1914 + 6280 0042 A869 ldr r0, [r5, #24] + 6281 .LVL476: +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6282 .loc 1 3091 63 view .LVU1915 + 6283 0044 0002 lsls r0, r0, #8 +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6284 .loc 1 3091 38 view .LVU1916 + 6285 0046 0343 orrs r3, r0 +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6286 .loc 1 3091 12 view .LVU1917 + 6287 0048 1343 orrs r3, r2 + 6288 .LVL477: +3094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); + 6289 .loc 1 3094 3 is_stmt 1 view .LVU1918 +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); + 6290 .loc 1 3095 3 view .LVU1919 +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); + 6291 .loc 1 3095 12 is_stmt 0 view .LVU1920 + 6292 004a 1B4A ldr r2, .L353+8 + 6293 004c 1340 ands r3, r2 + 6294 .LVL478: +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6295 .loc 1 3096 3 is_stmt 1 view .LVU1921 +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6296 .loc 1 3096 22 is_stmt 0 view .LVU1922 + 6297 004e EA68 ldr r2, [r5, #12] +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6298 .loc 1 3096 47 view .LVU1923 + 6299 0050 E869 ldr r0, [r5, #28] +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6300 .loc 1 3096 62 view .LVU1924 + ARM GAS /tmp/cchCqftX.s page 269 + + + 6301 0052 0002 lsls r0, r0, #8 +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6302 .loc 1 3096 37 view .LVU1925 + 6303 0054 0243 orrs r2, r0 +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6304 .loc 1 3096 12 view .LVU1926 + 6305 0056 1A43 orrs r2, r3 + 6306 .LVL479: +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6307 .loc 1 3097 3 is_stmt 1 view .LVU1927 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6308 .loc 1 3097 23 is_stmt 0 view .LVU1928 + 6309 0058 2B69 ldr r3, [r5, #16] +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6310 .loc 1 3097 35 view .LVU1929 + 6311 005a 1B01 lsls r3, r3, #4 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6312 .loc 1 3097 52 view .LVU1930 + 6313 005c 286A ldr r0, [r5, #32] +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6314 .loc 1 3097 64 view .LVU1931 + 6315 005e 0003 lsls r0, r0, #12 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6316 .loc 1 3097 42 view .LVU1932 + 6317 0060 0343 orrs r3, r0 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6318 .loc 1 3097 12 view .LVU1933 + 6319 0062 1343 orrs r3, r2 + 6320 .LVL480: +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); + 6321 .loc 1 3100 3 is_stmt 1 view .LVU1934 +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); + 6322 .loc 1 3101 3 view .LVU1935 +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); + 6323 .loc 1 3101 11 is_stmt 0 view .LVU1936 + 6324 0064 AA22 movs r2, #170 + 6325 0066 9743 bics r7, r2 + 6326 .LVL481: +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6327 .loc 1 3102 3 is_stmt 1 view .LVU1937 +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6328 .loc 1 3102 21 is_stmt 0 view .LVU1938 + 6329 0068 6A68 ldr r2, [r5, #4] +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6330 .loc 1 3102 45 view .LVU1939 + 6331 006a 6D69 ldr r5, [r5, #20] + 6332 .LVL482: +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6333 .loc 1 3102 59 view .LVU1940 + 6334 006c 2D01 lsls r5, r5, #4 +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6335 .loc 1 3102 35 view .LVU1941 + 6336 006e 2A43 orrs r2, r5 +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6337 .loc 1 3102 11 view .LVU1942 + 6338 0070 3A43 orrs r2, r7 + 6339 .LVL483: + ARM GAS /tmp/cchCqftX.s page 270 + + +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6340 .loc 1 3105 3 is_stmt 1 view .LVU1943 +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6341 .loc 1 3105 24 is_stmt 0 view .LVU1944 + 6342 0072 4046 mov r0, r8 + 6343 0074 8860 str r0, [r1, #8] +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6344 .loc 1 3108 3 is_stmt 1 view .LVU1945 +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6345 .loc 1 3108 7 is_stmt 0 view .LVU1946 + 6346 0076 2168 ldr r1, [r4] +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6347 .loc 1 3108 25 view .LVU1947 + 6348 0078 8B61 str r3, [r1, #24] +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6349 .loc 1 3111 3 is_stmt 1 view .LVU1948 +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6350 .loc 1 3111 7 is_stmt 0 view .LVU1949 + 6351 007a 2368 ldr r3, [r4] + 6352 .LVL484: +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6353 .loc 1 3111 24 view .LVU1950 + 6354 007c 1A62 str r2, [r3, #32] + 6355 .LVL485: +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6356 .loc 1 3114 3 is_stmt 1 view .LVU1951 +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6357 .loc 1 3114 23 is_stmt 0 view .LVU1952 + 6358 007e 0123 movs r3, #1 + 6359 0080 4622 movs r2, #70 + 6360 .LVL486: +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6361 .loc 1 3114 23 view .LVU1953 + 6362 0082 A354 strb r3, [r4, r2] +3117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6363 .loc 1 3117 3 is_stmt 1 view .LVU1954 + 6364 0084 083A subs r2, r2, #8 + 6365 0086 A354 strb r3, [r4, r2] +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 6366 .loc 1 3118 3 view .LVU1955 + 6367 0088 0132 adds r2, r2, #1 + 6368 008a A354 strb r3, [r4, r2] +3119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6369 .loc 1 3119 3 view .LVU1956 + 6370 008c 0332 adds r2, r2, #3 + 6371 008e A354 strb r3, [r4, r2] +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6372 .loc 1 3120 3 view .LVU1957 + 6373 0090 0132 adds r2, r2, #1 + 6374 0092 A354 strb r3, [r4, r2] +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6375 .loc 1 3123 3 view .LVU1958 +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6376 .loc 1 3123 15 is_stmt 0 view .LVU1959 + 6377 0094 A355 strb r3, [r4, r6] +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6378 .loc 1 3125 3 is_stmt 1 view .LVU1960 + ARM GAS /tmp/cchCqftX.s page 271 + + +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6379 .loc 1 3125 10 is_stmt 0 view .LVU1961 + 6380 0096 0020 movs r0, #0 + 6381 .LVL487: + 6382 .L349: +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6383 .loc 1 3126 1 view .LVU1962 + 6384 @ sp needed + 6385 .LVL488: +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6386 .loc 1 3126 1 view .LVU1963 + 6387 0098 80BC pop {r7} + 6388 009a B846 mov r8, r7 + 6389 009c F0BD pop {r4, r5, r6, r7, pc} + 6390 .LVL489: + 6391 .L352: +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6392 .loc 1 3050 5 is_stmt 1 view .LVU1964 +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6393 .loc 1 3050 16 is_stmt 0 view .LVU1965 + 6394 009e 3C33 adds r3, r3, #60 + 6395 00a0 0022 movs r2, #0 + 6396 00a2 C254 strb r2, [r0, r3] +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6397 .loc 1 3064 5 is_stmt 1 view .LVU1966 + 6398 00a4 FFF7FEFF bl HAL_TIM_Encoder_MspInit + 6399 .LVL490: +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6400 .loc 1 3064 5 is_stmt 0 view .LVU1967 + 6401 00a8 B5E7 b .L350 + 6402 .LVL491: + 6403 .L351: +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6404 .loc 1 3028 12 view .LVU1968 + 6405 00aa 0120 movs r0, #1 + 6406 .LVL492: +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6407 .loc 1 3028 12 view .LVU1969 + 6408 00ac F4E7 b .L349 + 6409 .L354: + 6410 00ae C046 .align 2 + 6411 .L353: + 6412 00b0 F8BFFFFF .word -16392 + 6413 00b4 FCFCFFFF .word -772 + 6414 00b8 0303FFFF .word -64765 + 6415 .cfi_endproc + 6416 .LFE88: + 6418 .section .text.TIM_OC2_SetConfig,"ax",%progbits + 6419 .align 1 + 6420 .global TIM_OC2_SetConfig + 6421 .syntax unified + 6422 .code 16 + 6423 .thumb_func + 6425 TIM_OC2_SetConfig: + 6426 .LVL493: + 6427 .LFB146: +6918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + ARM GAS /tmp/cchCqftX.s page 272 + + + 6428 .loc 1 6918 1 is_stmt 1 view -0 + 6429 .cfi_startproc + 6430 @ args = 0, pretend = 0, frame = 0 + 6431 @ frame_needed = 0, uses_anonymous_args = 0 +6918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + 6432 .loc 1 6918 1 is_stmt 0 view .LVU1971 + 6433 0000 70B5 push {r4, r5, r6, lr} + 6434 .cfi_def_cfa_offset 16 + 6435 .cfi_offset 4, -16 + 6436 .cfi_offset 5, -12 + 6437 .cfi_offset 6, -8 + 6438 .cfi_offset 14, -4 +6919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 6439 .loc 1 6919 3 is_stmt 1 view .LVU1972 +6920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 6440 .loc 1 6920 3 view .LVU1973 +6921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6441 .loc 1 6921 3 view .LVU1974 +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6442 .loc 1 6924 3 view .LVU1975 +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6443 .loc 1 6924 11 is_stmt 0 view .LVU1976 + 6444 0002 026A ldr r2, [r0, #32] + 6445 .LVL494: +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6446 .loc 1 6927 3 is_stmt 1 view .LVU1977 +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6447 .loc 1 6927 7 is_stmt 0 view .LVU1978 + 6448 0004 036A ldr r3, [r0, #32] +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6449 .loc 1 6927 14 view .LVU1979 + 6450 0006 1024 movs r4, #16 + 6451 0008 A343 bics r3, r4 + 6452 000a 0362 str r3, [r0, #32] +6930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6453 .loc 1 6930 3 is_stmt 1 view .LVU1980 +6930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6454 .loc 1 6930 10 is_stmt 0 view .LVU1981 + 6455 000c 4568 ldr r5, [r0, #4] + 6456 .LVL495: +6933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6457 .loc 1 6933 3 is_stmt 1 view .LVU1982 +6933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6458 .loc 1 6933 12 is_stmt 0 view .LVU1983 + 6459 000e 8369 ldr r3, [r0, #24] + 6460 .LVL496: +6936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC2S; + 6461 .loc 1 6936 3 is_stmt 1 view .LVU1984 +6937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6462 .loc 1 6937 3 view .LVU1985 +6937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6463 .loc 1 6937 12 is_stmt 0 view .LVU1986 + 6464 0010 144C ldr r4, .L360 + 6465 0012 2340 ands r3, r4 + 6466 .LVL497: +6940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6467 .loc 1 6940 3 is_stmt 1 view .LVU1987 + ARM GAS /tmp/cchCqftX.s page 273 + + +6940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6468 .loc 1 6940 25 is_stmt 0 view .LVU1988 + 6469 0014 0C68 ldr r4, [r1] +6940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6470 .loc 1 6940 34 view .LVU1989 + 6471 0016 2402 lsls r4, r4, #8 +6940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6472 .loc 1 6940 12 view .LVU1990 + 6473 0018 1C43 orrs r4, r3 + 6474 .LVL498: +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ + 6475 .loc 1 6943 3 is_stmt 1 view .LVU1991 +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ + 6476 .loc 1 6943 11 is_stmt 0 view .LVU1992 + 6477 001a 2023 movs r3, #32 + 6478 001c 9A43 bics r2, r3 + 6479 .LVL499: +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6480 .loc 1 6945 3 is_stmt 1 view .LVU1993 +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6481 .loc 1 6945 24 is_stmt 0 view .LVU1994 + 6482 001e 8B68 ldr r3, [r1, #8] +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6483 .loc 1 6945 37 view .LVU1995 + 6484 0020 1B01 lsls r3, r3, #4 +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6485 .loc 1 6945 11 view .LVU1996 + 6486 0022 1343 orrs r3, r2 + 6487 .LVL500: +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6488 .loc 1 6947 3 is_stmt 1 view .LVU1997 +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6489 .loc 1 6947 6 is_stmt 0 view .LVU1998 + 6490 0024 104A ldr r2, .L360+4 + 6491 0026 9042 cmp r0, r2 + 6492 0028 06D0 beq .L359 +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6493 .loc 1 6959 3 is_stmt 1 view .LVU1999 +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6494 .loc 1 6959 7 is_stmt 0 discriminator 1 view .LVU2000 + 6495 002a 104A ldr r2, .L360+8 + 6496 002c 9042 cmp r0, r2 + 6497 002e 0BD0 beq .L357 +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6498 .loc 1 6959 7 discriminator 2 view .LVU2001 + 6499 0030 0F4A ldr r2, .L360+12 + 6500 0032 9042 cmp r0, r2 + 6501 0034 10D1 bne .L358 + 6502 0036 07E0 b .L357 + 6503 .L359: +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6504 .loc 1 6949 5 is_stmt 1 view .LVU2002 +6952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 6505 .loc 1 6952 5 view .LVU2003 +6952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 6506 .loc 1 6952 13 is_stmt 0 view .LVU2004 + 6507 0038 8022 movs r2, #128 + ARM GAS /tmp/cchCqftX.s page 274 + + + 6508 003a 9343 bics r3, r2 + 6509 .LVL501: +6952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 6510 .loc 1 6952 13 view .LVU2005 + 6511 003c 1E00 movs r6, r3 + 6512 .LVL502: +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 6513 .loc 1 6954 5 is_stmt 1 view .LVU2006 +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 6514 .loc 1 6954 26 is_stmt 0 view .LVU2007 + 6515 003e CB68 ldr r3, [r1, #12] + 6516 .LVL503: +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 6517 .loc 1 6954 40 view .LVU2008 + 6518 0040 1B01 lsls r3, r3, #4 +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 6519 .loc 1 6954 13 view .LVU2009 + 6520 0042 3343 orrs r3, r6 + 6521 .LVL504: +6956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6522 .loc 1 6956 5 is_stmt 1 view .LVU2010 +6956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6523 .loc 1 6956 13 is_stmt 0 view .LVU2011 + 6524 0044 403A subs r2, r2, #64 + 6525 0046 9343 bics r3, r2 + 6526 .LVL505: +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6527 .loc 1 6959 3 is_stmt 1 view .LVU2012 + 6528 .L357: +6962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 6529 .loc 1 6962 5 view .LVU2013 +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6530 .loc 1 6963 5 view .LVU2014 +6966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS2N; + 6531 .loc 1 6966 5 view .LVU2015 +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ + 6532 .loc 1 6967 5 view .LVU2016 +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ + 6533 .loc 1 6967 12 is_stmt 0 view .LVU2017 + 6534 0048 0A4A ldr r2, .L360+16 + 6535 004a 1540 ands r5, r2 + 6536 .LVL506: +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + 6537 .loc 1 6969 5 is_stmt 1 view .LVU2018 +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + 6538 .loc 1 6969 25 is_stmt 0 view .LVU2019 + 6539 004c 4A69 ldr r2, [r1, #20] +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + 6540 .loc 1 6969 39 view .LVU2020 + 6541 004e 9200 lsls r2, r2, #2 +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + 6542 .loc 1 6969 12 view .LVU2021 + 6543 0050 2A43 orrs r2, r5 + 6544 .LVL507: +6971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6545 .loc 1 6971 5 is_stmt 1 view .LVU2022 +6971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 275 + + + 6546 .loc 1 6971 25 is_stmt 0 view .LVU2023 + 6547 0052 8D69 ldr r5, [r1, #24] +6971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6548 .loc 1 6971 40 view .LVU2024 + 6549 0054 AD00 lsls r5, r5, #2 +6971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6550 .loc 1 6971 12 view .LVU2025 + 6551 0056 1543 orrs r5, r2 + 6552 .LVL508: + 6553 .L358: +6975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6554 .loc 1 6975 3 is_stmt 1 view .LVU2026 +6975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6555 .loc 1 6975 13 is_stmt 0 view .LVU2027 + 6556 0058 4560 str r5, [r0, #4] +6978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6557 .loc 1 6978 3 is_stmt 1 view .LVU2028 +6978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6558 .loc 1 6978 15 is_stmt 0 view .LVU2029 + 6559 005a 8461 str r4, [r0, #24] +6981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6560 .loc 1 6981 3 is_stmt 1 view .LVU2030 +6981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6561 .loc 1 6981 25 is_stmt 0 view .LVU2031 + 6562 005c 4A68 ldr r2, [r1, #4] +6981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6563 .loc 1 6981 14 view .LVU2032 + 6564 005e 8263 str r2, [r0, #56] +6984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6565 .loc 1 6984 3 is_stmt 1 view .LVU2033 +6984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6566 .loc 1 6984 14 is_stmt 0 view .LVU2034 + 6567 0060 0362 str r3, [r0, #32] +6985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6568 .loc 1 6985 1 view .LVU2035 + 6569 @ sp needed + 6570 .LVL509: + 6571 .LVL510: +6985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6572 .loc 1 6985 1 view .LVU2036 + 6573 0062 70BD pop {r4, r5, r6, pc} + 6574 .L361: + 6575 .align 2 + 6576 .L360: + 6577 0064 FF8CFFFF .word -29441 + 6578 0068 002C0140 .word 1073818624 + 6579 006c 00440140 .word 1073824768 + 6580 0070 00480140 .word 1073825792 + 6581 0074 FFF3FFFF .word -3073 + 6582 .cfi_endproc + 6583 .LFE146: + 6585 .section .text.HAL_TIM_OC_ConfigChannel,"ax",%progbits + 6586 .align 1 + 6587 .global HAL_TIM_OC_ConfigChannel + 6588 .syntax unified + 6589 .code 16 + 6590 .thumb_func + ARM GAS /tmp/cchCqftX.s page 276 + + + 6592 HAL_TIM_OC_ConfigChannel: + 6593 .LVL511: + 6594 .LFB99: +4044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6595 .loc 1 4044 1 is_stmt 1 view -0 + 6596 .cfi_startproc + 6597 @ args = 0, pretend = 0, frame = 0 + 6598 @ frame_needed = 0, uses_anonymous_args = 0 +4044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6599 .loc 1 4044 1 is_stmt 0 view .LVU2038 + 6600 0000 10B5 push {r4, lr} + 6601 .cfi_def_cfa_offset 8 + 6602 .cfi_offset 4, -8 + 6603 .cfi_offset 14, -4 + 6604 0002 0400 movs r4, r0 +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6605 .loc 1 4045 3 is_stmt 1 view .LVU2039 + 6606 .LVL512: +4048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); + 6607 .loc 1 4048 3 view .LVU2040 +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); + 6608 .loc 1 4049 3 view .LVU2041 +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6609 .loc 1 4050 3 view .LVU2042 +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6610 .loc 1 4053 3 view .LVU2043 +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6611 .loc 1 4053 3 view .LVU2044 + 6612 0004 3C23 movs r3, #60 + 6613 0006 C35C ldrb r3, [r0, r3] + 6614 0008 012B cmp r3, #1 + 6615 000a 24D0 beq .L370 +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6616 .loc 1 4053 3 discriminator 2 view .LVU2045 + 6617 000c 3C23 movs r3, #60 + 6618 000e 0120 movs r0, #1 + 6619 .LVL513: +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6620 .loc 1 4053 3 is_stmt 0 discriminator 2 view .LVU2046 + 6621 0010 E054 strb r0, [r4, r3] +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6622 .loc 1 4053 3 is_stmt 1 discriminator 2 view .LVU2047 +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6623 .loc 1 4055 3 view .LVU2048 + 6624 0012 082A cmp r2, #8 + 6625 0014 1AD0 beq .L364 + 6626 0016 08D8 bhi .L365 + 6627 0018 002A cmp r2, #0 + 6628 001a 0FD0 beq .L366 + 6629 001c 042A cmp r2, #4 + 6630 001e 11D1 bne .L368 +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6631 .loc 1 4070 7 view .LVU2049 +4073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6632 .loc 1 4073 7 view .LVU2050 + 6633 0020 2068 ldr r0, [r4] + 6634 0022 FFF7FEFF bl TIM_OC2_SetConfig + ARM GAS /tmp/cchCqftX.s page 277 + + + 6635 .LVL514: +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6636 .loc 1 4074 7 view .LVU2051 +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6637 .loc 1 4045 21 is_stmt 0 view .LVU2052 + 6638 0026 0020 movs r0, #0 +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6639 .loc 1 4074 7 view .LVU2053 + 6640 0028 0CE0 b .L368 + 6641 .LVL515: + 6642 .L365: +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6643 .loc 1 4055 3 view .LVU2054 + 6644 002a 0C2A cmp r2, #12 + 6645 002c 04D1 bne .L371 +4090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6646 .loc 1 4090 7 is_stmt 1 view .LVU2055 +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6647 .loc 1 4093 7 view .LVU2056 + 6648 002e 2068 ldr r0, [r4] + 6649 0030 FFF7FEFF bl TIM_OC4_SetConfig + 6650 .LVL516: +4094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6651 .loc 1 4094 7 view .LVU2057 +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6652 .loc 1 4045 21 is_stmt 0 view .LVU2058 + 6653 0034 0020 movs r0, #0 +4094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6654 .loc 1 4094 7 view .LVU2059 + 6655 0036 05E0 b .L368 + 6656 .LVL517: + 6657 .L371: +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6658 .loc 1 4055 3 view .LVU2060 + 6659 0038 0120 movs r0, #1 + 6660 003a 03E0 b .L368 + 6661 .L366: +4060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6662 .loc 1 4060 7 is_stmt 1 view .LVU2061 +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6663 .loc 1 4063 7 view .LVU2062 + 6664 003c 2068 ldr r0, [r4] + 6665 003e FFF7FEFF bl TIM_OC1_SetConfig + 6666 .LVL518: +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6667 .loc 1 4064 7 view .LVU2063 +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6668 .loc 1 4045 21 is_stmt 0 view .LVU2064 + 6669 0042 0020 movs r0, #0 + 6670 .L368: + 6671 .LVL519: +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6672 .loc 1 4102 3 is_stmt 1 view .LVU2065 +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6673 .loc 1 4102 3 view .LVU2066 + 6674 0044 3C23 movs r3, #60 + 6675 0046 0022 movs r2, #0 + ARM GAS /tmp/cchCqftX.s page 278 + + + 6676 0048 E254 strb r2, [r4, r3] +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6677 .loc 1 4102 3 view .LVU2067 +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6678 .loc 1 4104 3 view .LVU2068 + 6679 .LVL520: + 6680 .L363: +4105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6681 .loc 1 4105 1 is_stmt 0 view .LVU2069 + 6682 @ sp needed + 6683 .LVL521: +4105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6684 .loc 1 4105 1 view .LVU2070 + 6685 004a 10BD pop {r4, pc} + 6686 .LVL522: + 6687 .L364: +4080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6688 .loc 1 4080 7 is_stmt 1 view .LVU2071 +4083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6689 .loc 1 4083 7 view .LVU2072 + 6690 004c 2068 ldr r0, [r4] + 6691 004e FFF7FEFF bl TIM_OC3_SetConfig + 6692 .LVL523: +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6693 .loc 1 4084 7 view .LVU2073 +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6694 .loc 1 4045 21 is_stmt 0 view .LVU2074 + 6695 0052 0020 movs r0, #0 +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6696 .loc 1 4084 7 view .LVU2075 + 6697 0054 F6E7 b .L368 + 6698 .LVL524: + 6699 .L370: +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6700 .loc 1 4053 3 discriminator 1 view .LVU2076 + 6701 0056 0220 movs r0, #2 + 6702 .LVL525: +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6703 .loc 1 4053 3 discriminator 1 view .LVU2077 + 6704 0058 F7E7 b .L363 + 6705 .cfi_endproc + 6706 .LFE99: + 6708 .section .text.HAL_TIM_PWM_ConfigChannel,"ax",%progbits + 6709 .align 1 + 6710 .global HAL_TIM_PWM_ConfigChannel + 6711 .syntax unified + 6712 .code 16 + 6713 .thumb_func + 6715 HAL_TIM_PWM_ConfigChannel: + 6716 .LVL526: + 6717 .LFB101: +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6718 .loc 1 4222 1 is_stmt 1 view -0 + 6719 .cfi_startproc + 6720 @ args = 0, pretend = 0, frame = 0 + 6721 @ frame_needed = 0, uses_anonymous_args = 0 +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/cchCqftX.s page 279 + + + 6722 .loc 1 4222 1 is_stmt 0 view .LVU2079 + 6723 0000 70B5 push {r4, r5, r6, lr} + 6724 .cfi_def_cfa_offset 16 + 6725 .cfi_offset 4, -16 + 6726 .cfi_offset 5, -12 + 6727 .cfi_offset 6, -8 + 6728 .cfi_offset 14, -4 + 6729 0002 0400 movs r4, r0 + 6730 0004 0D00 movs r5, r1 +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6731 .loc 1 4223 3 is_stmt 1 view .LVU2080 + 6732 .LVL527: +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); + 6733 .loc 1 4226 3 view .LVU2081 +4227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); + 6734 .loc 1 4227 3 view .LVU2082 +4228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); + 6735 .loc 1 4228 3 view .LVU2083 +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6736 .loc 1 4229 3 view .LVU2084 +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6737 .loc 1 4232 3 view .LVU2085 +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6738 .loc 1 4232 3 view .LVU2086 + 6739 0006 3C23 movs r3, #60 + 6740 0008 C35C ldrb r3, [r0, r3] + 6741 000a 012B cmp r3, #1 + 6742 000c 00D1 bne .LCB5776 + 6743 000e 6AE0 b .L380 @long jump + 6744 .LCB5776: +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6745 .loc 1 4232 3 discriminator 2 view .LVU2087 + 6746 0010 3C23 movs r3, #60 + 6747 0012 0121 movs r1, #1 + 6748 .LVL528: +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6749 .loc 1 4232 3 is_stmt 0 discriminator 2 view .LVU2088 + 6750 0014 C154 strb r1, [r0, r3] +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6751 .loc 1 4232 3 is_stmt 1 discriminator 2 view .LVU2089 +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6752 .loc 1 4234 3 view .LVU2090 + 6753 0016 082A cmp r2, #8 + 6754 0018 50D0 beq .L374 + 6755 001a 1CD8 bhi .L375 + 6756 001c 002A cmp r2, #0 + 6757 001e 35D0 beq .L376 + 6758 0020 042A cmp r2, #4 + 6759 0022 16D1 bne .L381 +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6760 .loc 1 4256 7 view .LVU2091 +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6761 .loc 1 4259 7 view .LVU2092 + 6762 0024 0068 ldr r0, [r0] + 6763 .LVL529: +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6764 .loc 1 4259 7 is_stmt 0 view .LVU2093 + ARM GAS /tmp/cchCqftX.s page 280 + + + 6765 0026 2900 movs r1, r5 + 6766 0028 FFF7FEFF bl TIM_OC2_SetConfig + 6767 .LVL530: +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6768 .loc 1 4262 7 is_stmt 1 view .LVU2094 +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6769 .loc 1 4262 11 is_stmt 0 view .LVU2095 + 6770 002c 2268 ldr r2, [r4] +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6771 .loc 1 4262 21 view .LVU2096 + 6772 002e 9169 ldr r1, [r2, #24] +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6773 .loc 1 4262 29 view .LVU2097 + 6774 0030 8023 movs r3, #128 + 6775 0032 1B01 lsls r3, r3, #4 + 6776 0034 0B43 orrs r3, r1 + 6777 0036 9361 str r3, [r2, #24] +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6778 .loc 1 4265 7 is_stmt 1 view .LVU2098 +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6779 .loc 1 4265 11 is_stmt 0 view .LVU2099 + 6780 0038 2268 ldr r2, [r4] +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6781 .loc 1 4265 21 view .LVU2100 + 6782 003a 9369 ldr r3, [r2, #24] +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6783 .loc 1 4265 29 view .LVU2101 + 6784 003c 2B49 ldr r1, .L383 + 6785 003e 0B40 ands r3, r1 + 6786 0040 9361 str r3, [r2, #24] +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6787 .loc 1 4266 7 is_stmt 1 view .LVU2102 +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6788 .loc 1 4266 11 is_stmt 0 view .LVU2103 + 6789 0042 2168 ldr r1, [r4] +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6790 .loc 1 4266 21 view .LVU2104 + 6791 0044 8B69 ldr r3, [r1, #24] +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6792 .loc 1 4266 39 view .LVU2105 + 6793 0046 2A69 ldr r2, [r5, #16] +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6794 .loc 1 4266 52 view .LVU2106 + 6795 0048 1202 lsls r2, r2, #8 +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6796 .loc 1 4266 29 view .LVU2107 + 6797 004a 1343 orrs r3, r2 + 6798 004c 8B61 str r3, [r1, #24] +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6799 .loc 1 4267 7 is_stmt 1 view .LVU2108 +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6800 .loc 1 4223 21 is_stmt 0 view .LVU2109 + 6801 004e 0020 movs r0, #0 +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6802 .loc 1 4267 7 view .LVU2110 + 6803 0050 30E0 b .L378 + 6804 .LVL531: + ARM GAS /tmp/cchCqftX.s page 281 + + + 6805 .L381: +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6806 .loc 1 4234 3 view .LVU2111 + 6807 0052 0120 movs r0, #1 + 6808 .LVL532: +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6809 .loc 1 4234 3 view .LVU2112 + 6810 0054 2EE0 b .L378 + 6811 .LVL533: + 6812 .L375: +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6813 .loc 1 4234 3 view .LVU2113 + 6814 0056 0C2A cmp r2, #12 + 6815 0058 16D1 bne .L382 +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6816 .loc 1 4290 7 is_stmt 1 view .LVU2114 +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6817 .loc 1 4293 7 view .LVU2115 + 6818 005a 0068 ldr r0, [r0] + 6819 .LVL534: +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6820 .loc 1 4293 7 is_stmt 0 view .LVU2116 + 6821 005c 2900 movs r1, r5 + 6822 005e FFF7FEFF bl TIM_OC4_SetConfig + 6823 .LVL535: +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6824 .loc 1 4296 7 is_stmt 1 view .LVU2117 +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6825 .loc 1 4296 11 is_stmt 0 view .LVU2118 + 6826 0062 2268 ldr r2, [r4] +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6827 .loc 1 4296 21 view .LVU2119 + 6828 0064 D169 ldr r1, [r2, #28] +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6829 .loc 1 4296 29 view .LVU2120 + 6830 0066 8023 movs r3, #128 + 6831 0068 1B01 lsls r3, r3, #4 + 6832 006a 0B43 orrs r3, r1 + 6833 006c D361 str r3, [r2, #28] +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6834 .loc 1 4299 7 is_stmt 1 view .LVU2121 +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6835 .loc 1 4299 11 is_stmt 0 view .LVU2122 + 6836 006e 2268 ldr r2, [r4] +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6837 .loc 1 4299 21 view .LVU2123 + 6838 0070 D369 ldr r3, [r2, #28] +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6839 .loc 1 4299 29 view .LVU2124 + 6840 0072 1E49 ldr r1, .L383 + 6841 0074 0B40 ands r3, r1 + 6842 0076 D361 str r3, [r2, #28] +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6843 .loc 1 4300 7 is_stmt 1 view .LVU2125 +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6844 .loc 1 4300 11 is_stmt 0 view .LVU2126 + 6845 0078 2168 ldr r1, [r4] + ARM GAS /tmp/cchCqftX.s page 282 + + +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6846 .loc 1 4300 21 view .LVU2127 + 6847 007a CB69 ldr r3, [r1, #28] +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6848 .loc 1 4300 39 view .LVU2128 + 6849 007c 2A69 ldr r2, [r5, #16] +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6850 .loc 1 4300 52 view .LVU2129 + 6851 007e 1202 lsls r2, r2, #8 +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6852 .loc 1 4300 29 view .LVU2130 + 6853 0080 1343 orrs r3, r2 + 6854 0082 CB61 str r3, [r1, #28] +4301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6855 .loc 1 4301 7 is_stmt 1 view .LVU2131 +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6856 .loc 1 4223 21 is_stmt 0 view .LVU2132 + 6857 0084 0020 movs r0, #0 +4301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6858 .loc 1 4301 7 view .LVU2133 + 6859 0086 15E0 b .L378 + 6860 .LVL536: + 6861 .L382: +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6862 .loc 1 4234 3 view .LVU2134 + 6863 0088 0120 movs r0, #1 + 6864 .LVL537: +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6865 .loc 1 4234 3 view .LVU2135 + 6866 008a 13E0 b .L378 + 6867 .LVL538: + 6868 .L376: +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6869 .loc 1 4239 7 is_stmt 1 view .LVU2136 +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6870 .loc 1 4242 7 view .LVU2137 + 6871 008c 0068 ldr r0, [r0] + 6872 .LVL539: +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6873 .loc 1 4242 7 is_stmt 0 view .LVU2138 + 6874 008e 2900 movs r1, r5 + 6875 0090 FFF7FEFF bl TIM_OC1_SetConfig + 6876 .LVL540: +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6877 .loc 1 4245 7 is_stmt 1 view .LVU2139 +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6878 .loc 1 4245 11 is_stmt 0 view .LVU2140 + 6879 0094 2268 ldr r2, [r4] +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6880 .loc 1 4245 21 view .LVU2141 + 6881 0096 9369 ldr r3, [r2, #24] +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6882 .loc 1 4245 29 view .LVU2142 + 6883 0098 0821 movs r1, #8 + 6884 009a 0B43 orrs r3, r1 + 6885 009c 9361 str r3, [r2, #24] +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + ARM GAS /tmp/cchCqftX.s page 283 + + + 6886 .loc 1 4248 7 is_stmt 1 view .LVU2143 +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6887 .loc 1 4248 11 is_stmt 0 view .LVU2144 + 6888 009e 2268 ldr r2, [r4] +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6889 .loc 1 4248 21 view .LVU2145 + 6890 00a0 9369 ldr r3, [r2, #24] +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6891 .loc 1 4248 29 view .LVU2146 + 6892 00a2 0439 subs r1, r1, #4 + 6893 00a4 8B43 bics r3, r1 + 6894 00a6 9361 str r3, [r2, #24] +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6895 .loc 1 4249 7 is_stmt 1 view .LVU2147 +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6896 .loc 1 4249 11 is_stmt 0 view .LVU2148 + 6897 00a8 2268 ldr r2, [r4] +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6898 .loc 1 4249 21 view .LVU2149 + 6899 00aa 9369 ldr r3, [r2, #24] +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6900 .loc 1 4249 39 view .LVU2150 + 6901 00ac 2969 ldr r1, [r5, #16] +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6902 .loc 1 4249 29 view .LVU2151 + 6903 00ae 0B43 orrs r3, r1 + 6904 00b0 9361 str r3, [r2, #24] +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6905 .loc 1 4250 7 is_stmt 1 view .LVU2152 +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6906 .loc 1 4223 21 is_stmt 0 view .LVU2153 + 6907 00b2 0020 movs r0, #0 + 6908 .L378: + 6909 .LVL541: +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6910 .loc 1 4309 3 is_stmt 1 view .LVU2154 +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6911 .loc 1 4309 3 view .LVU2155 + 6912 00b4 3C23 movs r3, #60 + 6913 00b6 0022 movs r2, #0 + 6914 00b8 E254 strb r2, [r4, r3] +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6915 .loc 1 4309 3 view .LVU2156 +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6916 .loc 1 4311 3 view .LVU2157 + 6917 .LVL542: + 6918 .L373: +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6919 .loc 1 4312 1 is_stmt 0 view .LVU2158 + 6920 @ sp needed + 6921 .LVL543: + 6922 .LVL544: +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6923 .loc 1 4312 1 view .LVU2159 + 6924 00ba 70BD pop {r4, r5, r6, pc} + 6925 .LVL545: + 6926 .L374: + ARM GAS /tmp/cchCqftX.s page 284 + + +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6927 .loc 1 4273 7 is_stmt 1 view .LVU2160 +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6928 .loc 1 4276 7 view .LVU2161 + 6929 00bc 0068 ldr r0, [r0] + 6930 .LVL546: +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6931 .loc 1 4276 7 is_stmt 0 view .LVU2162 + 6932 00be 2900 movs r1, r5 + 6933 00c0 FFF7FEFF bl TIM_OC3_SetConfig + 6934 .LVL547: +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6935 .loc 1 4279 7 is_stmt 1 view .LVU2163 +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6936 .loc 1 4279 11 is_stmt 0 view .LVU2164 + 6937 00c4 2268 ldr r2, [r4] +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6938 .loc 1 4279 21 view .LVU2165 + 6939 00c6 D369 ldr r3, [r2, #28] +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6940 .loc 1 4279 29 view .LVU2166 + 6941 00c8 0821 movs r1, #8 + 6942 00ca 0B43 orrs r3, r1 + 6943 00cc D361 str r3, [r2, #28] +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6944 .loc 1 4282 7 is_stmt 1 view .LVU2167 +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6945 .loc 1 4282 11 is_stmt 0 view .LVU2168 + 6946 00ce 2268 ldr r2, [r4] +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6947 .loc 1 4282 21 view .LVU2169 + 6948 00d0 D369 ldr r3, [r2, #28] +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6949 .loc 1 4282 29 view .LVU2170 + 6950 00d2 0439 subs r1, r1, #4 + 6951 00d4 8B43 bics r3, r1 + 6952 00d6 D361 str r3, [r2, #28] +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6953 .loc 1 4283 7 is_stmt 1 view .LVU2171 +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6954 .loc 1 4283 11 is_stmt 0 view .LVU2172 + 6955 00d8 2268 ldr r2, [r4] +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6956 .loc 1 4283 21 view .LVU2173 + 6957 00da D369 ldr r3, [r2, #28] +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6958 .loc 1 4283 39 view .LVU2174 + 6959 00dc 2969 ldr r1, [r5, #16] +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6960 .loc 1 4283 29 view .LVU2175 + 6961 00de 0B43 orrs r3, r1 + 6962 00e0 D361 str r3, [r2, #28] +4284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6963 .loc 1 4284 7 is_stmt 1 view .LVU2176 +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6964 .loc 1 4223 21 is_stmt 0 view .LVU2177 + 6965 00e2 0020 movs r0, #0 + ARM GAS /tmp/cchCqftX.s page 285 + + +4284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6966 .loc 1 4284 7 view .LVU2178 + 6967 00e4 E6E7 b .L378 + 6968 .LVL548: + 6969 .L380: +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6970 .loc 1 4232 3 discriminator 1 view .LVU2179 + 6971 00e6 0220 movs r0, #2 + 6972 .LVL549: +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6973 .loc 1 4232 3 discriminator 1 view .LVU2180 + 6974 00e8 E7E7 b .L373 + 6975 .L384: + 6976 00ea C046 .align 2 + 6977 .L383: + 6978 00ec FFFBFFFF .word -1025 + 6979 .cfi_endproc + 6980 .LFE101: + 6982 .section .text.TIM_TI1_SetConfig,"ax",%progbits + 6983 .align 1 + 6984 .global TIM_TI1_SetConfig + 6985 .syntax unified + 6986 .code 16 + 6987 .thumb_func + 6989 TIM_TI1_SetConfig: + 6990 .LVL550: + 6991 .LFB150: +7265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 6992 .loc 1 7265 1 is_stmt 1 view -0 + 6993 .cfi_startproc + 6994 @ args = 0, pretend = 0, frame = 0 + 6995 @ frame_needed = 0, uses_anonymous_args = 0 +7265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 6996 .loc 1 7265 1 is_stmt 0 view .LVU2182 + 6997 0000 70B5 push {r4, r5, r6, lr} + 6998 .cfi_def_cfa_offset 16 + 6999 .cfi_offset 4, -16 + 7000 .cfi_offset 5, -12 + 7001 .cfi_offset 6, -8 + 7002 .cfi_offset 14, -4 + 7003 0002 1600 movs r6, r2 +7266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 7004 .loc 1 7266 3 is_stmt 1 view .LVU2183 +7267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7005 .loc 1 7267 3 view .LVU2184 +7270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; + 7006 .loc 1 7270 3 view .LVU2185 +7270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; + 7007 .loc 1 7270 11 is_stmt 0 view .LVU2186 + 7008 0004 046A ldr r4, [r0, #32] + 7009 .LVL551: +7271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 7010 .loc 1 7271 3 is_stmt 1 view .LVU2187 +7271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 7011 .loc 1 7271 7 is_stmt 0 view .LVU2188 + 7012 0006 026A ldr r2, [r0, #32] + 7013 .LVL552: + ARM GAS /tmp/cchCqftX.s page 286 + + +7271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 7014 .loc 1 7271 14 view .LVU2189 + 7015 0008 0125 movs r5, #1 + 7016 000a AA43 bics r2, r5 + 7017 000c 0262 str r2, [r0, #32] +7272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7018 .loc 1 7272 3 is_stmt 1 view .LVU2190 +7272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7019 .loc 1 7272 12 is_stmt 0 view .LVU2191 + 7020 000e 8269 ldr r2, [r0, #24] + 7021 .LVL553: +7275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7022 .loc 1 7275 3 is_stmt 1 view .LVU2192 +7275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7023 .loc 1 7275 7 is_stmt 0 view .LVU2193 + 7024 0010 0E4D ldr r5, .L388 + 7025 0012 A842 cmp r0, r5 + 7026 0014 09D0 beq .L386 +7275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7027 .loc 1 7275 7 discriminator 2 view .LVU2194 + 7028 0016 8025 movs r5, #128 + 7029 0018 ED05 lsls r5, r5, #23 + 7030 001a A842 cmp r0, r5 + 7031 001c 05D0 beq .L386 +7275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7032 .loc 1 7275 7 discriminator 4 view .LVU2195 + 7033 001e 0C4D ldr r5, .L388+4 + 7034 0020 A842 cmp r0, r5 + 7035 0022 02D0 beq .L386 +7282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7036 .loc 1 7282 5 is_stmt 1 view .LVU2196 +7282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7037 .loc 1 7282 14 is_stmt 0 view .LVU2197 + 7038 0024 0125 movs r5, #1 + 7039 0026 2A43 orrs r2, r5 + 7040 .LVL554: +7282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7041 .loc 1 7282 14 view .LVU2198 + 7042 0028 02E0 b .L387 + 7043 .L386: +7277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; + 7044 .loc 1 7277 5 is_stmt 1 view .LVU2199 +7277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; + 7045 .loc 1 7277 14 is_stmt 0 view .LVU2200 + 7046 002a 0325 movs r5, #3 + 7047 002c AA43 bics r2, r5 + 7048 .LVL555: +7278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7049 .loc 1 7278 5 is_stmt 1 view .LVU2201 +7278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7050 .loc 1 7278 14 is_stmt 0 view .LVU2202 + 7051 002e 3243 orrs r2, r6 + 7052 .LVL556: + 7053 .L387: +7286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); + 7054 .loc 1 7286 3 is_stmt 1 view .LVU2203 +7286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); + ARM GAS /tmp/cchCqftX.s page 287 + + + 7055 .loc 1 7286 12 is_stmt 0 view .LVU2204 + 7056 0030 F025 movs r5, #240 + 7057 0032 AA43 bics r2, r5 + 7058 .LVL557: +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7059 .loc 1 7287 3 is_stmt 1 view .LVU2205 +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7060 .loc 1 7287 30 is_stmt 0 view .LVU2206 + 7061 0034 1D01 lsls r5, r3, #4 +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7062 .loc 1 7287 37 view .LVU2207 + 7063 0036 FF23 movs r3, #255 + 7064 .LVL558: +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7065 .loc 1 7287 37 view .LVU2208 + 7066 0038 2B40 ands r3, r5 +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7067 .loc 1 7287 12 view .LVU2209 + 7068 003a 1343 orrs r3, r2 + 7069 .LVL559: +7290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); + 7070 .loc 1 7290 3 is_stmt 1 view .LVU2210 +7290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); + 7071 .loc 1 7290 11 is_stmt 0 view .LVU2211 + 7072 003c 0A22 movs r2, #10 + 7073 003e 9443 bics r4, r2 + 7074 .LVL560: +7291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7075 .loc 1 7291 3 is_stmt 1 view .LVU2212 +7291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7076 .loc 1 7291 30 is_stmt 0 view .LVU2213 + 7077 0040 0A40 ands r2, r1 +7291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7078 .loc 1 7291 11 view .LVU2214 + 7079 0042 2243 orrs r2, r4 + 7080 .LVL561: +7294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 7081 .loc 1 7294 3 is_stmt 1 view .LVU2215 +7294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 7082 .loc 1 7294 15 is_stmt 0 view .LVU2216 + 7083 0044 8361 str r3, [r0, #24] +7295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7084 .loc 1 7295 3 is_stmt 1 view .LVU2217 +7295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7085 .loc 1 7295 14 is_stmt 0 view .LVU2218 + 7086 0046 0262 str r2, [r0, #32] +7296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7087 .loc 1 7296 1 view .LVU2219 + 7088 @ sp needed + 7089 .LVL562: +7296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7090 .loc 1 7296 1 view .LVU2220 + 7091 0048 70BD pop {r4, r5, r6, pc} + 7092 .L389: + 7093 004a C046 .align 2 + 7094 .L388: + 7095 004c 002C0140 .word 1073818624 + ARM GAS /tmp/cchCqftX.s page 288 + + + 7096 0050 00040040 .word 1073742848 + 7097 .cfi_endproc + 7098 .LFE150: + 7100 .section .text.HAL_TIM_IC_ConfigChannel,"ax",%progbits + 7101 .align 1 + 7102 .global HAL_TIM_IC_ConfigChannel + 7103 .syntax unified + 7104 .code 16 + 7105 .thumb_func + 7107 HAL_TIM_IC_ConfigChannel: + 7108 .LVL563: + 7109 .LFB100: +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7110 .loc 1 4121 1 is_stmt 1 view -0 + 7111 .cfi_startproc + 7112 @ args = 0, pretend = 0, frame = 0 + 7113 @ frame_needed = 0, uses_anonymous_args = 0 +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7114 .loc 1 4121 1 is_stmt 0 view .LVU2222 + 7115 0000 70B5 push {r4, r5, r6, lr} + 7116 .cfi_def_cfa_offset 16 + 7117 .cfi_offset 4, -16 + 7118 .cfi_offset 5, -12 + 7119 .cfi_offset 6, -8 + 7120 .cfi_offset 14, -4 + 7121 0002 0400 movs r4, r0 + 7122 0004 0D00 movs r5, r1 +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7123 .loc 1 4122 3 is_stmt 1 view .LVU2223 + 7124 .LVL564: +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); + 7125 .loc 1 4125 3 view .LVU2224 +4126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); + 7126 .loc 1 4126 3 view .LVU2225 +4127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); + 7127 .loc 1 4127 3 view .LVU2226 +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); + 7128 .loc 1 4128 3 view .LVU2227 +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7129 .loc 1 4129 3 view .LVU2228 +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7130 .loc 1 4132 3 view .LVU2229 +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7131 .loc 1 4132 3 view .LVU2230 + 7132 0006 3C23 movs r3, #60 + 7133 0008 C35C ldrb r3, [r0, r3] + 7134 000a 012B cmp r3, #1 + 7135 000c 59D0 beq .L396 +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7136 .loc 1 4132 3 discriminator 2 view .LVU2231 + 7137 000e 3C23 movs r3, #60 + 7138 0010 0121 movs r1, #1 + 7139 .LVL565: +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7140 .loc 1 4132 3 is_stmt 0 discriminator 2 view .LVU2232 + 7141 0012 C154 strb r1, [r0, r3] +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 289 + + + 7142 .loc 1 4132 3 is_stmt 1 discriminator 2 view .LVU2233 +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7143 .loc 1 4134 3 view .LVU2234 +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7144 .loc 1 4134 6 is_stmt 0 view .LVU2235 + 7145 0014 002A cmp r2, #0 + 7146 0016 0AD0 beq .L398 +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7147 .loc 1 4148 8 is_stmt 1 view .LVU2236 +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7148 .loc 1 4148 11 is_stmt 0 view .LVU2237 + 7149 0018 042A cmp r2, #4 + 7150 001a 1AD0 beq .L399 +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7151 .loc 1 4164 8 is_stmt 1 view .LVU2238 +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7152 .loc 1 4164 11 is_stmt 0 view .LVU2239 + 7153 001c 082A cmp r2, #8 + 7154 001e 2BD0 beq .L400 +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7155 .loc 1 4180 8 is_stmt 1 view .LVU2240 +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7156 .loc 1 4180 11 is_stmt 0 view .LVU2241 + 7157 0020 0C2A cmp r2, #12 + 7158 0022 3BD0 beq .L401 +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7159 .loc 1 4198 12 view .LVU2242 + 7160 0024 0120 movs r0, #1 + 7161 .LVL566: + 7162 .L393: +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7163 .loc 1 4201 3 is_stmt 1 view .LVU2243 +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7164 .loc 1 4201 3 view .LVU2244 + 7165 0026 3C23 movs r3, #60 + 7166 0028 0022 movs r2, #0 + 7167 002a E254 strb r2, [r4, r3] +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7168 .loc 1 4201 3 view .LVU2245 +4203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7169 .loc 1 4203 3 view .LVU2246 + 7170 .LVL567: + 7171 .L391: +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7172 .loc 1 4204 1 is_stmt 0 view .LVU2247 + 7173 @ sp needed + 7174 .LVL568: + 7175 .LVL569: +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7176 .loc 1 4204 1 view .LVU2248 + 7177 002c 70BD pop {r4, r5, r6, pc} + 7178 .LVL570: + 7179 .L398: +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7180 .loc 1 4137 5 is_stmt 1 view .LVU2249 +4138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + 7181 .loc 1 4138 30 is_stmt 0 view .LVU2250 + ARM GAS /tmp/cchCqftX.s page 290 + + + 7182 002e 2968 ldr r1, [r5] +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); + 7183 .loc 1 4139 30 view .LVU2251 + 7184 0030 6A68 ldr r2, [r5, #4] + 7185 .LVL571: +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7186 .loc 1 4140 30 view .LVU2252 + 7187 0032 EB68 ldr r3, [r5, #12] +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7188 .loc 1 4137 5 view .LVU2253 + 7189 0034 0068 ldr r0, [r0] + 7190 .LVL572: +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7191 .loc 1 4137 5 view .LVU2254 + 7192 0036 FFF7FEFF bl TIM_TI1_SetConfig + 7193 .LVL573: +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7194 .loc 1 4143 5 is_stmt 1 view .LVU2255 +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7195 .loc 1 4143 9 is_stmt 0 view .LVU2256 + 7196 003a 2268 ldr r2, [r4] +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7197 .loc 1 4143 19 view .LVU2257 + 7198 003c 9369 ldr r3, [r2, #24] +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7199 .loc 1 4143 27 view .LVU2258 + 7200 003e 0C21 movs r1, #12 + 7201 0040 8B43 bics r3, r1 + 7202 0042 9361 str r3, [r2, #24] +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7203 .loc 1 4146 5 is_stmt 1 view .LVU2259 +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7204 .loc 1 4146 9 is_stmt 0 view .LVU2260 + 7205 0044 2268 ldr r2, [r4] +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7206 .loc 1 4146 19 view .LVU2261 + 7207 0046 9369 ldr r3, [r2, #24] +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7208 .loc 1 4146 37 view .LVU2262 + 7209 0048 A968 ldr r1, [r5, #8] +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7210 .loc 1 4146 27 view .LVU2263 + 7211 004a 0B43 orrs r3, r1 + 7212 004c 9361 str r3, [r2, #24] +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7213 .loc 1 4122 21 view .LVU2264 + 7214 004e 0020 movs r0, #0 + 7215 0050 E9E7 b .L393 + 7216 .LVL574: + 7217 .L399: +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7218 .loc 1 4151 5 is_stmt 1 view .LVU2265 +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7219 .loc 1 4153 5 view .LVU2266 +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + 7220 .loc 1 4154 30 is_stmt 0 view .LVU2267 + 7221 0052 2968 ldr r1, [r5] + ARM GAS /tmp/cchCqftX.s page 291 + + +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); + 7222 .loc 1 4155 30 view .LVU2268 + 7223 0054 6A68 ldr r2, [r5, #4] + 7224 .LVL575: +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7225 .loc 1 4156 30 view .LVU2269 + 7226 0056 EB68 ldr r3, [r5, #12] +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7227 .loc 1 4153 5 view .LVU2270 + 7228 0058 0068 ldr r0, [r0] + 7229 .LVL576: +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7230 .loc 1 4153 5 view .LVU2271 + 7231 005a FFF7FEFF bl TIM_TI2_SetConfig + 7232 .LVL577: +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7233 .loc 1 4159 5 is_stmt 1 view .LVU2272 +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7234 .loc 1 4159 9 is_stmt 0 view .LVU2273 + 7235 005e 2268 ldr r2, [r4] +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7236 .loc 1 4159 19 view .LVU2274 + 7237 0060 9369 ldr r3, [r2, #24] +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7238 .loc 1 4159 27 view .LVU2275 + 7239 0062 1949 ldr r1, .L402 + 7240 0064 0B40 ands r3, r1 + 7241 0066 9361 str r3, [r2, #24] +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7242 .loc 1 4162 5 is_stmt 1 view .LVU2276 +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7243 .loc 1 4162 9 is_stmt 0 view .LVU2277 + 7244 0068 2168 ldr r1, [r4] +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7245 .loc 1 4162 19 view .LVU2278 + 7246 006a 8B69 ldr r3, [r1, #24] +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7247 .loc 1 4162 38 view .LVU2279 + 7248 006c AA68 ldr r2, [r5, #8] +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7249 .loc 1 4162 52 view .LVU2280 + 7250 006e 1202 lsls r2, r2, #8 +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7251 .loc 1 4162 27 view .LVU2281 + 7252 0070 1343 orrs r3, r2 + 7253 0072 8B61 str r3, [r1, #24] +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7254 .loc 1 4122 21 view .LVU2282 + 7255 0074 0020 movs r0, #0 + 7256 0076 D6E7 b .L393 + 7257 .LVL578: + 7258 .L400: +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7259 .loc 1 4167 5 is_stmt 1 view .LVU2283 +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7260 .loc 1 4169 5 view .LVU2284 +4170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + ARM GAS /tmp/cchCqftX.s page 292 + + + 7261 .loc 1 4170 30 is_stmt 0 view .LVU2285 + 7262 0078 2968 ldr r1, [r5] +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); + 7263 .loc 1 4171 30 view .LVU2286 + 7264 007a 6A68 ldr r2, [r5, #4] + 7265 .LVL579: +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7266 .loc 1 4172 30 view .LVU2287 + 7267 007c EB68 ldr r3, [r5, #12] +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7268 .loc 1 4169 5 view .LVU2288 + 7269 007e 0068 ldr r0, [r0] + 7270 .LVL580: +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7271 .loc 1 4169 5 view .LVU2289 + 7272 0080 FFF7FEFF bl TIM_TI3_SetConfig + 7273 .LVL581: +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7274 .loc 1 4175 5 is_stmt 1 view .LVU2290 +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7275 .loc 1 4175 9 is_stmt 0 view .LVU2291 + 7276 0084 2268 ldr r2, [r4] +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7277 .loc 1 4175 19 view .LVU2292 + 7278 0086 D369 ldr r3, [r2, #28] +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7279 .loc 1 4175 27 view .LVU2293 + 7280 0088 0C21 movs r1, #12 + 7281 008a 8B43 bics r3, r1 + 7282 008c D361 str r3, [r2, #28] +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7283 .loc 1 4178 5 is_stmt 1 view .LVU2294 +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7284 .loc 1 4178 9 is_stmt 0 view .LVU2295 + 7285 008e 2268 ldr r2, [r4] +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7286 .loc 1 4178 19 view .LVU2296 + 7287 0090 D369 ldr r3, [r2, #28] +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7288 .loc 1 4178 37 view .LVU2297 + 7289 0092 A968 ldr r1, [r5, #8] +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7290 .loc 1 4178 27 view .LVU2298 + 7291 0094 0B43 orrs r3, r1 + 7292 0096 D361 str r3, [r2, #28] +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7293 .loc 1 4122 21 view .LVU2299 + 7294 0098 0020 movs r0, #0 + 7295 009a C4E7 b .L393 + 7296 .LVL582: + 7297 .L401: +4183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7298 .loc 1 4183 5 is_stmt 1 view .LVU2300 +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7299 .loc 1 4185 5 view .LVU2301 +4186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + 7300 .loc 1 4186 30 is_stmt 0 view .LVU2302 + ARM GAS /tmp/cchCqftX.s page 293 + + + 7301 009c 2968 ldr r1, [r5] +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); + 7302 .loc 1 4187 30 view .LVU2303 + 7303 009e 6A68 ldr r2, [r5, #4] + 7304 .LVL583: +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7305 .loc 1 4188 30 view .LVU2304 + 7306 00a0 EB68 ldr r3, [r5, #12] +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7307 .loc 1 4185 5 view .LVU2305 + 7308 00a2 0068 ldr r0, [r0] + 7309 .LVL584: +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7310 .loc 1 4185 5 view .LVU2306 + 7311 00a4 FFF7FEFF bl TIM_TI4_SetConfig + 7312 .LVL585: +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7313 .loc 1 4191 5 is_stmt 1 view .LVU2307 +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7314 .loc 1 4191 9 is_stmt 0 view .LVU2308 + 7315 00a8 2268 ldr r2, [r4] +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7316 .loc 1 4191 19 view .LVU2309 + 7317 00aa D369 ldr r3, [r2, #28] +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7318 .loc 1 4191 27 view .LVU2310 + 7319 00ac 0649 ldr r1, .L402 + 7320 00ae 0B40 ands r3, r1 + 7321 00b0 D361 str r3, [r2, #28] +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7322 .loc 1 4194 5 is_stmt 1 view .LVU2311 +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7323 .loc 1 4194 9 is_stmt 0 view .LVU2312 + 7324 00b2 2168 ldr r1, [r4] +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7325 .loc 1 4194 19 view .LVU2313 + 7326 00b4 CB69 ldr r3, [r1, #28] +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7327 .loc 1 4194 38 view .LVU2314 + 7328 00b6 AA68 ldr r2, [r5, #8] +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7329 .loc 1 4194 52 view .LVU2315 + 7330 00b8 1202 lsls r2, r2, #8 +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7331 .loc 1 4194 27 view .LVU2316 + 7332 00ba 1343 orrs r3, r2 + 7333 00bc CB61 str r3, [r1, #28] +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7334 .loc 1 4122 21 view .LVU2317 + 7335 00be 0020 movs r0, #0 + 7336 00c0 B1E7 b .L393 + 7337 .LVL586: + 7338 .L396: +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7339 .loc 1 4132 3 discriminator 1 view .LVU2318 + 7340 00c2 0220 movs r0, #2 + 7341 .LVL587: + ARM GAS /tmp/cchCqftX.s page 294 + + +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7342 .loc 1 4132 3 discriminator 1 view .LVU2319 + 7343 00c4 B2E7 b .L391 + 7344 .L403: + 7345 00c6 C046 .align 2 + 7346 .L402: + 7347 00c8 FFF3FFFF .word -3073 + 7348 .cfi_endproc + 7349 .LFE100: + 7351 .section .text.HAL_TIM_OnePulse_ConfigChannel,"ax",%progbits + 7352 .align 1 + 7353 .global HAL_TIM_OnePulse_ConfigChannel + 7354 .syntax unified + 7355 .code 16 + 7356 .thumb_func + 7358 HAL_TIM_OnePulse_ConfigChannel: + 7359 .LVL588: + 7360 .LFB102: +4335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7361 .loc 1 4335 1 is_stmt 1 view -0 + 7362 .cfi_startproc + 7363 @ args = 0, pretend = 0, frame = 32 + 7364 @ frame_needed = 0, uses_anonymous_args = 0 +4335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7365 .loc 1 4335 1 is_stmt 0 view .LVU2321 + 7366 0000 70B5 push {r4, r5, r6, lr} + 7367 .cfi_def_cfa_offset 16 + 7368 .cfi_offset 4, -16 + 7369 .cfi_offset 5, -12 + 7370 .cfi_offset 6, -8 + 7371 .cfi_offset 14, -4 + 7372 0002 88B0 sub sp, sp, #32 + 7373 .cfi_def_cfa_offset 48 + 7374 0004 0400 movs r4, r0 + 7375 0006 0D00 movs r5, r1 + 7376 0008 1E00 movs r6, r3 +4336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC_InitTypeDef temp1; + 7377 .loc 1 4336 3 is_stmt 1 view .LVU2322 + 7378 .LVL589: +4337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7379 .loc 1 4337 3 view .LVU2323 +4340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); + 7380 .loc 1 4340 3 view .LVU2324 +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7381 .loc 1 4341 3 view .LVU2325 +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7382 .loc 1 4343 3 view .LVU2326 +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7383 .loc 1 4343 6 is_stmt 0 view .LVU2327 + 7384 000a 9A42 cmp r2, r3 + 7385 000c 00D1 bne .LCB6320 + 7386 000e 74E0 b .L412 @long jump + 7387 .LCB6320: +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7388 .loc 1 4346 5 is_stmt 1 view .LVU2328 +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7389 .loc 1 4346 5 view .LVU2329 + ARM GAS /tmp/cchCqftX.s page 295 + + + 7390 0010 3C23 movs r3, #60 + 7391 .LVL590: +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7392 .loc 1 4346 5 is_stmt 0 view .LVU2330 + 7393 0012 C35C ldrb r3, [r0, r3] + 7394 0014 012B cmp r3, #1 + 7395 0016 00D1 bne .LCB6327 + 7396 0018 71E0 b .L413 @long jump + 7397 .LCB6327: +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7398 .loc 1 4346 5 is_stmt 1 discriminator 2 view .LVU2331 + 7399 001a 3C23 movs r3, #60 + 7400 001c 0121 movs r1, #1 + 7401 .LVL591: +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7402 .loc 1 4346 5 is_stmt 0 discriminator 2 view .LVU2332 + 7403 001e C154 strb r1, [r0, r3] +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7404 .loc 1 4346 5 is_stmt 1 discriminator 2 view .LVU2333 +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7405 .loc 1 4348 5 view .LVU2334 +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7406 .loc 1 4348 17 is_stmt 0 view .LVU2335 + 7407 0020 0133 adds r3, r3, #1 + 7408 0022 0131 adds r1, r1, #1 + 7409 0024 C154 strb r1, [r0, r3] +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7410 .loc 1 4351 5 is_stmt 1 view .LVU2336 +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7411 .loc 1 4351 27 is_stmt 0 view .LVU2337 + 7412 0026 2B68 ldr r3, [r5] +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7413 .loc 1 4351 18 view .LVU2338 + 7414 0028 0193 str r3, [sp, #4] +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7415 .loc 1 4352 5 is_stmt 1 view .LVU2339 +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7416 .loc 1 4352 26 is_stmt 0 view .LVU2340 + 7417 002a 6B68 ldr r3, [r5, #4] +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7418 .loc 1 4352 17 view .LVU2341 + 7419 002c 0293 str r3, [sp, #8] +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7420 .loc 1 4353 5 is_stmt 1 view .LVU2342 +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7421 .loc 1 4353 31 is_stmt 0 view .LVU2343 + 7422 002e AB68 ldr r3, [r5, #8] +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7423 .loc 1 4353 22 view .LVU2344 + 7424 0030 0393 str r3, [sp, #12] +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + 7425 .loc 1 4354 5 is_stmt 1 view .LVU2345 +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + 7426 .loc 1 4354 32 is_stmt 0 view .LVU2346 + 7427 0032 EB68 ldr r3, [r5, #12] +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + 7428 .loc 1 4354 23 view .LVU2347 + ARM GAS /tmp/cchCqftX.s page 296 + + + 7429 0034 0493 str r3, [sp, #16] +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + 7430 .loc 1 4355 5 is_stmt 1 view .LVU2348 +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + 7431 .loc 1 4355 32 is_stmt 0 view .LVU2349 + 7432 0036 2B69 ldr r3, [r5, #16] +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + 7433 .loc 1 4355 23 view .LVU2350 + 7434 0038 0693 str r3, [sp, #24] +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7435 .loc 1 4356 5 is_stmt 1 view .LVU2351 +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7436 .loc 1 4356 33 is_stmt 0 view .LVU2352 + 7437 003a 6B69 ldr r3, [r5, #20] +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7438 .loc 1 4356 24 view .LVU2353 + 7439 003c 0793 str r3, [sp, #28] +4358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7440 .loc 1 4358 5 is_stmt 1 view .LVU2354 + 7441 003e 002A cmp r2, #0 + 7442 0040 0AD0 beq .L406 + 7443 0042 042A cmp r2, #4 + 7444 0044 12D0 beq .L407 + 7445 0046 0120 movs r0, #1 + 7446 .LVL592: + 7447 .L408: +4431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7448 .loc 1 4431 5 view .LVU2355 +4431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7449 .loc 1 4431 17 is_stmt 0 view .LVU2356 + 7450 0048 3D23 movs r3, #61 + 7451 004a 0122 movs r2, #1 + 7452 004c E254 strb r2, [r4, r3] +4433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7453 .loc 1 4433 5 is_stmt 1 view .LVU2357 +4433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7454 .loc 1 4433 5 view .LVU2358 + 7455 004e 013B subs r3, r3, #1 + 7456 0050 0022 movs r2, #0 + 7457 0052 E254 strb r2, [r4, r3] +4433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7458 .loc 1 4433 5 view .LVU2359 +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7459 .loc 1 4435 5 view .LVU2360 + 7460 .LVL593: + 7461 .L405: +4441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7462 .loc 1 4441 1 is_stmt 0 view .LVU2361 + 7463 0054 08B0 add sp, sp, #32 + 7464 @ sp needed + 7465 .LVL594: + 7466 .LVL595: + 7467 .LVL596: +4441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7468 .loc 1 4441 1 view .LVU2362 + 7469 0056 70BD pop {r4, r5, r6, pc} + 7470 .LVL597: + ARM GAS /tmp/cchCqftX.s page 297 + + + 7471 .L406: +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7472 .loc 1 4362 9 is_stmt 1 view .LVU2363 +4364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7473 .loc 1 4364 9 view .LVU2364 + 7474 0058 0068 ldr r0, [r0] + 7475 .LVL598: +4364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7476 .loc 1 4364 9 is_stmt 0 view .LVU2365 + 7477 005a 01A9 add r1, sp, #4 + 7478 005c FFF7FEFF bl TIM_OC1_SetConfig + 7479 .LVL599: +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7480 .loc 1 4365 9 is_stmt 1 view .LVU2366 +4381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7481 .loc 1 4381 5 view .LVU2367 + 7482 .L409: +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7483 .loc 1 4383 7 view .LVU2368 + 7484 0060 002E cmp r6, #0 + 7485 0062 08D0 beq .L410 + 7486 0064 042E cmp r6, #4 + 7487 0066 27D0 beq .L411 + 7488 0068 0120 movs r0, #1 + 7489 006a EDE7 b .L408 + 7490 .LVL600: + 7491 .L407: +4370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7492 .loc 1 4370 9 view .LVU2369 +4372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7493 .loc 1 4372 9 view .LVU2370 + 7494 006c 0068 ldr r0, [r0] + 7495 .LVL601: +4372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7496 .loc 1 4372 9 is_stmt 0 view .LVU2371 + 7497 006e 01A9 add r1, sp, #4 + 7498 0070 FFF7FEFF bl TIM_OC2_SetConfig + 7499 .LVL602: +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7500 .loc 1 4373 9 is_stmt 1 view .LVU2372 +4381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7501 .loc 1 4381 5 view .LVU2373 + 7502 0074 F4E7 b .L409 + 7503 .L410: +4387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7504 .loc 1 4387 11 view .LVU2374 +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); + 7505 .loc 1 4389 11 view .LVU2375 + 7506 0076 2B6A ldr r3, [r5, #32] + 7507 0078 EA69 ldr r2, [r5, #28] + 7508 007a A969 ldr r1, [r5, #24] + 7509 007c 2068 ldr r0, [r4] + 7510 007e FFF7FEFF bl TIM_TI1_SetConfig + 7511 .LVL603: +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7512 .loc 1 4393 11 view .LVU2376 +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 298 + + + 7513 .loc 1 4393 15 is_stmt 0 view .LVU2377 + 7514 0082 2268 ldr r2, [r4] +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7515 .loc 1 4393 25 view .LVU2378 + 7516 0084 9369 ldr r3, [r2, #24] +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7517 .loc 1 4393 33 view .LVU2379 + 7518 0086 0C21 movs r1, #12 + 7519 0088 8B43 bics r3, r1 + 7520 008a 9361 str r3, [r2, #24] +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7521 .loc 1 4396 11 is_stmt 1 view .LVU2380 +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7522 .loc 1 4396 15 is_stmt 0 view .LVU2381 + 7523 008c 2268 ldr r2, [r4] +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7524 .loc 1 4396 25 view .LVU2382 + 7525 008e 9368 ldr r3, [r2, #8] +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7526 .loc 1 4396 32 view .LVU2383 + 7527 0090 6431 adds r1, r1, #100 + 7528 0092 8B43 bics r3, r1 + 7529 0094 9360 str r3, [r2, #8] +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7530 .loc 1 4397 11 is_stmt 1 view .LVU2384 +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7531 .loc 1 4397 15 is_stmt 0 view .LVU2385 + 7532 0096 2268 ldr r2, [r4] +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7533 .loc 1 4397 25 view .LVU2386 + 7534 0098 9368 ldr r3, [r2, #8] +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7535 .loc 1 4397 32 view .LVU2387 + 7536 009a 2039 subs r1, r1, #32 + 7537 009c 0B43 orrs r3, r1 + 7538 009e 9360 str r3, [r2, #8] +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7539 .loc 1 4400 11 is_stmt 1 view .LVU2388 +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7540 .loc 1 4400 15 is_stmt 0 view .LVU2389 + 7541 00a0 2268 ldr r2, [r4] +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7542 .loc 1 4400 25 view .LVU2390 + 7543 00a2 9368 ldr r3, [r2, #8] +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7544 .loc 1 4400 32 view .LVU2391 + 7545 00a4 4939 subs r1, r1, #73 + 7546 00a6 8B43 bics r3, r1 + 7547 00a8 9360 str r3, [r2, #8] +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7548 .loc 1 4401 11 is_stmt 1 view .LVU2392 +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7549 .loc 1 4401 15 is_stmt 0 view .LVU2393 + 7550 00aa 2268 ldr r2, [r4] +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7551 .loc 1 4401 25 view .LVU2394 + 7552 00ac 9368 ldr r3, [r2, #8] + ARM GAS /tmp/cchCqftX.s page 299 + + +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7553 .loc 1 4401 32 view .LVU2395 + 7554 00ae 0139 subs r1, r1, #1 + 7555 00b0 0B43 orrs r3, r1 + 7556 00b2 9360 str r3, [r2, #8] +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7557 .loc 1 4402 11 is_stmt 1 view .LVU2396 + 7558 00b4 0020 movs r0, #0 + 7559 00b6 C7E7 b .L408 + 7560 .L411: +4407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7561 .loc 1 4407 11 view .LVU2397 +4409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); + 7562 .loc 1 4409 11 view .LVU2398 + 7563 00b8 2B6A ldr r3, [r5, #32] + 7564 00ba EA69 ldr r2, [r5, #28] + 7565 00bc A969 ldr r1, [r5, #24] + 7566 00be 2068 ldr r0, [r4] + 7567 00c0 FFF7FEFF bl TIM_TI2_SetConfig + 7568 .LVL604: +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7569 .loc 1 4413 11 view .LVU2399 +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7570 .loc 1 4413 15 is_stmt 0 view .LVU2400 + 7571 00c4 2268 ldr r2, [r4] +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7572 .loc 1 4413 25 view .LVU2401 + 7573 00c6 9369 ldr r3, [r2, #24] +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7574 .loc 1 4413 33 view .LVU2402 + 7575 00c8 0E49 ldr r1, .L414 + 7576 00ca 0B40 ands r3, r1 + 7577 00cc 9361 str r3, [r2, #24] +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7578 .loc 1 4416 11 is_stmt 1 view .LVU2403 +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7579 .loc 1 4416 15 is_stmt 0 view .LVU2404 + 7580 00ce 2268 ldr r2, [r4] +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7581 .loc 1 4416 25 view .LVU2405 + 7582 00d0 9368 ldr r3, [r2, #8] +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7583 .loc 1 4416 32 view .LVU2406 + 7584 00d2 7021 movs r1, #112 + 7585 00d4 8B43 bics r3, r1 + 7586 00d6 9360 str r3, [r2, #8] +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7587 .loc 1 4417 11 is_stmt 1 view .LVU2407 +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7588 .loc 1 4417 15 is_stmt 0 view .LVU2408 + 7589 00d8 2268 ldr r2, [r4] +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7590 .loc 1 4417 25 view .LVU2409 + 7591 00da 9368 ldr r3, [r2, #8] +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7592 .loc 1 4417 32 view .LVU2410 + 7593 00dc 1039 subs r1, r1, #16 + ARM GAS /tmp/cchCqftX.s page 300 + + + 7594 00de 0B43 orrs r3, r1 + 7595 00e0 9360 str r3, [r2, #8] +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7596 .loc 1 4420 11 is_stmt 1 view .LVU2411 +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7597 .loc 1 4420 15 is_stmt 0 view .LVU2412 + 7598 00e2 2268 ldr r2, [r4] +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7599 .loc 1 4420 25 view .LVU2413 + 7600 00e4 9368 ldr r3, [r2, #8] +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7601 .loc 1 4420 32 view .LVU2414 + 7602 00e6 5939 subs r1, r1, #89 + 7603 00e8 8B43 bics r3, r1 + 7604 00ea 9360 str r3, [r2, #8] +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7605 .loc 1 4421 11 is_stmt 1 view .LVU2415 +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7606 .loc 1 4421 15 is_stmt 0 view .LVU2416 + 7607 00ec 2268 ldr r2, [r4] +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7608 .loc 1 4421 25 view .LVU2417 + 7609 00ee 9368 ldr r3, [r2, #8] +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7610 .loc 1 4421 32 view .LVU2418 + 7611 00f0 0139 subs r1, r1, #1 + 7612 00f2 0B43 orrs r3, r1 + 7613 00f4 9360 str r3, [r2, #8] +4422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7614 .loc 1 4422 11 is_stmt 1 view .LVU2419 + 7615 00f6 0020 movs r0, #0 + 7616 00f8 A6E7 b .L408 + 7617 .LVL605: + 7618 .L412: +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7619 .loc 1 4439 12 is_stmt 0 view .LVU2420 + 7620 00fa 0120 movs r0, #1 + 7621 .LVL606: +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7622 .loc 1 4439 12 view .LVU2421 + 7623 00fc AAE7 b .L405 + 7624 .LVL607: + 7625 .L413: +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7626 .loc 1 4346 5 discriminator 1 view .LVU2422 + 7627 00fe 0220 movs r0, #2 + 7628 .LVL608: +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7629 .loc 1 4346 5 discriminator 1 view .LVU2423 + 7630 0100 A8E7 b .L405 + 7631 .L415: + 7632 0102 C046 .align 2 + 7633 .L414: + 7634 0104 FFF3FFFF .word -3073 + 7635 .cfi_endproc + 7636 .LFE102: + 7638 .section .text.TIM_ETR_SetConfig,"ax",%progbits + ARM GAS /tmp/cchCqftX.s page 301 + + + 7639 .align 1 + 7640 .global TIM_ETR_SetConfig + 7641 .syntax unified + 7642 .code 16 + 7643 .thumb_func + 7645 TIM_ETR_SetConfig: + 7646 .LVL609: + 7647 .LFB157: +7540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the TIMx External Trigger (ETR). +7542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ExtTRGPrescaler The external Trigger Prescaler. +7544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV1: ETRP Prescaler OFF. +7546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV2: ETRP frequency divided by 2. +7547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV4: ETRP frequency divided by 4. +7548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV8: ETRP frequency divided by 8. +7549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ExtTRGPolarity The external Trigger Polarity. +7550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPOLARITY_INVERTED: active low or falling edge active. +7552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPOLARITY_NONINVERTED: active high or rising edge active. +7553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param ExtTRGFilter External Trigger Filter. +7554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F +7555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, +7558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) +7559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7648 .loc 1 7559 1 is_stmt 1 view -0 + 7649 .cfi_startproc + 7650 @ args = 0, pretend = 0, frame = 0 + 7651 @ frame_needed = 0, uses_anonymous_args = 0 + 7652 .loc 1 7559 1 is_stmt 0 view .LVU2425 + 7653 0000 30B5 push {r4, r5, lr} + 7654 .cfi_def_cfa_offset 12 + 7655 .cfi_offset 4, -12 + 7656 .cfi_offset 5, -8 + 7657 .cfi_offset 14, -4 +7560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 7658 .loc 1 7560 3 is_stmt 1 view .LVU2426 +7561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = TIMx->SMCR; + 7659 .loc 1 7562 3 view .LVU2427 + 7660 .loc 1 7562 11 is_stmt 0 view .LVU2428 + 7661 0002 8468 ldr r4, [r0, #8] + 7662 .LVL610: +7563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the ETR Bits */ +7565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 7663 .loc 1 7565 3 is_stmt 1 view .LVU2429 + 7664 .loc 1 7565 11 is_stmt 0 view .LVU2430 + 7665 0004 034D ldr r5, .L417 + 7666 0006 2C40 ands r4, r5 + 7667 .LVL611: +7566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Prescaler, the Filter value and the Polarity */ +7568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); + ARM GAS /tmp/cchCqftX.s page 302 + + + 7668 .loc 1 7568 3 is_stmt 1 view .LVU2431 + 7669 .loc 1 7568 83 is_stmt 0 view .LVU2432 + 7670 0008 1B02 lsls r3, r3, #8 + 7671 .LVL612: + 7672 .loc 1 7568 67 view .LVU2433 + 7673 000a 1343 orrs r3, r2 + 7674 .loc 1 7568 45 view .LVU2434 + 7675 000c 0B43 orrs r3, r1 + 7676 .loc 1 7568 11 view .LVU2435 + 7677 000e 2343 orrs r3, r4 + 7678 .LVL613: +7569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +7571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->SMCR = tmpsmcr; + 7679 .loc 1 7571 3 is_stmt 1 view .LVU2436 + 7680 .loc 1 7571 14 is_stmt 0 view .LVU2437 + 7681 0010 8360 str r3, [r0, #8] +7572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7682 .loc 1 7572 1 view .LVU2438 + 7683 @ sp needed + 7684 0012 30BD pop {r4, r5, pc} + 7685 .L418: + 7686 .align 2 + 7687 .L417: + 7688 0014 FF00FFFF .word -65281 + 7689 .cfi_endproc + 7690 .LFE157: + 7692 .section .text.HAL_TIM_ConfigOCrefClear,"ax",%progbits + 7693 .align 1 + 7694 .global HAL_TIM_ConfigOCrefClear + 7695 .syntax unified + 7696 .code 16 + 7697 .thumb_func + 7699 HAL_TIM_ConfigOCrefClear: + 7700 .LVL614: + 7701 .LFB110: +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7702 .loc 1 5177 1 is_stmt 1 view -0 + 7703 .cfi_startproc + 7704 @ args = 0, pretend = 0, frame = 0 + 7705 @ frame_needed = 0, uses_anonymous_args = 0 +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7706 .loc 1 5177 1 is_stmt 0 view .LVU2440 + 7707 0000 70B5 push {r4, r5, r6, lr} + 7708 .cfi_def_cfa_offset 16 + 7709 .cfi_offset 4, -16 + 7710 .cfi_offset 5, -12 + 7711 .cfi_offset 6, -8 + 7712 .cfi_offset 14, -4 + 7713 0002 0400 movs r4, r0 + 7714 0004 0D00 movs r5, r1 + 7715 0006 1600 movs r6, r2 +5178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7716 .loc 1 5178 3 is_stmt 1 view .LVU2441 + 7717 .LVL615: +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); + 7718 .loc 1 5181 3 view .LVU2442 + ARM GAS /tmp/cchCqftX.s page 303 + + +5182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7719 .loc 1 5182 3 view .LVU2443 +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7720 .loc 1 5185 3 view .LVU2444 +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7721 .loc 1 5185 3 view .LVU2445 + 7722 0008 3C23 movs r3, #60 + 7723 000a C35C ldrb r3, [r0, r3] + 7724 000c 012B cmp r3, #1 + 7725 000e 00D1 bne .LCB6627 + 7726 0010 88E0 b .L435 @long jump + 7727 .LCB6627: +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7728 .loc 1 5185 3 discriminator 2 view .LVU2446 + 7729 0012 3C23 movs r3, #60 + 7730 0014 0122 movs r2, #1 + 7731 .LVL616: +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7732 .loc 1 5185 3 is_stmt 0 discriminator 2 view .LVU2447 + 7733 0016 C254 strb r2, [r0, r3] +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7734 .loc 1 5185 3 is_stmt 1 discriminator 2 view .LVU2448 +5187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7735 .loc 1 5187 3 view .LVU2449 +5187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7736 .loc 1 5187 15 is_stmt 0 view .LVU2450 + 7737 0018 0133 adds r3, r3, #1 + 7738 001a 0132 adds r2, r2, #1 + 7739 001c C254 strb r2, [r0, r3] +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7740 .loc 1 5189 3 is_stmt 1 view .LVU2451 +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7741 .loc 1 5189 28 is_stmt 0 view .LVU2452 + 7742 001e 4B68 ldr r3, [r1, #4] +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7743 .loc 1 5189 3 view .LVU2453 + 7744 0020 012B cmp r3, #1 + 7745 0022 20D0 beq .L421 + 7746 0024 022B cmp r3, #2 + 7747 0026 18D0 beq .L422 + 7748 0028 002B cmp r3, #0 + 7749 002a 73D1 bne .L436 +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7750 .loc 1 5194 7 is_stmt 1 view .LVU2454 + 7751 002c 0268 ldr r2, [r0] + 7752 002e 9368 ldr r3, [r2, #8] + 7753 0030 3D49 ldr r1, .L439 + 7754 .LVL617: +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7755 .loc 1 5194 7 is_stmt 0 view .LVU2455 + 7756 0032 0B40 ands r3, r1 + 7757 0034 9360 str r3, [r2, #8] +5195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7758 .loc 1 5195 7 is_stmt 1 view .LVU2456 +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7759 .loc 1 5234 3 view .LVU2457 + 7760 .LVL618: + ARM GAS /tmp/cchCqftX.s page 304 + + + 7761 .L424: +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7762 .loc 1 5236 5 view .LVU2458 + 7763 0036 082E cmp r6, #8 + 7764 0038 54D0 beq .L426 + 7765 003a 2CD8 bhi .L427 + 7766 003c 002E cmp r6, #0 + 7767 003e 39D0 beq .L428 + 7768 0040 042E cmp r6, #4 + 7769 0042 26D1 bne .L437 +5254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7770 .loc 1 5254 9 view .LVU2459 +5254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7771 .loc 1 5254 30 is_stmt 0 view .LVU2460 + 7772 0044 2B68 ldr r3, [r5] +5254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7773 .loc 1 5254 12 view .LVU2461 + 7774 0046 002B cmp r3, #0 + 7775 0048 45D0 beq .L432 +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7776 .loc 1 5257 11 is_stmt 1 view .LVU2462 + 7777 004a 2268 ldr r2, [r4] + 7778 004c 9169 ldr r1, [r2, #24] + 7779 004e 8023 movs r3, #128 + 7780 0050 1B02 lsls r3, r3, #8 + 7781 0052 0B43 orrs r3, r1 + 7782 0054 9361 str r3, [r2, #24] + 7783 0056 0020 movs r0, #0 + 7784 0058 5DE0 b .L423 + 7785 .LVL619: + 7786 .L422: +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7787 .loc 1 5200 7 view .LVU2463 + 7788 005a 0268 ldr r2, [r0] + 7789 005c 9368 ldr r3, [r2, #8] + 7790 005e 0821 movs r1, #8 + 7791 .LVL620: +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7792 .loc 1 5200 7 is_stmt 0 view .LVU2464 + 7793 0060 8B43 bics r3, r1 + 7794 0062 9360 str r3, [r2, #8] +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7795 .loc 1 5201 7 is_stmt 1 view .LVU2465 +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7796 .loc 1 5234 3 view .LVU2466 + 7797 0064 E7E7 b .L424 + 7798 .LVL621: + 7799 .L421: +5207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); + 7800 .loc 1 5207 7 view .LVU2467 +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); + 7801 .loc 1 5208 7 view .LVU2468 +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7802 .loc 1 5209 7 view .LVU2469 +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7803 .loc 1 5212 7 view .LVU2470 +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 305 + + + 7804 .loc 1 5212 28 is_stmt 0 view .LVU2471 + 7805 0066 C968 ldr r1, [r1, #12] + 7806 .LVL622: +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7807 .loc 1 5212 10 view .LVU2472 + 7808 0068 0029 cmp r1, #0 + 7809 006a 07D0 beq .L425 +5214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 7810 .loc 1 5214 9 is_stmt 1 view .LVU2473 +5214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 7811 .loc 1 5214 21 is_stmt 0 view .LVU2474 + 7812 006c 3D23 movs r3, #61 + 7813 006e 0122 movs r2, #1 + 7814 0070 C254 strb r2, [r0, r3] +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 7815 .loc 1 5215 9 is_stmt 1 view .LVU2475 +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 7816 .loc 1 5215 9 view .LVU2476 + 7817 0072 013B subs r3, r3, #1 + 7818 0074 0022 movs r2, #0 + 7819 0076 C254 strb r2, [r0, r3] +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 7820 .loc 1 5215 9 view .LVU2477 +5216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7821 .loc 1 5216 9 view .LVU2478 +5216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7822 .loc 1 5216 16 is_stmt 0 view .LVU2479 + 7823 0078 0120 movs r0, #1 + 7824 .LVL623: +5216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7825 .loc 1 5216 16 view .LVU2480 + 7826 007a 52E0 b .L420 + 7827 .LVL624: + 7828 .L425: +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7829 .loc 1 5219 7 is_stmt 1 view .LVU2481 +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputFilter); + 7830 .loc 1 5221 42 is_stmt 0 view .LVU2482 + 7831 007c AA68 ldr r2, [r5, #8] +5222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7832 .loc 1 5222 42 view .LVU2483 + 7833 007e 2B69 ldr r3, [r5, #16] +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7834 .loc 1 5219 7 view .LVU2484 + 7835 0080 0068 ldr r0, [r0] + 7836 .LVL625: +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7837 .loc 1 5219 7 view .LVU2485 + 7838 0082 FFF7FEFF bl TIM_ETR_SetConfig + 7839 .LVL626: +5225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7840 .loc 1 5225 7 is_stmt 1 view .LVU2486 + 7841 0086 2268 ldr r2, [r4] + 7842 0088 9368 ldr r3, [r2, #8] + 7843 008a 0821 movs r1, #8 + 7844 008c 0B43 orrs r3, r1 + 7845 008e 9360 str r3, [r2, #8] + ARM GAS /tmp/cchCqftX.s page 306 + + +5226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7846 .loc 1 5226 7 view .LVU2487 +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7847 .loc 1 5234 3 view .LVU2488 + 7848 0090 D1E7 b .L424 + 7849 .L437: +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7850 .loc 1 5236 5 is_stmt 0 view .LVU2489 + 7851 0092 0020 movs r0, #0 + 7852 0094 3FE0 b .L423 + 7853 .L427: + 7854 0096 0C2E cmp r6, #12 + 7855 0098 0AD1 bne .L438 +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7856 .loc 1 5282 9 is_stmt 1 view .LVU2490 +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7857 .loc 1 5282 30 is_stmt 0 view .LVU2491 + 7858 009a 2B68 ldr r3, [r5] +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7859 .loc 1 5282 12 view .LVU2492 + 7860 009c 002B cmp r3, #0 + 7861 009e 32D0 beq .L434 +5285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7862 .loc 1 5285 11 is_stmt 1 view .LVU2493 + 7863 00a0 2268 ldr r2, [r4] + 7864 00a2 D169 ldr r1, [r2, #28] + 7865 00a4 8023 movs r3, #128 + 7866 00a6 1B02 lsls r3, r3, #8 + 7867 00a8 0B43 orrs r3, r1 + 7868 00aa D361 str r3, [r2, #28] + 7869 00ac 0020 movs r0, #0 + 7870 00ae 32E0 b .L423 + 7871 .L438: +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7872 .loc 1 5236 5 is_stmt 0 view .LVU2494 + 7873 00b0 0020 movs r0, #0 + 7874 00b2 30E0 b .L423 + 7875 .L428: +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7876 .loc 1 5240 9 is_stmt 1 view .LVU2495 +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7877 .loc 1 5240 30 is_stmt 0 view .LVU2496 + 7878 00b4 2B68 ldr r3, [r5] +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7879 .loc 1 5240 12 view .LVU2497 + 7880 00b6 002B cmp r3, #0 + 7881 00b8 06D0 beq .L431 +5243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7882 .loc 1 5243 11 is_stmt 1 view .LVU2498 + 7883 00ba 2268 ldr r2, [r4] + 7884 00bc 9369 ldr r3, [r2, #24] + 7885 00be 8021 movs r1, #128 + 7886 00c0 0B43 orrs r3, r1 + 7887 00c2 9361 str r3, [r2, #24] + 7888 00c4 0020 movs r0, #0 + 7889 00c6 26E0 b .L423 + 7890 .L431: + ARM GAS /tmp/cchCqftX.s page 307 + + +5248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7891 .loc 1 5248 11 view .LVU2499 + 7892 00c8 2268 ldr r2, [r4] + 7893 00ca 9369 ldr r3, [r2, #24] + 7894 00cc 8021 movs r1, #128 + 7895 00ce 8B43 bics r3, r1 + 7896 00d0 9361 str r3, [r2, #24] + 7897 00d2 0020 movs r0, #0 + 7898 00d4 1FE0 b .L423 + 7899 .L432: +5262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7900 .loc 1 5262 11 view .LVU2500 + 7901 00d6 2268 ldr r2, [r4] + 7902 00d8 9369 ldr r3, [r2, #24] + 7903 00da 1449 ldr r1, .L439+4 + 7904 00dc 0B40 ands r3, r1 + 7905 00de 9361 str r3, [r2, #24] + 7906 00e0 0020 movs r0, #0 + 7907 00e2 18E0 b .L423 + 7908 .L426: +5268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7909 .loc 1 5268 9 view .LVU2501 +5268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7910 .loc 1 5268 30 is_stmt 0 view .LVU2502 + 7911 00e4 2B68 ldr r3, [r5] +5268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7912 .loc 1 5268 12 view .LVU2503 + 7913 00e6 002B cmp r3, #0 + 7914 00e8 06D0 beq .L433 +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7915 .loc 1 5271 11 is_stmt 1 view .LVU2504 + 7916 00ea 2268 ldr r2, [r4] + 7917 00ec D369 ldr r3, [r2, #28] + 7918 00ee 8021 movs r1, #128 + 7919 00f0 0B43 orrs r3, r1 + 7920 00f2 D361 str r3, [r2, #28] + 7921 00f4 0020 movs r0, #0 + 7922 00f6 0EE0 b .L423 + 7923 .L433: +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7924 .loc 1 5276 11 view .LVU2505 + 7925 00f8 2268 ldr r2, [r4] + 7926 00fa D369 ldr r3, [r2, #28] + 7927 00fc 8021 movs r1, #128 + 7928 00fe 8B43 bics r3, r1 + 7929 0100 D361 str r3, [r2, #28] + 7930 0102 0020 movs r0, #0 + 7931 0104 07E0 b .L423 + 7932 .L434: +5290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7933 .loc 1 5290 11 view .LVU2506 + 7934 0106 2268 ldr r2, [r4] + 7935 0108 D369 ldr r3, [r2, #28] + 7936 010a 0849 ldr r1, .L439+4 + 7937 010c 0B40 ands r3, r1 + 7938 010e D361 str r3, [r2, #28] + 7939 0110 0020 movs r0, #0 + ARM GAS /tmp/cchCqftX.s page 308 + + + 7940 0112 00E0 b .L423 + 7941 .LVL627: + 7942 .L436: +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7943 .loc 1 5189 3 is_stmt 0 view .LVU2507 + 7944 0114 0120 movs r0, #1 + 7945 .LVL628: + 7946 .L423: +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7947 .loc 1 5299 3 is_stmt 1 view .LVU2508 +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7948 .loc 1 5299 15 is_stmt 0 view .LVU2509 + 7949 0116 3D23 movs r3, #61 + 7950 0118 0122 movs r2, #1 + 7951 011a E254 strb r2, [r4, r3] +5301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7952 .loc 1 5301 3 is_stmt 1 view .LVU2510 +5301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7953 .loc 1 5301 3 view .LVU2511 + 7954 011c 013B subs r3, r3, #1 + 7955 011e 0022 movs r2, #0 + 7956 0120 E254 strb r2, [r4, r3] +5301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7957 .loc 1 5301 3 view .LVU2512 +5303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7958 .loc 1 5303 3 view .LVU2513 + 7959 .L420: +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7960 .loc 1 5304 1 is_stmt 0 view .LVU2514 + 7961 @ sp needed + 7962 .LVL629: + 7963 .LVL630: + 7964 .LVL631: +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7965 .loc 1 5304 1 view .LVU2515 + 7966 0122 70BD pop {r4, r5, r6, pc} + 7967 .LVL632: + 7968 .L435: +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7969 .loc 1 5185 3 discriminator 1 view .LVU2516 + 7970 0124 0220 movs r0, #2 + 7971 .LVL633: +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7972 .loc 1 5185 3 discriminator 1 view .LVU2517 + 7973 0126 FCE7 b .L420 + 7974 .L440: + 7975 .align 2 + 7976 .L439: + 7977 0128 F700FFFF .word -65289 + 7978 012c FF7FFFFF .word -32769 + 7979 .cfi_endproc + 7980 .LFE110: + 7982 .section .text.HAL_TIM_ConfigClockSource,"ax",%progbits + 7983 .align 1 + 7984 .global HAL_TIM_ConfigClockSource + 7985 .syntax unified + 7986 .code 16 + ARM GAS /tmp/cchCqftX.s page 309 + + + 7987 .thumb_func + 7989 HAL_TIM_ConfigClockSource: + 7990 .LVL634: + 7991 .LFB111: +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7992 .loc 1 5314 1 is_stmt 1 view -0 + 7993 .cfi_startproc + 7994 @ args = 0, pretend = 0, frame = 0 + 7995 @ frame_needed = 0, uses_anonymous_args = 0 +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7996 .loc 1 5314 1 is_stmt 0 view .LVU2519 + 7997 0000 10B5 push {r4, lr} + 7998 .cfi_def_cfa_offset 8 + 7999 .cfi_offset 4, -8 + 8000 .cfi_offset 14, -4 + 8001 0002 0400 movs r4, r0 + 8002 0004 0B00 movs r3, r1 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8003 .loc 1 5315 3 is_stmt 1 view .LVU2520 + 8004 .LVL635: +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8005 .loc 1 5316 3 view .LVU2521 +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8006 .loc 1 5319 3 view .LVU2522 +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8007 .loc 1 5319 3 view .LVU2523 + 8008 0006 3C22 movs r2, #60 + 8009 0008 825C ldrb r2, [r0, r2] + 8010 000a 012A cmp r2, #1 + 8011 000c 00D1 bne .LCB6932 + 8012 000e 77E0 b .L452 @long jump + 8013 .LCB6932: +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8014 .loc 1 5319 3 discriminator 2 view .LVU2524 + 8015 0010 3C22 movs r2, #60 + 8016 0012 0121 movs r1, #1 + 8017 .LVL636: +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8018 .loc 1 5319 3 is_stmt 0 discriminator 2 view .LVU2525 + 8019 0014 8154 strb r1, [r0, r2] +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8020 .loc 1 5319 3 is_stmt 1 discriminator 2 view .LVU2526 +5321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8021 .loc 1 5321 3 view .LVU2527 +5321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8022 .loc 1 5321 15 is_stmt 0 view .LVU2528 + 8023 0016 0132 adds r2, r2, #1 + 8024 0018 0131 adds r1, r1, #1 + 8025 001a 8154 strb r1, [r0, r2] +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8026 .loc 1 5324 3 is_stmt 1 view .LVU2529 +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 8027 .loc 1 5327 3 view .LVU2530 +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 8028 .loc 1 5327 17 is_stmt 0 view .LVU2531 + 8029 001c 0168 ldr r1, [r0] +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + ARM GAS /tmp/cchCqftX.s page 310 + + + 8030 .loc 1 5327 11 view .LVU2532 + 8031 001e 8A68 ldr r2, [r1, #8] + 8032 .LVL637: +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 8033 .loc 1 5328 3 is_stmt 1 view .LVU2533 +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + 8034 .loc 1 5329 3 view .LVU2534 +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + 8035 .loc 1 5329 11 is_stmt 0 view .LVU2535 + 8036 0020 3848 ldr r0, .L457 + 8037 .LVL638: +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + 8038 .loc 1 5329 11 view .LVU2536 + 8039 0022 0240 ands r2, r0 + 8040 .LVL639: +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8041 .loc 1 5330 3 is_stmt 1 view .LVU2537 +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8042 .loc 1 5330 24 is_stmt 0 view .LVU2538 + 8043 0024 8A60 str r2, [r1, #8] +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8044 .loc 1 5332 3 is_stmt 1 view .LVU2539 +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8045 .loc 1 5332 29 is_stmt 0 view .LVU2540 + 8046 0026 1968 ldr r1, [r3] +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8047 .loc 1 5332 3 view .LVU2541 + 8048 0028 6029 cmp r1, #96 + 8049 002a 4FD0 beq .L443 + 8050 002c 23D8 bhi .L444 + 8051 002e 4029 cmp r1, #64 + 8052 0030 57D0 beq .L445 + 8053 0032 11D8 bhi .L446 + 8054 0034 2029 cmp r1, #32 + 8055 0036 04D0 beq .L447 + 8056 0038 0AD8 bhi .L448 + 8057 003a 0029 cmp r1, #0 + 8058 003c 01D0 beq .L447 + 8059 003e 1029 cmp r1, #16 + 8060 0040 04D1 bne .L455 + 8061 .L447: +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8062 .loc 1 5438 7 is_stmt 1 view .LVU2542 +5440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8063 .loc 1 5440 7 view .LVU2543 + 8064 0042 2068 ldr r0, [r4] + 8065 0044 FFF7FEFF bl TIM_ITRx_SetConfig + 8066 .LVL640: +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8067 .loc 1 5441 7 view .LVU2544 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8068 .loc 1 5315 21 is_stmt 0 view .LVU2545 + 8069 0048 0020 movs r0, #0 +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8070 .loc 1 5441 7 view .LVU2546 + 8071 004a 2AE0 b .L449 + 8072 .LVL641: + ARM GAS /tmp/cchCqftX.s page 311 + + + 8073 .L455: +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8074 .loc 1 5445 14 view .LVU2547 + 8075 004c 0120 movs r0, #1 + 8076 004e 28E0 b .L449 + 8077 .L448: +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8078 .loc 1 5332 3 view .LVU2548 + 8079 0050 3029 cmp r1, #48 + 8080 0052 F6D0 beq .L447 +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8081 .loc 1 5445 14 view .LVU2549 + 8082 0054 0120 movs r0, #1 + 8083 0056 24E0 b .L449 + 8084 .L446: +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8085 .loc 1 5332 3 view .LVU2550 + 8086 0058 5029 cmp r1, #80 + 8087 005a 0AD1 bne .L456 +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8088 .loc 1 5387 7 is_stmt 1 view .LVU2551 +5390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8089 .loc 1 5390 7 view .LVU2552 +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8090 .loc 1 5391 7 view .LVU2553 +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8091 .loc 1 5393 7 view .LVU2554 +5394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8092 .loc 1 5394 50 is_stmt 0 view .LVU2555 + 8093 005c 5968 ldr r1, [r3, #4] +5395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); + 8094 .loc 1 5395 50 view .LVU2556 + 8095 005e DA68 ldr r2, [r3, #12] + 8096 .LVL642: +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8097 .loc 1 5393 7 view .LVU2557 + 8098 0060 2068 ldr r0, [r4] + 8099 0062 FFF7FEFF bl TIM_TI1_ConfigInputStage + 8100 .LVL643: +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8101 .loc 1 5396 7 is_stmt 1 view .LVU2558 + 8102 0066 2068 ldr r0, [r4] + 8103 0068 5021 movs r1, #80 + 8104 006a FFF7FEFF bl TIM_ITRx_SetConfig + 8105 .LVL644: +5397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8106 .loc 1 5397 7 view .LVU2559 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8107 .loc 1 5315 21 is_stmt 0 view .LVU2560 + 8108 006e 0020 movs r0, #0 +5397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8109 .loc 1 5397 7 view .LVU2561 + 8110 0070 17E0 b .L449 + 8111 .LVL645: + 8112 .L456: +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8113 .loc 1 5445 14 view .LVU2562 + ARM GAS /tmp/cchCqftX.s page 312 + + + 8114 0072 0120 movs r0, #1 + 8115 0074 15E0 b .L449 + 8116 .L444: +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8117 .loc 1 5332 3 view .LVU2563 + 8118 0076 8022 movs r2, #128 + 8119 .LVL646: +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8120 .loc 1 5332 3 view .LVU2564 + 8121 0078 5201 lsls r2, r2, #5 + 8122 007a 9142 cmp r1, r2 + 8123 007c 3CD0 beq .L453 + 8124 007e 8022 movs r2, #128 + 8125 0080 9201 lsls r2, r2, #6 + 8126 0082 9142 cmp r1, r2 + 8127 0084 14D0 beq .L451 + 8128 0086 7029 cmp r1, #112 + 8129 0088 38D1 bne .L454 +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8130 .loc 1 5343 7 is_stmt 1 view .LVU2565 +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + 8131 .loc 1 5346 7 view .LVU2566 +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8132 .loc 1 5347 7 view .LVU2567 +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8133 .loc 1 5348 7 view .LVU2568 +5351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8134 .loc 1 5351 7 view .LVU2569 +5352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8135 .loc 1 5352 43 is_stmt 0 view .LVU2570 + 8136 008a 9968 ldr r1, [r3, #8] +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8137 .loc 1 5353 43 view .LVU2571 + 8138 008c 5A68 ldr r2, [r3, #4] +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8139 .loc 1 5354 43 view .LVU2572 + 8140 008e DB68 ldr r3, [r3, #12] + 8141 .LVL647: +5351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8142 .loc 1 5351 7 view .LVU2573 + 8143 0090 2068 ldr r0, [r4] + 8144 0092 FFF7FEFF bl TIM_ETR_SetConfig + 8145 .LVL648: +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8146 .loc 1 5357 7 is_stmt 1 view .LVU2574 +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8147 .loc 1 5357 21 is_stmt 0 view .LVU2575 + 8148 0096 2268 ldr r2, [r4] +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8149 .loc 1 5357 15 view .LVU2576 + 8150 0098 9368 ldr r3, [r2, #8] + 8151 .LVL649: +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ + 8152 .loc 1 5358 7 is_stmt 1 view .LVU2577 +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ + 8153 .loc 1 5358 15 is_stmt 0 view .LVU2578 + 8154 009a 7721 movs r1, #119 + ARM GAS /tmp/cchCqftX.s page 313 + + + 8155 009c 0B43 orrs r3, r1 + 8156 .LVL650: +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8157 .loc 1 5360 7 is_stmt 1 view .LVU2579 +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8158 .loc 1 5360 28 is_stmt 0 view .LVU2580 + 8159 009e 9360 str r3, [r2, #8] +5361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8160 .loc 1 5361 7 is_stmt 1 view .LVU2581 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8161 .loc 1 5315 21 is_stmt 0 view .LVU2582 + 8162 00a0 0020 movs r0, #0 + 8163 .LVL651: + 8164 .L449: +5448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8165 .loc 1 5448 3 is_stmt 1 view .LVU2583 +5448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8166 .loc 1 5448 15 is_stmt 0 view .LVU2584 + 8167 00a2 3D23 movs r3, #61 + 8168 00a4 0122 movs r2, #1 + 8169 00a6 E254 strb r2, [r4, r3] +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8170 .loc 1 5450 3 is_stmt 1 view .LVU2585 +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8171 .loc 1 5450 3 view .LVU2586 + 8172 00a8 013B subs r3, r3, #1 + 8173 00aa 0022 movs r2, #0 + 8174 00ac E254 strb r2, [r4, r3] +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8175 .loc 1 5450 3 view .LVU2587 +5452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8176 .loc 1 5452 3 view .LVU2588 + 8177 .LVL652: + 8178 .L442: +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8179 .loc 1 5453 1 is_stmt 0 view .LVU2589 + 8180 @ sp needed + 8181 .LVL653: +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8182 .loc 1 5453 1 view .LVU2590 + 8183 00ae 10BD pop {r4, pc} + 8184 .LVL654: + 8185 .L451: +5367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8186 .loc 1 5367 7 is_stmt 1 view .LVU2591 +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + 8187 .loc 1 5370 7 view .LVU2592 +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8188 .loc 1 5371 7 view .LVU2593 +5372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8189 .loc 1 5372 7 view .LVU2594 +5375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8190 .loc 1 5375 7 view .LVU2595 +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8191 .loc 1 5376 43 is_stmt 0 view .LVU2596 + 8192 00b0 9968 ldr r1, [r3, #8] +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + ARM GAS /tmp/cchCqftX.s page 314 + + + 8193 .loc 1 5377 43 view .LVU2597 + 8194 00b2 5A68 ldr r2, [r3, #4] +5378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the External clock mode2 */ + 8195 .loc 1 5378 43 view .LVU2598 + 8196 00b4 DB68 ldr r3, [r3, #12] + 8197 .LVL655: +5375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8198 .loc 1 5375 7 view .LVU2599 + 8199 00b6 2068 ldr r0, [r4] + 8200 00b8 FFF7FEFF bl TIM_ETR_SetConfig + 8201 .LVL656: +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8202 .loc 1 5380 7 is_stmt 1 view .LVU2600 +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8203 .loc 1 5380 11 is_stmt 0 view .LVU2601 + 8204 00bc 2268 ldr r2, [r4] +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8205 .loc 1 5380 21 view .LVU2602 + 8206 00be 9168 ldr r1, [r2, #8] +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8207 .loc 1 5380 28 view .LVU2603 + 8208 00c0 8023 movs r3, #128 + 8209 00c2 DB01 lsls r3, r3, #7 + 8210 00c4 0B43 orrs r3, r1 + 8211 00c6 9360 str r3, [r2, #8] +5381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8212 .loc 1 5381 7 is_stmt 1 view .LVU2604 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8213 .loc 1 5315 21 is_stmt 0 view .LVU2605 + 8214 00c8 0020 movs r0, #0 +5381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8215 .loc 1 5381 7 view .LVU2606 + 8216 00ca EAE7 b .L449 + 8217 .LVL657: + 8218 .L443: +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8219 .loc 1 5403 7 is_stmt 1 view .LVU2607 +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8220 .loc 1 5406 7 view .LVU2608 +5407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8221 .loc 1 5407 7 view .LVU2609 +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8222 .loc 1 5409 7 view .LVU2610 +5410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8223 .loc 1 5410 50 is_stmt 0 view .LVU2611 + 8224 00cc 5968 ldr r1, [r3, #4] +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); + 8225 .loc 1 5411 50 view .LVU2612 + 8226 00ce DA68 ldr r2, [r3, #12] + 8227 .LVL658: +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8228 .loc 1 5409 7 view .LVU2613 + 8229 00d0 2068 ldr r0, [r4] + 8230 00d2 FFF7FEFF bl TIM_TI2_ConfigInputStage + 8231 .LVL659: +5412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8232 .loc 1 5412 7 is_stmt 1 view .LVU2614 + ARM GAS /tmp/cchCqftX.s page 315 + + + 8233 00d6 2068 ldr r0, [r4] + 8234 00d8 6021 movs r1, #96 + 8235 00da FFF7FEFF bl TIM_ITRx_SetConfig + 8236 .LVL660: +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8237 .loc 1 5413 7 view .LVU2615 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8238 .loc 1 5315 21 is_stmt 0 view .LVU2616 + 8239 00de 0020 movs r0, #0 +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8240 .loc 1 5413 7 view .LVU2617 + 8241 00e0 DFE7 b .L449 + 8242 .LVL661: + 8243 .L445: +5419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8244 .loc 1 5419 7 is_stmt 1 view .LVU2618 +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8245 .loc 1 5422 7 view .LVU2619 +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8246 .loc 1 5423 7 view .LVU2620 +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8247 .loc 1 5425 7 view .LVU2621 +5426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8248 .loc 1 5426 50 is_stmt 0 view .LVU2622 + 8249 00e2 5968 ldr r1, [r3, #4] +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); + 8250 .loc 1 5427 50 view .LVU2623 + 8251 00e4 DA68 ldr r2, [r3, #12] + 8252 .LVL662: +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8253 .loc 1 5425 7 view .LVU2624 + 8254 00e6 2068 ldr r0, [r4] + 8255 00e8 FFF7FEFF bl TIM_TI1_ConfigInputStage + 8256 .LVL663: +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8257 .loc 1 5428 7 is_stmt 1 view .LVU2625 + 8258 00ec 2068 ldr r0, [r4] + 8259 00ee 4021 movs r1, #64 + 8260 00f0 FFF7FEFF bl TIM_ITRx_SetConfig + 8261 .LVL664: +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8262 .loc 1 5429 7 view .LVU2626 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8263 .loc 1 5315 21 is_stmt 0 view .LVU2627 + 8264 00f4 0020 movs r0, #0 +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8265 .loc 1 5429 7 view .LVU2628 + 8266 00f6 D4E7 b .L449 + 8267 .LVL665: + 8268 .L453: +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8269 .loc 1 5332 3 view .LVU2629 + 8270 00f8 0020 movs r0, #0 + 8271 00fa D2E7 b .L449 + 8272 .L454: +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8273 .loc 1 5445 14 view .LVU2630 + ARM GAS /tmp/cchCqftX.s page 316 + + + 8274 00fc 0120 movs r0, #1 + 8275 00fe D0E7 b .L449 + 8276 .LVL666: + 8277 .L452: +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8278 .loc 1 5319 3 discriminator 1 view .LVU2631 + 8279 0100 0220 movs r0, #2 + 8280 .LVL667: +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8281 .loc 1 5319 3 discriminator 1 view .LVU2632 + 8282 0102 D4E7 b .L442 + 8283 .L458: + 8284 .align 2 + 8285 .L457: + 8286 0104 8800FFFF .word -65400 + 8287 .cfi_endproc + 8288 .LFE111: + 8290 .section .text.TIM_SlaveTimer_SetConfig,"ax",%progbits + 8291 .align 1 + 8292 .syntax unified + 8293 .code 16 + 8294 .thumb_func + 8296 TIM_SlaveTimer_SetConfig: + 8297 .LVL668: + 8298 .LFB149: +7131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 8299 .loc 1 7131 1 is_stmt 1 view -0 + 8300 .cfi_startproc + 8301 @ args = 0, pretend = 0, frame = 0 + 8302 @ frame_needed = 0, uses_anonymous_args = 0 +7131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 8303 .loc 1 7131 1 is_stmt 0 view .LVU2634 + 8304 0000 70B5 push {r4, r5, r6, lr} + 8305 .cfi_def_cfa_offset 16 + 8306 .cfi_offset 4, -16 + 8307 .cfi_offset 5, -12 + 8308 .cfi_offset 6, -8 + 8309 .cfi_offset 14, -4 + 8310 0002 0B00 movs r3, r1 +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8311 .loc 1 7132 3 is_stmt 1 view .LVU2635 + 8312 .LVL669: +7133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 8313 .loc 1 7133 3 view .LVU2636 +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 8314 .loc 1 7134 3 view .LVU2637 +7135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8315 .loc 1 7135 3 view .LVU2638 +7138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8316 .loc 1 7138 3 view .LVU2639 +7138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8317 .loc 1 7138 17 is_stmt 0 view .LVU2640 + 8318 0004 0468 ldr r4, [r0] +7138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8319 .loc 1 7138 11 view .LVU2641 + 8320 0006 A168 ldr r1, [r4, #8] + 8321 .LVL670: + ARM GAS /tmp/cchCqftX.s page 317 + + +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Input Trigger source */ + 8322 .loc 1 7141 3 is_stmt 1 view .LVU2642 +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Input Trigger source */ + 8323 .loc 1 7141 11 is_stmt 0 view .LVU2643 + 8324 0008 7022 movs r2, #112 + 8325 000a 9143 bics r1, r2 + 8326 .LVL671: +7143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8327 .loc 1 7143 3 is_stmt 1 view .LVU2644 +7143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8328 .loc 1 7143 26 is_stmt 0 view .LVU2645 + 8329 000c 5A68 ldr r2, [r3, #4] +7143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8330 .loc 1 7143 11 view .LVU2646 + 8331 000e 0A43 orrs r2, r1 + 8332 .LVL672: +7146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the slave mode */ + 8333 .loc 1 7146 3 is_stmt 1 view .LVU2647 +7146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the slave mode */ + 8334 .loc 1 7146 11 is_stmt 0 view .LVU2648 + 8335 0010 0721 movs r1, #7 + 8336 0012 8A43 bics r2, r1 + 8337 .LVL673: +7148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8338 .loc 1 7148 3 is_stmt 1 view .LVU2649 +7148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8339 .loc 1 7148 26 is_stmt 0 view .LVU2650 + 8340 0014 1968 ldr r1, [r3] +7148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8341 .loc 1 7148 11 view .LVU2651 + 8342 0016 0A43 orrs r2, r1 + 8343 .LVL674: +7151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8344 .loc 1 7151 3 is_stmt 1 view .LVU2652 +7151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8345 .loc 1 7151 24 is_stmt 0 view .LVU2653 + 8346 0018 A260 str r2, [r4, #8] +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8347 .loc 1 7154 3 is_stmt 1 view .LVU2654 +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8348 .loc 1 7154 23 is_stmt 0 view .LVU2655 + 8349 001a 5A68 ldr r2, [r3, #4] + 8350 .LVL675: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8351 .loc 1 7154 3 view .LVU2656 + 8352 001c 502A cmp r2, #80 + 8353 001e 31D0 beq .L460 + 8354 0020 0BD9 bls .L473 + 8355 0022 602A cmp r2, #96 + 8356 0024 35D0 beq .L465 + 8357 0026 702A cmp r2, #112 + 8358 0028 44D1 bne .L471 +7159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); + 8359 .loc 1 7159 7 is_stmt 1 view .LVU2657 +7160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8360 .loc 1 7160 7 view .LVU2658 +7161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + ARM GAS /tmp/cchCqftX.s page 318 + + + 8361 .loc 1 7161 7 view .LVU2659 +7162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the ETR Trigger source */ + 8362 .loc 1 7162 7 view .LVU2660 +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8363 .loc 1 7164 7 view .LVU2661 +7165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8364 .loc 1 7165 37 is_stmt 0 view .LVU2662 + 8365 002a D968 ldr r1, [r3, #12] +7166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); + 8366 .loc 1 7166 37 view .LVU2663 + 8367 002c 9A68 ldr r2, [r3, #8] +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8368 .loc 1 7167 37 view .LVU2664 + 8369 002e 1B69 ldr r3, [r3, #16] + 8370 .LVL676: +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8371 .loc 1 7164 7 view .LVU2665 + 8372 0030 0068 ldr r0, [r0] + 8373 .LVL677: +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8374 .loc 1 7164 7 view .LVU2666 + 8375 0032 FFF7FEFF bl TIM_ETR_SetConfig + 8376 .LVL678: +7168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8377 .loc 1 7168 7 is_stmt 1 view .LVU2667 +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8378 .loc 1 7132 21 is_stmt 0 view .LVU2668 + 8379 0036 0020 movs r0, #0 + 8380 .L463: + 8381 .LVL679: +7241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8382 .loc 1 7241 1 view .LVU2669 + 8383 @ sp needed + 8384 0038 70BD pop {r4, r5, r6, pc} + 8385 .LVL680: + 8386 .L473: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8387 .loc 1 7154 3 view .LVU2670 + 8388 003a 402A cmp r2, #64 + 8389 003c 0DD0 beq .L462 + 8390 003e 2FD8 bhi .L466 + 8391 0040 202A cmp r2, #32 + 8392 0042 2FD0 beq .L467 + 8393 0044 05D8 bhi .L464 + 8394 0046 002A cmp r2, #0 + 8395 0048 2ED0 beq .L468 + 8396 004a 102A cmp r2, #16 + 8397 004c 2ED1 bne .L469 + 8398 004e 0020 movs r0, #0 + 8399 .LVL681: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8400 .loc 1 7154 3 view .LVU2671 + 8401 0050 F2E7 b .L463 + 8402 .LVL682: + 8403 .L464: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8404 .loc 1 7154 3 view .LVU2672 + ARM GAS /tmp/cchCqftX.s page 319 + + + 8405 0052 302A cmp r2, #48 + 8406 0054 2CD1 bne .L470 + 8407 0056 0020 movs r0, #0 + 8408 .LVL683: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8409 .loc 1 7154 3 view .LVU2673 + 8410 0058 EEE7 b .L463 + 8411 .LVL684: + 8412 .L462: +7174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8413 .loc 1 7174 7 is_stmt 1 view .LVU2674 +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8414 .loc 1 7175 7 view .LVU2675 +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8415 .loc 1 7177 7 view .LVU2676 +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8416 .loc 1 7177 23 is_stmt 0 view .LVU2677 + 8417 005a 1A68 ldr r2, [r3] +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8418 .loc 1 7177 10 view .LVU2678 + 8419 005c 052A cmp r2, #5 + 8420 005e 2BD0 beq .L472 +7183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8421 .loc 1 7183 7 is_stmt 1 view .LVU2679 +7183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8422 .loc 1 7183 21 is_stmt 0 view .LVU2680 + 8423 0060 0268 ldr r2, [r0] +7183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8424 .loc 1 7183 15 view .LVU2681 + 8425 0062 146A ldr r4, [r2, #32] + 8426 .LVL685: +7184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8427 .loc 1 7184 7 is_stmt 1 view .LVU2682 +7184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8428 .loc 1 7184 21 is_stmt 0 view .LVU2683 + 8429 0064 116A ldr r1, [r2, #32] +7184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8430 .loc 1 7184 28 view .LVU2684 + 8431 0066 0125 movs r5, #1 + 8432 0068 A943 bics r1, r5 + 8433 006a 1162 str r1, [r2, #32] +7185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8434 .loc 1 7185 7 is_stmt 1 view .LVU2685 +7185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8435 .loc 1 7185 22 is_stmt 0 view .LVU2686 + 8436 006c 0168 ldr r1, [r0] +7185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8437 .loc 1 7185 16 view .LVU2687 + 8438 006e 8A69 ldr r2, [r1, #24] + 8439 .LVL686: +7188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); + 8440 .loc 1 7188 7 is_stmt 1 view .LVU2688 +7188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); + 8441 .loc 1 7188 16 is_stmt 0 view .LVU2689 + 8442 0070 EF35 adds r5, r5, #239 + 8443 0072 AA43 bics r2, r5 + 8444 .LVL687: + ARM GAS /tmp/cchCqftX.s page 320 + + +7189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8445 .loc 1 7189 7 is_stmt 1 view .LVU2690 +7189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8446 .loc 1 7189 33 is_stmt 0 view .LVU2691 + 8447 0074 1B69 ldr r3, [r3, #16] + 8448 .LVL688: +7189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8449 .loc 1 7189 50 view .LVU2692 + 8450 0076 1B01 lsls r3, r3, #4 +7189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8451 .loc 1 7189 16 view .LVU2693 + 8452 0078 1343 orrs r3, r2 + 8453 .LVL689: +7192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER = tmpccer; + 8454 .loc 1 7192 7 is_stmt 1 view .LVU2694 +7192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER = tmpccer; + 8455 .loc 1 7192 29 is_stmt 0 view .LVU2695 + 8456 007a 8B61 str r3, [r1, #24] +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8457 .loc 1 7193 7 is_stmt 1 view .LVU2696 +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8458 .loc 1 7193 11 is_stmt 0 view .LVU2697 + 8459 007c 0368 ldr r3, [r0] + 8460 .LVL690: +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8461 .loc 1 7193 28 view .LVU2698 + 8462 007e 1C62 str r4, [r3, #32] + 8463 .LVL691: +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8464 .loc 1 7194 7 is_stmt 1 view .LVU2699 +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8465 .loc 1 7132 21 is_stmt 0 view .LVU2700 + 8466 0080 0020 movs r0, #0 + 8467 .LVL692: +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8468 .loc 1 7194 7 view .LVU2701 + 8469 0082 D9E7 b .L463 + 8470 .LVL693: + 8471 .L460: +7200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8472 .loc 1 7200 7 is_stmt 1 view .LVU2702 +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8473 .loc 1 7201 7 view .LVU2703 +7202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8474 .loc 1 7202 7 view .LVU2704 +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8475 .loc 1 7205 7 view .LVU2705 +7206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); + 8476 .loc 1 7206 44 is_stmt 0 view .LVU2706 + 8477 0084 9968 ldr r1, [r3, #8] +7207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8478 .loc 1 7207 44 view .LVU2707 + 8479 0086 1A69 ldr r2, [r3, #16] +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8480 .loc 1 7205 7 view .LVU2708 + 8481 0088 0068 ldr r0, [r0] + 8482 .LVL694: + ARM GAS /tmp/cchCqftX.s page 321 + + +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8483 .loc 1 7205 7 view .LVU2709 + 8484 008a FFF7FEFF bl TIM_TI1_ConfigInputStage + 8485 .LVL695: +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8486 .loc 1 7208 7 is_stmt 1 view .LVU2710 +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8487 .loc 1 7132 21 is_stmt 0 view .LVU2711 + 8488 008e 0020 movs r0, #0 +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8489 .loc 1 7208 7 view .LVU2712 + 8490 0090 D2E7 b .L463 + 8491 .LVL696: + 8492 .L465: +7214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8493 .loc 1 7214 7 is_stmt 1 view .LVU2713 +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8494 .loc 1 7215 7 view .LVU2714 +7216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8495 .loc 1 7216 7 view .LVU2715 +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8496 .loc 1 7219 7 view .LVU2716 +7220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); + 8497 .loc 1 7220 44 is_stmt 0 view .LVU2717 + 8498 0092 9968 ldr r1, [r3, #8] +7221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8499 .loc 1 7221 44 view .LVU2718 + 8500 0094 1A69 ldr r2, [r3, #16] +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8501 .loc 1 7219 7 view .LVU2719 + 8502 0096 0068 ldr r0, [r0] + 8503 .LVL697: +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8504 .loc 1 7219 7 view .LVU2720 + 8505 0098 FFF7FEFF bl TIM_TI2_ConfigInputStage + 8506 .LVL698: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8507 .loc 1 7222 7 is_stmt 1 view .LVU2721 +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8508 .loc 1 7132 21 is_stmt 0 view .LVU2722 + 8509 009c 0020 movs r0, #0 +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8510 .loc 1 7222 7 view .LVU2723 + 8511 009e CBE7 b .L463 + 8512 .LVL699: + 8513 .L466: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8514 .loc 1 7236 14 view .LVU2724 + 8515 00a0 0120 movs r0, #1 + 8516 .LVL700: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8517 .loc 1 7236 14 view .LVU2725 + 8518 00a2 C9E7 b .L463 + 8519 .LVL701: + 8520 .L467: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8521 .loc 1 7154 3 view .LVU2726 + ARM GAS /tmp/cchCqftX.s page 322 + + + 8522 00a4 0020 movs r0, #0 + 8523 .LVL702: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8524 .loc 1 7154 3 view .LVU2727 + 8525 00a6 C7E7 b .L463 + 8526 .LVL703: + 8527 .L468: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8528 .loc 1 7154 3 view .LVU2728 + 8529 00a8 0020 movs r0, #0 + 8530 .LVL704: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8531 .loc 1 7154 3 view .LVU2729 + 8532 00aa C5E7 b .L463 + 8533 .LVL705: + 8534 .L469: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8535 .loc 1 7236 14 view .LVU2730 + 8536 00ac 0120 movs r0, #1 + 8537 .LVL706: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8538 .loc 1 7236 14 view .LVU2731 + 8539 00ae C3E7 b .L463 + 8540 .LVL707: + 8541 .L470: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8542 .loc 1 7236 14 view .LVU2732 + 8543 00b0 0120 movs r0, #1 + 8544 .LVL708: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8545 .loc 1 7236 14 view .LVU2733 + 8546 00b2 C1E7 b .L463 + 8547 .LVL709: + 8548 .L471: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8549 .loc 1 7236 14 view .LVU2734 + 8550 00b4 0120 movs r0, #1 + 8551 .LVL710: +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8552 .loc 1 7236 14 view .LVU2735 + 8553 00b6 BFE7 b .L463 + 8554 .LVL711: + 8555 .L472: +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8556 .loc 1 7179 16 view .LVU2736 + 8557 00b8 0120 movs r0, #1 + 8558 .LVL712: +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8559 .loc 1 7179 16 view .LVU2737 + 8560 00ba BDE7 b .L463 + 8561 .cfi_endproc + 8562 .LFE149: + 8564 .section .text.HAL_TIM_SlaveConfigSynchro,"ax",%progbits + 8565 .align 1 + 8566 .global HAL_TIM_SlaveConfigSynchro + 8567 .syntax unified + 8568 .code 16 + ARM GAS /tmp/cchCqftX.s page 323 + + + 8569 .thumb_func + 8571 HAL_TIM_SlaveConfigSynchro: + 8572 .LVL713: + 8573 .LFB113: +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 8574 .loc 1 5500 1 is_stmt 1 view -0 + 8575 .cfi_startproc + 8576 @ args = 0, pretend = 0, frame = 0 + 8577 @ frame_needed = 0, uses_anonymous_args = 0 +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 8578 .loc 1 5500 1 is_stmt 0 view .LVU2739 + 8579 0000 10B5 push {r4, lr} + 8580 .cfi_def_cfa_offset 8 + 8581 .cfi_offset 4, -8 + 8582 .cfi_offset 14, -4 + 8583 0002 0400 movs r4, r0 +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); + 8584 .loc 1 5502 3 is_stmt 1 view .LVU2740 +5503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); + 8585 .loc 1 5503 3 view .LVU2741 +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8586 .loc 1 5504 3 view .LVU2742 +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8587 .loc 1 5506 3 view .LVU2743 +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8588 .loc 1 5506 3 view .LVU2744 + 8589 0004 3C23 movs r3, #60 + 8590 0006 C35C ldrb r3, [r0, r3] + 8591 0008 012B cmp r3, #1 + 8592 000a 22D0 beq .L477 +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8593 .loc 1 5506 3 discriminator 2 view .LVU2745 + 8594 000c 3C23 movs r3, #60 + 8595 000e 0122 movs r2, #1 + 8596 0010 C254 strb r2, [r0, r3] +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8597 .loc 1 5506 3 discriminator 2 view .LVU2746 +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8598 .loc 1 5508 3 view .LVU2747 +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8599 .loc 1 5508 15 is_stmt 0 view .LVU2748 + 8600 0012 0133 adds r3, r3, #1 + 8601 0014 0132 adds r2, r2, #1 + 8602 0016 C254 strb r2, [r0, r3] +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8603 .loc 1 5510 3 is_stmt 1 view .LVU2749 +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8604 .loc 1 5510 7 is_stmt 0 view .LVU2750 + 8605 0018 FFF7FEFF bl TIM_SlaveTimer_SetConfig + 8606 .LVL714: +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8607 .loc 1 5510 6 discriminator 1 view .LVU2751 + 8608 001c 0028 cmp r0, #0 + 8609 001e 10D1 bne .L478 +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8610 .loc 1 5518 3 is_stmt 1 view .LVU2752 + 8611 0020 2268 ldr r2, [r4] + ARM GAS /tmp/cchCqftX.s page 324 + + + 8612 0022 D368 ldr r3, [r2, #12] + 8613 0024 4021 movs r1, #64 + 8614 0026 8B43 bics r3, r1 + 8615 0028 D360 str r3, [r2, #12] +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8616 .loc 1 5521 3 view .LVU2753 + 8617 002a 2268 ldr r2, [r4] + 8618 002c D368 ldr r3, [r2, #12] + 8619 002e 0A49 ldr r1, .L479 + 8620 0030 0B40 ands r3, r1 + 8621 0032 D360 str r3, [r2, #12] +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8622 .loc 1 5523 3 view .LVU2754 +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8623 .loc 1 5523 15 is_stmt 0 view .LVU2755 + 8624 0034 3D23 movs r3, #61 + 8625 0036 0122 movs r2, #1 + 8626 0038 E254 strb r2, [r4, r3] +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8627 .loc 1 5525 3 is_stmt 1 view .LVU2756 +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8628 .loc 1 5525 3 view .LVU2757 + 8629 003a 013B subs r3, r3, #1 + 8630 003c 0022 movs r2, #0 + 8631 003e E254 strb r2, [r4, r3] +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8632 .loc 1 5525 3 view .LVU2758 +5527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8633 .loc 1 5527 3 view .LVU2759 + 8634 .L475: +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8635 .loc 1 5528 1 is_stmt 0 view .LVU2760 + 8636 @ sp needed + 8637 .LVL715: +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8638 .loc 1 5528 1 view .LVU2761 + 8639 0040 10BD pop {r4, pc} + 8640 .LVL716: + 8641 .L478: +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8642 .loc 1 5512 5 is_stmt 1 view .LVU2762 +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8643 .loc 1 5512 17 is_stmt 0 view .LVU2763 + 8644 0042 3D23 movs r3, #61 + 8645 0044 0122 movs r2, #1 + 8646 0046 E254 strb r2, [r4, r3] +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8647 .loc 1 5513 5 is_stmt 1 view .LVU2764 +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8648 .loc 1 5513 5 view .LVU2765 + 8649 0048 013B subs r3, r3, #1 + 8650 004a 0022 movs r2, #0 + 8651 004c E254 strb r2, [r4, r3] +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8652 .loc 1 5513 5 view .LVU2766 +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8653 .loc 1 5514 5 view .LVU2767 + ARM GAS /tmp/cchCqftX.s page 325 + + +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8654 .loc 1 5514 12 is_stmt 0 view .LVU2768 + 8655 004e 0120 movs r0, #1 + 8656 0050 F6E7 b .L475 + 8657 .LVL717: + 8658 .L477: +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8659 .loc 1 5506 3 discriminator 1 view .LVU2769 + 8660 0052 0220 movs r0, #2 + 8661 .LVL718: +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8662 .loc 1 5506 3 discriminator 1 view .LVU2770 + 8663 0054 F4E7 b .L475 + 8664 .L480: + 8665 0056 C046 .align 2 + 8666 .L479: + 8667 0058 FFBFFFFF .word -16385 + 8668 .cfi_endproc + 8669 .LFE113: + 8671 .section .text.HAL_TIM_SlaveConfigSynchro_IT,"ax",%progbits + 8672 .align 1 + 8673 .global HAL_TIM_SlaveConfigSynchro_IT + 8674 .syntax unified + 8675 .code 16 + 8676 .thumb_func + 8678 HAL_TIM_SlaveConfigSynchro_IT: + 8679 .LVL719: + 8680 .LFB114: +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 8681 .loc 1 5541 1 is_stmt 1 view -0 + 8682 .cfi_startproc + 8683 @ args = 0, pretend = 0, frame = 0 + 8684 @ frame_needed = 0, uses_anonymous_args = 0 +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 8685 .loc 1 5541 1 is_stmt 0 view .LVU2772 + 8686 0000 10B5 push {r4, lr} + 8687 .cfi_def_cfa_offset 8 + 8688 .cfi_offset 4, -8 + 8689 .cfi_offset 14, -4 + 8690 0002 0400 movs r4, r0 +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); + 8691 .loc 1 5543 3 is_stmt 1 view .LVU2773 +5544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); + 8692 .loc 1 5544 3 view .LVU2774 +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8693 .loc 1 5545 3 view .LVU2775 +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8694 .loc 1 5547 3 view .LVU2776 +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8695 .loc 1 5547 3 view .LVU2777 + 8696 0004 3C23 movs r3, #60 + 8697 0006 C35C ldrb r3, [r0, r3] + 8698 0008 012B cmp r3, #1 + 8699 000a 22D0 beq .L484 +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8700 .loc 1 5547 3 discriminator 2 view .LVU2778 + 8701 000c 3C23 movs r3, #60 + ARM GAS /tmp/cchCqftX.s page 326 + + + 8702 000e 0122 movs r2, #1 + 8703 0010 C254 strb r2, [r0, r3] +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8704 .loc 1 5547 3 discriminator 2 view .LVU2779 +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8705 .loc 1 5549 3 view .LVU2780 +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8706 .loc 1 5549 15 is_stmt 0 view .LVU2781 + 8707 0012 0133 adds r3, r3, #1 + 8708 0014 0132 adds r2, r2, #1 + 8709 0016 C254 strb r2, [r0, r3] +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8710 .loc 1 5551 3 is_stmt 1 view .LVU2782 +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8711 .loc 1 5551 7 is_stmt 0 view .LVU2783 + 8712 0018 FFF7FEFF bl TIM_SlaveTimer_SetConfig + 8713 .LVL720: +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8714 .loc 1 5551 6 discriminator 1 view .LVU2784 + 8715 001c 0028 cmp r0, #0 + 8716 001e 10D1 bne .L485 +5559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8717 .loc 1 5559 3 is_stmt 1 view .LVU2785 + 8718 0020 2268 ldr r2, [r4] + 8719 0022 D368 ldr r3, [r2, #12] + 8720 0024 4021 movs r1, #64 + 8721 0026 0B43 orrs r3, r1 + 8722 0028 D360 str r3, [r2, #12] +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8723 .loc 1 5562 3 view .LVU2786 + 8724 002a 2268 ldr r2, [r4] + 8725 002c D368 ldr r3, [r2, #12] + 8726 002e 0A49 ldr r1, .L486 + 8727 0030 0B40 ands r3, r1 + 8728 0032 D360 str r3, [r2, #12] +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8729 .loc 1 5564 3 view .LVU2787 +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8730 .loc 1 5564 15 is_stmt 0 view .LVU2788 + 8731 0034 3D23 movs r3, #61 + 8732 0036 0122 movs r2, #1 + 8733 0038 E254 strb r2, [r4, r3] +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8734 .loc 1 5566 3 is_stmt 1 view .LVU2789 +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8735 .loc 1 5566 3 view .LVU2790 + 8736 003a 013B subs r3, r3, #1 + 8737 003c 0022 movs r2, #0 + 8738 003e E254 strb r2, [r4, r3] +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8739 .loc 1 5566 3 view .LVU2791 +5568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8740 .loc 1 5568 3 view .LVU2792 + 8741 .L482: +5569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8742 .loc 1 5569 1 is_stmt 0 view .LVU2793 + 8743 @ sp needed + ARM GAS /tmp/cchCqftX.s page 327 + + + 8744 .LVL721: +5569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8745 .loc 1 5569 1 view .LVU2794 + 8746 0040 10BD pop {r4, pc} + 8747 .LVL722: + 8748 .L485: +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8749 .loc 1 5553 5 is_stmt 1 view .LVU2795 +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8750 .loc 1 5553 17 is_stmt 0 view .LVU2796 + 8751 0042 3D23 movs r3, #61 + 8752 0044 0122 movs r2, #1 + 8753 0046 E254 strb r2, [r4, r3] +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8754 .loc 1 5554 5 is_stmt 1 view .LVU2797 +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8755 .loc 1 5554 5 view .LVU2798 + 8756 0048 013B subs r3, r3, #1 + 8757 004a 0022 movs r2, #0 + 8758 004c E254 strb r2, [r4, r3] +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8759 .loc 1 5554 5 view .LVU2799 +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8760 .loc 1 5555 5 view .LVU2800 +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8761 .loc 1 5555 12 is_stmt 0 view .LVU2801 + 8762 004e 0120 movs r0, #1 + 8763 0050 F6E7 b .L482 + 8764 .LVL723: + 8765 .L484: +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8766 .loc 1 5547 3 discriminator 1 view .LVU2802 + 8767 0052 0220 movs r0, #2 + 8768 .LVL724: +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8769 .loc 1 5547 3 discriminator 1 view .LVU2803 + 8770 0054 F4E7 b .L482 + 8771 .L487: + 8772 0056 C046 .align 2 + 8773 .L486: + 8774 0058 FFBFFFFF .word -16385 + 8775 .cfi_endproc + 8776 .LFE114: + 8778 .section .text.TIM_CCxChannelCmd,"ax",%progbits + 8779 .align 1 + 8780 .global TIM_CCxChannelCmd + 8781 .syntax unified + 8782 .code 16 + 8783 .thumb_func + 8785 TIM_CCxChannelCmd: + 8786 .LVL725: + 8787 .LFB158: +7573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Enables or disables the TIM Capture Compare Channel x. +7576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel specifies the TIM Channel + ARM GAS /tmp/cchCqftX.s page 328 + + +7578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +7580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +7581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +7582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +7583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param ChannelState specifies the TIM Channel CCxE bit new state. +7584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. +7585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) +7588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8788 .loc 1 7588 1 is_stmt 1 view -0 + 8789 .cfi_startproc + 8790 @ args = 0, pretend = 0, frame = 0 + 8791 @ frame_needed = 0, uses_anonymous_args = 0 + 8792 .loc 1 7588 1 is_stmt 0 view .LVU2805 + 8793 0000 10B5 push {r4, lr} + 8794 .cfi_def_cfa_offset 8 + 8795 .cfi_offset 4, -8 + 8796 .cfi_offset 14, -4 +7589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmp; + 8797 .loc 1 7589 3 is_stmt 1 view .LVU2806 +7590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(TIMx)); + 8798 .loc 1 7592 3 view .LVU2807 +7593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); + 8799 .loc 1 7593 3 view .LVU2808 +7594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ + 8800 .loc 1 7595 3 view .LVU2809 + 8801 .loc 1 7595 35 is_stmt 0 view .LVU2810 + 8802 0002 1F23 movs r3, #31 + 8803 0004 1940 ands r1, r3 + 8804 .LVL726: + 8805 .loc 1 7595 7 view .LVU2811 + 8806 0006 0124 movs r4, #1 + 8807 0008 8C40 lsls r4, r4, r1 + 8808 .LVL727: +7596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the CCxE Bit */ +7598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~tmp; + 8809 .loc 1 7598 3 is_stmt 1 view .LVU2812 + 8810 .loc 1 7598 7 is_stmt 0 view .LVU2813 + 8811 000a 036A ldr r3, [r0, #32] + 8812 .loc 1 7598 14 view .LVU2814 + 8813 000c A343 bics r3, r4 + 8814 000e 0362 str r3, [r0, #32] +7599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set or reset the CCxE Bit */ +7601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ + 8815 .loc 1 7601 3 is_stmt 1 view .LVU2815 + 8816 .loc 1 7601 7 is_stmt 0 view .LVU2816 + 8817 0010 036A ldr r3, [r0, #32] + 8818 .loc 1 7601 41 view .LVU2817 + 8819 0012 8A40 lsls r2, r2, r1 + 8820 .LVL728: + ARM GAS /tmp/cchCqftX.s page 329 + + + 8821 .loc 1 7601 14 view .LVU2818 + 8822 0014 1343 orrs r3, r2 + 8823 0016 0362 str r3, [r0, #32] +7602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8824 .loc 1 7602 1 view .LVU2819 + 8825 @ sp needed + 8826 .LVL729: + 8827 .loc 1 7602 1 view .LVU2820 + 8828 0018 10BD pop {r4, pc} + 8829 .cfi_endproc + 8830 .LFE158: + 8832 .section .text.HAL_TIM_OC_Start,"ax",%progbits + 8833 .align 1 + 8834 .global HAL_TIM_OC_Start + 8835 .syntax unified + 8836 .code 16 + 8837 .thumb_func + 8839 HAL_TIM_OC_Start: + 8840 .LVL730: + 8841 .LFB54: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8842 .loc 1 790 1 is_stmt 1 view -0 + 8843 .cfi_startproc + 8844 @ args = 0, pretend = 0, frame = 0 + 8845 @ frame_needed = 0, uses_anonymous_args = 0 + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8846 .loc 1 790 1 is_stmt 0 view .LVU2822 + 8847 0000 10B5 push {r4, lr} + 8848 .cfi_def_cfa_offset 8 + 8849 .cfi_offset 4, -8 + 8850 .cfi_offset 14, -4 + 8851 0002 0400 movs r4, r0 + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8852 .loc 1 791 3 is_stmt 1 view .LVU2823 + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8853 .loc 1 794 3 view .LVU2824 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8854 .loc 1 797 3 view .LVU2825 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8855 .loc 1 797 44 is_stmt 0 view .LVU2826 + 8856 0004 0029 cmp r1, #0 + 8857 0006 30D1 bne .L490 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8858 .loc 1 797 7 discriminator 1 view .LVU2827 + 8859 0008 3E23 movs r3, #62 + 8860 000a C35C ldrb r3, [r0, r3] + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8861 .loc 1 797 44 discriminator 1 view .LVU2828 + 8862 000c 013B subs r3, r3, #1 + 8863 000e 5A1E subs r2, r3, #1 + 8864 0010 9341 sbcs r3, r3, r2 + 8865 0012 DBB2 uxtb r3, r3 + 8866 .L491: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8867 .loc 1 797 6 discriminator 12 view .LVU2829 + 8868 0014 002B cmp r3, #0 + 8869 0016 5CD1 bne .L503 + ARM GAS /tmp/cchCqftX.s page 330 + + + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8870 .loc 1 803 3 is_stmt 1 view .LVU2830 + 8871 0018 0029 cmp r1, #0 + 8872 001a 3FD1 bne .L495 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8873 .loc 1 803 3 is_stmt 0 discriminator 1 view .LVU2831 + 8874 001c 3E33 adds r3, r3, #62 + 8875 001e 0222 movs r2, #2 + 8876 0020 E254 strb r2, [r4, r3] + 8877 .L496: + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8878 .loc 1 806 3 is_stmt 1 view .LVU2832 + 8879 0022 2068 ldr r0, [r4] + 8880 .LVL731: + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8881 .loc 1 806 3 is_stmt 0 view .LVU2833 + 8882 0024 0122 movs r2, #1 + 8883 0026 FFF7FEFF bl TIM_CCxChannelCmd + 8884 .LVL732: + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8885 .loc 1 808 3 is_stmt 1 view .LVU2834 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8886 .loc 1 808 7 is_stmt 0 view .LVU2835 + 8887 002a 2368 ldr r3, [r4] + 8888 002c 2B4A ldr r2, .L509 + 8889 002e 9342 cmp r3, r2 + 8890 0030 05D0 beq .L499 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8891 .loc 1 808 7 discriminator 2 view .LVU2836 + 8892 0032 2B4A ldr r2, .L509+4 + 8893 0034 9342 cmp r3, r2 + 8894 0036 02D0 beq .L499 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8895 .loc 1 808 7 discriminator 4 view .LVU2837 + 8896 0038 2A4A ldr r2, .L509+8 + 8897 003a 9342 cmp r3, r2 + 8898 003c 04D1 bne .L500 + 8899 .L499: + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8900 .loc 1 811 5 is_stmt 1 view .LVU2838 + 8901 003e 596C ldr r1, [r3, #68] + 8902 0040 8022 movs r2, #128 + 8903 0042 1202 lsls r2, r2, #8 + 8904 0044 0A43 orrs r2, r1 + 8905 0046 5A64 str r2, [r3, #68] + 8906 .L500: + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8907 .loc 1 815 3 view .LVU2839 + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8908 .loc 1 815 7 is_stmt 0 view .LVU2840 + 8909 0048 2368 ldr r3, [r4] + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8910 .loc 1 815 6 view .LVU2841 + 8911 004a 244A ldr r2, .L509 + 8912 004c 9342 cmp r3, r2 + 8913 004e 35D0 beq .L501 + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 331 + + + 8914 .loc 1 815 7 discriminator 1 view .LVU2842 + 8915 0050 8022 movs r2, #128 + 8916 0052 D205 lsls r2, r2, #23 + 8917 0054 9342 cmp r3, r2 + 8918 0056 31D0 beq .L501 + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8919 .loc 1 815 7 discriminator 2 view .LVU2843 + 8920 0058 234A ldr r2, .L509+12 + 8921 005a 9342 cmp r3, r2 + 8922 005c 2ED0 beq .L501 + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8923 .loc 1 825 5 is_stmt 1 view .LVU2844 + 8924 005e 1A68 ldr r2, [r3] + 8925 0060 0121 movs r1, #1 + 8926 0062 0A43 orrs r2, r1 + 8927 0064 1A60 str r2, [r3] + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8928 .loc 1 829 10 is_stmt 0 view .LVU2845 + 8929 0066 0020 movs r0, #0 + 8930 0068 34E0 b .L494 + 8931 .LVL733: + 8932 .L490: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8933 .loc 1 797 44 discriminator 2 view .LVU2846 + 8934 006a 0429 cmp r1, #4 + 8935 006c 08D0 beq .L505 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8936 .loc 1 797 44 discriminator 5 view .LVU2847 + 8937 006e 0829 cmp r1, #8 + 8938 0070 0DD0 beq .L506 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8939 .loc 1 797 7 discriminator 8 view .LVU2848 + 8940 0072 4123 movs r3, #65 + 8941 0074 C35C ldrb r3, [r0, r3] + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8942 .loc 1 797 44 discriminator 8 view .LVU2849 + 8943 0076 013B subs r3, r3, #1 + 8944 0078 5A1E subs r2, r3, #1 + 8945 007a 9341 sbcs r3, r3, r2 + 8946 007c DBB2 uxtb r3, r3 + 8947 007e C9E7 b .L491 + 8948 .L505: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8949 .loc 1 797 7 discriminator 4 view .LVU2850 + 8950 0080 3F23 movs r3, #63 + 8951 0082 C35C ldrb r3, [r0, r3] + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8952 .loc 1 797 44 discriminator 4 view .LVU2851 + 8953 0084 013B subs r3, r3, #1 + 8954 0086 5A1E subs r2, r3, #1 + 8955 0088 9341 sbcs r3, r3, r2 + 8956 008a DBB2 uxtb r3, r3 + 8957 008c C2E7 b .L491 + 8958 .L506: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8959 .loc 1 797 7 discriminator 7 view .LVU2852 + 8960 008e 4023 movs r3, #64 + ARM GAS /tmp/cchCqftX.s page 332 + + + 8961 0090 C35C ldrb r3, [r0, r3] + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8962 .loc 1 797 44 discriminator 7 view .LVU2853 + 8963 0092 013B subs r3, r3, #1 + 8964 0094 5A1E subs r2, r3, #1 + 8965 0096 9341 sbcs r3, r3, r2 + 8966 0098 DBB2 uxtb r3, r3 + 8967 009a BBE7 b .L491 + 8968 .L495: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8969 .loc 1 803 3 discriminator 2 view .LVU2854 + 8970 009c 0429 cmp r1, #4 + 8971 009e 05D0 beq .L507 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8972 .loc 1 803 3 discriminator 4 view .LVU2855 + 8973 00a0 0829 cmp r1, #8 + 8974 00a2 07D0 beq .L508 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8975 .loc 1 803 3 discriminator 7 view .LVU2856 + 8976 00a4 4123 movs r3, #65 + 8977 00a6 0222 movs r2, #2 + 8978 00a8 E254 strb r2, [r4, r3] + 8979 00aa BAE7 b .L496 + 8980 .L507: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8981 .loc 1 803 3 discriminator 3 view .LVU2857 + 8982 00ac 3F23 movs r3, #63 + 8983 00ae 0222 movs r2, #2 + 8984 00b0 E254 strb r2, [r4, r3] + 8985 00b2 B6E7 b .L496 + 8986 .L508: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8987 .loc 1 803 3 discriminator 6 view .LVU2858 + 8988 00b4 4023 movs r3, #64 + 8989 00b6 0222 movs r2, #2 + 8990 00b8 E254 strb r2, [r4, r3] + 8991 00ba B2E7 b .L496 + 8992 .LVL734: + 8993 .L501: + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8994 .loc 1 817 5 is_stmt 1 view .LVU2859 + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8995 .loc 1 817 29 is_stmt 0 view .LVU2860 + 8996 00bc 9968 ldr r1, [r3, #8] + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8997 .loc 1 817 13 view .LVU2861 + 8998 00be 0722 movs r2, #7 + 8999 00c0 0A40 ands r2, r1 + 9000 .LVL735: + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9001 .loc 1 818 5 is_stmt 1 view .LVU2862 + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9002 .loc 1 818 8 is_stmt 0 view .LVU2863 + 9003 00c2 062A cmp r2, #6 + 9004 00c4 07D0 beq .L504 + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9005 .loc 1 820 7 is_stmt 1 view .LVU2864 + ARM GAS /tmp/cchCqftX.s page 333 + + + 9006 00c6 1A68 ldr r2, [r3] + 9007 .LVL736: + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9008 .loc 1 820 7 is_stmt 0 view .LVU2865 + 9009 00c8 0121 movs r1, #1 + 9010 .LVL737: + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9011 .loc 1 820 7 view .LVU2866 + 9012 00ca 0A43 orrs r2, r1 + 9013 00cc 1A60 str r2, [r3] + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9014 .loc 1 829 10 view .LVU2867 + 9015 00ce 0020 movs r0, #0 + 9016 00d0 00E0 b .L494 + 9017 .LVL738: + 9018 .L503: + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9019 .loc 1 799 12 view .LVU2868 + 9020 00d2 0120 movs r0, #1 + 9021 .LVL739: + 9022 .L494: + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9023 .loc 1 830 1 view .LVU2869 + 9024 @ sp needed + 9025 .LVL740: + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9026 .loc 1 830 1 view .LVU2870 + 9027 00d4 10BD pop {r4, pc} + 9028 .LVL741: + 9029 .L504: + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9030 .loc 1 829 10 view .LVU2871 + 9031 00d6 0020 movs r0, #0 + 9032 00d8 FCE7 b .L494 + 9033 .L510: + 9034 00da C046 .align 2 + 9035 .L509: + 9036 00dc 002C0140 .word 1073818624 + 9037 00e0 00440140 .word 1073824768 + 9038 00e4 00480140 .word 1073825792 + 9039 00e8 00040040 .word 1073742848 + 9040 .cfi_endproc + 9041 .LFE54: + 9043 .section .text.HAL_TIM_OC_Stop,"ax",%progbits + 9044 .align 1 + 9045 .global HAL_TIM_OC_Stop + 9046 .syntax unified + 9047 .code 16 + 9048 .thumb_func + 9050 HAL_TIM_OC_Stop: + 9051 .LVL742: + 9052 .LFB55: + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 9053 .loc 1 844 1 is_stmt 1 view -0 + 9054 .cfi_startproc + 9055 @ args = 0, pretend = 0, frame = 0 + 9056 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cchCqftX.s page 334 + + + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 9057 .loc 1 844 1 is_stmt 0 view .LVU2873 + 9058 0000 70B5 push {r4, r5, r6, lr} + 9059 .cfi_def_cfa_offset 16 + 9060 .cfi_offset 4, -16 + 9061 .cfi_offset 5, -12 + 9062 .cfi_offset 6, -8 + 9063 .cfi_offset 14, -4 + 9064 0002 0400 movs r4, r0 + 9065 0004 0D00 movs r5, r1 + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9066 .loc 1 846 3 is_stmt 1 view .LVU2874 + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9067 .loc 1 849 3 view .LVU2875 + 9068 0006 0068 ldr r0, [r0] + 9069 .LVL743: + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9070 .loc 1 849 3 is_stmt 0 view .LVU2876 + 9071 0008 0022 movs r2, #0 + 9072 000a FFF7FEFF bl TIM_CCxChannelCmd + 9073 .LVL744: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9074 .loc 1 851 3 is_stmt 1 view .LVU2877 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9075 .loc 1 851 7 is_stmt 0 view .LVU2878 + 9076 000e 2368 ldr r3, [r4] + 9077 0010 1C4A ldr r2, .L521 + 9078 0012 9342 cmp r3, r2 + 9079 0014 19D0 beq .L512 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9080 .loc 1 851 7 discriminator 2 view .LVU2879 + 9081 0016 1C4A ldr r2, .L521+4 + 9082 0018 9342 cmp r3, r2 + 9083 001a 16D0 beq .L512 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9084 .loc 1 851 7 discriminator 4 view .LVU2880 + 9085 001c 1B4A ldr r2, .L521+8 + 9086 001e 9342 cmp r3, r2 + 9087 0020 13D0 beq .L512 + 9088 .L513: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9089 .loc 1 854 5 is_stmt 1 discriminator 5 view .LVU2881 + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9090 .loc 1 858 3 view .LVU2882 + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9091 .loc 1 858 3 view .LVU2883 + 9092 0022 2368 ldr r3, [r4] + 9093 0024 196A ldr r1, [r3, #32] + 9094 0026 1A4A ldr r2, .L521+12 + 9095 0028 1142 tst r1, r2 + 9096 002a 07D1 bne .L514 + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9097 .loc 1 858 3 discriminator 1 view .LVU2884 + 9098 002c 196A ldr r1, [r3, #32] + 9099 002e 194A ldr r2, .L521+16 + 9100 0030 1142 tst r1, r2 + 9101 0032 03D1 bne .L514 + ARM GAS /tmp/cchCqftX.s page 335 + + + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9102 .loc 1 858 3 discriminator 3 view .LVU2885 + 9103 0034 1A68 ldr r2, [r3] + 9104 0036 0121 movs r1, #1 + 9105 0038 8A43 bics r2, r1 + 9106 003a 1A60 str r2, [r3] + 9107 .L514: + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9108 .loc 1 858 3 discriminator 5 view .LVU2886 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9109 .loc 1 861 3 view .LVU2887 + 9110 003c 002D cmp r5, #0 + 9111 003e 11D1 bne .L515 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9112 .loc 1 861 3 is_stmt 0 discriminator 1 view .LVU2888 + 9113 0040 3E23 movs r3, #62 + 9114 0042 0122 movs r2, #1 + 9115 0044 E254 strb r2, [r4, r3] + 9116 .L516: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9117 .loc 1 864 3 is_stmt 1 view .LVU2889 + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9118 .loc 1 865 1 is_stmt 0 view .LVU2890 + 9119 0046 0020 movs r0, #0 + 9120 @ sp needed + 9121 .LVL745: + 9122 .LVL746: + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9123 .loc 1 865 1 view .LVU2891 + 9124 0048 70BD pop {r4, r5, r6, pc} + 9125 .LVL747: + 9126 .L512: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9127 .loc 1 854 5 is_stmt 1 view .LVU2892 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9128 .loc 1 854 5 view .LVU2893 + 9129 004a 196A ldr r1, [r3, #32] + 9130 004c 104A ldr r2, .L521+12 + 9131 004e 1142 tst r1, r2 + 9132 0050 E7D1 bne .L513 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9133 .loc 1 854 5 discriminator 1 view .LVU2894 + 9134 0052 196A ldr r1, [r3, #32] + 9135 0054 0F4A ldr r2, .L521+16 + 9136 0056 1142 tst r1, r2 + 9137 0058 E3D1 bne .L513 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9138 .loc 1 854 5 discriminator 3 view .LVU2895 + 9139 005a 5A6C ldr r2, [r3, #68] + 9140 005c 0E49 ldr r1, .L521+20 + 9141 005e 0A40 ands r2, r1 + 9142 0060 5A64 str r2, [r3, #68] + 9143 0062 DEE7 b .L513 + 9144 .L515: + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9145 .loc 1 861 3 is_stmt 0 discriminator 2 view .LVU2896 + 9146 0064 042D cmp r5, #4 + ARM GAS /tmp/cchCqftX.s page 336 + + + 9147 0066 05D0 beq .L519 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9148 .loc 1 861 3 discriminator 4 view .LVU2897 + 9149 0068 082D cmp r5, #8 + 9150 006a 07D0 beq .L520 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9151 .loc 1 861 3 discriminator 7 view .LVU2898 + 9152 006c 4123 movs r3, #65 + 9153 006e 0122 movs r2, #1 + 9154 0070 E254 strb r2, [r4, r3] + 9155 0072 E8E7 b .L516 + 9156 .L519: + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9157 .loc 1 861 3 discriminator 3 view .LVU2899 + 9158 0074 3F23 movs r3, #63 + 9159 0076 0122 movs r2, #1 + 9160 0078 E254 strb r2, [r4, r3] + 9161 007a E4E7 b .L516 + 9162 .L520: + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9163 .loc 1 861 3 discriminator 6 view .LVU2900 + 9164 007c 4023 movs r3, #64 + 9165 007e 0122 movs r2, #1 + 9166 0080 E254 strb r2, [r4, r3] + 9167 0082 E0E7 b .L516 + 9168 .L522: + 9169 .align 2 + 9170 .L521: + 9171 0084 002C0140 .word 1073818624 + 9172 0088 00440140 .word 1073824768 + 9173 008c 00480140 .word 1073825792 + 9174 0090 11110000 .word 4369 + 9175 0094 44040000 .word 1092 + 9176 0098 FF7FFFFF .word -32769 + 9177 .cfi_endproc + 9178 .LFE55: + 9180 .section .text.HAL_TIM_OC_Start_IT,"ax",%progbits + 9181 .align 1 + 9182 .global HAL_TIM_OC_Start_IT + 9183 .syntax unified + 9184 .code 16 + 9185 .thumb_func + 9187 HAL_TIM_OC_Start_IT: + 9188 .LVL748: + 9189 .LFB56: + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9190 .loc 1 879 1 is_stmt 1 view -0 + 9191 .cfi_startproc + 9192 @ args = 0, pretend = 0, frame = 0 + 9193 @ frame_needed = 0, uses_anonymous_args = 0 + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9194 .loc 1 879 1 is_stmt 0 view .LVU2902 + 9195 0000 10B5 push {r4, lr} + 9196 .cfi_def_cfa_offset 8 + 9197 .cfi_offset 4, -8 + 9198 .cfi_offset 14, -4 + 9199 0002 0400 movs r4, r0 + ARM GAS /tmp/cchCqftX.s page 337 + + + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 9200 .loc 1 880 3 is_stmt 1 view .LVU2903 + 9201 .LVL749: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9202 .loc 1 881 3 view .LVU2904 + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9203 .loc 1 884 3 view .LVU2905 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9204 .loc 1 887 3 view .LVU2906 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9205 .loc 1 887 44 is_stmt 0 view .LVU2907 + 9206 0004 0029 cmp r1, #0 + 9207 0006 35D1 bne .L524 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9208 .loc 1 887 7 discriminator 1 view .LVU2908 + 9209 0008 3E23 movs r3, #62 + 9210 000a C35C ldrb r3, [r0, r3] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9211 .loc 1 887 44 discriminator 1 view .LVU2909 + 9212 000c 013B subs r3, r3, #1 + 9213 000e 5A1E subs r2, r3, #1 + 9214 0010 9341 sbcs r3, r3, r2 + 9215 0012 DBB2 uxtb r3, r3 + 9216 .L525: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9217 .loc 1 887 6 discriminator 12 view .LVU2910 + 9218 0014 002B cmp r3, #0 + 9219 0016 7DD1 bne .L542 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9220 .loc 1 893 3 is_stmt 1 view .LVU2911 + 9221 0018 0029 cmp r1, #0 + 9222 001a 44D1 bne .L529 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9223 .loc 1 893 3 is_stmt 0 discriminator 1 view .LVU2912 + 9224 001c 3E33 adds r3, r3, #62 + 9225 001e 0222 movs r2, #2 + 9226 0020 E254 strb r2, [r4, r3] + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9227 .loc 1 895 3 is_stmt 1 view .LVU2913 + 9228 .L530: + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9229 .loc 1 900 7 view .LVU2914 + 9230 0022 2268 ldr r2, [r4] + 9231 0024 D368 ldr r3, [r2, #12] + 9232 0026 0220 movs r0, #2 + 9233 .LVL750: + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9234 .loc 1 900 7 is_stmt 0 view .LVU2915 + 9235 0028 0343 orrs r3, r0 + 9236 002a D360 str r3, [r2, #12] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9237 .loc 1 901 7 is_stmt 1 view .LVU2916 + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9238 .loc 1 930 3 view .LVU2917 + 9239 .L537: + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9240 .loc 1 933 5 view .LVU2918 + ARM GAS /tmp/cchCqftX.s page 338 + + + 9241 002c 2068 ldr r0, [r4] + 9242 002e 0122 movs r2, #1 + 9243 0030 FFF7FEFF bl TIM_CCxChannelCmd + 9244 .LVL751: + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9245 .loc 1 935 5 view .LVU2919 + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9246 .loc 1 935 9 is_stmt 0 view .LVU2920 + 9247 0034 2368 ldr r3, [r4] + 9248 0036 394A ldr r2, .L549 + 9249 0038 9342 cmp r3, r2 + 9250 003a 05D0 beq .L538 + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9251 .loc 1 935 9 discriminator 2 view .LVU2921 + 9252 003c 384A ldr r2, .L549+4 + 9253 003e 9342 cmp r3, r2 + 9254 0040 02D0 beq .L538 + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9255 .loc 1 935 9 discriminator 4 view .LVU2922 + 9256 0042 384A ldr r2, .L549+8 + 9257 0044 9342 cmp r3, r2 + 9258 0046 04D1 bne .L539 + 9259 .L538: + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9260 .loc 1 938 7 is_stmt 1 view .LVU2923 + 9261 0048 596C ldr r1, [r3, #68] + 9262 004a 8022 movs r2, #128 + 9263 004c 1202 lsls r2, r2, #8 + 9264 004e 0A43 orrs r2, r1 + 9265 0050 5A64 str r2, [r3, #68] + 9266 .L539: + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9267 .loc 1 942 5 view .LVU2924 + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9268 .loc 1 942 9 is_stmt 0 view .LVU2925 + 9269 0052 2368 ldr r3, [r4] + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9270 .loc 1 942 8 view .LVU2926 + 9271 0054 314A ldr r2, .L549 + 9272 0056 9342 cmp r3, r2 + 9273 0058 51D0 beq .L540 + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9274 .loc 1 942 9 discriminator 1 view .LVU2927 + 9275 005a 8022 movs r2, #128 + 9276 005c D205 lsls r2, r2, #23 + 9277 005e 9342 cmp r3, r2 + 9278 0060 4DD0 beq .L540 + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9279 .loc 1 942 9 discriminator 2 view .LVU2928 + 9280 0062 314A ldr r2, .L549+12 + 9281 0064 9342 cmp r3, r2 + 9282 0066 4AD0 beq .L540 + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9283 .loc 1 952 7 is_stmt 1 view .LVU2929 + 9284 0068 1A68 ldr r2, [r3] + 9285 006a 0121 movs r1, #1 + 9286 006c 0A43 orrs r2, r1 + ARM GAS /tmp/cchCqftX.s page 339 + + + 9287 006e 1A60 str r2, [r3] + 9288 0070 0020 movs r0, #0 + 9289 0072 50E0 b .L528 + 9290 .LVL752: + 9291 .L524: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9292 .loc 1 887 44 is_stmt 0 discriminator 2 view .LVU2930 + 9293 0074 0429 cmp r1, #4 + 9294 0076 08D0 beq .L544 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9295 .loc 1 887 44 discriminator 5 view .LVU2931 + 9296 0078 0829 cmp r1, #8 + 9297 007a 0DD0 beq .L545 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9298 .loc 1 887 7 discriminator 8 view .LVU2932 + 9299 007c 4123 movs r3, #65 + 9300 007e C35C ldrb r3, [r0, r3] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9301 .loc 1 887 44 discriminator 8 view .LVU2933 + 9302 0080 013B subs r3, r3, #1 + 9303 0082 5A1E subs r2, r3, #1 + 9304 0084 9341 sbcs r3, r3, r2 + 9305 0086 DBB2 uxtb r3, r3 + 9306 0088 C4E7 b .L525 + 9307 .L544: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9308 .loc 1 887 7 discriminator 4 view .LVU2934 + 9309 008a 3F23 movs r3, #63 + 9310 008c C35C ldrb r3, [r0, r3] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9311 .loc 1 887 44 discriminator 4 view .LVU2935 + 9312 008e 013B subs r3, r3, #1 + 9313 0090 5A1E subs r2, r3, #1 + 9314 0092 9341 sbcs r3, r3, r2 + 9315 0094 DBB2 uxtb r3, r3 + 9316 0096 BDE7 b .L525 + 9317 .L545: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9318 .loc 1 887 7 discriminator 7 view .LVU2936 + 9319 0098 4023 movs r3, #64 + 9320 009a C35C ldrb r3, [r0, r3] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9321 .loc 1 887 44 discriminator 7 view .LVU2937 + 9322 009c 013B subs r3, r3, #1 + 9323 009e 5A1E subs r2, r3, #1 + 9324 00a0 9341 sbcs r3, r3, r2 + 9325 00a2 DBB2 uxtb r3, r3 + 9326 00a4 B6E7 b .L525 + 9327 .L529: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9328 .loc 1 893 3 discriminator 2 view .LVU2938 + 9329 00a6 0429 cmp r1, #4 + 9330 00a8 0DD0 beq .L546 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9331 .loc 1 893 3 discriminator 4 view .LVU2939 + 9332 00aa 0829 cmp r1, #8 + 9333 00ac 14D0 beq .L547 + ARM GAS /tmp/cchCqftX.s page 340 + + + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9334 .loc 1 893 3 discriminator 7 view .LVU2940 + 9335 00ae 4123 movs r3, #65 + 9336 00b0 0222 movs r2, #2 + 9337 00b2 E254 strb r2, [r4, r3] + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9338 .loc 1 895 3 is_stmt 1 view .LVU2941 + 9339 00b4 0829 cmp r1, #8 + 9340 00b6 12D0 beq .L534 + 9341 00b8 17D8 bhi .L535 + 9342 00ba 0029 cmp r1, #0 + 9343 00bc B1D0 beq .L530 + 9344 00be 0429 cmp r1, #4 + 9345 00c0 04D0 beq .L532 + 9346 00c2 0120 movs r0, #1 + 9347 .LVL753: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9348 .loc 1 895 3 is_stmt 0 view .LVU2942 + 9349 00c4 27E0 b .L528 + 9350 .LVL754: + 9351 .L546: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9352 .loc 1 893 3 discriminator 3 view .LVU2943 + 9353 00c6 3F23 movs r3, #63 + 9354 00c8 0222 movs r2, #2 + 9355 00ca E254 strb r2, [r4, r3] + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9356 .loc 1 895 3 is_stmt 1 view .LVU2944 + 9357 .L532: + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9358 .loc 1 907 7 view .LVU2945 + 9359 00cc 2268 ldr r2, [r4] + 9360 00ce D368 ldr r3, [r2, #12] + 9361 00d0 0420 movs r0, #4 + 9362 .LVL755: + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9363 .loc 1 907 7 is_stmt 0 view .LVU2946 + 9364 00d2 0343 orrs r3, r0 + 9365 00d4 D360 str r3, [r2, #12] + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9366 .loc 1 908 7 is_stmt 1 view .LVU2947 + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9367 .loc 1 930 3 view .LVU2948 + 9368 00d6 A9E7 b .L537 + 9369 .LVL756: + 9370 .L547: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9371 .loc 1 893 3 is_stmt 0 discriminator 6 view .LVU2949 + 9372 00d8 4023 movs r3, #64 + 9373 00da 0222 movs r2, #2 + 9374 00dc E254 strb r2, [r4, r3] + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9375 .loc 1 895 3 is_stmt 1 view .LVU2950 + 9376 .L534: + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9377 .loc 1 914 7 view .LVU2951 + 9378 00de 2268 ldr r2, [r4] + ARM GAS /tmp/cchCqftX.s page 341 + + + 9379 00e0 D368 ldr r3, [r2, #12] + 9380 00e2 0820 movs r0, #8 + 9381 .LVL757: + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9382 .loc 1 914 7 is_stmt 0 view .LVU2952 + 9383 00e4 0343 orrs r3, r0 + 9384 00e6 D360 str r3, [r2, #12] + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9385 .loc 1 915 7 is_stmt 1 view .LVU2953 + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9386 .loc 1 930 3 view .LVU2954 + 9387 00e8 A0E7 b .L537 + 9388 .LVL758: + 9389 .L535: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9390 .loc 1 895 3 is_stmt 0 view .LVU2955 + 9391 00ea 0C29 cmp r1, #12 + 9392 00ec 05D1 bne .L548 + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9393 .loc 1 921 7 is_stmt 1 view .LVU2956 + 9394 00ee 2268 ldr r2, [r4] + 9395 00f0 D368 ldr r3, [r2, #12] + 9396 00f2 1020 movs r0, #16 + 9397 .LVL759: + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9398 .loc 1 921 7 is_stmt 0 view .LVU2957 + 9399 00f4 0343 orrs r3, r0 + 9400 00f6 D360 str r3, [r2, #12] + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9401 .loc 1 922 7 is_stmt 1 view .LVU2958 + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9402 .loc 1 930 3 view .LVU2959 + 9403 00f8 98E7 b .L537 + 9404 .LVL760: + 9405 .L548: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9406 .loc 1 895 3 is_stmt 0 view .LVU2960 + 9407 00fa 0120 movs r0, #1 + 9408 .LVL761: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9409 .loc 1 895 3 view .LVU2961 + 9410 00fc 0BE0 b .L528 + 9411 .LVL762: + 9412 .L540: + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9413 .loc 1 944 7 is_stmt 1 view .LVU2962 + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9414 .loc 1 944 31 is_stmt 0 view .LVU2963 + 9415 00fe 9968 ldr r1, [r3, #8] + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9416 .loc 1 944 15 view .LVU2964 + 9417 0100 0722 movs r2, #7 + 9418 0102 0A40 ands r2, r1 + 9419 .LVL763: + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9420 .loc 1 945 7 is_stmt 1 view .LVU2965 + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 342 + + + 9421 .loc 1 945 10 is_stmt 0 view .LVU2966 + 9422 0104 062A cmp r2, #6 + 9423 0106 07D0 beq .L543 + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9424 .loc 1 947 9 is_stmt 1 view .LVU2967 + 9425 0108 1A68 ldr r2, [r3] + 9426 .LVL764: + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9427 .loc 1 947 9 is_stmt 0 view .LVU2968 + 9428 010a 0121 movs r1, #1 + 9429 .LVL765: + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9430 .loc 1 947 9 view .LVU2969 + 9431 010c 0A43 orrs r2, r1 + 9432 010e 1A60 str r2, [r3] + 9433 0110 0020 movs r0, #0 + 9434 0112 00E0 b .L528 + 9435 .LVL766: + 9436 .L542: + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9437 .loc 1 889 12 view .LVU2970 + 9438 0114 0120 movs r0, #1 + 9439 .LVL767: + 9440 .L528: + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9441 .loc 1 958 1 view .LVU2971 + 9442 @ sp needed + 9443 .LVL768: + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9444 .loc 1 958 1 view .LVU2972 + 9445 0116 10BD pop {r4, pc} + 9446 .LVL769: + 9447 .L543: + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9448 .loc 1 958 1 view .LVU2973 + 9449 0118 0020 movs r0, #0 + 9450 011a FCE7 b .L528 + 9451 .L550: + 9452 .align 2 + 9453 .L549: + 9454 011c 002C0140 .word 1073818624 + 9455 0120 00440140 .word 1073824768 + 9456 0124 00480140 .word 1073825792 + 9457 0128 00040040 .word 1073742848 + 9458 .cfi_endproc + 9459 .LFE56: + 9461 .section .text.HAL_TIM_OC_Stop_IT,"ax",%progbits + 9462 .align 1 + 9463 .global HAL_TIM_OC_Stop_IT + 9464 .syntax unified + 9465 .code 16 + 9466 .thumb_func + 9468 HAL_TIM_OC_Stop_IT: + 9469 .LVL770: + 9470 .LFB57: + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9471 .loc 1 972 1 is_stmt 1 view -0 + ARM GAS /tmp/cchCqftX.s page 343 + + + 9472 .cfi_startproc + 9473 @ args = 0, pretend = 0, frame = 0 + 9474 @ frame_needed = 0, uses_anonymous_args = 0 + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9475 .loc 1 972 1 is_stmt 0 view .LVU2975 + 9476 0000 70B5 push {r4, r5, r6, lr} + 9477 .cfi_def_cfa_offset 16 + 9478 .cfi_offset 4, -16 + 9479 .cfi_offset 5, -12 + 9480 .cfi_offset 6, -8 + 9481 .cfi_offset 14, -4 + 9482 0002 0500 movs r5, r0 + 9483 0004 0C00 movs r4, r1 + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9484 .loc 1 973 3 is_stmt 1 view .LVU2976 + 9485 .LVL771: + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9486 .loc 1 976 3 view .LVU2977 + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9487 .loc 1 978 3 view .LVU2978 + 9488 0006 0829 cmp r1, #8 + 9489 0008 3ED0 beq .L552 + 9490 000a 0BD8 bhi .L553 + 9491 000c 0029 cmp r1, #0 + 9492 000e 13D0 beq .L554 + 9493 0010 0429 cmp r1, #4 + 9494 0012 05D1 bne .L565 + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9495 .loc 1 990 7 view .LVU2979 + 9496 0014 0268 ldr r2, [r0] + 9497 0016 D368 ldr r3, [r2, #12] + 9498 0018 0421 movs r1, #4 + 9499 .LVL772: + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9500 .loc 1 990 7 is_stmt 0 view .LVU2980 + 9501 001a 8B43 bics r3, r1 + 9502 001c D360 str r3, [r2, #12] + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9503 .loc 1 991 7 is_stmt 1 view .LVU2981 +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9504 .loc 1 1013 3 view .LVU2982 + 9505 001e 10E0 b .L558 + 9506 .LVL773: + 9507 .L565: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9508 .loc 1 978 3 is_stmt 0 view .LVU2983 + 9509 0020 0120 movs r0, #1 + 9510 .LVL774: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9511 .loc 1 978 3 view .LVU2984 + 9512 0022 30E0 b .L556 + 9513 .LVL775: + 9514 .L553: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9515 .loc 1 978 3 view .LVU2985 + 9516 0024 0C29 cmp r1, #12 + 9517 0026 05D1 bne .L566 + ARM GAS /tmp/cchCqftX.s page 344 + + +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9518 .loc 1 1004 7 is_stmt 1 view .LVU2986 + 9519 0028 0268 ldr r2, [r0] + 9520 002a D368 ldr r3, [r2, #12] + 9521 002c 1021 movs r1, #16 + 9522 .LVL776: +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9523 .loc 1 1004 7 is_stmt 0 view .LVU2987 + 9524 002e 8B43 bics r3, r1 + 9525 0030 D360 str r3, [r2, #12] +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9526 .loc 1 1005 7 is_stmt 1 view .LVU2988 +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9527 .loc 1 1013 3 view .LVU2989 + 9528 0032 06E0 b .L558 + 9529 .LVL777: + 9530 .L566: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9531 .loc 1 978 3 is_stmt 0 view .LVU2990 + 9532 0034 0120 movs r0, #1 + 9533 .LVL778: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9534 .loc 1 978 3 view .LVU2991 + 9535 0036 26E0 b .L556 + 9536 .LVL779: + 9537 .L554: + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9538 .loc 1 983 7 is_stmt 1 view .LVU2992 + 9539 0038 0268 ldr r2, [r0] + 9540 003a D368 ldr r3, [r2, #12] + 9541 003c 0221 movs r1, #2 + 9542 .LVL780: + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9543 .loc 1 983 7 is_stmt 0 view .LVU2993 + 9544 003e 8B43 bics r3, r1 + 9545 0040 D360 str r3, [r2, #12] + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9546 .loc 1 984 7 is_stmt 1 view .LVU2994 +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9547 .loc 1 1013 3 view .LVU2995 + 9548 .L558: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9549 .loc 1 1016 5 view .LVU2996 + 9550 0042 2868 ldr r0, [r5] + 9551 .LVL781: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9552 .loc 1 1016 5 is_stmt 0 view .LVU2997 + 9553 0044 0022 movs r2, #0 + 9554 0046 2100 movs r1, r4 + 9555 0048 FFF7FEFF bl TIM_CCxChannelCmd + 9556 .LVL782: +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9557 .loc 1 1018 5 is_stmt 1 view .LVU2998 +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9558 .loc 1 1018 9 is_stmt 0 view .LVU2999 + 9559 004c 2B68 ldr r3, [r5] + 9560 004e 214A ldr r2, .L569 + ARM GAS /tmp/cchCqftX.s page 345 + + + 9561 0050 9342 cmp r3, r2 + 9562 0052 1FD0 beq .L559 +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9563 .loc 1 1018 9 discriminator 2 view .LVU3000 + 9564 0054 204A ldr r2, .L569+4 + 9565 0056 9342 cmp r3, r2 + 9566 0058 1CD0 beq .L559 +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9567 .loc 1 1018 9 discriminator 4 view .LVU3001 + 9568 005a 204A ldr r2, .L569+8 + 9569 005c 9342 cmp r3, r2 + 9570 005e 19D0 beq .L559 + 9571 .L560: +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9572 .loc 1 1021 7 is_stmt 1 discriminator 5 view .LVU3002 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9573 .loc 1 1025 5 view .LVU3003 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9574 .loc 1 1025 5 view .LVU3004 + 9575 0060 2B68 ldr r3, [r5] + 9576 0062 196A ldr r1, [r3, #32] + 9577 0064 1E4A ldr r2, .L569+12 + 9578 0066 1142 tst r1, r2 + 9579 0068 07D1 bne .L561 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9580 .loc 1 1025 5 discriminator 1 view .LVU3005 + 9581 006a 196A ldr r1, [r3, #32] + 9582 006c 1D4A ldr r2, .L569+16 + 9583 006e 1142 tst r1, r2 + 9584 0070 03D1 bne .L561 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9585 .loc 1 1025 5 discriminator 3 view .LVU3006 + 9586 0072 1A68 ldr r2, [r3] + 9587 0074 0121 movs r1, #1 + 9588 0076 8A43 bics r2, r1 + 9589 0078 1A60 str r2, [r3] + 9590 .L561: +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9591 .loc 1 1025 5 discriminator 5 view .LVU3007 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9592 .loc 1 1028 5 view .LVU3008 + 9593 007a 002C cmp r4, #0 + 9594 007c 17D1 bne .L562 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9595 .loc 1 1028 5 is_stmt 0 discriminator 1 view .LVU3009 + 9596 007e 3E23 movs r3, #62 + 9597 0080 0122 movs r2, #1 + 9598 0082 EA54 strb r2, [r5, r3] + 9599 0084 0020 movs r0, #0 + 9600 .L556: + 9601 .LVL783: +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9602 .loc 1 1032 3 is_stmt 1 view .LVU3010 +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9603 .loc 1 1033 1 is_stmt 0 view .LVU3011 + 9604 @ sp needed + 9605 .LVL784: + ARM GAS /tmp/cchCqftX.s page 346 + + + 9606 .LVL785: +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9607 .loc 1 1033 1 view .LVU3012 + 9608 0086 70BD pop {r4, r5, r6, pc} + 9609 .LVL786: + 9610 .L552: + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9611 .loc 1 997 7 is_stmt 1 view .LVU3013 + 9612 0088 0268 ldr r2, [r0] + 9613 008a D368 ldr r3, [r2, #12] + 9614 008c 0821 movs r1, #8 + 9615 .LVL787: + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9616 .loc 1 997 7 is_stmt 0 view .LVU3014 + 9617 008e 8B43 bics r3, r1 + 9618 0090 D360 str r3, [r2, #12] + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9619 .loc 1 998 7 is_stmt 1 view .LVU3015 +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9620 .loc 1 1013 3 view .LVU3016 + 9621 0092 D6E7 b .L558 + 9622 .LVL788: + 9623 .L559: +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9624 .loc 1 1021 7 view .LVU3017 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9625 .loc 1 1021 7 view .LVU3018 + 9626 0094 196A ldr r1, [r3, #32] + 9627 0096 124A ldr r2, .L569+12 + 9628 0098 1142 tst r1, r2 + 9629 009a E1D1 bne .L560 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9630 .loc 1 1021 7 discriminator 1 view .LVU3019 + 9631 009c 196A ldr r1, [r3, #32] + 9632 009e 114A ldr r2, .L569+16 + 9633 00a0 1142 tst r1, r2 + 9634 00a2 DDD1 bne .L560 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9635 .loc 1 1021 7 discriminator 3 view .LVU3020 + 9636 00a4 5A6C ldr r2, [r3, #68] + 9637 00a6 1049 ldr r1, .L569+20 + 9638 00a8 0A40 ands r2, r1 + 9639 00aa 5A64 str r2, [r3, #68] + 9640 00ac D8E7 b .L560 + 9641 .L562: +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9642 .loc 1 1028 5 is_stmt 0 discriminator 2 view .LVU3021 + 9643 00ae 042C cmp r4, #4 + 9644 00b0 06D0 beq .L567 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9645 .loc 1 1028 5 discriminator 4 view .LVU3022 + 9646 00b2 082C cmp r4, #8 + 9647 00b4 09D0 beq .L568 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9648 .loc 1 1028 5 discriminator 7 view .LVU3023 + 9649 00b6 4123 movs r3, #65 + 9650 00b8 0122 movs r2, #1 + ARM GAS /tmp/cchCqftX.s page 347 + + + 9651 00ba EA54 strb r2, [r5, r3] + 9652 00bc 0020 movs r0, #0 + 9653 00be E2E7 b .L556 + 9654 .L567: +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9655 .loc 1 1028 5 discriminator 3 view .LVU3024 + 9656 00c0 3F23 movs r3, #63 + 9657 00c2 0122 movs r2, #1 + 9658 00c4 EA54 strb r2, [r5, r3] + 9659 00c6 0020 movs r0, #0 + 9660 00c8 DDE7 b .L556 + 9661 .L568: +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9662 .loc 1 1028 5 discriminator 6 view .LVU3025 + 9663 00ca 4023 movs r3, #64 + 9664 00cc 0122 movs r2, #1 + 9665 00ce EA54 strb r2, [r5, r3] + 9666 00d0 0020 movs r0, #0 + 9667 00d2 D8E7 b .L556 + 9668 .L570: + 9669 .align 2 + 9670 .L569: + 9671 00d4 002C0140 .word 1073818624 + 9672 00d8 00440140 .word 1073824768 + 9673 00dc 00480140 .word 1073825792 + 9674 00e0 11110000 .word 4369 + 9675 00e4 44040000 .word 1092 + 9676 00e8 FF7FFFFF .word -32769 + 9677 .cfi_endproc + 9678 .LFE57: + 9680 .section .text.HAL_TIM_OC_Start_DMA,"ax",%progbits + 9681 .align 1 + 9682 .global HAL_TIM_OC_Start_DMA + 9683 .syntax unified + 9684 .code 16 + 9685 .thumb_func + 9687 HAL_TIM_OC_Start_DMA: + 9688 .LVL789: + 9689 .LFB58: +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9690 .loc 1 1050 1 is_stmt 1 view -0 + 9691 .cfi_startproc + 9692 @ args = 0, pretend = 0, frame = 0 + 9693 @ frame_needed = 0, uses_anonymous_args = 0 +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9694 .loc 1 1050 1 is_stmt 0 view .LVU3027 + 9695 0000 70B5 push {r4, r5, r6, lr} + 9696 .cfi_def_cfa_offset 16 + 9697 .cfi_offset 4, -16 + 9698 .cfi_offset 5, -12 + 9699 .cfi_offset 6, -8 + 9700 .cfi_offset 14, -4 + 9701 0002 0600 movs r6, r0 + 9702 0004 0D00 movs r5, r1 + 9703 0006 1100 movs r1, r2 + 9704 .LVL790: +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + ARM GAS /tmp/cchCqftX.s page 348 + + + 9705 .loc 1 1051 3 is_stmt 1 view .LVU3028 +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9706 .loc 1 1052 3 view .LVU3029 +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9707 .loc 1 1055 3 view .LVU3030 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9708 .loc 1 1058 3 view .LVU3031 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9709 .loc 1 1058 44 is_stmt 0 view .LVU3032 + 9710 0008 002D cmp r5, #0 + 9711 000a 5DD1 bne .L572 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9712 .loc 1 1058 7 discriminator 1 view .LVU3033 + 9713 000c 3E22 movs r2, #62 + 9714 .LVL791: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9715 .loc 1 1058 7 discriminator 1 view .LVU3034 + 9716 000e 845C ldrb r4, [r0, r2] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9717 .loc 1 1058 44 discriminator 1 view .LVU3035 + 9718 0010 023C subs r4, r4, #2 + 9719 0012 6242 rsbs r2, r4, #0 + 9720 0014 5441 adcs r4, r4, r2 + 9721 0016 E4B2 uxtb r4, r4 + 9722 .L573: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9723 .loc 1 1058 6 discriminator 12 view .LVU3036 + 9724 0018 002C cmp r4, #0 + 9725 001a 00D0 beq .LCB8589 + 9726 001c F0E0 b .L594 @long jump + 9727 .LCB8589: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9728 .loc 1 1062 8 is_stmt 1 view .LVU3037 +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9729 .loc 1 1062 49 is_stmt 0 view .LVU3038 + 9730 001e 002D cmp r5, #0 + 9731 0020 6BD1 bne .L577 +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9732 .loc 1 1062 12 discriminator 1 view .LVU3039 + 9733 0022 3E22 movs r2, #62 + 9734 0024 B25C ldrb r2, [r6, r2] +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9735 .loc 1 1062 49 discriminator 1 view .LVU3040 + 9736 0026 013A subs r2, r2, #1 + 9737 0028 5042 rsbs r0, r2, #0 + 9738 002a 4241 adcs r2, r2, r0 + 9739 .LVL792: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9740 .loc 1 1062 49 discriminator 1 view .LVU3041 + 9741 002c D2B2 uxtb r2, r2 + 9742 .L578: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9743 .loc 1 1062 11 discriminator 12 view .LVU3042 + 9744 002e 002A cmp r2, #0 + 9745 0030 00D1 bne .LCB8603 + 9746 0032 E7E0 b .L595 @long jump + 9747 .LCB8603: + ARM GAS /tmp/cchCqftX.s page 349 + + +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9748 .loc 1 1064 5 is_stmt 1 view .LVU3043 +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9749 .loc 1 1064 8 is_stmt 0 view .LVU3044 + 9750 0034 0029 cmp r1, #0 + 9751 0036 00D1 bne .LCB8606 + 9752 0038 E6E0 b .L596 @long jump + 9753 .LCB8606: +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9754 .loc 1 1064 25 discriminator 1 view .LVU3045 + 9755 003a 002B cmp r3, #0 + 9756 003c 00D1 bne .LCB8608 + 9757 003e E5E0 b .L597 @long jump + 9758 .LCB8608: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9759 .loc 1 1070 7 is_stmt 1 view .LVU3046 + 9760 0040 002D cmp r5, #0 + 9761 0042 73D1 bne .L581 +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9762 .loc 1 1070 7 is_stmt 0 discriminator 1 view .LVU3047 + 9763 0044 3E22 movs r2, #62 + 9764 0046 0220 movs r0, #2 + 9765 0048 B054 strb r0, [r6, r2] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9766 .loc 1 1078 3 is_stmt 1 view .LVU3048 + 9767 .L582: +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9768 .loc 1 1083 7 view .LVU3049 +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9769 .loc 1 1083 17 is_stmt 0 view .LVU3050 + 9770 004a 726A ldr r2, [r6, #36] +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9771 .loc 1 1083 52 view .LVU3051 + 9772 004c 7548 ldr r0, .L610 + 9773 004e 9062 str r0, [r2, #40] +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9774 .loc 1 1084 7 is_stmt 1 view .LVU3052 +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9775 .loc 1 1084 17 is_stmt 0 view .LVU3053 + 9776 0050 726A ldr r2, [r6, #36] +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9777 .loc 1 1084 56 view .LVU3054 + 9778 0052 7548 ldr r0, .L610+4 + 9779 0054 D062 str r0, [r2, #44] +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9780 .loc 1 1087 7 is_stmt 1 view .LVU3055 +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9781 .loc 1 1087 17 is_stmt 0 view .LVU3056 + 9782 0056 726A ldr r2, [r6, #36] +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9783 .loc 1 1087 53 view .LVU3057 + 9784 0058 7448 ldr r0, .L610+8 + 9785 005a 1063 str r0, [r2, #48] +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9786 .loc 1 1090 7 is_stmt 1 view .LVU3058 +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9787 .loc 1 1090 88 is_stmt 0 view .LVU3059 + ARM GAS /tmp/cchCqftX.s page 350 + + + 9788 005c 3268 ldr r2, [r6] +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9789 .loc 1 1090 83 view .LVU3060 + 9790 005e 3432 adds r2, r2, #52 +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9791 .loc 1 1090 11 view .LVU3061 + 9792 0060 706A ldr r0, [r6, #36] + 9793 0062 FFF7FEFF bl HAL_DMA_Start_IT + 9794 .LVL793: +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9795 .loc 1 1090 10 discriminator 1 view .LVU3062 + 9796 0066 0028 cmp r0, #0 + 9797 0068 00D0 beq .LCB8640 + 9798 006a D1E0 b .L598 @long jump + 9799 .LCB8640: +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9800 .loc 1 1098 7 is_stmt 1 view .LVU3063 + 9801 006c 3268 ldr r2, [r6] + 9802 006e D168 ldr r1, [r2, #12] + 9803 0070 8023 movs r3, #128 + 9804 0072 9B00 lsls r3, r3, #2 + 9805 0074 0B43 orrs r3, r1 + 9806 0076 D360 str r3, [r2, #12] +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9807 .loc 1 1099 7 view .LVU3064 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9808 .loc 1 1171 3 view .LVU3065 + 9809 .L589: +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9810 .loc 1 1174 5 view .LVU3066 + 9811 0078 3068 ldr r0, [r6] + 9812 007a 0122 movs r2, #1 + 9813 007c 2900 movs r1, r5 + 9814 007e FFF7FEFF bl TIM_CCxChannelCmd + 9815 .LVL794: +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9816 .loc 1 1176 5 view .LVU3067 +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9817 .loc 1 1176 9 is_stmt 0 view .LVU3068 + 9818 0082 3368 ldr r3, [r6] + 9819 0084 6A4A ldr r2, .L610+12 + 9820 0086 9342 cmp r3, r2 + 9821 0088 05D0 beq .L590 +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9822 .loc 1 1176 9 discriminator 2 view .LVU3069 + 9823 008a 6A4A ldr r2, .L610+16 + 9824 008c 9342 cmp r3, r2 + 9825 008e 02D0 beq .L590 +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9826 .loc 1 1176 9 discriminator 4 view .LVU3070 + 9827 0090 694A ldr r2, .L610+20 + 9828 0092 9342 cmp r3, r2 + 9829 0094 04D1 bne .L591 + 9830 .L590: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9831 .loc 1 1179 7 is_stmt 1 view .LVU3071 + 9832 0096 596C ldr r1, [r3, #68] + ARM GAS /tmp/cchCqftX.s page 351 + + + 9833 0098 8022 movs r2, #128 + 9834 009a 1202 lsls r2, r2, #8 + 9835 009c 0A43 orrs r2, r1 + 9836 009e 5A64 str r2, [r3, #68] + 9837 .L591: +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9838 .loc 1 1183 5 view .LVU3072 +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9839 .loc 1 1183 9 is_stmt 0 view .LVU3073 + 9840 00a0 3368 ldr r3, [r6] +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9841 .loc 1 1183 8 view .LVU3074 + 9842 00a2 634A ldr r2, .L610+12 + 9843 00a4 9342 cmp r3, r2 + 9844 00a6 00D1 bne .LCB8683 + 9845 00a8 9FE0 b .L592 @long jump + 9846 .LCB8683: +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9847 .loc 1 1183 9 discriminator 1 view .LVU3075 + 9848 00aa 8022 movs r2, #128 + 9849 00ac D205 lsls r2, r2, #23 + 9850 00ae 9342 cmp r3, r2 + 9851 00b0 00D1 bne .LCB8687 + 9852 00b2 9AE0 b .L592 @long jump + 9853 .LCB8687: +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9854 .loc 1 1183 9 discriminator 2 view .LVU3076 + 9855 00b4 614A ldr r2, .L610+24 + 9856 00b6 9342 cmp r3, r2 + 9857 00b8 00D1 bne .LCB8690 + 9858 00ba 96E0 b .L592 @long jump + 9859 .LCB8690: +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9860 .loc 1 1193 7 is_stmt 1 view .LVU3077 + 9861 00bc 1A68 ldr r2, [r3] + 9862 00be 0121 movs r1, #1 + 9863 00c0 0A43 orrs r2, r1 + 9864 00c2 1A60 str r2, [r3] + 9865 00c4 0020 movs r0, #0 + 9866 00c6 9EE0 b .L576 + 9867 .LVL795: + 9868 .L572: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9869 .loc 1 1058 44 is_stmt 0 discriminator 2 view .LVU3078 + 9870 00c8 042D cmp r5, #4 + 9871 00ca 08D0 beq .L603 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9872 .loc 1 1058 44 discriminator 5 view .LVU3079 + 9873 00cc 082D cmp r5, #8 + 9874 00ce 0DD0 beq .L604 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9875 .loc 1 1058 7 discriminator 8 view .LVU3080 + 9876 00d0 4122 movs r2, #65 + 9877 00d2 845C ldrb r4, [r0, r2] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9878 .loc 1 1058 44 discriminator 8 view .LVU3081 + 9879 00d4 023C subs r4, r4, #2 + ARM GAS /tmp/cchCqftX.s page 352 + + + 9880 00d6 6242 rsbs r2, r4, #0 + 9881 00d8 5441 adcs r4, r4, r2 + 9882 00da E4B2 uxtb r4, r4 + 9883 00dc 9CE7 b .L573 + 9884 .L603: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9885 .loc 1 1058 7 discriminator 4 view .LVU3082 + 9886 00de 3F22 movs r2, #63 + 9887 00e0 845C ldrb r4, [r0, r2] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9888 .loc 1 1058 44 discriminator 4 view .LVU3083 + 9889 00e2 023C subs r4, r4, #2 + 9890 00e4 6242 rsbs r2, r4, #0 + 9891 00e6 5441 adcs r4, r4, r2 + 9892 00e8 E4B2 uxtb r4, r4 + 9893 00ea 95E7 b .L573 + 9894 .L604: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9895 .loc 1 1058 7 discriminator 7 view .LVU3084 + 9896 00ec 4022 movs r2, #64 + 9897 00ee 845C ldrb r4, [r0, r2] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9898 .loc 1 1058 44 discriminator 7 view .LVU3085 + 9899 00f0 023C subs r4, r4, #2 + 9900 00f2 6242 rsbs r2, r4, #0 + 9901 00f4 5441 adcs r4, r4, r2 + 9902 00f6 E4B2 uxtb r4, r4 + 9903 00f8 8EE7 b .L573 + 9904 .L577: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9905 .loc 1 1062 49 discriminator 2 view .LVU3086 + 9906 00fa 042D cmp r5, #4 + 9907 00fc 08D0 beq .L605 +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9908 .loc 1 1062 49 discriminator 5 view .LVU3087 + 9909 00fe 082D cmp r5, #8 + 9910 0100 0DD0 beq .L606 +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9911 .loc 1 1062 12 discriminator 8 view .LVU3088 + 9912 0102 4122 movs r2, #65 + 9913 0104 B25C ldrb r2, [r6, r2] +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9914 .loc 1 1062 49 discriminator 8 view .LVU3089 + 9915 0106 013A subs r2, r2, #1 + 9916 0108 5042 rsbs r0, r2, #0 + 9917 010a 4241 adcs r2, r2, r0 + 9918 .LVL796: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9919 .loc 1 1062 49 discriminator 8 view .LVU3090 + 9920 010c D2B2 uxtb r2, r2 + 9921 010e 8EE7 b .L578 + 9922 .LVL797: + 9923 .L605: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9924 .loc 1 1062 12 discriminator 4 view .LVU3091 + 9925 0110 3F22 movs r2, #63 + 9926 0112 B25C ldrb r2, [r6, r2] + ARM GAS /tmp/cchCqftX.s page 353 + + +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9927 .loc 1 1062 49 discriminator 4 view .LVU3092 + 9928 0114 013A subs r2, r2, #1 + 9929 0116 5042 rsbs r0, r2, #0 + 9930 0118 4241 adcs r2, r2, r0 + 9931 .LVL798: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9932 .loc 1 1062 49 discriminator 4 view .LVU3093 + 9933 011a D2B2 uxtb r2, r2 + 9934 011c 87E7 b .L578 + 9935 .LVL799: + 9936 .L606: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9937 .loc 1 1062 12 discriminator 7 view .LVU3094 + 9938 011e 4022 movs r2, #64 + 9939 0120 B25C ldrb r2, [r6, r2] +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9940 .loc 1 1062 49 discriminator 7 view .LVU3095 + 9941 0122 013A subs r2, r2, #1 + 9942 0124 5042 rsbs r0, r2, #0 + 9943 0126 4241 adcs r2, r2, r0 + 9944 .LVL800: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9945 .loc 1 1062 49 discriminator 7 view .LVU3096 + 9946 0128 D2B2 uxtb r2, r2 + 9947 012a 80E7 b .L578 + 9948 .L581: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9949 .loc 1 1070 7 discriminator 2 view .LVU3097 + 9950 012c 042D cmp r5, #4 + 9951 012e 0DD0 beq .L607 +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9952 .loc 1 1070 7 discriminator 4 view .LVU3098 + 9953 0130 082D cmp r5, #8 + 9954 0132 25D0 beq .L608 +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9955 .loc 1 1070 7 discriminator 7 view .LVU3099 + 9956 0134 4122 movs r2, #65 + 9957 0136 0220 movs r0, #2 + 9958 0138 B054 strb r0, [r6, r2] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9959 .loc 1 1078 3 is_stmt 1 view .LVU3100 + 9960 013a 082D cmp r5, #8 + 9961 013c 23D0 beq .L586 + 9962 013e 39D8 bhi .L587 + 9963 0140 002D cmp r5, #0 + 9964 0142 82D0 beq .L582 + 9965 0144 042D cmp r5, #4 + 9966 0146 04D0 beq .L584 + 9967 0148 0138 subs r0, r0, #1 + 9968 014a 5CE0 b .L576 + 9969 .L607: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9970 .loc 1 1070 7 is_stmt 0 discriminator 3 view .LVU3101 + 9971 014c 3F22 movs r2, #63 + 9972 014e 0220 movs r0, #2 + 9973 0150 B054 strb r0, [r6, r2] + ARM GAS /tmp/cchCqftX.s page 354 + + +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9974 .loc 1 1078 3 is_stmt 1 view .LVU3102 + 9975 .L584: +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9976 .loc 1 1105 7 view .LVU3103 +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9977 .loc 1 1105 17 is_stmt 0 view .LVU3104 + 9978 0152 B26A ldr r2, [r6, #40] +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9979 .loc 1 1105 52 view .LVU3105 + 9980 0154 3348 ldr r0, .L610 + 9981 0156 9062 str r0, [r2, #40] +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9982 .loc 1 1106 7 is_stmt 1 view .LVU3106 +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9983 .loc 1 1106 17 is_stmt 0 view .LVU3107 + 9984 0158 B26A ldr r2, [r6, #40] +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9985 .loc 1 1106 56 view .LVU3108 + 9986 015a 3348 ldr r0, .L610+4 + 9987 015c D062 str r0, [r2, #44] +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9988 .loc 1 1109 7 is_stmt 1 view .LVU3109 +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9989 .loc 1 1109 17 is_stmt 0 view .LVU3110 + 9990 015e B26A ldr r2, [r6, #40] +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9991 .loc 1 1109 53 view .LVU3111 + 9992 0160 3248 ldr r0, .L610+8 + 9993 0162 1063 str r0, [r2, #48] +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9994 .loc 1 1112 7 is_stmt 1 view .LVU3112 +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9995 .loc 1 1112 88 is_stmt 0 view .LVU3113 + 9996 0164 3268 ldr r2, [r6] +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9997 .loc 1 1112 83 view .LVU3114 + 9998 0166 3832 adds r2, r2, #56 +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9999 .loc 1 1112 11 view .LVU3115 + 10000 0168 B06A ldr r0, [r6, #40] + 10001 016a FFF7FEFF bl HAL_DMA_Start_IT + 10002 .LVL801: +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10003 .loc 1 1112 10 discriminator 1 view .LVU3116 + 10004 016e 0028 cmp r0, #0 + 10005 0170 50D1 bne .L599 +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10006 .loc 1 1120 7 is_stmt 1 view .LVU3117 + 10007 0172 3268 ldr r2, [r6] + 10008 0174 D168 ldr r1, [r2, #12] + 10009 0176 8023 movs r3, #128 + 10010 0178 DB00 lsls r3, r3, #3 + 10011 017a 0B43 orrs r3, r1 + 10012 017c D360 str r3, [r2, #12] +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10013 .loc 1 1121 7 view .LVU3118 + ARM GAS /tmp/cchCqftX.s page 355 + + +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10014 .loc 1 1171 3 view .LVU3119 + 10015 017e 7BE7 b .L589 + 10016 .LVL802: + 10017 .L608: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10018 .loc 1 1070 7 is_stmt 0 discriminator 6 view .LVU3120 + 10019 0180 4022 movs r2, #64 + 10020 0182 0220 movs r0, #2 + 10021 0184 B054 strb r0, [r6, r2] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10022 .loc 1 1078 3 is_stmt 1 view .LVU3121 + 10023 .L586: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10024 .loc 1 1127 7 view .LVU3122 +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10025 .loc 1 1127 17 is_stmt 0 view .LVU3123 + 10026 0186 F26A ldr r2, [r6, #44] +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10027 .loc 1 1127 52 view .LVU3124 + 10028 0188 2648 ldr r0, .L610 + 10029 018a 9062 str r0, [r2, #40] +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10030 .loc 1 1128 7 is_stmt 1 view .LVU3125 +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10031 .loc 1 1128 17 is_stmt 0 view .LVU3126 + 10032 018c F26A ldr r2, [r6, #44] +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10033 .loc 1 1128 56 view .LVU3127 + 10034 018e 2648 ldr r0, .L610+4 + 10035 0190 D062 str r0, [r2, #44] +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10036 .loc 1 1131 7 is_stmt 1 view .LVU3128 +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10037 .loc 1 1131 17 is_stmt 0 view .LVU3129 + 10038 0192 F26A ldr r2, [r6, #44] +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10039 .loc 1 1131 53 view .LVU3130 + 10040 0194 2548 ldr r0, .L610+8 + 10041 0196 1063 str r0, [r2, #48] +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10042 .loc 1 1134 7 is_stmt 1 view .LVU3131 +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10043 .loc 1 1134 88 is_stmt 0 view .LVU3132 + 10044 0198 3268 ldr r2, [r6] +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10045 .loc 1 1134 83 view .LVU3133 + 10046 019a 3C32 adds r2, r2, #60 +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10047 .loc 1 1134 11 view .LVU3134 + 10048 019c F06A ldr r0, [r6, #44] + 10049 019e FFF7FEFF bl HAL_DMA_Start_IT + 10050 .LVL803: +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10051 .loc 1 1134 10 discriminator 1 view .LVU3135 + 10052 01a2 0028 cmp r0, #0 + 10053 01a4 38D1 bne .L600 + ARM GAS /tmp/cchCqftX.s page 356 + + +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10054 .loc 1 1141 7 is_stmt 1 view .LVU3136 + 10055 01a6 3268 ldr r2, [r6] + 10056 01a8 D168 ldr r1, [r2, #12] + 10057 01aa 8023 movs r3, #128 + 10058 01ac 1B01 lsls r3, r3, #4 + 10059 01ae 0B43 orrs r3, r1 + 10060 01b0 D360 str r3, [r2, #12] +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10061 .loc 1 1142 7 view .LVU3137 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10062 .loc 1 1171 3 view .LVU3138 + 10063 01b2 61E7 b .L589 + 10064 .LVL804: + 10065 .L587: +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10066 .loc 1 1078 3 is_stmt 0 view .LVU3139 + 10067 01b4 0C2D cmp r5, #12 + 10068 01b6 16D1 bne .L609 +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10069 .loc 1 1148 7 is_stmt 1 view .LVU3140 +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10070 .loc 1 1148 17 is_stmt 0 view .LVU3141 + 10071 01b8 326B ldr r2, [r6, #48] +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10072 .loc 1 1148 52 view .LVU3142 + 10073 01ba 1A48 ldr r0, .L610 + 10074 01bc 9062 str r0, [r2, #40] +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10075 .loc 1 1149 7 is_stmt 1 view .LVU3143 +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10076 .loc 1 1149 17 is_stmt 0 view .LVU3144 + 10077 01be 326B ldr r2, [r6, #48] +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10078 .loc 1 1149 56 view .LVU3145 + 10079 01c0 1948 ldr r0, .L610+4 + 10080 01c2 D062 str r0, [r2, #44] +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10081 .loc 1 1152 7 is_stmt 1 view .LVU3146 +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10082 .loc 1 1152 17 is_stmt 0 view .LVU3147 + 10083 01c4 326B ldr r2, [r6, #48] +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10084 .loc 1 1152 53 view .LVU3148 + 10085 01c6 1948 ldr r0, .L610+8 + 10086 01c8 1063 str r0, [r2, #48] +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10087 .loc 1 1155 7 is_stmt 1 view .LVU3149 +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10088 .loc 1 1155 88 is_stmt 0 view .LVU3150 + 10089 01ca 3268 ldr r2, [r6] +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10090 .loc 1 1155 83 view .LVU3151 + 10091 01cc 4032 adds r2, r2, #64 +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10092 .loc 1 1155 11 view .LVU3152 + 10093 01ce 306B ldr r0, [r6, #48] + ARM GAS /tmp/cchCqftX.s page 357 + + + 10094 01d0 FFF7FEFF bl HAL_DMA_Start_IT + 10095 .LVL805: +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10096 .loc 1 1155 10 discriminator 1 view .LVU3153 + 10097 01d4 0028 cmp r0, #0 + 10098 01d6 21D1 bne .L601 +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10099 .loc 1 1162 7 is_stmt 1 view .LVU3154 + 10100 01d8 3268 ldr r2, [r6] + 10101 01da D168 ldr r1, [r2, #12] + 10102 01dc 8023 movs r3, #128 + 10103 01de 5B01 lsls r3, r3, #5 + 10104 01e0 0B43 orrs r3, r1 + 10105 01e2 D360 str r3, [r2, #12] +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10106 .loc 1 1163 7 view .LVU3155 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10107 .loc 1 1171 3 view .LVU3156 + 10108 01e4 48E7 b .L589 + 10109 .LVL806: + 10110 .L609: +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10111 .loc 1 1078 3 is_stmt 0 view .LVU3157 + 10112 01e6 0120 movs r0, #1 + 10113 01e8 0DE0 b .L576 + 10114 .LVL807: + 10115 .L592: +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10116 .loc 1 1185 7 is_stmt 1 view .LVU3158 +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10117 .loc 1 1185 31 is_stmt 0 view .LVU3159 + 10118 01ea 9968 ldr r1, [r3, #8] +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10119 .loc 1 1185 15 view .LVU3160 + 10120 01ec 0722 movs r2, #7 + 10121 01ee 0A40 ands r2, r1 + 10122 .LVL808: +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10123 .loc 1 1186 7 is_stmt 1 view .LVU3161 +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10124 .loc 1 1186 10 is_stmt 0 view .LVU3162 + 10125 01f0 062A cmp r2, #6 + 10126 01f2 15D0 beq .L602 +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10127 .loc 1 1188 9 is_stmt 1 view .LVU3163 + 10128 01f4 1A68 ldr r2, [r3] + 10129 .LVL809: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10130 .loc 1 1188 9 is_stmt 0 view .LVU3164 + 10131 01f6 0121 movs r1, #1 + 10132 .LVL810: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10133 .loc 1 1188 9 view .LVU3165 + 10134 01f8 0A43 orrs r2, r1 + 10135 01fa 1A60 str r2, [r3] + 10136 01fc 0020 movs r0, #0 + 10137 01fe 02E0 b .L576 + ARM GAS /tmp/cchCqftX.s page 358 + + + 10138 .LVL811: + 10139 .L594: +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10140 .loc 1 1060 12 view .LVU3166 + 10141 0200 0220 movs r0, #2 + 10142 .LVL812: +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10143 .loc 1 1060 12 view .LVU3167 + 10144 0202 00E0 b .L576 + 10145 .L595: +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10146 .loc 1 1075 12 view .LVU3168 + 10147 0204 0120 movs r0, #1 + 10148 .LVL813: + 10149 .L576: +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10150 .loc 1 1199 1 view .LVU3169 + 10151 @ sp needed + 10152 .LVL814: + 10153 .LVL815: +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10154 .loc 1 1199 1 view .LVU3170 + 10155 0206 70BD pop {r4, r5, r6, pc} + 10156 .LVL816: + 10157 .L596: +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10158 .loc 1 1066 14 view .LVU3171 + 10159 0208 0120 movs r0, #1 + 10160 020a FCE7 b .L576 + 10161 .L597: + 10162 020c 0120 movs r0, #1 + 10163 020e FAE7 b .L576 + 10164 .LVL817: + 10165 .L598: +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10166 .loc 1 1094 16 view .LVU3172 + 10167 0210 0120 movs r0, #1 + 10168 0212 F8E7 b .L576 + 10169 .L599: +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10170 .loc 1 1116 16 view .LVU3173 + 10171 0214 0120 movs r0, #1 + 10172 0216 F6E7 b .L576 + 10173 .L600: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10174 .loc 1 1138 16 view .LVU3174 + 10175 0218 0120 movs r0, #1 + 10176 021a F4E7 b .L576 + 10177 .L601: +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10178 .loc 1 1159 16 view .LVU3175 + 10179 021c 0120 movs r0, #1 + 10180 021e F2E7 b .L576 + 10181 .LVL818: + 10182 .L602: +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10183 .loc 1 1159 16 view .LVU3176 + ARM GAS /tmp/cchCqftX.s page 359 + + + 10184 0220 0020 movs r0, #0 + 10185 0222 F0E7 b .L576 + 10186 .L611: + 10187 .align 2 + 10188 .L610: + 10189 0224 00000000 .word TIM_DMADelayPulseCplt + 10190 0228 00000000 .word TIM_DMADelayPulseHalfCplt + 10191 022c 00000000 .word TIM_DMAError + 10192 0230 002C0140 .word 1073818624 + 10193 0234 00440140 .word 1073824768 + 10194 0238 00480140 .word 1073825792 + 10195 023c 00040040 .word 1073742848 + 10196 .cfi_endproc + 10197 .LFE58: + 10199 .section .text.HAL_TIM_OC_Stop_DMA,"ax",%progbits + 10200 .align 1 + 10201 .global HAL_TIM_OC_Stop_DMA + 10202 .syntax unified + 10203 .code 16 + 10204 .thumb_func + 10206 HAL_TIM_OC_Stop_DMA: + 10207 .LVL819: + 10208 .LFB59: +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10209 .loc 1 1213 1 is_stmt 1 view -0 + 10210 .cfi_startproc + 10211 @ args = 0, pretend = 0, frame = 0 + 10212 @ frame_needed = 0, uses_anonymous_args = 0 +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10213 .loc 1 1213 1 is_stmt 0 view .LVU3178 + 10214 0000 70B5 push {r4, r5, r6, lr} + 10215 .cfi_def_cfa_offset 16 + 10216 .cfi_offset 4, -16 + 10217 .cfi_offset 5, -12 + 10218 .cfi_offset 6, -8 + 10219 .cfi_offset 14, -4 + 10220 0002 0500 movs r5, r0 + 10221 0004 0C00 movs r4, r1 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10222 .loc 1 1214 3 is_stmt 1 view .LVU3179 + 10223 .LVL820: +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10224 .loc 1 1217 3 view .LVU3180 +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10225 .loc 1 1219 3 view .LVU3181 + 10226 0006 0829 cmp r1, #8 + 10227 0008 47D0 beq .L613 + 10228 000a 0ED8 bhi .L614 + 10229 000c 0029 cmp r1, #0 + 10230 000e 19D0 beq .L615 + 10231 0010 0429 cmp r1, #4 + 10232 0012 08D1 bne .L626 +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 10233 .loc 1 1232 7 view .LVU3182 + 10234 0014 0268 ldr r2, [r0] + 10235 0016 D368 ldr r3, [r2, #12] + 10236 0018 3449 ldr r1, .L630 + ARM GAS /tmp/cchCqftX.s page 360 + + + 10237 .LVL821: +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 10238 .loc 1 1232 7 is_stmt 0 view .LVU3183 + 10239 001a 0B40 ands r3, r1 + 10240 001c D360 str r3, [r2, #12] +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10241 .loc 1 1233 7 is_stmt 1 view .LVU3184 +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10242 .loc 1 1233 13 is_stmt 0 view .LVU3185 + 10243 001e 806A ldr r0, [r0, #40] + 10244 .LVL822: +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10245 .loc 1 1233 13 view .LVU3186 + 10246 0020 FFF7FEFF bl HAL_DMA_Abort_IT + 10247 .LVL823: +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10248 .loc 1 1234 7 is_stmt 1 view .LVU3187 +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10249 .loc 1 1258 3 view .LVU3188 + 10250 0024 16E0 b .L619 + 10251 .LVL824: + 10252 .L626: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10253 .loc 1 1219 3 is_stmt 0 view .LVU3189 + 10254 0026 0120 movs r0, #1 + 10255 .LVL825: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10256 .loc 1 1219 3 view .LVU3190 + 10257 0028 36E0 b .L617 + 10258 .LVL826: + 10259 .L614: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10260 .loc 1 1219 3 view .LVU3191 + 10261 002a 0C29 cmp r1, #12 + 10262 002c 08D1 bne .L627 +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 10263 .loc 1 1248 7 is_stmt 1 view .LVU3192 + 10264 002e 0268 ldr r2, [r0] + 10265 0030 D368 ldr r3, [r2, #12] + 10266 0032 2F49 ldr r1, .L630+4 + 10267 .LVL827: +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 10268 .loc 1 1248 7 is_stmt 0 view .LVU3193 + 10269 0034 0B40 ands r3, r1 + 10270 0036 D360 str r3, [r2, #12] +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10271 .loc 1 1249 7 is_stmt 1 view .LVU3194 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10272 .loc 1 1249 13 is_stmt 0 view .LVU3195 + 10273 0038 006B ldr r0, [r0, #48] + 10274 .LVL828: +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10275 .loc 1 1249 13 view .LVU3196 + 10276 003a FFF7FEFF bl HAL_DMA_Abort_IT + 10277 .LVL829: +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10278 .loc 1 1250 7 is_stmt 1 view .LVU3197 + ARM GAS /tmp/cchCqftX.s page 361 + + +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10279 .loc 1 1258 3 view .LVU3198 + 10280 003e 09E0 b .L619 + 10281 .LVL830: + 10282 .L627: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10283 .loc 1 1219 3 is_stmt 0 view .LVU3199 + 10284 0040 0120 movs r0, #1 + 10285 .LVL831: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10286 .loc 1 1219 3 view .LVU3200 + 10287 0042 29E0 b .L617 + 10288 .LVL832: + 10289 .L615: +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 10290 .loc 1 1224 7 is_stmt 1 view .LVU3201 + 10291 0044 0268 ldr r2, [r0] + 10292 0046 D368 ldr r3, [r2, #12] + 10293 0048 2A49 ldr r1, .L630+8 + 10294 .LVL833: +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 10295 .loc 1 1224 7 is_stmt 0 view .LVU3202 + 10296 004a 0B40 ands r3, r1 + 10297 004c D360 str r3, [r2, #12] +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10298 .loc 1 1225 7 is_stmt 1 view .LVU3203 +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10299 .loc 1 1225 13 is_stmt 0 view .LVU3204 + 10300 004e 406A ldr r0, [r0, #36] + 10301 .LVL834: +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10302 .loc 1 1225 13 view .LVU3205 + 10303 0050 FFF7FEFF bl HAL_DMA_Abort_IT + 10304 .LVL835: +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10305 .loc 1 1226 7 is_stmt 1 view .LVU3206 +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10306 .loc 1 1258 3 view .LVU3207 + 10307 .L619: +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10308 .loc 1 1261 5 view .LVU3208 + 10309 0054 2868 ldr r0, [r5] + 10310 0056 0022 movs r2, #0 + 10311 0058 2100 movs r1, r4 + 10312 005a FFF7FEFF bl TIM_CCxChannelCmd + 10313 .LVL836: +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10314 .loc 1 1263 5 view .LVU3209 +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10315 .loc 1 1263 9 is_stmt 0 view .LVU3210 + 10316 005e 2B68 ldr r3, [r5] + 10317 0060 254A ldr r2, .L630+12 + 10318 0062 9342 cmp r3, r2 + 10319 0064 22D0 beq .L620 +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10320 .loc 1 1263 9 discriminator 2 view .LVU3211 + 10321 0066 254A ldr r2, .L630+16 + ARM GAS /tmp/cchCqftX.s page 362 + + + 10322 0068 9342 cmp r3, r2 + 10323 006a 1FD0 beq .L620 +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10324 .loc 1 1263 9 discriminator 4 view .LVU3212 + 10325 006c 244A ldr r2, .L630+20 + 10326 006e 9342 cmp r3, r2 + 10327 0070 1CD0 beq .L620 + 10328 .L621: +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10329 .loc 1 1266 7 is_stmt 1 discriminator 5 view .LVU3213 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10330 .loc 1 1270 5 view .LVU3214 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10331 .loc 1 1270 5 view .LVU3215 + 10332 0072 2B68 ldr r3, [r5] + 10333 0074 196A ldr r1, [r3, #32] + 10334 0076 234A ldr r2, .L630+24 + 10335 0078 1142 tst r1, r2 + 10336 007a 07D1 bne .L622 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10337 .loc 1 1270 5 discriminator 1 view .LVU3216 + 10338 007c 196A ldr r1, [r3, #32] + 10339 007e 224A ldr r2, .L630+28 + 10340 0080 1142 tst r1, r2 + 10341 0082 03D1 bne .L622 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10342 .loc 1 1270 5 discriminator 3 view .LVU3217 + 10343 0084 1A68 ldr r2, [r3] + 10344 0086 0121 movs r1, #1 + 10345 0088 8A43 bics r2, r1 + 10346 008a 1A60 str r2, [r3] + 10347 .L622: +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10348 .loc 1 1270 5 discriminator 5 view .LVU3218 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10349 .loc 1 1273 5 view .LVU3219 + 10350 008c 002C cmp r4, #0 + 10351 008e 1AD1 bne .L623 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10352 .loc 1 1273 5 is_stmt 0 discriminator 1 view .LVU3220 + 10353 0090 3E23 movs r3, #62 + 10354 0092 0122 movs r2, #1 + 10355 0094 EA54 strb r2, [r5, r3] + 10356 0096 0020 movs r0, #0 + 10357 .L617: + 10358 .LVL837: +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10359 .loc 1 1277 3 is_stmt 1 view .LVU3221 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10360 .loc 1 1278 1 is_stmt 0 view .LVU3222 + 10361 @ sp needed + 10362 .LVL838: + 10363 .LVL839: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10364 .loc 1 1278 1 view .LVU3223 + 10365 0098 70BD pop {r4, r5, r6, pc} + 10366 .LVL840: + ARM GAS /tmp/cchCqftX.s page 363 + + + 10367 .L613: +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 10368 .loc 1 1240 7 is_stmt 1 view .LVU3224 + 10369 009a 0268 ldr r2, [r0] + 10370 009c D368 ldr r3, [r2, #12] + 10371 009e 1B49 ldr r1, .L630+32 + 10372 .LVL841: +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 10373 .loc 1 1240 7 is_stmt 0 view .LVU3225 + 10374 00a0 0B40 ands r3, r1 + 10375 00a2 D360 str r3, [r2, #12] +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10376 .loc 1 1241 7 is_stmt 1 view .LVU3226 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10377 .loc 1 1241 13 is_stmt 0 view .LVU3227 + 10378 00a4 C06A ldr r0, [r0, #44] + 10379 .LVL842: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10380 .loc 1 1241 13 view .LVU3228 + 10381 00a6 FFF7FEFF bl HAL_DMA_Abort_IT + 10382 .LVL843: +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10383 .loc 1 1242 7 is_stmt 1 view .LVU3229 +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10384 .loc 1 1258 3 view .LVU3230 + 10385 00aa D3E7 b .L619 + 10386 .L620: +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10387 .loc 1 1266 7 view .LVU3231 +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10388 .loc 1 1266 7 view .LVU3232 + 10389 00ac 196A ldr r1, [r3, #32] + 10390 00ae 154A ldr r2, .L630+24 + 10391 00b0 1142 tst r1, r2 + 10392 00b2 DED1 bne .L621 +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10393 .loc 1 1266 7 discriminator 1 view .LVU3233 + 10394 00b4 196A ldr r1, [r3, #32] + 10395 00b6 144A ldr r2, .L630+28 + 10396 00b8 1142 tst r1, r2 + 10397 00ba DAD1 bne .L621 +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10398 .loc 1 1266 7 discriminator 3 view .LVU3234 + 10399 00bc 5A6C ldr r2, [r3, #68] + 10400 00be 1449 ldr r1, .L630+36 + 10401 00c0 0A40 ands r2, r1 + 10402 00c2 5A64 str r2, [r3, #68] + 10403 00c4 D5E7 b .L621 + 10404 .L623: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10405 .loc 1 1273 5 is_stmt 0 discriminator 2 view .LVU3235 + 10406 00c6 042C cmp r4, #4 + 10407 00c8 06D0 beq .L628 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10408 .loc 1 1273 5 discriminator 4 view .LVU3236 + 10409 00ca 082C cmp r4, #8 + 10410 00cc 09D0 beq .L629 + ARM GAS /tmp/cchCqftX.s page 364 + + +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10411 .loc 1 1273 5 discriminator 7 view .LVU3237 + 10412 00ce 4123 movs r3, #65 + 10413 00d0 0122 movs r2, #1 + 10414 00d2 EA54 strb r2, [r5, r3] + 10415 00d4 0020 movs r0, #0 + 10416 00d6 DFE7 b .L617 + 10417 .L628: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10418 .loc 1 1273 5 discriminator 3 view .LVU3238 + 10419 00d8 3F23 movs r3, #63 + 10420 00da 0122 movs r2, #1 + 10421 00dc EA54 strb r2, [r5, r3] + 10422 00de 0020 movs r0, #0 + 10423 00e0 DAE7 b .L617 + 10424 .L629: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10425 .loc 1 1273 5 discriminator 6 view .LVU3239 + 10426 00e2 4023 movs r3, #64 + 10427 00e4 0122 movs r2, #1 + 10428 00e6 EA54 strb r2, [r5, r3] + 10429 00e8 0020 movs r0, #0 + 10430 00ea D5E7 b .L617 + 10431 .L631: + 10432 .align 2 + 10433 .L630: + 10434 00ec FFFBFFFF .word -1025 + 10435 00f0 FFEFFFFF .word -4097 + 10436 00f4 FFFDFFFF .word -513 + 10437 00f8 002C0140 .word 1073818624 + 10438 00fc 00440140 .word 1073824768 + 10439 0100 00480140 .word 1073825792 + 10440 0104 11110000 .word 4369 + 10441 0108 44040000 .word 1092 + 10442 010c FFF7FFFF .word -2049 + 10443 0110 FF7FFFFF .word -32769 + 10444 .cfi_endproc + 10445 .LFE59: + 10447 .section .text.HAL_TIM_PWM_Start,"ax",%progbits + 10448 .align 1 + 10449 .global HAL_TIM_PWM_Start + 10450 .syntax unified + 10451 .code 16 + 10452 .thumb_func + 10454 HAL_TIM_PWM_Start: + 10455 .LVL844: + 10456 .LFB64: +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 10457 .loc 1 1455 1 is_stmt 1 view -0 + 10458 .cfi_startproc + 10459 @ args = 0, pretend = 0, frame = 0 + 10460 @ frame_needed = 0, uses_anonymous_args = 0 +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 10461 .loc 1 1455 1 is_stmt 0 view .LVU3241 + 10462 0000 10B5 push {r4, lr} + 10463 .cfi_def_cfa_offset 8 + 10464 .cfi_offset 4, -8 + ARM GAS /tmp/cchCqftX.s page 365 + + + 10465 .cfi_offset 14, -4 + 10466 0002 0400 movs r4, r0 +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10467 .loc 1 1456 3 is_stmt 1 view .LVU3242 +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10468 .loc 1 1459 3 view .LVU3243 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10469 .loc 1 1462 3 view .LVU3244 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10470 .loc 1 1462 44 is_stmt 0 view .LVU3245 + 10471 0004 0029 cmp r1, #0 + 10472 0006 30D1 bne .L633 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10473 .loc 1 1462 7 discriminator 1 view .LVU3246 + 10474 0008 3E23 movs r3, #62 + 10475 000a C35C ldrb r3, [r0, r3] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10476 .loc 1 1462 44 discriminator 1 view .LVU3247 + 10477 000c 013B subs r3, r3, #1 + 10478 000e 5A1E subs r2, r3, #1 + 10479 0010 9341 sbcs r3, r3, r2 + 10480 0012 DBB2 uxtb r3, r3 + 10481 .L634: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10482 .loc 1 1462 6 discriminator 12 view .LVU3248 + 10483 0014 002B cmp r3, #0 + 10484 0016 5CD1 bne .L646 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10485 .loc 1 1468 3 is_stmt 1 view .LVU3249 + 10486 0018 0029 cmp r1, #0 + 10487 001a 3FD1 bne .L638 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10488 .loc 1 1468 3 is_stmt 0 discriminator 1 view .LVU3250 + 10489 001c 3E33 adds r3, r3, #62 + 10490 001e 0222 movs r2, #2 + 10491 0020 E254 strb r2, [r4, r3] + 10492 .L639: +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10493 .loc 1 1471 3 is_stmt 1 view .LVU3251 + 10494 0022 2068 ldr r0, [r4] + 10495 .LVL845: +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10496 .loc 1 1471 3 is_stmt 0 view .LVU3252 + 10497 0024 0122 movs r2, #1 + 10498 0026 FFF7FEFF bl TIM_CCxChannelCmd + 10499 .LVL846: +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10500 .loc 1 1473 3 is_stmt 1 view .LVU3253 +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10501 .loc 1 1473 7 is_stmt 0 view .LVU3254 + 10502 002a 2368 ldr r3, [r4] + 10503 002c 2B4A ldr r2, .L652 + 10504 002e 9342 cmp r3, r2 + 10505 0030 05D0 beq .L642 +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10506 .loc 1 1473 7 discriminator 2 view .LVU3255 + 10507 0032 2B4A ldr r2, .L652+4 + ARM GAS /tmp/cchCqftX.s page 366 + + + 10508 0034 9342 cmp r3, r2 + 10509 0036 02D0 beq .L642 +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10510 .loc 1 1473 7 discriminator 4 view .LVU3256 + 10511 0038 2A4A ldr r2, .L652+8 + 10512 003a 9342 cmp r3, r2 + 10513 003c 04D1 bne .L643 + 10514 .L642: +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10515 .loc 1 1476 5 is_stmt 1 view .LVU3257 + 10516 003e 596C ldr r1, [r3, #68] + 10517 0040 8022 movs r2, #128 + 10518 0042 1202 lsls r2, r2, #8 + 10519 0044 0A43 orrs r2, r1 + 10520 0046 5A64 str r2, [r3, #68] + 10521 .L643: +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10522 .loc 1 1480 3 view .LVU3258 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10523 .loc 1 1480 7 is_stmt 0 view .LVU3259 + 10524 0048 2368 ldr r3, [r4] +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10525 .loc 1 1480 6 view .LVU3260 + 10526 004a 244A ldr r2, .L652 + 10527 004c 9342 cmp r3, r2 + 10528 004e 35D0 beq .L644 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10529 .loc 1 1480 7 discriminator 1 view .LVU3261 + 10530 0050 8022 movs r2, #128 + 10531 0052 D205 lsls r2, r2, #23 + 10532 0054 9342 cmp r3, r2 + 10533 0056 31D0 beq .L644 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10534 .loc 1 1480 7 discriminator 2 view .LVU3262 + 10535 0058 234A ldr r2, .L652+12 + 10536 005a 9342 cmp r3, r2 + 10537 005c 2ED0 beq .L644 +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10538 .loc 1 1490 5 is_stmt 1 view .LVU3263 + 10539 005e 1A68 ldr r2, [r3] + 10540 0060 0121 movs r1, #1 + 10541 0062 0A43 orrs r2, r1 + 10542 0064 1A60 str r2, [r3] +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10543 .loc 1 1494 10 is_stmt 0 view .LVU3264 + 10544 0066 0020 movs r0, #0 + 10545 0068 34E0 b .L637 + 10546 .LVL847: + 10547 .L633: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10548 .loc 1 1462 44 discriminator 2 view .LVU3265 + 10549 006a 0429 cmp r1, #4 + 10550 006c 08D0 beq .L648 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10551 .loc 1 1462 44 discriminator 5 view .LVU3266 + 10552 006e 0829 cmp r1, #8 + 10553 0070 0DD0 beq .L649 + ARM GAS /tmp/cchCqftX.s page 367 + + +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10554 .loc 1 1462 7 discriminator 8 view .LVU3267 + 10555 0072 4123 movs r3, #65 + 10556 0074 C35C ldrb r3, [r0, r3] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10557 .loc 1 1462 44 discriminator 8 view .LVU3268 + 10558 0076 013B subs r3, r3, #1 + 10559 0078 5A1E subs r2, r3, #1 + 10560 007a 9341 sbcs r3, r3, r2 + 10561 007c DBB2 uxtb r3, r3 + 10562 007e C9E7 b .L634 + 10563 .L648: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10564 .loc 1 1462 7 discriminator 4 view .LVU3269 + 10565 0080 3F23 movs r3, #63 + 10566 0082 C35C ldrb r3, [r0, r3] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10567 .loc 1 1462 44 discriminator 4 view .LVU3270 + 10568 0084 013B subs r3, r3, #1 + 10569 0086 5A1E subs r2, r3, #1 + 10570 0088 9341 sbcs r3, r3, r2 + 10571 008a DBB2 uxtb r3, r3 + 10572 008c C2E7 b .L634 + 10573 .L649: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10574 .loc 1 1462 7 discriminator 7 view .LVU3271 + 10575 008e 4023 movs r3, #64 + 10576 0090 C35C ldrb r3, [r0, r3] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10577 .loc 1 1462 44 discriminator 7 view .LVU3272 + 10578 0092 013B subs r3, r3, #1 + 10579 0094 5A1E subs r2, r3, #1 + 10580 0096 9341 sbcs r3, r3, r2 + 10581 0098 DBB2 uxtb r3, r3 + 10582 009a BBE7 b .L634 + 10583 .L638: +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10584 .loc 1 1468 3 discriminator 2 view .LVU3273 + 10585 009c 0429 cmp r1, #4 + 10586 009e 05D0 beq .L650 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10587 .loc 1 1468 3 discriminator 4 view .LVU3274 + 10588 00a0 0829 cmp r1, #8 + 10589 00a2 07D0 beq .L651 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10590 .loc 1 1468 3 discriminator 7 view .LVU3275 + 10591 00a4 4123 movs r3, #65 + 10592 00a6 0222 movs r2, #2 + 10593 00a8 E254 strb r2, [r4, r3] + 10594 00aa BAE7 b .L639 + 10595 .L650: +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10596 .loc 1 1468 3 discriminator 3 view .LVU3276 + 10597 00ac 3F23 movs r3, #63 + 10598 00ae 0222 movs r2, #2 + 10599 00b0 E254 strb r2, [r4, r3] + 10600 00b2 B6E7 b .L639 + ARM GAS /tmp/cchCqftX.s page 368 + + + 10601 .L651: +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10602 .loc 1 1468 3 discriminator 6 view .LVU3277 + 10603 00b4 4023 movs r3, #64 + 10604 00b6 0222 movs r2, #2 + 10605 00b8 E254 strb r2, [r4, r3] + 10606 00ba B2E7 b .L639 + 10607 .LVL848: + 10608 .L644: +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10609 .loc 1 1482 5 is_stmt 1 view .LVU3278 +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10610 .loc 1 1482 29 is_stmt 0 view .LVU3279 + 10611 00bc 9968 ldr r1, [r3, #8] +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10612 .loc 1 1482 13 view .LVU3280 + 10613 00be 0722 movs r2, #7 + 10614 00c0 0A40 ands r2, r1 + 10615 .LVL849: +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10616 .loc 1 1483 5 is_stmt 1 view .LVU3281 +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10617 .loc 1 1483 8 is_stmt 0 view .LVU3282 + 10618 00c2 062A cmp r2, #6 + 10619 00c4 07D0 beq .L647 +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10620 .loc 1 1485 7 is_stmt 1 view .LVU3283 + 10621 00c6 1A68 ldr r2, [r3] + 10622 .LVL850: +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10623 .loc 1 1485 7 is_stmt 0 view .LVU3284 + 10624 00c8 0121 movs r1, #1 + 10625 .LVL851: +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10626 .loc 1 1485 7 view .LVU3285 + 10627 00ca 0A43 orrs r2, r1 + 10628 00cc 1A60 str r2, [r3] +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10629 .loc 1 1494 10 view .LVU3286 + 10630 00ce 0020 movs r0, #0 + 10631 00d0 00E0 b .L637 + 10632 .LVL852: + 10633 .L646: +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10634 .loc 1 1464 12 view .LVU3287 + 10635 00d2 0120 movs r0, #1 + 10636 .LVL853: + 10637 .L637: +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10638 .loc 1 1495 1 view .LVU3288 + 10639 @ sp needed + 10640 .LVL854: +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10641 .loc 1 1495 1 view .LVU3289 + 10642 00d4 10BD pop {r4, pc} + 10643 .LVL855: + 10644 .L647: + ARM GAS /tmp/cchCqftX.s page 369 + + +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10645 .loc 1 1494 10 view .LVU3290 + 10646 00d6 0020 movs r0, #0 + 10647 00d8 FCE7 b .L637 + 10648 .L653: + 10649 00da C046 .align 2 + 10650 .L652: + 10651 00dc 002C0140 .word 1073818624 + 10652 00e0 00440140 .word 1073824768 + 10653 00e4 00480140 .word 1073825792 + 10654 00e8 00040040 .word 1073742848 + 10655 .cfi_endproc + 10656 .LFE64: + 10658 .section .text.HAL_TIM_PWM_Stop,"ax",%progbits + 10659 .align 1 + 10660 .global HAL_TIM_PWM_Stop + 10661 .syntax unified + 10662 .code 16 + 10663 .thumb_func + 10665 HAL_TIM_PWM_Stop: + 10666 .LVL856: + 10667 .LFB65: +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 10668 .loc 1 1509 1 is_stmt 1 view -0 + 10669 .cfi_startproc + 10670 @ args = 0, pretend = 0, frame = 0 + 10671 @ frame_needed = 0, uses_anonymous_args = 0 +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 10672 .loc 1 1509 1 is_stmt 0 view .LVU3292 + 10673 0000 70B5 push {r4, r5, r6, lr} + 10674 .cfi_def_cfa_offset 16 + 10675 .cfi_offset 4, -16 + 10676 .cfi_offset 5, -12 + 10677 .cfi_offset 6, -8 + 10678 .cfi_offset 14, -4 + 10679 0002 0400 movs r4, r0 + 10680 0004 0D00 movs r5, r1 +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10681 .loc 1 1511 3 is_stmt 1 view .LVU3293 +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10682 .loc 1 1514 3 view .LVU3294 + 10683 0006 0068 ldr r0, [r0] + 10684 .LVL857: +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10685 .loc 1 1514 3 is_stmt 0 view .LVU3295 + 10686 0008 0022 movs r2, #0 + 10687 000a FFF7FEFF bl TIM_CCxChannelCmd + 10688 .LVL858: +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10689 .loc 1 1516 3 is_stmt 1 view .LVU3296 +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10690 .loc 1 1516 7 is_stmt 0 view .LVU3297 + 10691 000e 2368 ldr r3, [r4] + 10692 0010 1C4A ldr r2, .L664 + 10693 0012 9342 cmp r3, r2 + 10694 0014 19D0 beq .L655 +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 370 + + + 10695 .loc 1 1516 7 discriminator 2 view .LVU3298 + 10696 0016 1C4A ldr r2, .L664+4 + 10697 0018 9342 cmp r3, r2 + 10698 001a 16D0 beq .L655 +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10699 .loc 1 1516 7 discriminator 4 view .LVU3299 + 10700 001c 1B4A ldr r2, .L664+8 + 10701 001e 9342 cmp r3, r2 + 10702 0020 13D0 beq .L655 + 10703 .L656: +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10704 .loc 1 1519 5 is_stmt 1 discriminator 5 view .LVU3300 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10705 .loc 1 1523 3 view .LVU3301 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10706 .loc 1 1523 3 view .LVU3302 + 10707 0022 2368 ldr r3, [r4] + 10708 0024 196A ldr r1, [r3, #32] + 10709 0026 1A4A ldr r2, .L664+12 + 10710 0028 1142 tst r1, r2 + 10711 002a 07D1 bne .L657 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10712 .loc 1 1523 3 discriminator 1 view .LVU3303 + 10713 002c 196A ldr r1, [r3, #32] + 10714 002e 194A ldr r2, .L664+16 + 10715 0030 1142 tst r1, r2 + 10716 0032 03D1 bne .L657 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10717 .loc 1 1523 3 discriminator 3 view .LVU3304 + 10718 0034 1A68 ldr r2, [r3] + 10719 0036 0121 movs r1, #1 + 10720 0038 8A43 bics r2, r1 + 10721 003a 1A60 str r2, [r3] + 10722 .L657: +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10723 .loc 1 1523 3 discriminator 5 view .LVU3305 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10724 .loc 1 1526 3 view .LVU3306 + 10725 003c 002D cmp r5, #0 + 10726 003e 11D1 bne .L658 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10727 .loc 1 1526 3 is_stmt 0 discriminator 1 view .LVU3307 + 10728 0040 3E23 movs r3, #62 + 10729 0042 0122 movs r2, #1 + 10730 0044 E254 strb r2, [r4, r3] + 10731 .L659: +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10732 .loc 1 1529 3 is_stmt 1 view .LVU3308 +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10733 .loc 1 1530 1 is_stmt 0 view .LVU3309 + 10734 0046 0020 movs r0, #0 + 10735 @ sp needed + 10736 .LVL859: + 10737 .LVL860: +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10738 .loc 1 1530 1 view .LVU3310 + 10739 0048 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/cchCqftX.s page 371 + + + 10740 .LVL861: + 10741 .L655: +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10742 .loc 1 1519 5 is_stmt 1 view .LVU3311 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10743 .loc 1 1519 5 view .LVU3312 + 10744 004a 196A ldr r1, [r3, #32] + 10745 004c 104A ldr r2, .L664+12 + 10746 004e 1142 tst r1, r2 + 10747 0050 E7D1 bne .L656 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10748 .loc 1 1519 5 discriminator 1 view .LVU3313 + 10749 0052 196A ldr r1, [r3, #32] + 10750 0054 0F4A ldr r2, .L664+16 + 10751 0056 1142 tst r1, r2 + 10752 0058 E3D1 bne .L656 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10753 .loc 1 1519 5 discriminator 3 view .LVU3314 + 10754 005a 5A6C ldr r2, [r3, #68] + 10755 005c 0E49 ldr r1, .L664+20 + 10756 005e 0A40 ands r2, r1 + 10757 0060 5A64 str r2, [r3, #68] + 10758 0062 DEE7 b .L656 + 10759 .L658: +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10760 .loc 1 1526 3 is_stmt 0 discriminator 2 view .LVU3315 + 10761 0064 042D cmp r5, #4 + 10762 0066 05D0 beq .L662 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10763 .loc 1 1526 3 discriminator 4 view .LVU3316 + 10764 0068 082D cmp r5, #8 + 10765 006a 07D0 beq .L663 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10766 .loc 1 1526 3 discriminator 7 view .LVU3317 + 10767 006c 4123 movs r3, #65 + 10768 006e 0122 movs r2, #1 + 10769 0070 E254 strb r2, [r4, r3] + 10770 0072 E8E7 b .L659 + 10771 .L662: +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10772 .loc 1 1526 3 discriminator 3 view .LVU3318 + 10773 0074 3F23 movs r3, #63 + 10774 0076 0122 movs r2, #1 + 10775 0078 E254 strb r2, [r4, r3] + 10776 007a E4E7 b .L659 + 10777 .L663: +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10778 .loc 1 1526 3 discriminator 6 view .LVU3319 + 10779 007c 4023 movs r3, #64 + 10780 007e 0122 movs r2, #1 + 10781 0080 E254 strb r2, [r4, r3] + 10782 0082 E0E7 b .L659 + 10783 .L665: + 10784 .align 2 + 10785 .L664: + 10786 0084 002C0140 .word 1073818624 + 10787 0088 00440140 .word 1073824768 + ARM GAS /tmp/cchCqftX.s page 372 + + + 10788 008c 00480140 .word 1073825792 + 10789 0090 11110000 .word 4369 + 10790 0094 44040000 .word 1092 + 10791 0098 FF7FFFFF .word -32769 + 10792 .cfi_endproc + 10793 .LFE65: + 10795 .section .text.HAL_TIM_PWM_Start_IT,"ax",%progbits + 10796 .align 1 + 10797 .global HAL_TIM_PWM_Start_IT + 10798 .syntax unified + 10799 .code 16 + 10800 .thumb_func + 10802 HAL_TIM_PWM_Start_IT: + 10803 .LVL862: + 10804 .LFB66: +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10805 .loc 1 1544 1 is_stmt 1 view -0 + 10806 .cfi_startproc + 10807 @ args = 0, pretend = 0, frame = 0 + 10808 @ frame_needed = 0, uses_anonymous_args = 0 +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10809 .loc 1 1544 1 is_stmt 0 view .LVU3321 + 10810 0000 10B5 push {r4, lr} + 10811 .cfi_def_cfa_offset 8 + 10812 .cfi_offset 4, -8 + 10813 .cfi_offset 14, -4 + 10814 0002 0400 movs r4, r0 +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 10815 .loc 1 1545 3 is_stmt 1 view .LVU3322 + 10816 .LVL863: +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10817 .loc 1 1546 3 view .LVU3323 +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10818 .loc 1 1549 3 view .LVU3324 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10819 .loc 1 1552 3 view .LVU3325 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10820 .loc 1 1552 44 is_stmt 0 view .LVU3326 + 10821 0004 0029 cmp r1, #0 + 10822 0006 35D1 bne .L667 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10823 .loc 1 1552 7 discriminator 1 view .LVU3327 + 10824 0008 3E23 movs r3, #62 + 10825 000a C35C ldrb r3, [r0, r3] +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10826 .loc 1 1552 44 discriminator 1 view .LVU3328 + 10827 000c 013B subs r3, r3, #1 + 10828 000e 5A1E subs r2, r3, #1 + 10829 0010 9341 sbcs r3, r3, r2 + 10830 0012 DBB2 uxtb r3, r3 + 10831 .L668: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10832 .loc 1 1552 6 discriminator 12 view .LVU3329 + 10833 0014 002B cmp r3, #0 + 10834 0016 7DD1 bne .L685 +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10835 .loc 1 1558 3 is_stmt 1 view .LVU3330 + ARM GAS /tmp/cchCqftX.s page 373 + + + 10836 0018 0029 cmp r1, #0 + 10837 001a 44D1 bne .L672 +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10838 .loc 1 1558 3 is_stmt 0 discriminator 1 view .LVU3331 + 10839 001c 3E33 adds r3, r3, #62 + 10840 001e 0222 movs r2, #2 + 10841 0020 E254 strb r2, [r4, r3] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10842 .loc 1 1560 3 is_stmt 1 view .LVU3332 + 10843 .L673: +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10844 .loc 1 1565 7 view .LVU3333 + 10845 0022 2268 ldr r2, [r4] + 10846 0024 D368 ldr r3, [r2, #12] + 10847 0026 0220 movs r0, #2 + 10848 .LVL864: +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10849 .loc 1 1565 7 is_stmt 0 view .LVU3334 + 10850 0028 0343 orrs r3, r0 + 10851 002a D360 str r3, [r2, #12] +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10852 .loc 1 1566 7 is_stmt 1 view .LVU3335 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10853 .loc 1 1595 3 view .LVU3336 + 10854 .L680: +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10855 .loc 1 1598 5 view .LVU3337 + 10856 002c 2068 ldr r0, [r4] + 10857 002e 0122 movs r2, #1 + 10858 0030 FFF7FEFF bl TIM_CCxChannelCmd + 10859 .LVL865: +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10860 .loc 1 1600 5 view .LVU3338 +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10861 .loc 1 1600 9 is_stmt 0 view .LVU3339 + 10862 0034 2368 ldr r3, [r4] + 10863 0036 394A ldr r2, .L692 + 10864 0038 9342 cmp r3, r2 + 10865 003a 05D0 beq .L681 +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10866 .loc 1 1600 9 discriminator 2 view .LVU3340 + 10867 003c 384A ldr r2, .L692+4 + 10868 003e 9342 cmp r3, r2 + 10869 0040 02D0 beq .L681 +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10870 .loc 1 1600 9 discriminator 4 view .LVU3341 + 10871 0042 384A ldr r2, .L692+8 + 10872 0044 9342 cmp r3, r2 + 10873 0046 04D1 bne .L682 + 10874 .L681: +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10875 .loc 1 1603 7 is_stmt 1 view .LVU3342 + 10876 0048 596C ldr r1, [r3, #68] + 10877 004a 8022 movs r2, #128 + 10878 004c 1202 lsls r2, r2, #8 + 10879 004e 0A43 orrs r2, r1 + 10880 0050 5A64 str r2, [r3, #68] + ARM GAS /tmp/cchCqftX.s page 374 + + + 10881 .L682: +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10882 .loc 1 1607 5 view .LVU3343 +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10883 .loc 1 1607 9 is_stmt 0 view .LVU3344 + 10884 0052 2368 ldr r3, [r4] +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10885 .loc 1 1607 8 view .LVU3345 + 10886 0054 314A ldr r2, .L692 + 10887 0056 9342 cmp r3, r2 + 10888 0058 51D0 beq .L683 +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10889 .loc 1 1607 9 discriminator 1 view .LVU3346 + 10890 005a 8022 movs r2, #128 + 10891 005c D205 lsls r2, r2, #23 + 10892 005e 9342 cmp r3, r2 + 10893 0060 4DD0 beq .L683 +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10894 .loc 1 1607 9 discriminator 2 view .LVU3347 + 10895 0062 314A ldr r2, .L692+12 + 10896 0064 9342 cmp r3, r2 + 10897 0066 4AD0 beq .L683 +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10898 .loc 1 1617 7 is_stmt 1 view .LVU3348 + 10899 0068 1A68 ldr r2, [r3] + 10900 006a 0121 movs r1, #1 + 10901 006c 0A43 orrs r2, r1 + 10902 006e 1A60 str r2, [r3] + 10903 0070 0020 movs r0, #0 + 10904 0072 50E0 b .L671 + 10905 .LVL866: + 10906 .L667: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10907 .loc 1 1552 44 is_stmt 0 discriminator 2 view .LVU3349 + 10908 0074 0429 cmp r1, #4 + 10909 0076 08D0 beq .L687 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10910 .loc 1 1552 44 discriminator 5 view .LVU3350 + 10911 0078 0829 cmp r1, #8 + 10912 007a 0DD0 beq .L688 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10913 .loc 1 1552 7 discriminator 8 view .LVU3351 + 10914 007c 4123 movs r3, #65 + 10915 007e C35C ldrb r3, [r0, r3] +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10916 .loc 1 1552 44 discriminator 8 view .LVU3352 + 10917 0080 013B subs r3, r3, #1 + 10918 0082 5A1E subs r2, r3, #1 + 10919 0084 9341 sbcs r3, r3, r2 + 10920 0086 DBB2 uxtb r3, r3 + 10921 0088 C4E7 b .L668 + 10922 .L687: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10923 .loc 1 1552 7 discriminator 4 view .LVU3353 + 10924 008a 3F23 movs r3, #63 + 10925 008c C35C ldrb r3, [r0, r3] +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 375 + + + 10926 .loc 1 1552 44 discriminator 4 view .LVU3354 + 10927 008e 013B subs r3, r3, #1 + 10928 0090 5A1E subs r2, r3, #1 + 10929 0092 9341 sbcs r3, r3, r2 + 10930 0094 DBB2 uxtb r3, r3 + 10931 0096 BDE7 b .L668 + 10932 .L688: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10933 .loc 1 1552 7 discriminator 7 view .LVU3355 + 10934 0098 4023 movs r3, #64 + 10935 009a C35C ldrb r3, [r0, r3] +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10936 .loc 1 1552 44 discriminator 7 view .LVU3356 + 10937 009c 013B subs r3, r3, #1 + 10938 009e 5A1E subs r2, r3, #1 + 10939 00a0 9341 sbcs r3, r3, r2 + 10940 00a2 DBB2 uxtb r3, r3 + 10941 00a4 B6E7 b .L668 + 10942 .L672: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10943 .loc 1 1558 3 discriminator 2 view .LVU3357 + 10944 00a6 0429 cmp r1, #4 + 10945 00a8 0DD0 beq .L689 +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10946 .loc 1 1558 3 discriminator 4 view .LVU3358 + 10947 00aa 0829 cmp r1, #8 + 10948 00ac 14D0 beq .L690 +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10949 .loc 1 1558 3 discriminator 7 view .LVU3359 + 10950 00ae 4123 movs r3, #65 + 10951 00b0 0222 movs r2, #2 + 10952 00b2 E254 strb r2, [r4, r3] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10953 .loc 1 1560 3 is_stmt 1 view .LVU3360 + 10954 00b4 0829 cmp r1, #8 + 10955 00b6 12D0 beq .L677 + 10956 00b8 17D8 bhi .L678 + 10957 00ba 0029 cmp r1, #0 + 10958 00bc B1D0 beq .L673 + 10959 00be 0429 cmp r1, #4 + 10960 00c0 04D0 beq .L675 + 10961 00c2 0120 movs r0, #1 + 10962 .LVL867: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10963 .loc 1 1560 3 is_stmt 0 view .LVU3361 + 10964 00c4 27E0 b .L671 + 10965 .LVL868: + 10966 .L689: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10967 .loc 1 1558 3 discriminator 3 view .LVU3362 + 10968 00c6 3F23 movs r3, #63 + 10969 00c8 0222 movs r2, #2 + 10970 00ca E254 strb r2, [r4, r3] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10971 .loc 1 1560 3 is_stmt 1 view .LVU3363 + 10972 .L675: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 376 + + + 10973 .loc 1 1572 7 view .LVU3364 + 10974 00cc 2268 ldr r2, [r4] + 10975 00ce D368 ldr r3, [r2, #12] + 10976 00d0 0420 movs r0, #4 + 10977 .LVL869: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10978 .loc 1 1572 7 is_stmt 0 view .LVU3365 + 10979 00d2 0343 orrs r3, r0 + 10980 00d4 D360 str r3, [r2, #12] +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10981 .loc 1 1573 7 is_stmt 1 view .LVU3366 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10982 .loc 1 1595 3 view .LVU3367 + 10983 00d6 A9E7 b .L680 + 10984 .LVL870: + 10985 .L690: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10986 .loc 1 1558 3 is_stmt 0 discriminator 6 view .LVU3368 + 10987 00d8 4023 movs r3, #64 + 10988 00da 0222 movs r2, #2 + 10989 00dc E254 strb r2, [r4, r3] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10990 .loc 1 1560 3 is_stmt 1 view .LVU3369 + 10991 .L677: +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10992 .loc 1 1579 7 view .LVU3370 + 10993 00de 2268 ldr r2, [r4] + 10994 00e0 D368 ldr r3, [r2, #12] + 10995 00e2 0820 movs r0, #8 + 10996 .LVL871: +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10997 .loc 1 1579 7 is_stmt 0 view .LVU3371 + 10998 00e4 0343 orrs r3, r0 + 10999 00e6 D360 str r3, [r2, #12] +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11000 .loc 1 1580 7 is_stmt 1 view .LVU3372 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11001 .loc 1 1595 3 view .LVU3373 + 11002 00e8 A0E7 b .L680 + 11003 .LVL872: + 11004 .L678: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11005 .loc 1 1560 3 is_stmt 0 view .LVU3374 + 11006 00ea 0C29 cmp r1, #12 + 11007 00ec 05D1 bne .L691 +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11008 .loc 1 1586 7 is_stmt 1 view .LVU3375 + 11009 00ee 2268 ldr r2, [r4] + 11010 00f0 D368 ldr r3, [r2, #12] + 11011 00f2 1020 movs r0, #16 + 11012 .LVL873: +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11013 .loc 1 1586 7 is_stmt 0 view .LVU3376 + 11014 00f4 0343 orrs r3, r0 + 11015 00f6 D360 str r3, [r2, #12] +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11016 .loc 1 1587 7 is_stmt 1 view .LVU3377 + ARM GAS /tmp/cchCqftX.s page 377 + + +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11017 .loc 1 1595 3 view .LVU3378 + 11018 00f8 98E7 b .L680 + 11019 .LVL874: + 11020 .L691: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11021 .loc 1 1560 3 is_stmt 0 view .LVU3379 + 11022 00fa 0120 movs r0, #1 + 11023 .LVL875: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11024 .loc 1 1560 3 view .LVU3380 + 11025 00fc 0BE0 b .L671 + 11026 .LVL876: + 11027 .L683: +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11028 .loc 1 1609 7 is_stmt 1 view .LVU3381 +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11029 .loc 1 1609 31 is_stmt 0 view .LVU3382 + 11030 00fe 9968 ldr r1, [r3, #8] +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11031 .loc 1 1609 15 view .LVU3383 + 11032 0100 0722 movs r2, #7 + 11033 0102 0A40 ands r2, r1 + 11034 .LVL877: +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11035 .loc 1 1610 7 is_stmt 1 view .LVU3384 +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11036 .loc 1 1610 10 is_stmt 0 view .LVU3385 + 11037 0104 062A cmp r2, #6 + 11038 0106 07D0 beq .L686 +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11039 .loc 1 1612 9 is_stmt 1 view .LVU3386 + 11040 0108 1A68 ldr r2, [r3] + 11041 .LVL878: +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11042 .loc 1 1612 9 is_stmt 0 view .LVU3387 + 11043 010a 0121 movs r1, #1 + 11044 .LVL879: +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11045 .loc 1 1612 9 view .LVU3388 + 11046 010c 0A43 orrs r2, r1 + 11047 010e 1A60 str r2, [r3] + 11048 0110 0020 movs r0, #0 + 11049 0112 00E0 b .L671 + 11050 .LVL880: + 11051 .L685: +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11052 .loc 1 1554 12 view .LVU3389 + 11053 0114 0120 movs r0, #1 + 11054 .LVL881: + 11055 .L671: +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11056 .loc 1 1623 1 view .LVU3390 + 11057 @ sp needed + 11058 .LVL882: +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11059 .loc 1 1623 1 view .LVU3391 + ARM GAS /tmp/cchCqftX.s page 378 + + + 11060 0116 10BD pop {r4, pc} + 11061 .LVL883: + 11062 .L686: +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11063 .loc 1 1623 1 view .LVU3392 + 11064 0118 0020 movs r0, #0 + 11065 011a FCE7 b .L671 + 11066 .L693: + 11067 .align 2 + 11068 .L692: + 11069 011c 002C0140 .word 1073818624 + 11070 0120 00440140 .word 1073824768 + 11071 0124 00480140 .word 1073825792 + 11072 0128 00040040 .word 1073742848 + 11073 .cfi_endproc + 11074 .LFE66: + 11076 .section .text.HAL_TIM_PWM_Stop_IT,"ax",%progbits + 11077 .align 1 + 11078 .global HAL_TIM_PWM_Stop_IT + 11079 .syntax unified + 11080 .code 16 + 11081 .thumb_func + 11083 HAL_TIM_PWM_Stop_IT: + 11084 .LVL884: + 11085 .LFB67: +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11086 .loc 1 1637 1 is_stmt 1 view -0 + 11087 .cfi_startproc + 11088 @ args = 0, pretend = 0, frame = 0 + 11089 @ frame_needed = 0, uses_anonymous_args = 0 +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11090 .loc 1 1637 1 is_stmt 0 view .LVU3394 + 11091 0000 70B5 push {r4, r5, r6, lr} + 11092 .cfi_def_cfa_offset 16 + 11093 .cfi_offset 4, -16 + 11094 .cfi_offset 5, -12 + 11095 .cfi_offset 6, -8 + 11096 .cfi_offset 14, -4 + 11097 0002 0500 movs r5, r0 + 11098 0004 0C00 movs r4, r1 +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11099 .loc 1 1638 3 is_stmt 1 view .LVU3395 + 11100 .LVL885: +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11101 .loc 1 1641 3 view .LVU3396 +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11102 .loc 1 1643 3 view .LVU3397 + 11103 0006 0829 cmp r1, #8 + 11104 0008 3ED0 beq .L695 + 11105 000a 0BD8 bhi .L696 + 11106 000c 0029 cmp r1, #0 + 11107 000e 13D0 beq .L697 + 11108 0010 0429 cmp r1, #4 + 11109 0012 05D1 bne .L708 +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11110 .loc 1 1655 7 view .LVU3398 + 11111 0014 0268 ldr r2, [r0] + ARM GAS /tmp/cchCqftX.s page 379 + + + 11112 0016 D368 ldr r3, [r2, #12] + 11113 0018 0421 movs r1, #4 + 11114 .LVL886: +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11115 .loc 1 1655 7 is_stmt 0 view .LVU3399 + 11116 001a 8B43 bics r3, r1 + 11117 001c D360 str r3, [r2, #12] +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11118 .loc 1 1656 7 is_stmt 1 view .LVU3400 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11119 .loc 1 1678 3 view .LVU3401 + 11120 001e 10E0 b .L701 + 11121 .LVL887: + 11122 .L708: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11123 .loc 1 1643 3 is_stmt 0 view .LVU3402 + 11124 0020 0120 movs r0, #1 + 11125 .LVL888: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11126 .loc 1 1643 3 view .LVU3403 + 11127 0022 30E0 b .L699 + 11128 .LVL889: + 11129 .L696: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11130 .loc 1 1643 3 view .LVU3404 + 11131 0024 0C29 cmp r1, #12 + 11132 0026 05D1 bne .L709 +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11133 .loc 1 1669 7 is_stmt 1 view .LVU3405 + 11134 0028 0268 ldr r2, [r0] + 11135 002a D368 ldr r3, [r2, #12] + 11136 002c 1021 movs r1, #16 + 11137 .LVL890: +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11138 .loc 1 1669 7 is_stmt 0 view .LVU3406 + 11139 002e 8B43 bics r3, r1 + 11140 0030 D360 str r3, [r2, #12] +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11141 .loc 1 1670 7 is_stmt 1 view .LVU3407 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11142 .loc 1 1678 3 view .LVU3408 + 11143 0032 06E0 b .L701 + 11144 .LVL891: + 11145 .L709: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11146 .loc 1 1643 3 is_stmt 0 view .LVU3409 + 11147 0034 0120 movs r0, #1 + 11148 .LVL892: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11149 .loc 1 1643 3 view .LVU3410 + 11150 0036 26E0 b .L699 + 11151 .LVL893: + 11152 .L697: +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11153 .loc 1 1648 7 is_stmt 1 view .LVU3411 + 11154 0038 0268 ldr r2, [r0] + 11155 003a D368 ldr r3, [r2, #12] + ARM GAS /tmp/cchCqftX.s page 380 + + + 11156 003c 0221 movs r1, #2 + 11157 .LVL894: +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11158 .loc 1 1648 7 is_stmt 0 view .LVU3412 + 11159 003e 8B43 bics r3, r1 + 11160 0040 D360 str r3, [r2, #12] +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11161 .loc 1 1649 7 is_stmt 1 view .LVU3413 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11162 .loc 1 1678 3 view .LVU3414 + 11163 .L701: +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11164 .loc 1 1681 5 view .LVU3415 + 11165 0042 2868 ldr r0, [r5] + 11166 .LVL895: +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11167 .loc 1 1681 5 is_stmt 0 view .LVU3416 + 11168 0044 0022 movs r2, #0 + 11169 0046 2100 movs r1, r4 + 11170 0048 FFF7FEFF bl TIM_CCxChannelCmd + 11171 .LVL896: +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11172 .loc 1 1683 5 is_stmt 1 view .LVU3417 +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11173 .loc 1 1683 9 is_stmt 0 view .LVU3418 + 11174 004c 2B68 ldr r3, [r5] + 11175 004e 214A ldr r2, .L712 + 11176 0050 9342 cmp r3, r2 + 11177 0052 1FD0 beq .L702 +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11178 .loc 1 1683 9 discriminator 2 view .LVU3419 + 11179 0054 204A ldr r2, .L712+4 + 11180 0056 9342 cmp r3, r2 + 11181 0058 1CD0 beq .L702 +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11182 .loc 1 1683 9 discriminator 4 view .LVU3420 + 11183 005a 204A ldr r2, .L712+8 + 11184 005c 9342 cmp r3, r2 + 11185 005e 19D0 beq .L702 + 11186 .L703: +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11187 .loc 1 1686 7 is_stmt 1 discriminator 5 view .LVU3421 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11188 .loc 1 1690 5 view .LVU3422 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11189 .loc 1 1690 5 view .LVU3423 + 11190 0060 2B68 ldr r3, [r5] + 11191 0062 196A ldr r1, [r3, #32] + 11192 0064 1E4A ldr r2, .L712+12 + 11193 0066 1142 tst r1, r2 + 11194 0068 07D1 bne .L704 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11195 .loc 1 1690 5 discriminator 1 view .LVU3424 + 11196 006a 196A ldr r1, [r3, #32] + 11197 006c 1D4A ldr r2, .L712+16 + 11198 006e 1142 tst r1, r2 + 11199 0070 03D1 bne .L704 + ARM GAS /tmp/cchCqftX.s page 381 + + +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11200 .loc 1 1690 5 discriminator 3 view .LVU3425 + 11201 0072 1A68 ldr r2, [r3] + 11202 0074 0121 movs r1, #1 + 11203 0076 8A43 bics r2, r1 + 11204 0078 1A60 str r2, [r3] + 11205 .L704: +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11206 .loc 1 1690 5 discriminator 5 view .LVU3426 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11207 .loc 1 1693 5 view .LVU3427 + 11208 007a 002C cmp r4, #0 + 11209 007c 17D1 bne .L705 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11210 .loc 1 1693 5 is_stmt 0 discriminator 1 view .LVU3428 + 11211 007e 3E23 movs r3, #62 + 11212 0080 0122 movs r2, #1 + 11213 0082 EA54 strb r2, [r5, r3] + 11214 0084 0020 movs r0, #0 + 11215 .L699: + 11216 .LVL897: +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11217 .loc 1 1697 3 is_stmt 1 view .LVU3429 +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11218 .loc 1 1698 1 is_stmt 0 view .LVU3430 + 11219 @ sp needed + 11220 .LVL898: + 11221 .LVL899: +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11222 .loc 1 1698 1 view .LVU3431 + 11223 0086 70BD pop {r4, r5, r6, pc} + 11224 .LVL900: + 11225 .L695: +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11226 .loc 1 1662 7 is_stmt 1 view .LVU3432 + 11227 0088 0268 ldr r2, [r0] + 11228 008a D368 ldr r3, [r2, #12] + 11229 008c 0821 movs r1, #8 + 11230 .LVL901: +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11231 .loc 1 1662 7 is_stmt 0 view .LVU3433 + 11232 008e 8B43 bics r3, r1 + 11233 0090 D360 str r3, [r2, #12] +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11234 .loc 1 1663 7 is_stmt 1 view .LVU3434 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11235 .loc 1 1678 3 view .LVU3435 + 11236 0092 D6E7 b .L701 + 11237 .LVL902: + 11238 .L702: +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11239 .loc 1 1686 7 view .LVU3436 +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11240 .loc 1 1686 7 view .LVU3437 + 11241 0094 196A ldr r1, [r3, #32] + 11242 0096 124A ldr r2, .L712+12 + 11243 0098 1142 tst r1, r2 + ARM GAS /tmp/cchCqftX.s page 382 + + + 11244 009a E1D1 bne .L703 +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11245 .loc 1 1686 7 discriminator 1 view .LVU3438 + 11246 009c 196A ldr r1, [r3, #32] + 11247 009e 114A ldr r2, .L712+16 + 11248 00a0 1142 tst r1, r2 + 11249 00a2 DDD1 bne .L703 +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11250 .loc 1 1686 7 discriminator 3 view .LVU3439 + 11251 00a4 5A6C ldr r2, [r3, #68] + 11252 00a6 1049 ldr r1, .L712+20 + 11253 00a8 0A40 ands r2, r1 + 11254 00aa 5A64 str r2, [r3, #68] + 11255 00ac D8E7 b .L703 + 11256 .L705: +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11257 .loc 1 1693 5 is_stmt 0 discriminator 2 view .LVU3440 + 11258 00ae 042C cmp r4, #4 + 11259 00b0 06D0 beq .L710 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11260 .loc 1 1693 5 discriminator 4 view .LVU3441 + 11261 00b2 082C cmp r4, #8 + 11262 00b4 09D0 beq .L711 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11263 .loc 1 1693 5 discriminator 7 view .LVU3442 + 11264 00b6 4123 movs r3, #65 + 11265 00b8 0122 movs r2, #1 + 11266 00ba EA54 strb r2, [r5, r3] + 11267 00bc 0020 movs r0, #0 + 11268 00be E2E7 b .L699 + 11269 .L710: +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11270 .loc 1 1693 5 discriminator 3 view .LVU3443 + 11271 00c0 3F23 movs r3, #63 + 11272 00c2 0122 movs r2, #1 + 11273 00c4 EA54 strb r2, [r5, r3] + 11274 00c6 0020 movs r0, #0 + 11275 00c8 DDE7 b .L699 + 11276 .L711: +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11277 .loc 1 1693 5 discriminator 6 view .LVU3444 + 11278 00ca 4023 movs r3, #64 + 11279 00cc 0122 movs r2, #1 + 11280 00ce EA54 strb r2, [r5, r3] + 11281 00d0 0020 movs r0, #0 + 11282 00d2 D8E7 b .L699 + 11283 .L713: + 11284 .align 2 + 11285 .L712: + 11286 00d4 002C0140 .word 1073818624 + 11287 00d8 00440140 .word 1073824768 + 11288 00dc 00480140 .word 1073825792 + 11289 00e0 11110000 .word 4369 + 11290 00e4 44040000 .word 1092 + 11291 00e8 FF7FFFFF .word -32769 + 11292 .cfi_endproc + 11293 .LFE67: + ARM GAS /tmp/cchCqftX.s page 383 + + + 11295 .section .text.HAL_TIM_PWM_Start_DMA,"ax",%progbits + 11296 .align 1 + 11297 .global HAL_TIM_PWM_Start_DMA + 11298 .syntax unified + 11299 .code 16 + 11300 .thumb_func + 11302 HAL_TIM_PWM_Start_DMA: + 11303 .LVL903: + 11304 .LFB68: +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11305 .loc 1 1715 1 is_stmt 1 view -0 + 11306 .cfi_startproc + 11307 @ args = 0, pretend = 0, frame = 0 + 11308 @ frame_needed = 0, uses_anonymous_args = 0 +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11309 .loc 1 1715 1 is_stmt 0 view .LVU3446 + 11310 0000 70B5 push {r4, r5, r6, lr} + 11311 .cfi_def_cfa_offset 16 + 11312 .cfi_offset 4, -16 + 11313 .cfi_offset 5, -12 + 11314 .cfi_offset 6, -8 + 11315 .cfi_offset 14, -4 + 11316 0002 0600 movs r6, r0 + 11317 0004 0D00 movs r5, r1 + 11318 0006 1100 movs r1, r2 + 11319 .LVL904: +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 11320 .loc 1 1716 3 is_stmt 1 view .LVU3447 +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11321 .loc 1 1717 3 view .LVU3448 +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11322 .loc 1 1720 3 view .LVU3449 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11323 .loc 1 1723 3 view .LVU3450 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11324 .loc 1 1723 44 is_stmt 0 view .LVU3451 + 11325 0008 002D cmp r5, #0 + 11326 000a 5DD1 bne .L715 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11327 .loc 1 1723 7 discriminator 1 view .LVU3452 + 11328 000c 3E22 movs r2, #62 + 11329 .LVL905: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11330 .loc 1 1723 7 discriminator 1 view .LVU3453 + 11331 000e 845C ldrb r4, [r0, r2] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11332 .loc 1 1723 44 discriminator 1 view .LVU3454 + 11333 0010 023C subs r4, r4, #2 + 11334 0012 6242 rsbs r2, r4, #0 + 11335 0014 5441 adcs r4, r4, r2 + 11336 0016 E4B2 uxtb r4, r4 + 11337 .L716: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11338 .loc 1 1723 6 discriminator 12 view .LVU3455 + 11339 0018 002C cmp r4, #0 + 11340 001a 00D0 beq .LCB10194 + 11341 001c F0E0 b .L737 @long jump + ARM GAS /tmp/cchCqftX.s page 384 + + + 11342 .LCB10194: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11343 .loc 1 1727 8 is_stmt 1 view .LVU3456 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11344 .loc 1 1727 49 is_stmt 0 view .LVU3457 + 11345 001e 002D cmp r5, #0 + 11346 0020 6BD1 bne .L720 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11347 .loc 1 1727 12 discriminator 1 view .LVU3458 + 11348 0022 3E22 movs r2, #62 + 11349 0024 B25C ldrb r2, [r6, r2] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11350 .loc 1 1727 49 discriminator 1 view .LVU3459 + 11351 0026 013A subs r2, r2, #1 + 11352 0028 5042 rsbs r0, r2, #0 + 11353 002a 4241 adcs r2, r2, r0 + 11354 .LVL906: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11355 .loc 1 1727 49 discriminator 1 view .LVU3460 + 11356 002c D2B2 uxtb r2, r2 + 11357 .L721: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11358 .loc 1 1727 11 discriminator 12 view .LVU3461 + 11359 002e 002A cmp r2, #0 + 11360 0030 00D1 bne .LCB10208 + 11361 0032 E7E0 b .L738 @long jump + 11362 .LCB10208: +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11363 .loc 1 1729 5 is_stmt 1 view .LVU3462 +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11364 .loc 1 1729 8 is_stmt 0 view .LVU3463 + 11365 0034 0029 cmp r1, #0 + 11366 0036 00D1 bne .LCB10211 + 11367 0038 E6E0 b .L739 @long jump + 11368 .LCB10211: +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11369 .loc 1 1729 25 discriminator 1 view .LVU3464 + 11370 003a 002B cmp r3, #0 + 11371 003c 00D1 bne .LCB10213 + 11372 003e E5E0 b .L740 @long jump + 11373 .LCB10213: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11374 .loc 1 1735 7 is_stmt 1 view .LVU3465 + 11375 0040 002D cmp r5, #0 + 11376 0042 73D1 bne .L724 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11377 .loc 1 1735 7 is_stmt 0 discriminator 1 view .LVU3466 + 11378 0044 3E22 movs r2, #62 + 11379 0046 0220 movs r0, #2 + 11380 0048 B054 strb r0, [r6, r2] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11381 .loc 1 1743 3 is_stmt 1 view .LVU3467 + 11382 .L725: +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11383 .loc 1 1748 7 view .LVU3468 +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11384 .loc 1 1748 17 is_stmt 0 view .LVU3469 + ARM GAS /tmp/cchCqftX.s page 385 + + + 11385 004a 726A ldr r2, [r6, #36] +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11386 .loc 1 1748 52 view .LVU3470 + 11387 004c 7548 ldr r0, .L753 + 11388 004e 9062 str r0, [r2, #40] +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11389 .loc 1 1749 7 is_stmt 1 view .LVU3471 +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11390 .loc 1 1749 17 is_stmt 0 view .LVU3472 + 11391 0050 726A ldr r2, [r6, #36] +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11392 .loc 1 1749 56 view .LVU3473 + 11393 0052 7548 ldr r0, .L753+4 + 11394 0054 D062 str r0, [r2, #44] +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11395 .loc 1 1752 7 is_stmt 1 view .LVU3474 +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11396 .loc 1 1752 17 is_stmt 0 view .LVU3475 + 11397 0056 726A ldr r2, [r6, #36] +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11398 .loc 1 1752 53 view .LVU3476 + 11399 0058 7448 ldr r0, .L753+8 + 11400 005a 1063 str r0, [r2, #48] +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11401 .loc 1 1755 7 is_stmt 1 view .LVU3477 +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11402 .loc 1 1755 88 is_stmt 0 view .LVU3478 + 11403 005c 3268 ldr r2, [r6] +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11404 .loc 1 1755 83 view .LVU3479 + 11405 005e 3432 adds r2, r2, #52 +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11406 .loc 1 1755 11 view .LVU3480 + 11407 0060 706A ldr r0, [r6, #36] + 11408 0062 FFF7FEFF bl HAL_DMA_Start_IT + 11409 .LVL907: +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11410 .loc 1 1755 10 discriminator 1 view .LVU3481 + 11411 0066 0028 cmp r0, #0 + 11412 0068 00D0 beq .LCB10245 + 11413 006a D1E0 b .L741 @long jump + 11414 .LCB10245: +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11415 .loc 1 1763 7 is_stmt 1 view .LVU3482 + 11416 006c 3268 ldr r2, [r6] + 11417 006e D168 ldr r1, [r2, #12] + 11418 0070 8023 movs r3, #128 + 11419 0072 9B00 lsls r3, r3, #2 + 11420 0074 0B43 orrs r3, r1 + 11421 0076 D360 str r3, [r2, #12] +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11422 .loc 1 1764 7 view .LVU3483 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11423 .loc 1 1835 3 view .LVU3484 + 11424 .L732: +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11425 .loc 1 1838 5 view .LVU3485 + ARM GAS /tmp/cchCqftX.s page 386 + + + 11426 0078 3068 ldr r0, [r6] + 11427 007a 0122 movs r2, #1 + 11428 007c 2900 movs r1, r5 + 11429 007e FFF7FEFF bl TIM_CCxChannelCmd + 11430 .LVL908: +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11431 .loc 1 1840 5 view .LVU3486 +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11432 .loc 1 1840 9 is_stmt 0 view .LVU3487 + 11433 0082 3368 ldr r3, [r6] + 11434 0084 6A4A ldr r2, .L753+12 + 11435 0086 9342 cmp r3, r2 + 11436 0088 05D0 beq .L733 +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11437 .loc 1 1840 9 discriminator 2 view .LVU3488 + 11438 008a 6A4A ldr r2, .L753+16 + 11439 008c 9342 cmp r3, r2 + 11440 008e 02D0 beq .L733 +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11441 .loc 1 1840 9 discriminator 4 view .LVU3489 + 11442 0090 694A ldr r2, .L753+20 + 11443 0092 9342 cmp r3, r2 + 11444 0094 04D1 bne .L734 + 11445 .L733: +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11446 .loc 1 1843 7 is_stmt 1 view .LVU3490 + 11447 0096 596C ldr r1, [r3, #68] + 11448 0098 8022 movs r2, #128 + 11449 009a 1202 lsls r2, r2, #8 + 11450 009c 0A43 orrs r2, r1 + 11451 009e 5A64 str r2, [r3, #68] + 11452 .L734: +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11453 .loc 1 1847 5 view .LVU3491 +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11454 .loc 1 1847 9 is_stmt 0 view .LVU3492 + 11455 00a0 3368 ldr r3, [r6] +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11456 .loc 1 1847 8 view .LVU3493 + 11457 00a2 634A ldr r2, .L753+12 + 11458 00a4 9342 cmp r3, r2 + 11459 00a6 00D1 bne .LCB10288 + 11460 00a8 9FE0 b .L735 @long jump + 11461 .LCB10288: +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11462 .loc 1 1847 9 discriminator 1 view .LVU3494 + 11463 00aa 8022 movs r2, #128 + 11464 00ac D205 lsls r2, r2, #23 + 11465 00ae 9342 cmp r3, r2 + 11466 00b0 00D1 bne .LCB10292 + 11467 00b2 9AE0 b .L735 @long jump + 11468 .LCB10292: +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11469 .loc 1 1847 9 discriminator 2 view .LVU3495 + 11470 00b4 614A ldr r2, .L753+24 + 11471 00b6 9342 cmp r3, r2 + 11472 00b8 00D1 bne .LCB10295 + ARM GAS /tmp/cchCqftX.s page 387 + + + 11473 00ba 96E0 b .L735 @long jump + 11474 .LCB10295: +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11475 .loc 1 1857 7 is_stmt 1 view .LVU3496 + 11476 00bc 1A68 ldr r2, [r3] + 11477 00be 0121 movs r1, #1 + 11478 00c0 0A43 orrs r2, r1 + 11479 00c2 1A60 str r2, [r3] + 11480 00c4 0020 movs r0, #0 + 11481 00c6 9EE0 b .L719 + 11482 .LVL909: + 11483 .L715: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11484 .loc 1 1723 44 is_stmt 0 discriminator 2 view .LVU3497 + 11485 00c8 042D cmp r5, #4 + 11486 00ca 08D0 beq .L746 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11487 .loc 1 1723 44 discriminator 5 view .LVU3498 + 11488 00cc 082D cmp r5, #8 + 11489 00ce 0DD0 beq .L747 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11490 .loc 1 1723 7 discriminator 8 view .LVU3499 + 11491 00d0 4122 movs r2, #65 + 11492 00d2 845C ldrb r4, [r0, r2] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11493 .loc 1 1723 44 discriminator 8 view .LVU3500 + 11494 00d4 023C subs r4, r4, #2 + 11495 00d6 6242 rsbs r2, r4, #0 + 11496 00d8 5441 adcs r4, r4, r2 + 11497 00da E4B2 uxtb r4, r4 + 11498 00dc 9CE7 b .L716 + 11499 .L746: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11500 .loc 1 1723 7 discriminator 4 view .LVU3501 + 11501 00de 3F22 movs r2, #63 + 11502 00e0 845C ldrb r4, [r0, r2] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11503 .loc 1 1723 44 discriminator 4 view .LVU3502 + 11504 00e2 023C subs r4, r4, #2 + 11505 00e4 6242 rsbs r2, r4, #0 + 11506 00e6 5441 adcs r4, r4, r2 + 11507 00e8 E4B2 uxtb r4, r4 + 11508 00ea 95E7 b .L716 + 11509 .L747: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11510 .loc 1 1723 7 discriminator 7 view .LVU3503 + 11511 00ec 4022 movs r2, #64 + 11512 00ee 845C ldrb r4, [r0, r2] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11513 .loc 1 1723 44 discriminator 7 view .LVU3504 + 11514 00f0 023C subs r4, r4, #2 + 11515 00f2 6242 rsbs r2, r4, #0 + 11516 00f4 5441 adcs r4, r4, r2 + 11517 00f6 E4B2 uxtb r4, r4 + 11518 00f8 8EE7 b .L716 + 11519 .L720: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 388 + + + 11520 .loc 1 1727 49 discriminator 2 view .LVU3505 + 11521 00fa 042D cmp r5, #4 + 11522 00fc 08D0 beq .L748 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11523 .loc 1 1727 49 discriminator 5 view .LVU3506 + 11524 00fe 082D cmp r5, #8 + 11525 0100 0DD0 beq .L749 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11526 .loc 1 1727 12 discriminator 8 view .LVU3507 + 11527 0102 4122 movs r2, #65 + 11528 0104 B25C ldrb r2, [r6, r2] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11529 .loc 1 1727 49 discriminator 8 view .LVU3508 + 11530 0106 013A subs r2, r2, #1 + 11531 0108 5042 rsbs r0, r2, #0 + 11532 010a 4241 adcs r2, r2, r0 + 11533 .LVL910: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11534 .loc 1 1727 49 discriminator 8 view .LVU3509 + 11535 010c D2B2 uxtb r2, r2 + 11536 010e 8EE7 b .L721 + 11537 .LVL911: + 11538 .L748: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11539 .loc 1 1727 12 discriminator 4 view .LVU3510 + 11540 0110 3F22 movs r2, #63 + 11541 0112 B25C ldrb r2, [r6, r2] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11542 .loc 1 1727 49 discriminator 4 view .LVU3511 + 11543 0114 013A subs r2, r2, #1 + 11544 0116 5042 rsbs r0, r2, #0 + 11545 0118 4241 adcs r2, r2, r0 + 11546 .LVL912: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11547 .loc 1 1727 49 discriminator 4 view .LVU3512 + 11548 011a D2B2 uxtb r2, r2 + 11549 011c 87E7 b .L721 + 11550 .LVL913: + 11551 .L749: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11552 .loc 1 1727 12 discriminator 7 view .LVU3513 + 11553 011e 4022 movs r2, #64 + 11554 0120 B25C ldrb r2, [r6, r2] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11555 .loc 1 1727 49 discriminator 7 view .LVU3514 + 11556 0122 013A subs r2, r2, #1 + 11557 0124 5042 rsbs r0, r2, #0 + 11558 0126 4241 adcs r2, r2, r0 + 11559 .LVL914: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11560 .loc 1 1727 49 discriminator 7 view .LVU3515 + 11561 0128 D2B2 uxtb r2, r2 + 11562 012a 80E7 b .L721 + 11563 .L724: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11564 .loc 1 1735 7 discriminator 2 view .LVU3516 + 11565 012c 042D cmp r5, #4 + ARM GAS /tmp/cchCqftX.s page 389 + + + 11566 012e 0DD0 beq .L750 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11567 .loc 1 1735 7 discriminator 4 view .LVU3517 + 11568 0130 082D cmp r5, #8 + 11569 0132 25D0 beq .L751 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11570 .loc 1 1735 7 discriminator 7 view .LVU3518 + 11571 0134 4122 movs r2, #65 + 11572 0136 0220 movs r0, #2 + 11573 0138 B054 strb r0, [r6, r2] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11574 .loc 1 1743 3 is_stmt 1 view .LVU3519 + 11575 013a 082D cmp r5, #8 + 11576 013c 23D0 beq .L729 + 11577 013e 39D8 bhi .L730 + 11578 0140 002D cmp r5, #0 + 11579 0142 82D0 beq .L725 + 11580 0144 042D cmp r5, #4 + 11581 0146 04D0 beq .L727 + 11582 0148 0138 subs r0, r0, #1 + 11583 014a 5CE0 b .L719 + 11584 .L750: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11585 .loc 1 1735 7 is_stmt 0 discriminator 3 view .LVU3520 + 11586 014c 3F22 movs r2, #63 + 11587 014e 0220 movs r0, #2 + 11588 0150 B054 strb r0, [r6, r2] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11589 .loc 1 1743 3 is_stmt 1 view .LVU3521 + 11590 .L727: +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11591 .loc 1 1770 7 view .LVU3522 +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11592 .loc 1 1770 17 is_stmt 0 view .LVU3523 + 11593 0152 B26A ldr r2, [r6, #40] +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11594 .loc 1 1770 52 view .LVU3524 + 11595 0154 3348 ldr r0, .L753 + 11596 0156 9062 str r0, [r2, #40] +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11597 .loc 1 1771 7 is_stmt 1 view .LVU3525 +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11598 .loc 1 1771 17 is_stmt 0 view .LVU3526 + 11599 0158 B26A ldr r2, [r6, #40] +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11600 .loc 1 1771 56 view .LVU3527 + 11601 015a 3348 ldr r0, .L753+4 + 11602 015c D062 str r0, [r2, #44] +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11603 .loc 1 1774 7 is_stmt 1 view .LVU3528 +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11604 .loc 1 1774 17 is_stmt 0 view .LVU3529 + 11605 015e B26A ldr r2, [r6, #40] +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11606 .loc 1 1774 53 view .LVU3530 + 11607 0160 3248 ldr r0, .L753+8 + 11608 0162 1063 str r0, [r2, #48] + ARM GAS /tmp/cchCqftX.s page 390 + + +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11609 .loc 1 1777 7 is_stmt 1 view .LVU3531 +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11610 .loc 1 1777 88 is_stmt 0 view .LVU3532 + 11611 0164 3268 ldr r2, [r6] +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11612 .loc 1 1777 83 view .LVU3533 + 11613 0166 3832 adds r2, r2, #56 +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11614 .loc 1 1777 11 view .LVU3534 + 11615 0168 B06A ldr r0, [r6, #40] + 11616 016a FFF7FEFF bl HAL_DMA_Start_IT + 11617 .LVL915: +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11618 .loc 1 1777 10 discriminator 1 view .LVU3535 + 11619 016e 0028 cmp r0, #0 + 11620 0170 50D1 bne .L742 +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11621 .loc 1 1784 7 is_stmt 1 view .LVU3536 + 11622 0172 3268 ldr r2, [r6] + 11623 0174 D168 ldr r1, [r2, #12] + 11624 0176 8023 movs r3, #128 + 11625 0178 DB00 lsls r3, r3, #3 + 11626 017a 0B43 orrs r3, r1 + 11627 017c D360 str r3, [r2, #12] +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11628 .loc 1 1785 7 view .LVU3537 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11629 .loc 1 1835 3 view .LVU3538 + 11630 017e 7BE7 b .L732 + 11631 .LVL916: + 11632 .L751: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11633 .loc 1 1735 7 is_stmt 0 discriminator 6 view .LVU3539 + 11634 0180 4022 movs r2, #64 + 11635 0182 0220 movs r0, #2 + 11636 0184 B054 strb r0, [r6, r2] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11637 .loc 1 1743 3 is_stmt 1 view .LVU3540 + 11638 .L729: +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11639 .loc 1 1791 7 view .LVU3541 +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11640 .loc 1 1791 17 is_stmt 0 view .LVU3542 + 11641 0186 F26A ldr r2, [r6, #44] +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11642 .loc 1 1791 52 view .LVU3543 + 11643 0188 2648 ldr r0, .L753 + 11644 018a 9062 str r0, [r2, #40] +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11645 .loc 1 1792 7 is_stmt 1 view .LVU3544 +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11646 .loc 1 1792 17 is_stmt 0 view .LVU3545 + 11647 018c F26A ldr r2, [r6, #44] +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11648 .loc 1 1792 56 view .LVU3546 + 11649 018e 2648 ldr r0, .L753+4 + ARM GAS /tmp/cchCqftX.s page 391 + + + 11650 0190 D062 str r0, [r2, #44] +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11651 .loc 1 1795 7 is_stmt 1 view .LVU3547 +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11652 .loc 1 1795 17 is_stmt 0 view .LVU3548 + 11653 0192 F26A ldr r2, [r6, #44] +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11654 .loc 1 1795 53 view .LVU3549 + 11655 0194 2548 ldr r0, .L753+8 + 11656 0196 1063 str r0, [r2, #48] +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11657 .loc 1 1798 7 is_stmt 1 view .LVU3550 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11658 .loc 1 1798 88 is_stmt 0 view .LVU3551 + 11659 0198 3268 ldr r2, [r6] +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11660 .loc 1 1798 83 view .LVU3552 + 11661 019a 3C32 adds r2, r2, #60 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11662 .loc 1 1798 11 view .LVU3553 + 11663 019c F06A ldr r0, [r6, #44] + 11664 019e FFF7FEFF bl HAL_DMA_Start_IT + 11665 .LVL917: +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11666 .loc 1 1798 10 discriminator 1 view .LVU3554 + 11667 01a2 0028 cmp r0, #0 + 11668 01a4 38D1 bne .L743 +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11669 .loc 1 1805 7 is_stmt 1 view .LVU3555 + 11670 01a6 3268 ldr r2, [r6] + 11671 01a8 D168 ldr r1, [r2, #12] + 11672 01aa 8023 movs r3, #128 + 11673 01ac 1B01 lsls r3, r3, #4 + 11674 01ae 0B43 orrs r3, r1 + 11675 01b0 D360 str r3, [r2, #12] +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11676 .loc 1 1806 7 view .LVU3556 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11677 .loc 1 1835 3 view .LVU3557 + 11678 01b2 61E7 b .L732 + 11679 .LVL918: + 11680 .L730: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11681 .loc 1 1743 3 is_stmt 0 view .LVU3558 + 11682 01b4 0C2D cmp r5, #12 + 11683 01b6 16D1 bne .L752 +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11684 .loc 1 1812 7 is_stmt 1 view .LVU3559 +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11685 .loc 1 1812 17 is_stmt 0 view .LVU3560 + 11686 01b8 326B ldr r2, [r6, #48] +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11687 .loc 1 1812 52 view .LVU3561 + 11688 01ba 1A48 ldr r0, .L753 + 11689 01bc 9062 str r0, [r2, #40] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11690 .loc 1 1813 7 is_stmt 1 view .LVU3562 + ARM GAS /tmp/cchCqftX.s page 392 + + +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11691 .loc 1 1813 17 is_stmt 0 view .LVU3563 + 11692 01be 326B ldr r2, [r6, #48] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11693 .loc 1 1813 56 view .LVU3564 + 11694 01c0 1948 ldr r0, .L753+4 + 11695 01c2 D062 str r0, [r2, #44] +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11696 .loc 1 1816 7 is_stmt 1 view .LVU3565 +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11697 .loc 1 1816 17 is_stmt 0 view .LVU3566 + 11698 01c4 326B ldr r2, [r6, #48] +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11699 .loc 1 1816 53 view .LVU3567 + 11700 01c6 1948 ldr r0, .L753+8 + 11701 01c8 1063 str r0, [r2, #48] +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11702 .loc 1 1819 7 is_stmt 1 view .LVU3568 +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11703 .loc 1 1819 88 is_stmt 0 view .LVU3569 + 11704 01ca 3268 ldr r2, [r6] +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11705 .loc 1 1819 83 view .LVU3570 + 11706 01cc 4032 adds r2, r2, #64 +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11707 .loc 1 1819 11 view .LVU3571 + 11708 01ce 306B ldr r0, [r6, #48] + 11709 01d0 FFF7FEFF bl HAL_DMA_Start_IT + 11710 .LVL919: +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11711 .loc 1 1819 10 discriminator 1 view .LVU3572 + 11712 01d4 0028 cmp r0, #0 + 11713 01d6 21D1 bne .L744 +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11714 .loc 1 1826 7 is_stmt 1 view .LVU3573 + 11715 01d8 3268 ldr r2, [r6] + 11716 01da D168 ldr r1, [r2, #12] + 11717 01dc 8023 movs r3, #128 + 11718 01de 5B01 lsls r3, r3, #5 + 11719 01e0 0B43 orrs r3, r1 + 11720 01e2 D360 str r3, [r2, #12] +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11721 .loc 1 1827 7 view .LVU3574 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11722 .loc 1 1835 3 view .LVU3575 + 11723 01e4 48E7 b .L732 + 11724 .LVL920: + 11725 .L752: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11726 .loc 1 1743 3 is_stmt 0 view .LVU3576 + 11727 01e6 0120 movs r0, #1 + 11728 01e8 0DE0 b .L719 + 11729 .LVL921: + 11730 .L735: +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11731 .loc 1 1849 7 is_stmt 1 view .LVU3577 +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + ARM GAS /tmp/cchCqftX.s page 393 + + + 11732 .loc 1 1849 31 is_stmt 0 view .LVU3578 + 11733 01ea 9968 ldr r1, [r3, #8] +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11734 .loc 1 1849 15 view .LVU3579 + 11735 01ec 0722 movs r2, #7 + 11736 01ee 0A40 ands r2, r1 + 11737 .LVL922: +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11738 .loc 1 1850 7 is_stmt 1 view .LVU3580 +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11739 .loc 1 1850 10 is_stmt 0 view .LVU3581 + 11740 01f0 062A cmp r2, #6 + 11741 01f2 15D0 beq .L745 +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11742 .loc 1 1852 9 is_stmt 1 view .LVU3582 + 11743 01f4 1A68 ldr r2, [r3] + 11744 .LVL923: +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11745 .loc 1 1852 9 is_stmt 0 view .LVU3583 + 11746 01f6 0121 movs r1, #1 + 11747 .LVL924: +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11748 .loc 1 1852 9 view .LVU3584 + 11749 01f8 0A43 orrs r2, r1 + 11750 01fa 1A60 str r2, [r3] + 11751 01fc 0020 movs r0, #0 + 11752 01fe 02E0 b .L719 + 11753 .LVL925: + 11754 .L737: +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11755 .loc 1 1725 12 view .LVU3585 + 11756 0200 0220 movs r0, #2 + 11757 .LVL926: +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11758 .loc 1 1725 12 view .LVU3586 + 11759 0202 00E0 b .L719 + 11760 .L738: +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11761 .loc 1 1740 12 view .LVU3587 + 11762 0204 0120 movs r0, #1 + 11763 .LVL927: + 11764 .L719: +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11765 .loc 1 1863 1 view .LVU3588 + 11766 @ sp needed + 11767 .LVL928: + 11768 .LVL929: +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11769 .loc 1 1863 1 view .LVU3589 + 11770 0206 70BD pop {r4, r5, r6, pc} + 11771 .LVL930: + 11772 .L739: +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11773 .loc 1 1731 14 view .LVU3590 + 11774 0208 0120 movs r0, #1 + 11775 020a FCE7 b .L719 + 11776 .L740: + ARM GAS /tmp/cchCqftX.s page 394 + + + 11777 020c 0120 movs r0, #1 + 11778 020e FAE7 b .L719 + 11779 .LVL931: + 11780 .L741: +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11781 .loc 1 1759 16 view .LVU3591 + 11782 0210 0120 movs r0, #1 + 11783 0212 F8E7 b .L719 + 11784 .L742: +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11785 .loc 1 1781 16 view .LVU3592 + 11786 0214 0120 movs r0, #1 + 11787 0216 F6E7 b .L719 + 11788 .L743: +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11789 .loc 1 1802 16 view .LVU3593 + 11790 0218 0120 movs r0, #1 + 11791 021a F4E7 b .L719 + 11792 .L744: +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11793 .loc 1 1823 16 view .LVU3594 + 11794 021c 0120 movs r0, #1 + 11795 021e F2E7 b .L719 + 11796 .LVL932: + 11797 .L745: +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11798 .loc 1 1823 16 view .LVU3595 + 11799 0220 0020 movs r0, #0 + 11800 0222 F0E7 b .L719 + 11801 .L754: + 11802 .align 2 + 11803 .L753: + 11804 0224 00000000 .word TIM_DMADelayPulseCplt + 11805 0228 00000000 .word TIM_DMADelayPulseHalfCplt + 11806 022c 00000000 .word TIM_DMAError + 11807 0230 002C0140 .word 1073818624 + 11808 0234 00440140 .word 1073824768 + 11809 0238 00480140 .word 1073825792 + 11810 023c 00040040 .word 1073742848 + 11811 .cfi_endproc + 11812 .LFE68: + 11814 .section .text.HAL_TIM_PWM_Stop_DMA,"ax",%progbits + 11815 .align 1 + 11816 .global HAL_TIM_PWM_Stop_DMA + 11817 .syntax unified + 11818 .code 16 + 11819 .thumb_func + 11821 HAL_TIM_PWM_Stop_DMA: + 11822 .LVL933: + 11823 .LFB69: +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11824 .loc 1 1877 1 is_stmt 1 view -0 + 11825 .cfi_startproc + 11826 @ args = 0, pretend = 0, frame = 0 + 11827 @ frame_needed = 0, uses_anonymous_args = 0 +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11828 .loc 1 1877 1 is_stmt 0 view .LVU3597 + ARM GAS /tmp/cchCqftX.s page 395 + + + 11829 0000 70B5 push {r4, r5, r6, lr} + 11830 .cfi_def_cfa_offset 16 + 11831 .cfi_offset 4, -16 + 11832 .cfi_offset 5, -12 + 11833 .cfi_offset 6, -8 + 11834 .cfi_offset 14, -4 + 11835 0002 0500 movs r5, r0 + 11836 0004 0C00 movs r4, r1 +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11837 .loc 1 1878 3 is_stmt 1 view .LVU3598 + 11838 .LVL934: +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11839 .loc 1 1881 3 view .LVU3599 +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11840 .loc 1 1883 3 view .LVU3600 + 11841 0006 0829 cmp r1, #8 + 11842 0008 47D0 beq .L756 + 11843 000a 0ED8 bhi .L757 + 11844 000c 0029 cmp r1, #0 + 11845 000e 19D0 beq .L758 + 11846 0010 0429 cmp r1, #4 + 11847 0012 08D1 bne .L769 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 11848 .loc 1 1896 7 view .LVU3601 + 11849 0014 0268 ldr r2, [r0] + 11850 0016 D368 ldr r3, [r2, #12] + 11851 0018 3449 ldr r1, .L773 + 11852 .LVL935: +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 11853 .loc 1 1896 7 is_stmt 0 view .LVU3602 + 11854 001a 0B40 ands r3, r1 + 11855 001c D360 str r3, [r2, #12] +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11856 .loc 1 1897 7 is_stmt 1 view .LVU3603 +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11857 .loc 1 1897 13 is_stmt 0 view .LVU3604 + 11858 001e 806A ldr r0, [r0, #40] + 11859 .LVL936: +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11860 .loc 1 1897 13 view .LVU3605 + 11861 0020 FFF7FEFF bl HAL_DMA_Abort_IT + 11862 .LVL937: +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11863 .loc 1 1898 7 is_stmt 1 view .LVU3606 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11864 .loc 1 1922 3 view .LVU3607 + 11865 0024 16E0 b .L762 + 11866 .LVL938: + 11867 .L769: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11868 .loc 1 1883 3 is_stmt 0 view .LVU3608 + 11869 0026 0120 movs r0, #1 + 11870 .LVL939: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11871 .loc 1 1883 3 view .LVU3609 + 11872 0028 36E0 b .L760 + 11873 .LVL940: + ARM GAS /tmp/cchCqftX.s page 396 + + + 11874 .L757: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11875 .loc 1 1883 3 view .LVU3610 + 11876 002a 0C29 cmp r1, #12 + 11877 002c 08D1 bne .L770 +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 11878 .loc 1 1912 7 is_stmt 1 view .LVU3611 + 11879 002e 0268 ldr r2, [r0] + 11880 0030 D368 ldr r3, [r2, #12] + 11881 0032 2F49 ldr r1, .L773+4 + 11882 .LVL941: +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 11883 .loc 1 1912 7 is_stmt 0 view .LVU3612 + 11884 0034 0B40 ands r3, r1 + 11885 0036 D360 str r3, [r2, #12] +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11886 .loc 1 1913 7 is_stmt 1 view .LVU3613 +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11887 .loc 1 1913 13 is_stmt 0 view .LVU3614 + 11888 0038 006B ldr r0, [r0, #48] + 11889 .LVL942: +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11890 .loc 1 1913 13 view .LVU3615 + 11891 003a FFF7FEFF bl HAL_DMA_Abort_IT + 11892 .LVL943: +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11893 .loc 1 1914 7 is_stmt 1 view .LVU3616 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11894 .loc 1 1922 3 view .LVU3617 + 11895 003e 09E0 b .L762 + 11896 .LVL944: + 11897 .L770: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11898 .loc 1 1883 3 is_stmt 0 view .LVU3618 + 11899 0040 0120 movs r0, #1 + 11900 .LVL945: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11901 .loc 1 1883 3 view .LVU3619 + 11902 0042 29E0 b .L760 + 11903 .LVL946: + 11904 .L758: +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 11905 .loc 1 1888 7 is_stmt 1 view .LVU3620 + 11906 0044 0268 ldr r2, [r0] + 11907 0046 D368 ldr r3, [r2, #12] + 11908 0048 2A49 ldr r1, .L773+8 + 11909 .LVL947: +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 11910 .loc 1 1888 7 is_stmt 0 view .LVU3621 + 11911 004a 0B40 ands r3, r1 + 11912 004c D360 str r3, [r2, #12] +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11913 .loc 1 1889 7 is_stmt 1 view .LVU3622 +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11914 .loc 1 1889 13 is_stmt 0 view .LVU3623 + 11915 004e 406A ldr r0, [r0, #36] + 11916 .LVL948: + ARM GAS /tmp/cchCqftX.s page 397 + + +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11917 .loc 1 1889 13 view .LVU3624 + 11918 0050 FFF7FEFF bl HAL_DMA_Abort_IT + 11919 .LVL949: +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11920 .loc 1 1890 7 is_stmt 1 view .LVU3625 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11921 .loc 1 1922 3 view .LVU3626 + 11922 .L762: +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11923 .loc 1 1925 5 view .LVU3627 + 11924 0054 2868 ldr r0, [r5] + 11925 0056 0022 movs r2, #0 + 11926 0058 2100 movs r1, r4 + 11927 005a FFF7FEFF bl TIM_CCxChannelCmd + 11928 .LVL950: +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11929 .loc 1 1927 5 view .LVU3628 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11930 .loc 1 1927 9 is_stmt 0 view .LVU3629 + 11931 005e 2B68 ldr r3, [r5] + 11932 0060 254A ldr r2, .L773+12 + 11933 0062 9342 cmp r3, r2 + 11934 0064 22D0 beq .L763 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11935 .loc 1 1927 9 discriminator 2 view .LVU3630 + 11936 0066 254A ldr r2, .L773+16 + 11937 0068 9342 cmp r3, r2 + 11938 006a 1FD0 beq .L763 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11939 .loc 1 1927 9 discriminator 4 view .LVU3631 + 11940 006c 244A ldr r2, .L773+20 + 11941 006e 9342 cmp r3, r2 + 11942 0070 1CD0 beq .L763 + 11943 .L764: +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11944 .loc 1 1930 7 is_stmt 1 discriminator 5 view .LVU3632 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11945 .loc 1 1934 5 view .LVU3633 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11946 .loc 1 1934 5 view .LVU3634 + 11947 0072 2B68 ldr r3, [r5] + 11948 0074 196A ldr r1, [r3, #32] + 11949 0076 234A ldr r2, .L773+24 + 11950 0078 1142 tst r1, r2 + 11951 007a 07D1 bne .L765 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11952 .loc 1 1934 5 discriminator 1 view .LVU3635 + 11953 007c 196A ldr r1, [r3, #32] + 11954 007e 224A ldr r2, .L773+28 + 11955 0080 1142 tst r1, r2 + 11956 0082 03D1 bne .L765 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11957 .loc 1 1934 5 discriminator 3 view .LVU3636 + 11958 0084 1A68 ldr r2, [r3] + 11959 0086 0121 movs r1, #1 + 11960 0088 8A43 bics r2, r1 + ARM GAS /tmp/cchCqftX.s page 398 + + + 11961 008a 1A60 str r2, [r3] + 11962 .L765: +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11963 .loc 1 1934 5 discriminator 5 view .LVU3637 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11964 .loc 1 1937 5 view .LVU3638 + 11965 008c 002C cmp r4, #0 + 11966 008e 1AD1 bne .L766 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11967 .loc 1 1937 5 is_stmt 0 discriminator 1 view .LVU3639 + 11968 0090 3E23 movs r3, #62 + 11969 0092 0122 movs r2, #1 + 11970 0094 EA54 strb r2, [r5, r3] + 11971 0096 0020 movs r0, #0 + 11972 .L760: + 11973 .LVL951: +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11974 .loc 1 1941 3 is_stmt 1 view .LVU3640 +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11975 .loc 1 1942 1 is_stmt 0 view .LVU3641 + 11976 @ sp needed + 11977 .LVL952: + 11978 .LVL953: +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11979 .loc 1 1942 1 view .LVU3642 + 11980 0098 70BD pop {r4, r5, r6, pc} + 11981 .LVL954: + 11982 .L756: +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 11983 .loc 1 1904 7 is_stmt 1 view .LVU3643 + 11984 009a 0268 ldr r2, [r0] + 11985 009c D368 ldr r3, [r2, #12] + 11986 009e 1B49 ldr r1, .L773+32 + 11987 .LVL955: +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 11988 .loc 1 1904 7 is_stmt 0 view .LVU3644 + 11989 00a0 0B40 ands r3, r1 + 11990 00a2 D360 str r3, [r2, #12] +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11991 .loc 1 1905 7 is_stmt 1 view .LVU3645 +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11992 .loc 1 1905 13 is_stmt 0 view .LVU3646 + 11993 00a4 C06A ldr r0, [r0, #44] + 11994 .LVL956: +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11995 .loc 1 1905 13 view .LVU3647 + 11996 00a6 FFF7FEFF bl HAL_DMA_Abort_IT + 11997 .LVL957: +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11998 .loc 1 1906 7 is_stmt 1 view .LVU3648 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11999 .loc 1 1922 3 view .LVU3649 + 12000 00aa D3E7 b .L762 + 12001 .L763: +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12002 .loc 1 1930 7 view .LVU3650 +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 399 + + + 12003 .loc 1 1930 7 view .LVU3651 + 12004 00ac 196A ldr r1, [r3, #32] + 12005 00ae 154A ldr r2, .L773+24 + 12006 00b0 1142 tst r1, r2 + 12007 00b2 DED1 bne .L764 +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12008 .loc 1 1930 7 discriminator 1 view .LVU3652 + 12009 00b4 196A ldr r1, [r3, #32] + 12010 00b6 144A ldr r2, .L773+28 + 12011 00b8 1142 tst r1, r2 + 12012 00ba DAD1 bne .L764 +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12013 .loc 1 1930 7 discriminator 3 view .LVU3653 + 12014 00bc 5A6C ldr r2, [r3, #68] + 12015 00be 1449 ldr r1, .L773+36 + 12016 00c0 0A40 ands r2, r1 + 12017 00c2 5A64 str r2, [r3, #68] + 12018 00c4 D5E7 b .L764 + 12019 .L766: +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12020 .loc 1 1937 5 is_stmt 0 discriminator 2 view .LVU3654 + 12021 00c6 042C cmp r4, #4 + 12022 00c8 06D0 beq .L771 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12023 .loc 1 1937 5 discriminator 4 view .LVU3655 + 12024 00ca 082C cmp r4, #8 + 12025 00cc 09D0 beq .L772 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12026 .loc 1 1937 5 discriminator 7 view .LVU3656 + 12027 00ce 4123 movs r3, #65 + 12028 00d0 0122 movs r2, #1 + 12029 00d2 EA54 strb r2, [r5, r3] + 12030 00d4 0020 movs r0, #0 + 12031 00d6 DFE7 b .L760 + 12032 .L771: +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12033 .loc 1 1937 5 discriminator 3 view .LVU3657 + 12034 00d8 3F23 movs r3, #63 + 12035 00da 0122 movs r2, #1 + 12036 00dc EA54 strb r2, [r5, r3] + 12037 00de 0020 movs r0, #0 + 12038 00e0 DAE7 b .L760 + 12039 .L772: +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12040 .loc 1 1937 5 discriminator 6 view .LVU3658 + 12041 00e2 4023 movs r3, #64 + 12042 00e4 0122 movs r2, #1 + 12043 00e6 EA54 strb r2, [r5, r3] + 12044 00e8 0020 movs r0, #0 + 12045 00ea D5E7 b .L760 + 12046 .L774: + 12047 .align 2 + 12048 .L773: + 12049 00ec FFFBFFFF .word -1025 + 12050 00f0 FFEFFFFF .word -4097 + 12051 00f4 FFFDFFFF .word -513 + 12052 00f8 002C0140 .word 1073818624 + ARM GAS /tmp/cchCqftX.s page 400 + + + 12053 00fc 00440140 .word 1073824768 + 12054 0100 00480140 .word 1073825792 + 12055 0104 11110000 .word 4369 + 12056 0108 44040000 .word 1092 + 12057 010c FFF7FFFF .word -2049 + 12058 0110 FF7FFFFF .word -32769 + 12059 .cfi_endproc + 12060 .LFE69: + 12062 .section .text.HAL_TIM_IC_Start,"ax",%progbits + 12063 .align 1 + 12064 .global HAL_TIM_IC_Start + 12065 .syntax unified + 12066 .code 16 + 12067 .thumb_func + 12069 HAL_TIM_IC_Start: + 12070 .LVL958: + 12071 .LFB74: +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 12072 .loc 1 2119 1 is_stmt 1 view -0 + 12073 .cfi_startproc + 12074 @ args = 0, pretend = 0, frame = 0 + 12075 @ frame_needed = 0, uses_anonymous_args = 0 +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 12076 .loc 1 2119 1 is_stmt 0 view .LVU3660 + 12077 0000 10B5 push {r4, lr} + 12078 .cfi_def_cfa_offset 8 + 12079 .cfi_offset 4, -8 + 12080 .cfi_offset 14, -4 + 12081 0002 0400 movs r4, r0 +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); + 12082 .loc 1 2120 3 is_stmt 1 view .LVU3661 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12083 .loc 1 2121 3 view .LVU3662 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12084 .loc 1 2121 47 is_stmt 0 view .LVU3663 + 12085 0004 0029 cmp r1, #0 + 12086 0006 27D1 bne .L776 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12087 .loc 1 2121 47 discriminator 1 view .LVU3664 + 12088 0008 3E23 movs r3, #62 + 12089 000a C05C ldrb r0, [r0, r3] + 12090 .LVL959: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12091 .loc 1 2121 47 discriminator 1 view .LVU3665 + 12092 000c C0B2 uxtb r0, r0 + 12093 .L777: + 12094 .LVL960: +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12095 .loc 1 2122 3 is_stmt 1 view .LVU3666 +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12096 .loc 1 2122 61 is_stmt 0 view .LVU3667 + 12097 000e 0029 cmp r1, #0 + 12098 0010 32D1 bne .L780 +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12099 .loc 1 2122 61 discriminator 1 view .LVU3668 + 12100 0012 4223 movs r3, #66 + 12101 0014 E35C ldrb r3, [r4, r3] + ARM GAS /tmp/cchCqftX.s page 401 + + + 12102 0016 DBB2 uxtb r3, r3 + 12103 .L781: + 12104 .LVL961: +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12105 .loc 1 2125 3 is_stmt 1 view .LVU3669 +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12106 .loc 1 2128 3 view .LVU3670 +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12107 .loc 1 2128 6 is_stmt 0 view .LVU3671 + 12108 0018 0128 cmp r0, #1 + 12109 001a 67D1 bne .L794 +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12110 .loc 1 2129 7 view .LVU3672 + 12111 001c 012B cmp r3, #1 + 12112 001e 66D1 bne .L784 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12113 .loc 1 2135 3 is_stmt 1 view .LVU3673 + 12114 0020 0029 cmp r1, #0 + 12115 0022 39D1 bne .L785 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12116 .loc 1 2135 3 is_stmt 0 discriminator 1 view .LVU3674 + 12117 0024 0133 adds r3, r3, #1 + 12118 .LVL962: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12119 .loc 1 2135 3 discriminator 1 view .LVU3675 + 12120 0026 3E22 movs r2, #62 + 12121 0028 A354 strb r3, [r4, r2] +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12122 .loc 1 2136 3 is_stmt 1 view .LVU3676 +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12123 .loc 1 2136 3 is_stmt 0 discriminator 1 view .LVU3677 + 12124 002a 0432 adds r2, r2, #4 + 12125 002c A354 strb r3, [r4, r2] + 12126 .LVL963: + 12127 .L786: +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12128 .loc 1 2139 3 is_stmt 1 view .LVU3678 + 12129 002e 2068 ldr r0, [r4] + 12130 .LVL964: +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12131 .loc 1 2139 3 is_stmt 0 view .LVU3679 + 12132 0030 0122 movs r2, #1 + 12133 0032 FFF7FEFF bl TIM_CCxChannelCmd + 12134 .LVL965: +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12135 .loc 1 2142 3 is_stmt 1 view .LVU3680 +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12136 .loc 1 2142 7 is_stmt 0 view .LVU3681 + 12137 0036 2368 ldr r3, [r4] +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12138 .loc 1 2142 6 view .LVU3682 + 12139 0038 2E4A ldr r2, .L804 + 12140 003a 9342 cmp r3, r2 + 12141 003c 4BD0 beq .L792 +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12142 .loc 1 2142 7 discriminator 1 view .LVU3683 + 12143 003e 8022 movs r2, #128 + ARM GAS /tmp/cchCqftX.s page 402 + + + 12144 0040 D205 lsls r2, r2, #23 + 12145 0042 9342 cmp r3, r2 + 12146 0044 47D0 beq .L792 +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12147 .loc 1 2142 7 discriminator 2 view .LVU3684 + 12148 0046 2C4A ldr r2, .L804+4 + 12149 0048 9342 cmp r3, r2 + 12150 004a 44D0 beq .L792 +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12151 .loc 1 2152 5 is_stmt 1 view .LVU3685 + 12152 004c 1A68 ldr r2, [r3] + 12153 004e 0121 movs r1, #1 + 12154 0050 0A43 orrs r2, r1 + 12155 0052 1A60 str r2, [r3] +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12156 .loc 1 2156 10 is_stmt 0 view .LVU3686 + 12157 0054 0020 movs r0, #0 + 12158 0056 4AE0 b .L784 + 12159 .LVL966: + 12160 .L776: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12161 .loc 1 2121 47 discriminator 2 view .LVU3687 + 12162 0058 0429 cmp r1, #4 + 12163 005a 05D0 beq .L796 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12164 .loc 1 2121 47 discriminator 5 view .LVU3688 + 12165 005c 0829 cmp r1, #8 + 12166 005e 07D0 beq .L797 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12167 .loc 1 2121 47 discriminator 8 view .LVU3689 + 12168 0060 4123 movs r3, #65 + 12169 0062 C05C ldrb r0, [r0, r3] + 12170 .LVL967: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12171 .loc 1 2121 47 discriminator 8 view .LVU3690 + 12172 0064 C0B2 uxtb r0, r0 + 12173 0066 D2E7 b .L777 + 12174 .LVL968: + 12175 .L796: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12176 .loc 1 2121 47 discriminator 4 view .LVU3691 + 12177 0068 3F23 movs r3, #63 + 12178 006a C05C ldrb r0, [r0, r3] + 12179 .LVL969: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12180 .loc 1 2121 47 discriminator 4 view .LVU3692 + 12181 006c C0B2 uxtb r0, r0 + 12182 006e CEE7 b .L777 + 12183 .LVL970: + 12184 .L797: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12185 .loc 1 2121 47 discriminator 7 view .LVU3693 + 12186 0070 4023 movs r3, #64 + 12187 0072 C05C ldrb r0, [r0, r3] + 12188 .LVL971: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12189 .loc 1 2121 47 discriminator 7 view .LVU3694 + ARM GAS /tmp/cchCqftX.s page 403 + + + 12190 0074 C0B2 uxtb r0, r0 + 12191 0076 CAE7 b .L777 + 12192 .LVL972: + 12193 .L780: +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12194 .loc 1 2122 61 discriminator 2 view .LVU3695 + 12195 0078 0429 cmp r1, #4 + 12196 007a 05D0 beq .L798 +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12197 .loc 1 2122 61 discriminator 5 view .LVU3696 + 12198 007c 0829 cmp r1, #8 + 12199 007e 07D0 beq .L799 +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12200 .loc 1 2122 61 discriminator 8 view .LVU3697 + 12201 0080 4523 movs r3, #69 + 12202 0082 E35C ldrb r3, [r4, r3] + 12203 0084 DBB2 uxtb r3, r3 + 12204 0086 C7E7 b .L781 + 12205 .L798: +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12206 .loc 1 2122 61 discriminator 4 view .LVU3698 + 12207 0088 4323 movs r3, #67 + 12208 008a E35C ldrb r3, [r4, r3] + 12209 008c DBB2 uxtb r3, r3 + 12210 008e C3E7 b .L781 + 12211 .L799: +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12212 .loc 1 2122 61 discriminator 7 view .LVU3699 + 12213 0090 4423 movs r3, #68 + 12214 0092 E35C ldrb r3, [r4, r3] + 12215 0094 DBB2 uxtb r3, r3 + 12216 0096 BFE7 b .L781 + 12217 .LVL973: + 12218 .L785: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12219 .loc 1 2135 3 discriminator 2 view .LVU3700 + 12220 0098 0429 cmp r1, #4 + 12221 009a 0CD0 beq .L800 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12222 .loc 1 2135 3 discriminator 4 view .LVU3701 + 12223 009c 0829 cmp r1, #8 + 12224 009e 0ED0 beq .L801 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12225 .loc 1 2135 3 discriminator 7 view .LVU3702 + 12226 00a0 4123 movs r3, #65 + 12227 .LVL974: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12228 .loc 1 2135 3 discriminator 7 view .LVU3703 + 12229 00a2 0222 movs r2, #2 + 12230 00a4 E254 strb r2, [r4, r3] +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12231 .loc 1 2136 3 is_stmt 1 view .LVU3704 + 12232 .L788: +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12233 .loc 1 2136 3 is_stmt 0 discriminator 2 view .LVU3705 + 12234 00a6 0429 cmp r1, #4 + 12235 00a8 0DD0 beq .L802 + ARM GAS /tmp/cchCqftX.s page 404 + + +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12236 .loc 1 2136 3 discriminator 4 view .LVU3706 + 12237 00aa 0829 cmp r1, #8 + 12238 00ac 0FD0 beq .L803 +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12239 .loc 1 2136 3 discriminator 7 view .LVU3707 + 12240 00ae 4523 movs r3, #69 + 12241 00b0 0222 movs r2, #2 + 12242 00b2 E254 strb r2, [r4, r3] + 12243 00b4 BBE7 b .L786 + 12244 .LVL975: + 12245 .L800: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12246 .loc 1 2135 3 discriminator 3 view .LVU3708 + 12247 00b6 3F23 movs r3, #63 + 12248 .LVL976: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12249 .loc 1 2135 3 discriminator 3 view .LVU3709 + 12250 00b8 0222 movs r2, #2 + 12251 00ba E254 strb r2, [r4, r3] +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12252 .loc 1 2136 3 is_stmt 1 view .LVU3710 + 12253 00bc F3E7 b .L788 + 12254 .LVL977: + 12255 .L801: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12256 .loc 1 2135 3 is_stmt 0 discriminator 6 view .LVU3711 + 12257 00be 4023 movs r3, #64 + 12258 .LVL978: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12259 .loc 1 2135 3 discriminator 6 view .LVU3712 + 12260 00c0 0222 movs r2, #2 + 12261 00c2 E254 strb r2, [r4, r3] +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12262 .loc 1 2136 3 is_stmt 1 view .LVU3713 + 12263 00c4 EFE7 b .L788 + 12264 .L802: +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12265 .loc 1 2136 3 is_stmt 0 discriminator 3 view .LVU3714 + 12266 00c6 4323 movs r3, #67 + 12267 00c8 0222 movs r2, #2 + 12268 00ca E254 strb r2, [r4, r3] + 12269 00cc AFE7 b .L786 + 12270 .L803: +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12271 .loc 1 2136 3 discriminator 6 view .LVU3715 + 12272 00ce 4423 movs r3, #68 + 12273 00d0 0222 movs r2, #2 + 12274 00d2 E254 strb r2, [r4, r3] + 12275 00d4 ABE7 b .L786 + 12276 .LVL979: + 12277 .L792: +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12278 .loc 1 2144 5 is_stmt 1 view .LVU3716 +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12279 .loc 1 2144 29 is_stmt 0 view .LVU3717 + 12280 00d6 9968 ldr r1, [r3, #8] + ARM GAS /tmp/cchCqftX.s page 405 + + +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12281 .loc 1 2144 13 view .LVU3718 + 12282 00d8 0722 movs r2, #7 + 12283 00da 0A40 ands r2, r1 + 12284 .LVL980: +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12285 .loc 1 2145 5 is_stmt 1 view .LVU3719 +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12286 .loc 1 2145 8 is_stmt 0 view .LVU3720 + 12287 00dc 062A cmp r2, #6 + 12288 00de 07D0 beq .L795 +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12289 .loc 1 2147 7 is_stmt 1 view .LVU3721 + 12290 00e0 1A68 ldr r2, [r3] + 12291 .LVL981: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12292 .loc 1 2147 7 is_stmt 0 view .LVU3722 + 12293 00e2 0121 movs r1, #1 + 12294 .LVL982: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12295 .loc 1 2147 7 view .LVU3723 + 12296 00e4 0A43 orrs r2, r1 + 12297 00e6 1A60 str r2, [r3] +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12298 .loc 1 2156 10 view .LVU3724 + 12299 00e8 0020 movs r0, #0 + 12300 00ea 00E0 b .L784 + 12301 .LVL983: + 12302 .L794: +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12303 .loc 1 2131 12 view .LVU3725 + 12304 00ec 0120 movs r0, #1 + 12305 .LVL984: + 12306 .L784: +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12307 .loc 1 2157 1 view .LVU3726 + 12308 @ sp needed + 12309 .LVL985: +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12310 .loc 1 2157 1 view .LVU3727 + 12311 00ee 10BD pop {r4, pc} + 12312 .LVL986: + 12313 .L795: +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12314 .loc 1 2156 10 view .LVU3728 + 12315 00f0 0020 movs r0, #0 + 12316 00f2 FCE7 b .L784 + 12317 .L805: + 12318 .align 2 + 12319 .L804: + 12320 00f4 002C0140 .word 1073818624 + 12321 00f8 00040040 .word 1073742848 + 12322 .cfi_endproc + 12323 .LFE74: + 12325 .section .text.HAL_TIM_IC_Stop,"ax",%progbits + 12326 .align 1 + 12327 .global HAL_TIM_IC_Stop + ARM GAS /tmp/cchCqftX.s page 406 + + + 12328 .syntax unified + 12329 .code 16 + 12330 .thumb_func + 12332 HAL_TIM_IC_Stop: + 12333 .LVL987: + 12334 .LFB75: +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 12335 .loc 1 2171 1 is_stmt 1 view -0 + 12336 .cfi_startproc + 12337 @ args = 0, pretend = 0, frame = 0 + 12338 @ frame_needed = 0, uses_anonymous_args = 0 +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 12339 .loc 1 2171 1 is_stmt 0 view .LVU3730 + 12340 0000 70B5 push {r4, r5, r6, lr} + 12341 .cfi_def_cfa_offset 16 + 12342 .cfi_offset 4, -16 + 12343 .cfi_offset 5, -12 + 12344 .cfi_offset 6, -8 + 12345 .cfi_offset 14, -4 + 12346 0002 0400 movs r4, r0 + 12347 0004 0D00 movs r5, r1 +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12348 .loc 1 2173 3 is_stmt 1 view .LVU3731 +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12349 .loc 1 2176 3 view .LVU3732 + 12350 0006 0068 ldr r0, [r0] + 12351 .LVL988: +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12352 .loc 1 2176 3 is_stmt 0 view .LVU3733 + 12353 0008 0022 movs r2, #0 + 12354 000a FFF7FEFF bl TIM_CCxChannelCmd + 12355 .LVL989: +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12356 .loc 1 2179 3 is_stmt 1 view .LVU3734 +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12357 .loc 1 2179 3 view .LVU3735 + 12358 000e 2368 ldr r3, [r4] + 12359 0010 196A ldr r1, [r3, #32] + 12360 0012 194A ldr r2, .L819 + 12361 0014 1142 tst r1, r2 + 12362 0016 07D1 bne .L807 +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12363 .loc 1 2179 3 discriminator 1 view .LVU3736 + 12364 0018 196A ldr r1, [r3, #32] + 12365 001a 184A ldr r2, .L819+4 + 12366 001c 1142 tst r1, r2 + 12367 001e 03D1 bne .L807 +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12368 .loc 1 2179 3 discriminator 3 view .LVU3737 + 12369 0020 1A68 ldr r2, [r3] + 12370 0022 0121 movs r1, #1 + 12371 0024 8A43 bics r2, r1 + 12372 0026 1A60 str r2, [r3] + 12373 .L807: +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12374 .loc 1 2179 3 discriminator 5 view .LVU3738 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/cchCqftX.s page 407 + + + 12375 .loc 1 2182 3 view .LVU3739 + 12376 0028 002D cmp r5, #0 + 12377 002a 06D1 bne .L808 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12378 .loc 1 2182 3 is_stmt 0 discriminator 1 view .LVU3740 + 12379 002c 0123 movs r3, #1 + 12380 002e 3E22 movs r2, #62 + 12381 0030 A354 strb r3, [r4, r2] +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12382 .loc 1 2183 3 is_stmt 1 view .LVU3741 +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12383 .loc 1 2183 3 is_stmt 0 discriminator 1 view .LVU3742 + 12384 0032 0432 adds r2, r2, #4 + 12385 0034 A354 strb r3, [r4, r2] + 12386 .L809: +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12387 .loc 1 2186 3 is_stmt 1 view .LVU3743 +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12388 .loc 1 2187 1 is_stmt 0 view .LVU3744 + 12389 0036 0020 movs r0, #0 + 12390 @ sp needed + 12391 .LVL990: + 12392 .LVL991: +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12393 .loc 1 2187 1 view .LVU3745 + 12394 0038 70BD pop {r4, r5, r6, pc} + 12395 .LVL992: + 12396 .L808: +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12397 .loc 1 2182 3 discriminator 2 view .LVU3746 + 12398 003a 042D cmp r5, #4 + 12399 003c 0CD0 beq .L815 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12400 .loc 1 2182 3 discriminator 4 view .LVU3747 + 12401 003e 082D cmp r5, #8 + 12402 0040 0ED0 beq .L816 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12403 .loc 1 2182 3 discriminator 7 view .LVU3748 + 12404 0042 4123 movs r3, #65 + 12405 0044 0122 movs r2, #1 + 12406 0046 E254 strb r2, [r4, r3] +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12407 .loc 1 2183 3 is_stmt 1 view .LVU3749 + 12408 .L811: +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12409 .loc 1 2183 3 is_stmt 0 discriminator 2 view .LVU3750 + 12410 0048 042D cmp r5, #4 + 12411 004a 0DD0 beq .L817 +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12412 .loc 1 2183 3 discriminator 4 view .LVU3751 + 12413 004c 082D cmp r5, #8 + 12414 004e 0FD0 beq .L818 +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12415 .loc 1 2183 3 discriminator 7 view .LVU3752 + 12416 0050 4523 movs r3, #69 + 12417 0052 0122 movs r2, #1 + 12418 0054 E254 strb r2, [r4, r3] + ARM GAS /tmp/cchCqftX.s page 408 + + + 12419 0056 EEE7 b .L809 + 12420 .L815: +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12421 .loc 1 2182 3 discriminator 3 view .LVU3753 + 12422 0058 3F23 movs r3, #63 + 12423 005a 0122 movs r2, #1 + 12424 005c E254 strb r2, [r4, r3] +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12425 .loc 1 2183 3 is_stmt 1 view .LVU3754 + 12426 005e F3E7 b .L811 + 12427 .L816: +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12428 .loc 1 2182 3 is_stmt 0 discriminator 6 view .LVU3755 + 12429 0060 4023 movs r3, #64 + 12430 0062 0122 movs r2, #1 + 12431 0064 E254 strb r2, [r4, r3] +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12432 .loc 1 2183 3 is_stmt 1 view .LVU3756 + 12433 0066 EFE7 b .L811 + 12434 .L817: +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12435 .loc 1 2183 3 is_stmt 0 discriminator 3 view .LVU3757 + 12436 0068 4323 movs r3, #67 + 12437 006a 0122 movs r2, #1 + 12438 006c E254 strb r2, [r4, r3] + 12439 006e E2E7 b .L809 + 12440 .L818: +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12441 .loc 1 2183 3 discriminator 6 view .LVU3758 + 12442 0070 4423 movs r3, #68 + 12443 0072 0122 movs r2, #1 + 12444 0074 E254 strb r2, [r4, r3] + 12445 0076 DEE7 b .L809 + 12446 .L820: + 12447 .align 2 + 12448 .L819: + 12449 0078 11110000 .word 4369 + 12450 007c 44040000 .word 1092 + 12451 .cfi_endproc + 12452 .LFE75: + 12454 .section .text.HAL_TIM_IC_Start_IT,"ax",%progbits + 12455 .align 1 + 12456 .global HAL_TIM_IC_Start_IT + 12457 .syntax unified + 12458 .code 16 + 12459 .thumb_func + 12461 HAL_TIM_IC_Start_IT: + 12462 .LVL993: + 12463 .LFB76: +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12464 .loc 1 2201 1 is_stmt 1 view -0 + 12465 .cfi_startproc + 12466 @ args = 0, pretend = 0, frame = 0 + 12467 @ frame_needed = 0, uses_anonymous_args = 0 +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12468 .loc 1 2201 1 is_stmt 0 view .LVU3760 + 12469 0000 10B5 push {r4, lr} + ARM GAS /tmp/cchCqftX.s page 409 + + + 12470 .cfi_def_cfa_offset 8 + 12471 .cfi_offset 4, -8 + 12472 .cfi_offset 14, -4 + 12473 0002 0400 movs r4, r0 +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 12474 .loc 1 2202 3 is_stmt 1 view .LVU3761 + 12475 .LVL994: +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12476 .loc 1 2203 3 view .LVU3762 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12477 .loc 1 2205 3 view .LVU3763 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12478 .loc 1 2205 47 is_stmt 0 view .LVU3764 + 12479 0004 0029 cmp r1, #0 + 12480 0006 1DD1 bne .L822 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12481 .loc 1 2205 47 discriminator 1 view .LVU3765 + 12482 0008 3E23 movs r3, #62 + 12483 000a C05C ldrb r0, [r0, r3] + 12484 .LVL995: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12485 .loc 1 2205 47 discriminator 1 view .LVU3766 + 12486 000c C0B2 uxtb r0, r0 + 12487 .L823: + 12488 .LVL996: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12489 .loc 1 2206 3 is_stmt 1 view .LVU3767 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12490 .loc 1 2206 61 is_stmt 0 view .LVU3768 + 12491 000e 0029 cmp r1, #0 + 12492 0010 28D1 bne .L826 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12493 .loc 1 2206 61 discriminator 1 view .LVU3769 + 12494 0012 4223 movs r3, #66 + 12495 0014 E35C ldrb r3, [r4, r3] + 12496 0016 DBB2 uxtb r3, r3 + 12497 .L827: + 12498 .LVL997: +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12499 .loc 1 2209 3 is_stmt 1 view .LVU3770 +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12500 .loc 1 2212 3 view .LVU3771 +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12501 .loc 1 2212 6 is_stmt 0 view .LVU3772 + 12502 0018 0128 cmp r0, #1 + 12503 001a 00D0 beq .LCB11336 + 12504 001c 8AE0 b .L846 @long jump + 12505 .LCB11336: +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12506 .loc 1 2213 7 view .LVU3773 + 12507 001e 012B cmp r3, #1 + 12508 0020 00D0 beq .LCB11338 + 12509 0022 88E0 b .L830 @long jump + 12510 .LCB11338: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12511 .loc 1 2219 3 is_stmt 1 view .LVU3774 + 12512 0024 0029 cmp r1, #0 + ARM GAS /tmp/cchCqftX.s page 410 + + + 12513 0026 2DD1 bne .L831 +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12514 .loc 1 2219 3 is_stmt 0 discriminator 1 view .LVU3775 + 12515 0028 0222 movs r2, #2 + 12516 002a 3D30 adds r0, r0, #61 + 12517 .LVL998: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12518 .loc 1 2219 3 discriminator 1 view .LVU3776 + 12519 002c 2254 strb r2, [r4, r0] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12520 .loc 1 2220 3 is_stmt 1 view .LVU3777 +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12521 .loc 1 2220 3 is_stmt 0 discriminator 1 view .LVU3778 + 12522 002e 0430 adds r0, r0, #4 + 12523 0030 2254 strb r2, [r4, r0] + 12524 .L832: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12525 .loc 1 2222 3 is_stmt 1 view .LVU3779 + 12526 0032 0829 cmp r1, #8 + 12527 0034 5DD0 beq .L839 + 12528 0036 62D8 bhi .L840 + 12529 0038 0029 cmp r1, #0 + 12530 003a 6AD0 beq .L841 + 12531 003c 0429 cmp r1, #4 + 12532 003e 3BD0 beq .L837 + 12533 0040 1800 movs r0, r3 + 12534 0042 78E0 b .L830 + 12535 .LVL999: + 12536 .L822: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12537 .loc 1 2205 47 is_stmt 0 discriminator 2 view .LVU3780 + 12538 0044 0429 cmp r1, #4 + 12539 0046 05D0 beq .L848 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12540 .loc 1 2205 47 discriminator 5 view .LVU3781 + 12541 0048 0829 cmp r1, #8 + 12542 004a 07D0 beq .L849 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12543 .loc 1 2205 47 discriminator 8 view .LVU3782 + 12544 004c 4123 movs r3, #65 + 12545 004e C05C ldrb r0, [r0, r3] + 12546 .LVL1000: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12547 .loc 1 2205 47 discriminator 8 view .LVU3783 + 12548 0050 C0B2 uxtb r0, r0 + 12549 0052 DCE7 b .L823 + 12550 .LVL1001: + 12551 .L848: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12552 .loc 1 2205 47 discriminator 4 view .LVU3784 + 12553 0054 3F23 movs r3, #63 + 12554 0056 C05C ldrb r0, [r0, r3] + 12555 .LVL1002: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12556 .loc 1 2205 47 discriminator 4 view .LVU3785 + 12557 0058 C0B2 uxtb r0, r0 + 12558 005a D8E7 b .L823 + ARM GAS /tmp/cchCqftX.s page 411 + + + 12559 .LVL1003: + 12560 .L849: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12561 .loc 1 2205 47 discriminator 7 view .LVU3786 + 12562 005c 4023 movs r3, #64 + 12563 005e C05C ldrb r0, [r0, r3] + 12564 .LVL1004: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12565 .loc 1 2205 47 discriminator 7 view .LVU3787 + 12566 0060 C0B2 uxtb r0, r0 + 12567 0062 D4E7 b .L823 + 12568 .LVL1005: + 12569 .L826: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12570 .loc 1 2206 61 discriminator 2 view .LVU3788 + 12571 0064 0429 cmp r1, #4 + 12572 0066 05D0 beq .L850 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12573 .loc 1 2206 61 discriminator 5 view .LVU3789 + 12574 0068 0829 cmp r1, #8 + 12575 006a 07D0 beq .L851 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12576 .loc 1 2206 61 discriminator 8 view .LVU3790 + 12577 006c 4523 movs r3, #69 + 12578 006e E35C ldrb r3, [r4, r3] + 12579 0070 DBB2 uxtb r3, r3 + 12580 0072 D1E7 b .L827 + 12581 .L850: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12582 .loc 1 2206 61 discriminator 4 view .LVU3791 + 12583 0074 4323 movs r3, #67 + 12584 0076 E35C ldrb r3, [r4, r3] + 12585 0078 DBB2 uxtb r3, r3 + 12586 007a CDE7 b .L827 + 12587 .L851: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12588 .loc 1 2206 61 discriminator 7 view .LVU3792 + 12589 007c 4423 movs r3, #68 + 12590 007e E35C ldrb r3, [r4, r3] + 12591 0080 DBB2 uxtb r3, r3 + 12592 0082 C9E7 b .L827 + 12593 .LVL1006: + 12594 .L831: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12595 .loc 1 2219 3 discriminator 2 view .LVU3793 + 12596 0084 0429 cmp r1, #4 + 12597 0086 0CD0 beq .L852 +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12598 .loc 1 2219 3 discriminator 4 view .LVU3794 + 12599 0088 0829 cmp r1, #8 + 12600 008a 0ED0 beq .L853 +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12601 .loc 1 2219 3 discriminator 7 view .LVU3795 + 12602 008c 4122 movs r2, #65 + 12603 008e 0220 movs r0, #2 + 12604 .LVL1007: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + ARM GAS /tmp/cchCqftX.s page 412 + + + 12605 .loc 1 2219 3 discriminator 7 view .LVU3796 + 12606 0090 A054 strb r0, [r4, r2] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12607 .loc 1 2220 3 is_stmt 1 view .LVU3797 + 12608 .L834: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12609 .loc 1 2220 3 is_stmt 0 discriminator 2 view .LVU3798 + 12610 0092 0429 cmp r1, #4 + 12611 0094 0DD0 beq .L854 +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12612 .loc 1 2220 3 discriminator 4 view .LVU3799 + 12613 0096 0829 cmp r1, #8 + 12614 0098 28D0 beq .L855 +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12615 .loc 1 2220 3 discriminator 7 view .LVU3800 + 12616 009a 4522 movs r2, #69 + 12617 009c 0220 movs r0, #2 + 12618 009e A054 strb r0, [r4, r2] + 12619 00a0 C7E7 b .L832 + 12620 .LVL1008: + 12621 .L852: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12622 .loc 1 2219 3 discriminator 3 view .LVU3801 + 12623 00a2 3F22 movs r2, #63 + 12624 00a4 0220 movs r0, #2 + 12625 .LVL1009: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12626 .loc 1 2219 3 discriminator 3 view .LVU3802 + 12627 00a6 A054 strb r0, [r4, r2] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12628 .loc 1 2220 3 is_stmt 1 view .LVU3803 + 12629 00a8 F3E7 b .L834 + 12630 .LVL1010: + 12631 .L853: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12632 .loc 1 2219 3 is_stmt 0 discriminator 6 view .LVU3804 + 12633 00aa 4022 movs r2, #64 + 12634 00ac 0220 movs r0, #2 + 12635 .LVL1011: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12636 .loc 1 2219 3 discriminator 6 view .LVU3805 + 12637 00ae A054 strb r0, [r4, r2] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12638 .loc 1 2220 3 is_stmt 1 view .LVU3806 + 12639 00b0 EFE7 b .L834 + 12640 .L854: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12641 .loc 1 2220 3 is_stmt 0 discriminator 3 view .LVU3807 + 12642 00b2 4323 movs r3, #67 + 12643 .LVL1012: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12644 .loc 1 2220 3 discriminator 3 view .LVU3808 + 12645 00b4 0222 movs r2, #2 + 12646 00b6 E254 strb r2, [r4, r3] +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12647 .loc 1 2222 3 is_stmt 1 view .LVU3809 + 12648 .L837: + ARM GAS /tmp/cchCqftX.s page 413 + + +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12649 .loc 1 2234 7 view .LVU3810 + 12650 00b8 2268 ldr r2, [r4] + 12651 00ba D368 ldr r3, [r2, #12] + 12652 00bc 0420 movs r0, #4 + 12653 00be 0343 orrs r3, r0 + 12654 00c0 D360 str r3, [r2, #12] +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12655 .loc 1 2235 7 view .LVU3811 +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12656 .loc 1 2257 3 view .LVU3812 + 12657 .L843: +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12658 .loc 1 2260 5 view .LVU3813 + 12659 00c2 2068 ldr r0, [r4] + 12660 00c4 0122 movs r2, #1 + 12661 00c6 FFF7FEFF bl TIM_CCxChannelCmd + 12662 .LVL1013: +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12663 .loc 1 2263 5 view .LVU3814 +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12664 .loc 1 2263 9 is_stmt 0 view .LVU3815 + 12665 00ca 2368 ldr r3, [r4] +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12666 .loc 1 2263 8 view .LVU3816 + 12667 00cc 1B4A ldr r2, .L857 + 12668 00ce 9342 cmp r3, r2 + 12669 00d0 25D0 beq .L844 +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12670 .loc 1 2263 9 discriminator 1 view .LVU3817 + 12671 00d2 8022 movs r2, #128 + 12672 00d4 D205 lsls r2, r2, #23 + 12673 00d6 9342 cmp r3, r2 + 12674 00d8 21D0 beq .L844 +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12675 .loc 1 2263 9 discriminator 2 view .LVU3818 + 12676 00da 194A ldr r2, .L857+4 + 12677 00dc 9342 cmp r3, r2 + 12678 00de 1ED0 beq .L844 +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12679 .loc 1 2273 7 is_stmt 1 view .LVU3819 + 12680 00e0 1A68 ldr r2, [r3] + 12681 00e2 0121 movs r1, #1 + 12682 00e4 0A43 orrs r2, r1 + 12683 00e6 1A60 str r2, [r3] + 12684 00e8 0020 movs r0, #0 + 12685 00ea 24E0 b .L830 + 12686 .LVL1014: + 12687 .L855: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12688 .loc 1 2220 3 is_stmt 0 discriminator 6 view .LVU3820 + 12689 00ec 4423 movs r3, #68 + 12690 .LVL1015: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12691 .loc 1 2220 3 discriminator 6 view .LVU3821 + 12692 00ee 0222 movs r2, #2 + 12693 00f0 E254 strb r2, [r4, r3] + ARM GAS /tmp/cchCqftX.s page 414 + + +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12694 .loc 1 2222 3 is_stmt 1 view .LVU3822 + 12695 .L839: +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12696 .loc 1 2241 7 view .LVU3823 + 12697 00f2 2268 ldr r2, [r4] + 12698 00f4 D368 ldr r3, [r2, #12] + 12699 00f6 0820 movs r0, #8 + 12700 00f8 0343 orrs r3, r0 + 12701 00fa D360 str r3, [r2, #12] +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12702 .loc 1 2242 7 view .LVU3824 +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12703 .loc 1 2257 3 view .LVU3825 + 12704 00fc E1E7 b .L843 + 12705 .LVL1016: + 12706 .L840: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12707 .loc 1 2222 3 is_stmt 0 view .LVU3826 + 12708 00fe 0C29 cmp r1, #12 + 12709 0100 05D1 bne .L856 +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12710 .loc 1 2248 7 is_stmt 1 view .LVU3827 + 12711 0102 2268 ldr r2, [r4] + 12712 0104 D368 ldr r3, [r2, #12] + 12713 .LVL1017: +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12714 .loc 1 2248 7 is_stmt 0 view .LVU3828 + 12715 0106 1020 movs r0, #16 + 12716 0108 0343 orrs r3, r0 + 12717 010a D360 str r3, [r2, #12] +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12718 .loc 1 2249 7 is_stmt 1 view .LVU3829 +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12719 .loc 1 2257 3 view .LVU3830 + 12720 010c D9E7 b .L843 + 12721 .LVL1018: + 12722 .L856: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12723 .loc 1 2222 3 is_stmt 0 view .LVU3831 + 12724 010e 1800 movs r0, r3 + 12725 0110 11E0 b .L830 + 12726 .L841: +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12727 .loc 1 2227 7 is_stmt 1 view .LVU3832 + 12728 0112 2268 ldr r2, [r4] + 12729 0114 D368 ldr r3, [r2, #12] + 12730 .LVL1019: +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12731 .loc 1 2227 7 is_stmt 0 view .LVU3833 + 12732 0116 0220 movs r0, #2 + 12733 0118 0343 orrs r3, r0 + 12734 011a D360 str r3, [r2, #12] +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12735 .loc 1 2228 7 is_stmt 1 view .LVU3834 +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12736 .loc 1 2257 3 view .LVU3835 + ARM GAS /tmp/cchCqftX.s page 415 + + + 12737 011c D1E7 b .L843 + 12738 .LVL1020: + 12739 .L844: +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12740 .loc 1 2265 7 view .LVU3836 +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12741 .loc 1 2265 31 is_stmt 0 view .LVU3837 + 12742 011e 9968 ldr r1, [r3, #8] +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12743 .loc 1 2265 15 view .LVU3838 + 12744 0120 0722 movs r2, #7 + 12745 0122 0A40 ands r2, r1 + 12746 .LVL1021: +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12747 .loc 1 2266 7 is_stmt 1 view .LVU3839 +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12748 .loc 1 2266 10 is_stmt 0 view .LVU3840 + 12749 0124 062A cmp r2, #6 + 12750 0126 07D0 beq .L847 +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12751 .loc 1 2268 9 is_stmt 1 view .LVU3841 + 12752 0128 1A68 ldr r2, [r3] + 12753 .LVL1022: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12754 .loc 1 2268 9 is_stmt 0 view .LVU3842 + 12755 012a 0121 movs r1, #1 + 12756 .LVL1023: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12757 .loc 1 2268 9 view .LVU3843 + 12758 012c 0A43 orrs r2, r1 + 12759 012e 1A60 str r2, [r3] + 12760 0130 0020 movs r0, #0 + 12761 0132 00E0 b .L830 + 12762 .LVL1024: + 12763 .L846: +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12764 .loc 1 2215 12 view .LVU3844 + 12765 0134 0120 movs r0, #1 + 12766 .LVL1025: + 12767 .L830: +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12768 .loc 1 2279 1 view .LVU3845 + 12769 @ sp needed + 12770 .LVL1026: +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12771 .loc 1 2279 1 view .LVU3846 + 12772 0136 10BD pop {r4, pc} + 12773 .LVL1027: + 12774 .L847: +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12775 .loc 1 2279 1 view .LVU3847 + 12776 0138 0020 movs r0, #0 + 12777 013a FCE7 b .L830 + 12778 .L858: + 12779 .align 2 + 12780 .L857: + 12781 013c 002C0140 .word 1073818624 + ARM GAS /tmp/cchCqftX.s page 416 + + + 12782 0140 00040040 .word 1073742848 + 12783 .cfi_endproc + 12784 .LFE76: + 12786 .section .text.HAL_TIM_IC_Stop_IT,"ax",%progbits + 12787 .align 1 + 12788 .global HAL_TIM_IC_Stop_IT + 12789 .syntax unified + 12790 .code 16 + 12791 .thumb_func + 12793 HAL_TIM_IC_Stop_IT: + 12794 .LVL1028: + 12795 .LFB77: +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12796 .loc 1 2293 1 is_stmt 1 view -0 + 12797 .cfi_startproc + 12798 @ args = 0, pretend = 0, frame = 0 + 12799 @ frame_needed = 0, uses_anonymous_args = 0 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12800 .loc 1 2293 1 is_stmt 0 view .LVU3849 + 12801 0000 70B5 push {r4, r5, r6, lr} + 12802 .cfi_def_cfa_offset 16 + 12803 .cfi_offset 4, -16 + 12804 .cfi_offset 5, -12 + 12805 .cfi_offset 6, -8 + 12806 .cfi_offset 14, -4 + 12807 0002 0500 movs r5, r0 + 12808 0004 0C00 movs r4, r1 +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12809 .loc 1 2294 3 is_stmt 1 view .LVU3850 + 12810 .LVL1029: +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12811 .loc 1 2297 3 view .LVU3851 +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12812 .loc 1 2299 3 view .LVU3852 + 12813 0006 0829 cmp r1, #8 + 12814 0008 36D0 beq .L860 + 12815 000a 0BD8 bhi .L861 + 12816 000c 0029 cmp r1, #0 + 12817 000e 13D0 beq .L862 + 12818 0010 0429 cmp r1, #4 + 12819 0012 05D1 bne .L874 +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12820 .loc 1 2311 7 view .LVU3853 + 12821 0014 0268 ldr r2, [r0] + 12822 0016 D368 ldr r3, [r2, #12] + 12823 0018 0421 movs r1, #4 + 12824 .LVL1030: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12825 .loc 1 2311 7 is_stmt 0 view .LVU3854 + 12826 001a 8B43 bics r3, r1 + 12827 001c D360 str r3, [r2, #12] +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12828 .loc 1 2312 7 is_stmt 1 view .LVU3855 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12829 .loc 1 2334 3 view .LVU3856 + 12830 001e 10E0 b .L866 + 12831 .LVL1031: + ARM GAS /tmp/cchCqftX.s page 417 + + + 12832 .L874: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12833 .loc 1 2299 3 is_stmt 0 view .LVU3857 + 12834 0020 0120 movs r0, #1 + 12835 .LVL1032: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12836 .loc 1 2299 3 view .LVU3858 + 12837 0022 28E0 b .L864 + 12838 .LVL1033: + 12839 .L861: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12840 .loc 1 2299 3 view .LVU3859 + 12841 0024 0C29 cmp r1, #12 + 12842 0026 05D1 bne .L875 +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12843 .loc 1 2325 7 is_stmt 1 view .LVU3860 + 12844 0028 0268 ldr r2, [r0] + 12845 002a D368 ldr r3, [r2, #12] + 12846 002c 1021 movs r1, #16 + 12847 .LVL1034: +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12848 .loc 1 2325 7 is_stmt 0 view .LVU3861 + 12849 002e 8B43 bics r3, r1 + 12850 0030 D360 str r3, [r2, #12] +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12851 .loc 1 2326 7 is_stmt 1 view .LVU3862 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12852 .loc 1 2334 3 view .LVU3863 + 12853 0032 06E0 b .L866 + 12854 .LVL1035: + 12855 .L875: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12856 .loc 1 2299 3 is_stmt 0 view .LVU3864 + 12857 0034 0120 movs r0, #1 + 12858 .LVL1036: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12859 .loc 1 2299 3 view .LVU3865 + 12860 0036 1EE0 b .L864 + 12861 .LVL1037: + 12862 .L862: +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12863 .loc 1 2304 7 is_stmt 1 view .LVU3866 + 12864 0038 0268 ldr r2, [r0] + 12865 003a D368 ldr r3, [r2, #12] + 12866 003c 0221 movs r1, #2 + 12867 .LVL1038: +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12868 .loc 1 2304 7 is_stmt 0 view .LVU3867 + 12869 003e 8B43 bics r3, r1 + 12870 0040 D360 str r3, [r2, #12] +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12871 .loc 1 2305 7 is_stmt 1 view .LVU3868 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12872 .loc 1 2334 3 view .LVU3869 + 12873 .L866: +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12874 .loc 1 2337 5 view .LVU3870 + ARM GAS /tmp/cchCqftX.s page 418 + + + 12875 0042 2868 ldr r0, [r5] + 12876 .LVL1039: +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12877 .loc 1 2337 5 is_stmt 0 view .LVU3871 + 12878 0044 0022 movs r2, #0 + 12879 0046 2100 movs r1, r4 + 12880 0048 FFF7FEFF bl TIM_CCxChannelCmd + 12881 .LVL1040: +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12882 .loc 1 2340 5 is_stmt 1 view .LVU3872 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12883 .loc 1 2340 5 view .LVU3873 + 12884 004c 2B68 ldr r3, [r5] + 12885 004e 196A ldr r1, [r3, #32] + 12886 0050 1D4A ldr r2, .L880 + 12887 0052 1142 tst r1, r2 + 12888 0054 07D1 bne .L867 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12889 .loc 1 2340 5 discriminator 1 view .LVU3874 + 12890 0056 196A ldr r1, [r3, #32] + 12891 0058 1C4A ldr r2, .L880+4 + 12892 005a 1142 tst r1, r2 + 12893 005c 03D1 bne .L867 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12894 .loc 1 2340 5 discriminator 3 view .LVU3875 + 12895 005e 1A68 ldr r2, [r3] + 12896 0060 0121 movs r1, #1 + 12897 0062 8A43 bics r2, r1 + 12898 0064 1A60 str r2, [r3] + 12899 .L867: +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12900 .loc 1 2340 5 discriminator 5 view .LVU3876 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12901 .loc 1 2343 5 view .LVU3877 + 12902 0066 002C cmp r4, #0 + 12903 0068 0CD1 bne .L868 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12904 .loc 1 2343 5 is_stmt 0 discriminator 1 view .LVU3878 + 12905 006a 0123 movs r3, #1 + 12906 006c 3E22 movs r2, #62 + 12907 006e AB54 strb r3, [r5, r2] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12908 .loc 1 2344 5 is_stmt 1 view .LVU3879 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12909 .loc 1 2344 5 is_stmt 0 discriminator 1 view .LVU3880 + 12910 0070 0432 adds r2, r2, #4 + 12911 0072 AB54 strb r3, [r5, r2] + 12912 0074 0020 movs r0, #0 + 12913 .L864: + 12914 .LVL1041: +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12915 .loc 1 2348 3 is_stmt 1 view .LVU3881 +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12916 .loc 1 2349 1 is_stmt 0 view .LVU3882 + 12917 @ sp needed + 12918 .LVL1042: + 12919 .LVL1043: + ARM GAS /tmp/cchCqftX.s page 419 + + +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12920 .loc 1 2349 1 view .LVU3883 + 12921 0076 70BD pop {r4, r5, r6, pc} + 12922 .LVL1044: + 12923 .L860: +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12924 .loc 1 2318 7 is_stmt 1 view .LVU3884 + 12925 0078 0268 ldr r2, [r0] + 12926 007a D368 ldr r3, [r2, #12] + 12927 007c 0821 movs r1, #8 + 12928 .LVL1045: +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12929 .loc 1 2318 7 is_stmt 0 view .LVU3885 + 12930 007e 8B43 bics r3, r1 + 12931 0080 D360 str r3, [r2, #12] +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12932 .loc 1 2319 7 is_stmt 1 view .LVU3886 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12933 .loc 1 2334 3 view .LVU3887 + 12934 0082 DEE7 b .L866 + 12935 .LVL1046: + 12936 .L868: +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12937 .loc 1 2343 5 is_stmt 0 discriminator 2 view .LVU3888 + 12938 0084 042C cmp r4, #4 + 12939 0086 0DD0 beq .L876 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12940 .loc 1 2343 5 discriminator 4 view .LVU3889 + 12941 0088 082C cmp r4, #8 + 12942 008a 0FD0 beq .L877 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12943 .loc 1 2343 5 discriminator 7 view .LVU3890 + 12944 008c 4123 movs r3, #65 + 12945 008e 0122 movs r2, #1 + 12946 0090 EA54 strb r2, [r5, r3] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12947 .loc 1 2344 5 is_stmt 1 view .LVU3891 + 12948 .L870: +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12949 .loc 1 2344 5 is_stmt 0 discriminator 2 view .LVU3892 + 12950 0092 042C cmp r4, #4 + 12951 0094 0ED0 beq .L878 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12952 .loc 1 2344 5 discriminator 4 view .LVU3893 + 12953 0096 082C cmp r4, #8 + 12954 0098 11D0 beq .L879 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12955 .loc 1 2344 5 discriminator 7 view .LVU3894 + 12956 009a 4523 movs r3, #69 + 12957 009c 0122 movs r2, #1 + 12958 009e EA54 strb r2, [r5, r3] + 12959 00a0 0020 movs r0, #0 + 12960 00a2 E8E7 b .L864 + 12961 .L876: +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12962 .loc 1 2343 5 discriminator 3 view .LVU3895 + 12963 00a4 3F23 movs r3, #63 + ARM GAS /tmp/cchCqftX.s page 420 + + + 12964 00a6 0122 movs r2, #1 + 12965 00a8 EA54 strb r2, [r5, r3] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12966 .loc 1 2344 5 is_stmt 1 view .LVU3896 + 12967 00aa F2E7 b .L870 + 12968 .L877: +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12969 .loc 1 2343 5 is_stmt 0 discriminator 6 view .LVU3897 + 12970 00ac 4023 movs r3, #64 + 12971 00ae 0122 movs r2, #1 + 12972 00b0 EA54 strb r2, [r5, r3] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12973 .loc 1 2344 5 is_stmt 1 view .LVU3898 + 12974 00b2 EEE7 b .L870 + 12975 .L878: +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12976 .loc 1 2344 5 is_stmt 0 discriminator 3 view .LVU3899 + 12977 00b4 4323 movs r3, #67 + 12978 00b6 0122 movs r2, #1 + 12979 00b8 EA54 strb r2, [r5, r3] + 12980 00ba 0020 movs r0, #0 + 12981 00bc DBE7 b .L864 + 12982 .L879: +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12983 .loc 1 2344 5 discriminator 6 view .LVU3900 + 12984 00be 4423 movs r3, #68 + 12985 00c0 0122 movs r2, #1 + 12986 00c2 EA54 strb r2, [r5, r3] + 12987 00c4 0020 movs r0, #0 + 12988 00c6 D6E7 b .L864 + 12989 .L881: + 12990 .align 2 + 12991 .L880: + 12992 00c8 11110000 .word 4369 + 12993 00cc 44040000 .word 1092 + 12994 .cfi_endproc + 12995 .LFE77: + 12997 .section .text.HAL_TIM_IC_Start_DMA,"ax",%progbits + 12998 .align 1 + 12999 .global HAL_TIM_IC_Start_DMA + 13000 .syntax unified + 13001 .code 16 + 13002 .thumb_func + 13004 HAL_TIM_IC_Start_DMA: + 13005 .LVL1047: + 13006 .LFB78: +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13007 .loc 1 2365 1 is_stmt 1 view -0 + 13008 .cfi_startproc + 13009 @ args = 0, pretend = 0, frame = 8 + 13010 @ frame_needed = 0, uses_anonymous_args = 0 +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13011 .loc 1 2365 1 is_stmt 0 view .LVU3902 + 13012 0000 F0B5 push {r4, r5, r6, r7, lr} + 13013 .cfi_def_cfa_offset 20 + 13014 .cfi_offset 4, -20 + 13015 .cfi_offset 5, -16 + ARM GAS /tmp/cchCqftX.s page 421 + + + 13016 .cfi_offset 6, -12 + 13017 .cfi_offset 7, -8 + 13018 .cfi_offset 14, -4 + 13019 0002 83B0 sub sp, sp, #12 + 13020 .cfi_def_cfa_offset 32 + 13021 0004 0700 movs r7, r0 + 13022 0006 0C00 movs r4, r1 + 13023 0008 1500 movs r5, r2 + 13024 000a 0193 str r3, [sp, #4] +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 13025 .loc 1 2366 3 is_stmt 1 view .LVU3903 + 13026 .LVL1048: +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13027 .loc 1 2367 3 view .LVU3904 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13028 .loc 1 2369 3 view .LVU3905 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13029 .loc 1 2369 47 is_stmt 0 view .LVU3906 + 13030 000c 0029 cmp r1, #0 + 13031 000e 48D1 bne .L883 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13032 .loc 1 2369 47 discriminator 1 view .LVU3907 + 13033 0010 3E23 movs r3, #62 + 13034 .LVL1049: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13035 .loc 1 2369 47 discriminator 1 view .LVU3908 + 13036 0012 C05C ldrb r0, [r0, r3] + 13037 .LVL1050: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13038 .loc 1 2369 47 discriminator 1 view .LVU3909 + 13039 0014 C0B2 uxtb r0, r0 + 13040 .L884: + 13041 .LVL1051: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13042 .loc 1 2370 3 is_stmt 1 view .LVU3910 +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13043 .loc 1 2370 61 is_stmt 0 view .LVU3911 + 13044 0016 002C cmp r4, #0 + 13045 0018 53D1 bne .L887 +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13046 .loc 1 2370 61 discriminator 1 view .LVU3912 + 13047 001a 4223 movs r3, #66 + 13048 001c FE5C ldrb r6, [r7, r3] + 13049 001e F6B2 uxtb r6, r6 + 13050 .L888: + 13051 .LVL1052: +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); + 13052 .loc 1 2373 3 is_stmt 1 view .LVU3913 +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13053 .loc 1 2374 3 view .LVU3914 +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 13054 .loc 1 2377 3 view .LVU3915 +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 13055 .loc 1 2377 6 is_stmt 0 view .LVU3916 + 13056 0020 0228 cmp r0, #2 + 13057 0022 00D1 bne .LCB11912 + 13058 0024 E9E0 b .L891 @long jump + ARM GAS /tmp/cchCqftX.s page 422 + + + 13059 .LCB11912: +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13060 .loc 1 2378 7 view .LVU3917 + 13061 0026 022E cmp r6, #2 + 13062 0028 00D1 bne .LCB11914 + 13063 002a E3E0 b .L907 @long jump + 13064 .LCB11914: +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) + 13065 .loc 1 2382 8 is_stmt 1 view .LVU3918 +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) + 13066 .loc 1 2382 11 is_stmt 0 view .LVU3919 + 13067 002c 0128 cmp r0, #1 + 13068 002e 00D0 beq .LCB11917 + 13069 0030 E2E0 b .L908 @long jump + 13070 .LCB11917: +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13071 .loc 1 2383 12 view .LVU3920 + 13072 0032 012E cmp r6, #1 + 13073 0034 00D0 beq .LCB11919 + 13074 0036 E0E0 b .L891 @long jump + 13075 .LCB11919: +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13076 .loc 1 2385 5 is_stmt 1 view .LVU3921 +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13077 .loc 1 2385 8 is_stmt 0 view .LVU3922 + 13078 0038 002D cmp r5, #0 + 13079 003a 00D1 bne .LCB11922 + 13080 003c DFE0 b .L909 @long jump + 13081 .LCB11922: +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13082 .loc 1 2385 25 discriminator 1 view .LVU3923 + 13083 003e 019B ldr r3, [sp, #4] + 13084 0040 002B cmp r3, #0 + 13085 0042 00D1 bne .LCB11925 + 13086 0044 DDE0 b .L910 @long jump + 13087 .LCB11925: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13088 .loc 1 2391 7 is_stmt 1 view .LVU3924 + 13089 0046 002C cmp r4, #0 + 13090 0048 4BD1 bne .L892 +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13091 .loc 1 2391 7 is_stmt 0 discriminator 1 view .LVU3925 + 13092 004a 0223 movs r3, #2 + 13093 004c 3E22 movs r2, #62 + 13094 .LVL1053: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13095 .loc 1 2391 7 discriminator 1 view .LVU3926 + 13096 004e BB54 strb r3, [r7, r2] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13097 .loc 1 2392 7 is_stmt 1 view .LVU3927 +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13098 .loc 1 2392 7 is_stmt 0 discriminator 1 view .LVU3928 + 13099 0050 0432 adds r2, r2, #4 + 13100 0052 BB54 strb r3, [r7, r2] + 13101 .L893: +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13102 .loc 1 2401 3 is_stmt 1 view .LVU3929 + ARM GAS /tmp/cchCqftX.s page 423 + + + 13103 0054 3868 ldr r0, [r7] + 13104 .LVL1054: +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13105 .loc 1 2401 3 is_stmt 0 view .LVU3930 + 13106 0056 0122 movs r2, #1 + 13107 0058 2100 movs r1, r4 + 13108 .LVL1055: +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13109 .loc 1 2401 3 view .LVU3931 + 13110 005a FFF7FEFF bl TIM_CCxChannelCmd + 13111 .LVL1056: +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13112 .loc 1 2403 3 is_stmt 1 view .LVU3932 + 13113 005e 082C cmp r4, #8 + 13114 0060 00D1 bne .LCB11948 + 13115 0062 A4E0 b .L899 @long jump + 13116 .LCB11948: + 13117 0064 5ED8 bhi .L900 + 13118 0066 002C cmp r4, #0 + 13119 0068 79D0 beq .L901 + 13120 006a 042C cmp r4, #4 + 13121 006c 58D1 bne .L915 +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13122 .loc 1 2429 7 view .LVU3933 +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13123 .loc 1 2429 17 is_stmt 0 view .LVU3934 + 13124 006e BB6A ldr r3, [r7, #40] +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13125 .loc 1 2429 52 view .LVU3935 + 13126 0070 694A ldr r2, .L925 + 13127 0072 9A62 str r2, [r3, #40] +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13128 .loc 1 2430 7 is_stmt 1 view .LVU3936 +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13129 .loc 1 2430 17 is_stmt 0 view .LVU3937 + 13130 0074 BB6A ldr r3, [r7, #40] +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13131 .loc 1 2430 56 view .LVU3938 + 13132 0076 694A ldr r2, .L925+4 + 13133 0078 DA62 str r2, [r3, #44] +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13134 .loc 1 2433 7 is_stmt 1 view .LVU3939 +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13135 .loc 1 2433 17 is_stmt 0 view .LVU3940 + 13136 007a BB6A ldr r3, [r7, #40] +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13137 .loc 1 2433 53 view .LVU3941 + 13138 007c 684A ldr r2, .L925+8 + 13139 007e 1A63 str r2, [r3, #48] +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13140 .loc 1 2436 7 is_stmt 1 view .LVU3942 +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13141 .loc 1 2436 71 is_stmt 0 view .LVU3943 + 13142 0080 3968 ldr r1, [r7] +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13143 .loc 1 2436 66 view .LVU3944 + 13144 0082 3831 adds r1, r1, #56 + ARM GAS /tmp/cchCqftX.s page 424 + + +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13145 .loc 1 2436 11 view .LVU3945 + 13146 0084 B86A ldr r0, [r7, #40] + 13147 0086 019B ldr r3, [sp, #4] + 13148 0088 2A00 movs r2, r5 + 13149 008a FFF7FEFF bl HAL_DMA_Start_IT + 13150 .LVL1057: +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13151 .loc 1 2436 10 discriminator 1 view .LVU3946 + 13152 008e 0028 cmp r0, #0 + 13153 0090 00D0 beq .LCB11976 + 13154 0092 BAE0 b .L912 @long jump + 13155 .LCB11976: +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13156 .loc 1 2443 7 is_stmt 1 view .LVU3947 + 13157 0094 3A68 ldr r2, [r7] + 13158 0096 D168 ldr r1, [r2, #12] + 13159 0098 8023 movs r3, #128 + 13160 009a DB00 lsls r3, r3, #3 + 13161 009c 0B43 orrs r3, r1 + 13162 009e D360 str r3, [r2, #12] +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13163 .loc 1 2444 7 view .LVU3948 + 13164 00a0 75E0 b .L903 + 13165 .LVL1058: + 13166 .L883: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13167 .loc 1 2369 47 is_stmt 0 discriminator 2 view .LVU3949 + 13168 00a2 0429 cmp r1, #4 + 13169 00a4 05D0 beq .L916 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13170 .loc 1 2369 47 discriminator 5 view .LVU3950 + 13171 00a6 0829 cmp r1, #8 + 13172 00a8 07D0 beq .L917 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13173 .loc 1 2369 47 discriminator 8 view .LVU3951 + 13174 00aa 4123 movs r3, #65 + 13175 .LVL1059: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13176 .loc 1 2369 47 discriminator 8 view .LVU3952 + 13177 00ac C05C ldrb r0, [r0, r3] + 13178 .LVL1060: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13179 .loc 1 2369 47 discriminator 8 view .LVU3953 + 13180 00ae C0B2 uxtb r0, r0 + 13181 00b0 B1E7 b .L884 + 13182 .LVL1061: + 13183 .L916: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13184 .loc 1 2369 47 discriminator 4 view .LVU3954 + 13185 00b2 3F23 movs r3, #63 + 13186 .LVL1062: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13187 .loc 1 2369 47 discriminator 4 view .LVU3955 + 13188 00b4 C05C ldrb r0, [r0, r3] + 13189 .LVL1063: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + ARM GAS /tmp/cchCqftX.s page 425 + + + 13190 .loc 1 2369 47 discriminator 4 view .LVU3956 + 13191 00b6 C0B2 uxtb r0, r0 + 13192 00b8 ADE7 b .L884 + 13193 .LVL1064: + 13194 .L917: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13195 .loc 1 2369 47 discriminator 7 view .LVU3957 + 13196 00ba 4023 movs r3, #64 + 13197 .LVL1065: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13198 .loc 1 2369 47 discriminator 7 view .LVU3958 + 13199 00bc C05C ldrb r0, [r0, r3] + 13200 .LVL1066: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13201 .loc 1 2369 47 discriminator 7 view .LVU3959 + 13202 00be C0B2 uxtb r0, r0 + 13203 00c0 A9E7 b .L884 + 13204 .LVL1067: + 13205 .L887: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13206 .loc 1 2370 61 discriminator 2 view .LVU3960 + 13207 00c2 042C cmp r4, #4 + 13208 00c4 05D0 beq .L918 +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13209 .loc 1 2370 61 discriminator 5 view .LVU3961 + 13210 00c6 082C cmp r4, #8 + 13211 00c8 07D0 beq .L919 +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13212 .loc 1 2370 61 discriminator 8 view .LVU3962 + 13213 00ca 4523 movs r3, #69 + 13214 00cc FE5C ldrb r6, [r7, r3] + 13215 00ce F6B2 uxtb r6, r6 + 13216 00d0 A6E7 b .L888 + 13217 .L918: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13218 .loc 1 2370 61 discriminator 4 view .LVU3963 + 13219 00d2 4323 movs r3, #67 + 13220 00d4 FE5C ldrb r6, [r7, r3] + 13221 00d6 F6B2 uxtb r6, r6 + 13222 00d8 A2E7 b .L888 + 13223 .L919: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13224 .loc 1 2370 61 discriminator 7 view .LVU3964 + 13225 00da 4423 movs r3, #68 + 13226 00dc FE5C ldrb r6, [r7, r3] + 13227 00de F6B2 uxtb r6, r6 + 13228 00e0 9EE7 b .L888 + 13229 .LVL1068: + 13230 .L892: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13231 .loc 1 2391 7 discriminator 2 view .LVU3965 + 13232 00e2 042C cmp r4, #4 + 13233 00e4 0CD0 beq .L920 +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13234 .loc 1 2391 7 discriminator 4 view .LVU3966 + 13235 00e6 082C cmp r4, #8 + 13236 00e8 0ED0 beq .L921 + ARM GAS /tmp/cchCqftX.s page 426 + + +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13237 .loc 1 2391 7 discriminator 7 view .LVU3967 + 13238 00ea 4123 movs r3, #65 + 13239 00ec 0222 movs r2, #2 + 13240 .LVL1069: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13241 .loc 1 2391 7 discriminator 7 view .LVU3968 + 13242 00ee FA54 strb r2, [r7, r3] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13243 .loc 1 2392 7 is_stmt 1 view .LVU3969 + 13244 .L895: +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13245 .loc 1 2392 7 is_stmt 0 discriminator 2 view .LVU3970 + 13246 00f0 042C cmp r4, #4 + 13247 00f2 0DD0 beq .L922 +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13248 .loc 1 2392 7 discriminator 4 view .LVU3971 + 13249 00f4 082C cmp r4, #8 + 13250 00f6 0FD0 beq .L923 +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13251 .loc 1 2392 7 discriminator 7 view .LVU3972 + 13252 00f8 4523 movs r3, #69 + 13253 00fa 0222 movs r2, #2 + 13254 00fc FA54 strb r2, [r7, r3] + 13255 00fe A9E7 b .L893 + 13256 .LVL1070: + 13257 .L920: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13258 .loc 1 2391 7 discriminator 3 view .LVU3973 + 13259 0100 3F23 movs r3, #63 + 13260 0102 0222 movs r2, #2 + 13261 .LVL1071: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13262 .loc 1 2391 7 discriminator 3 view .LVU3974 + 13263 0104 FA54 strb r2, [r7, r3] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13264 .loc 1 2392 7 is_stmt 1 view .LVU3975 + 13265 0106 F3E7 b .L895 + 13266 .LVL1072: + 13267 .L921: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13268 .loc 1 2391 7 is_stmt 0 discriminator 6 view .LVU3976 + 13269 0108 4023 movs r3, #64 + 13270 010a 0222 movs r2, #2 + 13271 .LVL1073: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13272 .loc 1 2391 7 discriminator 6 view .LVU3977 + 13273 010c FA54 strb r2, [r7, r3] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13274 .loc 1 2392 7 is_stmt 1 view .LVU3978 + 13275 010e EFE7 b .L895 + 13276 .L922: +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13277 .loc 1 2392 7 is_stmt 0 discriminator 3 view .LVU3979 + 13278 0110 4323 movs r3, #67 + 13279 0112 0222 movs r2, #2 + 13280 0114 FA54 strb r2, [r7, r3] + ARM GAS /tmp/cchCqftX.s page 427 + + + 13281 0116 9DE7 b .L893 + 13282 .L923: +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13283 .loc 1 2392 7 discriminator 6 view .LVU3980 + 13284 0118 4423 movs r3, #68 + 13285 011a 0222 movs r2, #2 + 13286 011c FA54 strb r2, [r7, r3] + 13287 011e 99E7 b .L893 + 13288 .LVL1074: + 13289 .L915: +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13290 .loc 1 2403 3 view .LVU3981 + 13291 0120 3000 movs r0, r6 + 13292 0122 34E0 b .L903 + 13293 .L900: + 13294 0124 0C2C cmp r4, #12 + 13295 0126 18D1 bne .L924 +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13296 .loc 1 2471 7 is_stmt 1 view .LVU3982 +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13297 .loc 1 2471 17 is_stmt 0 view .LVU3983 + 13298 0128 3B6B ldr r3, [r7, #48] +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13299 .loc 1 2471 52 view .LVU3984 + 13300 012a 3B4A ldr r2, .L925 + 13301 012c 9A62 str r2, [r3, #40] +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13302 .loc 1 2472 7 is_stmt 1 view .LVU3985 +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13303 .loc 1 2472 17 is_stmt 0 view .LVU3986 + 13304 012e 3B6B ldr r3, [r7, #48] +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13305 .loc 1 2472 56 view .LVU3987 + 13306 0130 3A4A ldr r2, .L925+4 + 13307 0132 DA62 str r2, [r3, #44] +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13308 .loc 1 2475 7 is_stmt 1 view .LVU3988 +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13309 .loc 1 2475 17 is_stmt 0 view .LVU3989 + 13310 0134 3B6B ldr r3, [r7, #48] +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13311 .loc 1 2475 53 view .LVU3990 + 13312 0136 3A4A ldr r2, .L925+8 + 13313 0138 1A63 str r2, [r3, #48] +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13314 .loc 1 2478 7 is_stmt 1 view .LVU3991 +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13315 .loc 1 2478 71 is_stmt 0 view .LVU3992 + 13316 013a 3968 ldr r1, [r7] +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13317 .loc 1 2478 66 view .LVU3993 + 13318 013c 4031 adds r1, r1, #64 +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13319 .loc 1 2478 11 view .LVU3994 + 13320 013e 386B ldr r0, [r7, #48] + 13321 0140 019B ldr r3, [sp, #4] + 13322 0142 2A00 movs r2, r5 + ARM GAS /tmp/cchCqftX.s page 428 + + + 13323 0144 FFF7FEFF bl HAL_DMA_Start_IT + 13324 .LVL1075: +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13325 .loc 1 2478 10 discriminator 1 view .LVU3995 + 13326 0148 0028 cmp r0, #0 + 13327 014a 62D1 bne .L914 +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13328 .loc 1 2485 7 is_stmt 1 view .LVU3996 + 13329 014c 3A68 ldr r2, [r7] + 13330 014e D168 ldr r1, [r2, #12] + 13331 0150 8023 movs r3, #128 + 13332 0152 5B01 lsls r3, r3, #5 + 13333 0154 0B43 orrs r3, r1 + 13334 0156 D360 str r3, [r2, #12] +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13335 .loc 1 2486 7 view .LVU3997 + 13336 0158 19E0 b .L903 + 13337 .L924: +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13338 .loc 1 2403 3 is_stmt 0 view .LVU3998 + 13339 015a 3000 movs r0, r6 + 13340 015c 17E0 b .L903 + 13341 .L901: +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13342 .loc 1 2408 7 is_stmt 1 view .LVU3999 +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13343 .loc 1 2408 17 is_stmt 0 view .LVU4000 + 13344 015e 7B6A ldr r3, [r7, #36] +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13345 .loc 1 2408 52 view .LVU4001 + 13346 0160 2D4A ldr r2, .L925 + 13347 0162 9A62 str r2, [r3, #40] +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13348 .loc 1 2409 7 is_stmt 1 view .LVU4002 +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13349 .loc 1 2409 17 is_stmt 0 view .LVU4003 + 13350 0164 7B6A ldr r3, [r7, #36] +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13351 .loc 1 2409 56 view .LVU4004 + 13352 0166 2D4A ldr r2, .L925+4 + 13353 0168 DA62 str r2, [r3, #44] +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13354 .loc 1 2412 7 is_stmt 1 view .LVU4005 +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13355 .loc 1 2412 17 is_stmt 0 view .LVU4006 + 13356 016a 7B6A ldr r3, [r7, #36] +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13357 .loc 1 2412 53 view .LVU4007 + 13358 016c 2C4A ldr r2, .L925+8 + 13359 016e 1A63 str r2, [r3, #48] +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13360 .loc 1 2415 7 is_stmt 1 view .LVU4008 +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13361 .loc 1 2415 71 is_stmt 0 view .LVU4009 + 13362 0170 3968 ldr r1, [r7] +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13363 .loc 1 2415 66 view .LVU4010 + ARM GAS /tmp/cchCqftX.s page 429 + + + 13364 0172 3431 adds r1, r1, #52 +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13365 .loc 1 2415 11 view .LVU4011 + 13366 0174 786A ldr r0, [r7, #36] + 13367 0176 019B ldr r3, [sp, #4] + 13368 0178 2A00 movs r2, r5 + 13369 017a FFF7FEFF bl HAL_DMA_Start_IT + 13370 .LVL1076: +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13371 .loc 1 2415 10 discriminator 1 view .LVU4012 + 13372 017e 0028 cmp r0, #0 + 13373 0180 41D1 bne .L911 +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13374 .loc 1 2422 7 is_stmt 1 view .LVU4013 + 13375 0182 3A68 ldr r2, [r7] + 13376 0184 D168 ldr r1, [r2, #12] + 13377 0186 8023 movs r3, #128 + 13378 0188 9B00 lsls r3, r3, #2 + 13379 018a 0B43 orrs r3, r1 + 13380 018c D360 str r3, [r2, #12] +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13381 .loc 1 2423 7 view .LVU4014 + 13382 .L903: + 13383 .LVL1077: +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13384 .loc 1 2495 3 view .LVU4015 +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13385 .loc 1 2495 7 is_stmt 0 view .LVU4016 + 13386 018e 3B68 ldr r3, [r7] +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13387 .loc 1 2495 6 view .LVU4017 + 13388 0190 244A ldr r2, .L925+12 + 13389 0192 9342 cmp r3, r2 + 13390 0194 24D0 beq .L905 +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13391 .loc 1 2495 7 discriminator 1 view .LVU4018 + 13392 0196 8022 movs r2, #128 + 13393 0198 D205 lsls r2, r2, #23 + 13394 019a 9342 cmp r3, r2 + 13395 019c 20D0 beq .L905 +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13396 .loc 1 2495 7 discriminator 2 view .LVU4019 + 13397 019e 224A ldr r2, .L925+16 + 13398 01a0 9342 cmp r3, r2 + 13399 01a2 1DD0 beq .L905 +2505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13400 .loc 1 2505 5 is_stmt 1 view .LVU4020 + 13401 01a4 1A68 ldr r2, [r3] + 13402 01a6 0121 movs r1, #1 + 13403 01a8 0A43 orrs r2, r1 + 13404 01aa 1A60 str r2, [r3] + 13405 01ac 25E0 b .L891 + 13406 .LVL1078: + 13407 .L899: +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13408 .loc 1 2450 7 view .LVU4021 +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + ARM GAS /tmp/cchCqftX.s page 430 + + + 13409 .loc 1 2450 17 is_stmt 0 view .LVU4022 + 13410 01ae FB6A ldr r3, [r7, #44] +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13411 .loc 1 2450 52 view .LVU4023 + 13412 01b0 194A ldr r2, .L925 + 13413 01b2 9A62 str r2, [r3, #40] +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13414 .loc 1 2451 7 is_stmt 1 view .LVU4024 +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13415 .loc 1 2451 17 is_stmt 0 view .LVU4025 + 13416 01b4 FB6A ldr r3, [r7, #44] +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13417 .loc 1 2451 56 view .LVU4026 + 13418 01b6 194A ldr r2, .L925+4 + 13419 01b8 DA62 str r2, [r3, #44] +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13420 .loc 1 2454 7 is_stmt 1 view .LVU4027 +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13421 .loc 1 2454 17 is_stmt 0 view .LVU4028 + 13422 01ba FB6A ldr r3, [r7, #44] +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13423 .loc 1 2454 53 view .LVU4029 + 13424 01bc 184A ldr r2, .L925+8 + 13425 01be 1A63 str r2, [r3, #48] +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13426 .loc 1 2457 7 is_stmt 1 view .LVU4030 +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13427 .loc 1 2457 71 is_stmt 0 view .LVU4031 + 13428 01c0 3968 ldr r1, [r7] +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13429 .loc 1 2457 66 view .LVU4032 + 13430 01c2 3C31 adds r1, r1, #60 +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13431 .loc 1 2457 11 view .LVU4033 + 13432 01c4 F86A ldr r0, [r7, #44] + 13433 01c6 019B ldr r3, [sp, #4] + 13434 01c8 2A00 movs r2, r5 + 13435 01ca FFF7FEFF bl HAL_DMA_Start_IT + 13436 .LVL1079: +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13437 .loc 1 2457 10 discriminator 1 view .LVU4034 + 13438 01ce 0028 cmp r0, #0 + 13439 01d0 1DD1 bne .L913 +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13440 .loc 1 2464 7 is_stmt 1 view .LVU4035 + 13441 01d2 3A68 ldr r2, [r7] + 13442 01d4 D168 ldr r1, [r2, #12] + 13443 01d6 8023 movs r3, #128 + 13444 01d8 1B01 lsls r3, r3, #4 + 13445 01da 0B43 orrs r3, r1 + 13446 01dc D360 str r3, [r2, #12] +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13447 .loc 1 2465 7 view .LVU4036 + 13448 01de D6E7 b .L903 + 13449 .LVL1080: + 13450 .L905: +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + ARM GAS /tmp/cchCqftX.s page 431 + + + 13451 .loc 1 2497 5 view .LVU4037 +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13452 .loc 1 2497 29 is_stmt 0 view .LVU4038 + 13453 01e0 9968 ldr r1, [r3, #8] +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13454 .loc 1 2497 13 view .LVU4039 + 13455 01e2 0722 movs r2, #7 + 13456 01e4 0A40 ands r2, r1 + 13457 .LVL1081: +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13458 .loc 1 2498 5 is_stmt 1 view .LVU4040 +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13459 .loc 1 2498 8 is_stmt 0 view .LVU4041 + 13460 01e6 062A cmp r2, #6 + 13461 01e8 07D0 beq .L891 +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13462 .loc 1 2500 7 is_stmt 1 view .LVU4042 + 13463 01ea 1A68 ldr r2, [r3] + 13464 .LVL1082: +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13465 .loc 1 2500 7 is_stmt 0 view .LVU4043 + 13466 01ec 0121 movs r1, #1 + 13467 .LVL1083: +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13468 .loc 1 2500 7 view .LVU4044 + 13469 01ee 0A43 orrs r2, r1 + 13470 01f0 1A60 str r2, [r3] + 13471 01f2 02E0 b .L891 + 13472 .LVL1084: + 13473 .L907: +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13474 .loc 1 2380 12 view .LVU4045 + 13475 01f4 3000 movs r0, r6 + 13476 .LVL1085: +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13477 .loc 1 2380 12 view .LVU4046 + 13478 01f6 00E0 b .L891 + 13479 .LVL1086: + 13480 .L908: +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13481 .loc 1 2397 12 view .LVU4047 + 13482 01f8 0120 movs r0, #1 + 13483 .LVL1087: + 13484 .L891: +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13485 .loc 1 2510 1 view .LVU4048 + 13486 01fa 03B0 add sp, sp, #12 + 13487 @ sp needed + 13488 .LVL1088: + 13489 .LVL1089: + 13490 .LVL1090: + 13491 .LVL1091: +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13492 .loc 1 2510 1 view .LVU4049 + 13493 01fc F0BD pop {r4, r5, r6, r7, pc} + 13494 .LVL1092: + 13495 .L909: + ARM GAS /tmp/cchCqftX.s page 432 + + +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13496 .loc 1 2387 14 view .LVU4050 + 13497 01fe 3000 movs r0, r6 + 13498 .LVL1093: +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13499 .loc 1 2387 14 view .LVU4051 + 13500 0200 FBE7 b .L891 + 13501 .LVL1094: + 13502 .L910: +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13503 .loc 1 2387 14 view .LVU4052 + 13504 0202 3000 movs r0, r6 + 13505 .LVL1095: +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13506 .loc 1 2387 14 view .LVU4053 + 13507 0204 F9E7 b .L891 + 13508 .LVL1096: + 13509 .L911: +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13510 .loc 1 2419 16 view .LVU4054 + 13511 0206 3000 movs r0, r6 + 13512 0208 F7E7 b .L891 + 13513 .L912: +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13514 .loc 1 2440 16 view .LVU4055 + 13515 020a 3000 movs r0, r6 + 13516 020c F5E7 b .L891 + 13517 .L913: +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13518 .loc 1 2461 16 view .LVU4056 + 13519 020e 3000 movs r0, r6 + 13520 0210 F3E7 b .L891 + 13521 .L914: +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13522 .loc 1 2482 16 view .LVU4057 + 13523 0212 3000 movs r0, r6 + 13524 0214 F1E7 b .L891 + 13525 .L926: + 13526 0216 C046 .align 2 + 13527 .L925: + 13528 0218 00000000 .word TIM_DMACaptureCplt + 13529 021c 00000000 .word TIM_DMACaptureHalfCplt + 13530 0220 00000000 .word TIM_DMAError + 13531 0224 002C0140 .word 1073818624 + 13532 0228 00040040 .word 1073742848 + 13533 .cfi_endproc + 13534 .LFE78: + 13536 .section .text.HAL_TIM_IC_Stop_DMA,"ax",%progbits + 13537 .align 1 + 13538 .global HAL_TIM_IC_Stop_DMA + 13539 .syntax unified + 13540 .code 16 + 13541 .thumb_func + 13543 HAL_TIM_IC_Stop_DMA: + 13544 .LVL1097: + 13545 .LFB79: +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/cchCqftX.s page 433 + + + 13546 .loc 1 2524 1 is_stmt 1 view -0 + 13547 .cfi_startproc + 13548 @ args = 0, pretend = 0, frame = 0 + 13549 @ frame_needed = 0, uses_anonymous_args = 0 +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13550 .loc 1 2524 1 is_stmt 0 view .LVU4059 + 13551 0000 70B5 push {r4, r5, r6, lr} + 13552 .cfi_def_cfa_offset 16 + 13553 .cfi_offset 4, -16 + 13554 .cfi_offset 5, -12 + 13555 .cfi_offset 6, -8 + 13556 .cfi_offset 14, -4 + 13557 0002 0500 movs r5, r0 + 13558 0004 0C00 movs r4, r1 +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13559 .loc 1 2525 3 is_stmt 1 view .LVU4060 + 13560 .LVL1098: +2528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); + 13561 .loc 1 2528 3 view .LVU4061 +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13562 .loc 1 2529 3 view .LVU4062 +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13563 .loc 1 2532 3 view .LVU4063 + 13564 0006 0068 ldr r0, [r0] + 13565 .LVL1099: +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13566 .loc 1 2532 3 is_stmt 0 view .LVU4064 + 13567 0008 0022 movs r2, #0 + 13568 000a FFF7FEFF bl TIM_CCxChannelCmd + 13569 .LVL1100: +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13570 .loc 1 2534 3 is_stmt 1 view .LVU4065 + 13571 000e 082C cmp r4, #8 + 13572 0010 3AD0 beq .L928 + 13573 0012 0ED8 bhi .L929 + 13574 0014 002C cmp r4, #0 + 13575 0016 19D0 beq .L930 + 13576 0018 042C cmp r4, #4 + 13577 001a 08D1 bne .L942 +2547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 13578 .loc 1 2547 7 view .LVU4066 + 13579 001c 2A68 ldr r2, [r5] + 13580 001e D368 ldr r3, [r2, #12] + 13581 0020 2F49 ldr r1, .L948 + 13582 0022 0B40 ands r3, r1 + 13583 0024 D360 str r3, [r2, #12] +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13584 .loc 1 2548 7 view .LVU4067 +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13585 .loc 1 2548 13 is_stmt 0 view .LVU4068 + 13586 0026 A86A ldr r0, [r5, #40] + 13587 0028 FFF7FEFF bl HAL_DMA_Abort_IT + 13588 .LVL1101: +2549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13589 .loc 1 2549 7 is_stmt 1 view .LVU4069 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13590 .loc 1 2573 3 view .LVU4070 + ARM GAS /tmp/cchCqftX.s page 434 + + + 13591 002c 16E0 b .L934 + 13592 .L942: +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13593 .loc 1 2534 3 is_stmt 0 view .LVU4071 + 13594 002e 0120 movs r0, #1 + 13595 0030 29E0 b .L932 + 13596 .L929: + 13597 0032 0C2C cmp r4, #12 + 13598 0034 08D1 bne .L943 +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 13599 .loc 1 2563 7 is_stmt 1 view .LVU4072 + 13600 0036 2A68 ldr r2, [r5] + 13601 0038 D368 ldr r3, [r2, #12] + 13602 003a 2A49 ldr r1, .L948+4 + 13603 003c 0B40 ands r3, r1 + 13604 003e D360 str r3, [r2, #12] +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13605 .loc 1 2564 7 view .LVU4073 +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13606 .loc 1 2564 13 is_stmt 0 view .LVU4074 + 13607 0040 286B ldr r0, [r5, #48] + 13608 0042 FFF7FEFF bl HAL_DMA_Abort_IT + 13609 .LVL1102: +2565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13610 .loc 1 2565 7 is_stmt 1 view .LVU4075 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13611 .loc 1 2573 3 view .LVU4076 + 13612 0046 09E0 b .L934 + 13613 .L943: +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13614 .loc 1 2534 3 is_stmt 0 view .LVU4077 + 13615 0048 0120 movs r0, #1 + 13616 004a 1CE0 b .L932 + 13617 .L930: +2539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 13618 .loc 1 2539 7 is_stmt 1 view .LVU4078 + 13619 004c 2A68 ldr r2, [r5] + 13620 004e D368 ldr r3, [r2, #12] + 13621 0050 2549 ldr r1, .L948+8 + 13622 0052 0B40 ands r3, r1 + 13623 0054 D360 str r3, [r2, #12] +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13624 .loc 1 2540 7 view .LVU4079 +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13625 .loc 1 2540 13 is_stmt 0 view .LVU4080 + 13626 0056 686A ldr r0, [r5, #36] + 13627 0058 FFF7FEFF bl HAL_DMA_Abort_IT + 13628 .LVL1103: +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13629 .loc 1 2541 7 is_stmt 1 view .LVU4081 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13630 .loc 1 2573 3 view .LVU4082 + 13631 .L934: +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13632 .loc 1 2576 5 view .LVU4083 +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13633 .loc 1 2576 5 view .LVU4084 + ARM GAS /tmp/cchCqftX.s page 435 + + + 13634 005c 2B68 ldr r3, [r5] + 13635 005e 196A ldr r1, [r3, #32] + 13636 0060 224A ldr r2, .L948+12 + 13637 0062 1142 tst r1, r2 + 13638 0064 07D1 bne .L935 +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13639 .loc 1 2576 5 discriminator 1 view .LVU4085 + 13640 0066 196A ldr r1, [r3, #32] + 13641 0068 214A ldr r2, .L948+16 + 13642 006a 1142 tst r1, r2 + 13643 006c 03D1 bne .L935 +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13644 .loc 1 2576 5 discriminator 3 view .LVU4086 + 13645 006e 1A68 ldr r2, [r3] + 13646 0070 0121 movs r1, #1 + 13647 0072 8A43 bics r2, r1 + 13648 0074 1A60 str r2, [r3] + 13649 .L935: +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13650 .loc 1 2576 5 discriminator 5 view .LVU4087 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13651 .loc 1 2579 5 view .LVU4088 + 13652 0076 002C cmp r4, #0 + 13653 0078 0FD1 bne .L936 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13654 .loc 1 2579 5 is_stmt 0 discriminator 1 view .LVU4089 + 13655 007a 0123 movs r3, #1 + 13656 007c 3E22 movs r2, #62 + 13657 007e AB54 strb r3, [r5, r2] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13658 .loc 1 2580 5 is_stmt 1 view .LVU4090 +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13659 .loc 1 2580 5 is_stmt 0 discriminator 1 view .LVU4091 + 13660 0080 0432 adds r2, r2, #4 + 13661 0082 AB54 strb r3, [r5, r2] + 13662 0084 0020 movs r0, #0 + 13663 .L932: + 13664 .LVL1104: +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13665 .loc 1 2584 3 is_stmt 1 view .LVU4092 +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 13666 .loc 1 2585 1 is_stmt 0 view .LVU4093 + 13667 @ sp needed + 13668 .LVL1105: + 13669 .LVL1106: +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 13670 .loc 1 2585 1 view .LVU4094 + 13671 0086 70BD pop {r4, r5, r6, pc} + 13672 .LVL1107: + 13673 .L928: +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 13674 .loc 1 2555 7 is_stmt 1 view .LVU4095 + 13675 0088 2A68 ldr r2, [r5] + 13676 008a D368 ldr r3, [r2, #12] + 13677 008c 1949 ldr r1, .L948+20 + 13678 008e 0B40 ands r3, r1 + 13679 0090 D360 str r3, [r2, #12] + ARM GAS /tmp/cchCqftX.s page 436 + + +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13680 .loc 1 2556 7 view .LVU4096 +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13681 .loc 1 2556 13 is_stmt 0 view .LVU4097 + 13682 0092 E86A ldr r0, [r5, #44] + 13683 0094 FFF7FEFF bl HAL_DMA_Abort_IT + 13684 .LVL1108: +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13685 .loc 1 2557 7 is_stmt 1 view .LVU4098 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13686 .loc 1 2573 3 view .LVU4099 + 13687 0098 E0E7 b .L934 + 13688 .L936: +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13689 .loc 1 2579 5 is_stmt 0 discriminator 2 view .LVU4100 + 13690 009a 042C cmp r4, #4 + 13691 009c 0DD0 beq .L944 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13692 .loc 1 2579 5 discriminator 4 view .LVU4101 + 13693 009e 082C cmp r4, #8 + 13694 00a0 0FD0 beq .L945 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13695 .loc 1 2579 5 discriminator 7 view .LVU4102 + 13696 00a2 4123 movs r3, #65 + 13697 00a4 0122 movs r2, #1 + 13698 00a6 EA54 strb r2, [r5, r3] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13699 .loc 1 2580 5 is_stmt 1 view .LVU4103 + 13700 .L938: +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13701 .loc 1 2580 5 is_stmt 0 discriminator 2 view .LVU4104 + 13702 00a8 042C cmp r4, #4 + 13703 00aa 0ED0 beq .L946 +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13704 .loc 1 2580 5 discriminator 4 view .LVU4105 + 13705 00ac 082C cmp r4, #8 + 13706 00ae 11D0 beq .L947 +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13707 .loc 1 2580 5 discriminator 7 view .LVU4106 + 13708 00b0 4523 movs r3, #69 + 13709 00b2 0122 movs r2, #1 + 13710 00b4 EA54 strb r2, [r5, r3] + 13711 00b6 0020 movs r0, #0 + 13712 00b8 E5E7 b .L932 + 13713 .L944: +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13714 .loc 1 2579 5 discriminator 3 view .LVU4107 + 13715 00ba 3F23 movs r3, #63 + 13716 00bc 0122 movs r2, #1 + 13717 00be EA54 strb r2, [r5, r3] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13718 .loc 1 2580 5 is_stmt 1 view .LVU4108 + 13719 00c0 F2E7 b .L938 + 13720 .L945: +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13721 .loc 1 2579 5 is_stmt 0 discriminator 6 view .LVU4109 + 13722 00c2 4023 movs r3, #64 + ARM GAS /tmp/cchCqftX.s page 437 + + + 13723 00c4 0122 movs r2, #1 + 13724 00c6 EA54 strb r2, [r5, r3] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13725 .loc 1 2580 5 is_stmt 1 view .LVU4110 + 13726 00c8 EEE7 b .L938 + 13727 .L946: +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13728 .loc 1 2580 5 is_stmt 0 discriminator 3 view .LVU4111 + 13729 00ca 4323 movs r3, #67 + 13730 00cc 0122 movs r2, #1 + 13731 00ce EA54 strb r2, [r5, r3] + 13732 00d0 0020 movs r0, #0 + 13733 00d2 D8E7 b .L932 + 13734 .L947: +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13735 .loc 1 2580 5 discriminator 6 view .LVU4112 + 13736 00d4 4423 movs r3, #68 + 13737 00d6 0122 movs r2, #1 + 13738 00d8 EA54 strb r2, [r5, r3] + 13739 00da 0020 movs r0, #0 + 13740 00dc D3E7 b .L932 + 13741 .L949: + 13742 00de C046 .align 2 + 13743 .L948: + 13744 00e0 FFFBFFFF .word -1025 + 13745 00e4 FFEFFFFF .word -4097 + 13746 00e8 FFFDFFFF .word -513 + 13747 00ec 11110000 .word 4369 + 13748 00f0 44040000 .word 1092 + 13749 00f4 FFF7FFFF .word -2049 + 13750 .cfi_endproc + 13751 .LFE79: + 13753 .section .text.HAL_TIM_OnePulse_Start,"ax",%progbits + 13754 .align 1 + 13755 .global HAL_TIM_OnePulse_Start + 13756 .syntax unified + 13757 .code 16 + 13758 .thumb_func + 13760 HAL_TIM_OnePulse_Start: + 13761 .LVL1109: + 13762 .LFB84: +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 13763 .loc 1 2778 1 is_stmt 1 view -0 + 13764 .cfi_startproc + 13765 @ args = 0, pretend = 0, frame = 0 + 13766 @ frame_needed = 0, uses_anonymous_args = 0 +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 13767 .loc 1 2778 1 is_stmt 0 view .LVU4114 + 13768 0000 70B5 push {r4, r5, r6, lr} + 13769 .cfi_def_cfa_offset 16 + 13770 .cfi_offset 4, -16 + 13771 .cfi_offset 5, -12 + 13772 .cfi_offset 6, -8 + 13773 .cfi_offset 14, -4 + 13774 0002 0400 movs r4, r0 +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 13775 .loc 1 2779 3 is_stmt 1 view .LVU4115 + ARM GAS /tmp/cchCqftX.s page 438 + + +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 13776 .loc 1 2779 31 is_stmt 0 view .LVU4116 + 13777 0004 3E23 movs r3, #62 + 13778 0006 C55C ldrb r5, [r0, r3] + 13779 0008 E8B2 uxtb r0, r5 + 13780 .LVL1110: +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 13781 .loc 1 2780 3 is_stmt 1 view .LVU4117 +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 13782 .loc 1 2780 31 is_stmt 0 view .LVU4118 + 13783 000a 0133 adds r3, r3, #1 + 13784 000c E35C ldrb r3, [r4, r3] + 13785 000e DBB2 uxtb r3, r3 + 13786 .LVL1111: +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 13787 .loc 1 2781 3 is_stmt 1 view .LVU4119 +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 13788 .loc 1 2781 31 is_stmt 0 view .LVU4120 + 13789 0010 4222 movs r2, #66 + 13790 0012 A25C ldrb r2, [r4, r2] + 13791 0014 D2B2 uxtb r2, r2 + 13792 .LVL1112: +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13793 .loc 1 2782 3 is_stmt 1 view .LVU4121 +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13794 .loc 1 2782 31 is_stmt 0 view .LVU4122 + 13795 0016 4321 movs r1, #67 + 13796 .LVL1113: +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13797 .loc 1 2782 31 view .LVU4123 + 13798 0018 615C ldrb r1, [r4, r1] + 13799 001a C9B2 uxtb r1, r1 + 13800 .LVL1114: +2785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13801 .loc 1 2785 3 is_stmt 1 view .LVU4124 +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 13802 .loc 1 2788 3 view .LVU4125 +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 13803 .loc 1 2788 6 is_stmt 0 view .LVU4126 + 13804 001c 012D cmp r5, #1 + 13805 001e 2DD1 bne .L953 +2789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 13806 .loc 1 2789 7 view .LVU4127 + 13807 0020 012B cmp r3, #1 + 13808 0022 2CD1 bne .L951 +2790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 13809 .loc 1 2790 7 view .LVU4128 + 13810 0024 012A cmp r2, #1 + 13811 0026 2BD1 bne .L954 +2791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13812 .loc 1 2791 7 view .LVU4129 + 13813 0028 0129 cmp r1, #1 + 13814 002a 01D0 beq .L957 +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13815 .loc 1 2793 12 view .LVU4130 + 13816 002c 1000 movs r0, r2 + 13817 .LVL1115: + ARM GAS /tmp/cchCqftX.s page 439 + + +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13818 .loc 1 2793 12 view .LVU4131 + 13819 002e 26E0 b .L951 + 13820 .LVL1116: + 13821 .L957: +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13822 .loc 1 2797 3 is_stmt 1 view .LVU4132 + 13823 0030 0133 adds r3, r3, #1 + 13824 .LVL1117: +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13825 .loc 1 2797 3 is_stmt 0 view .LVU4133 + 13826 0032 3D32 adds r2, r2, #61 + 13827 .LVL1118: +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13828 .loc 1 2797 3 view .LVU4134 + 13829 0034 A354 strb r3, [r4, r2] +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 13830 .loc 1 2798 3 is_stmt 1 view .LVU4135 + 13831 0036 0132 adds r2, r2, #1 + 13832 .LVL1119: +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 13833 .loc 1 2798 3 is_stmt 0 view .LVU4136 + 13834 0038 A354 strb r3, [r4, r2] +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13835 .loc 1 2799 3 is_stmt 1 view .LVU4137 + 13836 003a 0332 adds r2, r2, #3 + 13837 .LVL1120: +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13838 .loc 1 2799 3 is_stmt 0 view .LVU4138 + 13839 003c A354 strb r3, [r4, r2] +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13840 .loc 1 2800 3 is_stmt 1 view .LVU4139 + 13841 003e 0132 adds r2, r2, #1 + 13842 .LVL1121: +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13843 .loc 1 2800 3 is_stmt 0 view .LVU4140 + 13844 0040 A354 strb r3, [r4, r2] +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 13845 .loc 1 2811 3 is_stmt 1 view .LVU4141 + 13846 0042 2068 ldr r0, [r4] + 13847 .LVL1122: +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 13848 .loc 1 2811 3 is_stmt 0 view .LVU4142 + 13849 0044 423A subs r2, r2, #66 + 13850 .LVL1123: +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 13851 .loc 1 2811 3 view .LVU4143 + 13852 0046 0021 movs r1, #0 + 13853 .LVL1124: +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 13854 .loc 1 2811 3 view .LVU4144 + 13855 0048 FFF7FEFF bl TIM_CCxChannelCmd + 13856 .LVL1125: +2812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13857 .loc 1 2812 3 is_stmt 1 view .LVU4145 + 13858 004c 2068 ldr r0, [r4] + 13859 004e 0122 movs r2, #1 + ARM GAS /tmp/cchCqftX.s page 440 + + + 13860 0050 0421 movs r1, #4 + 13861 0052 FFF7FEFF bl TIM_CCxChannelCmd + 13862 .LVL1126: +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13863 .loc 1 2814 3 view .LVU4146 +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13864 .loc 1 2814 7 is_stmt 0 view .LVU4147 + 13865 0056 2368 ldr r3, [r4] + 13866 0058 0A4A ldr r2, .L958 + 13867 005a 9342 cmp r3, r2 + 13868 005c 07D0 beq .L952 +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13869 .loc 1 2814 7 discriminator 2 view .LVU4148 + 13870 005e 0A4A ldr r2, .L958+4 + 13871 0060 9342 cmp r3, r2 + 13872 0062 04D0 beq .L952 +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13873 .loc 1 2814 7 discriminator 4 view .LVU4149 + 13874 0064 094A ldr r2, .L958+8 + 13875 0066 9342 cmp r3, r2 + 13876 0068 01D0 beq .L952 +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13877 .loc 1 2821 10 view .LVU4150 + 13878 006a 0020 movs r0, #0 + 13879 006c 07E0 b .L951 + 13880 .L952: +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13881 .loc 1 2817 5 is_stmt 1 view .LVU4151 + 13882 006e 596C ldr r1, [r3, #68] + 13883 0070 8022 movs r2, #128 + 13884 0072 1202 lsls r2, r2, #8 + 13885 0074 0A43 orrs r2, r1 + 13886 0076 5A64 str r2, [r3, #68] +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13887 .loc 1 2821 10 is_stmt 0 view .LVU4152 + 13888 0078 0020 movs r0, #0 + 13889 007a 00E0 b .L951 + 13890 .LVL1127: + 13891 .L953: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13892 .loc 1 2793 12 view .LVU4153 + 13893 007c 0120 movs r0, #1 + 13894 .LVL1128: + 13895 .L951: +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13896 .loc 1 2822 1 view .LVU4154 + 13897 @ sp needed + 13898 .LVL1129: + 13899 .LVL1130: +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13900 .loc 1 2822 1 view .LVU4155 + 13901 007e 70BD pop {r4, r5, r6, pc} + 13902 .LVL1131: + 13903 .L954: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13904 .loc 1 2793 12 view .LVU4156 + 13905 0080 1800 movs r0, r3 + ARM GAS /tmp/cchCqftX.s page 441 + + + 13906 .LVL1132: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13907 .loc 1 2793 12 view .LVU4157 + 13908 0082 FCE7 b .L951 + 13909 .L959: + 13910 .align 2 + 13911 .L958: + 13912 0084 002C0140 .word 1073818624 + 13913 0088 00440140 .word 1073824768 + 13914 008c 00480140 .word 1073825792 + 13915 .cfi_endproc + 13916 .LFE84: + 13918 .section .text.HAL_TIM_OnePulse_Stop,"ax",%progbits + 13919 .align 1 + 13920 .global HAL_TIM_OnePulse_Stop + 13921 .syntax unified + 13922 .code 16 + 13923 .thumb_func + 13925 HAL_TIM_OnePulse_Stop: + 13926 .LVL1133: + 13927 .LFB85: +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 13928 .loc 1 2835 1 is_stmt 1 view -0 + 13929 .cfi_startproc + 13930 @ args = 0, pretend = 0, frame = 0 + 13931 @ frame_needed = 0, uses_anonymous_args = 0 +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 13932 .loc 1 2835 1 is_stmt 0 view .LVU4159 + 13933 0000 10B5 push {r4, lr} + 13934 .cfi_def_cfa_offset 8 + 13935 .cfi_offset 4, -8 + 13936 .cfi_offset 14, -4 + 13937 0002 0400 movs r4, r0 +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13938 .loc 1 2837 3 is_stmt 1 view .LVU4160 +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 13939 .loc 1 2845 3 view .LVU4161 + 13940 0004 0068 ldr r0, [r0] + 13941 .LVL1134: +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 13942 .loc 1 2845 3 is_stmt 0 view .LVU4162 + 13943 0006 0022 movs r2, #0 + 13944 0008 0021 movs r1, #0 + 13945 .LVL1135: +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 13946 .loc 1 2845 3 view .LVU4163 + 13947 000a FFF7FEFF bl TIM_CCxChannelCmd + 13948 .LVL1136: +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13949 .loc 1 2846 3 is_stmt 1 view .LVU4164 + 13950 000e 2068 ldr r0, [r4] + 13951 0010 0022 movs r2, #0 + 13952 0012 0421 movs r1, #4 + 13953 0014 FFF7FEFF bl TIM_CCxChannelCmd + 13954 .LVL1137: +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13955 .loc 1 2848 3 view .LVU4165 + ARM GAS /tmp/cchCqftX.s page 442 + + +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13956 .loc 1 2848 7 is_stmt 0 view .LVU4166 + 13957 0018 2368 ldr r3, [r4] + 13958 001a 174A ldr r2, .L964 + 13959 001c 9342 cmp r3, r2 + 13960 001e 1DD0 beq .L961 +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13961 .loc 1 2848 7 discriminator 2 view .LVU4167 + 13962 0020 164A ldr r2, .L964+4 + 13963 0022 9342 cmp r3, r2 + 13964 0024 1AD0 beq .L961 +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13965 .loc 1 2848 7 discriminator 4 view .LVU4168 + 13966 0026 164A ldr r2, .L964+8 + 13967 0028 9342 cmp r3, r2 + 13968 002a 17D0 beq .L961 + 13969 .L962: +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13970 .loc 1 2851 5 is_stmt 1 discriminator 5 view .LVU4169 +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13971 .loc 1 2855 3 view .LVU4170 +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13972 .loc 1 2855 3 view .LVU4171 + 13973 002c 2368 ldr r3, [r4] + 13974 002e 196A ldr r1, [r3, #32] + 13975 0030 144A ldr r2, .L964+12 + 13976 0032 1142 tst r1, r2 + 13977 0034 07D1 bne .L963 +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13978 .loc 1 2855 3 discriminator 1 view .LVU4172 + 13979 0036 196A ldr r1, [r3, #32] + 13980 0038 134A ldr r2, .L964+16 + 13981 003a 1142 tst r1, r2 + 13982 003c 03D1 bne .L963 +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13983 .loc 1 2855 3 discriminator 3 view .LVU4173 + 13984 003e 1A68 ldr r2, [r3] + 13985 0040 0121 movs r1, #1 + 13986 0042 8A43 bics r2, r1 + 13987 0044 1A60 str r2, [r3] + 13988 .L963: +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13989 .loc 1 2855 3 discriminator 5 view .LVU4174 +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 13990 .loc 1 2858 3 view .LVU4175 + 13991 0046 0123 movs r3, #1 + 13992 0048 3E22 movs r2, #62 + 13993 004a A354 strb r3, [r4, r2] +2859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 13994 .loc 1 2859 3 view .LVU4176 + 13995 004c 0132 adds r2, r2, #1 + 13996 004e A354 strb r3, [r4, r2] +2860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 13997 .loc 1 2860 3 view .LVU4177 + 13998 0050 0332 adds r2, r2, #3 + 13999 0052 A354 strb r3, [r4, r2] +2861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 443 + + + 14000 .loc 1 2861 3 view .LVU4178 + 14001 0054 0132 adds r2, r2, #1 + 14002 0056 A354 strb r3, [r4, r2] +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14003 .loc 1 2864 3 view .LVU4179 +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14004 .loc 1 2865 1 is_stmt 0 view .LVU4180 + 14005 0058 0020 movs r0, #0 + 14006 @ sp needed + 14007 .LVL1138: +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14008 .loc 1 2865 1 view .LVU4181 + 14009 005a 10BD pop {r4, pc} + 14010 .LVL1139: + 14011 .L961: +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14012 .loc 1 2851 5 is_stmt 1 view .LVU4182 +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14013 .loc 1 2851 5 view .LVU4183 + 14014 005c 196A ldr r1, [r3, #32] + 14015 005e 094A ldr r2, .L964+12 + 14016 0060 1142 tst r1, r2 + 14017 0062 E3D1 bne .L962 +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14018 .loc 1 2851 5 discriminator 1 view .LVU4184 + 14019 0064 196A ldr r1, [r3, #32] + 14020 0066 084A ldr r2, .L964+16 + 14021 0068 1142 tst r1, r2 + 14022 006a DFD1 bne .L962 +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14023 .loc 1 2851 5 discriminator 3 view .LVU4185 + 14024 006c 5A6C ldr r2, [r3, #68] + 14025 006e 0749 ldr r1, .L964+20 + 14026 0070 0A40 ands r2, r1 + 14027 0072 5A64 str r2, [r3, #68] + 14028 0074 DAE7 b .L962 + 14029 .L965: + 14030 0076 C046 .align 2 + 14031 .L964: + 14032 0078 002C0140 .word 1073818624 + 14033 007c 00440140 .word 1073824768 + 14034 0080 00480140 .word 1073825792 + 14035 0084 11110000 .word 4369 + 14036 0088 44040000 .word 1092 + 14037 008c FF7FFFFF .word -32769 + 14038 .cfi_endproc + 14039 .LFE85: + 14041 .section .text.HAL_TIM_OnePulse_Start_IT,"ax",%progbits + 14042 .align 1 + 14043 .global HAL_TIM_OnePulse_Start_IT + 14044 .syntax unified + 14045 .code 16 + 14046 .thumb_func + 14048 HAL_TIM_OnePulse_Start_IT: + 14049 .LVL1140: + 14050 .LFB86: +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + ARM GAS /tmp/cchCqftX.s page 444 + + + 14051 .loc 1 2878 1 view -0 + 14052 .cfi_startproc + 14053 @ args = 0, pretend = 0, frame = 0 + 14054 @ frame_needed = 0, uses_anonymous_args = 0 +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14055 .loc 1 2878 1 is_stmt 0 view .LVU4187 + 14056 0000 70B5 push {r4, r5, r6, lr} + 14057 .cfi_def_cfa_offset 16 + 14058 .cfi_offset 4, -16 + 14059 .cfi_offset 5, -12 + 14060 .cfi_offset 6, -8 + 14061 .cfi_offset 14, -4 + 14062 0002 0400 movs r4, r0 +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14063 .loc 1 2879 3 is_stmt 1 view .LVU4188 +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14064 .loc 1 2879 31 is_stmt 0 view .LVU4189 + 14065 0004 3E23 movs r3, #62 + 14066 0006 C55C ldrb r5, [r0, r3] + 14067 0008 E8B2 uxtb r0, r5 + 14068 .LVL1141: +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14069 .loc 1 2880 3 is_stmt 1 view .LVU4190 +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14070 .loc 1 2880 31 is_stmt 0 view .LVU4191 + 14071 000a 0133 adds r3, r3, #1 + 14072 000c E35C ldrb r3, [r4, r3] + 14073 000e DBB2 uxtb r3, r3 + 14074 .LVL1142: +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14075 .loc 1 2881 3 is_stmt 1 view .LVU4192 +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14076 .loc 1 2881 31 is_stmt 0 view .LVU4193 + 14077 0010 4222 movs r2, #66 + 14078 0012 A25C ldrb r2, [r4, r2] + 14079 0014 D2B2 uxtb r2, r2 + 14080 .LVL1143: +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14081 .loc 1 2882 3 is_stmt 1 view .LVU4194 +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14082 .loc 1 2882 31 is_stmt 0 view .LVU4195 + 14083 0016 4321 movs r1, #67 + 14084 .LVL1144: +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14085 .loc 1 2882 31 view .LVU4196 + 14086 0018 615C ldrb r1, [r4, r1] + 14087 001a C9B2 uxtb r1, r1 + 14088 .LVL1145: +2885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14089 .loc 1 2885 3 is_stmt 1 view .LVU4197 +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14090 .loc 1 2888 3 view .LVU4198 +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14091 .loc 1 2888 6 is_stmt 0 view .LVU4199 + 14092 001c 012D cmp r5, #1 + 14093 001e 36D1 bne .L969 +2889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + ARM GAS /tmp/cchCqftX.s page 445 + + + 14094 .loc 1 2889 7 view .LVU4200 + 14095 0020 012B cmp r3, #1 + 14096 0022 35D1 bne .L967 +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14097 .loc 1 2890 7 view .LVU4201 + 14098 0024 012A cmp r2, #1 + 14099 0026 34D1 bne .L970 +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14100 .loc 1 2891 7 view .LVU4202 + 14101 0028 0129 cmp r1, #1 + 14102 002a 01D0 beq .L973 +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14103 .loc 1 2893 12 view .LVU4203 + 14104 002c 1000 movs r0, r2 + 14105 .LVL1146: +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14106 .loc 1 2893 12 view .LVU4204 + 14107 002e 2FE0 b .L967 + 14108 .LVL1147: + 14109 .L973: +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14110 .loc 1 2897 3 is_stmt 1 view .LVU4205 + 14111 0030 0133 adds r3, r3, #1 + 14112 .LVL1148: +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14113 .loc 1 2897 3 is_stmt 0 view .LVU4206 + 14114 0032 3D32 adds r2, r2, #61 + 14115 .LVL1149: +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14116 .loc 1 2897 3 view .LVU4207 + 14117 0034 A354 strb r3, [r4, r2] +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14118 .loc 1 2898 3 is_stmt 1 view .LVU4208 + 14119 0036 0132 adds r2, r2, #1 + 14120 .LVL1150: +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14121 .loc 1 2898 3 is_stmt 0 view .LVU4209 + 14122 0038 A354 strb r3, [r4, r2] +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14123 .loc 1 2899 3 is_stmt 1 view .LVU4210 + 14124 003a 0332 adds r2, r2, #3 + 14125 .LVL1151: +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14126 .loc 1 2899 3 is_stmt 0 view .LVU4211 + 14127 003c A354 strb r3, [r4, r2] +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14128 .loc 1 2900 3 is_stmt 1 view .LVU4212 + 14129 003e 0132 adds r2, r2, #1 + 14130 .LVL1152: +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14131 .loc 1 2900 3 is_stmt 0 view .LVU4213 + 14132 0040 A354 strb r3, [r4, r2] +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14133 .loc 1 2912 3 is_stmt 1 view .LVU4214 + 14134 0042 2168 ldr r1, [r4] + 14135 .LVL1153: +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/cchCqftX.s page 446 + + + 14136 .loc 1 2912 3 is_stmt 0 view .LVU4215 + 14137 0044 CA68 ldr r2, [r1, #12] + 14138 .LVL1154: +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14139 .loc 1 2912 3 view .LVU4216 + 14140 0046 1343 orrs r3, r2 + 14141 .LVL1155: +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14142 .loc 1 2912 3 view .LVU4217 + 14143 0048 CB60 str r3, [r1, #12] +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14144 .loc 1 2915 3 is_stmt 1 view .LVU4218 + 14145 004a 2268 ldr r2, [r4] + 14146 004c D368 ldr r3, [r2, #12] + 14147 004e 0421 movs r1, #4 + 14148 0050 0B43 orrs r3, r1 + 14149 0052 D360 str r3, [r2, #12] +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14150 .loc 1 2917 3 view .LVU4219 + 14151 0054 2068 ldr r0, [r4] + 14152 .LVL1156: +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14153 .loc 1 2917 3 is_stmt 0 view .LVU4220 + 14154 0056 0122 movs r2, #1 + 14155 0058 0021 movs r1, #0 + 14156 005a FFF7FEFF bl TIM_CCxChannelCmd + 14157 .LVL1157: +2918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14158 .loc 1 2918 3 is_stmt 1 view .LVU4221 + 14159 005e 2068 ldr r0, [r4] + 14160 0060 0122 movs r2, #1 + 14161 0062 0421 movs r1, #4 + 14162 0064 FFF7FEFF bl TIM_CCxChannelCmd + 14163 .LVL1158: +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14164 .loc 1 2920 3 view .LVU4222 +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14165 .loc 1 2920 7 is_stmt 0 view .LVU4223 + 14166 0068 2368 ldr r3, [r4] + 14167 006a 0B4A ldr r2, .L974 + 14168 006c 9342 cmp r3, r2 + 14169 006e 07D0 beq .L968 +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14170 .loc 1 2920 7 discriminator 2 view .LVU4224 + 14171 0070 0A4A ldr r2, .L974+4 + 14172 0072 9342 cmp r3, r2 + 14173 0074 04D0 beq .L968 +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14174 .loc 1 2920 7 discriminator 4 view .LVU4225 + 14175 0076 0A4A ldr r2, .L974+8 + 14176 0078 9342 cmp r3, r2 + 14177 007a 01D0 beq .L968 +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14178 .loc 1 2927 10 view .LVU4226 + 14179 007c 0020 movs r0, #0 + 14180 007e 07E0 b .L967 + 14181 .L968: + ARM GAS /tmp/cchCqftX.s page 447 + + +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14182 .loc 1 2923 5 is_stmt 1 view .LVU4227 + 14183 0080 596C ldr r1, [r3, #68] + 14184 0082 8022 movs r2, #128 + 14185 0084 1202 lsls r2, r2, #8 + 14186 0086 0A43 orrs r2, r1 + 14187 0088 5A64 str r2, [r3, #68] +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14188 .loc 1 2927 10 is_stmt 0 view .LVU4228 + 14189 008a 0020 movs r0, #0 + 14190 008c 00E0 b .L967 + 14191 .LVL1159: + 14192 .L969: +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14193 .loc 1 2893 12 view .LVU4229 + 14194 008e 0120 movs r0, #1 + 14195 .LVL1160: + 14196 .L967: +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14197 .loc 1 2928 1 view .LVU4230 + 14198 @ sp needed + 14199 .LVL1161: + 14200 .LVL1162: +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14201 .loc 1 2928 1 view .LVU4231 + 14202 0090 70BD pop {r4, r5, r6, pc} + 14203 .LVL1163: + 14204 .L970: +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14205 .loc 1 2893 12 view .LVU4232 + 14206 0092 1800 movs r0, r3 + 14207 .LVL1164: +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14208 .loc 1 2893 12 view .LVU4233 + 14209 0094 FCE7 b .L967 + 14210 .L975: + 14211 0096 C046 .align 2 + 14212 .L974: + 14213 0098 002C0140 .word 1073818624 + 14214 009c 00440140 .word 1073824768 + 14215 00a0 00480140 .word 1073825792 + 14216 .cfi_endproc + 14217 .LFE86: + 14219 .section .text.HAL_TIM_OnePulse_Stop_IT,"ax",%progbits + 14220 .align 1 + 14221 .global HAL_TIM_OnePulse_Stop_IT + 14222 .syntax unified + 14223 .code 16 + 14224 .thumb_func + 14226 HAL_TIM_OnePulse_Stop_IT: + 14227 .LVL1165: + 14228 .LFB87: +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 14229 .loc 1 2941 1 is_stmt 1 view -0 + 14230 .cfi_startproc + 14231 @ args = 0, pretend = 0, frame = 0 + 14232 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cchCqftX.s page 448 + + +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 14233 .loc 1 2941 1 is_stmt 0 view .LVU4235 + 14234 0000 10B5 push {r4, lr} + 14235 .cfi_def_cfa_offset 8 + 14236 .cfi_offset 4, -8 + 14237 .cfi_offset 14, -4 + 14238 0002 0400 movs r4, r0 +2943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14239 .loc 1 2943 3 is_stmt 1 view .LVU4236 +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14240 .loc 1 2946 3 view .LVU4237 + 14241 0004 0268 ldr r2, [r0] + 14242 0006 D368 ldr r3, [r2, #12] + 14243 0008 0221 movs r1, #2 + 14244 .LVL1166: +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14245 .loc 1 2946 3 is_stmt 0 view .LVU4238 + 14246 000a 8B43 bics r3, r1 + 14247 000c D360 str r3, [r2, #12] +2949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14248 .loc 1 2949 3 is_stmt 1 view .LVU4239 + 14249 000e 0268 ldr r2, [r0] + 14250 0010 D368 ldr r3, [r2, #12] + 14251 0012 0231 adds r1, r1, #2 + 14252 0014 8B43 bics r3, r1 + 14253 0016 D360 str r3, [r2, #12] +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14254 .loc 1 2956 3 view .LVU4240 + 14255 0018 0068 ldr r0, [r0] + 14256 .LVL1167: +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14257 .loc 1 2956 3 is_stmt 0 view .LVU4241 + 14258 001a 0022 movs r2, #0 + 14259 001c 0021 movs r1, #0 + 14260 001e FFF7FEFF bl TIM_CCxChannelCmd + 14261 .LVL1168: +2957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14262 .loc 1 2957 3 is_stmt 1 view .LVU4242 + 14263 0022 2068 ldr r0, [r4] + 14264 0024 0022 movs r2, #0 + 14265 0026 0421 movs r1, #4 + 14266 0028 FFF7FEFF bl TIM_CCxChannelCmd + 14267 .LVL1169: +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14268 .loc 1 2959 3 view .LVU4243 +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14269 .loc 1 2959 7 is_stmt 0 view .LVU4244 + 14270 002c 2368 ldr r3, [r4] + 14271 002e 174A ldr r2, .L980 + 14272 0030 9342 cmp r3, r2 + 14273 0032 1DD0 beq .L977 +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14274 .loc 1 2959 7 discriminator 2 view .LVU4245 + 14275 0034 164A ldr r2, .L980+4 + 14276 0036 9342 cmp r3, r2 + 14277 0038 1AD0 beq .L977 +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 449 + + + 14278 .loc 1 2959 7 discriminator 4 view .LVU4246 + 14279 003a 164A ldr r2, .L980+8 + 14280 003c 9342 cmp r3, r2 + 14281 003e 17D0 beq .L977 + 14282 .L978: +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14283 .loc 1 2962 5 is_stmt 1 discriminator 5 view .LVU4247 +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14284 .loc 1 2966 3 view .LVU4248 +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14285 .loc 1 2966 3 view .LVU4249 + 14286 0040 2368 ldr r3, [r4] + 14287 0042 196A ldr r1, [r3, #32] + 14288 0044 144A ldr r2, .L980+12 + 14289 0046 1142 tst r1, r2 + 14290 0048 07D1 bne .L979 +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14291 .loc 1 2966 3 discriminator 1 view .LVU4250 + 14292 004a 196A ldr r1, [r3, #32] + 14293 004c 134A ldr r2, .L980+16 + 14294 004e 1142 tst r1, r2 + 14295 0050 03D1 bne .L979 +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14296 .loc 1 2966 3 discriminator 3 view .LVU4251 + 14297 0052 1A68 ldr r2, [r3] + 14298 0054 0121 movs r1, #1 + 14299 0056 8A43 bics r2, r1 + 14300 0058 1A60 str r2, [r3] + 14301 .L979: +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14302 .loc 1 2966 3 discriminator 5 view .LVU4252 +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14303 .loc 1 2969 3 view .LVU4253 + 14304 005a 0123 movs r3, #1 + 14305 005c 3E22 movs r2, #62 + 14306 005e A354 strb r3, [r4, r2] +2970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 14307 .loc 1 2970 3 view .LVU4254 + 14308 0060 0132 adds r2, r2, #1 + 14309 0062 A354 strb r3, [r4, r2] +2971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14310 .loc 1 2971 3 view .LVU4255 + 14311 0064 0332 adds r2, r2, #3 + 14312 0066 A354 strb r3, [r4, r2] +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14313 .loc 1 2972 3 view .LVU4256 + 14314 0068 0132 adds r2, r2, #1 + 14315 006a A354 strb r3, [r4, r2] +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14316 .loc 1 2975 3 view .LVU4257 +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14317 .loc 1 2976 1 is_stmt 0 view .LVU4258 + 14318 006c 0020 movs r0, #0 + 14319 @ sp needed + 14320 .LVL1170: +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14321 .loc 1 2976 1 view .LVU4259 + ARM GAS /tmp/cchCqftX.s page 450 + + + 14322 006e 10BD pop {r4, pc} + 14323 .LVL1171: + 14324 .L977: +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14325 .loc 1 2962 5 is_stmt 1 view .LVU4260 +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14326 .loc 1 2962 5 view .LVU4261 + 14327 0070 196A ldr r1, [r3, #32] + 14328 0072 094A ldr r2, .L980+12 + 14329 0074 1142 tst r1, r2 + 14330 0076 E3D1 bne .L978 +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14331 .loc 1 2962 5 discriminator 1 view .LVU4262 + 14332 0078 196A ldr r1, [r3, #32] + 14333 007a 084A ldr r2, .L980+16 + 14334 007c 1142 tst r1, r2 + 14335 007e DFD1 bne .L978 +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14336 .loc 1 2962 5 discriminator 3 view .LVU4263 + 14337 0080 5A6C ldr r2, [r3, #68] + 14338 0082 0749 ldr r1, .L980+20 + 14339 0084 0A40 ands r2, r1 + 14340 0086 5A64 str r2, [r3, #68] + 14341 0088 DAE7 b .L978 + 14342 .L981: + 14343 008a C046 .align 2 + 14344 .L980: + 14345 008c 002C0140 .word 1073818624 + 14346 0090 00440140 .word 1073824768 + 14347 0094 00480140 .word 1073825792 + 14348 0098 11110000 .word 4369 + 14349 009c 44040000 .word 1092 + 14350 00a0 FF7FFFFF .word -32769 + 14351 .cfi_endproc + 14352 .LFE87: + 14354 .section .text.HAL_TIM_Encoder_Start,"ax",%progbits + 14355 .align 1 + 14356 .global HAL_TIM_Encoder_Start + 14357 .syntax unified + 14358 .code 16 + 14359 .thumb_func + 14361 HAL_TIM_Encoder_Start: + 14362 .LVL1172: + 14363 .LFB92: +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14364 .loc 1 3215 1 view -0 + 14365 .cfi_startproc + 14366 @ args = 0, pretend = 0, frame = 0 + 14367 @ frame_needed = 0, uses_anonymous_args = 0 +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14368 .loc 1 3215 1 is_stmt 0 view .LVU4265 + 14369 0000 70B5 push {r4, r5, r6, lr} + 14370 .cfi_def_cfa_offset 16 + 14371 .cfi_offset 4, -16 + 14372 .cfi_offset 5, -12 + 14373 .cfi_offset 6, -8 + 14374 .cfi_offset 14, -4 + ARM GAS /tmp/cchCqftX.s page 451 + + + 14375 0002 0400 movs r4, r0 +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14376 .loc 1 3216 3 is_stmt 1 view .LVU4266 +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14377 .loc 1 3216 31 is_stmt 0 view .LVU4267 + 14378 0004 3E23 movs r3, #62 + 14379 0006 C05C ldrb r0, [r0, r3] + 14380 .LVL1173: +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14381 .loc 1 3216 31 view .LVU4268 + 14382 0008 C0B2 uxtb r0, r0 + 14383 .LVL1174: +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14384 .loc 1 3217 3 is_stmt 1 view .LVU4269 +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14385 .loc 1 3217 31 is_stmt 0 view .LVU4270 + 14386 000a 0133 adds r3, r3, #1 + 14387 000c E35C ldrb r3, [r4, r3] + 14388 000e DBB2 uxtb r3, r3 + 14389 .LVL1175: +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14390 .loc 1 3218 3 is_stmt 1 view .LVU4271 +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14391 .loc 1 3218 31 is_stmt 0 view .LVU4272 + 14392 0010 4222 movs r2, #66 + 14393 0012 A25C ldrb r2, [r4, r2] + 14394 0014 D2B2 uxtb r2, r2 + 14395 .LVL1176: +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14396 .loc 1 3219 3 is_stmt 1 view .LVU4273 +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14397 .loc 1 3219 31 is_stmt 0 view .LVU4274 + 14398 0016 4325 movs r5, #67 + 14399 0018 655D ldrb r5, [r4, r5] + 14400 001a EDB2 uxtb r5, r5 + 14401 .LVL1177: +3222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14402 .loc 1 3222 3 is_stmt 1 view .LVU4275 +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14403 .loc 1 3225 3 view .LVU4276 +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14404 .loc 1 3225 6 is_stmt 0 view .LVU4277 + 14405 001c 0029 cmp r1, #0 + 14406 001e 17D1 bne .L983 +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14407 .loc 1 3227 5 is_stmt 1 view .LVU4278 +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14408 .loc 1 3227 8 is_stmt 0 view .LVU4279 + 14409 0020 0128 cmp r0, #1 + 14410 0022 45D1 bne .L991 +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14411 .loc 1 3228 9 view .LVU4280 + 14412 0024 012A cmp r2, #1 + 14413 0026 44D1 bne .L984 +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14414 .loc 1 3234 7 is_stmt 1 view .LVU4281 + 14415 0028 0223 movs r3, #2 + ARM GAS /tmp/cchCqftX.s page 452 + + + 14416 .LVL1178: +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14417 .loc 1 3234 7 is_stmt 0 view .LVU4282 + 14418 002a 3D32 adds r2, r2, #61 + 14419 .LVL1179: +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14420 .loc 1 3234 7 view .LVU4283 + 14421 002c A354 strb r3, [r4, r2] +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14422 .loc 1 3235 7 is_stmt 1 view .LVU4284 + 14423 002e 0432 adds r2, r2, #4 + 14424 .LVL1180: +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14425 .loc 1 3235 7 is_stmt 0 view .LVU4285 + 14426 0030 A354 strb r3, [r4, r2] + 14427 .LVL1181: + 14428 .L985: +3270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14429 .loc 1 3270 3 is_stmt 1 view .LVU4286 + 14430 0032 0029 cmp r1, #0 + 14431 0034 2AD0 beq .L987 + 14432 0036 0429 cmp r1, #4 + 14433 0038 34D0 beq .L988 +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14434 .loc 1 3286 7 view .LVU4287 + 14435 003a 2068 ldr r0, [r4] + 14436 .LVL1182: +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14437 .loc 1 3286 7 is_stmt 0 view .LVU4288 + 14438 003c 0122 movs r2, #1 + 14439 003e 0021 movs r1, #0 + 14440 .LVL1183: +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14441 .loc 1 3286 7 view .LVU4289 + 14442 0040 FFF7FEFF bl TIM_CCxChannelCmd + 14443 .LVL1184: +3287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14444 .loc 1 3287 7 is_stmt 1 view .LVU4290 + 14445 0044 2068 ldr r0, [r4] + 14446 0046 0122 movs r2, #1 + 14447 0048 0421 movs r1, #4 + 14448 004a FFF7FEFF bl TIM_CCxChannelCmd + 14449 .LVL1185: +3288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14450 .loc 1 3288 7 view .LVU4291 + 14451 004e 22E0 b .L990 + 14452 .LVL1186: + 14453 .L983: +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14454 .loc 1 3238 8 view .LVU4292 +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14455 .loc 1 3238 11 is_stmt 0 view .LVU4293 + 14456 0050 0429 cmp r1, #4 + 14457 0052 11D0 beq .L998 +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14458 .loc 1 3253 5 is_stmt 1 view .LVU4294 +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + ARM GAS /tmp/cchCqftX.s page 453 + + + 14459 .loc 1 3253 8 is_stmt 0 view .LVU4295 + 14460 0054 0128 cmp r0, #1 + 14461 0056 31D1 bne .L994 +3254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 14462 .loc 1 3254 9 view .LVU4296 + 14463 0058 012B cmp r3, #1 + 14464 005a 2AD1 bne .L984 +3255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14465 .loc 1 3255 9 view .LVU4297 + 14466 005c 012A cmp r2, #1 + 14467 005e 2FD1 bne .L995 +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14468 .loc 1 3256 9 view .LVU4298 + 14469 0060 012D cmp r5, #1 + 14470 0062 2FD1 bne .L996 +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14471 .loc 1 3262 7 is_stmt 1 view .LVU4299 + 14472 0064 0133 adds r3, r3, #1 + 14473 .LVL1187: +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14474 .loc 1 3262 7 is_stmt 0 view .LVU4300 + 14475 0066 3D32 adds r2, r2, #61 + 14476 .LVL1188: +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14477 .loc 1 3262 7 view .LVU4301 + 14478 0068 A354 strb r3, [r4, r2] +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14479 .loc 1 3263 7 is_stmt 1 view .LVU4302 + 14480 006a 0132 adds r2, r2, #1 + 14481 .LVL1189: +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14482 .loc 1 3263 7 is_stmt 0 view .LVU4303 + 14483 006c A354 strb r3, [r4, r2] +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14484 .loc 1 3264 7 is_stmt 1 view .LVU4304 + 14485 006e 0332 adds r2, r2, #3 + 14486 .LVL1190: +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14487 .loc 1 3264 7 is_stmt 0 view .LVU4305 + 14488 0070 A354 strb r3, [r4, r2] +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14489 .loc 1 3265 7 is_stmt 1 view .LVU4306 + 14490 0072 0132 adds r2, r2, #1 + 14491 .LVL1191: +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14492 .loc 1 3265 7 is_stmt 0 view .LVU4307 + 14493 0074 A354 strb r3, [r4, r2] + 14494 0076 DCE7 b .L985 + 14495 .LVL1192: + 14496 .L998: +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14497 .loc 1 3240 5 is_stmt 1 view .LVU4308 +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14498 .loc 1 3240 8 is_stmt 0 view .LVU4309 + 14499 0078 012B cmp r3, #1 + 14500 007a 1BD1 bne .L992 +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/cchCqftX.s page 454 + + + 14501 .loc 1 3241 9 view .LVU4310 + 14502 007c 012D cmp r5, #1 + 14503 007e 1BD1 bne .L993 +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14504 .loc 1 3247 7 is_stmt 1 view .LVU4311 + 14505 0080 0133 adds r3, r3, #1 + 14506 .LVL1193: +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14507 .loc 1 3247 7 is_stmt 0 view .LVU4312 + 14508 0082 3F22 movs r2, #63 + 14509 .LVL1194: +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14510 .loc 1 3247 7 view .LVU4313 + 14511 0084 A354 strb r3, [r4, r2] +3248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14512 .loc 1 3248 7 is_stmt 1 view .LVU4314 + 14513 0086 0432 adds r2, r2, #4 + 14514 0088 A354 strb r3, [r4, r2] + 14515 008a D2E7 b .L985 + 14516 .LVL1195: + 14517 .L987: +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14518 .loc 1 3274 7 view .LVU4315 + 14519 008c 2068 ldr r0, [r4] + 14520 .LVL1196: +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14521 .loc 1 3274 7 is_stmt 0 view .LVU4316 + 14522 008e 0122 movs r2, #1 + 14523 0090 0021 movs r1, #0 + 14524 .LVL1197: +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14525 .loc 1 3274 7 view .LVU4317 + 14526 0092 FFF7FEFF bl TIM_CCxChannelCmd + 14527 .LVL1198: +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14528 .loc 1 3275 7 is_stmt 1 view .LVU4318 + 14529 .L990: +3292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14530 .loc 1 3292 3 view .LVU4319 + 14531 0096 2268 ldr r2, [r4] + 14532 0098 1368 ldr r3, [r2] + 14533 009a 0121 movs r1, #1 + 14534 009c 0B43 orrs r3, r1 + 14535 009e 1360 str r3, [r2] +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14536 .loc 1 3295 3 view .LVU4320 +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14537 .loc 1 3295 10 is_stmt 0 view .LVU4321 + 14538 00a0 0020 movs r0, #0 + 14539 00a2 06E0 b .L984 + 14540 .LVL1199: + 14541 .L988: +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14542 .loc 1 3280 7 is_stmt 1 view .LVU4322 + 14543 00a4 2068 ldr r0, [r4] + 14544 .LVL1200: +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/cchCqftX.s page 455 + + + 14545 .loc 1 3280 7 is_stmt 0 view .LVU4323 + 14546 00a6 0122 movs r2, #1 + 14547 00a8 0421 movs r1, #4 + 14548 .LVL1201: +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14549 .loc 1 3280 7 view .LVU4324 + 14550 00aa FFF7FEFF bl TIM_CCxChannelCmd + 14551 .LVL1202: +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14552 .loc 1 3281 7 is_stmt 1 view .LVU4325 + 14553 00ae F2E7 b .L990 + 14554 .LVL1203: + 14555 .L991: +3230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14556 .loc 1 3230 14 is_stmt 0 view .LVU4326 + 14557 00b0 0120 movs r0, #1 + 14558 .LVL1204: + 14559 .L984: +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14560 .loc 1 3296 1 view .LVU4327 + 14561 @ sp needed + 14562 .LVL1205: + 14563 .LVL1206: +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14564 .loc 1 3296 1 view .LVU4328 + 14565 00b2 70BD pop {r4, r5, r6, pc} + 14566 .LVL1207: + 14567 .L992: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14568 .loc 1 3243 14 view .LVU4329 + 14569 00b4 0120 movs r0, #1 + 14570 .LVL1208: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14571 .loc 1 3243 14 view .LVU4330 + 14572 00b6 FCE7 b .L984 + 14573 .LVL1209: + 14574 .L993: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14575 .loc 1 3243 14 view .LVU4331 + 14576 00b8 1800 movs r0, r3 + 14577 .LVL1210: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14578 .loc 1 3243 14 view .LVU4332 + 14579 00ba FAE7 b .L984 + 14580 .LVL1211: + 14581 .L994: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14582 .loc 1 3258 14 view .LVU4333 + 14583 00bc 0120 movs r0, #1 + 14584 .LVL1212: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14585 .loc 1 3258 14 view .LVU4334 + 14586 00be F8E7 b .L984 + 14587 .LVL1213: + 14588 .L995: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14589 .loc 1 3258 14 view .LVU4335 + ARM GAS /tmp/cchCqftX.s page 456 + + + 14590 00c0 1800 movs r0, r3 + 14591 .LVL1214: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14592 .loc 1 3258 14 view .LVU4336 + 14593 00c2 F6E7 b .L984 + 14594 .LVL1215: + 14595 .L996: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14596 .loc 1 3258 14 view .LVU4337 + 14597 00c4 1000 movs r0, r2 + 14598 .LVL1216: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14599 .loc 1 3258 14 view .LVU4338 + 14600 00c6 F4E7 b .L984 + 14601 .cfi_endproc + 14602 .LFE92: + 14604 .section .text.HAL_TIM_Encoder_Stop,"ax",%progbits + 14605 .align 1 + 14606 .global HAL_TIM_Encoder_Stop + 14607 .syntax unified + 14608 .code 16 + 14609 .thumb_func + 14611 HAL_TIM_Encoder_Stop: + 14612 .LVL1217: + 14613 .LFB93: +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 14614 .loc 1 3309 1 is_stmt 1 view -0 + 14615 .cfi_startproc + 14616 @ args = 0, pretend = 0, frame = 0 + 14617 @ frame_needed = 0, uses_anonymous_args = 0 +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 14618 .loc 1 3309 1 is_stmt 0 view .LVU4340 + 14619 0000 70B5 push {r4, r5, r6, lr} + 14620 .cfi_def_cfa_offset 16 + 14621 .cfi_offset 4, -16 + 14622 .cfi_offset 5, -12 + 14623 .cfi_offset 6, -8 + 14624 .cfi_offset 14, -4 + 14625 0002 0400 movs r4, r0 + 14626 0004 0D1E subs r5, r1, #0 +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14627 .loc 1 3311 3 is_stmt 1 view .LVU4341 +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14628 .loc 1 3315 3 view .LVU4342 + 14629 0006 0CD0 beq .L1000 + 14630 0008 0429 cmp r1, #4 + 14631 000a 2AD0 beq .L1001 +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14632 .loc 1 3331 7 view .LVU4343 + 14633 000c 0068 ldr r0, [r0] + 14634 .LVL1218: +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14635 .loc 1 3331 7 is_stmt 0 view .LVU4344 + 14636 000e 0022 movs r2, #0 + 14637 0010 0021 movs r1, #0 + 14638 .LVL1219: +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + ARM GAS /tmp/cchCqftX.s page 457 + + + 14639 .loc 1 3331 7 view .LVU4345 + 14640 0012 FFF7FEFF bl TIM_CCxChannelCmd + 14641 .LVL1220: +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14642 .loc 1 3332 7 is_stmt 1 view .LVU4346 + 14643 0016 2068 ldr r0, [r4] + 14644 0018 0022 movs r2, #0 + 14645 001a 0421 movs r1, #4 + 14646 001c FFF7FEFF bl TIM_CCxChannelCmd + 14647 .LVL1221: +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14648 .loc 1 3333 7 view .LVU4347 + 14649 0020 04E0 b .L1003 + 14650 .LVL1222: + 14651 .L1000: +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14652 .loc 1 3319 7 view .LVU4348 + 14653 0022 0068 ldr r0, [r0] + 14654 .LVL1223: +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14655 .loc 1 3319 7 is_stmt 0 view .LVU4349 + 14656 0024 0022 movs r2, #0 + 14657 0026 0021 movs r1, #0 + 14658 .LVL1224: +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14659 .loc 1 3319 7 view .LVU4350 + 14660 0028 FFF7FEFF bl TIM_CCxChannelCmd + 14661 .LVL1225: +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14662 .loc 1 3320 7 is_stmt 1 view .LVU4351 + 14663 .L1003: +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14664 .loc 1 3338 3 view .LVU4352 +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14665 .loc 1 3338 3 view .LVU4353 + 14666 002c 2368 ldr r3, [r4] + 14667 002e 196A ldr r1, [r3, #32] + 14668 0030 154A ldr r2, .L1012 + 14669 0032 1142 tst r1, r2 + 14670 0034 07D1 bne .L1004 +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14671 .loc 1 3338 3 discriminator 1 view .LVU4354 + 14672 0036 196A ldr r1, [r3, #32] + 14673 0038 144A ldr r2, .L1012+4 + 14674 003a 1142 tst r1, r2 + 14675 003c 03D1 bne .L1004 +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14676 .loc 1 3338 3 discriminator 3 view .LVU4355 + 14677 003e 1A68 ldr r2, [r3] + 14678 0040 0121 movs r1, #1 + 14679 0042 8A43 bics r2, r1 + 14680 0044 1A60 str r2, [r3] + 14681 .L1004: +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14682 .loc 1 3338 3 discriminator 5 view .LVU4356 +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14683 .loc 1 3341 3 view .LVU4357 + ARM GAS /tmp/cchCqftX.s page 458 + + +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14684 .loc 1 3341 6 is_stmt 0 view .LVU4358 + 14685 0046 002D cmp r5, #0 + 14686 0048 11D0 beq .L1005 +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14687 .loc 1 3341 34 discriminator 1 view .LVU4359 + 14688 004a 042D cmp r5, #4 + 14689 004c 16D0 beq .L1011 +3348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14690 .loc 1 3348 5 is_stmt 1 view .LVU4360 + 14691 004e 0123 movs r3, #1 + 14692 0050 3E22 movs r2, #62 + 14693 0052 A354 strb r3, [r4, r2] +3349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 14694 .loc 1 3349 5 view .LVU4361 + 14695 0054 0132 adds r2, r2, #1 + 14696 0056 A354 strb r3, [r4, r2] +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14697 .loc 1 3350 5 view .LVU4362 + 14698 0058 0332 adds r2, r2, #3 + 14699 005a A354 strb r3, [r4, r2] +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14700 .loc 1 3351 5 view .LVU4363 + 14701 005c 0132 adds r2, r2, #1 + 14702 005e A354 strb r3, [r4, r2] + 14703 0060 0AE0 b .L1008 + 14704 .LVL1226: + 14705 .L1001: +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14706 .loc 1 3325 7 view .LVU4364 + 14707 0062 0068 ldr r0, [r0] + 14708 .LVL1227: +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14709 .loc 1 3325 7 is_stmt 0 view .LVU4365 + 14710 0064 0022 movs r2, #0 + 14711 0066 0421 movs r1, #4 + 14712 .LVL1228: +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14713 .loc 1 3325 7 view .LVU4366 + 14714 0068 FFF7FEFF bl TIM_CCxChannelCmd + 14715 .LVL1229: +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14716 .loc 1 3326 7 is_stmt 1 view .LVU4367 + 14717 006c DEE7 b .L1003 + 14718 .L1005: +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14719 .loc 1 3343 5 view .LVU4368 +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14720 .loc 1 3343 5 is_stmt 0 discriminator 1 view .LVU4369 + 14721 006e 0123 movs r3, #1 + 14722 0070 3E22 movs r2, #62 + 14723 0072 A354 strb r3, [r4, r2] +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14724 .loc 1 3344 5 is_stmt 1 view .LVU4370 +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14725 .loc 1 3344 5 is_stmt 0 discriminator 1 view .LVU4371 + 14726 0074 0432 adds r2, r2, #4 + ARM GAS /tmp/cchCqftX.s page 459 + + + 14727 0076 A354 strb r3, [r4, r2] + 14728 .L1008: +3355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14729 .loc 1 3355 3 is_stmt 1 view .LVU4372 +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14730 .loc 1 3356 1 is_stmt 0 view .LVU4373 + 14731 0078 0020 movs r0, #0 + 14732 @ sp needed + 14733 .LVL1230: + 14734 .LVL1231: +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14735 .loc 1 3356 1 view .LVU4374 + 14736 007a 70BD pop {r4, r5, r6, pc} + 14737 .LVL1232: + 14738 .L1011: +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14739 .loc 1 3343 5 is_stmt 1 view .LVU4375 +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14740 .loc 1 3343 5 is_stmt 0 discriminator 3 view .LVU4376 + 14741 007c 0123 movs r3, #1 + 14742 007e 3F22 movs r2, #63 + 14743 0080 A354 strb r3, [r4, r2] +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14744 .loc 1 3344 5 is_stmt 1 view .LVU4377 +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14745 .loc 1 3344 5 is_stmt 0 discriminator 3 view .LVU4378 + 14746 0082 0432 adds r2, r2, #4 + 14747 0084 A354 strb r3, [r4, r2] + 14748 0086 F7E7 b .L1008 + 14749 .L1013: + 14750 .align 2 + 14751 .L1012: + 14752 0088 11110000 .word 4369 + 14753 008c 44040000 .word 1092 + 14754 .cfi_endproc + 14755 .LFE93: + 14757 .section .text.HAL_TIM_Encoder_Start_IT,"ax",%progbits + 14758 .align 1 + 14759 .global HAL_TIM_Encoder_Start_IT + 14760 .syntax unified + 14761 .code 16 + 14762 .thumb_func + 14764 HAL_TIM_Encoder_Start_IT: + 14765 .LVL1233: + 14766 .LFB94: +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14767 .loc 1 3369 1 is_stmt 1 view -0 + 14768 .cfi_startproc + 14769 @ args = 0, pretend = 0, frame = 0 + 14770 @ frame_needed = 0, uses_anonymous_args = 0 +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14771 .loc 1 3369 1 is_stmt 0 view .LVU4380 + 14772 0000 70B5 push {r4, r5, r6, lr} + 14773 .cfi_def_cfa_offset 16 + 14774 .cfi_offset 4, -16 + 14775 .cfi_offset 5, -12 + 14776 .cfi_offset 6, -8 + ARM GAS /tmp/cchCqftX.s page 460 + + + 14777 .cfi_offset 14, -4 + 14778 0002 0400 movs r4, r0 +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14779 .loc 1 3370 3 is_stmt 1 view .LVU4381 +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14780 .loc 1 3370 31 is_stmt 0 view .LVU4382 + 14781 0004 3E23 movs r3, #62 + 14782 0006 C05C ldrb r0, [r0, r3] + 14783 .LVL1234: +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14784 .loc 1 3370 31 view .LVU4383 + 14785 0008 C0B2 uxtb r0, r0 + 14786 .LVL1235: +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14787 .loc 1 3371 3 is_stmt 1 view .LVU4384 +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14788 .loc 1 3371 31 is_stmt 0 view .LVU4385 + 14789 000a 0133 adds r3, r3, #1 + 14790 000c E35C ldrb r3, [r4, r3] + 14791 000e DBB2 uxtb r3, r3 + 14792 .LVL1236: +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14793 .loc 1 3372 3 is_stmt 1 view .LVU4386 +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14794 .loc 1 3372 31 is_stmt 0 view .LVU4387 + 14795 0010 4222 movs r2, #66 + 14796 0012 A25C ldrb r2, [r4, r2] + 14797 0014 D2B2 uxtb r2, r2 + 14798 .LVL1237: +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14799 .loc 1 3373 3 is_stmt 1 view .LVU4388 +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14800 .loc 1 3373 31 is_stmt 0 view .LVU4389 + 14801 0016 4325 movs r5, #67 + 14802 0018 655D ldrb r5, [r4, r5] + 14803 001a EDB2 uxtb r5, r5 + 14804 .LVL1238: +3376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14805 .loc 1 3376 3 is_stmt 1 view .LVU4390 +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14806 .loc 1 3379 3 view .LVU4391 +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14807 .loc 1 3379 6 is_stmt 0 view .LVU4392 + 14808 001c 0029 cmp r1, #0 + 14809 001e 21D1 bne .L1015 +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14810 .loc 1 3381 5 is_stmt 1 view .LVU4393 +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14811 .loc 1 3381 8 is_stmt 0 view .LVU4394 + 14812 0020 0128 cmp r0, #1 + 14813 0022 59D1 bne .L1023 +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14814 .loc 1 3382 9 view .LVU4395 + 14815 0024 012A cmp r2, #1 + 14816 0026 58D1 bne .L1016 +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14817 .loc 1 3388 7 is_stmt 1 view .LVU4396 + ARM GAS /tmp/cchCqftX.s page 461 + + + 14818 0028 0223 movs r3, #2 + 14819 .LVL1239: +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14820 .loc 1 3388 7 is_stmt 0 view .LVU4397 + 14821 002a 3D32 adds r2, r2, #61 + 14822 .LVL1240: +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14823 .loc 1 3388 7 view .LVU4398 + 14824 002c A354 strb r3, [r4, r2] +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14825 .loc 1 3389 7 is_stmt 1 view .LVU4399 + 14826 002e 0432 adds r2, r2, #4 + 14827 .LVL1241: +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14828 .loc 1 3389 7 is_stmt 0 view .LVU4400 + 14829 0030 A354 strb r3, [r4, r2] + 14830 .LVL1242: + 14831 .L1017: +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14832 .loc 1 3425 3 is_stmt 1 view .LVU4401 + 14833 0032 0029 cmp r1, #0 + 14834 0034 34D0 beq .L1019 + 14835 0036 0429 cmp r1, #4 + 14836 0038 43D0 beq .L1020 +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14837 .loc 1 3443 7 view .LVU4402 + 14838 003a 2068 ldr r0, [r4] + 14839 .LVL1243: +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14840 .loc 1 3443 7 is_stmt 0 view .LVU4403 + 14841 003c 0122 movs r2, #1 + 14842 003e 0021 movs r1, #0 + 14843 .LVL1244: +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14844 .loc 1 3443 7 view .LVU4404 + 14845 0040 FFF7FEFF bl TIM_CCxChannelCmd + 14846 .LVL1245: +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 14847 .loc 1 3444 7 is_stmt 1 view .LVU4405 + 14848 0044 2068 ldr r0, [r4] + 14849 0046 0122 movs r2, #1 + 14850 0048 0421 movs r1, #4 + 14851 004a FFF7FEFF bl TIM_CCxChannelCmd + 14852 .LVL1246: +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 14853 .loc 1 3445 7 view .LVU4406 + 14854 004e 2268 ldr r2, [r4] + 14855 0050 D368 ldr r3, [r2, #12] + 14856 0052 0221 movs r1, #2 + 14857 0054 0B43 orrs r3, r1 + 14858 0056 D360 str r3, [r2, #12] +3446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14859 .loc 1 3446 7 view .LVU4407 + 14860 0058 2268 ldr r2, [r4] + 14861 005a D368 ldr r3, [r2, #12] + 14862 005c 0231 adds r1, r1, #2 + 14863 005e 0B43 orrs r3, r1 + ARM GAS /tmp/cchCqftX.s page 462 + + + 14864 0060 D360 str r3, [r2, #12] +3447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14865 .loc 1 3447 7 view .LVU4408 + 14866 0062 27E0 b .L1022 + 14867 .LVL1247: + 14868 .L1015: +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14869 .loc 1 3392 8 view .LVU4409 +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14870 .loc 1 3392 11 is_stmt 0 view .LVU4410 + 14871 0064 0429 cmp r1, #4 + 14872 0066 11D0 beq .L1030 +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14873 .loc 1 3407 5 is_stmt 1 view .LVU4411 +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14874 .loc 1 3407 8 is_stmt 0 view .LVU4412 + 14875 0068 0128 cmp r0, #1 + 14876 006a 3BD1 bne .L1026 +3408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 14877 .loc 1 3408 9 view .LVU4413 + 14878 006c 012B cmp r3, #1 + 14879 006e 34D1 bne .L1016 +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14880 .loc 1 3409 9 view .LVU4414 + 14881 0070 012A cmp r2, #1 + 14882 0072 39D1 bne .L1027 +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14883 .loc 1 3410 9 view .LVU4415 + 14884 0074 012D cmp r5, #1 + 14885 0076 39D1 bne .L1028 +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14886 .loc 1 3416 7 is_stmt 1 view .LVU4416 + 14887 0078 0133 adds r3, r3, #1 + 14888 .LVL1248: +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14889 .loc 1 3416 7 is_stmt 0 view .LVU4417 + 14890 007a 3D32 adds r2, r2, #61 + 14891 .LVL1249: +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14892 .loc 1 3416 7 view .LVU4418 + 14893 007c A354 strb r3, [r4, r2] +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14894 .loc 1 3417 7 is_stmt 1 view .LVU4419 + 14895 007e 0132 adds r2, r2, #1 + 14896 .LVL1250: +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14897 .loc 1 3417 7 is_stmt 0 view .LVU4420 + 14898 0080 A354 strb r3, [r4, r2] +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14899 .loc 1 3418 7 is_stmt 1 view .LVU4421 + 14900 0082 0332 adds r2, r2, #3 + 14901 .LVL1251: +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14902 .loc 1 3418 7 is_stmt 0 view .LVU4422 + 14903 0084 A354 strb r3, [r4, r2] +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14904 .loc 1 3419 7 is_stmt 1 view .LVU4423 + ARM GAS /tmp/cchCqftX.s page 463 + + + 14905 0086 0132 adds r2, r2, #1 + 14906 .LVL1252: +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14907 .loc 1 3419 7 is_stmt 0 view .LVU4424 + 14908 0088 A354 strb r3, [r4, r2] + 14909 008a D2E7 b .L1017 + 14910 .LVL1253: + 14911 .L1030: +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14912 .loc 1 3394 5 is_stmt 1 view .LVU4425 +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14913 .loc 1 3394 8 is_stmt 0 view .LVU4426 + 14914 008c 012B cmp r3, #1 + 14915 008e 25D1 bne .L1024 +3395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14916 .loc 1 3395 9 view .LVU4427 + 14917 0090 012D cmp r5, #1 + 14918 0092 25D1 bne .L1025 +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14919 .loc 1 3401 7 is_stmt 1 view .LVU4428 + 14920 0094 0133 adds r3, r3, #1 + 14921 .LVL1254: +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14922 .loc 1 3401 7 is_stmt 0 view .LVU4429 + 14923 0096 3F22 movs r2, #63 + 14924 .LVL1255: +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14925 .loc 1 3401 7 view .LVU4430 + 14926 0098 A354 strb r3, [r4, r2] +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14927 .loc 1 3402 7 is_stmt 1 view .LVU4431 + 14928 009a 0432 adds r2, r2, #4 + 14929 009c A354 strb r3, [r4, r2] + 14930 009e C8E7 b .L1017 + 14931 .LVL1256: + 14932 .L1019: +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 14933 .loc 1 3429 7 view .LVU4432 + 14934 00a0 2068 ldr r0, [r4] + 14935 .LVL1257: +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 14936 .loc 1 3429 7 is_stmt 0 view .LVU4433 + 14937 00a2 0122 movs r2, #1 + 14938 00a4 0021 movs r1, #0 + 14939 .LVL1258: +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 14940 .loc 1 3429 7 view .LVU4434 + 14941 00a6 FFF7FEFF bl TIM_CCxChannelCmd + 14942 .LVL1259: +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14943 .loc 1 3430 7 is_stmt 1 view .LVU4435 + 14944 00aa 2268 ldr r2, [r4] + 14945 00ac D368 ldr r3, [r2, #12] + 14946 00ae 0221 movs r1, #2 + 14947 00b0 0B43 orrs r3, r1 + 14948 00b2 D360 str r3, [r2, #12] +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 464 + + + 14949 .loc 1 3431 7 view .LVU4436 + 14950 .L1022: +3452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14951 .loc 1 3452 3 view .LVU4437 + 14952 00b4 2268 ldr r2, [r4] + 14953 00b6 1368 ldr r3, [r2] + 14954 00b8 0121 movs r1, #1 + 14955 00ba 0B43 orrs r3, r1 + 14956 00bc 1360 str r3, [r2] +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14957 .loc 1 3455 3 view .LVU4438 +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14958 .loc 1 3455 10 is_stmt 0 view .LVU4439 + 14959 00be 0020 movs r0, #0 + 14960 00c0 0BE0 b .L1016 + 14961 .LVL1260: + 14962 .L1020: +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 14963 .loc 1 3436 7 is_stmt 1 view .LVU4440 + 14964 00c2 2068 ldr r0, [r4] + 14965 .LVL1261: +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 14966 .loc 1 3436 7 is_stmt 0 view .LVU4441 + 14967 00c4 0122 movs r2, #1 + 14968 00c6 0421 movs r1, #4 + 14969 .LVL1262: +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 14970 .loc 1 3436 7 view .LVU4442 + 14971 00c8 FFF7FEFF bl TIM_CCxChannelCmd + 14972 .LVL1263: +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14973 .loc 1 3437 7 is_stmt 1 view .LVU4443 + 14974 00cc 2268 ldr r2, [r4] + 14975 00ce D368 ldr r3, [r2, #12] + 14976 00d0 0421 movs r1, #4 + 14977 00d2 0B43 orrs r3, r1 + 14978 00d4 D360 str r3, [r2, #12] +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14979 .loc 1 3438 7 view .LVU4444 + 14980 00d6 EDE7 b .L1022 + 14981 .LVL1264: + 14982 .L1023: +3384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14983 .loc 1 3384 14 is_stmt 0 view .LVU4445 + 14984 00d8 0120 movs r0, #1 + 14985 .LVL1265: + 14986 .L1016: +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14987 .loc 1 3456 1 view .LVU4446 + 14988 @ sp needed + 14989 .LVL1266: + 14990 .LVL1267: +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14991 .loc 1 3456 1 view .LVU4447 + 14992 00da 70BD pop {r4, r5, r6, pc} + 14993 .LVL1268: + 14994 .L1024: + ARM GAS /tmp/cchCqftX.s page 465 + + +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14995 .loc 1 3397 14 view .LVU4448 + 14996 00dc 0120 movs r0, #1 + 14997 .LVL1269: +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14998 .loc 1 3397 14 view .LVU4449 + 14999 00de FCE7 b .L1016 + 15000 .LVL1270: + 15001 .L1025: +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15002 .loc 1 3397 14 view .LVU4450 + 15003 00e0 1800 movs r0, r3 + 15004 .LVL1271: +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15005 .loc 1 3397 14 view .LVU4451 + 15006 00e2 FAE7 b .L1016 + 15007 .LVL1272: + 15008 .L1026: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15009 .loc 1 3412 14 view .LVU4452 + 15010 00e4 0120 movs r0, #1 + 15011 .LVL1273: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15012 .loc 1 3412 14 view .LVU4453 + 15013 00e6 F8E7 b .L1016 + 15014 .LVL1274: + 15015 .L1027: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15016 .loc 1 3412 14 view .LVU4454 + 15017 00e8 1800 movs r0, r3 + 15018 .LVL1275: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15019 .loc 1 3412 14 view .LVU4455 + 15020 00ea F6E7 b .L1016 + 15021 .LVL1276: + 15022 .L1028: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15023 .loc 1 3412 14 view .LVU4456 + 15024 00ec 1000 movs r0, r2 + 15025 .LVL1277: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15026 .loc 1 3412 14 view .LVU4457 + 15027 00ee F4E7 b .L1016 + 15028 .cfi_endproc + 15029 .LFE94: + 15031 .section .text.HAL_TIM_Encoder_Stop_IT,"ax",%progbits + 15032 .align 1 + 15033 .global HAL_TIM_Encoder_Stop_IT + 15034 .syntax unified + 15035 .code 16 + 15036 .thumb_func + 15038 HAL_TIM_Encoder_Stop_IT: + 15039 .LVL1278: + 15040 .LFB95: +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 15041 .loc 1 3469 1 is_stmt 1 view -0 + 15042 .cfi_startproc + ARM GAS /tmp/cchCqftX.s page 466 + + + 15043 @ args = 0, pretend = 0, frame = 0 + 15044 @ frame_needed = 0, uses_anonymous_args = 0 +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 15045 .loc 1 3469 1 is_stmt 0 view .LVU4459 + 15046 0000 70B5 push {r4, r5, r6, lr} + 15047 .cfi_def_cfa_offset 16 + 15048 .cfi_offset 4, -16 + 15049 .cfi_offset 5, -12 + 15050 .cfi_offset 6, -8 + 15051 .cfi_offset 14, -4 + 15052 0002 0400 movs r4, r0 + 15053 0004 0D1E subs r5, r1, #0 +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15054 .loc 1 3471 3 is_stmt 1 view .LVU4460 +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15055 .loc 1 3475 3 view .LVU4461 +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15056 .loc 1 3475 6 is_stmt 0 view .LVU4462 + 15057 0006 30D0 beq .L1041 +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15058 .loc 1 3482 8 is_stmt 1 view .LVU4463 +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15059 .loc 1 3482 11 is_stmt 0 view .LVU4464 + 15060 0008 0429 cmp r1, #4 + 15061 000a 39D0 beq .L1042 +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15062 .loc 1 3491 5 is_stmt 1 view .LVU4465 + 15063 000c 0068 ldr r0, [r0] + 15064 .LVL1279: +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15065 .loc 1 3491 5 is_stmt 0 view .LVU4466 + 15066 000e 0022 movs r2, #0 + 15067 0010 0021 movs r1, #0 + 15068 .LVL1280: +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15069 .loc 1 3491 5 view .LVU4467 + 15070 0012 FFF7FEFF bl TIM_CCxChannelCmd + 15071 .LVL1281: +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15072 .loc 1 3492 5 is_stmt 1 view .LVU4468 + 15073 0016 2068 ldr r0, [r4] + 15074 0018 0022 movs r2, #0 + 15075 001a 0421 movs r1, #4 + 15076 001c FFF7FEFF bl TIM_CCxChannelCmd + 15077 .LVL1282: +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); + 15078 .loc 1 3495 5 view .LVU4469 + 15079 0020 2268 ldr r2, [r4] + 15080 0022 D368 ldr r3, [r2, #12] + 15081 0024 0221 movs r1, #2 + 15082 0026 8B43 bics r3, r1 + 15083 0028 D360 str r3, [r2, #12] +3496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15084 .loc 1 3496 5 view .LVU4470 + 15085 002a 2268 ldr r2, [r4] + 15086 002c D368 ldr r3, [r2, #12] + 15087 002e 0231 adds r1, r1, #2 + ARM GAS /tmp/cchCqftX.s page 467 + + + 15088 0030 8B43 bics r3, r1 + 15089 0032 D360 str r3, [r2, #12] + 15090 .L1033: +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15091 .loc 1 3500 3 view .LVU4471 +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15092 .loc 1 3500 3 view .LVU4472 + 15093 0034 2368 ldr r3, [r4] + 15094 0036 196A ldr r1, [r3, #32] + 15095 0038 1D4A ldr r2, .L1044 + 15096 003a 1142 tst r1, r2 + 15097 003c 07D1 bne .L1035 +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15098 .loc 1 3500 3 discriminator 1 view .LVU4473 + 15099 003e 196A ldr r1, [r3, #32] + 15100 0040 1C4A ldr r2, .L1044+4 + 15101 0042 1142 tst r1, r2 + 15102 0044 03D1 bne .L1035 +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15103 .loc 1 3500 3 discriminator 3 view .LVU4474 + 15104 0046 1A68 ldr r2, [r3] + 15105 0048 0121 movs r1, #1 + 15106 004a 8A43 bics r2, r1 + 15107 004c 1A60 str r2, [r3] + 15108 .L1035: +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15109 .loc 1 3500 3 discriminator 5 view .LVU4475 +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15110 .loc 1 3503 3 view .LVU4476 +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15111 .loc 1 3503 6 is_stmt 0 view .LVU4477 + 15112 004e 002D cmp r5, #0 + 15113 0050 21D0 beq .L1036 +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15114 .loc 1 3503 34 discriminator 1 view .LVU4478 + 15115 0052 042D cmp r5, #4 + 15116 0054 26D0 beq .L1043 +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15117 .loc 1 3510 5 is_stmt 1 view .LVU4479 + 15118 0056 0123 movs r3, #1 + 15119 0058 3E22 movs r2, #62 + 15120 005a A354 strb r3, [r4, r2] +3511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 15121 .loc 1 3511 5 view .LVU4480 + 15122 005c 0132 adds r2, r2, #1 + 15123 005e A354 strb r3, [r4, r2] +3512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15124 .loc 1 3512 5 view .LVU4481 + 15125 0060 0332 adds r2, r2, #3 + 15126 0062 A354 strb r3, [r4, r2] +3513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15127 .loc 1 3513 5 view .LVU4482 + 15128 0064 0132 adds r2, r2, #1 + 15129 0066 A354 strb r3, [r4, r2] + 15130 0068 1AE0 b .L1039 + 15131 .LVL1283: + 15132 .L1041: + ARM GAS /tmp/cchCqftX.s page 468 + + +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15133 .loc 1 3477 5 view .LVU4483 + 15134 006a 0068 ldr r0, [r0] + 15135 .LVL1284: +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15136 .loc 1 3477 5 is_stmt 0 view .LVU4484 + 15137 006c 0022 movs r2, #0 + 15138 006e 0021 movs r1, #0 + 15139 .LVL1285: +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15140 .loc 1 3477 5 view .LVU4485 + 15141 0070 FFF7FEFF bl TIM_CCxChannelCmd + 15142 .LVL1286: +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15143 .loc 1 3480 5 is_stmt 1 view .LVU4486 + 15144 0074 2268 ldr r2, [r4] + 15145 0076 D368 ldr r3, [r2, #12] + 15146 0078 0221 movs r1, #2 + 15147 007a 8B43 bics r3, r1 + 15148 007c D360 str r3, [r2, #12] + 15149 007e D9E7 b .L1033 + 15150 .LVL1287: + 15151 .L1042: +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15152 .loc 1 3484 5 view .LVU4487 + 15153 0080 0068 ldr r0, [r0] + 15154 .LVL1288: +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15155 .loc 1 3484 5 is_stmt 0 view .LVU4488 + 15156 0082 0022 movs r2, #0 + 15157 0084 0421 movs r1, #4 + 15158 .LVL1289: +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15159 .loc 1 3484 5 view .LVU4489 + 15160 0086 FFF7FEFF bl TIM_CCxChannelCmd + 15161 .LVL1290: +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15162 .loc 1 3487 5 is_stmt 1 view .LVU4490 + 15163 008a 2268 ldr r2, [r4] + 15164 008c D368 ldr r3, [r2, #12] + 15165 008e 0421 movs r1, #4 + 15166 0090 8B43 bics r3, r1 + 15167 0092 D360 str r3, [r2, #12] + 15168 0094 CEE7 b .L1033 + 15169 .L1036: +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15170 .loc 1 3505 5 view .LVU4491 +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15171 .loc 1 3505 5 is_stmt 0 discriminator 1 view .LVU4492 + 15172 0096 0123 movs r3, #1 + 15173 0098 3E22 movs r2, #62 + 15174 009a A354 strb r3, [r4, r2] +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15175 .loc 1 3506 5 is_stmt 1 view .LVU4493 +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15176 .loc 1 3506 5 is_stmt 0 discriminator 1 view .LVU4494 + 15177 009c 0432 adds r2, r2, #4 + ARM GAS /tmp/cchCqftX.s page 469 + + + 15178 009e A354 strb r3, [r4, r2] + 15179 .L1039: +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15180 .loc 1 3517 3 is_stmt 1 view .LVU4495 +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15181 .loc 1 3518 1 is_stmt 0 view .LVU4496 + 15182 00a0 0020 movs r0, #0 + 15183 @ sp needed + 15184 .LVL1291: + 15185 .LVL1292: +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15186 .loc 1 3518 1 view .LVU4497 + 15187 00a2 70BD pop {r4, r5, r6, pc} + 15188 .LVL1293: + 15189 .L1043: +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15190 .loc 1 3505 5 is_stmt 1 view .LVU4498 +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15191 .loc 1 3505 5 is_stmt 0 discriminator 3 view .LVU4499 + 15192 00a4 0123 movs r3, #1 + 15193 00a6 3F22 movs r2, #63 + 15194 00a8 A354 strb r3, [r4, r2] +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15195 .loc 1 3506 5 is_stmt 1 view .LVU4500 +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15196 .loc 1 3506 5 is_stmt 0 discriminator 3 view .LVU4501 + 15197 00aa 0432 adds r2, r2, #4 + 15198 00ac A354 strb r3, [r4, r2] + 15199 00ae F7E7 b .L1039 + 15200 .L1045: + 15201 .align 2 + 15202 .L1044: + 15203 00b0 11110000 .word 4369 + 15204 00b4 44040000 .word 1092 + 15205 .cfi_endproc + 15206 .LFE95: + 15208 .section .text.HAL_TIM_Encoder_Start_DMA,"ax",%progbits + 15209 .align 1 + 15210 .global HAL_TIM_Encoder_Start_DMA + 15211 .syntax unified + 15212 .code 16 + 15213 .thumb_func + 15215 HAL_TIM_Encoder_Start_DMA: + 15216 .LVL1294: + 15217 .LFB96: +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15218 .loc 1 3535 1 is_stmt 1 view -0 + 15219 .cfi_startproc + 15220 @ args = 4, pretend = 0, frame = 8 + 15221 @ frame_needed = 0, uses_anonymous_args = 0 +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15222 .loc 1 3535 1 is_stmt 0 view .LVU4503 + 15223 0000 F0B5 push {r4, r5, r6, r7, lr} + 15224 .cfi_def_cfa_offset 20 + 15225 .cfi_offset 4, -20 + 15226 .cfi_offset 5, -16 + 15227 .cfi_offset 6, -12 + ARM GAS /tmp/cchCqftX.s page 470 + + + 15228 .cfi_offset 7, -8 + 15229 .cfi_offset 14, -4 + 15230 0002 83B0 sub sp, sp, #12 + 15231 .cfi_def_cfa_offset 32 + 15232 0004 0400 movs r4, r0 + 15233 0006 0193 str r3, [sp, #4] + 15234 0008 08AB add r3, sp, #32 + 15235 .LVL1295: +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15236 .loc 1 3535 1 view .LVU4504 + 15237 000a 1F88 ldrh r7, [r3] +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15238 .loc 1 3536 3 is_stmt 1 view .LVU4505 +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15239 .loc 1 3536 31 is_stmt 0 view .LVU4506 + 15240 000c 3E23 movs r3, #62 + 15241 .LVL1296: +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15242 .loc 1 3536 31 view .LVU4507 + 15243 000e C55C ldrb r5, [r0, r3] + 15244 0010 EDB2 uxtb r5, r5 + 15245 .LVL1297: +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15246 .loc 1 3537 3 is_stmt 1 view .LVU4508 +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15247 .loc 1 3537 31 is_stmt 0 view .LVU4509 + 15248 0012 0133 adds r3, r3, #1 + 15249 0014 C05C ldrb r0, [r0, r3] + 15250 .LVL1298: +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15251 .loc 1 3537 31 view .LVU4510 + 15252 0016 C0B2 uxtb r0, r0 + 15253 .LVL1299: +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15254 .loc 1 3538 3 is_stmt 1 view .LVU4511 +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15255 .loc 1 3538 31 is_stmt 0 view .LVU4512 + 15256 0018 0333 adds r3, r3, #3 + 15257 001a E35C ldrb r3, [r4, r3] + 15258 001c DBB2 uxtb r3, r3 + 15259 .LVL1300: +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15260 .loc 1 3539 3 is_stmt 1 view .LVU4513 +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15261 .loc 1 3539 31 is_stmt 0 view .LVU4514 + 15262 001e 4326 movs r6, #67 + 15263 0020 A65D ldrb r6, [r4, r6] + 15264 0022 F6B2 uxtb r6, r6 + 15265 .LVL1301: +3542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15266 .loc 1 3542 3 is_stmt 1 view .LVU4515 +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15267 .loc 1 3545 3 view .LVU4516 +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15268 .loc 1 3545 6 is_stmt 0 view .LVU4517 + 15269 0024 0029 cmp r1, #0 + 15270 0026 2ED1 bne .L1047 + ARM GAS /tmp/cchCqftX.s page 471 + + +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15271 .loc 1 3547 5 is_stmt 1 view .LVU4518 +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15272 .loc 1 3547 8 is_stmt 0 view .LVU4519 + 15273 0028 022D cmp r5, #2 + 15274 002a 00D1 bne .LCB14047 + 15275 002c EEE0 b .L1048 @long jump + 15276 .LCB14047: +3548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15277 .loc 1 3548 9 view .LVU4520 + 15278 002e 022B cmp r3, #2 + 15279 0030 00D1 bne .LCB14049 + 15280 0032 E8E0 b .L1054 @long jump + 15281 .LCB14049: +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 15282 .loc 1 3552 10 is_stmt 1 view .LVU4521 +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 15283 .loc 1 3552 13 is_stmt 0 view .LVU4522 + 15284 0034 012D cmp r5, #1 + 15285 0036 00D0 beq .LCB14052 + 15286 0038 E7E0 b .L1055 @long jump + 15287 .LCB14052: +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15288 .loc 1 3553 14 view .LVU4523 + 15289 003a 012B cmp r3, #1 + 15290 003c 00D0 beq .LCB14054 + 15291 003e E5E0 b .L1048 @long jump + 15292 .LCB14054: +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15293 .loc 1 3555 7 is_stmt 1 view .LVU4524 +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15294 .loc 1 3555 10 is_stmt 0 view .LVU4525 + 15295 0040 002A cmp r2, #0 + 15296 0042 00D1 bne .LCB14057 + 15297 0044 E5E0 b .L1056 @long jump + 15298 .LCB14057: +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15299 .loc 1 3555 28 discriminator 1 view .LVU4526 + 15300 0046 002F cmp r7, #0 + 15301 0048 00D1 bne .LCB14059 + 15302 004a E4E0 b .L1057 @long jump + 15303 .LCB14059: +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15304 .loc 1 3561 9 is_stmt 1 view .LVU4527 + 15305 004c 0133 adds r3, r3, #1 + 15306 .LVL1302: +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15307 .loc 1 3561 9 is_stmt 0 view .LVU4528 + 15308 004e 3E20 movs r0, #62 + 15309 .LVL1303: +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15310 .loc 1 3561 9 view .LVU4529 + 15311 0050 2354 strb r3, [r4, r0] +3562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15312 .loc 1 3562 9 is_stmt 1 view .LVU4530 + 15313 0052 0430 adds r0, r0, #4 + 15314 0054 2354 strb r3, [r4, r0] + ARM GAS /tmp/cchCqftX.s page 472 + + + 15315 .LVL1304: + 15316 .L1049: +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15317 .loc 1 3627 3 view .LVU4531 + 15318 0056 0029 cmp r1, #0 + 15319 0058 5CD0 beq .L1051 + 15320 005a 0429 cmp r1, #4 + 15321 005c 7ED0 beq .L1052 +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15322 .loc 1 3687 7 view .LVU4532 +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15323 .loc 1 3687 17 is_stmt 0 view .LVU4533 + 15324 005e 636A ldr r3, [r4, #36] +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15325 .loc 1 3687 52 view .LVU4534 + 15326 0060 7D49 ldr r1, .L1083 + 15327 .LVL1305: +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15328 .loc 1 3687 52 view .LVU4535 + 15329 0062 9962 str r1, [r3, #40] +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15330 .loc 1 3688 7 is_stmt 1 view .LVU4536 +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15331 .loc 1 3688 17 is_stmt 0 view .LVU4537 + 15332 0064 636A ldr r3, [r4, #36] +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15333 .loc 1 3688 56 view .LVU4538 + 15334 0066 7D49 ldr r1, .L1083+4 + 15335 0068 D962 str r1, [r3, #44] +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15336 .loc 1 3691 7 is_stmt 1 view .LVU4539 +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15337 .loc 1 3691 17 is_stmt 0 view .LVU4540 + 15338 006a 636A ldr r3, [r4, #36] +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15339 .loc 1 3691 53 view .LVU4541 + 15340 006c 7C49 ldr r1, .L1083+8 + 15341 006e 1963 str r1, [r3, #48] +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15342 .loc 1 3694 7 is_stmt 1 view .LVU4542 +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15343 .loc 1 3694 71 is_stmt 0 view .LVU4543 + 15344 0070 2168 ldr r1, [r4] +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15345 .loc 1 3694 66 view .LVU4544 + 15346 0072 3431 adds r1, r1, #52 +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15347 .loc 1 3694 11 view .LVU4545 + 15348 0074 606A ldr r0, [r4, #36] + 15349 0076 3B00 movs r3, r7 + 15350 0078 FFF7FEFF bl HAL_DMA_Start_IT + 15351 .LVL1306: +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15352 .loc 1 3694 10 discriminator 1 view .LVU4546 + 15353 007c 0028 cmp r0, #0 + 15354 007e 00D1 bne .LCB14099 + 15355 0080 91E0 b .L1078 @long jump + ARM GAS /tmp/cchCqftX.s page 473 + + + 15356 .LCB14099: +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15357 .loc 1 3698 16 view .LVU4547 + 15358 0082 0125 movs r5, #1 + 15359 .LVL1307: +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15360 .loc 1 3698 16 view .LVU4548 + 15361 0084 C2E0 b .L1048 + 15362 .LVL1308: + 15363 .L1047: +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15364 .loc 1 3570 8 is_stmt 1 view .LVU4549 +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15365 .loc 1 3570 11 is_stmt 0 view .LVU4550 + 15366 0086 0429 cmp r1, #4 + 15367 0088 2BD0 beq .L1079 +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15368 .loc 1 3597 5 is_stmt 1 view .LVU4551 +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15369 .loc 1 3597 8 is_stmt 0 view .LVU4552 + 15370 008a 022D cmp r5, #2 + 15371 008c 00D1 bne .LCB14118 + 15372 008e BDE0 b .L1048 @long jump + 15373 .LCB14118: +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15374 .loc 1 3598 9 view .LVU4553 + 15375 0090 0228 cmp r0, #2 + 15376 0092 00D1 bne .LCB14120 + 15377 0094 CDE0 b .L1064 @long jump + 15378 .LCB14120: +3599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15379 .loc 1 3599 9 view .LVU4554 + 15380 0096 022B cmp r3, #2 + 15381 0098 00D1 bne .LCB14122 + 15382 009a CCE0 b .L1065 @long jump + 15383 .LCB14122: +3600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15384 .loc 1 3600 9 view .LVU4555 + 15385 009c 022E cmp r6, #2 + 15386 009e 00D1 bne .LCB14124 + 15387 00a0 CBE0 b .L1066 @long jump + 15388 .LCB14124: +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) + 15389 .loc 1 3604 10 is_stmt 1 view .LVU4556 +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) + 15390 .loc 1 3604 13 is_stmt 0 view .LVU4557 + 15391 00a2 012D cmp r5, #1 + 15392 00a4 00D0 beq .LCB14127 + 15393 00a6 CAE0 b .L1067 @long jump + 15394 .LCB14127: +3605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY) + 15395 .loc 1 3605 14 view .LVU4558 + 15396 00a8 0128 cmp r0, #1 + 15397 00aa 00D0 beq .LCB14129 + 15398 00ac AEE0 b .L1048 @long jump + 15399 .LCB14129: +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + ARM GAS /tmp/cchCqftX.s page 474 + + + 15400 .loc 1 3606 14 view .LVU4559 + 15401 00ae 012B cmp r3, #1 + 15402 00b0 00D0 beq .LCB14131 + 15403 00b2 C6E0 b .L1068 @long jump + 15404 .LCB14131: +3607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15405 .loc 1 3607 14 view .LVU4560 + 15406 00b4 012E cmp r6, #1 + 15407 00b6 00D0 beq .LCB14133 + 15408 00b8 C5E0 b .L1069 @long jump + 15409 .LCB14133: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15410 .loc 1 3609 7 is_stmt 1 view .LVU4561 +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15411 .loc 1 3609 10 is_stmt 0 view .LVU4562 + 15412 00ba 002A cmp r2, #0 + 15413 00bc 00D1 bne .LCB14136 + 15414 00be C4E0 b .L1070 @long jump + 15415 .LCB14136: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15416 .loc 1 3609 30 discriminator 1 view .LVU4563 + 15417 00c0 019B ldr r3, [sp, #4] + 15418 .LVL1309: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15419 .loc 1 3609 30 discriminator 1 view .LVU4564 + 15420 00c2 002B cmp r3, #0 + 15421 00c4 00D1 bne .LCB14140 + 15422 00c6 C2E0 b .L1071 @long jump + 15423 .LCB14140: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15424 .loc 1 3609 52 discriminator 2 view .LVU4565 + 15425 00c8 002F cmp r7, #0 + 15426 00ca 00D1 bne .LCB14142 + 15427 00cc C1E0 b .L1072 @long jump + 15428 .LCB14142: +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15429 .loc 1 3615 9 is_stmt 1 view .LVU4566 + 15430 00ce 0223 movs r3, #2 + 15431 00d0 3D30 adds r0, r0, #61 + 15432 .LVL1310: +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15433 .loc 1 3615 9 is_stmt 0 view .LVU4567 + 15434 00d2 2354 strb r3, [r4, r0] +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15435 .loc 1 3616 9 is_stmt 1 view .LVU4568 + 15436 00d4 0130 adds r0, r0, #1 + 15437 .LVL1311: +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15438 .loc 1 3616 9 is_stmt 0 view .LVU4569 + 15439 00d6 2354 strb r3, [r4, r0] +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15440 .loc 1 3617 9 is_stmt 1 view .LVU4570 + 15441 00d8 0330 adds r0, r0, #3 + 15442 .LVL1312: +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15443 .loc 1 3617 9 is_stmt 0 view .LVU4571 + 15444 00da 2354 strb r3, [r4, r0] + ARM GAS /tmp/cchCqftX.s page 475 + + +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15445 .loc 1 3618 9 is_stmt 1 view .LVU4572 + 15446 00dc 0130 adds r0, r0, #1 + 15447 .LVL1313: +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15448 .loc 1 3618 9 is_stmt 0 view .LVU4573 + 15449 00de 2354 strb r3, [r4, r0] +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15450 .loc 1 3609 10 view .LVU4574 + 15451 00e0 B9E7 b .L1049 + 15452 .LVL1314: + 15453 .L1079: +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15454 .loc 1 3572 5 is_stmt 1 view .LVU4575 +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15455 .loc 1 3572 8 is_stmt 0 view .LVU4576 + 15456 00e2 0228 cmp r0, #2 + 15457 00e4 00D1 bne .LCB14169 + 15458 00e6 98E0 b .L1058 @long jump + 15459 .LCB14169: +3573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15460 .loc 1 3573 9 view .LVU4577 + 15461 00e8 022E cmp r6, #2 + 15462 00ea 00D1 bne .LCB14171 + 15463 00ec 97E0 b .L1059 @long jump + 15464 .LCB14171: +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + 15465 .loc 1 3577 10 is_stmt 1 view .LVU4578 +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + 15466 .loc 1 3577 13 is_stmt 0 view .LVU4579 + 15467 00ee 0128 cmp r0, #1 + 15468 00f0 00D0 beq .LCB14174 + 15469 00f2 96E0 b .L1060 @long jump + 15470 .LCB14174: +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15471 .loc 1 3578 14 view .LVU4580 + 15472 00f4 012E cmp r6, #1 + 15473 00f6 00D0 beq .LCB14176 + 15474 00f8 95E0 b .L1061 @long jump + 15475 .LCB14176: +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15476 .loc 1 3580 7 is_stmt 1 view .LVU4581 +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15477 .loc 1 3580 10 is_stmt 0 view .LVU4582 + 15478 00fa 019B ldr r3, [sp, #4] + 15479 .LVL1315: +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15480 .loc 1 3580 10 view .LVU4583 + 15481 00fc 002B cmp r3, #0 + 15482 00fe 00D1 bne .LCB14181 + 15483 0100 93E0 b .L1062 @long jump + 15484 .LCB14181: +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15485 .loc 1 3580 28 discriminator 1 view .LVU4584 + 15486 0102 002F cmp r7, #0 + 15487 0104 00D1 bne .LCB14183 + 15488 0106 92E0 b .L1063 @long jump + ARM GAS /tmp/cchCqftX.s page 476 + + + 15489 .LCB14183: +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15490 .loc 1 3586 9 is_stmt 1 view .LVU4585 + 15491 0108 0223 movs r3, #2 + 15492 010a 3E30 adds r0, r0, #62 + 15493 .LVL1316: +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15494 .loc 1 3586 9 is_stmt 0 view .LVU4586 + 15495 010c 2354 strb r3, [r4, r0] +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15496 .loc 1 3587 9 is_stmt 1 view .LVU4587 + 15497 010e 0430 adds r0, r0, #4 + 15498 .LVL1317: +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15499 .loc 1 3587 9 is_stmt 0 view .LVU4588 + 15500 0110 2354 strb r3, [r4, r0] + 15501 0112 A0E7 b .L1049 + 15502 .LVL1318: + 15503 .L1051: +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15504 .loc 1 3632 7 is_stmt 1 view .LVU4589 +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15505 .loc 1 3632 17 is_stmt 0 view .LVU4590 + 15506 0114 636A ldr r3, [r4, #36] +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15507 .loc 1 3632 52 view .LVU4591 + 15508 0116 5049 ldr r1, .L1083 + 15509 .LVL1319: +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15510 .loc 1 3632 52 view .LVU4592 + 15511 0118 9962 str r1, [r3, #40] +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15512 .loc 1 3633 7 is_stmt 1 view .LVU4593 +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15513 .loc 1 3633 17 is_stmt 0 view .LVU4594 + 15514 011a 636A ldr r3, [r4, #36] +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15515 .loc 1 3633 56 view .LVU4595 + 15516 011c 4F49 ldr r1, .L1083+4 + 15517 011e D962 str r1, [r3, #44] +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15518 .loc 1 3636 7 is_stmt 1 view .LVU4596 +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15519 .loc 1 3636 17 is_stmt 0 view .LVU4597 + 15520 0120 636A ldr r3, [r4, #36] +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15521 .loc 1 3636 53 view .LVU4598 + 15522 0122 4F49 ldr r1, .L1083+8 + 15523 0124 1963 str r1, [r3, #48] +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15524 .loc 1 3639 7 is_stmt 1 view .LVU4599 +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15525 .loc 1 3639 71 is_stmt 0 view .LVU4600 + 15526 0126 2168 ldr r1, [r4] +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15527 .loc 1 3639 66 view .LVU4601 + 15528 0128 3431 adds r1, r1, #52 + ARM GAS /tmp/cchCqftX.s page 477 + + +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15529 .loc 1 3639 11 view .LVU4602 + 15530 012a 606A ldr r0, [r4, #36] + 15531 012c 3B00 movs r3, r7 + 15532 012e FFF7FEFF bl HAL_DMA_Start_IT + 15533 .LVL1320: +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15534 .loc 1 3639 11 view .LVU4603 + 15535 0132 051E subs r5, r0, #0 + 15536 .LVL1321: +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15537 .loc 1 3639 10 discriminator 1 view .LVU4604 + 15538 0134 01D0 beq .L1080 +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15539 .loc 1 3643 16 view .LVU4605 + 15540 0136 0125 movs r5, #1 + 15541 0138 68E0 b .L1048 + 15542 .L1080: +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15543 .loc 1 3646 7 is_stmt 1 view .LVU4606 + 15544 013a 2268 ldr r2, [r4] + 15545 013c D168 ldr r1, [r2, #12] + 15546 013e 8023 movs r3, #128 + 15547 0140 9B00 lsls r3, r3, #2 + 15548 0142 0B43 orrs r3, r1 + 15549 0144 D360 str r3, [r2, #12] +3649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15550 .loc 1 3649 7 view .LVU4607 + 15551 0146 2068 ldr r0, [r4] + 15552 0148 0122 movs r2, #1 + 15553 014a 0021 movs r1, #0 + 15554 014c FFF7FEFF bl TIM_CCxChannelCmd + 15555 .LVL1322: +3652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15556 .loc 1 3652 7 view .LVU4608 + 15557 0150 2268 ldr r2, [r4] + 15558 0152 1368 ldr r3, [r2] + 15559 0154 0121 movs r1, #1 + 15560 0156 0B43 orrs r3, r1 + 15561 0158 1360 str r3, [r2] +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15562 .loc 1 3654 7 view .LVU4609 + 15563 015a 57E0 b .L1048 + 15564 .LVL1323: + 15565 .L1052: +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15566 .loc 1 3660 7 view .LVU4610 +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15567 .loc 1 3660 17 is_stmt 0 view .LVU4611 + 15568 015c A36A ldr r3, [r4, #40] +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15569 .loc 1 3660 52 view .LVU4612 + 15570 015e 3E4A ldr r2, .L1083 + 15571 .LVL1324: +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15572 .loc 1 3660 52 view .LVU4613 + 15573 0160 9A62 str r2, [r3, #40] + ARM GAS /tmp/cchCqftX.s page 478 + + +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15574 .loc 1 3661 7 is_stmt 1 view .LVU4614 +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15575 .loc 1 3661 17 is_stmt 0 view .LVU4615 + 15576 0162 A36A ldr r3, [r4, #40] +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15577 .loc 1 3661 56 view .LVU4616 + 15578 0164 3D4A ldr r2, .L1083+4 + 15579 0166 DA62 str r2, [r3, #44] +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + 15580 .loc 1 3664 7 is_stmt 1 view .LVU4617 +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + 15581 .loc 1 3664 17 is_stmt 0 view .LVU4618 + 15582 0168 A36A ldr r3, [r4, #40] +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + 15583 .loc 1 3664 53 view .LVU4619 + 15584 016a 3D4A ldr r2, .L1083+8 + 15585 016c 1A63 str r2, [r3, #48] +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15586 .loc 1 3666 7 is_stmt 1 view .LVU4620 +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15587 .loc 1 3666 71 is_stmt 0 view .LVU4621 + 15588 016e 2168 ldr r1, [r4] + 15589 .LVL1325: +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15590 .loc 1 3666 66 view .LVU4622 + 15591 0170 3831 adds r1, r1, #56 +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15592 .loc 1 3666 11 view .LVU4623 + 15593 0172 A06A ldr r0, [r4, #40] + 15594 0174 3B00 movs r3, r7 + 15595 0176 019A ldr r2, [sp, #4] + 15596 0178 FFF7FEFF bl HAL_DMA_Start_IT + 15597 .LVL1326: + 15598 017c 051E subs r5, r0, #0 + 15599 .LVL1327: +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15600 .loc 1 3666 10 discriminator 1 view .LVU4624 + 15601 017e 01D0 beq .L1081 +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15602 .loc 1 3670 16 view .LVU4625 + 15603 0180 0125 movs r5, #1 + 15604 0182 43E0 b .L1048 + 15605 .L1081: +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15606 .loc 1 3673 7 is_stmt 1 view .LVU4626 + 15607 0184 2268 ldr r2, [r4] + 15608 0186 D168 ldr r1, [r2, #12] + 15609 0188 8023 movs r3, #128 + 15610 018a DB00 lsls r3, r3, #3 + 15611 018c 0B43 orrs r3, r1 + 15612 018e D360 str r3, [r2, #12] +3676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15613 .loc 1 3676 7 view .LVU4627 + 15614 0190 2068 ldr r0, [r4] + 15615 0192 0122 movs r2, #1 + 15616 0194 0421 movs r1, #4 + ARM GAS /tmp/cchCqftX.s page 479 + + + 15617 0196 FFF7FEFF bl TIM_CCxChannelCmd + 15618 .LVL1328: +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15619 .loc 1 3679 7 view .LVU4628 + 15620 019a 2268 ldr r2, [r4] + 15621 019c 1368 ldr r3, [r2] + 15622 019e 0121 movs r1, #1 + 15623 01a0 0B43 orrs r3, r1 + 15624 01a2 1360 str r3, [r2] +3681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15625 .loc 1 3681 7 view .LVU4629 + 15626 01a4 32E0 b .L1048 + 15627 .LVL1329: + 15628 .L1078: +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15629 .loc 1 3702 7 view .LVU4630 +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15630 .loc 1 3702 17 is_stmt 0 view .LVU4631 + 15631 01a6 A36A ldr r3, [r4, #40] +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15632 .loc 1 3702 52 view .LVU4632 + 15633 01a8 2B4A ldr r2, .L1083 + 15634 01aa 9A62 str r2, [r3, #40] +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15635 .loc 1 3703 7 is_stmt 1 view .LVU4633 +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15636 .loc 1 3703 17 is_stmt 0 view .LVU4634 + 15637 01ac A36A ldr r3, [r4, #40] +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15638 .loc 1 3703 56 view .LVU4635 + 15639 01ae 2B4A ldr r2, .L1083+4 + 15640 01b0 DA62 str r2, [r3, #44] +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15641 .loc 1 3706 7 is_stmt 1 view .LVU4636 +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15642 .loc 1 3706 17 is_stmt 0 view .LVU4637 + 15643 01b2 A36A ldr r3, [r4, #40] +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15644 .loc 1 3706 53 view .LVU4638 + 15645 01b4 2A4A ldr r2, .L1083+8 + 15646 01b6 1A63 str r2, [r3, #48] +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15647 .loc 1 3709 7 is_stmt 1 view .LVU4639 +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15648 .loc 1 3709 71 is_stmt 0 view .LVU4640 + 15649 01b8 2168 ldr r1, [r4] +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15650 .loc 1 3709 66 view .LVU4641 + 15651 01ba 3831 adds r1, r1, #56 +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15652 .loc 1 3709 11 view .LVU4642 + 15653 01bc A06A ldr r0, [r4, #40] + 15654 01be 3B00 movs r3, r7 + 15655 01c0 019A ldr r2, [sp, #4] + 15656 01c2 FFF7FEFF bl HAL_DMA_Start_IT + 15657 .LVL1330: + 15658 01c6 051E subs r5, r0, #0 + ARM GAS /tmp/cchCqftX.s page 480 + + + 15659 .LVL1331: +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15660 .loc 1 3709 10 discriminator 1 view .LVU4643 + 15661 01c8 01D0 beq .L1082 +3713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15662 .loc 1 3713 16 view .LVU4644 + 15663 01ca 0125 movs r5, #1 + 15664 01cc 1EE0 b .L1048 + 15665 .L1082: +3717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ + 15666 .loc 1 3717 7 is_stmt 1 view .LVU4645 + 15667 01ce 2268 ldr r2, [r4] + 15668 01d0 D168 ldr r1, [r2, #12] + 15669 01d2 8023 movs r3, #128 + 15670 01d4 9B00 lsls r3, r3, #2 + 15671 01d6 0B43 orrs r3, r1 + 15672 01d8 D360 str r3, [r2, #12] +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15673 .loc 1 3719 7 view .LVU4646 + 15674 01da 2268 ldr r2, [r4] + 15675 01dc D168 ldr r1, [r2, #12] + 15676 01de 8023 movs r3, #128 + 15677 01e0 DB00 lsls r3, r3, #3 + 15678 01e2 0B43 orrs r3, r1 + 15679 01e4 D360 str r3, [r2, #12] +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 15680 .loc 1 3722 7 view .LVU4647 + 15681 01e6 2068 ldr r0, [r4] + 15682 01e8 0122 movs r2, #1 + 15683 01ea 0021 movs r1, #0 + 15684 01ec FFF7FEFF bl TIM_CCxChannelCmd + 15685 .LVL1332: +3723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15686 .loc 1 3723 7 view .LVU4648 + 15687 01f0 2068 ldr r0, [r4] + 15688 01f2 0122 movs r2, #1 + 15689 01f4 0421 movs r1, #4 + 15690 01f6 FFF7FEFF bl TIM_CCxChannelCmd + 15691 .LVL1333: +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15692 .loc 1 3726 7 view .LVU4649 + 15693 01fa 2268 ldr r2, [r4] + 15694 01fc 1368 ldr r3, [r2] + 15695 01fe 0121 movs r1, #1 + 15696 0200 0B43 orrs r3, r1 + 15697 0202 1360 str r3, [r2] +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15698 .loc 1 3728 7 view .LVU4650 + 15699 0204 02E0 b .L1048 + 15700 .LVL1334: + 15701 .L1054: +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15702 .loc 1 3550 14 is_stmt 0 view .LVU4651 + 15703 0206 1D00 movs r5, r3 + 15704 .LVL1335: +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15705 .loc 1 3550 14 view .LVU4652 + ARM GAS /tmp/cchCqftX.s page 481 + + + 15706 0208 00E0 b .L1048 + 15707 .LVL1336: + 15708 .L1055: +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15709 .loc 1 3567 14 view .LVU4653 + 15710 020a 0125 movs r5, #1 + 15711 .LVL1337: + 15712 .L1048: +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15713 .loc 1 3734 1 view .LVU4654 + 15714 020c 2800 movs r0, r5 + 15715 020e 03B0 add sp, sp, #12 + 15716 @ sp needed + 15717 .LVL1338: + 15718 .LVL1339: +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15719 .loc 1 3734 1 view .LVU4655 + 15720 0210 F0BD pop {r4, r5, r6, r7, pc} + 15721 .LVL1340: + 15722 .L1056: +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15723 .loc 1 3557 16 view .LVU4656 + 15724 0212 1D00 movs r5, r3 + 15725 .LVL1341: +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15726 .loc 1 3557 16 view .LVU4657 + 15727 0214 FAE7 b .L1048 + 15728 .LVL1342: + 15729 .L1057: +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15730 .loc 1 3557 16 view .LVU4658 + 15731 0216 1D00 movs r5, r3 + 15732 .LVL1343: +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15733 .loc 1 3557 16 view .LVU4659 + 15734 0218 F8E7 b .L1048 + 15735 .LVL1344: + 15736 .L1058: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15737 .loc 1 3575 14 view .LVU4660 + 15738 021a 0500 movs r5, r0 + 15739 .LVL1345: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15740 .loc 1 3575 14 view .LVU4661 + 15741 021c F6E7 b .L1048 + 15742 .LVL1346: + 15743 .L1059: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15744 .loc 1 3575 14 view .LVU4662 + 15745 021e 3500 movs r5, r6 + 15746 .LVL1347: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15747 .loc 1 3575 14 view .LVU4663 + 15748 0220 F4E7 b .L1048 + 15749 .LVL1348: + 15750 .L1060: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 482 + + + 15751 .loc 1 3592 14 view .LVU4664 + 15752 0222 0125 movs r5, #1 + 15753 .LVL1349: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15754 .loc 1 3592 14 view .LVU4665 + 15755 0224 F2E7 b .L1048 + 15756 .LVL1350: + 15757 .L1061: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15758 .loc 1 3592 14 view .LVU4666 + 15759 0226 0500 movs r5, r0 + 15760 .LVL1351: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15761 .loc 1 3592 14 view .LVU4667 + 15762 0228 F0E7 b .L1048 + 15763 .LVL1352: + 15764 .L1062: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15765 .loc 1 3582 16 view .LVU4668 + 15766 022a 3500 movs r5, r6 + 15767 .LVL1353: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15768 .loc 1 3582 16 view .LVU4669 + 15769 022c EEE7 b .L1048 + 15770 .LVL1354: + 15771 .L1063: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15772 .loc 1 3582 16 view .LVU4670 + 15773 022e 3500 movs r5, r6 + 15774 .LVL1355: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15775 .loc 1 3582 16 view .LVU4671 + 15776 0230 ECE7 b .L1048 + 15777 .LVL1356: + 15778 .L1064: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15779 .loc 1 3602 14 view .LVU4672 + 15780 0232 0500 movs r5, r0 + 15781 .LVL1357: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15782 .loc 1 3602 14 view .LVU4673 + 15783 0234 EAE7 b .L1048 + 15784 .LVL1358: + 15785 .L1065: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15786 .loc 1 3602 14 view .LVU4674 + 15787 0236 1D00 movs r5, r3 + 15788 .LVL1359: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15789 .loc 1 3602 14 view .LVU4675 + 15790 0238 E8E7 b .L1048 + 15791 .LVL1360: + 15792 .L1066: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15793 .loc 1 3602 14 view .LVU4676 + 15794 023a 3500 movs r5, r6 + 15795 .LVL1361: + ARM GAS /tmp/cchCqftX.s page 483 + + +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15796 .loc 1 3602 14 view .LVU4677 + 15797 023c E6E7 b .L1048 + 15798 .LVL1362: + 15799 .L1067: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15800 .loc 1 3623 14 view .LVU4678 + 15801 023e 0125 movs r5, #1 + 15802 .LVL1363: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15803 .loc 1 3623 14 view .LVU4679 + 15804 0240 E4E7 b .L1048 + 15805 .LVL1364: + 15806 .L1068: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15807 .loc 1 3623 14 view .LVU4680 + 15808 0242 0500 movs r5, r0 + 15809 .LVL1365: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15810 .loc 1 3623 14 view .LVU4681 + 15811 0244 E2E7 b .L1048 + 15812 .LVL1366: + 15813 .L1069: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15814 .loc 1 3623 14 view .LVU4682 + 15815 0246 1D00 movs r5, r3 + 15816 .LVL1367: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15817 .loc 1 3623 14 view .LVU4683 + 15818 0248 E0E7 b .L1048 + 15819 .LVL1368: + 15820 .L1070: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15821 .loc 1 3611 16 view .LVU4684 + 15822 024a 3500 movs r5, r6 + 15823 .LVL1369: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15824 .loc 1 3611 16 view .LVU4685 + 15825 024c DEE7 b .L1048 + 15826 .LVL1370: + 15827 .L1071: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15828 .loc 1 3611 16 view .LVU4686 + 15829 024e 3500 movs r5, r6 + 15830 .LVL1371: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15831 .loc 1 3611 16 view .LVU4687 + 15832 0250 DCE7 b .L1048 + 15833 .LVL1372: + 15834 .L1072: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15835 .loc 1 3611 16 view .LVU4688 + 15836 0252 3500 movs r5, r6 + 15837 .LVL1373: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15838 .loc 1 3611 16 view .LVU4689 + 15839 0254 DAE7 b .L1048 + ARM GAS /tmp/cchCqftX.s page 484 + + + 15840 .L1084: + 15841 0256 C046 .align 2 + 15842 .L1083: + 15843 0258 00000000 .word TIM_DMACaptureCplt + 15844 025c 00000000 .word TIM_DMACaptureHalfCplt + 15845 0260 00000000 .word TIM_DMAError + 15846 .cfi_endproc + 15847 .LFE96: + 15849 .section .text.HAL_TIM_Encoder_Stop_DMA,"ax",%progbits + 15850 .align 1 + 15851 .global HAL_TIM_Encoder_Stop_DMA + 15852 .syntax unified + 15853 .code 16 + 15854 .thumb_func + 15856 HAL_TIM_Encoder_Stop_DMA: + 15857 .LVL1374: + 15858 .LFB97: +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 15859 .loc 1 3747 1 is_stmt 1 view -0 + 15860 .cfi_startproc + 15861 @ args = 0, pretend = 0, frame = 0 + 15862 @ frame_needed = 0, uses_anonymous_args = 0 +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 15863 .loc 1 3747 1 is_stmt 0 view .LVU4691 + 15864 0000 70B5 push {r4, r5, r6, lr} + 15865 .cfi_def_cfa_offset 16 + 15866 .cfi_offset 4, -16 + 15867 .cfi_offset 5, -12 + 15868 .cfi_offset 6, -8 + 15869 .cfi_offset 14, -4 + 15870 0002 0400 movs r4, r0 + 15871 0004 0D1E subs r5, r1, #0 +3749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15872 .loc 1 3749 3 is_stmt 1 view .LVU4692 +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15873 .loc 1 3753 3 view .LVU4693 +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15874 .loc 1 3753 6 is_stmt 0 view .LVU4694 + 15875 0006 36D0 beq .L1095 +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15876 .loc 1 3761 8 is_stmt 1 view .LVU4695 +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15877 .loc 1 3761 11 is_stmt 0 view .LVU4696 + 15878 0008 0429 cmp r1, #4 + 15879 000a 42D0 beq .L1096 +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15880 .loc 1 3771 5 is_stmt 1 view .LVU4697 + 15881 000c 0068 ldr r0, [r0] + 15882 .LVL1375: +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15883 .loc 1 3771 5 is_stmt 0 view .LVU4698 + 15884 000e 0022 movs r2, #0 + 15885 0010 0021 movs r1, #0 + 15886 .LVL1376: +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15887 .loc 1 3771 5 view .LVU4699 + 15888 0012 FFF7FEFF bl TIM_CCxChannelCmd + ARM GAS /tmp/cchCqftX.s page 485 + + + 15889 .LVL1377: +3772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15890 .loc 1 3772 5 is_stmt 1 view .LVU4700 + 15891 0016 2068 ldr r0, [r4] + 15892 0018 0022 movs r2, #0 + 15893 001a 0421 movs r1, #4 + 15894 001c FFF7FEFF bl TIM_CCxChannelCmd + 15895 .LVL1378: +3775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); + 15896 .loc 1 3775 5 view .LVU4701 + 15897 0020 2268 ldr r2, [r4] + 15898 0022 D368 ldr r3, [r2, #12] + 15899 0024 2849 ldr r1, .L1098 + 15900 0026 0B40 ands r3, r1 + 15901 0028 D360 str r3, [r2, #12] +3776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 15902 .loc 1 3776 5 view .LVU4702 + 15903 002a 2268 ldr r2, [r4] + 15904 002c D368 ldr r3, [r2, #12] + 15905 002e 2749 ldr r1, .L1098+4 + 15906 0030 0B40 ands r3, r1 + 15907 0032 D360 str r3, [r2, #12] +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 15908 .loc 1 3777 5 view .LVU4703 +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 15909 .loc 1 3777 11 is_stmt 0 view .LVU4704 + 15910 0034 606A ldr r0, [r4, #36] + 15911 0036 FFF7FEFF bl HAL_DMA_Abort_IT + 15912 .LVL1379: +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15913 .loc 1 3778 5 is_stmt 1 view .LVU4705 +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15914 .loc 1 3778 11 is_stmt 0 view .LVU4706 + 15915 003a A06A ldr r0, [r4, #40] + 15916 003c FFF7FEFF bl HAL_DMA_Abort_IT + 15917 .LVL1380: + 15918 .L1087: +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15919 .loc 1 3782 3 is_stmt 1 view .LVU4707 +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15920 .loc 1 3782 3 view .LVU4708 + 15921 0040 2368 ldr r3, [r4] + 15922 0042 196A ldr r1, [r3, #32] + 15923 0044 224A ldr r2, .L1098+8 + 15924 0046 1142 tst r1, r2 + 15925 0048 07D1 bne .L1089 +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15926 .loc 1 3782 3 discriminator 1 view .LVU4709 + 15927 004a 196A ldr r1, [r3, #32] + 15928 004c 214A ldr r2, .L1098+12 + 15929 004e 1142 tst r1, r2 + 15930 0050 03D1 bne .L1089 +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15931 .loc 1 3782 3 discriminator 3 view .LVU4710 + 15932 0052 1A68 ldr r2, [r3] + 15933 0054 0121 movs r1, #1 + 15934 0056 8A43 bics r2, r1 + ARM GAS /tmp/cchCqftX.s page 486 + + + 15935 0058 1A60 str r2, [r3] + 15936 .L1089: +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15937 .loc 1 3782 3 discriminator 5 view .LVU4711 +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15938 .loc 1 3785 3 view .LVU4712 +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15939 .loc 1 3785 6 is_stmt 0 view .LVU4713 + 15940 005a 002D cmp r5, #0 + 15941 005c 27D0 beq .L1090 +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15942 .loc 1 3785 34 discriminator 1 view .LVU4714 + 15943 005e 042D cmp r5, #4 + 15944 0060 2CD0 beq .L1097 +3792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15945 .loc 1 3792 5 is_stmt 1 view .LVU4715 + 15946 0062 0123 movs r3, #1 + 15947 0064 3E22 movs r2, #62 + 15948 0066 A354 strb r3, [r4, r2] +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 15949 .loc 1 3793 5 view .LVU4716 + 15950 0068 0132 adds r2, r2, #1 + 15951 006a A354 strb r3, [r4, r2] +3794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15952 .loc 1 3794 5 view .LVU4717 + 15953 006c 0332 adds r2, r2, #3 + 15954 006e A354 strb r3, [r4, r2] +3795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15955 .loc 1 3795 5 view .LVU4718 + 15956 0070 0132 adds r2, r2, #1 + 15957 0072 A354 strb r3, [r4, r2] + 15958 0074 20E0 b .L1093 + 15959 .LVL1381: + 15960 .L1095: +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15961 .loc 1 3755 5 view .LVU4719 + 15962 0076 0068 ldr r0, [r0] + 15963 .LVL1382: +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15964 .loc 1 3755 5 is_stmt 0 view .LVU4720 + 15965 0078 0022 movs r2, #0 + 15966 007a 0021 movs r1, #0 + 15967 .LVL1383: +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15968 .loc 1 3755 5 view .LVU4721 + 15969 007c FFF7FEFF bl TIM_CCxChannelCmd + 15970 .LVL1384: +3758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 15971 .loc 1 3758 5 is_stmt 1 view .LVU4722 + 15972 0080 2268 ldr r2, [r4] + 15973 0082 D368 ldr r3, [r2, #12] + 15974 0084 1049 ldr r1, .L1098 + 15975 0086 0B40 ands r3, r1 + 15976 0088 D360 str r3, [r2, #12] +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15977 .loc 1 3759 5 view .LVU4723 +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/cchCqftX.s page 487 + + + 15978 .loc 1 3759 11 is_stmt 0 view .LVU4724 + 15979 008a 606A ldr r0, [r4, #36] + 15980 008c FFF7FEFF bl HAL_DMA_Abort_IT + 15981 .LVL1385: + 15982 0090 D6E7 b .L1087 + 15983 .LVL1386: + 15984 .L1096: +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15985 .loc 1 3763 5 is_stmt 1 view .LVU4725 + 15986 0092 0068 ldr r0, [r0] + 15987 .LVL1387: +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15988 .loc 1 3763 5 is_stmt 0 view .LVU4726 + 15989 0094 0022 movs r2, #0 + 15990 0096 0421 movs r1, #4 + 15991 .LVL1388: +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15992 .loc 1 3763 5 view .LVU4727 + 15993 0098 FFF7FEFF bl TIM_CCxChannelCmd + 15994 .LVL1389: +3766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 15995 .loc 1 3766 5 is_stmt 1 view .LVU4728 + 15996 009c 2268 ldr r2, [r4] + 15997 009e D368 ldr r3, [r2, #12] + 15998 00a0 0A49 ldr r1, .L1098+4 + 15999 00a2 0B40 ands r3, r1 + 16000 00a4 D360 str r3, [r2, #12] +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16001 .loc 1 3767 5 view .LVU4729 +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16002 .loc 1 3767 11 is_stmt 0 view .LVU4730 + 16003 00a6 A06A ldr r0, [r4, #40] + 16004 00a8 FFF7FEFF bl HAL_DMA_Abort_IT + 16005 .LVL1390: + 16006 00ac C8E7 b .L1087 + 16007 .L1090: +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16008 .loc 1 3787 5 is_stmt 1 view .LVU4731 +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16009 .loc 1 3787 5 is_stmt 0 discriminator 1 view .LVU4732 + 16010 00ae 0123 movs r3, #1 + 16011 00b0 3E22 movs r2, #62 + 16012 00b2 A354 strb r3, [r4, r2] +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16013 .loc 1 3788 5 is_stmt 1 view .LVU4733 +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16014 .loc 1 3788 5 is_stmt 0 discriminator 1 view .LVU4734 + 16015 00b4 0432 adds r2, r2, #4 + 16016 00b6 A354 strb r3, [r4, r2] + 16017 .L1093: +3799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16018 .loc 1 3799 3 is_stmt 1 view .LVU4735 +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 16019 .loc 1 3800 1 is_stmt 0 view .LVU4736 + 16020 00b8 0020 movs r0, #0 + 16021 @ sp needed + 16022 .LVL1391: + ARM GAS /tmp/cchCqftX.s page 488 + + + 16023 .LVL1392: +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 16024 .loc 1 3800 1 view .LVU4737 + 16025 00ba 70BD pop {r4, r5, r6, pc} + 16026 .LVL1393: + 16027 .L1097: +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16028 .loc 1 3787 5 is_stmt 1 view .LVU4738 +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16029 .loc 1 3787 5 is_stmt 0 discriminator 3 view .LVU4739 + 16030 00bc 0123 movs r3, #1 + 16031 00be 3F22 movs r2, #63 + 16032 00c0 A354 strb r3, [r4, r2] +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16033 .loc 1 3788 5 is_stmt 1 view .LVU4740 +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16034 .loc 1 3788 5 is_stmt 0 discriminator 3 view .LVU4741 + 16035 00c2 0432 adds r2, r2, #4 + 16036 00c4 A354 strb r3, [r4, r2] + 16037 00c6 F7E7 b .L1093 + 16038 .L1099: + 16039 .align 2 + 16040 .L1098: + 16041 00c8 FFFDFFFF .word -513 + 16042 00cc FFFBFFFF .word -1025 + 16043 00d0 11110000 .word 4369 + 16044 00d4 44040000 .word 1092 + 16045 .cfi_endproc + 16046 .LFE97: + 16048 .text + 16049 .Letext0: + 16050 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 16051 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 16052 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 16053 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 16054 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 16055 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 16056 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h" + 16057 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h" + ARM GAS /tmp/cchCqftX.s page 489 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_tim.c + /tmp/cchCqftX.s:19 .text.TIM_OC1_SetConfig:00000000 $t + /tmp/cchCqftX.s:24 .text.TIM_OC1_SetConfig:00000000 TIM_OC1_SetConfig + /tmp/cchCqftX.s:177 .text.TIM_OC1_SetConfig:0000006c $d + /tmp/cchCqftX.s:185 .text.TIM_OC3_SetConfig:00000000 $t + /tmp/cchCqftX.s:190 .text.TIM_OC3_SetConfig:00000000 TIM_OC3_SetConfig + /tmp/cchCqftX.s:335 .text.TIM_OC3_SetConfig:00000060 $d + /tmp/cchCqftX.s:347 .text.TIM_OC4_SetConfig:00000000 $t + /tmp/cchCqftX.s:352 .text.TIM_OC4_SetConfig:00000000 TIM_OC4_SetConfig + /tmp/cchCqftX.s:467 .text.TIM_OC4_SetConfig:0000004c $d + /tmp/cchCqftX.s:478 .text.TIM_TI1_ConfigInputStage:00000000 $t + /tmp/cchCqftX.s:483 .text.TIM_TI1_ConfigInputStage:00000000 TIM_TI1_ConfigInputStage + /tmp/cchCqftX.s:547 .text.TIM_TI2_SetConfig:00000000 $t + /tmp/cchCqftX.s:552 .text.TIM_TI2_SetConfig:00000000 TIM_TI2_SetConfig + /tmp/cchCqftX.s:635 .text.TIM_TI2_SetConfig:00000030 $d + /tmp/cchCqftX.s:641 .text.TIM_TI2_ConfigInputStage:00000000 $t + /tmp/cchCqftX.s:646 .text.TIM_TI2_ConfigInputStage:00000000 TIM_TI2_ConfigInputStage + /tmp/cchCqftX.s:712 .text.TIM_TI2_ConfigInputStage:00000024 $d + /tmp/cchCqftX.s:717 .text.TIM_TI3_SetConfig:00000000 $t + /tmp/cchCqftX.s:722 .text.TIM_TI3_SetConfig:00000000 TIM_TI3_SetConfig + /tmp/cchCqftX.s:809 .text.TIM_TI3_SetConfig:00000038 $d + /tmp/cchCqftX.s:815 .text.TIM_TI4_SetConfig:00000000 $t + /tmp/cchCqftX.s:820 .text.TIM_TI4_SetConfig:00000000 TIM_TI4_SetConfig + /tmp/cchCqftX.s:905 .text.TIM_TI4_SetConfig:00000034 $d + /tmp/cchCqftX.s:913 .text.TIM_ITRx_SetConfig:00000000 $t + /tmp/cchCqftX.s:918 .text.TIM_ITRx_SetConfig:00000000 TIM_ITRx_SetConfig + /tmp/cchCqftX.s:955 .text.HAL_TIM_Base_MspInit:00000000 $t + /tmp/cchCqftX.s:961 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit + /tmp/cchCqftX.s:977 .text.HAL_TIM_Base_MspDeInit:00000000 $t + /tmp/cchCqftX.s:983 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit + /tmp/cchCqftX.s:999 .text.HAL_TIM_Base_DeInit:00000000 $t + /tmp/cchCqftX.s:1005 .text.HAL_TIM_Base_DeInit:00000000 HAL_TIM_Base_DeInit + /tmp/cchCqftX.s:1101 .text.HAL_TIM_Base_DeInit:0000005c $d + /tmp/cchCqftX.s:1107 .text.HAL_TIM_Base_Start:00000000 $t + /tmp/cchCqftX.s:1113 .text.HAL_TIM_Base_Start:00000000 HAL_TIM_Base_Start + /tmp/cchCqftX.s:1207 .text.HAL_TIM_Base_Start:00000050 $d + /tmp/cchCqftX.s:1213 .text.HAL_TIM_Base_Stop:00000000 $t + /tmp/cchCqftX.s:1219 .text.HAL_TIM_Base_Stop:00000000 HAL_TIM_Base_Stop + /tmp/cchCqftX.s:1262 .text.HAL_TIM_Base_Stop:00000024 $d + /tmp/cchCqftX.s:1268 .text.HAL_TIM_Base_Start_IT:00000000 $t + /tmp/cchCqftX.s:1274 .text.HAL_TIM_Base_Start_IT:00000000 HAL_TIM_Base_Start_IT + /tmp/cchCqftX.s:1374 .text.HAL_TIM_Base_Start_IT:00000058 $d + /tmp/cchCqftX.s:1380 .text.HAL_TIM_Base_Stop_IT:00000000 $t + /tmp/cchCqftX.s:1386 .text.HAL_TIM_Base_Stop_IT:00000000 HAL_TIM_Base_Stop_IT + /tmp/cchCqftX.s:1435 .text.HAL_TIM_Base_Stop_IT:00000030 $d + /tmp/cchCqftX.s:1441 .text.HAL_TIM_Base_Start_DMA:00000000 $t + /tmp/cchCqftX.s:1447 .text.HAL_TIM_Base_Start_DMA:00000000 HAL_TIM_Base_Start_DMA + /tmp/cchCqftX.s:1601 .text.HAL_TIM_Base_Start_DMA:00000094 $d + /tmp/cchCqftX.s:3907 .text.TIM_DMAPeriodElapsedCplt:00000000 TIM_DMAPeriodElapsedCplt + /tmp/cchCqftX.s:3974 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 TIM_DMAPeriodElapsedHalfCplt + /tmp/cchCqftX.s:5021 .text.TIM_DMAError:00000000 TIM_DMAError + /tmp/cchCqftX.s:1610 .text.HAL_TIM_Base_Stop_DMA:00000000 $t + /tmp/cchCqftX.s:1616 .text.HAL_TIM_Base_Stop_DMA:00000000 HAL_TIM_Base_Stop_DMA + /tmp/cchCqftX.s:1677 .text.HAL_TIM_Base_Stop_DMA:00000038 $d + /tmp/cchCqftX.s:1684 .text.HAL_TIM_OC_MspInit:00000000 $t + /tmp/cchCqftX.s:1690 .text.HAL_TIM_OC_MspInit:00000000 HAL_TIM_OC_MspInit + ARM GAS /tmp/cchCqftX.s page 490 + + + /tmp/cchCqftX.s:1706 .text.HAL_TIM_OC_MspDeInit:00000000 $t + /tmp/cchCqftX.s:1712 .text.HAL_TIM_OC_MspDeInit:00000000 HAL_TIM_OC_MspDeInit + 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z>HEg>w*&r$!i@EM3;t-w{C4vEt<4RdmxaoHoWBmRi`K^%@aO7xGc29IQ#^kwd&l>E zoWGMie>oGA>)qQT{$_gq+V@HAZ-(cuPsHDrh`*(tzb){$$>ucp&!z7|&)?99zpW8} zn>>FL`lj~B^YLi;O^Ep07V-C(=a0|K?2e?*RrN!jznSot13T959r$zg@wVrW@0ME) zz5BTQzTx>>8u7Os#?D_>^LYE?JL5id&On#GOxQ*9yCLEax3q`;x_kZx4+x(3b}n7| zj`sZRiul_R@i)fv_X+%!xJ1d0zDIffUW31>2;YOhd-3P;Tj}}ZJGowf-hEv9&hh*W znw0EsJ7Mhnt&u->e4jyhuIeNw1!YTVmFI5}{O!&S()U~Foxhtrf3IRue{LkdZs_7~ zthw*>KOT$lCMWY-@Nqi+CR?=LhT?+UUJMj_VD=#XT)Yo^{-&al?8RQV`#696Ew`w@ zmOludW2V1{@aOzJ@A>P7N=>Bj_nhZ%@2cSWX!?63;_p4rUyu9n97_QV^l|BX+w-?# zP14_EuyyJCT>daz*w3g28Rin4tGEyS@h=nm3Z%2!-7fe&Zr`qj>|A&Q+^7E<*2?a~ zc=96|8a{_pZ@(-;YFc?_Nd!Instance)); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (htim->State == HAL_TIM_STATE_RESET) + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Allocate lock resource and initialize it */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Lock = HAL_UNLOCKED; + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset interrupt callbacks to legacy week callbacks */ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_ResetCallback(htim); + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (htim->HallSensor_MspInitCallback == NULL) + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->HallSensor_MspInitCallback(htim); + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_MspInit(htim); + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM state */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Configure the Time base in the Encoder Mode */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sens + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset the IC1PSC Bits */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CCMR1 |= sConfig->IC1Prescaler; + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Hall sensor interface (XOR function of the three inputs) */ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_TI1S; + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + ARM GAS /tmp/ccsFKqBV.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCFastMode = TIM_OCFAST_DISABLE; + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_OC2_SetConfig(htim->Instance, &OC_Config); + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** register to 101 */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_MMS; + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Initialize the DMA burst operation state */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Initialize the TIM channels state */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Initialize the TIM state*/ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief DeInitializes the TIM Hall Sensor interface + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Peripheral Clock */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (htim->HallSensor_MspDeInitCallback == NULL) + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* DeInit the low level hardware */ + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->HallSensor_MspDeInitCallback(htim); + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_MspDeInit(htim); + ARM GAS /tmp/ccsFKqBV.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the DMA burst operation state */ + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the TIM channels state */ + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change TIM state */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_RESET; + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Release Lock */ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Initializes the TIM Hall Sensor MSP. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief DeInitializes TIM Hall Sensor MSP. + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface. + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM channels state */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Hall sensor Interface. + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Input Capture channels 1, 2 and 3 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface in interrupt mode. + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM channels state */ + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the capture compare Interrupts 1 event */ + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Hall Sensor Interface in interrupt mode. + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Input Capture channel 1 + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the capture compare Interrupts event */ + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface in DMA mode. + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param pData The destination Buffer address. + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t + ARM GAS /tmp/ccsFKqBV.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channel state */ + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_BUSY; + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA Input Capture 1 Callbacks */ + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel for Capture 1*/ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the capture compare 1 Interrupt */ + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + ARM GAS /tmp/ccsFKqBV.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Hall Sensor Interface in DMA mode. + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Input Capture channel 1 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the capture compare Interrupts 1 event */ + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channel state */ + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Timer Complementary Output Compare functions + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Timer Complementary Output Compare functions ##### + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] + ARM GAS /tmp/ccsFKqBV.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM. + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM. + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM and enable interrupts. + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM and disable interrupts. + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM and enable DMA transfers. + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation on the complementary + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output. + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + ARM GAS /tmp/ccsFKqBV.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation on the complementary + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output. + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation in interrupt mode + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * on the complementary output. + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM OC handle + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Break interrupt */ + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccsFKqBV.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation in interrupt mode + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * on the complementary output. + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpccer; + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccsFKqBV.s page 16 + + + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Break interrupt (only if no more channel is active) */ + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpccer = htim->Instance->CCER; + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation in DMA mode + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * on the complementary output. + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param pData The source Buffer address. + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from memory to TIM peripheral + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint16_t Length) + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_BUSY; + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) + ARM GAS /tmp/ccsFKqBV.s page 17 + + + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 18 + + + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation in DMA mode +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * on the complementary output. +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + ARM GAS /tmp/ccsFKqBV.s page 19 + + +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + ARM GAS /tmp/ccsFKqBV.s page 20 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Timer Complementary PWM functions +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Timer Complementary PWM functions ##### +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary PWM. +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary PWM. +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary PWM and enable interrupts. +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary PWM and disable interrupts. +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary PWM and enable DMA transfers. +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary PWM and disable DMA transfers. +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the PWM signal generation on the complementary output. +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ + ARM GAS /tmp/ccsFKqBV.s page 21 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the PWM signal generation on the complementary output. +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the PWM signal generation in interrupt mode on the +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary output. + ARM GAS /tmp/ccsFKqBV.s page 22 + + +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Break interrupt */ +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); + ARM GAS /tmp/ccsFKqBV.s page 23 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the PWM signal generation in interrupt mode on the +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary output. +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpccer; +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 interrupt */ + ARM GAS /tmp/ccsFKqBV.s page 24 + + +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Break interrupt (only if no more channel is active) */ +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpccer = htim->Instance->CCER; +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM PWM signal generation in DMA mode on the +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary output +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param pData The source Buffer address. +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_ +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint16_t Length) + ARM GAS /tmp/ccsFKqBV.s page 25 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_BUSY; +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 26 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccsFKqBV.s page 27 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM PWM signal generation in DMA mode on the complementary +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; + ARM GAS /tmp/ccsFKqBV.s page 28 + + +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Timer Complementary One Pulse functions +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Timer Complementary One Pulse functions ##### +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse generation. +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse. +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse and enable interrupts. +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse and disable interrupts. +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM One Pulse signal generation on the complementary +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output. +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to enable +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) + ARM GAS /tmp/ccsFKqBV.s page 29 + + +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM channels state */ +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary One Pulse output channel and the Input Capture channel */ +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM One Pulse signal generation on the complementary +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output. +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to disable +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary One Pulse output channel and the Input Capture channel */ +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); + ARM GAS /tmp/ccsFKqBV.s page 30 + + +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM One Pulse signal generation in interrupt mode on the +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary channel. +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to enable +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM channels state */ +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 interrupt */ + ARM GAS /tmp/ccsFKqBV.s page 31 + + +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary One Pulse output channel and the Input Capture channel */ +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM One Pulse signal generation in interrupt mode on the +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary channel. +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to disable +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary One Pulse output channel and the Input Capture channel */ +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 32 + + +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Peripheral Control functions +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Peripheral Control functions ##### +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure the commutation event in case of use of the Hall sensor interface. +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure Output channels for OC and PWM mode. +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure Complementary channels, break features and dead time. +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure Master synchronization. +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure timer remapping capabilities. +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence. +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t CommutationSource) +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 33 + + +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Input trigger */ +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable Commutation Interrupt */ +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable Commutation DMA request */ +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence with interrupt. +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t CommutationSource) +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); + ARM GAS /tmp/ccsFKqBV.s page 34 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Input trigger */ +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable Commutation DMA request */ +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Commutation Interrupt */ +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence with DMA. +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note The user should configure the DMA in his own software, in This function only the COMDE b +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t CommutationSource) +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); + ARM GAS /tmp/ccsFKqBV.s page 35 + + +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Input trigger */ +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Commutation DMA Request */ +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA Commutation Callback */ +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable Commutation Interrupt */ +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Commutation DMA Request */ +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configures the TIM in master mode. +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle. +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * contains the selected trigger output (TRGO) and the Master/Slave +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * mode. +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** const TIM_MasterConfigTypeDef *sMasterConfi +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpcr2; +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check input state */ +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the handler state */ +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; + ARM GAS /tmp/ccsFKqBV.s page 36 + + +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Get the TIMx CR2 register value */ +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpcr2 = htim->Instance->CR2; +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Get the TIMx SMCR register value */ +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR; +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset the MMS Bits */ +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpcr2 &= ~TIM_CR2_MMS; +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the TRGO source */ +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpcr2 |= sMasterConfig->MasterOutputTrigger; +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Update TIMx CR2 */ +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 = tmpcr2; +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset the MSM Bit */ +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr &= ~TIM_SMCR_MSM; +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set master mode */ +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr |= sMasterConfig->MasterSlaveMode; +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Update TIMx SMCR */ +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR = tmpsmcr; +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the htim state */ +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * and the AOE(automatic output enable). +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * contains the BDTR Register configuration information for the TIM peripheral. +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note Interrupts can be generated when an active level is detected on the +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * break input, the break 2 input or the system break input. Break +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTim +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpbdtr = 0U; +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); + ARM GAS /tmp/ccsFKqBV.s page 37 + + +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check input state */ +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the OSSI State, the dead time value and the Automatic Output Enable Bit */ +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the BDTR bits */ +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set TIMx_BDTR */ +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->BDTR = tmpbdtr; +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configures the TIMx Remapping input capabilities. +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle. +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Remap specifies the TIM remapping source. +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * For TIM14, the parameter can have the following values: +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32 +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check parameters */ +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_REMAP(htim->Instance, Remap)); +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the Timer remapping configuration */ +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** WRITE_REG(htim->Instance->OR, Remap); +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + ARM GAS /tmp/ccsFKqBV.s page 38 + + +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Extended Callbacks functions +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Extended Callbacks functions ##### +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides Extended TIM callback functions: +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Timer Commutation callback +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Timer Break callback +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Commutation callback in non-blocking mode +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_CommutCallback could be implemented in the user file +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Commutation half complete callback in non-blocking mode +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim) +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Break detection callback in non-blocking mode +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); + ARM GAS /tmp/ccsFKqBV.s page 39 + + +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_BreakCallback could be implemented in the user file +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Extended Peripheral State functions +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Extended Peripheral State functions ##### +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This subsection permits to get in run-time the status of the peripheral +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** and the data flow. +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Return the TIM Hall Sensor interface handle state. +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor handle +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL state +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim) +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return htim->State; +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Return actual state of the TIM complementary channel. +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param ChannelN TIM Complementary channel +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval TIM Complementary channel state +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t Cha +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_state; +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN)); +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN); +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return channel_state; +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} + ARM GAS /tmp/ccsFKqBV.s page 40 + + +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Private functions ---------------------------------------------------------*/ +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Private_Functions TIM Extended Private Functions +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM DMA Commutation callback. +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the htim state */ +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->CommutationCallback(htim); +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_CommutCallback(htim); +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM DMA Commutation half complete callback. +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma) +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the htim state */ +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->CommutationHalfCpltCallback(htim); +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_CommutHalfCpltCallback(htim); +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM DMA Delay Pulse complete callback (complementary channel). +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma) +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 41 + + +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* nothing to do */ +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->PWM_PulseFinishedCallback(htim); +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM DMA error callback (complementary channel) +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma) +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccsFKqBV.s page 42 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* nothing to do */ +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->ErrorCallback(htim); +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ErrorCallback(htim); +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Enables or disables the TIM Capture Compare Channel xN. +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param TIMx to select the TIM peripheral +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel specifies the TIM Channel +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param ChannelNState specifies the TIM Channel CCxNE bit new state. +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState) +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 27 .loc 1 2350 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 .loc 1 2350 1 is_stmt 0 view .LVU1 + 32 0000 10B5 push {r4, lr} + 33 .cfi_def_cfa_offset 8 + 34 .cfi_offset 4, -8 + 35 .cfi_offset 14, -4 +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmp; + 36 .loc 1 2351 3 is_stmt 1 view .LVU2 +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmp = TIM_CCER_CC1NE << (Channel & 0xFU); /* 0xFU = 15 bits max shift */ + 37 .loc 1 2353 3 view .LVU3 + 38 .loc 1 2353 36 is_stmt 0 view .LVU4 + 39 0002 0F23 movs r3, #15 + 40 0004 1940 ands r1, r3 + 41 .LVL1: + 42 .loc 1 2353 7 view .LVU5 + ARM GAS /tmp/ccsFKqBV.s page 43 + + + 43 0006 0424 movs r4, #4 + 44 0008 8C40 lsls r4, r4, r1 + 45 .LVL2: +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset the CCxNE Bit */ +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIMx->CCER &= ~tmp; + 46 .loc 1 2356 3 is_stmt 1 view .LVU6 + 47 .loc 1 2356 7 is_stmt 0 view .LVU7 + 48 000a 036A ldr r3, [r0, #32] + 49 .loc 1 2356 14 view .LVU8 + 50 000c A343 bics r3, r4 + 51 000e 0362 str r3, [r0, #32] +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set or reset the CCxNE Bit */ +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */ + 52 .loc 1 2359 3 is_stmt 1 view .LVU9 + 53 .loc 1 2359 7 is_stmt 0 view .LVU10 + 54 0010 036A ldr r3, [r0, #32] + 55 .loc 1 2359 42 view .LVU11 + 56 0012 8A40 lsls r2, r2, r1 + 57 .LVL3: + 58 .loc 1 2359 14 view .LVU12 + 59 0014 1343 orrs r3, r2 + 60 0016 0362 str r3, [r0, #32] +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 61 .loc 1 2360 1 view .LVU13 + 62 @ sp needed + 63 .LVL4: + 64 .loc 1 2360 1 view .LVU14 + 65 0018 10BD pop {r4, pc} + 66 .cfi_endproc + 67 .LFE81: + 69 .section .text.TIM_DMAErrorCCxN,"ax",%progbits + 70 .align 1 + 71 .syntax unified + 72 .code 16 + 73 .thumb_func + 75 TIM_DMAErrorCCxN: + 76 .LVL5: + 77 .LFB80: +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 78 .loc 1 2305 1 is_stmt 1 view -0 + 79 .cfi_startproc + 80 @ args = 0, pretend = 0, frame = 0 + 81 @ frame_needed = 0, uses_anonymous_args = 0 +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 82 .loc 1 2305 1 is_stmt 0 view .LVU16 + 83 0000 10B5 push {r4, lr} + 84 .cfi_def_cfa_offset 8 + 85 .cfi_offset 4, -8 + 86 .cfi_offset 14, -4 +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 87 .loc 1 2306 3 is_stmt 1 view .LVU17 +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 88 .loc 1 2306 22 is_stmt 0 view .LVU18 + 89 0002 446A ldr r4, [r0, #36] + 90 .LVL6: + ARM GAS /tmp/ccsFKqBV.s page 44 + + +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 91 .loc 1 2308 3 is_stmt 1 view .LVU19 +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 92 .loc 1 2308 25 is_stmt 0 view .LVU20 + 93 0004 636A ldr r3, [r4, #36] +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 94 .loc 1 2308 6 view .LVU21 + 95 0006 8342 cmp r3, r0 + 96 0008 0BD0 beq .L6 +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 97 .loc 1 2313 8 is_stmt 1 view .LVU22 +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 98 .loc 1 2313 30 is_stmt 0 view .LVU23 + 99 000a A36A ldr r3, [r4, #40] +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 100 .loc 1 2313 11 view .LVU24 + 101 000c 8342 cmp r3, r0 + 102 000e 0DD0 beq .L7 +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 103 .loc 1 2318 8 is_stmt 1 view .LVU25 +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 104 .loc 1 2318 30 is_stmt 0 view .LVU26 + 105 0010 E36A ldr r3, [r4, #44] +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 106 .loc 1 2318 11 view .LVU27 + 107 0012 8342 cmp r3, r0 + 108 0014 10D0 beq .L8 + 109 .L4: +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 110 .loc 1 2326 3 is_stmt 1 view .LVU28 +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 111 .loc 1 2331 3 view .LVU29 + 112 0016 2000 movs r0, r4 + 113 .LVL7: +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 114 .loc 1 2331 3 is_stmt 0 view .LVU30 + 115 0018 FFF7FEFF bl HAL_TIM_ErrorCallback + 116 .LVL8: +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 117 .loc 1 2334 3 is_stmt 1 view .LVU31 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 118 .loc 1 2334 17 is_stmt 0 view .LVU32 + 119 001c 0023 movs r3, #0 + 120 001e 2377 strb r3, [r4, #28] +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 121 .loc 1 2335 1 view .LVU33 + 122 @ sp needed + 123 .LVL9: +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 124 .loc 1 2335 1 view .LVU34 + 125 0020 10BD pop {r4, pc} + 126 .LVL10: + 127 .L6: +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 128 .loc 1 2310 5 is_stmt 1 view .LVU35 +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 129 .loc 1 2310 19 is_stmt 0 view .LVU36 + ARM GAS /tmp/ccsFKqBV.s page 45 + + + 130 0022 0123 movs r3, #1 + 131 0024 2377 strb r3, [r4, #28] +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 132 .loc 1 2311 5 is_stmt 1 view .LVU37 + 133 0026 4222 movs r2, #66 + 134 0028 A354 strb r3, [r4, r2] + 135 002a F4E7 b .L4 + 136 .L7: +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 137 .loc 1 2315 5 view .LVU38 +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 138 .loc 1 2315 19 is_stmt 0 view .LVU39 + 139 002c 0223 movs r3, #2 + 140 002e 2377 strb r3, [r4, #28] +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 141 .loc 1 2316 5 is_stmt 1 view .LVU40 + 142 0030 4133 adds r3, r3, #65 + 143 0032 0122 movs r2, #1 + 144 0034 E254 strb r2, [r4, r3] + 145 0036 EEE7 b .L4 + 146 .L8: +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 147 .loc 1 2320 5 view .LVU41 +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 148 .loc 1 2320 19 is_stmt 0 view .LVU42 + 149 0038 0423 movs r3, #4 + 150 003a 2377 strb r3, [r4, #28] +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 151 .loc 1 2321 5 is_stmt 1 view .LVU43 + 152 003c 4033 adds r3, r3, #64 + 153 003e 0122 movs r2, #1 + 154 0040 E254 strb r2, [r4, r3] + 155 0042 E8E7 b .L4 + 156 .cfi_endproc + 157 .LFE80: + 159 .section .text.TIM_DMADelayPulseNCplt,"ax",%progbits + 160 .align 1 + 161 .syntax unified + 162 .code 16 + 163 .thumb_func + 165 TIM_DMADelayPulseNCplt: + 166 .LVL11: + 167 .LFB79: +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 168 .loc 1 2255 1 view -0 + 169 .cfi_startproc + 170 @ args = 0, pretend = 0, frame = 0 + 171 @ frame_needed = 0, uses_anonymous_args = 0 +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 172 .loc 1 2255 1 is_stmt 0 view .LVU45 + 173 0000 10B5 push {r4, lr} + 174 .cfi_def_cfa_offset 8 + 175 .cfi_offset 4, -8 + 176 .cfi_offset 14, -4 +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 177 .loc 1 2256 3 is_stmt 1 view .LVU46 +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 46 + + + 178 .loc 1 2256 22 is_stmt 0 view .LVU47 + 179 0002 446A ldr r4, [r0, #36] + 180 .LVL12: +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 181 .loc 1 2258 3 is_stmt 1 view .LVU48 +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 182 .loc 1 2258 25 is_stmt 0 view .LVU49 + 183 0004 636A ldr r3, [r4, #36] +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 184 .loc 1 2258 6 view .LVU50 + 185 0006 8342 cmp r3, r0 + 186 0008 0BD0 beq .L13 +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 187 .loc 1 2267 8 is_stmt 1 view .LVU51 +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 188 .loc 1 2267 30 is_stmt 0 view .LVU52 + 189 000a A36A ldr r3, [r4, #40] +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 190 .loc 1 2267 11 view .LVU53 + 191 000c 8342 cmp r3, r0 + 192 000e 11D0 beq .L14 +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 193 .loc 1 2276 8 is_stmt 1 view .LVU54 +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 194 .loc 1 2276 30 is_stmt 0 view .LVU55 + 195 0010 E36A ldr r3, [r4, #44] +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 196 .loc 1 2276 11 view .LVU56 + 197 0012 8342 cmp r3, r0 + 198 0014 17D0 beq .L15 + 199 .L11: +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 200 .loc 1 2288 3 is_stmt 1 view .LVU57 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 201 .loc 1 2293 3 view .LVU58 + 202 0016 2000 movs r0, r4 + 203 .LVL13: +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 204 .loc 1 2293 3 is_stmt 0 view .LVU59 + 205 0018 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 206 .LVL14: +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 207 .loc 1 2296 3 is_stmt 1 view .LVU60 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 208 .loc 1 2296 17 is_stmt 0 view .LVU61 + 209 001c 0023 movs r3, #0 + 210 001e 2377 strb r3, [r4, #28] +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 211 .loc 1 2297 1 view .LVU62 + 212 @ sp needed + 213 .LVL15: +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 214 .loc 1 2297 1 view .LVU63 + 215 0020 10BD pop {r4, pc} + 216 .LVL16: + 217 .L13: +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 47 + + + 218 .loc 1 2260 5 is_stmt 1 view .LVU64 +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 219 .loc 1 2260 19 is_stmt 0 view .LVU65 + 220 0022 0123 movs r3, #1 + 221 0024 2377 strb r3, [r4, #28] +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 222 .loc 1 2262 5 is_stmt 1 view .LVU66 +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 223 .loc 1 2262 19 is_stmt 0 view .LVU67 + 224 0026 8369 ldr r3, [r0, #24] +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 225 .loc 1 2262 8 view .LVU68 + 226 0028 002B cmp r3, #0 + 227 002a F4D1 bne .L11 +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 228 .loc 1 2264 7 is_stmt 1 view .LVU69 + 229 002c 4233 adds r3, r3, #66 + 230 002e 0122 movs r2, #1 + 231 0030 E254 strb r2, [r4, r3] + 232 0032 F0E7 b .L11 + 233 .L14: +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 234 .loc 1 2269 5 view .LVU70 +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 235 .loc 1 2269 19 is_stmt 0 view .LVU71 + 236 0034 0223 movs r3, #2 + 237 0036 2377 strb r3, [r4, #28] +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 238 .loc 1 2271 5 is_stmt 1 view .LVU72 +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 239 .loc 1 2271 19 is_stmt 0 view .LVU73 + 240 0038 8369 ldr r3, [r0, #24] +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 241 .loc 1 2271 8 view .LVU74 + 242 003a 002B cmp r3, #0 + 243 003c EBD1 bne .L11 +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 244 .loc 1 2273 7 is_stmt 1 view .LVU75 + 245 003e 4333 adds r3, r3, #67 + 246 0040 0122 movs r2, #1 + 247 0042 E254 strb r2, [r4, r3] + 248 0044 E7E7 b .L11 + 249 .L15: +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 250 .loc 1 2278 5 view .LVU76 +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 251 .loc 1 2278 19 is_stmt 0 view .LVU77 + 252 0046 0423 movs r3, #4 + 253 0048 2377 strb r3, [r4, #28] +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 254 .loc 1 2280 5 is_stmt 1 view .LVU78 +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 255 .loc 1 2280 19 is_stmt 0 view .LVU79 + 256 004a 8369 ldr r3, [r0, #24] +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 257 .loc 1 2280 8 view .LVU80 + 258 004c 002B cmp r3, #0 + ARM GAS /tmp/ccsFKqBV.s page 48 + + + 259 004e E2D1 bne .L11 +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 260 .loc 1 2282 7 is_stmt 1 view .LVU81 + 261 0050 4433 adds r3, r3, #68 + 262 0052 0122 movs r2, #1 + 263 0054 E254 strb r2, [r4, r3] + 264 0056 DEE7 b .L11 + 265 .cfi_endproc + 266 .LFE79: + 268 .section .text.HAL_TIMEx_HallSensor_MspInit,"ax",%progbits + 269 .align 1 + 270 .weak HAL_TIMEx_HallSensor_MspInit + 271 .syntax unified + 272 .code 16 + 273 .thumb_func + 275 HAL_TIMEx_HallSensor_MspInit: + 276 .LVL17: + 277 .LFB42: + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 278 .loc 1 287 1 view -0 + 279 .cfi_startproc + 280 @ args = 0, pretend = 0, frame = 0 + 281 @ frame_needed = 0, uses_anonymous_args = 0 + 282 @ link register save eliminated. + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 283 .loc 1 289 3 view .LVU83 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 284 .loc 1 294 1 is_stmt 0 view .LVU84 + 285 @ sp needed + 286 0000 7047 bx lr + 287 .cfi_endproc + 288 .LFE42: + 290 .section .text.HAL_TIMEx_HallSensor_Init,"ax",%progbits + 291 .align 1 + 292 .global HAL_TIMEx_HallSensor_Init + 293 .syntax unified + 294 .code 16 + 295 .thumb_func + 297 HAL_TIMEx_HallSensor_Init: + 298 .LVL18: + 299 .LFB40: + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_OC_InitTypeDef OC_Config; + 300 .loc 1 140 1 is_stmt 1 view -0 + 301 .cfi_startproc + 302 @ args = 0, pretend = 0, frame = 32 + 303 @ frame_needed = 0, uses_anonymous_args = 0 + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_OC_InitTypeDef OC_Config; + 304 .loc 1 140 1 is_stmt 0 view .LVU86 + 305 0000 F0B5 push {r4, r5, r6, r7, lr} + 306 .cfi_def_cfa_offset 20 + 307 .cfi_offset 4, -20 + 308 .cfi_offset 5, -16 + 309 .cfi_offset 6, -12 + 310 .cfi_offset 7, -8 + 311 .cfi_offset 14, -4 + 312 0002 89B0 sub sp, sp, #36 + 313 .cfi_def_cfa_offset 56 + ARM GAS /tmp/ccsFKqBV.s page 49 + + + 314 0004 0400 movs r4, r0 + 315 0006 0D00 movs r5, r1 + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 316 .loc 1 141 3 is_stmt 1 view .LVU87 + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 317 .loc 1 144 3 view .LVU88 + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 318 .loc 1 144 6 is_stmt 0 view .LVU89 + 319 0008 0028 cmp r0, #0 + 320 000a 5ED0 beq .L20 + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 321 .loc 1 150 3 is_stmt 1 view .LVU90 + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 322 .loc 1 151 3 view .LVU91 + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 323 .loc 1 152 3 view .LVU92 + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); + 324 .loc 1 153 3 view .LVU93 + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 325 .loc 1 154 3 view .LVU94 + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 326 .loc 1 155 3 view .LVU95 + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 327 .loc 1 156 3 view .LVU96 + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 328 .loc 1 157 3 view .LVU97 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 329 .loc 1 159 3 view .LVU98 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 330 .loc 1 159 11 is_stmt 0 view .LVU99 + 331 000c 3D23 movs r3, #61 + 332 000e C35C ldrb r3, [r0, r3] + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 333 .loc 1 159 6 view .LVU100 + 334 0010 002B cmp r3, #0 + 335 0012 54D0 beq .L21 + 336 .LVL19: + 337 .L19: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 338 .loc 1 181 3 is_stmt 1 view .LVU101 + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 339 .loc 1 181 15 is_stmt 0 view .LVU102 + 340 0014 3D26 movs r6, #61 + 341 0016 0223 movs r3, #2 + 342 0018 A355 strb r3, [r4, r6] + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 343 .loc 1 184 3 is_stmt 1 view .LVU103 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 344 .loc 1 184 38 is_stmt 0 view .LVU104 + 345 001a 2100 movs r1, r4 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 346 .loc 1 184 3 view .LVU105 + 347 001c 01C9 ldmia r1!, {r0} + 348 001e FFF7FEFF bl TIM_Base_SetConfig + 349 .LVL20: + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 350 .loc 1 187 3 is_stmt 1 view .LVU106 + ARM GAS /tmp/ccsFKqBV.s page 50 + + + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 351 .loc 1 187 44 is_stmt 0 view .LVU107 + 352 0022 2968 ldr r1, [r5] + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 353 .loc 1 187 87 view .LVU108 + 354 0024 AB68 ldr r3, [r5, #8] + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 355 .loc 1 187 3 view .LVU109 + 356 0026 2068 ldr r0, [r4] + 357 0028 0322 movs r2, #3 + 358 002a FFF7FEFF bl TIM_TI1_SetConfig + 359 .LVL21: + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 360 .loc 1 190 3 is_stmt 1 view .LVU110 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 361 .loc 1 190 7 is_stmt 0 view .LVU111 + 362 002e 2268 ldr r2, [r4] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 363 .loc 1 190 17 view .LVU112 + 364 0030 9369 ldr r3, [r2, #24] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 365 .loc 1 190 25 view .LVU113 + 366 0032 0C21 movs r1, #12 + 367 0034 8B43 bics r3, r1 + 368 0036 9361 str r3, [r2, #24] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 369 .loc 1 192 3 is_stmt 1 view .LVU114 + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 370 .loc 1 192 7 is_stmt 0 view .LVU115 + 371 0038 2268 ldr r2, [r4] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 372 .loc 1 192 17 view .LVU116 + 373 003a 9369 ldr r3, [r2, #24] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 374 .loc 1 192 35 view .LVU117 + 375 003c 6968 ldr r1, [r5, #4] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 376 .loc 1 192 25 view .LVU118 + 377 003e 0B43 orrs r3, r1 + 378 0040 9361 str r3, [r2, #24] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 379 .loc 1 195 3 is_stmt 1 view .LVU119 + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 380 .loc 1 195 7 is_stmt 0 view .LVU120 + 381 0042 2268 ldr r2, [r4] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 382 .loc 1 195 17 view .LVU121 + 383 0044 5368 ldr r3, [r2, #4] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 384 .loc 1 195 23 view .LVU122 + 385 0046 8021 movs r1, #128 + 386 0048 0B43 orrs r3, r1 + 387 004a 5360 str r3, [r2, #4] + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 388 .loc 1 198 3 is_stmt 1 view .LVU123 + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 389 .loc 1 198 7 is_stmt 0 view .LVU124 + ARM GAS /tmp/ccsFKqBV.s page 51 + + + 390 004c 2268 ldr r2, [r4] + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 391 .loc 1 198 17 view .LVU125 + 392 004e 9368 ldr r3, [r2, #8] + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 393 .loc 1 198 24 view .LVU126 + 394 0050 7027 movs r7, #112 + 395 0052 BB43 bics r3, r7 + 396 0054 9360 str r3, [r2, #8] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 397 .loc 1 199 3 is_stmt 1 view .LVU127 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 398 .loc 1 199 7 is_stmt 0 view .LVU128 + 399 0056 2268 ldr r2, [r4] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 400 .loc 1 199 17 view .LVU129 + 401 0058 9368 ldr r3, [r2, #8] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 402 .loc 1 199 24 view .LVU130 + 403 005a 4039 subs r1, r1, #64 + 404 005c 0B43 orrs r3, r1 + 405 005e 9360 str r3, [r2, #8] + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 406 .loc 1 202 3 is_stmt 1 view .LVU131 + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 407 .loc 1 202 7 is_stmt 0 view .LVU132 + 408 0060 2268 ldr r2, [r4] + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 409 .loc 1 202 17 view .LVU133 + 410 0062 9368 ldr r3, [r2, #8] + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 411 .loc 1 202 24 view .LVU134 + 412 0064 3939 subs r1, r1, #57 + 413 0066 8B43 bics r3, r1 + 414 0068 9360 str r3, [r2, #8] + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 415 .loc 1 203 3 is_stmt 1 view .LVU135 + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 416 .loc 1 203 7 is_stmt 0 view .LVU136 + 417 006a 2268 ldr r2, [r4] + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 418 .loc 1 203 17 view .LVU137 + 419 006c 9368 ldr r3, [r2, #8] + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 420 .loc 1 203 24 view .LVU138 + 421 006e 0339 subs r1, r1, #3 + 422 0070 0B43 orrs r3, r1 + 423 0072 9360 str r3, [r2, #8] + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + 424 .loc 1 206 3 is_stmt 1 view .LVU139 + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + 425 .loc 1 206 24 is_stmt 0 view .LVU140 + 426 0074 0023 movs r3, #0 + 427 0076 0593 str r3, [sp, #20] + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + 428 .loc 1 207 3 is_stmt 1 view .LVU141 + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + ARM GAS /tmp/ccsFKqBV.s page 52 + + + 429 .loc 1 207 25 is_stmt 0 view .LVU142 + 430 0078 0693 str r3, [sp, #24] + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 431 .loc 1 208 3 is_stmt 1 view .LVU143 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 432 .loc 1 208 20 is_stmt 0 view .LVU144 + 433 007a 0197 str r7, [sp, #4] + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 434 .loc 1 209 3 is_stmt 1 view .LVU145 + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 435 .loc 1 209 26 is_stmt 0 view .LVU146 + 436 007c 0793 str r3, [sp, #28] + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 437 .loc 1 210 3 is_stmt 1 view .LVU147 + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 438 .loc 1 210 25 is_stmt 0 view .LVU148 + 439 007e 0493 str r3, [sp, #16] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 440 .loc 1 211 3 is_stmt 1 view .LVU149 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 441 .loc 1 211 24 is_stmt 0 view .LVU150 + 442 0080 0393 str r3, [sp, #12] + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 443 .loc 1 212 3 is_stmt 1 view .LVU151 + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 444 .loc 1 212 28 is_stmt 0 view .LVU152 + 445 0082 EB68 ldr r3, [r5, #12] + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 446 .loc 1 212 19 view .LVU153 + 447 0084 0293 str r3, [sp, #8] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 448 .loc 1 214 3 is_stmt 1 view .LVU154 + 449 0086 2068 ldr r0, [r4] + 450 0088 01A9 add r1, sp, #4 + 451 008a FFF7FEFF bl TIM_OC2_SetConfig + 452 .LVL22: + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 453 .loc 1 218 3 view .LVU155 + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 454 .loc 1 218 7 is_stmt 0 view .LVU156 + 455 008e 2268 ldr r2, [r4] + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 456 .loc 1 218 17 view .LVU157 + 457 0090 5368 ldr r3, [r2, #4] + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 458 .loc 1 218 23 view .LVU158 + 459 0092 BB43 bics r3, r7 + 460 0094 5360 str r3, [r2, #4] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 461 .loc 1 219 3 is_stmt 1 view .LVU159 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 462 .loc 1 219 7 is_stmt 0 view .LVU160 + 463 0096 2268 ldr r2, [r4] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 464 .loc 1 219 17 view .LVU161 + 465 0098 5368 ldr r3, [r2, #4] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 53 + + + 466 .loc 1 219 23 view .LVU162 + 467 009a 5021 movs r1, #80 + 468 009c 0B43 orrs r3, r1 + 469 009e 5360 str r3, [r2, #4] + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 470 .loc 1 222 3 is_stmt 1 view .LVU163 + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 471 .loc 1 222 23 is_stmt 0 view .LVU164 + 472 00a0 0123 movs r3, #1 + 473 00a2 4622 movs r2, #70 + 474 00a4 A354 strb r3, [r4, r2] + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 475 .loc 1 225 3 is_stmt 1 view .LVU165 + 476 00a6 083A subs r2, r2, #8 + 477 00a8 A354 strb r3, [r4, r2] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 478 .loc 1 226 3 view .LVU166 + 479 00aa 0132 adds r2, r2, #1 + 480 00ac A354 strb r3, [r4, r2] + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 481 .loc 1 227 3 view .LVU167 + 482 00ae 0332 adds r2, r2, #3 + 483 00b0 A354 strb r3, [r4, r2] + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 484 .loc 1 228 3 view .LVU168 + 485 00b2 0132 adds r2, r2, #1 + 486 00b4 A354 strb r3, [r4, r2] + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 487 .loc 1 231 3 view .LVU169 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 488 .loc 1 231 15 is_stmt 0 view .LVU170 + 489 00b6 A355 strb r3, [r4, r6] + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 490 .loc 1 233 3 is_stmt 1 view .LVU171 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 491 .loc 1 233 10 is_stmt 0 view .LVU172 + 492 00b8 0020 movs r0, #0 + 493 .L18: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 494 .loc 1 234 1 view .LVU173 + 495 00ba 09B0 add sp, sp, #36 + 496 @ sp needed + 497 .LVL23: + 498 .LVL24: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 499 .loc 1 234 1 view .LVU174 + 500 00bc F0BD pop {r4, r5, r6, r7, pc} + 501 .LVL25: + 502 .L21: + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 503 .loc 1 162 5 is_stmt 1 view .LVU175 + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 504 .loc 1 162 16 is_stmt 0 view .LVU176 + 505 00be 3C33 adds r3, r3, #60 + 506 00c0 0022 movs r2, #0 + 507 00c2 C254 strb r2, [r0, r3] + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + ARM GAS /tmp/ccsFKqBV.s page 54 + + + 508 .loc 1 176 5 is_stmt 1 view .LVU177 + 509 00c4 FFF7FEFF bl HAL_TIMEx_HallSensor_MspInit + 510 .LVL26: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 511 .loc 1 176 5 is_stmt 0 view .LVU178 + 512 00c8 A4E7 b .L19 + 513 .LVL27: + 514 .L20: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 515 .loc 1 146 12 view .LVU179 + 516 00ca 0120 movs r0, #1 + 517 .LVL28: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 518 .loc 1 146 12 view .LVU180 + 519 00cc F5E7 b .L18 + 520 .cfi_endproc + 521 .LFE40: + 523 .section .text.HAL_TIMEx_HallSensor_MspDeInit,"ax",%progbits + 524 .align 1 + 525 .weak HAL_TIMEx_HallSensor_MspDeInit + 526 .syntax unified + 527 .code 16 + 528 .thumb_func + 530 HAL_TIMEx_HallSensor_MspDeInit: + 531 .LVL29: + 532 .LFB43: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 533 .loc 1 302 1 is_stmt 1 view -0 + 534 .cfi_startproc + 535 @ args = 0, pretend = 0, frame = 0 + 536 @ frame_needed = 0, uses_anonymous_args = 0 + 537 @ link register save eliminated. + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 538 .loc 1 304 3 view .LVU182 + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 539 .loc 1 309 1 is_stmt 0 view .LVU183 + 540 @ sp needed + 541 0000 7047 bx lr + 542 .cfi_endproc + 543 .LFE43: + 545 .section .text.HAL_TIMEx_HallSensor_DeInit,"ax",%progbits + 546 .align 1 + 547 .global HAL_TIMEx_HallSensor_DeInit + 548 .syntax unified + 549 .code 16 + 550 .thumb_func + 552 HAL_TIMEx_HallSensor_DeInit: + 553 .LVL30: + 554 .LFB41: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 555 .loc 1 242 1 is_stmt 1 view -0 + 556 .cfi_startproc + 557 @ args = 0, pretend = 0, frame = 0 + 558 @ frame_needed = 0, uses_anonymous_args = 0 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 559 .loc 1 242 1 is_stmt 0 view .LVU185 + 560 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccsFKqBV.s page 55 + + + 561 .cfi_def_cfa_offset 8 + 562 .cfi_offset 4, -8 + 563 .cfi_offset 14, -4 + 564 0002 0400 movs r4, r0 + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 565 .loc 1 244 3 is_stmt 1 view .LVU186 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 566 .loc 1 246 3 view .LVU187 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 567 .loc 1 246 15 is_stmt 0 view .LVU188 + 568 0004 3D23 movs r3, #61 + 569 0006 0222 movs r2, #2 + 570 0008 C254 strb r2, [r0, r3] + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 571 .loc 1 249 3 is_stmt 1 view .LVU189 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 572 .loc 1 249 3 view .LVU190 + 573 000a 0368 ldr r3, [r0] + 574 000c 196A ldr r1, [r3, #32] + 575 000e 0F4A ldr r2, .L25 + 576 0010 1142 tst r1, r2 + 577 0012 07D1 bne .L24 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 578 .loc 1 249 3 discriminator 1 view .LVU191 + 579 0014 196A ldr r1, [r3, #32] + 580 0016 0E4A ldr r2, .L25+4 + 581 0018 1142 tst r1, r2 + 582 001a 03D1 bne .L24 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 583 .loc 1 249 3 discriminator 3 view .LVU192 + 584 001c 1A68 ldr r2, [r3] + 585 001e 0121 movs r1, #1 + 586 0020 8A43 bics r2, r1 + 587 0022 1A60 str r2, [r3] + 588 .L24: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 589 .loc 1 249 3 discriminator 5 view .LVU193 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 590 .loc 1 260 3 view .LVU194 + 591 0024 2000 movs r0, r4 + 592 .LVL31: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 593 .loc 1 260 3 is_stmt 0 view .LVU195 + 594 0026 FFF7FEFF bl HAL_TIMEx_HallSensor_MspDeInit + 595 .LVL32: + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 596 .loc 1 264 3 is_stmt 1 view .LVU196 + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 597 .loc 1 264 23 is_stmt 0 view .LVU197 + 598 002a 0023 movs r3, #0 + 599 002c 4622 movs r2, #70 + 600 002e A354 strb r3, [r4, r2] + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 601 .loc 1 267 3 is_stmt 1 view .LVU198 + 602 0030 083A subs r2, r2, #8 + 603 0032 A354 strb r3, [r4, r2] + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + ARM GAS /tmp/ccsFKqBV.s page 56 + + + 604 .loc 1 268 3 view .LVU199 + 605 0034 0132 adds r2, r2, #1 + 606 0036 A354 strb r3, [r4, r2] + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 607 .loc 1 269 3 view .LVU200 + 608 0038 0332 adds r2, r2, #3 + 609 003a A354 strb r3, [r4, r2] + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 610 .loc 1 270 3 view .LVU201 + 611 003c 0132 adds r2, r2, #1 + 612 003e A354 strb r3, [r4, r2] + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 613 .loc 1 273 3 view .LVU202 + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 614 .loc 1 273 15 is_stmt 0 view .LVU203 + 615 0040 063A subs r2, r2, #6 + 616 0042 A354 strb r3, [r4, r2] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 617 .loc 1 276 3 is_stmt 1 view .LVU204 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 618 .loc 1 276 3 view .LVU205 + 619 0044 013A subs r2, r2, #1 + 620 0046 A354 strb r3, [r4, r2] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 621 .loc 1 276 3 view .LVU206 + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 622 .loc 1 278 3 view .LVU207 + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 623 .loc 1 279 1 is_stmt 0 view .LVU208 + 624 0048 0020 movs r0, #0 + 625 @ sp needed + 626 .LVL33: + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 627 .loc 1 279 1 view .LVU209 + 628 004a 10BD pop {r4, pc} + 629 .L26: + 630 .align 2 + 631 .L25: + 632 004c 11110000 .word 4369 + 633 0050 44040000 .word 1092 + 634 .cfi_endproc + 635 .LFE41: + 637 .section .text.HAL_TIMEx_HallSensor_Start,"ax",%progbits + 638 .align 1 + 639 .global HAL_TIMEx_HallSensor_Start + 640 .syntax unified + 641 .code 16 + 642 .thumb_func + 644 HAL_TIMEx_HallSensor_Start: + 645 .LVL34: + 646 .LFB44: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 647 .loc 1 317 1 is_stmt 1 view -0 + 648 .cfi_startproc + 649 @ args = 0, pretend = 0, frame = 0 + 650 @ frame_needed = 0, uses_anonymous_args = 0 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + ARM GAS /tmp/ccsFKqBV.s page 57 + + + 651 .loc 1 317 1 is_stmt 0 view .LVU211 + 652 0000 70B5 push {r4, r5, r6, lr} + 653 .cfi_def_cfa_offset 16 + 654 .cfi_offset 4, -16 + 655 .cfi_offset 5, -12 + 656 .cfi_offset 6, -8 + 657 .cfi_offset 14, -4 + 658 0002 0400 movs r4, r0 + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 659 .loc 1 318 3 is_stmt 1 view .LVU212 + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 660 .loc 1 319 3 view .LVU213 + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 661 .loc 1 319 31 is_stmt 0 view .LVU214 + 662 0004 3E23 movs r3, #62 + 663 0006 C55C ldrb r5, [r0, r3] + 664 0008 E8B2 uxtb r0, r5 + 665 .LVL35: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 666 .loc 1 320 3 is_stmt 1 view .LVU215 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 667 .loc 1 320 31 is_stmt 0 view .LVU216 + 668 000a 0133 adds r3, r3, #1 + 669 000c E35C ldrb r3, [r4, r3] + 670 000e DBB2 uxtb r3, r3 + 671 .LVL36: + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 672 .loc 1 321 3 is_stmt 1 view .LVU217 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 673 .loc 1 321 31 is_stmt 0 view .LVU218 + 674 0010 4222 movs r2, #66 + 675 0012 A25C ldrb r2, [r4, r2] + 676 0014 D2B2 uxtb r2, r2 + 677 .LVL37: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 678 .loc 1 322 3 is_stmt 1 view .LVU219 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 679 .loc 1 322 31 is_stmt 0 view .LVU220 + 680 0016 4321 movs r1, #67 + 681 0018 615C ldrb r1, [r4, r1] + 682 001a C9B2 uxtb r1, r1 + 683 .LVL38: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 684 .loc 1 325 3 is_stmt 1 view .LVU221 + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 685 .loc 1 328 3 view .LVU222 + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 686 .loc 1 328 6 is_stmt 0 view .LVU223 + 687 001c 012D cmp r5, #1 + 688 001e 31D1 bne .L31 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 689 .loc 1 329 7 view .LVU224 + 690 0020 012B cmp r3, #1 + 691 0022 30D1 bne .L28 + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 692 .loc 1 330 7 view .LVU225 + 693 0024 012A cmp r2, #1 + ARM GAS /tmp/ccsFKqBV.s page 58 + + + 694 0026 2FD1 bne .L32 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 695 .loc 1 331 7 view .LVU226 + 696 0028 0129 cmp r1, #1 + 697 002a 01D0 beq .L35 + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 698 .loc 1 333 12 view .LVU227 + 699 002c 1000 movs r0, r2 + 700 .LVL39: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 701 .loc 1 333 12 view .LVU228 + 702 002e 2AE0 b .L28 + 703 .LVL40: + 704 .L35: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 705 .loc 1 337 3 is_stmt 1 view .LVU229 + 706 0030 0133 adds r3, r3, #1 + 707 .LVL41: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 708 .loc 1 337 3 is_stmt 0 view .LVU230 + 709 0032 3D32 adds r2, r2, #61 + 710 .LVL42: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 711 .loc 1 337 3 view .LVU231 + 712 0034 A354 strb r3, [r4, r2] + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 713 .loc 1 338 3 is_stmt 1 view .LVU232 + 714 0036 0132 adds r2, r2, #1 + 715 .LVL43: + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 716 .loc 1 338 3 is_stmt 0 view .LVU233 + 717 0038 A354 strb r3, [r4, r2] + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 718 .loc 1 339 3 is_stmt 1 view .LVU234 + 719 003a 0332 adds r2, r2, #3 + 720 .LVL44: + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 721 .loc 1 339 3 is_stmt 0 view .LVU235 + 722 003c A354 strb r3, [r4, r2] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 723 .loc 1 340 3 is_stmt 1 view .LVU236 + 724 003e 0132 adds r2, r2, #1 + 725 .LVL45: + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 726 .loc 1 340 3 is_stmt 0 view .LVU237 + 727 0040 A354 strb r3, [r4, r2] + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 728 .loc 1 345 3 is_stmt 1 view .LVU238 + 729 0042 2068 ldr r0, [r4] + 730 .LVL46: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 731 .loc 1 345 3 is_stmt 0 view .LVU239 + 732 0044 423A subs r2, r2, #66 + 733 .LVL47: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 734 .loc 1 345 3 view .LVU240 + 735 0046 0021 movs r1, #0 + ARM GAS /tmp/ccsFKqBV.s page 59 + + + 736 .LVL48: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 737 .loc 1 345 3 view .LVU241 + 738 0048 FFF7FEFF bl TIM_CCxChannelCmd + 739 .LVL49: + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 740 .loc 1 348 3 is_stmt 1 view .LVU242 + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 741 .loc 1 348 7 is_stmt 0 view .LVU243 + 742 004c 2368 ldr r3, [r4] + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 743 .loc 1 348 6 view .LVU244 + 744 004e 104A ldr r2, .L36 + 745 0050 9342 cmp r3, r2 + 746 0052 0CD0 beq .L29 + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 747 .loc 1 348 7 discriminator 1 view .LVU245 + 748 0054 8022 movs r2, #128 + 749 0056 D205 lsls r2, r2, #23 + 750 0058 9342 cmp r3, r2 + 751 005a 08D0 beq .L29 + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 752 .loc 1 348 7 discriminator 2 view .LVU246 + 753 005c 0D4A ldr r2, .L36+4 + 754 005e 9342 cmp r3, r2 + 755 0060 05D0 beq .L29 + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 756 .loc 1 358 5 is_stmt 1 view .LVU247 + 757 0062 1A68 ldr r2, [r3] + 758 0064 0121 movs r1, #1 + 759 0066 0A43 orrs r2, r1 + 760 0068 1A60 str r2, [r3] + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 761 .loc 1 362 10 is_stmt 0 view .LVU248 + 762 006a 0020 movs r0, #0 + 763 006c 0BE0 b .L28 + 764 .L29: + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 765 .loc 1 350 5 is_stmt 1 view .LVU249 + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 766 .loc 1 350 29 is_stmt 0 view .LVU250 + 767 006e 9968 ldr r1, [r3, #8] + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 768 .loc 1 350 13 view .LVU251 + 769 0070 0722 movs r2, #7 + 770 0072 0A40 ands r2, r1 + 771 .LVL50: + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 772 .loc 1 351 5 is_stmt 1 view .LVU252 + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 773 .loc 1 351 8 is_stmt 0 view .LVU253 + 774 0074 062A cmp r2, #6 + 775 0076 09D0 beq .L34 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 776 .loc 1 353 7 is_stmt 1 view .LVU254 + 777 0078 1A68 ldr r2, [r3] + 778 .LVL51: + ARM GAS /tmp/ccsFKqBV.s page 60 + + + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 779 .loc 1 353 7 is_stmt 0 view .LVU255 + 780 007a 0121 movs r1, #1 + 781 .LVL52: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 782 .loc 1 353 7 view .LVU256 + 783 007c 0A43 orrs r2, r1 + 784 007e 1A60 str r2, [r3] + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 785 .loc 1 362 10 view .LVU257 + 786 0080 0020 movs r0, #0 + 787 0082 00E0 b .L28 + 788 .LVL53: + 789 .L31: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 790 .loc 1 333 12 view .LVU258 + 791 0084 0120 movs r0, #1 + 792 .LVL54: + 793 .L28: + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 794 .loc 1 363 1 view .LVU259 + 795 @ sp needed + 796 .LVL55: + 797 .LVL56: + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 798 .loc 1 363 1 view .LVU260 + 799 0086 70BD pop {r4, r5, r6, pc} + 800 .LVL57: + 801 .L32: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 802 .loc 1 333 12 view .LVU261 + 803 0088 1800 movs r0, r3 + 804 .LVL58: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 805 .loc 1 333 12 view .LVU262 + 806 008a FCE7 b .L28 + 807 .LVL59: + 808 .L34: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 809 .loc 1 362 10 view .LVU263 + 810 008c 0020 movs r0, #0 + 811 008e FAE7 b .L28 + 812 .L37: + 813 .align 2 + 814 .L36: + 815 0090 002C0140 .word 1073818624 + 816 0094 00040040 .word 1073742848 + 817 .cfi_endproc + 818 .LFE44: + 820 .section .text.HAL_TIMEx_HallSensor_Stop,"ax",%progbits + 821 .align 1 + 822 .global HAL_TIMEx_HallSensor_Stop + 823 .syntax unified + 824 .code 16 + 825 .thumb_func + 827 HAL_TIMEx_HallSensor_Stop: + 828 .LVL60: + ARM GAS /tmp/ccsFKqBV.s page 61 + + + 829 .LFB45: + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 830 .loc 1 371 1 is_stmt 1 view -0 + 831 .cfi_startproc + 832 @ args = 0, pretend = 0, frame = 0 + 833 @ frame_needed = 0, uses_anonymous_args = 0 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 834 .loc 1 371 1 is_stmt 0 view .LVU265 + 835 0000 10B5 push {r4, lr} + 836 .cfi_def_cfa_offset 8 + 837 .cfi_offset 4, -8 + 838 .cfi_offset 14, -4 + 839 0002 0400 movs r4, r0 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 840 .loc 1 373 3 is_stmt 1 view .LVU266 + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 841 .loc 1 378 3 view .LVU267 + 842 0004 0068 ldr r0, [r0] + 843 .LVL61: + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 844 .loc 1 378 3 is_stmt 0 view .LVU268 + 845 0006 0022 movs r2, #0 + 846 0008 0021 movs r1, #0 + 847 000a FFF7FEFF bl TIM_CCxChannelCmd + 848 .LVL62: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 849 .loc 1 381 3 is_stmt 1 view .LVU269 + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 850 .loc 1 381 3 view .LVU270 + 851 000e 2368 ldr r3, [r4] + 852 0010 196A ldr r1, [r3, #32] + 853 0012 0B4A ldr r2, .L40 + 854 0014 1142 tst r1, r2 + 855 0016 07D1 bne .L39 + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 856 .loc 1 381 3 discriminator 1 view .LVU271 + 857 0018 196A ldr r1, [r3, #32] + 858 001a 0A4A ldr r2, .L40+4 + 859 001c 1142 tst r1, r2 + 860 001e 03D1 bne .L39 + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 861 .loc 1 381 3 discriminator 3 view .LVU272 + 862 0020 1A68 ldr r2, [r3] + 863 0022 0121 movs r1, #1 + 864 0024 8A43 bics r2, r1 + 865 0026 1A60 str r2, [r3] + 866 .L39: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 867 .loc 1 381 3 discriminator 5 view .LVU273 + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 868 .loc 1 384 3 view .LVU274 + 869 0028 0123 movs r3, #1 + 870 002a 3E22 movs r2, #62 + 871 002c A354 strb r3, [r4, r2] + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 872 .loc 1 385 3 view .LVU275 + 873 002e 0132 adds r2, r2, #1 + ARM GAS /tmp/ccsFKqBV.s page 62 + + + 874 0030 A354 strb r3, [r4, r2] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 875 .loc 1 386 3 view .LVU276 + 876 0032 0332 adds r2, r2, #3 + 877 0034 A354 strb r3, [r4, r2] + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 878 .loc 1 387 3 view .LVU277 + 879 0036 0132 adds r2, r2, #1 + 880 0038 A354 strb r3, [r4, r2] + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 881 .loc 1 390 3 view .LVU278 + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 882 .loc 1 391 1 is_stmt 0 view .LVU279 + 883 003a 0020 movs r0, #0 + 884 @ sp needed + 885 .LVL63: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 886 .loc 1 391 1 view .LVU280 + 887 003c 10BD pop {r4, pc} + 888 .L41: + 889 003e C046 .align 2 + 890 .L40: + 891 0040 11110000 .word 4369 + 892 0044 44040000 .word 1092 + 893 .cfi_endproc + 894 .LFE45: + 896 .section .text.HAL_TIMEx_HallSensor_Start_IT,"ax",%progbits + 897 .align 1 + 898 .global HAL_TIMEx_HallSensor_Start_IT + 899 .syntax unified + 900 .code 16 + 901 .thumb_func + 903 HAL_TIMEx_HallSensor_Start_IT: + 904 .LVL64: + 905 .LFB46: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 906 .loc 1 399 1 is_stmt 1 view -0 + 907 .cfi_startproc + 908 @ args = 0, pretend = 0, frame = 0 + 909 @ frame_needed = 0, uses_anonymous_args = 0 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 910 .loc 1 399 1 is_stmt 0 view .LVU282 + 911 0000 70B5 push {r4, r5, r6, lr} + 912 .cfi_def_cfa_offset 16 + 913 .cfi_offset 4, -16 + 914 .cfi_offset 5, -12 + 915 .cfi_offset 6, -8 + 916 .cfi_offset 14, -4 + 917 0002 0400 movs r4, r0 + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 918 .loc 1 400 3 is_stmt 1 view .LVU283 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 919 .loc 1 401 3 view .LVU284 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 920 .loc 1 401 31 is_stmt 0 view .LVU285 + 921 0004 3E23 movs r3, #62 + 922 0006 C55C ldrb r5, [r0, r3] + ARM GAS /tmp/ccsFKqBV.s page 63 + + + 923 0008 E8B2 uxtb r0, r5 + 924 .LVL65: + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 925 .loc 1 402 3 is_stmt 1 view .LVU286 + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 926 .loc 1 402 31 is_stmt 0 view .LVU287 + 927 000a 0133 adds r3, r3, #1 + 928 000c E35C ldrb r3, [r4, r3] + 929 000e DBB2 uxtb r3, r3 + 930 .LVL66: + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 931 .loc 1 403 3 is_stmt 1 view .LVU288 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 932 .loc 1 403 31 is_stmt 0 view .LVU289 + 933 0010 4222 movs r2, #66 + 934 0012 A25C ldrb r2, [r4, r2] + 935 0014 D2B2 uxtb r2, r2 + 936 .LVL67: + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 937 .loc 1 404 3 is_stmt 1 view .LVU290 + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 938 .loc 1 404 31 is_stmt 0 view .LVU291 + 939 0016 4321 movs r1, #67 + 940 0018 615C ldrb r1, [r4, r1] + 941 001a C9B2 uxtb r1, r1 + 942 .LVL68: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 943 .loc 1 407 3 is_stmt 1 view .LVU292 + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 944 .loc 1 410 3 view .LVU293 + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 945 .loc 1 410 6 is_stmt 0 view .LVU294 + 946 001c 012D cmp r5, #1 + 947 001e 35D1 bne .L46 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 948 .loc 1 411 7 view .LVU295 + 949 0020 012B cmp r3, #1 + 950 0022 34D1 bne .L43 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 951 .loc 1 412 7 view .LVU296 + 952 0024 012A cmp r2, #1 + 953 0026 33D1 bne .L47 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 954 .loc 1 413 7 view .LVU297 + 955 0028 0129 cmp r1, #1 + 956 002a 01D0 beq .L50 + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 957 .loc 1 415 12 view .LVU298 + 958 002c 1000 movs r0, r2 + 959 .LVL69: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 960 .loc 1 415 12 view .LVU299 + 961 002e 2EE0 b .L43 + 962 .LVL70: + 963 .L50: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 964 .loc 1 419 3 is_stmt 1 view .LVU300 + ARM GAS /tmp/ccsFKqBV.s page 64 + + + 965 0030 0133 adds r3, r3, #1 + 966 .LVL71: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 967 .loc 1 419 3 is_stmt 0 view .LVU301 + 968 0032 3D32 adds r2, r2, #61 + 969 .LVL72: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 970 .loc 1 419 3 view .LVU302 + 971 0034 A354 strb r3, [r4, r2] + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 972 .loc 1 420 3 is_stmt 1 view .LVU303 + 973 0036 0132 adds r2, r2, #1 + 974 .LVL73: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 975 .loc 1 420 3 is_stmt 0 view .LVU304 + 976 0038 A354 strb r3, [r4, r2] + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 977 .loc 1 421 3 is_stmt 1 view .LVU305 + 978 003a 0332 adds r2, r2, #3 + 979 .LVL74: + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 980 .loc 1 421 3 is_stmt 0 view .LVU306 + 981 003c A354 strb r3, [r4, r2] + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 982 .loc 1 422 3 is_stmt 1 view .LVU307 + 983 003e 0132 adds r2, r2, #1 + 984 .LVL75: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 985 .loc 1 422 3 is_stmt 0 view .LVU308 + 986 0040 A354 strb r3, [r4, r2] + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 987 .loc 1 425 3 is_stmt 1 view .LVU309 + 988 0042 2168 ldr r1, [r4] + 989 .LVL76: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 990 .loc 1 425 3 is_stmt 0 view .LVU310 + 991 0044 CA68 ldr r2, [r1, #12] + 992 .LVL77: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 993 .loc 1 425 3 view .LVU311 + 994 0046 1343 orrs r3, r2 + 995 .LVL78: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 996 .loc 1 425 3 view .LVU312 + 997 0048 CB60 str r3, [r1, #12] + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 998 .loc 1 430 3 is_stmt 1 view .LVU313 + 999 004a 2068 ldr r0, [r4] + 1000 .LVL79: + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1001 .loc 1 430 3 is_stmt 0 view .LVU314 + 1002 004c 0122 movs r2, #1 + 1003 004e 0021 movs r1, #0 + 1004 0050 FFF7FEFF bl TIM_CCxChannelCmd + 1005 .LVL80: + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1006 .loc 1 433 3 is_stmt 1 view .LVU315 + ARM GAS /tmp/ccsFKqBV.s page 65 + + + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1007 .loc 1 433 7 is_stmt 0 view .LVU316 + 1008 0054 2368 ldr r3, [r4] + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1009 .loc 1 433 6 view .LVU317 + 1010 0056 104A ldr r2, .L51 + 1011 0058 9342 cmp r3, r2 + 1012 005a 0CD0 beq .L44 + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1013 .loc 1 433 7 discriminator 1 view .LVU318 + 1014 005c 8022 movs r2, #128 + 1015 005e D205 lsls r2, r2, #23 + 1016 0060 9342 cmp r3, r2 + 1017 0062 08D0 beq .L44 + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1018 .loc 1 433 7 discriminator 2 view .LVU319 + 1019 0064 0D4A ldr r2, .L51+4 + 1020 0066 9342 cmp r3, r2 + 1021 0068 05D0 beq .L44 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1022 .loc 1 443 5 is_stmt 1 view .LVU320 + 1023 006a 1A68 ldr r2, [r3] + 1024 006c 0121 movs r1, #1 + 1025 006e 0A43 orrs r2, r1 + 1026 0070 1A60 str r2, [r3] + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1027 .loc 1 447 10 is_stmt 0 view .LVU321 + 1028 0072 0020 movs r0, #0 + 1029 0074 0BE0 b .L43 + 1030 .L44: + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1031 .loc 1 435 5 is_stmt 1 view .LVU322 + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1032 .loc 1 435 29 is_stmt 0 view .LVU323 + 1033 0076 9968 ldr r1, [r3, #8] + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1034 .loc 1 435 13 view .LVU324 + 1035 0078 0722 movs r2, #7 + 1036 007a 0A40 ands r2, r1 + 1037 .LVL81: + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1038 .loc 1 436 5 is_stmt 1 view .LVU325 + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1039 .loc 1 436 8 is_stmt 0 view .LVU326 + 1040 007c 062A cmp r2, #6 + 1041 007e 09D0 beq .L49 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1042 .loc 1 438 7 is_stmt 1 view .LVU327 + 1043 0080 1A68 ldr r2, [r3] + 1044 .LVL82: + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1045 .loc 1 438 7 is_stmt 0 view .LVU328 + 1046 0082 0121 movs r1, #1 + 1047 .LVL83: + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1048 .loc 1 438 7 view .LVU329 + 1049 0084 0A43 orrs r2, r1 + ARM GAS /tmp/ccsFKqBV.s page 66 + + + 1050 0086 1A60 str r2, [r3] + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1051 .loc 1 447 10 view .LVU330 + 1052 0088 0020 movs r0, #0 + 1053 008a 00E0 b .L43 + 1054 .LVL84: + 1055 .L46: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1056 .loc 1 415 12 view .LVU331 + 1057 008c 0120 movs r0, #1 + 1058 .LVL85: + 1059 .L43: + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1060 .loc 1 448 1 view .LVU332 + 1061 @ sp needed + 1062 .LVL86: + 1063 .LVL87: + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1064 .loc 1 448 1 view .LVU333 + 1065 008e 70BD pop {r4, r5, r6, pc} + 1066 .LVL88: + 1067 .L47: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1068 .loc 1 415 12 view .LVU334 + 1069 0090 1800 movs r0, r3 + 1070 .LVL89: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1071 .loc 1 415 12 view .LVU335 + 1072 0092 FCE7 b .L43 + 1073 .LVL90: + 1074 .L49: + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1075 .loc 1 447 10 view .LVU336 + 1076 0094 0020 movs r0, #0 + 1077 0096 FAE7 b .L43 + 1078 .L52: + 1079 .align 2 + 1080 .L51: + 1081 0098 002C0140 .word 1073818624 + 1082 009c 00040040 .word 1073742848 + 1083 .cfi_endproc + 1084 .LFE46: + 1086 .section .text.HAL_TIMEx_HallSensor_Stop_IT,"ax",%progbits + 1087 .align 1 + 1088 .global HAL_TIMEx_HallSensor_Stop_IT + 1089 .syntax unified + 1090 .code 16 + 1091 .thumb_func + 1093 HAL_TIMEx_HallSensor_Stop_IT: + 1094 .LVL91: + 1095 .LFB47: + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1096 .loc 1 456 1 is_stmt 1 view -0 + 1097 .cfi_startproc + 1098 @ args = 0, pretend = 0, frame = 0 + 1099 @ frame_needed = 0, uses_anonymous_args = 0 + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + ARM GAS /tmp/ccsFKqBV.s page 67 + + + 1100 .loc 1 456 1 is_stmt 0 view .LVU338 + 1101 0000 10B5 push {r4, lr} + 1102 .cfi_def_cfa_offset 8 + 1103 .cfi_offset 4, -8 + 1104 .cfi_offset 14, -4 + 1105 0002 0400 movs r4, r0 + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1106 .loc 1 458 3 is_stmt 1 view .LVU339 + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1107 .loc 1 463 3 view .LVU340 + 1108 0004 0068 ldr r0, [r0] + 1109 .LVL92: + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1110 .loc 1 463 3 is_stmt 0 view .LVU341 + 1111 0006 0022 movs r2, #0 + 1112 0008 0021 movs r1, #0 + 1113 000a FFF7FEFF bl TIM_CCxChannelCmd + 1114 .LVL93: + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1115 .loc 1 466 3 is_stmt 1 view .LVU342 + 1116 000e 2268 ldr r2, [r4] + 1117 0010 D368 ldr r3, [r2, #12] + 1118 0012 0221 movs r1, #2 + 1119 0014 8B43 bics r3, r1 + 1120 0016 D360 str r3, [r2, #12] + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1121 .loc 1 469 3 view .LVU343 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1122 .loc 1 469 3 view .LVU344 + 1123 0018 2368 ldr r3, [r4] + 1124 001a 196A ldr r1, [r3, #32] + 1125 001c 0A4A ldr r2, .L55 + 1126 001e 1142 tst r1, r2 + 1127 0020 07D1 bne .L54 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1128 .loc 1 469 3 discriminator 1 view .LVU345 + 1129 0022 196A ldr r1, [r3, #32] + 1130 0024 094A ldr r2, .L55+4 + 1131 0026 1142 tst r1, r2 + 1132 0028 03D1 bne .L54 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1133 .loc 1 469 3 discriminator 3 view .LVU346 + 1134 002a 1A68 ldr r2, [r3] + 1135 002c 0121 movs r1, #1 + 1136 002e 8A43 bics r2, r1 + 1137 0030 1A60 str r2, [r3] + 1138 .L54: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1139 .loc 1 469 3 discriminator 5 view .LVU347 + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 1140 .loc 1 472 3 view .LVU348 + 1141 0032 0123 movs r3, #1 + 1142 0034 3E22 movs r2, #62 + 1143 0036 A354 strb r3, [r4, r2] + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 1144 .loc 1 473 3 view .LVU349 + 1145 0038 0132 adds r2, r2, #1 + ARM GAS /tmp/ccsFKqBV.s page 68 + + + 1146 003a A354 strb r3, [r4, r2] + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 1147 .loc 1 474 3 view .LVU350 + 1148 003c 0332 adds r2, r2, #3 + 1149 003e A354 strb r3, [r4, r2] + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1150 .loc 1 475 3 view .LVU351 + 1151 0040 0132 adds r2, r2, #1 + 1152 0042 A354 strb r3, [r4, r2] + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1153 .loc 1 478 3 view .LVU352 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1154 .loc 1 479 1 is_stmt 0 view .LVU353 + 1155 0044 0020 movs r0, #0 + 1156 @ sp needed + 1157 .LVL94: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1158 .loc 1 479 1 view .LVU354 + 1159 0046 10BD pop {r4, pc} + 1160 .L56: + 1161 .align 2 + 1162 .L55: + 1163 0048 11110000 .word 4369 + 1164 004c 44040000 .word 1092 + 1165 .cfi_endproc + 1166 .LFE47: + 1168 .section .text.HAL_TIMEx_HallSensor_Start_DMA,"ax",%progbits + 1169 .align 1 + 1170 .global HAL_TIMEx_HallSensor_Start_DMA + 1171 .syntax unified + 1172 .code 16 + 1173 .thumb_func + 1175 HAL_TIMEx_HallSensor_Start_DMA: + 1176 .LVL95: + 1177 .LFB48: + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1178 .loc 1 489 1 is_stmt 1 view -0 + 1179 .cfi_startproc + 1180 @ args = 0, pretend = 0, frame = 0 + 1181 @ frame_needed = 0, uses_anonymous_args = 0 + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1182 .loc 1 489 1 is_stmt 0 view .LVU356 + 1183 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1184 .cfi_def_cfa_offset 24 + 1185 .cfi_offset 3, -24 + 1186 .cfi_offset 4, -20 + 1187 .cfi_offset 5, -16 + 1188 .cfi_offset 6, -12 + 1189 .cfi_offset 7, -8 + 1190 .cfi_offset 14, -4 + 1191 0002 0400 movs r4, r0 + 1192 0004 0E00 movs r6, r1 + 1193 0006 1700 movs r7, r2 + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 1194 .loc 1 490 3 is_stmt 1 view .LVU357 + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 1195 .loc 1 491 3 view .LVU358 + ARM GAS /tmp/ccsFKqBV.s page 69 + + + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 1196 .loc 1 491 31 is_stmt 0 view .LVU359 + 1197 0008 3E23 movs r3, #62 + 1198 000a C35C ldrb r3, [r0, r3] + 1199 000c D8B2 uxtb r0, r3 + 1200 .LVL96: + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1201 .loc 1 492 3 is_stmt 1 view .LVU360 + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1202 .loc 1 492 31 is_stmt 0 view .LVU361 + 1203 000e 4222 movs r2, #66 + 1204 .LVL97: + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1205 .loc 1 492 31 view .LVU362 + 1206 0010 A55C ldrb r5, [r4, r2] + 1207 0012 EDB2 uxtb r5, r5 + 1208 .LVL98: + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1209 .loc 1 495 3 is_stmt 1 view .LVU363 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 1210 .loc 1 498 3 view .LVU364 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 1211 .loc 1 498 6 is_stmt 0 view .LVU365 + 1212 0014 022B cmp r3, #2 + 1213 0016 4AD0 beq .L58 + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1214 .loc 1 499 7 view .LVU366 + 1215 0018 022D cmp r5, #2 + 1216 001a 45D0 beq .L61 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 1217 .loc 1 503 8 is_stmt 1 view .LVU367 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 1218 .loc 1 503 11 is_stmt 0 view .LVU368 + 1219 001c 0128 cmp r0, #1 + 1220 001e 45D1 bne .L62 + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1221 .loc 1 504 12 view .LVU369 + 1222 0020 012D cmp r5, #1 + 1223 0022 44D1 bne .L58 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1224 .loc 1 506 5 is_stmt 1 view .LVU370 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1225 .loc 1 506 8 is_stmt 0 view .LVU371 + 1226 0024 0029 cmp r1, #0 + 1227 0026 43D0 beq .L63 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1228 .loc 1 506 25 discriminator 1 view .LVU372 + 1229 0028 002F cmp r7, #0 + 1230 002a 01D1 bne .L66 + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1231 .loc 1 508 14 view .LVU373 + 1232 002c 2800 movs r0, r5 + 1233 .LVL99: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1234 .loc 1 508 14 view .LVU374 + 1235 002e 3EE0 b .L58 + 1236 .LVL100: + ARM GAS /tmp/ccsFKqBV.s page 70 + + + 1237 .L66: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 1238 .loc 1 512 7 is_stmt 1 view .LVU375 + 1239 0030 0223 movs r3, #2 + 1240 0032 043A subs r2, r2, #4 + 1241 0034 A354 strb r3, [r4, r2] + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1242 .loc 1 513 7 view .LVU376 + 1243 0036 0432 adds r2, r2, #4 + 1244 0038 A354 strb r3, [r4, r2] + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1245 .loc 1 524 3 view .LVU377 + 1246 003a 2068 ldr r0, [r4] + 1247 .LVL101: + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1248 .loc 1 524 3 is_stmt 0 view .LVU378 + 1249 003c 413A subs r2, r2, #65 + 1250 003e 0021 movs r1, #0 + 1251 .LVL102: + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1252 .loc 1 524 3 view .LVU379 + 1253 0040 FFF7FEFF bl TIM_CCxChannelCmd + 1254 .LVL103: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1255 .loc 1 527 3 is_stmt 1 view .LVU380 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1256 .loc 1 527 13 is_stmt 0 view .LVU381 + 1257 0044 636A ldr r3, [r4, #36] + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1258 .loc 1 527 48 view .LVU382 + 1259 0046 1C4A ldr r2, .L67 + 1260 0048 9A62 str r2, [r3, #40] + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1261 .loc 1 528 3 is_stmt 1 view .LVU383 + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1262 .loc 1 528 13 is_stmt 0 view .LVU384 + 1263 004a 636A ldr r3, [r4, #36] + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1264 .loc 1 528 52 view .LVU385 + 1265 004c 1B4A ldr r2, .L67+4 + 1266 004e DA62 str r2, [r3, #44] + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1267 .loc 1 530 3 is_stmt 1 view .LVU386 + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1268 .loc 1 530 13 is_stmt 0 view .LVU387 + 1269 0050 636A ldr r3, [r4, #36] + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1270 .loc 1 530 49 view .LVU388 + 1271 0052 1B4A ldr r2, .L67+8 + 1272 0054 1A63 str r2, [r3, #48] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1273 .loc 1 533 3 is_stmt 1 view .LVU389 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1274 .loc 1 533 67 is_stmt 0 view .LVU390 + 1275 0056 2168 ldr r1, [r4] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1276 .loc 1 533 62 view .LVU391 + ARM GAS /tmp/ccsFKqBV.s page 71 + + + 1277 0058 3431 adds r1, r1, #52 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1278 .loc 1 533 7 view .LVU392 + 1279 005a 606A ldr r0, [r4, #36] + 1280 005c 3B00 movs r3, r7 + 1281 005e 3200 movs r2, r6 + 1282 0060 FFF7FEFF bl HAL_DMA_Start_IT + 1283 .LVL104: + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1284 .loc 1 533 6 discriminator 1 view .LVU393 + 1285 0064 0028 cmp r0, #0 + 1286 0066 25D1 bne .L65 + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1287 .loc 1 539 3 is_stmt 1 view .LVU394 + 1288 0068 2268 ldr r2, [r4] + 1289 006a D168 ldr r1, [r2, #12] + 1290 006c 8023 movs r3, #128 + 1291 006e 9B00 lsls r3, r3, #2 + 1292 0070 0B43 orrs r3, r1 + 1293 0072 D360 str r3, [r2, #12] + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1294 .loc 1 542 3 view .LVU395 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1295 .loc 1 542 7 is_stmt 0 view .LVU396 + 1296 0074 2368 ldr r3, [r4] + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1297 .loc 1 542 6 view .LVU397 + 1298 0076 134A ldr r2, .L67+12 + 1299 0078 9342 cmp r3, r2 + 1300 007a 0BD0 beq .L59 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1301 .loc 1 542 7 discriminator 1 view .LVU398 + 1302 007c 8022 movs r2, #128 + 1303 007e D205 lsls r2, r2, #23 + 1304 0080 9342 cmp r3, r2 + 1305 0082 07D0 beq .L59 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1306 .loc 1 542 7 discriminator 2 view .LVU399 + 1307 0084 104A ldr r2, .L67+16 + 1308 0086 9342 cmp r3, r2 + 1309 0088 04D0 beq .L59 + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1310 .loc 1 552 5 is_stmt 1 view .LVU400 + 1311 008a 1A68 ldr r2, [r3] + 1312 008c 0121 movs r1, #1 + 1313 008e 0A43 orrs r2, r1 + 1314 0090 1A60 str r2, [r3] + 1315 0092 0CE0 b .L58 + 1316 .L59: + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1317 .loc 1 544 5 view .LVU401 + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1318 .loc 1 544 29 is_stmt 0 view .LVU402 + 1319 0094 9968 ldr r1, [r3, #8] + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1320 .loc 1 544 13 view .LVU403 + 1321 0096 0722 movs r2, #7 + ARM GAS /tmp/ccsFKqBV.s page 72 + + + 1322 0098 0A40 ands r2, r1 + 1323 .LVL105: + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1324 .loc 1 545 5 is_stmt 1 view .LVU404 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1325 .loc 1 545 8 is_stmt 0 view .LVU405 + 1326 009a 062A cmp r2, #6 + 1327 009c 07D0 beq .L58 + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1328 .loc 1 547 7 is_stmt 1 view .LVU406 + 1329 009e 1A68 ldr r2, [r3] + 1330 .LVL106: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1331 .loc 1 547 7 is_stmt 0 view .LVU407 + 1332 00a0 0121 movs r1, #1 + 1333 .LVL107: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1334 .loc 1 547 7 view .LVU408 + 1335 00a2 0A43 orrs r2, r1 + 1336 00a4 1A60 str r2, [r3] + 1337 00a6 02E0 b .L58 + 1338 .LVL108: + 1339 .L61: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1340 .loc 1 501 12 view .LVU409 + 1341 00a8 2800 movs r0, r5 + 1342 .LVL109: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1343 .loc 1 501 12 view .LVU410 + 1344 00aa 00E0 b .L58 + 1345 .LVL110: + 1346 .L62: + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1347 .loc 1 518 12 view .LVU411 + 1348 00ac 0120 movs r0, #1 + 1349 .LVL111: + 1350 .L58: + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1351 .loc 1 557 1 view .LVU412 + 1352 @ sp needed + 1353 .LVL112: + 1354 .LVL113: + 1355 .LVL114: + 1356 .LVL115: + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1357 .loc 1 557 1 view .LVU413 + 1358 00ae F8BD pop {r3, r4, r5, r6, r7, pc} + 1359 .LVL116: + 1360 .L63: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1361 .loc 1 508 14 view .LVU414 + 1362 00b0 2800 movs r0, r5 + 1363 .LVL117: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1364 .loc 1 508 14 view .LVU415 + 1365 00b2 FCE7 b .L58 + 1366 .LVL118: + ARM GAS /tmp/ccsFKqBV.s page 73 + + + 1367 .L65: + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1368 .loc 1 536 12 view .LVU416 + 1369 00b4 2800 movs r0, r5 + 1370 00b6 FAE7 b .L58 + 1371 .L68: + 1372 .align 2 + 1373 .L67: + 1374 00b8 00000000 .word TIM_DMACaptureCplt + 1375 00bc 00000000 .word TIM_DMACaptureHalfCplt + 1376 00c0 00000000 .word TIM_DMAError + 1377 00c4 002C0140 .word 1073818624 + 1378 00c8 00040040 .word 1073742848 + 1379 .cfi_endproc + 1380 .LFE48: + 1382 .section .text.HAL_TIMEx_HallSensor_Stop_DMA,"ax",%progbits + 1383 .align 1 + 1384 .global HAL_TIMEx_HallSensor_Stop_DMA + 1385 .syntax unified + 1386 .code 16 + 1387 .thumb_func + 1389 HAL_TIMEx_HallSensor_Stop_DMA: + 1390 .LVL119: + 1391 .LFB49: + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1392 .loc 1 565 1 is_stmt 1 view -0 + 1393 .cfi_startproc + 1394 @ args = 0, pretend = 0, frame = 0 + 1395 @ frame_needed = 0, uses_anonymous_args = 0 + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1396 .loc 1 565 1 is_stmt 0 view .LVU418 + 1397 0000 10B5 push {r4, lr} + 1398 .cfi_def_cfa_offset 8 + 1399 .cfi_offset 4, -8 + 1400 .cfi_offset 14, -4 + 1401 0002 0400 movs r4, r0 + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1402 .loc 1 567 3 is_stmt 1 view .LVU419 + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1403 .loc 1 572 3 view .LVU420 + 1404 0004 0068 ldr r0, [r0] + 1405 .LVL120: + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1406 .loc 1 572 3 is_stmt 0 view .LVU421 + 1407 0006 0022 movs r2, #0 + 1408 0008 0021 movs r1, #0 + 1409 000a FFF7FEFF bl TIM_CCxChannelCmd + 1410 .LVL121: + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1411 .loc 1 576 3 is_stmt 1 view .LVU422 + 1412 000e 2268 ldr r2, [r4] + 1413 0010 D368 ldr r3, [r2, #12] + 1414 0012 0D49 ldr r1, .L71 + 1415 0014 0B40 ands r3, r1 + 1416 0016 D360 str r3, [r2, #12] + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1417 .loc 1 578 3 view .LVU423 + ARM GAS /tmp/ccsFKqBV.s page 74 + + + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1418 .loc 1 578 9 is_stmt 0 view .LVU424 + 1419 0018 606A ldr r0, [r4, #36] + 1420 001a FFF7FEFF bl HAL_DMA_Abort_IT + 1421 .LVL122: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1422 .loc 1 581 3 is_stmt 1 view .LVU425 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1423 .loc 1 581 3 view .LVU426 + 1424 001e 2368 ldr r3, [r4] + 1425 0020 196A ldr r1, [r3, #32] + 1426 0022 0A4A ldr r2, .L71+4 + 1427 0024 1142 tst r1, r2 + 1428 0026 07D1 bne .L70 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1429 .loc 1 581 3 discriminator 1 view .LVU427 + 1430 0028 196A ldr r1, [r3, #32] + 1431 002a 094A ldr r2, .L71+8 + 1432 002c 1142 tst r1, r2 + 1433 002e 03D1 bne .L70 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1434 .loc 1 581 3 discriminator 3 view .LVU428 + 1435 0030 1A68 ldr r2, [r3] + 1436 0032 0121 movs r1, #1 + 1437 0034 8A43 bics r2, r1 + 1438 0036 1A60 str r2, [r3] + 1439 .L70: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1440 .loc 1 581 3 discriminator 5 view .LVU429 + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 1441 .loc 1 584 3 view .LVU430 + 1442 0038 0123 movs r3, #1 + 1443 003a 3E22 movs r2, #62 + 1444 003c A354 strb r3, [r4, r2] + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1445 .loc 1 585 3 view .LVU431 + 1446 003e 0432 adds r2, r2, #4 + 1447 0040 A354 strb r3, [r4, r2] + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1448 .loc 1 588 3 view .LVU432 + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1449 .loc 1 589 1 is_stmt 0 view .LVU433 + 1450 0042 0020 movs r0, #0 + 1451 @ sp needed + 1452 .LVL123: + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1453 .loc 1 589 1 view .LVU434 + 1454 0044 10BD pop {r4, pc} + 1455 .L72: + 1456 0046 C046 .align 2 + 1457 .L71: + 1458 0048 FFFDFFFF .word -513 + 1459 004c 11110000 .word 4369 + 1460 0050 44040000 .word 1092 + 1461 .cfi_endproc + 1462 .LFE49: + 1464 .section .text.HAL_TIMEx_OCN_Start,"ax",%progbits + ARM GAS /tmp/ccsFKqBV.s page 75 + + + 1465 .align 1 + 1466 .global HAL_TIMEx_OCN_Start + 1467 .syntax unified + 1468 .code 16 + 1469 .thumb_func + 1471 HAL_TIMEx_OCN_Start: + 1472 .LVL124: + 1473 .LFB50: + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1474 .loc 1 627 1 is_stmt 1 view -0 + 1475 .cfi_startproc + 1476 @ args = 0, pretend = 0, frame = 0 + 1477 @ frame_needed = 0, uses_anonymous_args = 0 + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1478 .loc 1 627 1 is_stmt 0 view .LVU436 + 1479 0000 10B5 push {r4, lr} + 1480 .cfi_def_cfa_offset 8 + 1481 .cfi_offset 4, -8 + 1482 .cfi_offset 14, -4 + 1483 0002 0400 movs r4, r0 + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1484 .loc 1 628 3 is_stmt 1 view .LVU437 + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1485 .loc 1 631 3 view .LVU438 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1486 .loc 1 634 3 view .LVU439 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1487 .loc 1 634 46 is_stmt 0 view .LVU440 + 1488 0004 0029 cmp r1, #0 + 1489 0006 27D1 bne .L74 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1490 .loc 1 634 7 discriminator 1 view .LVU441 + 1491 0008 4223 movs r3, #66 + 1492 000a C35C ldrb r3, [r0, r3] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1493 .loc 1 634 46 discriminator 1 view .LVU442 + 1494 000c 013B subs r3, r3, #1 + 1495 000e 5A1E subs r2, r3, #1 + 1496 0010 9341 sbcs r3, r3, r2 + 1497 0012 DBB2 uxtb r3, r3 + 1498 .L75: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1499 .loc 1 634 6 discriminator 12 view .LVU443 + 1500 0014 002B cmp r3, #0 + 1501 0016 53D1 bne .L85 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1502 .loc 1 640 3 is_stmt 1 view .LVU444 + 1503 0018 0029 cmp r1, #0 + 1504 001a 36D1 bne .L79 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1505 .loc 1 640 3 is_stmt 0 discriminator 1 view .LVU445 + 1506 001c 4233 adds r3, r3, #66 + 1507 001e 0222 movs r2, #2 + 1508 0020 E254 strb r2, [r4, r3] + 1509 .L80: + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1510 .loc 1 643 3 is_stmt 1 view .LVU446 + ARM GAS /tmp/ccsFKqBV.s page 76 + + + 1511 0022 2068 ldr r0, [r4] + 1512 .LVL125: + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1513 .loc 1 643 3 is_stmt 0 view .LVU447 + 1514 0024 0422 movs r2, #4 + 1515 0026 FFF7FEFF bl TIM_CCxNChannelCmd + 1516 .LVL126: + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1517 .loc 1 646 3 is_stmt 1 view .LVU448 + 1518 002a 2268 ldr r2, [r4] + 1519 002c 516C ldr r1, [r2, #68] + 1520 002e 8023 movs r3, #128 + 1521 0030 1B02 lsls r3, r3, #8 + 1522 0032 0B43 orrs r3, r1 + 1523 0034 5364 str r3, [r2, #68] + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1524 .loc 1 649 3 view .LVU449 + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1525 .loc 1 649 7 is_stmt 0 view .LVU450 + 1526 0036 2368 ldr r3, [r4] + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1527 .loc 1 649 6 view .LVU451 + 1528 0038 234A ldr r2, .L91 + 1529 003a 9342 cmp r3, r2 + 1530 003c 35D0 beq .L83 + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1531 .loc 1 649 7 discriminator 1 view .LVU452 + 1532 003e 8022 movs r2, #128 + 1533 0040 D205 lsls r2, r2, #23 + 1534 0042 9342 cmp r3, r2 + 1535 0044 31D0 beq .L83 + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1536 .loc 1 649 7 discriminator 2 view .LVU453 + 1537 0046 214A ldr r2, .L91+4 + 1538 0048 9342 cmp r3, r2 + 1539 004a 2ED0 beq .L83 + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1540 .loc 1 659 5 is_stmt 1 view .LVU454 + 1541 004c 1A68 ldr r2, [r3] + 1542 004e 0121 movs r1, #1 + 1543 0050 0A43 orrs r2, r1 + 1544 0052 1A60 str r2, [r3] + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1545 .loc 1 663 10 is_stmt 0 view .LVU455 + 1546 0054 0020 movs r0, #0 + 1547 0056 34E0 b .L78 + 1548 .LVL127: + 1549 .L74: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1550 .loc 1 634 46 discriminator 2 view .LVU456 + 1551 0058 0429 cmp r1, #4 + 1552 005a 08D0 beq .L87 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1553 .loc 1 634 46 discriminator 5 view .LVU457 + 1554 005c 0829 cmp r1, #8 + 1555 005e 0DD0 beq .L88 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 77 + + + 1556 .loc 1 634 7 discriminator 8 view .LVU458 + 1557 0060 4523 movs r3, #69 + 1558 0062 C35C ldrb r3, [r0, r3] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1559 .loc 1 634 46 discriminator 8 view .LVU459 + 1560 0064 013B subs r3, r3, #1 + 1561 0066 5A1E subs r2, r3, #1 + 1562 0068 9341 sbcs r3, r3, r2 + 1563 006a DBB2 uxtb r3, r3 + 1564 006c D2E7 b .L75 + 1565 .L87: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1566 .loc 1 634 7 discriminator 4 view .LVU460 + 1567 006e 4323 movs r3, #67 + 1568 0070 C35C ldrb r3, [r0, r3] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1569 .loc 1 634 46 discriminator 4 view .LVU461 + 1570 0072 013B subs r3, r3, #1 + 1571 0074 5A1E subs r2, r3, #1 + 1572 0076 9341 sbcs r3, r3, r2 + 1573 0078 DBB2 uxtb r3, r3 + 1574 007a CBE7 b .L75 + 1575 .L88: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1576 .loc 1 634 7 discriminator 7 view .LVU462 + 1577 007c 4423 movs r3, #68 + 1578 007e C35C ldrb r3, [r0, r3] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1579 .loc 1 634 46 discriminator 7 view .LVU463 + 1580 0080 013B subs r3, r3, #1 + 1581 0082 5A1E subs r2, r3, #1 + 1582 0084 9341 sbcs r3, r3, r2 + 1583 0086 DBB2 uxtb r3, r3 + 1584 0088 C4E7 b .L75 + 1585 .L79: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1586 .loc 1 640 3 discriminator 2 view .LVU464 + 1587 008a 0429 cmp r1, #4 + 1588 008c 05D0 beq .L89 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1589 .loc 1 640 3 discriminator 4 view .LVU465 + 1590 008e 0829 cmp r1, #8 + 1591 0090 07D0 beq .L90 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1592 .loc 1 640 3 discriminator 7 view .LVU466 + 1593 0092 4523 movs r3, #69 + 1594 0094 0222 movs r2, #2 + 1595 0096 E254 strb r2, [r4, r3] + 1596 0098 C3E7 b .L80 + 1597 .L89: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1598 .loc 1 640 3 discriminator 3 view .LVU467 + 1599 009a 4323 movs r3, #67 + 1600 009c 0222 movs r2, #2 + 1601 009e E254 strb r2, [r4, r3] + 1602 00a0 BFE7 b .L80 + 1603 .L90: + ARM GAS /tmp/ccsFKqBV.s page 78 + + + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1604 .loc 1 640 3 discriminator 6 view .LVU468 + 1605 00a2 4423 movs r3, #68 + 1606 00a4 0222 movs r2, #2 + 1607 00a6 E254 strb r2, [r4, r3] + 1608 00a8 BBE7 b .L80 + 1609 .LVL128: + 1610 .L83: + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1611 .loc 1 651 5 is_stmt 1 view .LVU469 + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1612 .loc 1 651 29 is_stmt 0 view .LVU470 + 1613 00aa 9968 ldr r1, [r3, #8] + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1614 .loc 1 651 13 view .LVU471 + 1615 00ac 0722 movs r2, #7 + 1616 00ae 0A40 ands r2, r1 + 1617 .LVL129: + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1618 .loc 1 652 5 is_stmt 1 view .LVU472 + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1619 .loc 1 652 8 is_stmt 0 view .LVU473 + 1620 00b0 062A cmp r2, #6 + 1621 00b2 07D0 beq .L86 + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1622 .loc 1 654 7 is_stmt 1 view .LVU474 + 1623 00b4 1A68 ldr r2, [r3] + 1624 .LVL130: + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1625 .loc 1 654 7 is_stmt 0 view .LVU475 + 1626 00b6 0121 movs r1, #1 + 1627 .LVL131: + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1628 .loc 1 654 7 view .LVU476 + 1629 00b8 0A43 orrs r2, r1 + 1630 00ba 1A60 str r2, [r3] + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1631 .loc 1 663 10 view .LVU477 + 1632 00bc 0020 movs r0, #0 + 1633 00be 00E0 b .L78 + 1634 .LVL132: + 1635 .L85: + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1636 .loc 1 636 12 view .LVU478 + 1637 00c0 0120 movs r0, #1 + 1638 .LVL133: + 1639 .L78: + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1640 .loc 1 664 1 view .LVU479 + 1641 @ sp needed + 1642 .LVL134: + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1643 .loc 1 664 1 view .LVU480 + 1644 00c2 10BD pop {r4, pc} + 1645 .LVL135: + 1646 .L86: + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccsFKqBV.s page 79 + + + 1647 .loc 1 663 10 view .LVU481 + 1648 00c4 0020 movs r0, #0 + 1649 00c6 FCE7 b .L78 + 1650 .L92: + 1651 .align 2 + 1652 .L91: + 1653 00c8 002C0140 .word 1073818624 + 1654 00cc 00040040 .word 1073742848 + 1655 .cfi_endproc + 1656 .LFE50: + 1658 .section .text.HAL_TIMEx_OCN_Stop,"ax",%progbits + 1659 .align 1 + 1660 .global HAL_TIMEx_OCN_Stop + 1661 .syntax unified + 1662 .code 16 + 1663 .thumb_func + 1665 HAL_TIMEx_OCN_Stop: + 1666 .LVL136: + 1667 .LFB51: + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1668 .loc 1 678 1 is_stmt 1 view -0 + 1669 .cfi_startproc + 1670 @ args = 0, pretend = 0, frame = 0 + 1671 @ frame_needed = 0, uses_anonymous_args = 0 + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1672 .loc 1 678 1 is_stmt 0 view .LVU483 + 1673 0000 70B5 push {r4, r5, r6, lr} + 1674 .cfi_def_cfa_offset 16 + 1675 .cfi_offset 4, -16 + 1676 .cfi_offset 5, -12 + 1677 .cfi_offset 6, -8 + 1678 .cfi_offset 14, -4 + 1679 0002 0400 movs r4, r0 + 1680 0004 0D00 movs r5, r1 + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1681 .loc 1 680 3 is_stmt 1 view .LVU484 + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1682 .loc 1 683 3 view .LVU485 + 1683 0006 0068 ldr r0, [r0] + 1684 .LVL137: + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1685 .loc 1 683 3 is_stmt 0 view .LVU486 + 1686 0008 0022 movs r2, #0 + 1687 000a FFF7FEFF bl TIM_CCxNChannelCmd + 1688 .LVL138: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1689 .loc 1 686 3 is_stmt 1 view .LVU487 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1690 .loc 1 686 3 view .LVU488 + 1691 000e 2368 ldr r3, [r4] + 1692 0010 196A ldr r1, [r3, #32] + 1693 0012 174A ldr r2, .L102 + 1694 0014 1142 tst r1, r2 + 1695 0016 07D1 bne .L94 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1696 .loc 1 686 3 discriminator 1 view .LVU489 + 1697 0018 196A ldr r1, [r3, #32] + ARM GAS /tmp/ccsFKqBV.s page 80 + + + 1698 001a 164A ldr r2, .L102+4 + 1699 001c 1142 tst r1, r2 + 1700 001e 03D1 bne .L94 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1701 .loc 1 686 3 discriminator 3 view .LVU490 + 1702 0020 5A6C ldr r2, [r3, #68] + 1703 0022 1549 ldr r1, .L102+8 + 1704 0024 0A40 ands r2, r1 + 1705 0026 5A64 str r2, [r3, #68] + 1706 .L94: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1707 .loc 1 686 3 discriminator 5 view .LVU491 + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1708 .loc 1 689 3 view .LVU492 + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1709 .loc 1 689 3 view .LVU493 + 1710 0028 2368 ldr r3, [r4] + 1711 002a 196A ldr r1, [r3, #32] + 1712 002c 104A ldr r2, .L102 + 1713 002e 1142 tst r1, r2 + 1714 0030 07D1 bne .L95 + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1715 .loc 1 689 3 discriminator 1 view .LVU494 + 1716 0032 196A ldr r1, [r3, #32] + 1717 0034 0F4A ldr r2, .L102+4 + 1718 0036 1142 tst r1, r2 + 1719 0038 03D1 bne .L95 + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1720 .loc 1 689 3 discriminator 3 view .LVU495 + 1721 003a 1A68 ldr r2, [r3] + 1722 003c 0121 movs r1, #1 + 1723 003e 8A43 bics r2, r1 + 1724 0040 1A60 str r2, [r3] + 1725 .L95: + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1726 .loc 1 689 3 discriminator 5 view .LVU496 + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1727 .loc 1 692 3 view .LVU497 + 1728 0042 002D cmp r5, #0 + 1729 0044 04D1 bne .L96 + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1730 .loc 1 692 3 is_stmt 0 discriminator 1 view .LVU498 + 1731 0046 4223 movs r3, #66 + 1732 0048 0122 movs r2, #1 + 1733 004a E254 strb r2, [r4, r3] + 1734 .L97: + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1735 .loc 1 695 3 is_stmt 1 view .LVU499 + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1736 .loc 1 696 1 is_stmt 0 view .LVU500 + 1737 004c 0020 movs r0, #0 + 1738 @ sp needed + 1739 .LVL139: + 1740 .LVL140: + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1741 .loc 1 696 1 view .LVU501 + 1742 004e 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/ccsFKqBV.s page 81 + + + 1743 .LVL141: + 1744 .L96: + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1745 .loc 1 692 3 discriminator 2 view .LVU502 + 1746 0050 042D cmp r5, #4 + 1747 0052 05D0 beq .L100 + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1748 .loc 1 692 3 discriminator 4 view .LVU503 + 1749 0054 082D cmp r5, #8 + 1750 0056 07D0 beq .L101 + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1751 .loc 1 692 3 discriminator 7 view .LVU504 + 1752 0058 4523 movs r3, #69 + 1753 005a 0122 movs r2, #1 + 1754 005c E254 strb r2, [r4, r3] + 1755 005e F5E7 b .L97 + 1756 .L100: + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1757 .loc 1 692 3 discriminator 3 view .LVU505 + 1758 0060 4323 movs r3, #67 + 1759 0062 0122 movs r2, #1 + 1760 0064 E254 strb r2, [r4, r3] + 1761 0066 F1E7 b .L97 + 1762 .L101: + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1763 .loc 1 692 3 discriminator 6 view .LVU506 + 1764 0068 4423 movs r3, #68 + 1765 006a 0122 movs r2, #1 + 1766 006c E254 strb r2, [r4, r3] + 1767 006e EDE7 b .L97 + 1768 .L103: + 1769 .align 2 + 1770 .L102: + 1771 0070 11110000 .word 4369 + 1772 0074 44040000 .word 1092 + 1773 0078 FF7FFFFF .word -32769 + 1774 .cfi_endproc + 1775 .LFE51: + 1777 .section .text.HAL_TIMEx_OCN_Start_IT,"ax",%progbits + 1778 .align 1 + 1779 .global HAL_TIMEx_OCN_Start_IT + 1780 .syntax unified + 1781 .code 16 + 1782 .thumb_func + 1784 HAL_TIMEx_OCN_Start_IT: + 1785 .LVL142: + 1786 .LFB52: + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1787 .loc 1 710 1 is_stmt 1 view -0 + 1788 .cfi_startproc + 1789 @ args = 0, pretend = 0, frame = 0 + 1790 @ frame_needed = 0, uses_anonymous_args = 0 + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1791 .loc 1 710 1 is_stmt 0 view .LVU508 + 1792 0000 10B5 push {r4, lr} + 1793 .cfi_def_cfa_offset 8 + 1794 .cfi_offset 4, -8 + ARM GAS /tmp/ccsFKqBV.s page 82 + + + 1795 .cfi_offset 14, -4 + 1796 0002 0400 movs r4, r0 + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1797 .loc 1 711 3 is_stmt 1 view .LVU509 + 1798 .LVL143: + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1799 .loc 1 712 3 view .LVU510 + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1800 .loc 1 715 3 view .LVU511 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1801 .loc 1 718 3 view .LVU512 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1802 .loc 1 718 46 is_stmt 0 view .LVU513 + 1803 0004 0029 cmp r1, #0 + 1804 0006 31D1 bne .L105 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1805 .loc 1 718 7 discriminator 1 view .LVU514 + 1806 0008 4223 movs r3, #66 + 1807 000a C35C ldrb r3, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1808 .loc 1 718 46 discriminator 1 view .LVU515 + 1809 000c 013B subs r3, r3, #1 + 1810 000e 5A1E subs r2, r3, #1 + 1811 0010 9341 sbcs r3, r3, r2 + 1812 0012 DBB2 uxtb r3, r3 + 1813 .L106: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1814 .loc 1 718 6 discriminator 12 view .LVU516 + 1815 0014 002B cmp r3, #0 + 1816 0016 6ED1 bne .L119 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1817 .loc 1 724 3 is_stmt 1 view .LVU517 + 1818 0018 0029 cmp r1, #0 + 1819 001a 40D1 bne .L110 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1820 .loc 1 724 3 is_stmt 0 discriminator 1 view .LVU518 + 1821 001c 4233 adds r3, r3, #66 + 1822 001e 0222 movs r2, #2 + 1823 0020 E254 strb r2, [r4, r3] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1824 .loc 1 726 3 is_stmt 1 view .LVU519 + 1825 .L111: + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1826 .loc 1 731 7 view .LVU520 + 1827 0022 2268 ldr r2, [r4] + 1828 0024 D368 ldr r3, [r2, #12] + 1829 0026 0220 movs r0, #2 + 1830 .LVL144: + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1831 .loc 1 731 7 is_stmt 0 view .LVU521 + 1832 0028 0343 orrs r3, r0 + 1833 002a D360 str r3, [r2, #12] + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1834 .loc 1 732 7 is_stmt 1 view .LVU522 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1835 .loc 1 755 3 view .LVU523 + 1836 .L116: + ARM GAS /tmp/ccsFKqBV.s page 83 + + + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1837 .loc 1 758 5 view .LVU524 + 1838 002c 2268 ldr r2, [r4] + 1839 002e D368 ldr r3, [r2, #12] + 1840 0030 8020 movs r0, #128 + 1841 0032 0343 orrs r3, r0 + 1842 0034 D360 str r3, [r2, #12] + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1843 .loc 1 761 5 view .LVU525 + 1844 0036 2068 ldr r0, [r4] + 1845 0038 0422 movs r2, #4 + 1846 003a FFF7FEFF bl TIM_CCxNChannelCmd + 1847 .LVL145: + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1848 .loc 1 764 5 view .LVU526 + 1849 003e 2268 ldr r2, [r4] + 1850 0040 516C ldr r1, [r2, #68] + 1851 0042 8023 movs r3, #128 + 1852 0044 1B02 lsls r3, r3, #8 + 1853 0046 0B43 orrs r3, r1 + 1854 0048 5364 str r3, [r2, #68] + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1855 .loc 1 767 5 view .LVU527 + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1856 .loc 1 767 9 is_stmt 0 view .LVU528 + 1857 004a 2368 ldr r3, [r4] + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1858 .loc 1 767 8 view .LVU529 + 1859 004c 2C4A ldr r2, .L126 + 1860 004e 9342 cmp r3, r2 + 1861 0050 46D0 beq .L117 + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1862 .loc 1 767 9 discriminator 1 view .LVU530 + 1863 0052 8022 movs r2, #128 + 1864 0054 D205 lsls r2, r2, #23 + 1865 0056 9342 cmp r3, r2 + 1866 0058 42D0 beq .L117 + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1867 .loc 1 767 9 discriminator 2 view .LVU531 + 1868 005a 2A4A ldr r2, .L126+4 + 1869 005c 9342 cmp r3, r2 + 1870 005e 3FD0 beq .L117 + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1871 .loc 1 777 7 is_stmt 1 view .LVU532 + 1872 0060 1A68 ldr r2, [r3] + 1873 0062 0121 movs r1, #1 + 1874 0064 0A43 orrs r2, r1 + 1875 0066 1A60 str r2, [r3] + 1876 0068 0020 movs r0, #0 + 1877 006a 45E0 b .L109 + 1878 .LVL146: + 1879 .L105: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1880 .loc 1 718 46 is_stmt 0 discriminator 2 view .LVU533 + 1881 006c 0429 cmp r1, #4 + 1882 006e 08D0 beq .L122 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 84 + + + 1883 .loc 1 718 46 discriminator 5 view .LVU534 + 1884 0070 0829 cmp r1, #8 + 1885 0072 0DD0 beq .L123 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1886 .loc 1 718 7 discriminator 8 view .LVU535 + 1887 0074 4523 movs r3, #69 + 1888 0076 C35C ldrb r3, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1889 .loc 1 718 46 discriminator 8 view .LVU536 + 1890 0078 013B subs r3, r3, #1 + 1891 007a 5A1E subs r2, r3, #1 + 1892 007c 9341 sbcs r3, r3, r2 + 1893 007e DBB2 uxtb r3, r3 + 1894 0080 C8E7 b .L106 + 1895 .L122: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1896 .loc 1 718 7 discriminator 4 view .LVU537 + 1897 0082 4323 movs r3, #67 + 1898 0084 C35C ldrb r3, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1899 .loc 1 718 46 discriminator 4 view .LVU538 + 1900 0086 013B subs r3, r3, #1 + 1901 0088 5A1E subs r2, r3, #1 + 1902 008a 9341 sbcs r3, r3, r2 + 1903 008c DBB2 uxtb r3, r3 + 1904 008e C1E7 b .L106 + 1905 .L123: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1906 .loc 1 718 7 discriminator 7 view .LVU539 + 1907 0090 4423 movs r3, #68 + 1908 0092 C35C ldrb r3, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1909 .loc 1 718 46 discriminator 7 view .LVU540 + 1910 0094 013B subs r3, r3, #1 + 1911 0096 5A1E subs r2, r3, #1 + 1912 0098 9341 sbcs r3, r3, r2 + 1913 009a DBB2 uxtb r3, r3 + 1914 009c BAE7 b .L106 + 1915 .L110: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1916 .loc 1 724 3 discriminator 2 view .LVU541 + 1917 009e 0429 cmp r1, #4 + 1918 00a0 0CD0 beq .L124 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1919 .loc 1 724 3 discriminator 4 view .LVU542 + 1920 00a2 0829 cmp r1, #8 + 1921 00a4 13D0 beq .L125 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1922 .loc 1 724 3 discriminator 7 view .LVU543 + 1923 00a6 4523 movs r3, #69 + 1924 00a8 0222 movs r2, #2 + 1925 00aa E254 strb r2, [r4, r3] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1926 .loc 1 726 3 is_stmt 1 view .LVU544 + 1927 00ac 0429 cmp r1, #4 + 1928 00ae 08D0 beq .L113 + 1929 00b0 0829 cmp r1, #8 + ARM GAS /tmp/ccsFKqBV.s page 85 + + + 1930 00b2 0FD0 beq .L115 + 1931 00b4 0029 cmp r1, #0 + 1932 00b6 B4D0 beq .L111 + 1933 00b8 0120 movs r0, #1 + 1934 .LVL147: + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1935 .loc 1 726 3 is_stmt 0 view .LVU545 + 1936 00ba 1DE0 b .L109 + 1937 .LVL148: + 1938 .L124: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1939 .loc 1 724 3 discriminator 3 view .LVU546 + 1940 00bc 4323 movs r3, #67 + 1941 00be 0222 movs r2, #2 + 1942 00c0 E254 strb r2, [r4, r3] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1943 .loc 1 726 3 is_stmt 1 view .LVU547 + 1944 .L113: + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1945 .loc 1 738 7 view .LVU548 + 1946 00c2 2268 ldr r2, [r4] + 1947 00c4 D368 ldr r3, [r2, #12] + 1948 00c6 0420 movs r0, #4 + 1949 .LVL149: + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1950 .loc 1 738 7 is_stmt 0 view .LVU549 + 1951 00c8 0343 orrs r3, r0 + 1952 00ca D360 str r3, [r2, #12] + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1953 .loc 1 739 7 is_stmt 1 view .LVU550 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1954 .loc 1 755 3 view .LVU551 + 1955 00cc AEE7 b .L116 + 1956 .LVL150: + 1957 .L125: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1958 .loc 1 724 3 is_stmt 0 discriminator 6 view .LVU552 + 1959 00ce 4423 movs r3, #68 + 1960 00d0 0222 movs r2, #2 + 1961 00d2 E254 strb r2, [r4, r3] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1962 .loc 1 726 3 is_stmt 1 view .LVU553 + 1963 .L115: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1964 .loc 1 745 7 view .LVU554 + 1965 00d4 2268 ldr r2, [r4] + 1966 00d6 D368 ldr r3, [r2, #12] + 1967 00d8 0820 movs r0, #8 + 1968 .LVL151: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1969 .loc 1 745 7 is_stmt 0 view .LVU555 + 1970 00da 0343 orrs r3, r0 + 1971 00dc D360 str r3, [r2, #12] + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1972 .loc 1 746 7 is_stmt 1 view .LVU556 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1973 .loc 1 755 3 view .LVU557 + ARM GAS /tmp/ccsFKqBV.s page 86 + + + 1974 00de A5E7 b .L116 + 1975 .LVL152: + 1976 .L117: + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1977 .loc 1 769 7 view .LVU558 + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1978 .loc 1 769 31 is_stmt 0 view .LVU559 + 1979 00e0 9968 ldr r1, [r3, #8] + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1980 .loc 1 769 15 view .LVU560 + 1981 00e2 0722 movs r2, #7 + 1982 00e4 0A40 ands r2, r1 + 1983 .LVL153: + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1984 .loc 1 770 7 is_stmt 1 view .LVU561 + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1985 .loc 1 770 10 is_stmt 0 view .LVU562 + 1986 00e6 062A cmp r2, #6 + 1987 00e8 07D0 beq .L121 + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1988 .loc 1 772 9 is_stmt 1 view .LVU563 + 1989 00ea 1A68 ldr r2, [r3] + 1990 .LVL154: + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1991 .loc 1 772 9 is_stmt 0 view .LVU564 + 1992 00ec 0121 movs r1, #1 + 1993 .LVL155: + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1994 .loc 1 772 9 view .LVU565 + 1995 00ee 0A43 orrs r2, r1 + 1996 00f0 1A60 str r2, [r3] + 1997 00f2 0020 movs r0, #0 + 1998 00f4 00E0 b .L109 + 1999 .LVL156: + 2000 .L119: + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2001 .loc 1 720 12 view .LVU566 + 2002 00f6 0120 movs r0, #1 + 2003 .LVL157: + 2004 .L109: + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2005 .loc 1 783 1 view .LVU567 + 2006 @ sp needed + 2007 .LVL158: + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2008 .loc 1 783 1 view .LVU568 + 2009 00f8 10BD pop {r4, pc} + 2010 .LVL159: + 2011 .L121: + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2012 .loc 1 783 1 view .LVU569 + 2013 00fa 0020 movs r0, #0 + 2014 00fc FCE7 b .L109 + 2015 .L127: + 2016 00fe C046 .align 2 + 2017 .L126: + 2018 0100 002C0140 .word 1073818624 + ARM GAS /tmp/ccsFKqBV.s page 87 + + + 2019 0104 00040040 .word 1073742848 + 2020 .cfi_endproc + 2021 .LFE52: + 2023 .section .text.HAL_TIMEx_OCN_Stop_IT,"ax",%progbits + 2024 .align 1 + 2025 .global HAL_TIMEx_OCN_Stop_IT + 2026 .syntax unified + 2027 .code 16 + 2028 .thumb_func + 2030 HAL_TIMEx_OCN_Stop_IT: + 2031 .LVL160: + 2032 .LFB53: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2033 .loc 1 797 1 is_stmt 1 view -0 + 2034 .cfi_startproc + 2035 @ args = 0, pretend = 0, frame = 0 + 2036 @ frame_needed = 0, uses_anonymous_args = 0 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2037 .loc 1 797 1 is_stmt 0 view .LVU571 + 2038 0000 70B5 push {r4, r5, r6, lr} + 2039 .cfi_def_cfa_offset 16 + 2040 .cfi_offset 4, -16 + 2041 .cfi_offset 5, -12 + 2042 .cfi_offset 6, -8 + 2043 .cfi_offset 14, -4 + 2044 0002 0400 movs r4, r0 + 2045 0004 0D00 movs r5, r1 + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpccer; + 2046 .loc 1 798 3 is_stmt 1 view .LVU572 + 2047 .LVL161: + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2048 .loc 1 799 3 view .LVU573 + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2049 .loc 1 802 3 view .LVU574 + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2050 .loc 1 804 3 view .LVU575 + 2051 0006 0429 cmp r1, #4 + 2052 0008 37D0 beq .L129 + 2053 000a 0829 cmp r1, #8 + 2054 000c 3BD0 beq .L130 + 2055 000e 0029 cmp r1, #0 + 2056 0010 52D1 bne .L139 + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2057 .loc 1 809 7 view .LVU576 + 2058 0012 0268 ldr r2, [r0] + 2059 0014 D368 ldr r3, [r2, #12] + 2060 0016 0221 movs r1, #2 + 2061 .LVL162: + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2062 .loc 1 809 7 is_stmt 0 view .LVU577 + 2063 0018 8B43 bics r3, r1 + 2064 001a D360 str r3, [r2, #12] + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2065 .loc 1 810 7 is_stmt 1 view .LVU578 + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2066 .loc 1 832 3 view .LVU579 + 2067 .L132: + ARM GAS /tmp/ccsFKqBV.s page 88 + + + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2068 .loc 1 835 5 view .LVU580 + 2069 001c 2068 ldr r0, [r4] + 2070 .LVL163: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2071 .loc 1 835 5 is_stmt 0 view .LVU581 + 2072 001e 0022 movs r2, #0 + 2073 0020 2900 movs r1, r5 + 2074 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 2075 .LVL164: + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) + 2076 .loc 1 838 5 is_stmt 1 view .LVU582 + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) + 2077 .loc 1 838 19 is_stmt 0 view .LVU583 + 2078 0026 2368 ldr r3, [r4] + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) + 2079 .loc 1 838 13 view .LVU584 + 2080 0028 196A ldr r1, [r3, #32] + 2081 .LVL165: + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2082 .loc 1 839 5 is_stmt 1 view .LVU585 + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2083 .loc 1 839 18 is_stmt 0 view .LVU586 + 2084 002a 244A ldr r2, .L142 + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2085 .loc 1 839 8 view .LVU587 + 2086 002c 1142 tst r1, r2 + 2087 002e 03D1 bne .L133 + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2088 .loc 1 841 7 is_stmt 1 view .LVU588 + 2089 0030 DA68 ldr r2, [r3, #12] + 2090 0032 8021 movs r1, #128 + 2091 .LVL166: + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2092 .loc 1 841 7 is_stmt 0 view .LVU589 + 2093 0034 8A43 bics r2, r1 + 2094 0036 DA60 str r2, [r3, #12] + 2095 .L133: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2096 .loc 1 845 5 is_stmt 1 view .LVU590 + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2097 .loc 1 845 5 view .LVU591 + 2098 0038 2368 ldr r3, [r4] + 2099 003a 196A ldr r1, [r3, #32] + 2100 003c 204A ldr r2, .L142+4 + 2101 003e 1142 tst r1, r2 + 2102 0040 07D1 bne .L134 + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2103 .loc 1 845 5 discriminator 1 view .LVU592 + 2104 0042 196A ldr r1, [r3, #32] + 2105 0044 1D4A ldr r2, .L142 + 2106 0046 1142 tst r1, r2 + 2107 0048 03D1 bne .L134 + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2108 .loc 1 845 5 discriminator 3 view .LVU593 + 2109 004a 5A6C ldr r2, [r3, #68] + 2110 004c 1D49 ldr r1, .L142+8 + ARM GAS /tmp/ccsFKqBV.s page 89 + + + 2111 004e 0A40 ands r2, r1 + 2112 0050 5A64 str r2, [r3, #68] + 2113 .L134: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2114 .loc 1 845 5 discriminator 5 view .LVU594 + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2115 .loc 1 848 5 view .LVU595 + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2116 .loc 1 848 5 view .LVU596 + 2117 0052 2368 ldr r3, [r4] + 2118 0054 196A ldr r1, [r3, #32] + 2119 0056 1A4A ldr r2, .L142+4 + 2120 0058 1142 tst r1, r2 + 2121 005a 07D1 bne .L135 + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2122 .loc 1 848 5 discriminator 1 view .LVU597 + 2123 005c 196A ldr r1, [r3, #32] + 2124 005e 174A ldr r2, .L142 + 2125 0060 1142 tst r1, r2 + 2126 0062 03D1 bne .L135 + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2127 .loc 1 848 5 discriminator 3 view .LVU598 + 2128 0064 1A68 ldr r2, [r3] + 2129 0066 0121 movs r1, #1 + 2130 0068 8A43 bics r2, r1 + 2131 006a 1A60 str r2, [r3] + 2132 .L135: + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2133 .loc 1 848 5 discriminator 5 view .LVU599 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2134 .loc 1 851 5 view .LVU600 + 2135 006c 002D cmp r5, #0 + 2136 006e 10D1 bne .L136 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2137 .loc 1 851 5 is_stmt 0 discriminator 1 view .LVU601 + 2138 0070 4223 movs r3, #66 + 2139 0072 0122 movs r2, #1 + 2140 0074 E254 strb r2, [r4, r3] + 2141 0076 0020 movs r0, #0 + 2142 .LVL167: + 2143 .L131: + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2144 .loc 1 855 3 is_stmt 1 view .LVU602 + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2145 .loc 1 856 1 is_stmt 0 view .LVU603 + 2146 @ sp needed + 2147 .LVL168: + 2148 .LVL169: + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2149 .loc 1 856 1 view .LVU604 + 2150 0078 70BD pop {r4, r5, r6, pc} + 2151 .LVL170: + 2152 .L129: + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2153 .loc 1 816 7 is_stmt 1 view .LVU605 + 2154 007a 0268 ldr r2, [r0] + 2155 007c D368 ldr r3, [r2, #12] + ARM GAS /tmp/ccsFKqBV.s page 90 + + + 2156 007e 0421 movs r1, #4 + 2157 .LVL171: + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2158 .loc 1 816 7 is_stmt 0 view .LVU606 + 2159 0080 8B43 bics r3, r1 + 2160 0082 D360 str r3, [r2, #12] + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2161 .loc 1 817 7 is_stmt 1 view .LVU607 + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2162 .loc 1 832 3 view .LVU608 + 2163 0084 CAE7 b .L132 + 2164 .LVL172: + 2165 .L130: + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2166 .loc 1 823 7 view .LVU609 + 2167 0086 0268 ldr r2, [r0] + 2168 0088 D368 ldr r3, [r2, #12] + 2169 008a 0821 movs r1, #8 + 2170 .LVL173: + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2171 .loc 1 823 7 is_stmt 0 view .LVU610 + 2172 008c 8B43 bics r3, r1 + 2173 008e D360 str r3, [r2, #12] + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2174 .loc 1 824 7 is_stmt 1 view .LVU611 + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2175 .loc 1 832 3 view .LVU612 + 2176 0090 C4E7 b .L132 + 2177 .LVL174: + 2178 .L136: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2179 .loc 1 851 5 is_stmt 0 discriminator 2 view .LVU613 + 2180 0092 042D cmp r5, #4 + 2181 0094 06D0 beq .L140 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2182 .loc 1 851 5 discriminator 4 view .LVU614 + 2183 0096 082D cmp r5, #8 + 2184 0098 09D0 beq .L141 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2185 .loc 1 851 5 discriminator 7 view .LVU615 + 2186 009a 4523 movs r3, #69 + 2187 009c 0122 movs r2, #1 + 2188 009e E254 strb r2, [r4, r3] + 2189 00a0 0020 movs r0, #0 + 2190 00a2 E9E7 b .L131 + 2191 .L140: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2192 .loc 1 851 5 discriminator 3 view .LVU616 + 2193 00a4 4323 movs r3, #67 + 2194 00a6 0122 movs r2, #1 + 2195 00a8 E254 strb r2, [r4, r3] + 2196 00aa 0020 movs r0, #0 + 2197 00ac E4E7 b .L131 + 2198 .L141: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2199 .loc 1 851 5 discriminator 6 view .LVU617 + 2200 00ae 4423 movs r3, #68 + ARM GAS /tmp/ccsFKqBV.s page 91 + + + 2201 00b0 0122 movs r2, #1 + 2202 00b2 E254 strb r2, [r4, r3] + 2203 00b4 0020 movs r0, #0 + 2204 00b6 DFE7 b .L131 + 2205 .LVL175: + 2206 .L139: + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2207 .loc 1 804 3 view .LVU618 + 2208 00b8 0120 movs r0, #1 + 2209 .LVL176: + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2210 .loc 1 804 3 view .LVU619 + 2211 00ba DDE7 b .L131 + 2212 .L143: + 2213 .align 2 + 2214 .L142: + 2215 00bc 44040000 .word 1092 + 2216 00c0 11110000 .word 4369 + 2217 00c4 FF7FFFFF .word -32769 + 2218 .cfi_endproc + 2219 .LFE53: + 2221 .section .text.HAL_TIMEx_OCN_Start_DMA,"ax",%progbits + 2222 .align 1 + 2223 .global HAL_TIMEx_OCN_Start_DMA + 2224 .syntax unified + 2225 .code 16 + 2226 .thumb_func + 2228 HAL_TIMEx_OCN_Start_DMA: + 2229 .LVL177: + 2230 .LFB54: + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2231 .loc 1 873 1 is_stmt 1 view -0 + 2232 .cfi_startproc + 2233 @ args = 0, pretend = 0, frame = 0 + 2234 @ frame_needed = 0, uses_anonymous_args = 0 + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2235 .loc 1 873 1 is_stmt 0 view .LVU621 + 2236 0000 70B5 push {r4, r5, r6, lr} + 2237 .cfi_def_cfa_offset 16 + 2238 .cfi_offset 4, -16 + 2239 .cfi_offset 5, -12 + 2240 .cfi_offset 6, -8 + 2241 .cfi_offset 14, -4 + 2242 0002 0600 movs r6, r0 + 2243 0004 0D00 movs r5, r1 + 2244 0006 1100 movs r1, r2 + 2245 .LVL178: + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2246 .loc 1 874 3 is_stmt 1 view .LVU622 + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2247 .loc 1 875 3 view .LVU623 + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2248 .loc 1 878 3 view .LVU624 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2249 .loc 1 881 3 view .LVU625 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2250 .loc 1 881 46 is_stmt 0 view .LVU626 + ARM GAS /tmp/ccsFKqBV.s page 92 + + + 2251 0008 002D cmp r5, #0 + 2252 000a 52D1 bne .L145 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2253 .loc 1 881 7 discriminator 1 view .LVU627 + 2254 000c 4222 movs r2, #66 + 2255 .LVL179: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2256 .loc 1 881 7 discriminator 1 view .LVU628 + 2257 000e 845C ldrb r4, [r0, r2] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2258 .loc 1 881 46 discriminator 1 view .LVU629 + 2259 0010 023C subs r4, r4, #2 + 2260 0012 6242 rsbs r2, r4, #0 + 2261 0014 5441 adcs r4, r4, r2 + 2262 0016 E4B2 uxtb r4, r4 + 2263 .L146: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2264 .loc 1 881 6 discriminator 12 view .LVU630 + 2265 0018 002C cmp r4, #0 + 2266 001a 00D0 beq .LCB2062 + 2267 001c C9E0 b .L163 @long jump + 2268 .LCB2062: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2269 .loc 1 885 8 is_stmt 1 view .LVU631 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2270 .loc 1 885 51 is_stmt 0 view .LVU632 + 2271 001e 002D cmp r5, #0 + 2272 0020 60D1 bne .L150 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2273 .loc 1 885 12 discriminator 1 view .LVU633 + 2274 0022 4222 movs r2, #66 + 2275 0024 B25C ldrb r2, [r6, r2] + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2276 .loc 1 885 51 discriminator 1 view .LVU634 + 2277 0026 013A subs r2, r2, #1 + 2278 0028 5042 rsbs r0, r2, #0 + 2279 002a 4241 adcs r2, r2, r0 + 2280 .LVL180: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2281 .loc 1 885 51 discriminator 1 view .LVU635 + 2282 002c D2B2 uxtb r2, r2 + 2283 .L151: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2284 .loc 1 885 11 discriminator 12 view .LVU636 + 2285 002e 002A cmp r2, #0 + 2286 0030 00D1 bne .LCB2076 + 2287 0032 C0E0 b .L164 @long jump + 2288 .LCB2076: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2289 .loc 1 887 5 is_stmt 1 view .LVU637 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2290 .loc 1 887 8 is_stmt 0 view .LVU638 + 2291 0034 0029 cmp r1, #0 + 2292 0036 00D1 bne .LCB2079 + 2293 0038 BFE0 b .L165 @long jump + 2294 .LCB2079: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 93 + + + 2295 .loc 1 887 25 discriminator 1 view .LVU639 + 2296 003a 002B cmp r3, #0 + 2297 003c 00D1 bne .LCB2081 + 2298 003e BEE0 b .L166 @long jump + 2299 .LCB2081: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2300 .loc 1 893 7 is_stmt 1 view .LVU640 + 2301 0040 002D cmp r5, #0 + 2302 0042 68D1 bne .L154 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2303 .loc 1 893 7 is_stmt 0 discriminator 1 view .LVU641 + 2304 0044 4222 movs r2, #66 + 2305 0046 0220 movs r0, #2 + 2306 0048 B054 strb r0, [r6, r2] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2307 .loc 1 901 3 is_stmt 1 view .LVU642 + 2308 .L155: + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2309 .loc 1 906 7 view .LVU643 + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2310 .loc 1 906 17 is_stmt 0 view .LVU644 + 2311 004a 726A ldr r2, [r6, #36] + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2312 .loc 1 906 52 view .LVU645 + 2313 004c 6148 ldr r0, .L178 + 2314 004e 9062 str r0, [r2, #40] + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2315 .loc 1 907 7 is_stmt 1 view .LVU646 + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2316 .loc 1 907 17 is_stmt 0 view .LVU647 + 2317 0050 726A ldr r2, [r6, #36] + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2318 .loc 1 907 56 view .LVU648 + 2319 0052 6148 ldr r0, .L178+4 + 2320 0054 D062 str r0, [r2, #44] + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2321 .loc 1 910 7 is_stmt 1 view .LVU649 + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2322 .loc 1 910 17 is_stmt 0 view .LVU650 + 2323 0056 726A ldr r2, [r6, #36] + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2324 .loc 1 910 53 view .LVU651 + 2325 0058 6048 ldr r0, .L178+8 + 2326 005a 1063 str r0, [r2, #48] + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2327 .loc 1 913 7 is_stmt 1 view .LVU652 + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2328 .loc 1 913 88 is_stmt 0 view .LVU653 + 2329 005c 3268 ldr r2, [r6] + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2330 .loc 1 913 83 view .LVU654 + 2331 005e 3432 adds r2, r2, #52 + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2332 .loc 1 913 11 view .LVU655 + 2333 0060 706A ldr r0, [r6, #36] + 2334 0062 FFF7FEFF bl HAL_DMA_Start_IT + 2335 .LVL181: + ARM GAS /tmp/ccsFKqBV.s page 94 + + + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2336 .loc 1 913 10 discriminator 1 view .LVU656 + 2337 0066 0028 cmp r0, #0 + 2338 0068 00D0 beq .LCB2113 + 2339 006a AAE0 b .L168 @long jump + 2340 .LCB2113: + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2341 .loc 1 920 7 is_stmt 1 view .LVU657 + 2342 006c 3268 ldr r2, [r6] + 2343 006e D168 ldr r1, [r2, #12] + 2344 0070 8023 movs r3, #128 + 2345 0072 9B00 lsls r3, r3, #2 + 2346 0074 0B43 orrs r3, r1 + 2347 0076 D360 str r3, [r2, #12] + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2348 .loc 1 921 7 view .LVU658 + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2349 .loc 1 971 3 view .LVU659 + 2350 .L160: + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2351 .loc 1 974 5 view .LVU660 + 2352 0078 3068 ldr r0, [r6] + 2353 007a 0422 movs r2, #4 + 2354 007c 2900 movs r1, r5 + 2355 007e FFF7FEFF bl TIM_CCxNChannelCmd + 2356 .LVL182: + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2357 .loc 1 977 5 view .LVU661 + 2358 0082 3268 ldr r2, [r6] + 2359 0084 516C ldr r1, [r2, #68] + 2360 0086 8023 movs r3, #128 + 2361 0088 1B02 lsls r3, r3, #8 + 2362 008a 0B43 orrs r3, r1 + 2363 008c 5364 str r3, [r2, #68] + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2364 .loc 1 980 5 view .LVU662 + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2365 .loc 1 980 9 is_stmt 0 view .LVU663 + 2366 008e 3368 ldr r3, [r6] + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2367 .loc 1 980 8 view .LVU664 + 2368 0090 534A ldr r2, .L178+12 + 2369 0092 9342 cmp r3, r2 + 2370 0094 00D1 bne .LCB2143 + 2371 0096 81E0 b .L161 @long jump + 2372 .LCB2143: + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2373 .loc 1 980 9 discriminator 1 view .LVU665 + 2374 0098 8022 movs r2, #128 + 2375 009a D205 lsls r2, r2, #23 + 2376 009c 9342 cmp r3, r2 + 2377 009e 7DD0 beq .L161 + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2378 .loc 1 980 9 discriminator 2 view .LVU666 + 2379 00a0 504A ldr r2, .L178+16 + 2380 00a2 9342 cmp r3, r2 + 2381 00a4 7AD0 beq .L161 + ARM GAS /tmp/ccsFKqBV.s page 95 + + + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2382 .loc 1 990 7 is_stmt 1 view .LVU667 + 2383 00a6 1A68 ldr r2, [r3] + 2384 00a8 0121 movs r1, #1 + 2385 00aa 0A43 orrs r2, r1 + 2386 00ac 1A60 str r2, [r3] + 2387 00ae 0020 movs r0, #0 + 2388 00b0 82E0 b .L149 + 2389 .LVL183: + 2390 .L145: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2391 .loc 1 881 46 is_stmt 0 discriminator 2 view .LVU668 + 2392 00b2 042D cmp r5, #4 + 2393 00b4 08D0 beq .L172 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2394 .loc 1 881 46 discriminator 5 view .LVU669 + 2395 00b6 082D cmp r5, #8 + 2396 00b8 0DD0 beq .L173 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2397 .loc 1 881 7 discriminator 8 view .LVU670 + 2398 00ba 4522 movs r2, #69 + 2399 00bc 845C ldrb r4, [r0, r2] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2400 .loc 1 881 46 discriminator 8 view .LVU671 + 2401 00be 023C subs r4, r4, #2 + 2402 00c0 6242 rsbs r2, r4, #0 + 2403 00c2 5441 adcs r4, r4, r2 + 2404 00c4 E4B2 uxtb r4, r4 + 2405 00c6 A7E7 b .L146 + 2406 .L172: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2407 .loc 1 881 7 discriminator 4 view .LVU672 + 2408 00c8 4322 movs r2, #67 + 2409 00ca 845C ldrb r4, [r0, r2] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2410 .loc 1 881 46 discriminator 4 view .LVU673 + 2411 00cc 023C subs r4, r4, #2 + 2412 00ce 6242 rsbs r2, r4, #0 + 2413 00d0 5441 adcs r4, r4, r2 + 2414 00d2 E4B2 uxtb r4, r4 + 2415 00d4 A0E7 b .L146 + 2416 .L173: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2417 .loc 1 881 7 discriminator 7 view .LVU674 + 2418 00d6 4422 movs r2, #68 + 2419 00d8 845C ldrb r4, [r0, r2] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2420 .loc 1 881 46 discriminator 7 view .LVU675 + 2421 00da 023C subs r4, r4, #2 + 2422 00dc 6242 rsbs r2, r4, #0 + 2423 00de 5441 adcs r4, r4, r2 + 2424 00e0 E4B2 uxtb r4, r4 + 2425 00e2 99E7 b .L146 + 2426 .L150: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2427 .loc 1 885 51 discriminator 2 view .LVU676 + 2428 00e4 042D cmp r5, #4 + ARM GAS /tmp/ccsFKqBV.s page 96 + + + 2429 00e6 08D0 beq .L174 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2430 .loc 1 885 51 discriminator 5 view .LVU677 + 2431 00e8 082D cmp r5, #8 + 2432 00ea 0DD0 beq .L175 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2433 .loc 1 885 12 discriminator 8 view .LVU678 + 2434 00ec 4522 movs r2, #69 + 2435 00ee B25C ldrb r2, [r6, r2] + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2436 .loc 1 885 51 discriminator 8 view .LVU679 + 2437 00f0 013A subs r2, r2, #1 + 2438 00f2 5042 rsbs r0, r2, #0 + 2439 00f4 4241 adcs r2, r2, r0 + 2440 .LVL184: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2441 .loc 1 885 51 discriminator 8 view .LVU680 + 2442 00f6 D2B2 uxtb r2, r2 + 2443 00f8 99E7 b .L151 + 2444 .LVL185: + 2445 .L174: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2446 .loc 1 885 12 discriminator 4 view .LVU681 + 2447 00fa 4322 movs r2, #67 + 2448 00fc B25C ldrb r2, [r6, r2] + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2449 .loc 1 885 51 discriminator 4 view .LVU682 + 2450 00fe 013A subs r2, r2, #1 + 2451 0100 5042 rsbs r0, r2, #0 + 2452 0102 4241 adcs r2, r2, r0 + 2453 .LVL186: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2454 .loc 1 885 51 discriminator 4 view .LVU683 + 2455 0104 D2B2 uxtb r2, r2 + 2456 0106 92E7 b .L151 + 2457 .LVL187: + 2458 .L175: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2459 .loc 1 885 12 discriminator 7 view .LVU684 + 2460 0108 4422 movs r2, #68 + 2461 010a B25C ldrb r2, [r6, r2] + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2462 .loc 1 885 51 discriminator 7 view .LVU685 + 2463 010c 013A subs r2, r2, #1 + 2464 010e 5042 rsbs r0, r2, #0 + 2465 0110 4241 adcs r2, r2, r0 + 2466 .LVL188: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2467 .loc 1 885 51 discriminator 7 view .LVU686 + 2468 0112 D2B2 uxtb r2, r2 + 2469 0114 8BE7 b .L151 + 2470 .L154: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2471 .loc 1 893 7 discriminator 2 view .LVU687 + 2472 0116 042D cmp r5, #4 + 2473 0118 0CD0 beq .L176 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccsFKqBV.s page 97 + + + 2474 .loc 1 893 7 discriminator 4 view .LVU688 + 2475 011a 082D cmp r5, #8 + 2476 011c 24D0 beq .L177 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2477 .loc 1 893 7 discriminator 7 view .LVU689 + 2478 011e 4522 movs r2, #69 + 2479 0120 0220 movs r0, #2 + 2480 0122 B054 strb r0, [r6, r2] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2481 .loc 1 901 3 is_stmt 1 view .LVU690 + 2482 0124 042D cmp r5, #4 + 2483 0126 08D0 beq .L157 + 2484 0128 082D cmp r5, #8 + 2485 012a 20D0 beq .L159 + 2486 012c 002D cmp r5, #0 + 2487 012e 8CD0 beq .L155 + 2488 0130 0120 movs r0, #1 + 2489 0132 41E0 b .L149 + 2490 .L176: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2491 .loc 1 893 7 is_stmt 0 discriminator 3 view .LVU691 + 2492 0134 4322 movs r2, #67 + 2493 0136 0220 movs r0, #2 + 2494 0138 B054 strb r0, [r6, r2] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2495 .loc 1 901 3 is_stmt 1 view .LVU692 + 2496 .L157: + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2497 .loc 1 927 7 view .LVU693 + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2498 .loc 1 927 17 is_stmt 0 view .LVU694 + 2499 013a B26A ldr r2, [r6, #40] + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2500 .loc 1 927 52 view .LVU695 + 2501 013c 2548 ldr r0, .L178 + 2502 013e 9062 str r0, [r2, #40] + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2503 .loc 1 928 7 is_stmt 1 view .LVU696 + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2504 .loc 1 928 17 is_stmt 0 view .LVU697 + 2505 0140 B26A ldr r2, [r6, #40] + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2506 .loc 1 928 56 view .LVU698 + 2507 0142 2548 ldr r0, .L178+4 + 2508 0144 D062 str r0, [r2, #44] + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2509 .loc 1 931 7 is_stmt 1 view .LVU699 + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2510 .loc 1 931 17 is_stmt 0 view .LVU700 + 2511 0146 B26A ldr r2, [r6, #40] + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2512 .loc 1 931 53 view .LVU701 + 2513 0148 2448 ldr r0, .L178+8 + 2514 014a 1063 str r0, [r2, #48] + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2515 .loc 1 934 7 is_stmt 1 view .LVU702 + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + ARM GAS /tmp/ccsFKqBV.s page 98 + + + 2516 .loc 1 934 88 is_stmt 0 view .LVU703 + 2517 014c 3268 ldr r2, [r6] + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2518 .loc 1 934 83 view .LVU704 + 2519 014e 3832 adds r2, r2, #56 + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2520 .loc 1 934 11 view .LVU705 + 2521 0150 B06A ldr r0, [r6, #40] + 2522 0152 FFF7FEFF bl HAL_DMA_Start_IT + 2523 .LVL189: + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2524 .loc 1 934 10 discriminator 1 view .LVU706 + 2525 0156 0028 cmp r0, #0 + 2526 0158 35D1 bne .L169 + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2527 .loc 1 941 7 is_stmt 1 view .LVU707 + 2528 015a 3268 ldr r2, [r6] + 2529 015c D168 ldr r1, [r2, #12] + 2530 015e 8023 movs r3, #128 + 2531 0160 DB00 lsls r3, r3, #3 + 2532 0162 0B43 orrs r3, r1 + 2533 0164 D360 str r3, [r2, #12] + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2534 .loc 1 942 7 view .LVU708 + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2535 .loc 1 971 3 view .LVU709 + 2536 0166 87E7 b .L160 + 2537 .LVL190: + 2538 .L177: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2539 .loc 1 893 7 is_stmt 0 discriminator 6 view .LVU710 + 2540 0168 4422 movs r2, #68 + 2541 016a 0220 movs r0, #2 + 2542 016c B054 strb r0, [r6, r2] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2543 .loc 1 901 3 is_stmt 1 view .LVU711 + 2544 .L159: + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2545 .loc 1 948 7 view .LVU712 + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2546 .loc 1 948 17 is_stmt 0 view .LVU713 + 2547 016e F26A ldr r2, [r6, #44] + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2548 .loc 1 948 52 view .LVU714 + 2549 0170 1848 ldr r0, .L178 + 2550 0172 9062 str r0, [r2, #40] + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2551 .loc 1 949 7 is_stmt 1 view .LVU715 + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2552 .loc 1 949 17 is_stmt 0 view .LVU716 + 2553 0174 F26A ldr r2, [r6, #44] + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2554 .loc 1 949 56 view .LVU717 + 2555 0176 1848 ldr r0, .L178+4 + 2556 0178 D062 str r0, [r2, #44] + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2557 .loc 1 952 7 is_stmt 1 view .LVU718 + ARM GAS /tmp/ccsFKqBV.s page 99 + + + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2558 .loc 1 952 17 is_stmt 0 view .LVU719 + 2559 017a F26A ldr r2, [r6, #44] + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2560 .loc 1 952 53 view .LVU720 + 2561 017c 1748 ldr r0, .L178+8 + 2562 017e 1063 str r0, [r2, #48] + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2563 .loc 1 955 7 is_stmt 1 view .LVU721 + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2564 .loc 1 955 88 is_stmt 0 view .LVU722 + 2565 0180 3268 ldr r2, [r6] + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2566 .loc 1 955 83 view .LVU723 + 2567 0182 3C32 adds r2, r2, #60 + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2568 .loc 1 955 11 view .LVU724 + 2569 0184 F06A ldr r0, [r6, #44] + 2570 0186 FFF7FEFF bl HAL_DMA_Start_IT + 2571 .LVL191: + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2572 .loc 1 955 10 discriminator 1 view .LVU725 + 2573 018a 0028 cmp r0, #0 + 2574 018c 1DD1 bne .L170 + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2575 .loc 1 962 7 is_stmt 1 view .LVU726 + 2576 018e 3268 ldr r2, [r6] + 2577 0190 D168 ldr r1, [r2, #12] + 2578 0192 8023 movs r3, #128 + 2579 0194 1B01 lsls r3, r3, #4 + 2580 0196 0B43 orrs r3, r1 + 2581 0198 D360 str r3, [r2, #12] + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2582 .loc 1 963 7 view .LVU727 + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2583 .loc 1 971 3 view .LVU728 + 2584 019a 6DE7 b .L160 + 2585 .L161: + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2586 .loc 1 982 7 view .LVU729 + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2587 .loc 1 982 31 is_stmt 0 view .LVU730 + 2588 019c 9968 ldr r1, [r3, #8] + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2589 .loc 1 982 15 view .LVU731 + 2590 019e 0722 movs r2, #7 + 2591 01a0 0A40 ands r2, r1 + 2592 .LVL192: + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2593 .loc 1 983 7 is_stmt 1 view .LVU732 + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2594 .loc 1 983 10 is_stmt 0 view .LVU733 + 2595 01a2 062A cmp r2, #6 + 2596 01a4 13D0 beq .L171 + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2597 .loc 1 985 9 is_stmt 1 view .LVU734 + 2598 01a6 1A68 ldr r2, [r3] + ARM GAS /tmp/ccsFKqBV.s page 100 + + + 2599 .LVL193: + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2600 .loc 1 985 9 is_stmt 0 view .LVU735 + 2601 01a8 0121 movs r1, #1 + 2602 .LVL194: + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2603 .loc 1 985 9 view .LVU736 + 2604 01aa 0A43 orrs r2, r1 + 2605 01ac 1A60 str r2, [r3] + 2606 01ae 0020 movs r0, #0 + 2607 01b0 02E0 b .L149 + 2608 .LVL195: + 2609 .L163: + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2610 .loc 1 883 12 view .LVU737 + 2611 01b2 0220 movs r0, #2 + 2612 .LVL196: + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2613 .loc 1 883 12 view .LVU738 + 2614 01b4 00E0 b .L149 + 2615 .L164: + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2616 .loc 1 898 12 view .LVU739 + 2617 01b6 0120 movs r0, #1 + 2618 .LVL197: + 2619 .L149: + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2620 .loc 1 996 1 view .LVU740 + 2621 @ sp needed + 2622 .LVL198: + 2623 .LVL199: + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2624 .loc 1 996 1 view .LVU741 + 2625 01b8 70BD pop {r4, r5, r6, pc} + 2626 .LVL200: + 2627 .L165: + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2628 .loc 1 889 14 view .LVU742 + 2629 01ba 0120 movs r0, #1 + 2630 01bc FCE7 b .L149 + 2631 .L166: + 2632 01be 0120 movs r0, #1 + 2633 01c0 FAE7 b .L149 + 2634 .LVL201: + 2635 .L168: + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2636 .loc 1 917 16 view .LVU743 + 2637 01c2 0120 movs r0, #1 + 2638 01c4 F8E7 b .L149 + 2639 .L169: + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2640 .loc 1 938 16 view .LVU744 + 2641 01c6 0120 movs r0, #1 + 2642 01c8 F6E7 b .L149 + 2643 .L170: + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2644 .loc 1 959 16 view .LVU745 + ARM GAS /tmp/ccsFKqBV.s page 101 + + + 2645 01ca 0120 movs r0, #1 + 2646 01cc F4E7 b .L149 + 2647 .LVL202: + 2648 .L171: + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2649 .loc 1 959 16 view .LVU746 + 2650 01ce 0020 movs r0, #0 + 2651 01d0 F2E7 b .L149 + 2652 .L179: + 2653 01d2 C046 .align 2 + 2654 .L178: + 2655 01d4 00000000 .word TIM_DMADelayPulseNCplt + 2656 01d8 00000000 .word TIM_DMADelayPulseHalfCplt + 2657 01dc 00000000 .word TIM_DMAErrorCCxN + 2658 01e0 002C0140 .word 1073818624 + 2659 01e4 00040040 .word 1073742848 + 2660 .cfi_endproc + 2661 .LFE54: + 2663 .section .text.HAL_TIMEx_OCN_Stop_DMA,"ax",%progbits + 2664 .align 1 + 2665 .global HAL_TIMEx_OCN_Stop_DMA + 2666 .syntax unified + 2667 .code 16 + 2668 .thumb_func + 2670 HAL_TIMEx_OCN_Stop_DMA: + 2671 .LVL203: + 2672 .LFB55: +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2673 .loc 1 1010 1 is_stmt 1 view -0 + 2674 .cfi_startproc + 2675 @ args = 0, pretend = 0, frame = 0 + 2676 @ frame_needed = 0, uses_anonymous_args = 0 +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2677 .loc 1 1010 1 is_stmt 0 view .LVU748 + 2678 0000 70B5 push {r4, r5, r6, lr} + 2679 .cfi_def_cfa_offset 16 + 2680 .cfi_offset 4, -16 + 2681 .cfi_offset 5, -12 + 2682 .cfi_offset 6, -8 + 2683 .cfi_offset 14, -4 + 2684 0002 0400 movs r4, r0 + 2685 0004 0D00 movs r5, r1 +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2686 .loc 1 1011 3 is_stmt 1 view .LVU749 + 2687 .LVL204: +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2688 .loc 1 1014 3 view .LVU750 +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2689 .loc 1 1016 3 view .LVU751 + 2690 0006 0429 cmp r1, #4 + 2691 0008 31D0 beq .L181 + 2692 000a 0829 cmp r1, #8 + 2693 000c 38D0 beq .L182 + 2694 000e 0029 cmp r1, #0 + 2695 0010 52D1 bne .L190 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 2696 .loc 1 1021 7 view .LVU752 + ARM GAS /tmp/ccsFKqBV.s page 102 + + + 2697 0012 0268 ldr r2, [r0] + 2698 0014 D368 ldr r3, [r2, #12] + 2699 0016 2949 ldr r1, .L193 + 2700 .LVL205: +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 2701 .loc 1 1021 7 is_stmt 0 view .LVU753 + 2702 0018 0B40 ands r3, r1 + 2703 001a D360 str r3, [r2, #12] +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2704 .loc 1 1022 7 is_stmt 1 view .LVU754 +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2705 .loc 1 1022 13 is_stmt 0 view .LVU755 + 2706 001c 406A ldr r0, [r0, #36] + 2707 .LVL206: +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2708 .loc 1 1022 13 view .LVU756 + 2709 001e FFF7FEFF bl HAL_DMA_Abort_IT + 2710 .LVL207: +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2711 .loc 1 1023 7 is_stmt 1 view .LVU757 +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2712 .loc 1 1047 3 view .LVU758 + 2713 .L184: +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2714 .loc 1 1050 5 view .LVU759 + 2715 0022 2068 ldr r0, [r4] + 2716 0024 0022 movs r2, #0 + 2717 0026 2900 movs r1, r5 + 2718 0028 FFF7FEFF bl TIM_CCxNChannelCmd + 2719 .LVL208: +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2720 .loc 1 1053 5 view .LVU760 +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2721 .loc 1 1053 5 view .LVU761 + 2722 002c 2368 ldr r3, [r4] + 2723 002e 196A ldr r1, [r3, #32] + 2724 0030 234A ldr r2, .L193+4 + 2725 0032 1142 tst r1, r2 + 2726 0034 07D1 bne .L185 +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2727 .loc 1 1053 5 discriminator 1 view .LVU762 + 2728 0036 196A ldr r1, [r3, #32] + 2729 0038 224A ldr r2, .L193+8 + 2730 003a 1142 tst r1, r2 + 2731 003c 03D1 bne .L185 +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2732 .loc 1 1053 5 discriminator 3 view .LVU763 + 2733 003e 5A6C ldr r2, [r3, #68] + 2734 0040 2149 ldr r1, .L193+12 + 2735 0042 0A40 ands r2, r1 + 2736 0044 5A64 str r2, [r3, #68] + 2737 .L185: +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2738 .loc 1 1053 5 discriminator 5 view .LVU764 +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2739 .loc 1 1056 5 view .LVU765 +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 103 + + + 2740 .loc 1 1056 5 view .LVU766 + 2741 0046 2368 ldr r3, [r4] + 2742 0048 196A ldr r1, [r3, #32] + 2743 004a 1D4A ldr r2, .L193+4 + 2744 004c 1142 tst r1, r2 + 2745 004e 07D1 bne .L186 +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2746 .loc 1 1056 5 discriminator 1 view .LVU767 + 2747 0050 196A ldr r1, [r3, #32] + 2748 0052 1C4A ldr r2, .L193+8 + 2749 0054 1142 tst r1, r2 + 2750 0056 03D1 bne .L186 +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2751 .loc 1 1056 5 discriminator 3 view .LVU768 + 2752 0058 1A68 ldr r2, [r3] + 2753 005a 0121 movs r1, #1 + 2754 005c 8A43 bics r2, r1 + 2755 005e 1A60 str r2, [r3] + 2756 .L186: +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2757 .loc 1 1056 5 discriminator 5 view .LVU769 +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2758 .loc 1 1059 5 view .LVU770 + 2759 0060 002D cmp r5, #0 + 2760 0062 16D1 bne .L187 +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2761 .loc 1 1059 5 is_stmt 0 discriminator 1 view .LVU771 + 2762 0064 4223 movs r3, #66 + 2763 0066 0122 movs r2, #1 + 2764 0068 E254 strb r2, [r4, r3] + 2765 006a 0020 movs r0, #0 + 2766 .L183: + 2767 .LVL209: +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2768 .loc 1 1063 3 is_stmt 1 view .LVU772 +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2769 .loc 1 1064 1 is_stmt 0 view .LVU773 + 2770 @ sp needed + 2771 .LVL210: + 2772 .LVL211: +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2773 .loc 1 1064 1 view .LVU774 + 2774 006c 70BD pop {r4, r5, r6, pc} + 2775 .LVL212: + 2776 .L181: +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 2777 .loc 1 1029 7 is_stmt 1 view .LVU775 + 2778 006e 0268 ldr r2, [r0] + 2779 0070 D368 ldr r3, [r2, #12] + 2780 0072 1649 ldr r1, .L193+16 + 2781 .LVL213: +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 2782 .loc 1 1029 7 is_stmt 0 view .LVU776 + 2783 0074 0B40 ands r3, r1 + 2784 0076 D360 str r3, [r2, #12] +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2785 .loc 1 1030 7 is_stmt 1 view .LVU777 + ARM GAS /tmp/ccsFKqBV.s page 104 + + +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2786 .loc 1 1030 13 is_stmt 0 view .LVU778 + 2787 0078 806A ldr r0, [r0, #40] + 2788 .LVL214: +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2789 .loc 1 1030 13 view .LVU779 + 2790 007a FFF7FEFF bl HAL_DMA_Abort_IT + 2791 .LVL215: +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2792 .loc 1 1031 7 is_stmt 1 view .LVU780 +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2793 .loc 1 1047 3 view .LVU781 + 2794 007e D0E7 b .L184 + 2795 .LVL216: + 2796 .L182: +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 2797 .loc 1 1037 7 view .LVU782 + 2798 0080 0268 ldr r2, [r0] + 2799 0082 D368 ldr r3, [r2, #12] + 2800 0084 1249 ldr r1, .L193+20 + 2801 .LVL217: +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 2802 .loc 1 1037 7 is_stmt 0 view .LVU783 + 2803 0086 0B40 ands r3, r1 + 2804 0088 D360 str r3, [r2, #12] +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2805 .loc 1 1038 7 is_stmt 1 view .LVU784 +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2806 .loc 1 1038 13 is_stmt 0 view .LVU785 + 2807 008a C06A ldr r0, [r0, #44] + 2808 .LVL218: +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2809 .loc 1 1038 13 view .LVU786 + 2810 008c FFF7FEFF bl HAL_DMA_Abort_IT + 2811 .LVL219: +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2812 .loc 1 1039 7 is_stmt 1 view .LVU787 +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2813 .loc 1 1047 3 view .LVU788 + 2814 0090 C7E7 b .L184 + 2815 .L187: +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2816 .loc 1 1059 5 is_stmt 0 discriminator 2 view .LVU789 + 2817 0092 042D cmp r5, #4 + 2818 0094 06D0 beq .L191 +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2819 .loc 1 1059 5 discriminator 4 view .LVU790 + 2820 0096 082D cmp r5, #8 + 2821 0098 09D0 beq .L192 +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2822 .loc 1 1059 5 discriminator 7 view .LVU791 + 2823 009a 4523 movs r3, #69 + 2824 009c 0122 movs r2, #1 + 2825 009e E254 strb r2, [r4, r3] + 2826 00a0 0020 movs r0, #0 + 2827 00a2 E3E7 b .L183 + 2828 .L191: + ARM GAS /tmp/ccsFKqBV.s page 105 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2829 .loc 1 1059 5 discriminator 3 view .LVU792 + 2830 00a4 4323 movs r3, #67 + 2831 00a6 0122 movs r2, #1 + 2832 00a8 E254 strb r2, [r4, r3] + 2833 00aa 0020 movs r0, #0 + 2834 00ac DEE7 b .L183 + 2835 .L192: +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2836 .loc 1 1059 5 discriminator 6 view .LVU793 + 2837 00ae 4423 movs r3, #68 + 2838 00b0 0122 movs r2, #1 + 2839 00b2 E254 strb r2, [r4, r3] + 2840 00b4 0020 movs r0, #0 + 2841 00b6 D9E7 b .L183 + 2842 .LVL220: + 2843 .L190: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2844 .loc 1 1016 3 view .LVU794 + 2845 00b8 0120 movs r0, #1 + 2846 .LVL221: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2847 .loc 1 1016 3 view .LVU795 + 2848 00ba D7E7 b .L183 + 2849 .L194: + 2850 .align 2 + 2851 .L193: + 2852 00bc FFFDFFFF .word -513 + 2853 00c0 11110000 .word 4369 + 2854 00c4 44040000 .word 1092 + 2855 00c8 FF7FFFFF .word -32769 + 2856 00cc FFFBFFFF .word -1025 + 2857 00d0 FFF7FFFF .word -2049 + 2858 .cfi_endproc + 2859 .LFE55: + 2861 .section .text.HAL_TIMEx_PWMN_Start,"ax",%progbits + 2862 .align 1 + 2863 .global HAL_TIMEx_PWMN_Start + 2864 .syntax unified + 2865 .code 16 + 2866 .thumb_func + 2868 HAL_TIMEx_PWMN_Start: + 2869 .LVL222: + 2870 .LFB56: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2871 .loc 1 1100 1 is_stmt 1 view -0 + 2872 .cfi_startproc + 2873 @ args = 0, pretend = 0, frame = 0 + 2874 @ frame_needed = 0, uses_anonymous_args = 0 +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2875 .loc 1 1100 1 is_stmt 0 view .LVU797 + 2876 0000 10B5 push {r4, lr} + 2877 .cfi_def_cfa_offset 8 + 2878 .cfi_offset 4, -8 + 2879 .cfi_offset 14, -4 + 2880 0002 0400 movs r4, r0 +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 106 + + + 2881 .loc 1 1101 3 is_stmt 1 view .LVU798 +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2882 .loc 1 1104 3 view .LVU799 +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2883 .loc 1 1107 3 view .LVU800 +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2884 .loc 1 1107 46 is_stmt 0 view .LVU801 + 2885 0004 0029 cmp r1, #0 + 2886 0006 27D1 bne .L196 +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2887 .loc 1 1107 7 discriminator 1 view .LVU802 + 2888 0008 4223 movs r3, #66 + 2889 000a C35C ldrb r3, [r0, r3] +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2890 .loc 1 1107 46 discriminator 1 view .LVU803 + 2891 000c 013B subs r3, r3, #1 + 2892 000e 5A1E subs r2, r3, #1 + 2893 0010 9341 sbcs r3, r3, r2 + 2894 0012 DBB2 uxtb r3, r3 + 2895 .L197: +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2896 .loc 1 1107 6 discriminator 12 view .LVU804 + 2897 0014 002B cmp r3, #0 + 2898 0016 53D1 bne .L207 +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2899 .loc 1 1113 3 is_stmt 1 view .LVU805 + 2900 0018 0029 cmp r1, #0 + 2901 001a 36D1 bne .L201 +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2902 .loc 1 1113 3 is_stmt 0 discriminator 1 view .LVU806 + 2903 001c 4233 adds r3, r3, #66 + 2904 001e 0222 movs r2, #2 + 2905 0020 E254 strb r2, [r4, r3] + 2906 .L202: +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2907 .loc 1 1116 3 is_stmt 1 view .LVU807 + 2908 0022 2068 ldr r0, [r4] + 2909 .LVL223: +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2910 .loc 1 1116 3 is_stmt 0 view .LVU808 + 2911 0024 0422 movs r2, #4 + 2912 0026 FFF7FEFF bl TIM_CCxNChannelCmd + 2913 .LVL224: +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2914 .loc 1 1119 3 is_stmt 1 view .LVU809 + 2915 002a 2268 ldr r2, [r4] + 2916 002c 516C ldr r1, [r2, #68] + 2917 002e 8023 movs r3, #128 + 2918 0030 1B02 lsls r3, r3, #8 + 2919 0032 0B43 orrs r3, r1 + 2920 0034 5364 str r3, [r2, #68] +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2921 .loc 1 1122 3 view .LVU810 +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2922 .loc 1 1122 7 is_stmt 0 view .LVU811 + 2923 0036 2368 ldr r3, [r4] +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 107 + + + 2924 .loc 1 1122 6 view .LVU812 + 2925 0038 234A ldr r2, .L213 + 2926 003a 9342 cmp r3, r2 + 2927 003c 35D0 beq .L205 +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2928 .loc 1 1122 7 discriminator 1 view .LVU813 + 2929 003e 8022 movs r2, #128 + 2930 0040 D205 lsls r2, r2, #23 + 2931 0042 9342 cmp r3, r2 + 2932 0044 31D0 beq .L205 +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2933 .loc 1 1122 7 discriminator 2 view .LVU814 + 2934 0046 214A ldr r2, .L213+4 + 2935 0048 9342 cmp r3, r2 + 2936 004a 2ED0 beq .L205 +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2937 .loc 1 1132 5 is_stmt 1 view .LVU815 + 2938 004c 1A68 ldr r2, [r3] + 2939 004e 0121 movs r1, #1 + 2940 0050 0A43 orrs r2, r1 + 2941 0052 1A60 str r2, [r3] +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2942 .loc 1 1136 10 is_stmt 0 view .LVU816 + 2943 0054 0020 movs r0, #0 + 2944 0056 34E0 b .L200 + 2945 .LVL225: + 2946 .L196: +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2947 .loc 1 1107 46 discriminator 2 view .LVU817 + 2948 0058 0429 cmp r1, #4 + 2949 005a 08D0 beq .L209 +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2950 .loc 1 1107 46 discriminator 5 view .LVU818 + 2951 005c 0829 cmp r1, #8 + 2952 005e 0DD0 beq .L210 +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2953 .loc 1 1107 7 discriminator 8 view .LVU819 + 2954 0060 4523 movs r3, #69 + 2955 0062 C35C ldrb r3, [r0, r3] +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2956 .loc 1 1107 46 discriminator 8 view .LVU820 + 2957 0064 013B subs r3, r3, #1 + 2958 0066 5A1E subs r2, r3, #1 + 2959 0068 9341 sbcs r3, r3, r2 + 2960 006a DBB2 uxtb r3, r3 + 2961 006c D2E7 b .L197 + 2962 .L209: +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2963 .loc 1 1107 7 discriminator 4 view .LVU821 + 2964 006e 4323 movs r3, #67 + 2965 0070 C35C ldrb r3, [r0, r3] +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2966 .loc 1 1107 46 discriminator 4 view .LVU822 + 2967 0072 013B subs r3, r3, #1 + 2968 0074 5A1E subs r2, r3, #1 + 2969 0076 9341 sbcs r3, r3, r2 + 2970 0078 DBB2 uxtb r3, r3 + ARM GAS /tmp/ccsFKqBV.s page 108 + + + 2971 007a CBE7 b .L197 + 2972 .L210: +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2973 .loc 1 1107 7 discriminator 7 view .LVU823 + 2974 007c 4423 movs r3, #68 + 2975 007e C35C ldrb r3, [r0, r3] +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2976 .loc 1 1107 46 discriminator 7 view .LVU824 + 2977 0080 013B subs r3, r3, #1 + 2978 0082 5A1E subs r2, r3, #1 + 2979 0084 9341 sbcs r3, r3, r2 + 2980 0086 DBB2 uxtb r3, r3 + 2981 0088 C4E7 b .L197 + 2982 .L201: +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2983 .loc 1 1113 3 discriminator 2 view .LVU825 + 2984 008a 0429 cmp r1, #4 + 2985 008c 05D0 beq .L211 +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2986 .loc 1 1113 3 discriminator 4 view .LVU826 + 2987 008e 0829 cmp r1, #8 + 2988 0090 07D0 beq .L212 +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2989 .loc 1 1113 3 discriminator 7 view .LVU827 + 2990 0092 4523 movs r3, #69 + 2991 0094 0222 movs r2, #2 + 2992 0096 E254 strb r2, [r4, r3] + 2993 0098 C3E7 b .L202 + 2994 .L211: +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2995 .loc 1 1113 3 discriminator 3 view .LVU828 + 2996 009a 4323 movs r3, #67 + 2997 009c 0222 movs r2, #2 + 2998 009e E254 strb r2, [r4, r3] + 2999 00a0 BFE7 b .L202 + 3000 .L212: +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3001 .loc 1 1113 3 discriminator 6 view .LVU829 + 3002 00a2 4423 movs r3, #68 + 3003 00a4 0222 movs r2, #2 + 3004 00a6 E254 strb r2, [r4, r3] + 3005 00a8 BBE7 b .L202 + 3006 .LVL226: + 3007 .L205: +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3008 .loc 1 1124 5 is_stmt 1 view .LVU830 +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3009 .loc 1 1124 29 is_stmt 0 view .LVU831 + 3010 00aa 9968 ldr r1, [r3, #8] +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3011 .loc 1 1124 13 view .LVU832 + 3012 00ac 0722 movs r2, #7 + 3013 00ae 0A40 ands r2, r1 + 3014 .LVL227: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3015 .loc 1 1125 5 is_stmt 1 view .LVU833 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 109 + + + 3016 .loc 1 1125 8 is_stmt 0 view .LVU834 + 3017 00b0 062A cmp r2, #6 + 3018 00b2 07D0 beq .L208 +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3019 .loc 1 1127 7 is_stmt 1 view .LVU835 + 3020 00b4 1A68 ldr r2, [r3] + 3021 .LVL228: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3022 .loc 1 1127 7 is_stmt 0 view .LVU836 + 3023 00b6 0121 movs r1, #1 + 3024 .LVL229: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3025 .loc 1 1127 7 view .LVU837 + 3026 00b8 0A43 orrs r2, r1 + 3027 00ba 1A60 str r2, [r3] +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3028 .loc 1 1136 10 view .LVU838 + 3029 00bc 0020 movs r0, #0 + 3030 00be 00E0 b .L200 + 3031 .LVL230: + 3032 .L207: +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3033 .loc 1 1109 12 view .LVU839 + 3034 00c0 0120 movs r0, #1 + 3035 .LVL231: + 3036 .L200: +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3037 .loc 1 1137 1 view .LVU840 + 3038 @ sp needed + 3039 .LVL232: +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3040 .loc 1 1137 1 view .LVU841 + 3041 00c2 10BD pop {r4, pc} + 3042 .LVL233: + 3043 .L208: +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3044 .loc 1 1136 10 view .LVU842 + 3045 00c4 0020 movs r0, #0 + 3046 00c6 FCE7 b .L200 + 3047 .L214: + 3048 .align 2 + 3049 .L213: + 3050 00c8 002C0140 .word 1073818624 + 3051 00cc 00040040 .word 1073742848 + 3052 .cfi_endproc + 3053 .LFE56: + 3055 .section .text.HAL_TIMEx_PWMN_Stop,"ax",%progbits + 3056 .align 1 + 3057 .global HAL_TIMEx_PWMN_Stop + 3058 .syntax unified + 3059 .code 16 + 3060 .thumb_func + 3062 HAL_TIMEx_PWMN_Stop: + 3063 .LVL234: + 3064 .LFB57: +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 3065 .loc 1 1150 1 is_stmt 1 view -0 + ARM GAS /tmp/ccsFKqBV.s page 110 + + + 3066 .cfi_startproc + 3067 @ args = 0, pretend = 0, frame = 0 + 3068 @ frame_needed = 0, uses_anonymous_args = 0 +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 3069 .loc 1 1150 1 is_stmt 0 view .LVU844 + 3070 0000 70B5 push {r4, r5, r6, lr} + 3071 .cfi_def_cfa_offset 16 + 3072 .cfi_offset 4, -16 + 3073 .cfi_offset 5, -12 + 3074 .cfi_offset 6, -8 + 3075 .cfi_offset 14, -4 + 3076 0002 0400 movs r4, r0 + 3077 0004 0D00 movs r5, r1 +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3078 .loc 1 1152 3 is_stmt 1 view .LVU845 +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3079 .loc 1 1155 3 view .LVU846 + 3080 0006 0068 ldr r0, [r0] + 3081 .LVL235: +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3082 .loc 1 1155 3 is_stmt 0 view .LVU847 + 3083 0008 0022 movs r2, #0 + 3084 000a FFF7FEFF bl TIM_CCxNChannelCmd + 3085 .LVL236: +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3086 .loc 1 1158 3 is_stmt 1 view .LVU848 +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3087 .loc 1 1158 3 view .LVU849 + 3088 000e 2368 ldr r3, [r4] + 3089 0010 196A ldr r1, [r3, #32] + 3090 0012 174A ldr r2, .L224 + 3091 0014 1142 tst r1, r2 + 3092 0016 07D1 bne .L216 +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3093 .loc 1 1158 3 discriminator 1 view .LVU850 + 3094 0018 196A ldr r1, [r3, #32] + 3095 001a 164A ldr r2, .L224+4 + 3096 001c 1142 tst r1, r2 + 3097 001e 03D1 bne .L216 +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3098 .loc 1 1158 3 discriminator 3 view .LVU851 + 3099 0020 5A6C ldr r2, [r3, #68] + 3100 0022 1549 ldr r1, .L224+8 + 3101 0024 0A40 ands r2, r1 + 3102 0026 5A64 str r2, [r3, #68] + 3103 .L216: +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3104 .loc 1 1158 3 discriminator 5 view .LVU852 +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3105 .loc 1 1161 3 view .LVU853 +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3106 .loc 1 1161 3 view .LVU854 + 3107 0028 2368 ldr r3, [r4] + 3108 002a 196A ldr r1, [r3, #32] + 3109 002c 104A ldr r2, .L224 + 3110 002e 1142 tst r1, r2 + 3111 0030 07D1 bne .L217 + ARM GAS /tmp/ccsFKqBV.s page 111 + + +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3112 .loc 1 1161 3 discriminator 1 view .LVU855 + 3113 0032 196A ldr r1, [r3, #32] + 3114 0034 0F4A ldr r2, .L224+4 + 3115 0036 1142 tst r1, r2 + 3116 0038 03D1 bne .L217 +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3117 .loc 1 1161 3 discriminator 3 view .LVU856 + 3118 003a 1A68 ldr r2, [r3] + 3119 003c 0121 movs r1, #1 + 3120 003e 8A43 bics r2, r1 + 3121 0040 1A60 str r2, [r3] + 3122 .L217: +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3123 .loc 1 1161 3 discriminator 5 view .LVU857 +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3124 .loc 1 1164 3 view .LVU858 + 3125 0042 002D cmp r5, #0 + 3126 0044 04D1 bne .L218 +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3127 .loc 1 1164 3 is_stmt 0 discriminator 1 view .LVU859 + 3128 0046 4223 movs r3, #66 + 3129 0048 0122 movs r2, #1 + 3130 004a E254 strb r2, [r4, r3] + 3131 .L219: +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3132 .loc 1 1167 3 is_stmt 1 view .LVU860 +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3133 .loc 1 1168 1 is_stmt 0 view .LVU861 + 3134 004c 0020 movs r0, #0 + 3135 @ sp needed + 3136 .LVL237: + 3137 .LVL238: +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3138 .loc 1 1168 1 view .LVU862 + 3139 004e 70BD pop {r4, r5, r6, pc} + 3140 .LVL239: + 3141 .L218: +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3142 .loc 1 1164 3 discriminator 2 view .LVU863 + 3143 0050 042D cmp r5, #4 + 3144 0052 05D0 beq .L222 +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3145 .loc 1 1164 3 discriminator 4 view .LVU864 + 3146 0054 082D cmp r5, #8 + 3147 0056 07D0 beq .L223 +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3148 .loc 1 1164 3 discriminator 7 view .LVU865 + 3149 0058 4523 movs r3, #69 + 3150 005a 0122 movs r2, #1 + 3151 005c E254 strb r2, [r4, r3] + 3152 005e F5E7 b .L219 + 3153 .L222: +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3154 .loc 1 1164 3 discriminator 3 view .LVU866 + 3155 0060 4323 movs r3, #67 + 3156 0062 0122 movs r2, #1 + ARM GAS /tmp/ccsFKqBV.s page 112 + + + 3157 0064 E254 strb r2, [r4, r3] + 3158 0066 F1E7 b .L219 + 3159 .L223: +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3160 .loc 1 1164 3 discriminator 6 view .LVU867 + 3161 0068 4423 movs r3, #68 + 3162 006a 0122 movs r2, #1 + 3163 006c E254 strb r2, [r4, r3] + 3164 006e EDE7 b .L219 + 3165 .L225: + 3166 .align 2 + 3167 .L224: + 3168 0070 11110000 .word 4369 + 3169 0074 44040000 .word 1092 + 3170 0078 FF7FFFFF .word -32769 + 3171 .cfi_endproc + 3172 .LFE57: + 3174 .section .text.HAL_TIMEx_PWMN_Start_IT,"ax",%progbits + 3175 .align 1 + 3176 .global HAL_TIMEx_PWMN_Start_IT + 3177 .syntax unified + 3178 .code 16 + 3179 .thumb_func + 3181 HAL_TIMEx_PWMN_Start_IT: + 3182 .LVL240: + 3183 .LFB58: +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3184 .loc 1 1182 1 is_stmt 1 view -0 + 3185 .cfi_startproc + 3186 @ args = 0, pretend = 0, frame = 0 + 3187 @ frame_needed = 0, uses_anonymous_args = 0 +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3188 .loc 1 1182 1 is_stmt 0 view .LVU869 + 3189 0000 10B5 push {r4, lr} + 3190 .cfi_def_cfa_offset 8 + 3191 .cfi_offset 4, -8 + 3192 .cfi_offset 14, -4 + 3193 0002 0400 movs r4, r0 +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 3194 .loc 1 1183 3 is_stmt 1 view .LVU870 + 3195 .LVL241: +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3196 .loc 1 1184 3 view .LVU871 +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3197 .loc 1 1187 3 view .LVU872 +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3198 .loc 1 1190 3 view .LVU873 +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3199 .loc 1 1190 46 is_stmt 0 view .LVU874 + 3200 0004 0029 cmp r1, #0 + 3201 0006 31D1 bne .L227 +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3202 .loc 1 1190 7 discriminator 1 view .LVU875 + 3203 0008 4223 movs r3, #66 + 3204 000a C35C ldrb r3, [r0, r3] +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3205 .loc 1 1190 46 discriminator 1 view .LVU876 + ARM GAS /tmp/ccsFKqBV.s page 113 + + + 3206 000c 013B subs r3, r3, #1 + 3207 000e 5A1E subs r2, r3, #1 + 3208 0010 9341 sbcs r3, r3, r2 + 3209 0012 DBB2 uxtb r3, r3 + 3210 .L228: +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3211 .loc 1 1190 6 discriminator 12 view .LVU877 + 3212 0014 002B cmp r3, #0 + 3213 0016 6ED1 bne .L241 +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3214 .loc 1 1196 3 is_stmt 1 view .LVU878 + 3215 0018 0029 cmp r1, #0 + 3216 001a 40D1 bne .L232 +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3217 .loc 1 1196 3 is_stmt 0 discriminator 1 view .LVU879 + 3218 001c 4233 adds r3, r3, #66 + 3219 001e 0222 movs r2, #2 + 3220 0020 E254 strb r2, [r4, r3] +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3221 .loc 1 1198 3 is_stmt 1 view .LVU880 + 3222 .L233: +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3223 .loc 1 1203 7 view .LVU881 + 3224 0022 2268 ldr r2, [r4] + 3225 0024 D368 ldr r3, [r2, #12] + 3226 0026 0220 movs r0, #2 + 3227 .LVL242: +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3228 .loc 1 1203 7 is_stmt 0 view .LVU882 + 3229 0028 0343 orrs r3, r0 + 3230 002a D360 str r3, [r2, #12] +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3231 .loc 1 1204 7 is_stmt 1 view .LVU883 +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3232 .loc 1 1226 3 view .LVU884 + 3233 .L238: +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3234 .loc 1 1229 5 view .LVU885 + 3235 002c 2268 ldr r2, [r4] + 3236 002e D368 ldr r3, [r2, #12] + 3237 0030 8020 movs r0, #128 + 3238 0032 0343 orrs r3, r0 + 3239 0034 D360 str r3, [r2, #12] +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3240 .loc 1 1232 5 view .LVU886 + 3241 0036 2068 ldr r0, [r4] + 3242 0038 0422 movs r2, #4 + 3243 003a FFF7FEFF bl TIM_CCxNChannelCmd + 3244 .LVL243: +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3245 .loc 1 1235 5 view .LVU887 + 3246 003e 2268 ldr r2, [r4] + 3247 0040 516C ldr r1, [r2, #68] + 3248 0042 8023 movs r3, #128 + 3249 0044 1B02 lsls r3, r3, #8 + 3250 0046 0B43 orrs r3, r1 + 3251 0048 5364 str r3, [r2, #68] + ARM GAS /tmp/ccsFKqBV.s page 114 + + +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3252 .loc 1 1238 5 view .LVU888 +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3253 .loc 1 1238 9 is_stmt 0 view .LVU889 + 3254 004a 2368 ldr r3, [r4] +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3255 .loc 1 1238 8 view .LVU890 + 3256 004c 2C4A ldr r2, .L248 + 3257 004e 9342 cmp r3, r2 + 3258 0050 46D0 beq .L239 +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3259 .loc 1 1238 9 discriminator 1 view .LVU891 + 3260 0052 8022 movs r2, #128 + 3261 0054 D205 lsls r2, r2, #23 + 3262 0056 9342 cmp r3, r2 + 3263 0058 42D0 beq .L239 +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3264 .loc 1 1238 9 discriminator 2 view .LVU892 + 3265 005a 2A4A ldr r2, .L248+4 + 3266 005c 9342 cmp r3, r2 + 3267 005e 3FD0 beq .L239 +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3268 .loc 1 1248 7 is_stmt 1 view .LVU893 + 3269 0060 1A68 ldr r2, [r3] + 3270 0062 0121 movs r1, #1 + 3271 0064 0A43 orrs r2, r1 + 3272 0066 1A60 str r2, [r3] + 3273 0068 0020 movs r0, #0 + 3274 006a 45E0 b .L231 + 3275 .LVL244: + 3276 .L227: +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3277 .loc 1 1190 46 is_stmt 0 discriminator 2 view .LVU894 + 3278 006c 0429 cmp r1, #4 + 3279 006e 08D0 beq .L244 +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3280 .loc 1 1190 46 discriminator 5 view .LVU895 + 3281 0070 0829 cmp r1, #8 + 3282 0072 0DD0 beq .L245 +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3283 .loc 1 1190 7 discriminator 8 view .LVU896 + 3284 0074 4523 movs r3, #69 + 3285 0076 C35C ldrb r3, [r0, r3] +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3286 .loc 1 1190 46 discriminator 8 view .LVU897 + 3287 0078 013B subs r3, r3, #1 + 3288 007a 5A1E subs r2, r3, #1 + 3289 007c 9341 sbcs r3, r3, r2 + 3290 007e DBB2 uxtb r3, r3 + 3291 0080 C8E7 b .L228 + 3292 .L244: +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3293 .loc 1 1190 7 discriminator 4 view .LVU898 + 3294 0082 4323 movs r3, #67 + 3295 0084 C35C ldrb r3, [r0, r3] +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3296 .loc 1 1190 46 discriminator 4 view .LVU899 + ARM GAS /tmp/ccsFKqBV.s page 115 + + + 3297 0086 013B subs r3, r3, #1 + 3298 0088 5A1E subs r2, r3, #1 + 3299 008a 9341 sbcs r3, r3, r2 + 3300 008c DBB2 uxtb r3, r3 + 3301 008e C1E7 b .L228 + 3302 .L245: +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3303 .loc 1 1190 7 discriminator 7 view .LVU900 + 3304 0090 4423 movs r3, #68 + 3305 0092 C35C ldrb r3, [r0, r3] +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3306 .loc 1 1190 46 discriminator 7 view .LVU901 + 3307 0094 013B subs r3, r3, #1 + 3308 0096 5A1E subs r2, r3, #1 + 3309 0098 9341 sbcs r3, r3, r2 + 3310 009a DBB2 uxtb r3, r3 + 3311 009c BAE7 b .L228 + 3312 .L232: +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3313 .loc 1 1196 3 discriminator 2 view .LVU902 + 3314 009e 0429 cmp r1, #4 + 3315 00a0 0CD0 beq .L246 +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3316 .loc 1 1196 3 discriminator 4 view .LVU903 + 3317 00a2 0829 cmp r1, #8 + 3318 00a4 13D0 beq .L247 +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3319 .loc 1 1196 3 discriminator 7 view .LVU904 + 3320 00a6 4523 movs r3, #69 + 3321 00a8 0222 movs r2, #2 + 3322 00aa E254 strb r2, [r4, r3] +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3323 .loc 1 1198 3 is_stmt 1 view .LVU905 + 3324 00ac 0429 cmp r1, #4 + 3325 00ae 08D0 beq .L235 + 3326 00b0 0829 cmp r1, #8 + 3327 00b2 0FD0 beq .L237 + 3328 00b4 0029 cmp r1, #0 + 3329 00b6 B4D0 beq .L233 + 3330 00b8 0120 movs r0, #1 + 3331 .LVL245: +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3332 .loc 1 1198 3 is_stmt 0 view .LVU906 + 3333 00ba 1DE0 b .L231 + 3334 .LVL246: + 3335 .L246: +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3336 .loc 1 1196 3 discriminator 3 view .LVU907 + 3337 00bc 4323 movs r3, #67 + 3338 00be 0222 movs r2, #2 + 3339 00c0 E254 strb r2, [r4, r3] +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3340 .loc 1 1198 3 is_stmt 1 view .LVU908 + 3341 .L235: +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3342 .loc 1 1210 7 view .LVU909 + 3343 00c2 2268 ldr r2, [r4] + ARM GAS /tmp/ccsFKqBV.s page 116 + + + 3344 00c4 D368 ldr r3, [r2, #12] + 3345 00c6 0420 movs r0, #4 + 3346 .LVL247: +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3347 .loc 1 1210 7 is_stmt 0 view .LVU910 + 3348 00c8 0343 orrs r3, r0 + 3349 00ca D360 str r3, [r2, #12] +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3350 .loc 1 1211 7 is_stmt 1 view .LVU911 +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3351 .loc 1 1226 3 view .LVU912 + 3352 00cc AEE7 b .L238 + 3353 .LVL248: + 3354 .L247: +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3355 .loc 1 1196 3 is_stmt 0 discriminator 6 view .LVU913 + 3356 00ce 4423 movs r3, #68 + 3357 00d0 0222 movs r2, #2 + 3358 00d2 E254 strb r2, [r4, r3] +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3359 .loc 1 1198 3 is_stmt 1 view .LVU914 + 3360 .L237: +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3361 .loc 1 1217 7 view .LVU915 + 3362 00d4 2268 ldr r2, [r4] + 3363 00d6 D368 ldr r3, [r2, #12] + 3364 00d8 0820 movs r0, #8 + 3365 .LVL249: +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3366 .loc 1 1217 7 is_stmt 0 view .LVU916 + 3367 00da 0343 orrs r3, r0 + 3368 00dc D360 str r3, [r2, #12] +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3369 .loc 1 1218 7 is_stmt 1 view .LVU917 +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3370 .loc 1 1226 3 view .LVU918 + 3371 00de A5E7 b .L238 + 3372 .LVL250: + 3373 .L239: +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3374 .loc 1 1240 7 view .LVU919 +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3375 .loc 1 1240 31 is_stmt 0 view .LVU920 + 3376 00e0 9968 ldr r1, [r3, #8] +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3377 .loc 1 1240 15 view .LVU921 + 3378 00e2 0722 movs r2, #7 + 3379 00e4 0A40 ands r2, r1 + 3380 .LVL251: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3381 .loc 1 1241 7 is_stmt 1 view .LVU922 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3382 .loc 1 1241 10 is_stmt 0 view .LVU923 + 3383 00e6 062A cmp r2, #6 + 3384 00e8 07D0 beq .L243 +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3385 .loc 1 1243 9 is_stmt 1 view .LVU924 + ARM GAS /tmp/ccsFKqBV.s page 117 + + + 3386 00ea 1A68 ldr r2, [r3] + 3387 .LVL252: +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3388 .loc 1 1243 9 is_stmt 0 view .LVU925 + 3389 00ec 0121 movs r1, #1 + 3390 .LVL253: +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3391 .loc 1 1243 9 view .LVU926 + 3392 00ee 0A43 orrs r2, r1 + 3393 00f0 1A60 str r2, [r3] + 3394 00f2 0020 movs r0, #0 + 3395 00f4 00E0 b .L231 + 3396 .LVL254: + 3397 .L241: +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3398 .loc 1 1192 12 view .LVU927 + 3399 00f6 0120 movs r0, #1 + 3400 .LVL255: + 3401 .L231: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3402 .loc 1 1254 1 view .LVU928 + 3403 @ sp needed + 3404 .LVL256: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3405 .loc 1 1254 1 view .LVU929 + 3406 00f8 10BD pop {r4, pc} + 3407 .LVL257: + 3408 .L243: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3409 .loc 1 1254 1 view .LVU930 + 3410 00fa 0020 movs r0, #0 + 3411 00fc FCE7 b .L231 + 3412 .L249: + 3413 00fe C046 .align 2 + 3414 .L248: + 3415 0100 002C0140 .word 1073818624 + 3416 0104 00040040 .word 1073742848 + 3417 .cfi_endproc + 3418 .LFE58: + 3420 .section .text.HAL_TIMEx_PWMN_Stop_IT,"ax",%progbits + 3421 .align 1 + 3422 .global HAL_TIMEx_PWMN_Stop_IT + 3423 .syntax unified + 3424 .code 16 + 3425 .thumb_func + 3427 HAL_TIMEx_PWMN_Stop_IT: + 3428 .LVL258: + 3429 .LFB59: +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3430 .loc 1 1268 1 is_stmt 1 view -0 + 3431 .cfi_startproc + 3432 @ args = 0, pretend = 0, frame = 0 + 3433 @ frame_needed = 0, uses_anonymous_args = 0 +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3434 .loc 1 1268 1 is_stmt 0 view .LVU932 + 3435 0000 70B5 push {r4, r5, r6, lr} + 3436 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccsFKqBV.s page 118 + + + 3437 .cfi_offset 4, -16 + 3438 .cfi_offset 5, -12 + 3439 .cfi_offset 6, -8 + 3440 .cfi_offset 14, -4 + 3441 0002 0400 movs r4, r0 + 3442 0004 0D00 movs r5, r1 +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpccer; + 3443 .loc 1 1269 3 is_stmt 1 view .LVU933 + 3444 .LVL259: +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3445 .loc 1 1270 3 view .LVU934 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3446 .loc 1 1273 3 view .LVU935 +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3447 .loc 1 1275 3 view .LVU936 + 3448 0006 0429 cmp r1, #4 + 3449 0008 37D0 beq .L251 + 3450 000a 0829 cmp r1, #8 + 3451 000c 3BD0 beq .L252 + 3452 000e 0029 cmp r1, #0 + 3453 0010 52D1 bne .L261 +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3454 .loc 1 1280 7 view .LVU937 + 3455 0012 0268 ldr r2, [r0] + 3456 0014 D368 ldr r3, [r2, #12] + 3457 0016 0221 movs r1, #2 + 3458 .LVL260: +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3459 .loc 1 1280 7 is_stmt 0 view .LVU938 + 3460 0018 8B43 bics r3, r1 + 3461 001a D360 str r3, [r2, #12] +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3462 .loc 1 1281 7 is_stmt 1 view .LVU939 +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3463 .loc 1 1303 3 view .LVU940 + 3464 .L254: +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3465 .loc 1 1306 5 view .LVU941 + 3466 001c 2068 ldr r0, [r4] + 3467 .LVL261: +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3468 .loc 1 1306 5 is_stmt 0 view .LVU942 + 3469 001e 0022 movs r2, #0 + 3470 0020 2900 movs r1, r5 + 3471 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 3472 .LVL262: +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) + 3473 .loc 1 1309 5 is_stmt 1 view .LVU943 +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) + 3474 .loc 1 1309 19 is_stmt 0 view .LVU944 + 3475 0026 2368 ldr r3, [r4] +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) + 3476 .loc 1 1309 13 view .LVU945 + 3477 0028 196A ldr r1, [r3, #32] + 3478 .LVL263: +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3479 .loc 1 1310 5 is_stmt 1 view .LVU946 + ARM GAS /tmp/ccsFKqBV.s page 119 + + +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3480 .loc 1 1310 18 is_stmt 0 view .LVU947 + 3481 002a 244A ldr r2, .L264 +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3482 .loc 1 1310 8 view .LVU948 + 3483 002c 1142 tst r1, r2 + 3484 002e 03D1 bne .L255 +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3485 .loc 1 1312 7 is_stmt 1 view .LVU949 + 3486 0030 DA68 ldr r2, [r3, #12] + 3487 0032 8021 movs r1, #128 + 3488 .LVL264: +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3489 .loc 1 1312 7 is_stmt 0 view .LVU950 + 3490 0034 8A43 bics r2, r1 + 3491 0036 DA60 str r2, [r3, #12] + 3492 .L255: +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3493 .loc 1 1316 5 is_stmt 1 view .LVU951 +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3494 .loc 1 1316 5 view .LVU952 + 3495 0038 2368 ldr r3, [r4] + 3496 003a 196A ldr r1, [r3, #32] + 3497 003c 204A ldr r2, .L264+4 + 3498 003e 1142 tst r1, r2 + 3499 0040 07D1 bne .L256 +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3500 .loc 1 1316 5 discriminator 1 view .LVU953 + 3501 0042 196A ldr r1, [r3, #32] + 3502 0044 1D4A ldr r2, .L264 + 3503 0046 1142 tst r1, r2 + 3504 0048 03D1 bne .L256 +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3505 .loc 1 1316 5 discriminator 3 view .LVU954 + 3506 004a 5A6C ldr r2, [r3, #68] + 3507 004c 1D49 ldr r1, .L264+8 + 3508 004e 0A40 ands r2, r1 + 3509 0050 5A64 str r2, [r3, #68] + 3510 .L256: +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3511 .loc 1 1316 5 discriminator 5 view .LVU955 +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3512 .loc 1 1319 5 view .LVU956 +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3513 .loc 1 1319 5 view .LVU957 + 3514 0052 2368 ldr r3, [r4] + 3515 0054 196A ldr r1, [r3, #32] + 3516 0056 1A4A ldr r2, .L264+4 + 3517 0058 1142 tst r1, r2 + 3518 005a 07D1 bne .L257 +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3519 .loc 1 1319 5 discriminator 1 view .LVU958 + 3520 005c 196A ldr r1, [r3, #32] + 3521 005e 174A ldr r2, .L264 + 3522 0060 1142 tst r1, r2 + 3523 0062 03D1 bne .L257 +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 120 + + + 3524 .loc 1 1319 5 discriminator 3 view .LVU959 + 3525 0064 1A68 ldr r2, [r3] + 3526 0066 0121 movs r1, #1 + 3527 0068 8A43 bics r2, r1 + 3528 006a 1A60 str r2, [r3] + 3529 .L257: +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3530 .loc 1 1319 5 discriminator 5 view .LVU960 +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3531 .loc 1 1322 5 view .LVU961 + 3532 006c 002D cmp r5, #0 + 3533 006e 10D1 bne .L258 +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3534 .loc 1 1322 5 is_stmt 0 discriminator 1 view .LVU962 + 3535 0070 4223 movs r3, #66 + 3536 0072 0122 movs r2, #1 + 3537 0074 E254 strb r2, [r4, r3] + 3538 0076 0020 movs r0, #0 + 3539 .LVL265: + 3540 .L253: +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3541 .loc 1 1326 3 is_stmt 1 view .LVU963 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3542 .loc 1 1327 1 is_stmt 0 view .LVU964 + 3543 @ sp needed + 3544 .LVL266: + 3545 .LVL267: +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3546 .loc 1 1327 1 view .LVU965 + 3547 0078 70BD pop {r4, r5, r6, pc} + 3548 .LVL268: + 3549 .L251: +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3550 .loc 1 1287 7 is_stmt 1 view .LVU966 + 3551 007a 0268 ldr r2, [r0] + 3552 007c D368 ldr r3, [r2, #12] + 3553 007e 0421 movs r1, #4 + 3554 .LVL269: +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3555 .loc 1 1287 7 is_stmt 0 view .LVU967 + 3556 0080 8B43 bics r3, r1 + 3557 0082 D360 str r3, [r2, #12] +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3558 .loc 1 1288 7 is_stmt 1 view .LVU968 +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3559 .loc 1 1303 3 view .LVU969 + 3560 0084 CAE7 b .L254 + 3561 .LVL270: + 3562 .L252: +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3563 .loc 1 1294 7 view .LVU970 + 3564 0086 0268 ldr r2, [r0] + 3565 0088 D368 ldr r3, [r2, #12] + 3566 008a 0821 movs r1, #8 + 3567 .LVL271: +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3568 .loc 1 1294 7 is_stmt 0 view .LVU971 + ARM GAS /tmp/ccsFKqBV.s page 121 + + + 3569 008c 8B43 bics r3, r1 + 3570 008e D360 str r3, [r2, #12] +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3571 .loc 1 1295 7 is_stmt 1 view .LVU972 +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3572 .loc 1 1303 3 view .LVU973 + 3573 0090 C4E7 b .L254 + 3574 .LVL272: + 3575 .L258: +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3576 .loc 1 1322 5 is_stmt 0 discriminator 2 view .LVU974 + 3577 0092 042D cmp r5, #4 + 3578 0094 06D0 beq .L262 +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3579 .loc 1 1322 5 discriminator 4 view .LVU975 + 3580 0096 082D cmp r5, #8 + 3581 0098 09D0 beq .L263 +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3582 .loc 1 1322 5 discriminator 7 view .LVU976 + 3583 009a 4523 movs r3, #69 + 3584 009c 0122 movs r2, #1 + 3585 009e E254 strb r2, [r4, r3] + 3586 00a0 0020 movs r0, #0 + 3587 00a2 E9E7 b .L253 + 3588 .L262: +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3589 .loc 1 1322 5 discriminator 3 view .LVU977 + 3590 00a4 4323 movs r3, #67 + 3591 00a6 0122 movs r2, #1 + 3592 00a8 E254 strb r2, [r4, r3] + 3593 00aa 0020 movs r0, #0 + 3594 00ac E4E7 b .L253 + 3595 .L263: +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3596 .loc 1 1322 5 discriminator 6 view .LVU978 + 3597 00ae 4423 movs r3, #68 + 3598 00b0 0122 movs r2, #1 + 3599 00b2 E254 strb r2, [r4, r3] + 3600 00b4 0020 movs r0, #0 + 3601 00b6 DFE7 b .L253 + 3602 .LVL273: + 3603 .L261: +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3604 .loc 1 1275 3 view .LVU979 + 3605 00b8 0120 movs r0, #1 + 3606 .LVL274: +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3607 .loc 1 1275 3 view .LVU980 + 3608 00ba DDE7 b .L253 + 3609 .L265: + 3610 .align 2 + 3611 .L264: + 3612 00bc 44040000 .word 1092 + 3613 00c0 11110000 .word 4369 + 3614 00c4 FF7FFFFF .word -32769 + 3615 .cfi_endproc + 3616 .LFE59: + ARM GAS /tmp/ccsFKqBV.s page 122 + + + 3618 .section .text.HAL_TIMEx_PWMN_Start_DMA,"ax",%progbits + 3619 .align 1 + 3620 .global HAL_TIMEx_PWMN_Start_DMA + 3621 .syntax unified + 3622 .code 16 + 3623 .thumb_func + 3625 HAL_TIMEx_PWMN_Start_DMA: + 3626 .LVL275: + 3627 .LFB60: +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3628 .loc 1 1344 1 is_stmt 1 view -0 + 3629 .cfi_startproc + 3630 @ args = 0, pretend = 0, frame = 0 + 3631 @ frame_needed = 0, uses_anonymous_args = 0 +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3632 .loc 1 1344 1 is_stmt 0 view .LVU982 + 3633 0000 70B5 push {r4, r5, r6, lr} + 3634 .cfi_def_cfa_offset 16 + 3635 .cfi_offset 4, -16 + 3636 .cfi_offset 5, -12 + 3637 .cfi_offset 6, -8 + 3638 .cfi_offset 14, -4 + 3639 0002 0600 movs r6, r0 + 3640 0004 0D00 movs r5, r1 + 3641 0006 1100 movs r1, r2 + 3642 .LVL276: +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 3643 .loc 1 1345 3 is_stmt 1 view .LVU983 +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3644 .loc 1 1346 3 view .LVU984 +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3645 .loc 1 1349 3 view .LVU985 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3646 .loc 1 1352 3 view .LVU986 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3647 .loc 1 1352 46 is_stmt 0 view .LVU987 + 3648 0008 002D cmp r5, #0 + 3649 000a 52D1 bne .L267 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3650 .loc 1 1352 7 discriminator 1 view .LVU988 + 3651 000c 4222 movs r2, #66 + 3652 .LVL277: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3653 .loc 1 1352 7 discriminator 1 view .LVU989 + 3654 000e 845C ldrb r4, [r0, r2] +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3655 .loc 1 1352 46 discriminator 1 view .LVU990 + 3656 0010 023C subs r4, r4, #2 + 3657 0012 6242 rsbs r2, r4, #0 + 3658 0014 5441 adcs r4, r4, r2 + 3659 0016 E4B2 uxtb r4, r4 + 3660 .L268: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3661 .loc 1 1352 6 discriminator 12 view .LVU991 + 3662 0018 002C cmp r4, #0 + 3663 001a 00D0 beq .LCB3455 + 3664 001c C9E0 b .L285 @long jump + ARM GAS /tmp/ccsFKqBV.s page 123 + + + 3665 .LCB3455: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3666 .loc 1 1356 8 is_stmt 1 view .LVU992 +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3667 .loc 1 1356 51 is_stmt 0 view .LVU993 + 3668 001e 002D cmp r5, #0 + 3669 0020 60D1 bne .L272 +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3670 .loc 1 1356 12 discriminator 1 view .LVU994 + 3671 0022 4222 movs r2, #66 + 3672 0024 B25C ldrb r2, [r6, r2] +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3673 .loc 1 1356 51 discriminator 1 view .LVU995 + 3674 0026 013A subs r2, r2, #1 + 3675 0028 5042 rsbs r0, r2, #0 + 3676 002a 4241 adcs r2, r2, r0 + 3677 .LVL278: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3678 .loc 1 1356 51 discriminator 1 view .LVU996 + 3679 002c D2B2 uxtb r2, r2 + 3680 .L273: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3681 .loc 1 1356 11 discriminator 12 view .LVU997 + 3682 002e 002A cmp r2, #0 + 3683 0030 00D1 bne .LCB3469 + 3684 0032 C0E0 b .L286 @long jump + 3685 .LCB3469: +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3686 .loc 1 1358 5 is_stmt 1 view .LVU998 +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3687 .loc 1 1358 8 is_stmt 0 view .LVU999 + 3688 0034 0029 cmp r1, #0 + 3689 0036 00D1 bne .LCB3472 + 3690 0038 BFE0 b .L287 @long jump + 3691 .LCB3472: +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3692 .loc 1 1358 25 discriminator 1 view .LVU1000 + 3693 003a 002B cmp r3, #0 + 3694 003c 00D1 bne .LCB3474 + 3695 003e BEE0 b .L288 @long jump + 3696 .LCB3474: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3697 .loc 1 1364 7 is_stmt 1 view .LVU1001 + 3698 0040 002D cmp r5, #0 + 3699 0042 68D1 bne .L276 +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3700 .loc 1 1364 7 is_stmt 0 discriminator 1 view .LVU1002 + 3701 0044 4222 movs r2, #66 + 3702 0046 0220 movs r0, #2 + 3703 0048 B054 strb r0, [r6, r2] +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3704 .loc 1 1372 3 is_stmt 1 view .LVU1003 + 3705 .L277: +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3706 .loc 1 1377 7 view .LVU1004 +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3707 .loc 1 1377 17 is_stmt 0 view .LVU1005 + ARM GAS /tmp/ccsFKqBV.s page 124 + + + 3708 004a 726A ldr r2, [r6, #36] +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3709 .loc 1 1377 52 view .LVU1006 + 3710 004c 6148 ldr r0, .L300 + 3711 004e 9062 str r0, [r2, #40] +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3712 .loc 1 1378 7 is_stmt 1 view .LVU1007 +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3713 .loc 1 1378 17 is_stmt 0 view .LVU1008 + 3714 0050 726A ldr r2, [r6, #36] +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3715 .loc 1 1378 56 view .LVU1009 + 3716 0052 6148 ldr r0, .L300+4 + 3717 0054 D062 str r0, [r2, #44] +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3718 .loc 1 1381 7 is_stmt 1 view .LVU1010 +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3719 .loc 1 1381 17 is_stmt 0 view .LVU1011 + 3720 0056 726A ldr r2, [r6, #36] +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3721 .loc 1 1381 53 view .LVU1012 + 3722 0058 6048 ldr r0, .L300+8 + 3723 005a 1063 str r0, [r2, #48] +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3724 .loc 1 1384 7 is_stmt 1 view .LVU1013 +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3725 .loc 1 1384 88 is_stmt 0 view .LVU1014 + 3726 005c 3268 ldr r2, [r6] +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3727 .loc 1 1384 83 view .LVU1015 + 3728 005e 3432 adds r2, r2, #52 +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3729 .loc 1 1384 11 view .LVU1016 + 3730 0060 706A ldr r0, [r6, #36] + 3731 0062 FFF7FEFF bl HAL_DMA_Start_IT + 3732 .LVL279: +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3733 .loc 1 1384 10 discriminator 1 view .LVU1017 + 3734 0066 0028 cmp r0, #0 + 3735 0068 00D0 beq .LCB3506 + 3736 006a AAE0 b .L290 @long jump + 3737 .LCB3506: +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3738 .loc 1 1391 7 is_stmt 1 view .LVU1018 + 3739 006c 3268 ldr r2, [r6] + 3740 006e D168 ldr r1, [r2, #12] + 3741 0070 8023 movs r3, #128 + 3742 0072 9B00 lsls r3, r3, #2 + 3743 0074 0B43 orrs r3, r1 + 3744 0076 D360 str r3, [r2, #12] +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3745 .loc 1 1392 7 view .LVU1019 +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3746 .loc 1 1442 3 view .LVU1020 + 3747 .L282: +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3748 .loc 1 1445 5 view .LVU1021 + ARM GAS /tmp/ccsFKqBV.s page 125 + + + 3749 0078 3068 ldr r0, [r6] + 3750 007a 0422 movs r2, #4 + 3751 007c 2900 movs r1, r5 + 3752 007e FFF7FEFF bl TIM_CCxNChannelCmd + 3753 .LVL280: +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3754 .loc 1 1448 5 view .LVU1022 + 3755 0082 3268 ldr r2, [r6] + 3756 0084 516C ldr r1, [r2, #68] + 3757 0086 8023 movs r3, #128 + 3758 0088 1B02 lsls r3, r3, #8 + 3759 008a 0B43 orrs r3, r1 + 3760 008c 5364 str r3, [r2, #68] +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3761 .loc 1 1451 5 view .LVU1023 +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3762 .loc 1 1451 9 is_stmt 0 view .LVU1024 + 3763 008e 3368 ldr r3, [r6] +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3764 .loc 1 1451 8 view .LVU1025 + 3765 0090 534A ldr r2, .L300+12 + 3766 0092 9342 cmp r3, r2 + 3767 0094 00D1 bne .LCB3536 + 3768 0096 81E0 b .L283 @long jump + 3769 .LCB3536: +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3770 .loc 1 1451 9 discriminator 1 view .LVU1026 + 3771 0098 8022 movs r2, #128 + 3772 009a D205 lsls r2, r2, #23 + 3773 009c 9342 cmp r3, r2 + 3774 009e 7DD0 beq .L283 +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3775 .loc 1 1451 9 discriminator 2 view .LVU1027 + 3776 00a0 504A ldr r2, .L300+16 + 3777 00a2 9342 cmp r3, r2 + 3778 00a4 7AD0 beq .L283 +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3779 .loc 1 1461 7 is_stmt 1 view .LVU1028 + 3780 00a6 1A68 ldr r2, [r3] + 3781 00a8 0121 movs r1, #1 + 3782 00aa 0A43 orrs r2, r1 + 3783 00ac 1A60 str r2, [r3] + 3784 00ae 0020 movs r0, #0 + 3785 00b0 82E0 b .L271 + 3786 .LVL281: + 3787 .L267: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3788 .loc 1 1352 46 is_stmt 0 discriminator 2 view .LVU1029 + 3789 00b2 042D cmp r5, #4 + 3790 00b4 08D0 beq .L294 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3791 .loc 1 1352 46 discriminator 5 view .LVU1030 + 3792 00b6 082D cmp r5, #8 + 3793 00b8 0DD0 beq .L295 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3794 .loc 1 1352 7 discriminator 8 view .LVU1031 + 3795 00ba 4522 movs r2, #69 + ARM GAS /tmp/ccsFKqBV.s page 126 + + + 3796 00bc 845C ldrb r4, [r0, r2] +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3797 .loc 1 1352 46 discriminator 8 view .LVU1032 + 3798 00be 023C subs r4, r4, #2 + 3799 00c0 6242 rsbs r2, r4, #0 + 3800 00c2 5441 adcs r4, r4, r2 + 3801 00c4 E4B2 uxtb r4, r4 + 3802 00c6 A7E7 b .L268 + 3803 .L294: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3804 .loc 1 1352 7 discriminator 4 view .LVU1033 + 3805 00c8 4322 movs r2, #67 + 3806 00ca 845C ldrb r4, [r0, r2] +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3807 .loc 1 1352 46 discriminator 4 view .LVU1034 + 3808 00cc 023C subs r4, r4, #2 + 3809 00ce 6242 rsbs r2, r4, #0 + 3810 00d0 5441 adcs r4, r4, r2 + 3811 00d2 E4B2 uxtb r4, r4 + 3812 00d4 A0E7 b .L268 + 3813 .L295: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3814 .loc 1 1352 7 discriminator 7 view .LVU1035 + 3815 00d6 4422 movs r2, #68 + 3816 00d8 845C ldrb r4, [r0, r2] +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3817 .loc 1 1352 46 discriminator 7 view .LVU1036 + 3818 00da 023C subs r4, r4, #2 + 3819 00dc 6242 rsbs r2, r4, #0 + 3820 00de 5441 adcs r4, r4, r2 + 3821 00e0 E4B2 uxtb r4, r4 + 3822 00e2 99E7 b .L268 + 3823 .L272: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3824 .loc 1 1356 51 discriminator 2 view .LVU1037 + 3825 00e4 042D cmp r5, #4 + 3826 00e6 08D0 beq .L296 +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3827 .loc 1 1356 51 discriminator 5 view .LVU1038 + 3828 00e8 082D cmp r5, #8 + 3829 00ea 0DD0 beq .L297 +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3830 .loc 1 1356 12 discriminator 8 view .LVU1039 + 3831 00ec 4522 movs r2, #69 + 3832 00ee B25C ldrb r2, [r6, r2] +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3833 .loc 1 1356 51 discriminator 8 view .LVU1040 + 3834 00f0 013A subs r2, r2, #1 + 3835 00f2 5042 rsbs r0, r2, #0 + 3836 00f4 4241 adcs r2, r2, r0 + 3837 .LVL282: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3838 .loc 1 1356 51 discriminator 8 view .LVU1041 + 3839 00f6 D2B2 uxtb r2, r2 + 3840 00f8 99E7 b .L273 + 3841 .LVL283: + 3842 .L296: + ARM GAS /tmp/ccsFKqBV.s page 127 + + +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3843 .loc 1 1356 12 discriminator 4 view .LVU1042 + 3844 00fa 4322 movs r2, #67 + 3845 00fc B25C ldrb r2, [r6, r2] +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3846 .loc 1 1356 51 discriminator 4 view .LVU1043 + 3847 00fe 013A subs r2, r2, #1 + 3848 0100 5042 rsbs r0, r2, #0 + 3849 0102 4241 adcs r2, r2, r0 + 3850 .LVL284: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3851 .loc 1 1356 51 discriminator 4 view .LVU1044 + 3852 0104 D2B2 uxtb r2, r2 + 3853 0106 92E7 b .L273 + 3854 .LVL285: + 3855 .L297: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3856 .loc 1 1356 12 discriminator 7 view .LVU1045 + 3857 0108 4422 movs r2, #68 + 3858 010a B25C ldrb r2, [r6, r2] +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3859 .loc 1 1356 51 discriminator 7 view .LVU1046 + 3860 010c 013A subs r2, r2, #1 + 3861 010e 5042 rsbs r0, r2, #0 + 3862 0110 4241 adcs r2, r2, r0 + 3863 .LVL286: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3864 .loc 1 1356 51 discriminator 7 view .LVU1047 + 3865 0112 D2B2 uxtb r2, r2 + 3866 0114 8BE7 b .L273 + 3867 .L276: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3868 .loc 1 1364 7 discriminator 2 view .LVU1048 + 3869 0116 042D cmp r5, #4 + 3870 0118 0CD0 beq .L298 +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3871 .loc 1 1364 7 discriminator 4 view .LVU1049 + 3872 011a 082D cmp r5, #8 + 3873 011c 24D0 beq .L299 +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3874 .loc 1 1364 7 discriminator 7 view .LVU1050 + 3875 011e 4522 movs r2, #69 + 3876 0120 0220 movs r0, #2 + 3877 0122 B054 strb r0, [r6, r2] +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3878 .loc 1 1372 3 is_stmt 1 view .LVU1051 + 3879 0124 042D cmp r5, #4 + 3880 0126 08D0 beq .L279 + 3881 0128 082D cmp r5, #8 + 3882 012a 20D0 beq .L281 + 3883 012c 002D cmp r5, #0 + 3884 012e 8CD0 beq .L277 + 3885 0130 0120 movs r0, #1 + 3886 0132 41E0 b .L271 + 3887 .L298: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3888 .loc 1 1364 7 is_stmt 0 discriminator 3 view .LVU1052 + ARM GAS /tmp/ccsFKqBV.s page 128 + + + 3889 0134 4322 movs r2, #67 + 3890 0136 0220 movs r0, #2 + 3891 0138 B054 strb r0, [r6, r2] +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3892 .loc 1 1372 3 is_stmt 1 view .LVU1053 + 3893 .L279: +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3894 .loc 1 1398 7 view .LVU1054 +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3895 .loc 1 1398 17 is_stmt 0 view .LVU1055 + 3896 013a B26A ldr r2, [r6, #40] +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3897 .loc 1 1398 52 view .LVU1056 + 3898 013c 2548 ldr r0, .L300 + 3899 013e 9062 str r0, [r2, #40] +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3900 .loc 1 1399 7 is_stmt 1 view .LVU1057 +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3901 .loc 1 1399 17 is_stmt 0 view .LVU1058 + 3902 0140 B26A ldr r2, [r6, #40] +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3903 .loc 1 1399 56 view .LVU1059 + 3904 0142 2548 ldr r0, .L300+4 + 3905 0144 D062 str r0, [r2, #44] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3906 .loc 1 1402 7 is_stmt 1 view .LVU1060 +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3907 .loc 1 1402 17 is_stmt 0 view .LVU1061 + 3908 0146 B26A ldr r2, [r6, #40] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3909 .loc 1 1402 53 view .LVU1062 + 3910 0148 2448 ldr r0, .L300+8 + 3911 014a 1063 str r0, [r2, #48] +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3912 .loc 1 1405 7 is_stmt 1 view .LVU1063 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3913 .loc 1 1405 88 is_stmt 0 view .LVU1064 + 3914 014c 3268 ldr r2, [r6] +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3915 .loc 1 1405 83 view .LVU1065 + 3916 014e 3832 adds r2, r2, #56 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3917 .loc 1 1405 11 view .LVU1066 + 3918 0150 B06A ldr r0, [r6, #40] + 3919 0152 FFF7FEFF bl HAL_DMA_Start_IT + 3920 .LVL287: +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3921 .loc 1 1405 10 discriminator 1 view .LVU1067 + 3922 0156 0028 cmp r0, #0 + 3923 0158 35D1 bne .L291 +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3924 .loc 1 1412 7 is_stmt 1 view .LVU1068 + 3925 015a 3268 ldr r2, [r6] + 3926 015c D168 ldr r1, [r2, #12] + 3927 015e 8023 movs r3, #128 + 3928 0160 DB00 lsls r3, r3, #3 + 3929 0162 0B43 orrs r3, r1 + ARM GAS /tmp/ccsFKqBV.s page 129 + + + 3930 0164 D360 str r3, [r2, #12] +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3931 .loc 1 1413 7 view .LVU1069 +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3932 .loc 1 1442 3 view .LVU1070 + 3933 0166 87E7 b .L282 + 3934 .LVL288: + 3935 .L299: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3936 .loc 1 1364 7 is_stmt 0 discriminator 6 view .LVU1071 + 3937 0168 4422 movs r2, #68 + 3938 016a 0220 movs r0, #2 + 3939 016c B054 strb r0, [r6, r2] +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3940 .loc 1 1372 3 is_stmt 1 view .LVU1072 + 3941 .L281: +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3942 .loc 1 1419 7 view .LVU1073 +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3943 .loc 1 1419 17 is_stmt 0 view .LVU1074 + 3944 016e F26A ldr r2, [r6, #44] +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3945 .loc 1 1419 52 view .LVU1075 + 3946 0170 1848 ldr r0, .L300 + 3947 0172 9062 str r0, [r2, #40] +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3948 .loc 1 1420 7 is_stmt 1 view .LVU1076 +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3949 .loc 1 1420 17 is_stmt 0 view .LVU1077 + 3950 0174 F26A ldr r2, [r6, #44] +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3951 .loc 1 1420 56 view .LVU1078 + 3952 0176 1848 ldr r0, .L300+4 + 3953 0178 D062 str r0, [r2, #44] +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3954 .loc 1 1423 7 is_stmt 1 view .LVU1079 +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3955 .loc 1 1423 17 is_stmt 0 view .LVU1080 + 3956 017a F26A ldr r2, [r6, #44] +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3957 .loc 1 1423 53 view .LVU1081 + 3958 017c 1748 ldr r0, .L300+8 + 3959 017e 1063 str r0, [r2, #48] +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3960 .loc 1 1426 7 is_stmt 1 view .LVU1082 +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3961 .loc 1 1426 88 is_stmt 0 view .LVU1083 + 3962 0180 3268 ldr r2, [r6] +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3963 .loc 1 1426 83 view .LVU1084 + 3964 0182 3C32 adds r2, r2, #60 +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3965 .loc 1 1426 11 view .LVU1085 + 3966 0184 F06A ldr r0, [r6, #44] + 3967 0186 FFF7FEFF bl HAL_DMA_Start_IT + 3968 .LVL289: +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + ARM GAS /tmp/ccsFKqBV.s page 130 + + + 3969 .loc 1 1426 10 discriminator 1 view .LVU1086 + 3970 018a 0028 cmp r0, #0 + 3971 018c 1DD1 bne .L292 +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3972 .loc 1 1433 7 is_stmt 1 view .LVU1087 + 3973 018e 3268 ldr r2, [r6] + 3974 0190 D168 ldr r1, [r2, #12] + 3975 0192 8023 movs r3, #128 + 3976 0194 1B01 lsls r3, r3, #4 + 3977 0196 0B43 orrs r3, r1 + 3978 0198 D360 str r3, [r2, #12] +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3979 .loc 1 1434 7 view .LVU1088 +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3980 .loc 1 1442 3 view .LVU1089 + 3981 019a 6DE7 b .L282 + 3982 .L283: +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3983 .loc 1 1453 7 view .LVU1090 +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3984 .loc 1 1453 31 is_stmt 0 view .LVU1091 + 3985 019c 9968 ldr r1, [r3, #8] +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3986 .loc 1 1453 15 view .LVU1092 + 3987 019e 0722 movs r2, #7 + 3988 01a0 0A40 ands r2, r1 + 3989 .LVL290: +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3990 .loc 1 1454 7 is_stmt 1 view .LVU1093 +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3991 .loc 1 1454 10 is_stmt 0 view .LVU1094 + 3992 01a2 062A cmp r2, #6 + 3993 01a4 13D0 beq .L293 +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3994 .loc 1 1456 9 is_stmt 1 view .LVU1095 + 3995 01a6 1A68 ldr r2, [r3] + 3996 .LVL291: +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3997 .loc 1 1456 9 is_stmt 0 view .LVU1096 + 3998 01a8 0121 movs r1, #1 + 3999 .LVL292: +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4000 .loc 1 1456 9 view .LVU1097 + 4001 01aa 0A43 orrs r2, r1 + 4002 01ac 1A60 str r2, [r3] + 4003 01ae 0020 movs r0, #0 + 4004 01b0 02E0 b .L271 + 4005 .LVL293: + 4006 .L285: +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4007 .loc 1 1354 12 view .LVU1098 + 4008 01b2 0220 movs r0, #2 + 4009 .LVL294: +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4010 .loc 1 1354 12 view .LVU1099 + 4011 01b4 00E0 b .L271 + 4012 .L286: + ARM GAS /tmp/ccsFKqBV.s page 131 + + +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4013 .loc 1 1369 12 view .LVU1100 + 4014 01b6 0120 movs r0, #1 + 4015 .LVL295: + 4016 .L271: +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4017 .loc 1 1467 1 view .LVU1101 + 4018 @ sp needed + 4019 .LVL296: + 4020 .LVL297: +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4021 .loc 1 1467 1 view .LVU1102 + 4022 01b8 70BD pop {r4, r5, r6, pc} + 4023 .LVL298: + 4024 .L287: +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4025 .loc 1 1360 14 view .LVU1103 + 4026 01ba 0120 movs r0, #1 + 4027 01bc FCE7 b .L271 + 4028 .L288: + 4029 01be 0120 movs r0, #1 + 4030 01c0 FAE7 b .L271 + 4031 .LVL299: + 4032 .L290: +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4033 .loc 1 1388 16 view .LVU1104 + 4034 01c2 0120 movs r0, #1 + 4035 01c4 F8E7 b .L271 + 4036 .L291: +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4037 .loc 1 1409 16 view .LVU1105 + 4038 01c6 0120 movs r0, #1 + 4039 01c8 F6E7 b .L271 + 4040 .L292: +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4041 .loc 1 1430 16 view .LVU1106 + 4042 01ca 0120 movs r0, #1 + 4043 01cc F4E7 b .L271 + 4044 .LVL300: + 4045 .L293: +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4046 .loc 1 1430 16 view .LVU1107 + 4047 01ce 0020 movs r0, #0 + 4048 01d0 F2E7 b .L271 + 4049 .L301: + 4050 01d2 C046 .align 2 + 4051 .L300: + 4052 01d4 00000000 .word TIM_DMADelayPulseNCplt + 4053 01d8 00000000 .word TIM_DMADelayPulseHalfCplt + 4054 01dc 00000000 .word TIM_DMAErrorCCxN + 4055 01e0 002C0140 .word 1073818624 + 4056 01e4 00040040 .word 1073742848 + 4057 .cfi_endproc + 4058 .LFE60: + 4060 .section .text.HAL_TIMEx_PWMN_Stop_DMA,"ax",%progbits + 4061 .align 1 + 4062 .global HAL_TIMEx_PWMN_Stop_DMA + ARM GAS /tmp/ccsFKqBV.s page 132 + + + 4063 .syntax unified + 4064 .code 16 + 4065 .thumb_func + 4067 HAL_TIMEx_PWMN_Stop_DMA: + 4068 .LVL301: + 4069 .LFB61: +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 4070 .loc 1 1481 1 is_stmt 1 view -0 + 4071 .cfi_startproc + 4072 @ args = 0, pretend = 0, frame = 0 + 4073 @ frame_needed = 0, uses_anonymous_args = 0 +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 4074 .loc 1 1481 1 is_stmt 0 view .LVU1109 + 4075 0000 70B5 push {r4, r5, r6, lr} + 4076 .cfi_def_cfa_offset 16 + 4077 .cfi_offset 4, -16 + 4078 .cfi_offset 5, -12 + 4079 .cfi_offset 6, -8 + 4080 .cfi_offset 14, -4 + 4081 0002 0400 movs r4, r0 + 4082 0004 0D00 movs r5, r1 +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4083 .loc 1 1482 3 is_stmt 1 view .LVU1110 + 4084 .LVL302: +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4085 .loc 1 1485 3 view .LVU1111 +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4086 .loc 1 1487 3 view .LVU1112 + 4087 0006 0429 cmp r1, #4 + 4088 0008 31D0 beq .L303 + 4089 000a 0829 cmp r1, #8 + 4090 000c 38D0 beq .L304 + 4091 000e 0029 cmp r1, #0 + 4092 0010 52D1 bne .L312 +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 4093 .loc 1 1492 7 view .LVU1113 + 4094 0012 0268 ldr r2, [r0] + 4095 0014 D368 ldr r3, [r2, #12] + 4096 0016 2949 ldr r1, .L315 + 4097 .LVL303: +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 4098 .loc 1 1492 7 is_stmt 0 view .LVU1114 + 4099 0018 0B40 ands r3, r1 + 4100 001a D360 str r3, [r2, #12] +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4101 .loc 1 1493 7 is_stmt 1 view .LVU1115 +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4102 .loc 1 1493 13 is_stmt 0 view .LVU1116 + 4103 001c 406A ldr r0, [r0, #36] + 4104 .LVL304: +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4105 .loc 1 1493 13 view .LVU1117 + 4106 001e FFF7FEFF bl HAL_DMA_Abort_IT + 4107 .LVL305: +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4108 .loc 1 1494 7 is_stmt 1 view .LVU1118 +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 133 + + + 4109 .loc 1 1518 3 view .LVU1119 + 4110 .L306: +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4111 .loc 1 1521 5 view .LVU1120 + 4112 0022 2068 ldr r0, [r4] + 4113 0024 0022 movs r2, #0 + 4114 0026 2900 movs r1, r5 + 4115 0028 FFF7FEFF bl TIM_CCxNChannelCmd + 4116 .LVL306: +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4117 .loc 1 1524 5 view .LVU1121 +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4118 .loc 1 1524 5 view .LVU1122 + 4119 002c 2368 ldr r3, [r4] + 4120 002e 196A ldr r1, [r3, #32] + 4121 0030 234A ldr r2, .L315+4 + 4122 0032 1142 tst r1, r2 + 4123 0034 07D1 bne .L307 +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4124 .loc 1 1524 5 discriminator 1 view .LVU1123 + 4125 0036 196A ldr r1, [r3, #32] + 4126 0038 224A ldr r2, .L315+8 + 4127 003a 1142 tst r1, r2 + 4128 003c 03D1 bne .L307 +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4129 .loc 1 1524 5 discriminator 3 view .LVU1124 + 4130 003e 5A6C ldr r2, [r3, #68] + 4131 0040 2149 ldr r1, .L315+12 + 4132 0042 0A40 ands r2, r1 + 4133 0044 5A64 str r2, [r3, #68] + 4134 .L307: +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4135 .loc 1 1524 5 discriminator 5 view .LVU1125 +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4136 .loc 1 1527 5 view .LVU1126 +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4137 .loc 1 1527 5 view .LVU1127 + 4138 0046 2368 ldr r3, [r4] + 4139 0048 196A ldr r1, [r3, #32] + 4140 004a 1D4A ldr r2, .L315+4 + 4141 004c 1142 tst r1, r2 + 4142 004e 07D1 bne .L308 +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4143 .loc 1 1527 5 discriminator 1 view .LVU1128 + 4144 0050 196A ldr r1, [r3, #32] + 4145 0052 1C4A ldr r2, .L315+8 + 4146 0054 1142 tst r1, r2 + 4147 0056 03D1 bne .L308 +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4148 .loc 1 1527 5 discriminator 3 view .LVU1129 + 4149 0058 1A68 ldr r2, [r3] + 4150 005a 0121 movs r1, #1 + 4151 005c 8A43 bics r2, r1 + 4152 005e 1A60 str r2, [r3] + 4153 .L308: +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4154 .loc 1 1527 5 discriminator 5 view .LVU1130 + ARM GAS /tmp/ccsFKqBV.s page 134 + + +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4155 .loc 1 1530 5 view .LVU1131 + 4156 0060 002D cmp r5, #0 + 4157 0062 16D1 bne .L309 +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4158 .loc 1 1530 5 is_stmt 0 discriminator 1 view .LVU1132 + 4159 0064 4223 movs r3, #66 + 4160 0066 0122 movs r2, #1 + 4161 0068 E254 strb r2, [r4, r3] + 4162 006a 0020 movs r0, #0 + 4163 .L305: + 4164 .LVL307: +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4165 .loc 1 1534 3 is_stmt 1 view .LVU1133 +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4166 .loc 1 1535 1 is_stmt 0 view .LVU1134 + 4167 @ sp needed + 4168 .LVL308: + 4169 .LVL309: +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4170 .loc 1 1535 1 view .LVU1135 + 4171 006c 70BD pop {r4, r5, r6, pc} + 4172 .LVL310: + 4173 .L303: +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 4174 .loc 1 1500 7 is_stmt 1 view .LVU1136 + 4175 006e 0268 ldr r2, [r0] + 4176 0070 D368 ldr r3, [r2, #12] + 4177 0072 1649 ldr r1, .L315+16 + 4178 .LVL311: +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 4179 .loc 1 1500 7 is_stmt 0 view .LVU1137 + 4180 0074 0B40 ands r3, r1 + 4181 0076 D360 str r3, [r2, #12] +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4182 .loc 1 1501 7 is_stmt 1 view .LVU1138 +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4183 .loc 1 1501 13 is_stmt 0 view .LVU1139 + 4184 0078 806A ldr r0, [r0, #40] + 4185 .LVL312: +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4186 .loc 1 1501 13 view .LVU1140 + 4187 007a FFF7FEFF bl HAL_DMA_Abort_IT + 4188 .LVL313: +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4189 .loc 1 1502 7 is_stmt 1 view .LVU1141 +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4190 .loc 1 1518 3 view .LVU1142 + 4191 007e D0E7 b .L306 + 4192 .LVL314: + 4193 .L304: +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 4194 .loc 1 1508 7 view .LVU1143 + 4195 0080 0268 ldr r2, [r0] + 4196 0082 D368 ldr r3, [r2, #12] + 4197 0084 1249 ldr r1, .L315+20 + 4198 .LVL315: + ARM GAS /tmp/ccsFKqBV.s page 135 + + +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 4199 .loc 1 1508 7 is_stmt 0 view .LVU1144 + 4200 0086 0B40 ands r3, r1 + 4201 0088 D360 str r3, [r2, #12] +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4202 .loc 1 1509 7 is_stmt 1 view .LVU1145 +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4203 .loc 1 1509 13 is_stmt 0 view .LVU1146 + 4204 008a C06A ldr r0, [r0, #44] + 4205 .LVL316: +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4206 .loc 1 1509 13 view .LVU1147 + 4207 008c FFF7FEFF bl HAL_DMA_Abort_IT + 4208 .LVL317: +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4209 .loc 1 1510 7 is_stmt 1 view .LVU1148 +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4210 .loc 1 1518 3 view .LVU1149 + 4211 0090 C7E7 b .L306 + 4212 .L309: +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4213 .loc 1 1530 5 is_stmt 0 discriminator 2 view .LVU1150 + 4214 0092 042D cmp r5, #4 + 4215 0094 06D0 beq .L313 +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4216 .loc 1 1530 5 discriminator 4 view .LVU1151 + 4217 0096 082D cmp r5, #8 + 4218 0098 09D0 beq .L314 +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4219 .loc 1 1530 5 discriminator 7 view .LVU1152 + 4220 009a 4523 movs r3, #69 + 4221 009c 0122 movs r2, #1 + 4222 009e E254 strb r2, [r4, r3] + 4223 00a0 0020 movs r0, #0 + 4224 00a2 E3E7 b .L305 + 4225 .L313: +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4226 .loc 1 1530 5 discriminator 3 view .LVU1153 + 4227 00a4 4323 movs r3, #67 + 4228 00a6 0122 movs r2, #1 + 4229 00a8 E254 strb r2, [r4, r3] + 4230 00aa 0020 movs r0, #0 + 4231 00ac DEE7 b .L305 + 4232 .L314: +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4233 .loc 1 1530 5 discriminator 6 view .LVU1154 + 4234 00ae 4423 movs r3, #68 + 4235 00b0 0122 movs r2, #1 + 4236 00b2 E254 strb r2, [r4, r3] + 4237 00b4 0020 movs r0, #0 + 4238 00b6 D9E7 b .L305 + 4239 .LVL318: + 4240 .L312: +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4241 .loc 1 1487 3 view .LVU1155 + 4242 00b8 0120 movs r0, #1 + 4243 .LVL319: + ARM GAS /tmp/ccsFKqBV.s page 136 + + +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4244 .loc 1 1487 3 view .LVU1156 + 4245 00ba D7E7 b .L305 + 4246 .L316: + 4247 .align 2 + 4248 .L315: + 4249 00bc FFFDFFFF .word -513 + 4250 00c0 11110000 .word 4369 + 4251 00c4 44040000 .word 1092 + 4252 00c8 FF7FFFFF .word -32769 + 4253 00cc FFFBFFFF .word -1025 + 4254 00d0 FFF7FFFF .word -2049 + 4255 .cfi_endproc + 4256 .LFE61: + 4258 .section .text.HAL_TIMEx_OnePulseN_Start,"ax",%progbits + 4259 .align 1 + 4260 .global HAL_TIMEx_OnePulseN_Start + 4261 .syntax unified + 4262 .code 16 + 4263 .thumb_func + 4265 HAL_TIMEx_OnePulseN_Start: + 4266 .LVL320: + 4267 .LFB62: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4268 .loc 1 1572 1 is_stmt 1 view -0 + 4269 .cfi_startproc + 4270 @ args = 0, pretend = 0, frame = 0 + 4271 @ frame_needed = 0, uses_anonymous_args = 0 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4272 .loc 1 1572 1 is_stmt 0 view .LVU1158 + 4273 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 4274 .cfi_def_cfa_offset 24 + 4275 .cfi_offset 3, -24 + 4276 .cfi_offset 4, -20 + 4277 .cfi_offset 5, -16 + 4278 .cfi_offset 6, -12 + 4279 .cfi_offset 7, -8 + 4280 .cfi_offset 14, -4 + 4281 0002 0400 movs r4, r0 +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4282 .loc 1 1573 3 is_stmt 1 view .LVU1159 +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4283 .loc 1 1573 77 is_stmt 0 view .LVU1160 + 4284 0004 0029 cmp r1, #0 + 4285 0006 16D1 bne .L320 +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4286 .loc 1 1573 77 discriminator 1 view .LVU1161 + 4287 0008 0426 movs r6, #4 + 4288 .L318: + 4289 .LVL321: +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4290 .loc 1 1574 3 is_stmt 1 view .LVU1162 +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4291 .loc 1 1574 31 is_stmt 0 view .LVU1163 + 4292 000a 3E23 movs r3, #62 + 4293 000c E75C ldrb r7, [r4, r3] + 4294 000e F8B2 uxtb r0, r7 + ARM GAS /tmp/ccsFKqBV.s page 137 + + + 4295 .LVL322: +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4296 .loc 1 1575 3 is_stmt 1 view .LVU1164 +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4297 .loc 1 1575 31 is_stmt 0 view .LVU1165 + 4298 0010 0133 adds r3, r3, #1 + 4299 0012 E35C ldrb r3, [r4, r3] + 4300 0014 DBB2 uxtb r3, r3 + 4301 .LVL323: +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4302 .loc 1 1576 3 is_stmt 1 view .LVU1166 +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4303 .loc 1 1576 31 is_stmt 0 view .LVU1167 + 4304 0016 4222 movs r2, #66 + 4305 0018 A25C ldrb r2, [r4, r2] + 4306 001a D2B2 uxtb r2, r2 + 4307 .LVL324: +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4308 .loc 1 1577 3 is_stmt 1 view .LVU1168 +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4309 .loc 1 1577 31 is_stmt 0 view .LVU1169 + 4310 001c 4325 movs r5, #67 + 4311 001e 655D ldrb r5, [r4, r5] + 4312 0020 EDB2 uxtb r5, r5 + 4313 .LVL325: +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4314 .loc 1 1580 3 is_stmt 1 view .LVU1170 +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4315 .loc 1 1583 3 view .LVU1171 +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4316 .loc 1 1583 6 is_stmt 0 view .LVU1172 + 4317 0022 012F cmp r7, #1 + 4318 0024 23D1 bne .L321 +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 4319 .loc 1 1584 7 view .LVU1173 + 4320 0026 012B cmp r3, #1 + 4321 0028 22D1 bne .L319 +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 4322 .loc 1 1585 7 view .LVU1174 + 4323 002a 012A cmp r2, #1 + 4324 002c 21D1 bne .L322 +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4325 .loc 1 1586 7 view .LVU1175 + 4326 002e 012D cmp r5, #1 + 4327 0030 03D0 beq .L324 +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4328 .loc 1 1588 12 view .LVU1176 + 4329 0032 1000 movs r0, r2 + 4330 .LVL326: +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4331 .loc 1 1588 12 view .LVU1177 + 4332 0034 1CE0 b .L319 + 4333 .LVL327: + 4334 .L320: +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4335 .loc 1 1573 77 discriminator 2 view .LVU1178 + 4336 0036 0026 movs r6, #0 + ARM GAS /tmp/ccsFKqBV.s page 138 + + + 4337 0038 E7E7 b .L318 + 4338 .LVL328: + 4339 .L324: +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4340 .loc 1 1592 3 is_stmt 1 view .LVU1179 + 4341 003a 0133 adds r3, r3, #1 + 4342 .LVL329: +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4343 .loc 1 1592 3 is_stmt 0 view .LVU1180 + 4344 003c 3D32 adds r2, r2, #61 + 4345 .LVL330: +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4346 .loc 1 1592 3 view .LVU1181 + 4347 003e A354 strb r3, [r4, r2] +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4348 .loc 1 1593 3 is_stmt 1 view .LVU1182 + 4349 0040 0132 adds r2, r2, #1 + 4350 .LVL331: +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4351 .loc 1 1593 3 is_stmt 0 view .LVU1183 + 4352 0042 A354 strb r3, [r4, r2] +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4353 .loc 1 1594 3 is_stmt 1 view .LVU1184 + 4354 0044 0332 adds r2, r2, #3 + 4355 .LVL332: +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4356 .loc 1 1594 3 is_stmt 0 view .LVU1185 + 4357 0046 A354 strb r3, [r4, r2] +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4358 .loc 1 1595 3 is_stmt 1 view .LVU1186 + 4359 0048 0132 adds r2, r2, #1 + 4360 .LVL333: +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4361 .loc 1 1595 3 is_stmt 0 view .LVU1187 + 4362 004a A354 strb r3, [r4, r2] +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4363 .loc 1 1598 3 is_stmt 1 view .LVU1188 + 4364 004c 2068 ldr r0, [r4] + 4365 .LVL334: +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4366 .loc 1 1598 3 is_stmt 0 view .LVU1189 + 4367 004e 3F3A subs r2, r2, #63 + 4368 .LVL335: +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4369 .loc 1 1598 3 view .LVU1190 + 4370 0050 FFF7FEFF bl TIM_CCxNChannelCmd + 4371 .LVL336: +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4372 .loc 1 1599 3 is_stmt 1 view .LVU1191 + 4373 0054 2068 ldr r0, [r4] + 4374 0056 0122 movs r2, #1 + 4375 0058 3100 movs r1, r6 + 4376 005a FFF7FEFF bl TIM_CCxChannelCmd + 4377 .LVL337: +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4378 .loc 1 1602 3 view .LVU1192 + 4379 005e 2268 ldr r2, [r4] + ARM GAS /tmp/ccsFKqBV.s page 139 + + + 4380 0060 516C ldr r1, [r2, #68] + 4381 0062 8023 movs r3, #128 + 4382 0064 1B02 lsls r3, r3, #8 + 4383 0066 0B43 orrs r3, r1 + 4384 0068 5364 str r3, [r2, #68] +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4385 .loc 1 1605 3 view .LVU1193 +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4386 .loc 1 1605 10 is_stmt 0 view .LVU1194 + 4387 006a 0020 movs r0, #0 + 4388 006c 00E0 b .L319 + 4389 .LVL338: + 4390 .L321: +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4391 .loc 1 1588 12 view .LVU1195 + 4392 006e 0120 movs r0, #1 + 4393 .LVL339: + 4394 .L319: +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4395 .loc 1 1606 1 view .LVU1196 + 4396 @ sp needed + 4397 .LVL340: + 4398 .LVL341: + 4399 .LVL342: + 4400 .LVL343: +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4401 .loc 1 1606 1 view .LVU1197 + 4402 0070 F8BD pop {r3, r4, r5, r6, r7, pc} + 4403 .LVL344: + 4404 .L322: +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4405 .loc 1 1588 12 view .LVU1198 + 4406 0072 1800 movs r0, r3 + 4407 .LVL345: +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4408 .loc 1 1588 12 view .LVU1199 + 4409 0074 FCE7 b .L319 + 4410 .cfi_endproc + 4411 .LFE62: + 4413 .section .text.HAL_TIMEx_OnePulseN_Stop,"ax",%progbits + 4414 .align 1 + 4415 .global HAL_TIMEx_OnePulseN_Stop + 4416 .syntax unified + 4417 .code 16 + 4418 .thumb_func + 4420 HAL_TIMEx_OnePulseN_Stop: + 4421 .LVL346: + 4422 .LFB63: +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4423 .loc 1 1621 1 is_stmt 1 view -0 + 4424 .cfi_startproc + 4425 @ args = 0, pretend = 0, frame = 0 + 4426 @ frame_needed = 0, uses_anonymous_args = 0 +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4427 .loc 1 1621 1 is_stmt 0 view .LVU1201 + 4428 0000 70B5 push {r4, r5, r6, lr} + 4429 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccsFKqBV.s page 140 + + + 4430 .cfi_offset 4, -16 + 4431 .cfi_offset 5, -12 + 4432 .cfi_offset 6, -8 + 4433 .cfi_offset 14, -4 + 4434 0002 0400 movs r4, r0 +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4435 .loc 1 1622 3 is_stmt 1 view .LVU1202 +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4436 .loc 1 1622 77 is_stmt 0 view .LVU1203 + 4437 0004 0029 cmp r1, #0 + 4438 0006 2ED1 bne .L329 +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4439 .loc 1 1622 77 discriminator 1 view .LVU1204 + 4440 0008 0425 movs r5, #4 + 4441 .L326: + 4442 .LVL347: +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4443 .loc 1 1625 3 is_stmt 1 view .LVU1205 +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4444 .loc 1 1628 3 view .LVU1206 + 4445 000a 2068 ldr r0, [r4] + 4446 .LVL348: +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4447 .loc 1 1628 3 is_stmt 0 view .LVU1207 + 4448 000c 0022 movs r2, #0 + 4449 000e FFF7FEFF bl TIM_CCxNChannelCmd + 4450 .LVL349: +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4451 .loc 1 1629 3 is_stmt 1 view .LVU1208 + 4452 0012 2068 ldr r0, [r4] + 4453 0014 0022 movs r2, #0 + 4454 0016 2900 movs r1, r5 + 4455 0018 FFF7FEFF bl TIM_CCxChannelCmd + 4456 .LVL350: +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4457 .loc 1 1632 3 view .LVU1209 +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4458 .loc 1 1632 3 view .LVU1210 + 4459 001c 2368 ldr r3, [r4] + 4460 001e 196A ldr r1, [r3, #32] + 4461 0020 124A ldr r2, .L330 + 4462 0022 1142 tst r1, r2 + 4463 0024 07D1 bne .L327 +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4464 .loc 1 1632 3 discriminator 1 view .LVU1211 + 4465 0026 196A ldr r1, [r3, #32] + 4466 0028 114A ldr r2, .L330+4 + 4467 002a 1142 tst r1, r2 + 4468 002c 03D1 bne .L327 +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4469 .loc 1 1632 3 discriminator 3 view .LVU1212 + 4470 002e 5A6C ldr r2, [r3, #68] + 4471 0030 1049 ldr r1, .L330+8 + 4472 0032 0A40 ands r2, r1 + 4473 0034 5A64 str r2, [r3, #68] + 4474 .L327: +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 141 + + + 4475 .loc 1 1632 3 discriminator 5 view .LVU1213 +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4476 .loc 1 1635 3 view .LVU1214 +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4477 .loc 1 1635 3 view .LVU1215 + 4478 0036 2368 ldr r3, [r4] + 4479 0038 196A ldr r1, [r3, #32] + 4480 003a 0C4A ldr r2, .L330 + 4481 003c 1142 tst r1, r2 + 4482 003e 07D1 bne .L328 +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4483 .loc 1 1635 3 discriminator 1 view .LVU1216 + 4484 0040 196A ldr r1, [r3, #32] + 4485 0042 0B4A ldr r2, .L330+4 + 4486 0044 1142 tst r1, r2 + 4487 0046 03D1 bne .L328 +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4488 .loc 1 1635 3 discriminator 3 view .LVU1217 + 4489 0048 1A68 ldr r2, [r3] + 4490 004a 0121 movs r1, #1 + 4491 004c 8A43 bics r2, r1 + 4492 004e 1A60 str r2, [r3] + 4493 .L328: +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4494 .loc 1 1635 3 discriminator 5 view .LVU1218 +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4495 .loc 1 1638 3 view .LVU1219 + 4496 0050 0123 movs r3, #1 + 4497 0052 3E22 movs r2, #62 + 4498 0054 A354 strb r3, [r4, r2] +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4499 .loc 1 1639 3 view .LVU1220 + 4500 0056 0132 adds r2, r2, #1 + 4501 0058 A354 strb r3, [r4, r2] +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4502 .loc 1 1640 3 view .LVU1221 + 4503 005a 0332 adds r2, r2, #3 + 4504 005c A354 strb r3, [r4, r2] +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4505 .loc 1 1641 3 view .LVU1222 + 4506 005e 0132 adds r2, r2, #1 + 4507 0060 A354 strb r3, [r4, r2] +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4508 .loc 1 1644 3 view .LVU1223 +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4509 .loc 1 1645 1 is_stmt 0 view .LVU1224 + 4510 0062 0020 movs r0, #0 + 4511 @ sp needed + 4512 .LVL351: + 4513 .LVL352: +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4514 .loc 1 1645 1 view .LVU1225 + 4515 0064 70BD pop {r4, r5, r6, pc} + 4516 .LVL353: + 4517 .L329: +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4518 .loc 1 1622 77 discriminator 2 view .LVU1226 + ARM GAS /tmp/ccsFKqBV.s page 142 + + + 4519 0066 0025 movs r5, #0 + 4520 0068 CFE7 b .L326 + 4521 .L331: + 4522 006a C046 .align 2 + 4523 .L330: + 4524 006c 11110000 .word 4369 + 4525 0070 44040000 .word 1092 + 4526 0074 FF7FFFFF .word -32769 + 4527 .cfi_endproc + 4528 .LFE63: + 4530 .section .text.HAL_TIMEx_OnePulseN_Start_IT,"ax",%progbits + 4531 .align 1 + 4532 .global HAL_TIMEx_OnePulseN_Start_IT + 4533 .syntax unified + 4534 .code 16 + 4535 .thumb_func + 4537 HAL_TIMEx_OnePulseN_Start_IT: + 4538 .LVL354: + 4539 .LFB64: +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4540 .loc 1 1660 1 is_stmt 1 view -0 + 4541 .cfi_startproc + 4542 @ args = 0, pretend = 0, frame = 0 + 4543 @ frame_needed = 0, uses_anonymous_args = 0 +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4544 .loc 1 1660 1 is_stmt 0 view .LVU1228 + 4545 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 4546 .cfi_def_cfa_offset 24 + 4547 .cfi_offset 3, -24 + 4548 .cfi_offset 4, -20 + 4549 .cfi_offset 5, -16 + 4550 .cfi_offset 6, -12 + 4551 .cfi_offset 7, -8 + 4552 .cfi_offset 14, -4 + 4553 0002 0400 movs r4, r0 +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4554 .loc 1 1661 3 is_stmt 1 view .LVU1229 +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4555 .loc 1 1661 77 is_stmt 0 view .LVU1230 + 4556 0004 0029 cmp r1, #0 + 4557 0006 16D1 bne .L335 +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4558 .loc 1 1661 77 discriminator 1 view .LVU1231 + 4559 0008 0426 movs r6, #4 + 4560 .L333: + 4561 .LVL355: +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4562 .loc 1 1662 3 is_stmt 1 view .LVU1232 +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4563 .loc 1 1662 31 is_stmt 0 view .LVU1233 + 4564 000a 3E23 movs r3, #62 + 4565 000c E75C ldrb r7, [r4, r3] + 4566 000e F8B2 uxtb r0, r7 + 4567 .LVL356: +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4568 .loc 1 1663 3 is_stmt 1 view .LVU1234 +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + ARM GAS /tmp/ccsFKqBV.s page 143 + + + 4569 .loc 1 1663 31 is_stmt 0 view .LVU1235 + 4570 0010 0133 adds r3, r3, #1 + 4571 0012 E35C ldrb r3, [r4, r3] + 4572 0014 DBB2 uxtb r3, r3 + 4573 .LVL357: +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4574 .loc 1 1664 3 is_stmt 1 view .LVU1236 +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4575 .loc 1 1664 31 is_stmt 0 view .LVU1237 + 4576 0016 4222 movs r2, #66 + 4577 0018 A25C ldrb r2, [r4, r2] + 4578 001a D2B2 uxtb r2, r2 + 4579 .LVL358: +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4580 .loc 1 1665 3 is_stmt 1 view .LVU1238 +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4581 .loc 1 1665 31 is_stmt 0 view .LVU1239 + 4582 001c 4325 movs r5, #67 + 4583 001e 655D ldrb r5, [r4, r5] + 4584 0020 EDB2 uxtb r5, r5 + 4585 .LVL359: +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4586 .loc 1 1668 3 is_stmt 1 view .LVU1240 +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4587 .loc 1 1671 3 view .LVU1241 +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4588 .loc 1 1671 6 is_stmt 0 view .LVU1242 + 4589 0022 012F cmp r7, #1 + 4590 0024 2CD1 bne .L336 +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 4591 .loc 1 1672 7 view .LVU1243 + 4592 0026 012B cmp r3, #1 + 4593 0028 2BD1 bne .L334 +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 4594 .loc 1 1673 7 view .LVU1244 + 4595 002a 012A cmp r2, #1 + 4596 002c 2AD1 bne .L337 +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4597 .loc 1 1674 7 view .LVU1245 + 4598 002e 012D cmp r5, #1 + 4599 0030 03D0 beq .L339 +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4600 .loc 1 1676 12 view .LVU1246 + 4601 0032 1000 movs r0, r2 + 4602 .LVL360: +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4603 .loc 1 1676 12 view .LVU1247 + 4604 0034 25E0 b .L334 + 4605 .LVL361: + 4606 .L335: +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4607 .loc 1 1661 77 discriminator 2 view .LVU1248 + 4608 0036 0026 movs r6, #0 + 4609 0038 E7E7 b .L333 + 4610 .LVL362: + 4611 .L339: +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + ARM GAS /tmp/ccsFKqBV.s page 144 + + + 4612 .loc 1 1680 3 is_stmt 1 view .LVU1249 + 4613 003a 0133 adds r3, r3, #1 + 4614 .LVL363: +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4615 .loc 1 1680 3 is_stmt 0 view .LVU1250 + 4616 003c 3D32 adds r2, r2, #61 + 4617 .LVL364: +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4618 .loc 1 1680 3 view .LVU1251 + 4619 003e A354 strb r3, [r4, r2] +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4620 .loc 1 1681 3 is_stmt 1 view .LVU1252 + 4621 0040 0132 adds r2, r2, #1 + 4622 .LVL365: +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4623 .loc 1 1681 3 is_stmt 0 view .LVU1253 + 4624 0042 A354 strb r3, [r4, r2] +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4625 .loc 1 1682 3 is_stmt 1 view .LVU1254 + 4626 0044 0332 adds r2, r2, #3 + 4627 .LVL366: +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4628 .loc 1 1682 3 is_stmt 0 view .LVU1255 + 4629 0046 A354 strb r3, [r4, r2] +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4630 .loc 1 1683 3 is_stmt 1 view .LVU1256 + 4631 0048 0132 adds r2, r2, #1 + 4632 .LVL367: +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4633 .loc 1 1683 3 is_stmt 0 view .LVU1257 + 4634 004a A354 strb r3, [r4, r2] +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4635 .loc 1 1686 3 is_stmt 1 view .LVU1258 + 4636 004c 2068 ldr r0, [r4] + 4637 .LVL368: +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4638 .loc 1 1686 3 is_stmt 0 view .LVU1259 + 4639 004e C268 ldr r2, [r0, #12] + 4640 .LVL369: +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4641 .loc 1 1686 3 view .LVU1260 + 4642 0050 1343 orrs r3, r2 + 4643 .LVL370: +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4644 .loc 1 1686 3 view .LVU1261 + 4645 0052 C360 str r3, [r0, #12] +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4646 .loc 1 1689 3 is_stmt 1 view .LVU1262 + 4647 0054 2268 ldr r2, [r4] + 4648 0056 D368 ldr r3, [r2, #12] + 4649 0058 0420 movs r0, #4 + 4650 005a 0343 orrs r3, r0 + 4651 005c D360 str r3, [r2, #12] +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4652 .loc 1 1692 3 view .LVU1263 + 4653 005e 2068 ldr r0, [r4] + 4654 0060 0422 movs r2, #4 + ARM GAS /tmp/ccsFKqBV.s page 145 + + + 4655 0062 FFF7FEFF bl TIM_CCxNChannelCmd + 4656 .LVL371: +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4657 .loc 1 1693 3 view .LVU1264 + 4658 0066 2068 ldr r0, [r4] + 4659 0068 0122 movs r2, #1 + 4660 006a 3100 movs r1, r6 + 4661 006c FFF7FEFF bl TIM_CCxChannelCmd + 4662 .LVL372: +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4663 .loc 1 1696 3 view .LVU1265 + 4664 0070 2268 ldr r2, [r4] + 4665 0072 516C ldr r1, [r2, #68] + 4666 0074 8023 movs r3, #128 + 4667 0076 1B02 lsls r3, r3, #8 + 4668 0078 0B43 orrs r3, r1 + 4669 007a 5364 str r3, [r2, #68] +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4670 .loc 1 1699 3 view .LVU1266 +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4671 .loc 1 1699 10 is_stmt 0 view .LVU1267 + 4672 007c 0020 movs r0, #0 + 4673 007e 00E0 b .L334 + 4674 .LVL373: + 4675 .L336: +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4676 .loc 1 1676 12 view .LVU1268 + 4677 0080 0120 movs r0, #1 + 4678 .LVL374: + 4679 .L334: +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4680 .loc 1 1700 1 view .LVU1269 + 4681 @ sp needed + 4682 .LVL375: + 4683 .LVL376: + 4684 .LVL377: + 4685 .LVL378: +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4686 .loc 1 1700 1 view .LVU1270 + 4687 0082 F8BD pop {r3, r4, r5, r6, r7, pc} + 4688 .LVL379: + 4689 .L337: +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4690 .loc 1 1676 12 view .LVU1271 + 4691 0084 1800 movs r0, r3 + 4692 .LVL380: +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4693 .loc 1 1676 12 view .LVU1272 + 4694 0086 FCE7 b .L334 + 4695 .cfi_endproc + 4696 .LFE64: + 4698 .section .text.HAL_TIMEx_OnePulseN_Stop_IT,"ax",%progbits + 4699 .align 1 + 4700 .global HAL_TIMEx_OnePulseN_Stop_IT + 4701 .syntax unified + 4702 .code 16 + 4703 .thumb_func + ARM GAS /tmp/ccsFKqBV.s page 146 + + + 4705 HAL_TIMEx_OnePulseN_Stop_IT: + 4706 .LVL381: + 4707 .LFB65: +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4708 .loc 1 1715 1 is_stmt 1 view -0 + 4709 .cfi_startproc + 4710 @ args = 0, pretend = 0, frame = 0 + 4711 @ frame_needed = 0, uses_anonymous_args = 0 +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4712 .loc 1 1715 1 is_stmt 0 view .LVU1274 + 4713 0000 70B5 push {r4, r5, r6, lr} + 4714 .cfi_def_cfa_offset 16 + 4715 .cfi_offset 4, -16 + 4716 .cfi_offset 5, -12 + 4717 .cfi_offset 6, -8 + 4718 .cfi_offset 14, -4 + 4719 0002 0400 movs r4, r0 +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4720 .loc 1 1716 3 is_stmt 1 view .LVU1275 +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4721 .loc 1 1716 77 is_stmt 0 view .LVU1276 + 4722 0004 0029 cmp r1, #0 + 4723 0006 38D1 bne .L344 +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4724 .loc 1 1716 77 discriminator 1 view .LVU1277 + 4725 0008 0425 movs r5, #4 + 4726 .L341: + 4727 .LVL382: +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4728 .loc 1 1719 3 is_stmt 1 view .LVU1278 +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4729 .loc 1 1722 3 view .LVU1279 + 4730 000a 2268 ldr r2, [r4] + 4731 000c D368 ldr r3, [r2, #12] + 4732 000e 0220 movs r0, #2 + 4733 .LVL383: +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4734 .loc 1 1722 3 is_stmt 0 view .LVU1280 + 4735 0010 8343 bics r3, r0 + 4736 0012 D360 str r3, [r2, #12] +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4737 .loc 1 1725 3 is_stmt 1 view .LVU1281 + 4738 0014 2268 ldr r2, [r4] + 4739 0016 D368 ldr r3, [r2, #12] + 4740 0018 0230 adds r0, r0, #2 + 4741 001a 8343 bics r3, r0 + 4742 001c D360 str r3, [r2, #12] +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4743 .loc 1 1728 3 view .LVU1282 + 4744 001e 2068 ldr r0, [r4] + 4745 0020 0022 movs r2, #0 + 4746 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 4747 .LVL384: +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4748 .loc 1 1729 3 view .LVU1283 + 4749 0026 2068 ldr r0, [r4] + 4750 0028 0022 movs r2, #0 + ARM GAS /tmp/ccsFKqBV.s page 147 + + + 4751 002a 2900 movs r1, r5 + 4752 002c FFF7FEFF bl TIM_CCxChannelCmd + 4753 .LVL385: +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4754 .loc 1 1732 3 view .LVU1284 +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4755 .loc 1 1732 3 view .LVU1285 + 4756 0030 2368 ldr r3, [r4] + 4757 0032 196A ldr r1, [r3, #32] + 4758 0034 124A ldr r2, .L345 + 4759 0036 1142 tst r1, r2 + 4760 0038 07D1 bne .L342 +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4761 .loc 1 1732 3 discriminator 1 view .LVU1286 + 4762 003a 196A ldr r1, [r3, #32] + 4763 003c 114A ldr r2, .L345+4 + 4764 003e 1142 tst r1, r2 + 4765 0040 03D1 bne .L342 +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4766 .loc 1 1732 3 discriminator 3 view .LVU1287 + 4767 0042 5A6C ldr r2, [r3, #68] + 4768 0044 1049 ldr r1, .L345+8 + 4769 0046 0A40 ands r2, r1 + 4770 0048 5A64 str r2, [r3, #68] + 4771 .L342: +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4772 .loc 1 1732 3 discriminator 5 view .LVU1288 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4773 .loc 1 1735 3 view .LVU1289 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4774 .loc 1 1735 3 view .LVU1290 + 4775 004a 2368 ldr r3, [r4] + 4776 004c 196A ldr r1, [r3, #32] + 4777 004e 0C4A ldr r2, .L345 + 4778 0050 1142 tst r1, r2 + 4779 0052 07D1 bne .L343 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4780 .loc 1 1735 3 discriminator 1 view .LVU1291 + 4781 0054 196A ldr r1, [r3, #32] + 4782 0056 0B4A ldr r2, .L345+4 + 4783 0058 1142 tst r1, r2 + 4784 005a 03D1 bne .L343 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4785 .loc 1 1735 3 discriminator 3 view .LVU1292 + 4786 005c 1A68 ldr r2, [r3] + 4787 005e 0121 movs r1, #1 + 4788 0060 8A43 bics r2, r1 + 4789 0062 1A60 str r2, [r3] + 4790 .L343: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4791 .loc 1 1735 3 discriminator 5 view .LVU1293 +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4792 .loc 1 1738 3 view .LVU1294 + 4793 0064 0123 movs r3, #1 + 4794 0066 3E22 movs r2, #62 + 4795 0068 A354 strb r3, [r4, r2] +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/ccsFKqBV.s page 148 + + + 4796 .loc 1 1739 3 view .LVU1295 + 4797 006a 0132 adds r2, r2, #1 + 4798 006c A354 strb r3, [r4, r2] +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4799 .loc 1 1740 3 view .LVU1296 + 4800 006e 0332 adds r2, r2, #3 + 4801 0070 A354 strb r3, [r4, r2] +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4802 .loc 1 1741 3 view .LVU1297 + 4803 0072 0132 adds r2, r2, #1 + 4804 0074 A354 strb r3, [r4, r2] +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4805 .loc 1 1744 3 view .LVU1298 +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4806 .loc 1 1745 1 is_stmt 0 view .LVU1299 + 4807 0076 0020 movs r0, #0 + 4808 @ sp needed + 4809 .LVL386: + 4810 .LVL387: +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4811 .loc 1 1745 1 view .LVU1300 + 4812 0078 70BD pop {r4, r5, r6, pc} + 4813 .LVL388: + 4814 .L344: +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4815 .loc 1 1716 77 discriminator 2 view .LVU1301 + 4816 007a 0025 movs r5, #0 + 4817 007c C5E7 b .L341 + 4818 .L346: + 4819 007e C046 .align 2 + 4820 .L345: + 4821 0080 11110000 .word 4369 + 4822 0084 44040000 .word 1092 + 4823 0088 FF7FFFFF .word -32769 + 4824 .cfi_endproc + 4825 .LFE65: + 4827 .section .text.HAL_TIMEx_ConfigCommutEvent,"ax",%progbits + 4828 .align 1 + 4829 .global HAL_TIMEx_ConfigCommutEvent + 4830 .syntax unified + 4831 .code 16 + 4832 .thumb_func + 4834 HAL_TIMEx_ConfigCommutEvent: + 4835 .LVL389: + 4836 .LFB66: +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 4837 .loc 1 1795 1 is_stmt 1 view -0 + 4838 .cfi_startproc + 4839 @ args = 0, pretend = 0, frame = 0 + 4840 @ frame_needed = 0, uses_anonymous_args = 0 +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 4841 .loc 1 1795 1 is_stmt 0 view .LVU1303 + 4842 0000 30B5 push {r4, r5, lr} + 4843 .cfi_def_cfa_offset 12 + 4844 .cfi_offset 4, -12 + 4845 .cfi_offset 5, -8 + 4846 .cfi_offset 14, -4 + ARM GAS /tmp/ccsFKqBV.s page 149 + + +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + 4847 .loc 1 1797 3 is_stmt 1 view .LVU1304 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4848 .loc 1 1798 3 view .LVU1305 +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4849 .loc 1 1800 3 view .LVU1306 +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4850 .loc 1 1800 3 view .LVU1307 + 4851 0002 3C23 movs r3, #60 + 4852 0004 C35C ldrb r3, [r0, r3] + 4853 0006 012B cmp r3, #1 + 4854 0008 30D0 beq .L351 +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4855 .loc 1 1800 3 discriminator 2 view .LVU1308 + 4856 000a 3C23 movs r3, #60 + 4857 000c 0124 movs r4, #1 + 4858 000e C454 strb r4, [r0, r3] +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4859 .loc 1 1800 3 discriminator 2 view .LVU1309 +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4860 .loc 1 1802 3 view .LVU1310 +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4861 .loc 1 1802 6 is_stmt 0 view .LVU1311 + 4862 0010 0029 cmp r1, #0 + 4863 0012 05D0 beq .L349 +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4864 .loc 1 1802 37 discriminator 1 view .LVU1312 + 4865 0014 1029 cmp r1, #16 + 4866 0016 03D0 beq .L349 +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4867 .loc 1 1802 70 discriminator 2 view .LVU1313 + 4868 0018 2029 cmp r1, #32 + 4869 001a 01D0 beq .L349 +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4870 .loc 1 1803 37 view .LVU1314 + 4871 001c 3029 cmp r1, #48 + 4872 001e 08D1 bne .L350 + 4873 .L349: +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4874 .loc 1 1806 5 is_stmt 1 view .LVU1315 +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4875 .loc 1 1806 9 is_stmt 0 view .LVU1316 + 4876 0020 0468 ldr r4, [r0] +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4877 .loc 1 1806 19 view .LVU1317 + 4878 0022 A368 ldr r3, [r4, #8] +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4879 .loc 1 1806 26 view .LVU1318 + 4880 0024 7025 movs r5, #112 + 4881 0026 AB43 bics r3, r5 + 4882 0028 A360 str r3, [r4, #8] +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4883 .loc 1 1807 5 is_stmt 1 view .LVU1319 +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4884 .loc 1 1807 9 is_stmt 0 view .LVU1320 + 4885 002a 0468 ldr r4, [r0] +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccsFKqBV.s page 150 + + + 4886 .loc 1 1807 19 view .LVU1321 + 4887 002c A368 ldr r3, [r4, #8] +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4888 .loc 1 1807 26 view .LVU1322 + 4889 002e 0B43 orrs r3, r1 + 4890 0030 A360 str r3, [r4, #8] + 4891 .L350: +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4892 .loc 1 1811 3 is_stmt 1 view .LVU1323 +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4893 .loc 1 1811 7 is_stmt 0 view .LVU1324 + 4894 0032 0168 ldr r1, [r0] + 4895 .LVL390: +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4896 .loc 1 1811 17 view .LVU1325 + 4897 0034 4B68 ldr r3, [r1, #4] +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4898 .loc 1 1811 23 view .LVU1326 + 4899 0036 0124 movs r4, #1 + 4900 0038 2343 orrs r3, r4 + 4901 003a 4B60 str r3, [r1, #4] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4902 .loc 1 1813 3 is_stmt 1 view .LVU1327 +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4903 .loc 1 1813 7 is_stmt 0 view .LVU1328 + 4904 003c 0168 ldr r1, [r0] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4905 .loc 1 1813 17 view .LVU1329 + 4906 003e 4B68 ldr r3, [r1, #4] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4907 .loc 1 1813 23 view .LVU1330 + 4908 0040 0334 adds r4, r4, #3 + 4909 0042 A343 bics r3, r4 + 4910 0044 4B60 str r3, [r1, #4] +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4911 .loc 1 1814 3 is_stmt 1 view .LVU1331 +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4912 .loc 1 1814 7 is_stmt 0 view .LVU1332 + 4913 0046 0168 ldr r1, [r0] +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4914 .loc 1 1814 17 view .LVU1333 + 4915 0048 4B68 ldr r3, [r1, #4] +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4916 .loc 1 1814 23 view .LVU1334 + 4917 004a 1343 orrs r3, r2 + 4918 004c 4B60 str r3, [r1, #4] +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4919 .loc 1 1817 3 is_stmt 1 view .LVU1335 + 4920 004e 0268 ldr r2, [r0] + 4921 .LVL391: +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4922 .loc 1 1817 3 is_stmt 0 view .LVU1336 + 4923 0050 D368 ldr r3, [r2, #12] + 4924 0052 2021 movs r1, #32 + 4925 0054 8B43 bics r3, r1 + 4926 0056 D360 str r3, [r2, #12] +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 151 + + + 4927 .loc 1 1820 3 is_stmt 1 view .LVU1337 + 4928 0058 0268 ldr r2, [r0] + 4929 005a D368 ldr r3, [r2, #12] + 4930 005c 0449 ldr r1, .L352 + 4931 005e 0B40 ands r3, r1 + 4932 0060 D360 str r3, [r2, #12] +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4933 .loc 1 1822 3 view .LVU1338 +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4934 .loc 1 1822 3 view .LVU1339 + 4935 0062 3C23 movs r3, #60 + 4936 0064 0022 movs r2, #0 + 4937 0066 C254 strb r2, [r0, r3] +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4938 .loc 1 1822 3 view .LVU1340 +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4939 .loc 1 1824 3 view .LVU1341 +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4940 .loc 1 1824 10 is_stmt 0 view .LVU1342 + 4941 0068 0020 movs r0, #0 + 4942 .LVL392: + 4943 .L348: +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4944 .loc 1 1825 1 view .LVU1343 + 4945 @ sp needed + 4946 006a 30BD pop {r4, r5, pc} + 4947 .LVL393: + 4948 .L351: +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4949 .loc 1 1800 3 discriminator 1 view .LVU1344 + 4950 006c 0220 movs r0, #2 + 4951 .LVL394: +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4952 .loc 1 1800 3 discriminator 1 view .LVU1345 + 4953 006e FCE7 b .L348 + 4954 .L353: + 4955 .align 2 + 4956 .L352: + 4957 0070 FFDFFFFF .word -8193 + 4958 .cfi_endproc + 4959 .LFE66: + 4961 .section .text.HAL_TIMEx_ConfigCommutEvent_IT,"ax",%progbits + 4962 .align 1 + 4963 .global HAL_TIMEx_ConfigCommutEvent_IT + 4964 .syntax unified + 4965 .code 16 + 4966 .thumb_func + 4968 HAL_TIMEx_ConfigCommutEvent_IT: + 4969 .LVL395: + 4970 .LFB67: +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 4971 .loc 1 1851 1 is_stmt 1 view -0 + 4972 .cfi_startproc + 4973 @ args = 0, pretend = 0, frame = 0 + 4974 @ frame_needed = 0, uses_anonymous_args = 0 +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 4975 .loc 1 1851 1 is_stmt 0 view .LVU1347 + ARM GAS /tmp/ccsFKqBV.s page 152 + + + 4976 0000 30B5 push {r4, r5, lr} + 4977 .cfi_def_cfa_offset 12 + 4978 .cfi_offset 4, -12 + 4979 .cfi_offset 5, -8 + 4980 .cfi_offset 14, -4 +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + 4981 .loc 1 1853 3 is_stmt 1 view .LVU1348 +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4982 .loc 1 1854 3 view .LVU1349 +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4983 .loc 1 1856 3 view .LVU1350 +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4984 .loc 1 1856 3 view .LVU1351 + 4985 0002 3C23 movs r3, #60 + 4986 0004 C35C ldrb r3, [r0, r3] + 4987 0006 012B cmp r3, #1 + 4988 0008 30D0 beq .L358 +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4989 .loc 1 1856 3 discriminator 2 view .LVU1352 + 4990 000a 3C23 movs r3, #60 + 4991 000c 0124 movs r4, #1 + 4992 000e C454 strb r4, [r0, r3] +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4993 .loc 1 1856 3 discriminator 2 view .LVU1353 +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4994 .loc 1 1858 3 view .LVU1354 +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4995 .loc 1 1858 6 is_stmt 0 view .LVU1355 + 4996 0010 0029 cmp r1, #0 + 4997 0012 05D0 beq .L356 +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4998 .loc 1 1858 37 discriminator 1 view .LVU1356 + 4999 0014 1029 cmp r1, #16 + 5000 0016 03D0 beq .L356 +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5001 .loc 1 1858 70 discriminator 2 view .LVU1357 + 5002 0018 2029 cmp r1, #32 + 5003 001a 01D0 beq .L356 +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5004 .loc 1 1859 37 view .LVU1358 + 5005 001c 3029 cmp r1, #48 + 5006 001e 08D1 bne .L357 + 5007 .L356: +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5008 .loc 1 1862 5 is_stmt 1 view .LVU1359 +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5009 .loc 1 1862 9 is_stmt 0 view .LVU1360 + 5010 0020 0468 ldr r4, [r0] +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5011 .loc 1 1862 19 view .LVU1361 + 5012 0022 A368 ldr r3, [r4, #8] +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5013 .loc 1 1862 26 view .LVU1362 + 5014 0024 7025 movs r5, #112 + 5015 0026 AB43 bics r3, r5 + 5016 0028 A360 str r3, [r4, #8] +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccsFKqBV.s page 153 + + + 5017 .loc 1 1863 5 is_stmt 1 view .LVU1363 +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5018 .loc 1 1863 9 is_stmt 0 view .LVU1364 + 5019 002a 0468 ldr r4, [r0] +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5020 .loc 1 1863 19 view .LVU1365 + 5021 002c A368 ldr r3, [r4, #8] +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5022 .loc 1 1863 26 view .LVU1366 + 5023 002e 0B43 orrs r3, r1 + 5024 0030 A360 str r3, [r4, #8] + 5025 .L357: +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5026 .loc 1 1867 3 is_stmt 1 view .LVU1367 +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5027 .loc 1 1867 7 is_stmt 0 view .LVU1368 + 5028 0032 0168 ldr r1, [r0] + 5029 .LVL396: +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5030 .loc 1 1867 17 view .LVU1369 + 5031 0034 4B68 ldr r3, [r1, #4] +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5032 .loc 1 1867 23 view .LVU1370 + 5033 0036 0124 movs r4, #1 + 5034 0038 2343 orrs r3, r4 + 5035 003a 4B60 str r3, [r1, #4] +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5036 .loc 1 1869 3 is_stmt 1 view .LVU1371 +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5037 .loc 1 1869 7 is_stmt 0 view .LVU1372 + 5038 003c 0168 ldr r1, [r0] +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5039 .loc 1 1869 17 view .LVU1373 + 5040 003e 4B68 ldr r3, [r1, #4] +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5041 .loc 1 1869 23 view .LVU1374 + 5042 0040 0334 adds r4, r4, #3 + 5043 0042 A343 bics r3, r4 + 5044 0044 4B60 str r3, [r1, #4] +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5045 .loc 1 1870 3 is_stmt 1 view .LVU1375 +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5046 .loc 1 1870 7 is_stmt 0 view .LVU1376 + 5047 0046 0168 ldr r1, [r0] +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5048 .loc 1 1870 17 view .LVU1377 + 5049 0048 4B68 ldr r3, [r1, #4] +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5050 .loc 1 1870 23 view .LVU1378 + 5051 004a 1343 orrs r3, r2 + 5052 004c 4B60 str r3, [r1, #4] +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5053 .loc 1 1873 3 is_stmt 1 view .LVU1379 + 5054 004e 0268 ldr r2, [r0] + 5055 .LVL397: +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5056 .loc 1 1873 3 is_stmt 0 view .LVU1380 + ARM GAS /tmp/ccsFKqBV.s page 154 + + + 5057 0050 D368 ldr r3, [r2, #12] + 5058 0052 0749 ldr r1, .L359 + 5059 0054 0B40 ands r3, r1 + 5060 0056 D360 str r3, [r2, #12] +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5061 .loc 1 1876 3 is_stmt 1 view .LVU1381 + 5062 0058 0268 ldr r2, [r0] + 5063 005a D368 ldr r3, [r2, #12] + 5064 005c 2021 movs r1, #32 + 5065 005e 0B43 orrs r3, r1 + 5066 0060 D360 str r3, [r2, #12] +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5067 .loc 1 1878 3 view .LVU1382 +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5068 .loc 1 1878 3 view .LVU1383 + 5069 0062 3C23 movs r3, #60 + 5070 0064 0022 movs r2, #0 + 5071 0066 C254 strb r2, [r0, r3] +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5072 .loc 1 1878 3 view .LVU1384 +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5073 .loc 1 1880 3 view .LVU1385 +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5074 .loc 1 1880 10 is_stmt 0 view .LVU1386 + 5075 0068 0020 movs r0, #0 + 5076 .LVL398: + 5077 .L355: +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5078 .loc 1 1881 1 view .LVU1387 + 5079 @ sp needed + 5080 006a 30BD pop {r4, r5, pc} + 5081 .LVL399: + 5082 .L358: +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5083 .loc 1 1856 3 discriminator 1 view .LVU1388 + 5084 006c 0220 movs r0, #2 + 5085 .LVL400: +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5086 .loc 1 1856 3 discriminator 1 view .LVU1389 + 5087 006e FCE7 b .L355 + 5088 .L360: + 5089 .align 2 + 5090 .L359: + 5091 0070 FFDFFFFF .word -8193 + 5092 .cfi_endproc + 5093 .LFE67: + 5095 .section .text.HAL_TIMEx_ConfigCommutEvent_DMA,"ax",%progbits + 5096 .align 1 + 5097 .global HAL_TIMEx_ConfigCommutEvent_DMA + 5098 .syntax unified + 5099 .code 16 + 5100 .thumb_func + 5102 HAL_TIMEx_ConfigCommutEvent_DMA: + 5103 .LVL401: + 5104 .LFB68: +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 5105 .loc 1 1908 1 is_stmt 1 view -0 + ARM GAS /tmp/ccsFKqBV.s page 155 + + + 5106 .cfi_startproc + 5107 @ args = 0, pretend = 0, frame = 0 + 5108 @ frame_needed = 0, uses_anonymous_args = 0 +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 5109 .loc 1 1908 1 is_stmt 0 view .LVU1391 + 5110 0000 30B5 push {r4, r5, lr} + 5111 .cfi_def_cfa_offset 12 + 5112 .cfi_offset 4, -12 + 5113 .cfi_offset 5, -8 + 5114 .cfi_offset 14, -4 +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + 5115 .loc 1 1910 3 is_stmt 1 view .LVU1392 +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5116 .loc 1 1911 3 view .LVU1393 +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5117 .loc 1 1913 3 view .LVU1394 +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5118 .loc 1 1913 3 view .LVU1395 + 5119 0002 3C23 movs r3, #60 + 5120 0004 C35C ldrb r3, [r0, r3] + 5121 0006 012B cmp r3, #1 + 5122 0008 3AD0 beq .L365 +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5123 .loc 1 1913 3 discriminator 2 view .LVU1396 + 5124 000a 3C23 movs r3, #60 + 5125 000c 0124 movs r4, #1 + 5126 000e C454 strb r4, [r0, r3] +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5127 .loc 1 1913 3 discriminator 2 view .LVU1397 +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5128 .loc 1 1915 3 view .LVU1398 +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5129 .loc 1 1915 6 is_stmt 0 view .LVU1399 + 5130 0010 0029 cmp r1, #0 + 5131 0012 05D0 beq .L363 +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5132 .loc 1 1915 37 discriminator 1 view .LVU1400 + 5133 0014 1029 cmp r1, #16 + 5134 0016 03D0 beq .L363 +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5135 .loc 1 1915 70 discriminator 2 view .LVU1401 + 5136 0018 2029 cmp r1, #32 + 5137 001a 01D0 beq .L363 +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5138 .loc 1 1916 37 view .LVU1402 + 5139 001c 3029 cmp r1, #48 + 5140 001e 08D1 bne .L364 + 5141 .L363: +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5142 .loc 1 1919 5 is_stmt 1 view .LVU1403 +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5143 .loc 1 1919 9 is_stmt 0 view .LVU1404 + 5144 0020 0468 ldr r4, [r0] +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5145 .loc 1 1919 19 view .LVU1405 + 5146 0022 A368 ldr r3, [r4, #8] +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + ARM GAS /tmp/ccsFKqBV.s page 156 + + + 5147 .loc 1 1919 26 view .LVU1406 + 5148 0024 7025 movs r5, #112 + 5149 0026 AB43 bics r3, r5 + 5150 0028 A360 str r3, [r4, #8] +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5151 .loc 1 1920 5 is_stmt 1 view .LVU1407 +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5152 .loc 1 1920 9 is_stmt 0 view .LVU1408 + 5153 002a 0468 ldr r4, [r0] +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5154 .loc 1 1920 19 view .LVU1409 + 5155 002c A368 ldr r3, [r4, #8] +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5156 .loc 1 1920 26 view .LVU1410 + 5157 002e 0B43 orrs r3, r1 + 5158 0030 A360 str r3, [r4, #8] + 5159 .L364: +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5160 .loc 1 1924 3 is_stmt 1 view .LVU1411 +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5161 .loc 1 1924 7 is_stmt 0 view .LVU1412 + 5162 0032 0168 ldr r1, [r0] + 5163 .LVL402: +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5164 .loc 1 1924 17 view .LVU1413 + 5165 0034 4B68 ldr r3, [r1, #4] +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5166 .loc 1 1924 23 view .LVU1414 + 5167 0036 0124 movs r4, #1 + 5168 0038 2343 orrs r3, r4 + 5169 003a 4B60 str r3, [r1, #4] +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5170 .loc 1 1926 3 is_stmt 1 view .LVU1415 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5171 .loc 1 1926 7 is_stmt 0 view .LVU1416 + 5172 003c 0168 ldr r1, [r0] +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5173 .loc 1 1926 17 view .LVU1417 + 5174 003e 4B68 ldr r3, [r1, #4] +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5175 .loc 1 1926 23 view .LVU1418 + 5176 0040 0334 adds r4, r4, #3 + 5177 0042 A343 bics r3, r4 + 5178 0044 4B60 str r3, [r1, #4] +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5179 .loc 1 1927 3 is_stmt 1 view .LVU1419 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5180 .loc 1 1927 7 is_stmt 0 view .LVU1420 + 5181 0046 0168 ldr r1, [r0] +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5182 .loc 1 1927 17 view .LVU1421 + 5183 0048 4B68 ldr r3, [r1, #4] +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5184 .loc 1 1927 23 view .LVU1422 + 5185 004a 1343 orrs r3, r2 + 5186 004c 4B60 str r3, [r1, #4] +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + ARM GAS /tmp/ccsFKqBV.s page 157 + + + 5187 .loc 1 1931 3 is_stmt 1 view .LVU1423 +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 5188 .loc 1 1931 13 is_stmt 0 view .LVU1424 + 5189 004e 436B ldr r3, [r0, #52] +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 5190 .loc 1 1931 56 view .LVU1425 + 5191 0050 0C4A ldr r2, .L366 + 5192 .LVL403: +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 5193 .loc 1 1931 56 view .LVU1426 + 5194 0052 9A62 str r2, [r3, #40] +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 5195 .loc 1 1932 3 is_stmt 1 view .LVU1427 +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 5196 .loc 1 1932 13 is_stmt 0 view .LVU1428 + 5197 0054 436B ldr r3, [r0, #52] +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 5198 .loc 1 1932 60 view .LVU1429 + 5199 0056 0C4A ldr r2, .L366+4 + 5200 0058 DA62 str r2, [r3, #44] +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5201 .loc 1 1934 3 is_stmt 1 view .LVU1430 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5202 .loc 1 1934 13 is_stmt 0 view .LVU1431 + 5203 005a 436B ldr r3, [r0, #52] +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5204 .loc 1 1934 57 view .LVU1432 + 5205 005c 0B4A ldr r2, .L366+8 + 5206 005e 1A63 str r2, [r3, #48] +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5207 .loc 1 1937 3 is_stmt 1 view .LVU1433 + 5208 0060 0268 ldr r2, [r0] + 5209 0062 D368 ldr r3, [r2, #12] + 5210 0064 2021 movs r1, #32 + 5211 0066 8B43 bics r3, r1 + 5212 0068 D360 str r3, [r2, #12] +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5213 .loc 1 1940 3 view .LVU1434 + 5214 006a 0268 ldr r2, [r0] + 5215 006c D168 ldr r1, [r2, #12] + 5216 006e 8023 movs r3, #128 + 5217 0070 9B01 lsls r3, r3, #6 + 5218 0072 0B43 orrs r3, r1 + 5219 0074 D360 str r3, [r2, #12] +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5220 .loc 1 1942 3 view .LVU1435 +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5221 .loc 1 1942 3 view .LVU1436 + 5222 0076 3C23 movs r3, #60 + 5223 0078 0022 movs r2, #0 + 5224 007a C254 strb r2, [r0, r3] +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5225 .loc 1 1942 3 view .LVU1437 +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5226 .loc 1 1944 3 view .LVU1438 +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5227 .loc 1 1944 10 is_stmt 0 view .LVU1439 + ARM GAS /tmp/ccsFKqBV.s page 158 + + + 5228 007c 0020 movs r0, #0 + 5229 .LVL404: + 5230 .L362: +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5231 .loc 1 1945 1 view .LVU1440 + 5232 @ sp needed + 5233 007e 30BD pop {r4, r5, pc} + 5234 .LVL405: + 5235 .L365: +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5236 .loc 1 1913 3 discriminator 1 view .LVU1441 + 5237 0080 0220 movs r0, #2 + 5238 .LVL406: +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5239 .loc 1 1913 3 discriminator 1 view .LVU1442 + 5240 0082 FCE7 b .L362 + 5241 .L367: + 5242 .align 2 + 5243 .L366: + 5244 0084 00000000 .word TIMEx_DMACommutationCplt + 5245 0088 00000000 .word TIMEx_DMACommutationHalfCplt + 5246 008c 00000000 .word TIM_DMAError + 5247 .cfi_endproc + 5248 .LFE68: + 5250 .section .text.HAL_TIMEx_MasterConfigSynchronization,"ax",%progbits + 5251 .align 1 + 5252 .global HAL_TIMEx_MasterConfigSynchronization + 5253 .syntax unified + 5254 .code 16 + 5255 .thumb_func + 5257 HAL_TIMEx_MasterConfigSynchronization: + 5258 .LVL407: + 5259 .LFB69: +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpcr2; + 5260 .loc 1 1957 1 is_stmt 1 view -0 + 5261 .cfi_startproc + 5262 @ args = 0, pretend = 0, frame = 0 + 5263 @ frame_needed = 0, uses_anonymous_args = 0 +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpcr2; + 5264 .loc 1 1957 1 is_stmt 0 view .LVU1444 + 5265 0000 30B5 push {r4, r5, lr} + 5266 .cfi_def_cfa_offset 12 + 5267 .cfi_offset 4, -12 + 5268 .cfi_offset 5, -8 + 5269 .cfi_offset 14, -4 +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 5270 .loc 1 1958 3 is_stmt 1 view .LVU1445 +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5271 .loc 1 1959 3 view .LVU1446 +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); + 5272 .loc 1 1962 3 view .LVU1447 +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); + 5273 .loc 1 1963 3 view .LVU1448 +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5274 .loc 1 1964 3 view .LVU1449 +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5275 .loc 1 1967 3 view .LVU1450 + ARM GAS /tmp/ccsFKqBV.s page 159 + + +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5276 .loc 1 1967 3 view .LVU1451 + 5277 0002 3C23 movs r3, #60 + 5278 0004 C35C ldrb r3, [r0, r3] + 5279 0006 012B cmp r3, #1 + 5280 0008 25D0 beq .L372 +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5281 .loc 1 1967 3 discriminator 2 view .LVU1452 + 5282 000a 3C23 movs r3, #60 + 5283 000c 0122 movs r2, #1 + 5284 000e C254 strb r2, [r0, r3] +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5285 .loc 1 1967 3 discriminator 2 view .LVU1453 +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5286 .loc 1 1970 3 view .LVU1454 +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5287 .loc 1 1970 15 is_stmt 0 view .LVU1455 + 5288 0010 0133 adds r3, r3, #1 + 5289 0012 0132 adds r2, r2, #1 + 5290 0014 C254 strb r2, [r0, r3] +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5291 .loc 1 1973 3 is_stmt 1 view .LVU1456 +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5292 .loc 1 1973 16 is_stmt 0 view .LVU1457 + 5293 0016 0368 ldr r3, [r0] +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5294 .loc 1 1973 10 view .LVU1458 + 5295 0018 5C68 ldr r4, [r3, #4] + 5296 .LVL408: +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5297 .loc 1 1976 3 is_stmt 1 view .LVU1459 +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5298 .loc 1 1976 11 is_stmt 0 view .LVU1460 + 5299 001a 9D68 ldr r5, [r3, #8] + 5300 .LVL409: +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the TRGO source */ + 5301 .loc 1 1979 3 is_stmt 1 view .LVU1461 +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the TRGO source */ + 5302 .loc 1 1979 10 is_stmt 0 view .LVU1462 + 5303 001c 6E32 adds r2, r2, #110 + 5304 001e 9443 bics r4, r2 + 5305 .LVL410: +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5306 .loc 1 1981 3 is_stmt 1 view .LVU1463 +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5307 .loc 1 1981 27 is_stmt 0 view .LVU1464 + 5308 0020 0A68 ldr r2, [r1] +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5309 .loc 1 1981 10 view .LVU1465 + 5310 0022 2243 orrs r2, r4 + 5311 .LVL411: +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5312 .loc 1 1984 3 is_stmt 1 view .LVU1466 +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5313 .loc 1 1984 23 is_stmt 0 view .LVU1467 + 5314 0024 5A60 str r2, [r3, #4] +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccsFKqBV.s page 160 + + + 5315 .loc 1 1986 3 is_stmt 1 view .LVU1468 +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5316 .loc 1 1986 7 is_stmt 0 view .LVU1469 + 5317 0026 0368 ldr r3, [r0] +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5318 .loc 1 1986 6 view .LVU1470 + 5319 0028 0C4A ldr r2, .L373 + 5320 .LVL412: +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5321 .loc 1 1986 6 view .LVU1471 + 5322 002a 9342 cmp r3, r2 + 5323 002c 06D0 beq .L370 +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5324 .loc 1 1986 7 discriminator 1 view .LVU1472 + 5325 002e 8022 movs r2, #128 + 5326 0030 D205 lsls r2, r2, #23 + 5327 0032 9342 cmp r3, r2 + 5328 0034 02D0 beq .L370 +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5329 .loc 1 1986 7 discriminator 2 view .LVU1473 + 5330 0036 0A4A ldr r2, .L373+4 + 5331 0038 9342 cmp r3, r2 + 5332 003a 04D1 bne .L371 + 5333 .L370: +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set master mode */ + 5334 .loc 1 1989 5 is_stmt 1 view .LVU1474 +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set master mode */ + 5335 .loc 1 1989 13 is_stmt 0 view .LVU1475 + 5336 003c 8022 movs r2, #128 + 5337 003e 9543 bics r5, r2 + 5338 .LVL413: +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5339 .loc 1 1991 5 is_stmt 1 view .LVU1476 +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5340 .loc 1 1991 29 is_stmt 0 view .LVU1477 + 5341 0040 4A68 ldr r2, [r1, #4] +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5342 .loc 1 1991 13 view .LVU1478 + 5343 0042 2A43 orrs r2, r5 + 5344 .LVL414: +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5345 .loc 1 1994 5 is_stmt 1 view .LVU1479 +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5346 .loc 1 1994 26 is_stmt 0 view .LVU1480 + 5347 0044 9A60 str r2, [r3, #8] + 5348 .LVL415: + 5349 .L371: +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5350 .loc 1 1998 3 is_stmt 1 view .LVU1481 +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5351 .loc 1 1998 15 is_stmt 0 view .LVU1482 + 5352 0046 3D23 movs r3, #61 + 5353 0048 0122 movs r2, #1 + 5354 004a C254 strb r2, [r0, r3] +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5355 .loc 1 2000 3 is_stmt 1 view .LVU1483 +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccsFKqBV.s page 161 + + + 5356 .loc 1 2000 3 view .LVU1484 + 5357 004c 013B subs r3, r3, #1 + 5358 004e 0022 movs r2, #0 + 5359 0050 C254 strb r2, [r0, r3] +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5360 .loc 1 2000 3 view .LVU1485 +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5361 .loc 1 2002 3 view .LVU1486 +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5362 .loc 1 2002 10 is_stmt 0 view .LVU1487 + 5363 0052 0020 movs r0, #0 + 5364 .LVL416: + 5365 .L369: +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5366 .loc 1 2003 1 view .LVU1488 + 5367 @ sp needed + 5368 0054 30BD pop {r4, r5, pc} + 5369 .LVL417: + 5370 .L372: +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5371 .loc 1 1967 3 discriminator 1 view .LVU1489 + 5372 0056 0220 movs r0, #2 + 5373 .LVL418: +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5374 .loc 1 1967 3 discriminator 1 view .LVU1490 + 5375 0058 FCE7 b .L369 + 5376 .L374: + 5377 005a C046 .align 2 + 5378 .L373: + 5379 005c 002C0140 .word 1073818624 + 5380 0060 00040040 .word 1073742848 + 5381 .cfi_endproc + 5382 .LFE69: + 5384 .section .text.HAL_TIMEx_ConfigBreakDeadTime,"ax",%progbits + 5385 .align 1 + 5386 .global HAL_TIMEx_ConfigBreakDeadTime + 5387 .syntax unified + 5388 .code 16 + 5389 .thumb_func + 5391 HAL_TIMEx_ConfigBreakDeadTime: + 5392 .LVL419: + 5393 .LFB70: +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ + 5394 .loc 1 2018 1 is_stmt 1 view -0 + 5395 .cfi_startproc + 5396 @ args = 0, pretend = 0, frame = 0 + 5397 @ frame_needed = 0, uses_anonymous_args = 0 +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ + 5398 .loc 1 2018 1 is_stmt 0 view .LVU1492 + 5399 0000 10B5 push {r4, lr} + 5400 .cfi_def_cfa_offset 8 + 5401 .cfi_offset 4, -8 + 5402 .cfi_offset 14, -4 +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5403 .loc 1 2020 3 is_stmt 1 view .LVU1493 + 5404 .LVL420: +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); + ARM GAS /tmp/ccsFKqBV.s page 162 + + + 5405 .loc 1 2023 3 view .LVU1494 +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); + 5406 .loc 1 2024 3 view .LVU1495 +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); + 5407 .loc 1 2025 3 view .LVU1496 +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); + 5408 .loc 1 2026 3 view .LVU1497 +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); + 5409 .loc 1 2027 3 view .LVU1498 +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); + 5410 .loc 1 2028 3 view .LVU1499 +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); + 5411 .loc 1 2029 3 view .LVU1500 +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5412 .loc 1 2030 3 view .LVU1501 +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5413 .loc 1 2033 3 view .LVU1502 +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5414 .loc 1 2033 3 view .LVU1503 + 5415 0002 3C23 movs r3, #60 + 5416 0004 C35C ldrb r3, [r0, r3] + 5417 0006 012B cmp r3, #1 + 5418 0008 21D0 beq .L377 +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5419 .loc 1 2033 3 discriminator 2 view .LVU1504 + 5420 000a 3C22 movs r2, #60 + 5421 000c 0123 movs r3, #1 + 5422 000e 8354 strb r3, [r0, r2] +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5423 .loc 1 2033 3 discriminator 2 view .LVU1505 +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); + 5424 .loc 1 2039 3 view .LVU1506 + 5425 0010 CB68 ldr r3, [r1, #12] + 5426 .LVL421: +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); + 5427 .loc 1 2040 3 view .LVU1507 + 5428 0012 104C ldr r4, .L378 + 5429 0014 2340 ands r3, r4 + 5430 .LVL422: +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); + 5431 .loc 1 2040 3 is_stmt 0 view .LVU1508 + 5432 0016 8C68 ldr r4, [r1, #8] + 5433 0018 2343 orrs r3, r4 + 5434 .LVL423: +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); + 5435 .loc 1 2041 3 is_stmt 1 view .LVU1509 + 5436 001a 0F4C ldr r4, .L378+4 + 5437 001c 2340 ands r3, r4 + 5438 .LVL424: +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); + 5439 .loc 1 2041 3 is_stmt 0 view .LVU1510 + 5440 001e 4C68 ldr r4, [r1, #4] + 5441 0020 2343 orrs r3, r4 + 5442 .LVL425: +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); + 5443 .loc 1 2042 3 is_stmt 1 view .LVU1511 + 5444 0022 0E4C ldr r4, .L378+8 + ARM GAS /tmp/ccsFKqBV.s page 163 + + + 5445 0024 2340 ands r3, r4 + 5446 .LVL426: +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); + 5447 .loc 1 2042 3 is_stmt 0 view .LVU1512 + 5448 0026 0C68 ldr r4, [r1] + 5449 0028 2343 orrs r3, r4 + 5450 .LVL427: +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); + 5451 .loc 1 2043 3 is_stmt 1 view .LVU1513 + 5452 002a 0D4C ldr r4, .L378+12 + 5453 002c 2340 ands r3, r4 + 5454 .LVL428: +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); + 5455 .loc 1 2043 3 is_stmt 0 view .LVU1514 + 5456 002e 0C69 ldr r4, [r1, #16] + 5457 0030 2343 orrs r3, r4 + 5458 .LVL429: +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); + 5459 .loc 1 2044 3 is_stmt 1 view .LVU1515 + 5460 0032 0C4C ldr r4, .L378+16 + 5461 0034 2340 ands r3, r4 + 5462 .LVL430: +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); + 5463 .loc 1 2044 3 is_stmt 0 view .LVU1516 + 5464 0036 4C69 ldr r4, [r1, #20] + 5465 0038 2343 orrs r3, r4 + 5466 .LVL431: +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5467 .loc 1 2045 3 is_stmt 1 view .LVU1517 + 5468 003a 0B4C ldr r4, .L378+20 + 5469 003c 2340 ands r3, r4 + 5470 .LVL432: +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5471 .loc 1 2045 3 is_stmt 0 view .LVU1518 + 5472 003e C969 ldr r1, [r1, #28] + 5473 .LVL433: +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5474 .loc 1 2045 3 view .LVU1519 + 5475 0040 0B43 orrs r3, r1 + 5476 .LVL434: +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5477 .loc 1 2049 3 is_stmt 1 view .LVU1520 +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5478 .loc 1 2049 7 is_stmt 0 view .LVU1521 + 5479 0042 0168 ldr r1, [r0] +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5480 .loc 1 2049 24 view .LVU1522 + 5481 0044 4B64 str r3, [r1, #68] +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5482 .loc 1 2051 3 is_stmt 1 view .LVU1523 +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5483 .loc 1 2051 3 view .LVU1524 + 5484 0046 0023 movs r3, #0 + 5485 .LVL435: +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5486 .loc 1 2051 3 is_stmt 0 view .LVU1525 + 5487 0048 8354 strb r3, [r0, r2] + ARM GAS /tmp/ccsFKqBV.s page 164 + + + 5488 .LVL436: +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5489 .loc 1 2051 3 is_stmt 1 view .LVU1526 +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5490 .loc 1 2053 3 view .LVU1527 +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5491 .loc 1 2053 10 is_stmt 0 view .LVU1528 + 5492 004a 0020 movs r0, #0 + 5493 .LVL437: + 5494 .L376: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5495 .loc 1 2054 1 view .LVU1529 + 5496 @ sp needed + 5497 004c 10BD pop {r4, pc} + 5498 .LVL438: + 5499 .L377: +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5500 .loc 1 2033 3 discriminator 1 view .LVU1530 + 5501 004e 0220 movs r0, #2 + 5502 .LVL439: +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5503 .loc 1 2033 3 discriminator 1 view .LVU1531 + 5504 0050 FCE7 b .L376 + 5505 .L379: + 5506 0052 C046 .align 2 + 5507 .L378: + 5508 0054 FFFCFFFF .word -769 + 5509 0058 FFFBFFFF .word -1025 + 5510 005c FFF7FFFF .word -2049 + 5511 0060 FFEFFFFF .word -4097 + 5512 0064 FFDFFFFF .word -8193 + 5513 0068 FFBFFFFF .word -16385 + 5514 .cfi_endproc + 5515 .LFE70: + 5517 .section .text.HAL_TIMEx_RemapConfig,"ax",%progbits + 5518 .align 1 + 5519 .global HAL_TIMEx_RemapConfig + 5520 .syntax unified + 5521 .code 16 + 5522 .thumb_func + 5524 HAL_TIMEx_RemapConfig: + 5525 .LVL440: + 5526 .LFB71: +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5527 .loc 1 2069 1 is_stmt 1 view -0 + 5528 .cfi_startproc + 5529 @ args = 0, pretend = 0, frame = 0 + 5530 @ frame_needed = 0, uses_anonymous_args = 0 + 5531 @ link register save eliminated. +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5532 .loc 1 2072 3 view .LVU1533 +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5533 .loc 1 2074 3 view .LVU1534 +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5534 .loc 1 2074 3 view .LVU1535 + 5535 0000 3C23 movs r3, #60 + 5536 0002 C35C ldrb r3, [r0, r3] + ARM GAS /tmp/ccsFKqBV.s page 165 + + + 5537 0004 012B cmp r3, #1 + 5538 0006 08D0 beq .L382 +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5539 .loc 1 2074 3 discriminator 2 view .LVU1536 + 5540 0008 3C23 movs r3, #60 + 5541 000a 0122 movs r2, #1 + 5542 000c C254 strb r2, [r0, r3] +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5543 .loc 1 2074 3 discriminator 2 view .LVU1537 +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5544 .loc 1 2077 3 view .LVU1538 + 5545 000e 0268 ldr r2, [r0] + 5546 0010 1165 str r1, [r2, #80] +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5547 .loc 1 2079 3 view .LVU1539 +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5548 .loc 1 2079 3 view .LVU1540 + 5549 0012 0022 movs r2, #0 + 5550 0014 C254 strb r2, [r0, r3] +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5551 .loc 1 2079 3 view .LVU1541 +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5552 .loc 1 2081 3 view .LVU1542 +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5553 .loc 1 2081 10 is_stmt 0 view .LVU1543 + 5554 0016 0020 movs r0, #0 + 5555 .LVL441: + 5556 .L381: +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5557 .loc 1 2082 1 view .LVU1544 + 5558 @ sp needed + 5559 0018 7047 bx lr + 5560 .LVL442: + 5561 .L382: +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5562 .loc 1 2074 3 discriminator 1 view .LVU1545 + 5563 001a 0220 movs r0, #2 + 5564 .LVL443: +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5565 .loc 1 2074 3 discriminator 1 view .LVU1546 + 5566 001c FCE7 b .L381 + 5567 .cfi_endproc + 5568 .LFE71: + 5570 .section .text.HAL_TIMEx_CommutCallback,"ax",%progbits + 5571 .align 1 + 5572 .weak HAL_TIMEx_CommutCallback + 5573 .syntax unified + 5574 .code 16 + 5575 .thumb_func + 5577 HAL_TIMEx_CommutCallback: + 5578 .LVL444: + 5579 .LFB72: +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5580 .loc 1 2110 1 is_stmt 1 view -0 + 5581 .cfi_startproc + 5582 @ args = 0, pretend = 0, frame = 0 + 5583 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccsFKqBV.s page 166 + + + 5584 @ link register save eliminated. +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5585 .loc 1 2112 3 view .LVU1548 +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 5586 .loc 1 2117 1 is_stmt 0 view .LVU1549 + 5587 @ sp needed + 5588 0000 7047 bx lr + 5589 .cfi_endproc + 5590 .LFE72: + 5592 .section .text.TIMEx_DMACommutationCplt,"ax",%progbits + 5593 .align 1 + 5594 .global TIMEx_DMACommutationCplt + 5595 .syntax unified + 5596 .code 16 + 5597 .thumb_func + 5599 TIMEx_DMACommutationCplt: + 5600 .LVL445: + 5601 .LFB77: +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5602 .loc 1 2216 1 is_stmt 1 view -0 + 5603 .cfi_startproc + 5604 @ args = 0, pretend = 0, frame = 0 + 5605 @ frame_needed = 0, uses_anonymous_args = 0 +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5606 .loc 1 2216 1 is_stmt 0 view .LVU1551 + 5607 0000 10B5 push {r4, lr} + 5608 .cfi_def_cfa_offset 8 + 5609 .cfi_offset 4, -8 + 5610 .cfi_offset 14, -4 +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5611 .loc 1 2217 3 is_stmt 1 view .LVU1552 +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5612 .loc 1 2217 22 is_stmt 0 view .LVU1553 + 5613 0002 406A ldr r0, [r0, #36] + 5614 .LVL446: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5615 .loc 1 2220 3 is_stmt 1 view .LVU1554 +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5616 .loc 1 2220 15 is_stmt 0 view .LVU1555 + 5617 0004 3D23 movs r3, #61 + 5618 0006 0122 movs r2, #1 + 5619 0008 C254 strb r2, [r0, r3] +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5620 .loc 1 2225 3 is_stmt 1 view .LVU1556 + 5621 000a FFF7FEFF bl HAL_TIMEx_CommutCallback + 5622 .LVL447: +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5623 .loc 1 2227 1 is_stmt 0 view .LVU1557 + 5624 @ sp needed + 5625 000e 10BD pop {r4, pc} + 5626 .cfi_endproc + 5627 .LFE77: + 5629 .section .text.HAL_TIMEx_CommutHalfCpltCallback,"ax",%progbits + 5630 .align 1 + 5631 .weak HAL_TIMEx_CommutHalfCpltCallback + 5632 .syntax unified + 5633 .code 16 + ARM GAS /tmp/ccsFKqBV.s page 167 + + + 5634 .thumb_func + 5636 HAL_TIMEx_CommutHalfCpltCallback: + 5637 .LVL448: + 5638 .LFB73: +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5639 .loc 1 2124 1 is_stmt 1 view -0 + 5640 .cfi_startproc + 5641 @ args = 0, pretend = 0, frame = 0 + 5642 @ frame_needed = 0, uses_anonymous_args = 0 + 5643 @ link register save eliminated. +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5644 .loc 1 2126 3 view .LVU1559 +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5645 .loc 1 2131 1 is_stmt 0 view .LVU1560 + 5646 @ sp needed + 5647 0000 7047 bx lr + 5648 .cfi_endproc + 5649 .LFE73: + 5651 .section .text.TIMEx_DMACommutationHalfCplt,"ax",%progbits + 5652 .align 1 + 5653 .global TIMEx_DMACommutationHalfCplt + 5654 .syntax unified + 5655 .code 16 + 5656 .thumb_func + 5658 TIMEx_DMACommutationHalfCplt: + 5659 .LVL449: + 5660 .LFB78: +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5661 .loc 1 2235 1 is_stmt 1 view -0 + 5662 .cfi_startproc + 5663 @ args = 0, pretend = 0, frame = 0 + 5664 @ frame_needed = 0, uses_anonymous_args = 0 +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5665 .loc 1 2235 1 is_stmt 0 view .LVU1562 + 5666 0000 10B5 push {r4, lr} + 5667 .cfi_def_cfa_offset 8 + 5668 .cfi_offset 4, -8 + 5669 .cfi_offset 14, -4 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5670 .loc 1 2236 3 is_stmt 1 view .LVU1563 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5671 .loc 1 2236 22 is_stmt 0 view .LVU1564 + 5672 0002 406A ldr r0, [r0, #36] + 5673 .LVL450: +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5674 .loc 1 2239 3 is_stmt 1 view .LVU1565 +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5675 .loc 1 2239 15 is_stmt 0 view .LVU1566 + 5676 0004 3D23 movs r3, #61 + 5677 0006 0122 movs r2, #1 + 5678 0008 C254 strb r2, [r0, r3] +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5679 .loc 1 2244 3 is_stmt 1 view .LVU1567 + 5680 000a FFF7FEFF bl HAL_TIMEx_CommutHalfCpltCallback + 5681 .LVL451: +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5682 .loc 1 2246 1 is_stmt 0 view .LVU1568 + ARM GAS /tmp/ccsFKqBV.s page 168 + + + 5683 @ sp needed + 5684 000e 10BD pop {r4, pc} + 5685 .cfi_endproc + 5686 .LFE78: + 5688 .section .text.HAL_TIMEx_BreakCallback,"ax",%progbits + 5689 .align 1 + 5690 .weak HAL_TIMEx_BreakCallback + 5691 .syntax unified + 5692 .code 16 + 5693 .thumb_func + 5695 HAL_TIMEx_BreakCallback: + 5696 .LVL452: + 5697 .LFB74: +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5698 .loc 1 2139 1 is_stmt 1 view -0 + 5699 .cfi_startproc + 5700 @ args = 0, pretend = 0, frame = 0 + 5701 @ frame_needed = 0, uses_anonymous_args = 0 + 5702 @ link register save eliminated. +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5703 .loc 1 2141 3 view .LVU1570 +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 5704 .loc 1 2146 1 is_stmt 0 view .LVU1571 + 5705 @ sp needed + 5706 0000 7047 bx lr + 5707 .cfi_endproc + 5708 .LFE74: + 5710 .section .text.HAL_TIMEx_HallSensor_GetState,"ax",%progbits + 5711 .align 1 + 5712 .global HAL_TIMEx_HallSensor_GetState + 5713 .syntax unified + 5714 .code 16 + 5715 .thumb_func + 5717 HAL_TIMEx_HallSensor_GetState: + 5718 .LVL453: + 5719 .LFB75: +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return htim->State; + 5720 .loc 1 2172 1 is_stmt 1 view -0 + 5721 .cfi_startproc + 5722 @ args = 0, pretend = 0, frame = 0 + 5723 @ frame_needed = 0, uses_anonymous_args = 0 + 5724 @ link register save eliminated. +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5725 .loc 1 2173 3 view .LVU1573 +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5726 .loc 1 2173 14 is_stmt 0 view .LVU1574 + 5727 0000 3D23 movs r3, #61 + 5728 0002 C05C ldrb r0, [r0, r3] + 5729 .LVL454: +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5730 .loc 1 2173 14 view .LVU1575 + 5731 0004 C0B2 uxtb r0, r0 +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5732 .loc 1 2174 1 view .LVU1576 + 5733 @ sp needed + 5734 0006 7047 bx lr + 5735 .cfi_endproc + ARM GAS /tmp/ccsFKqBV.s page 169 + + + 5736 .LFE75: + 5738 .section .text.HAL_TIMEx_GetChannelNState,"ax",%progbits + 5739 .align 1 + 5740 .global HAL_TIMEx_GetChannelNState + 5741 .syntax unified + 5742 .code 16 + 5743 .thumb_func + 5745 HAL_TIMEx_GetChannelNState: + 5746 .LVL455: + 5747 .LFB76: +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_state; + 5748 .loc 1 2187 1 is_stmt 1 view -0 + 5749 .cfi_startproc + 5750 @ args = 0, pretend = 0, frame = 0 + 5751 @ frame_needed = 0, uses_anonymous_args = 0 + 5752 @ link register save eliminated. +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5753 .loc 1 2188 3 view .LVU1578 +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5754 .loc 1 2191 3 view .LVU1579 +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5755 .loc 1 2193 3 view .LVU1580 +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5756 .loc 1 2193 19 is_stmt 0 view .LVU1581 + 5757 0000 0029 cmp r1, #0 + 5758 0002 03D1 bne .L390 +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5759 .loc 1 2193 19 discriminator 1 view .LVU1582 + 5760 0004 4223 movs r3, #66 + 5761 0006 C05C ldrb r0, [r0, r3] + 5762 .LVL456: +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5763 .loc 1 2193 19 discriminator 1 view .LVU1583 + 5764 0008 C0B2 uxtb r0, r0 + 5765 .L391: + 5766 .LVL457: +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5767 .loc 1 2195 3 is_stmt 1 view .LVU1584 +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 5768 .loc 1 2196 1 is_stmt 0 view .LVU1585 + 5769 @ sp needed + 5770 000a 7047 bx lr + 5771 .LVL458: + 5772 .L390: +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5773 .loc 1 2193 19 discriminator 2 view .LVU1586 + 5774 000c 0429 cmp r1, #4 + 5775 000e 05D0 beq .L394 +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5776 .loc 1 2193 19 discriminator 5 view .LVU1587 + 5777 0010 0829 cmp r1, #8 + 5778 0012 07D0 beq .L395 +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5779 .loc 1 2193 19 discriminator 8 view .LVU1588 + 5780 0014 4523 movs r3, #69 + 5781 0016 C05C ldrb r0, [r0, r3] + 5782 .LVL459: + ARM GAS /tmp/ccsFKqBV.s page 170 + + +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5783 .loc 1 2193 19 discriminator 8 view .LVU1589 + 5784 0018 C0B2 uxtb r0, r0 + 5785 001a F6E7 b .L391 + 5786 .LVL460: + 5787 .L394: +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5788 .loc 1 2193 19 discriminator 4 view .LVU1590 + 5789 001c 4323 movs r3, #67 + 5790 001e C05C ldrb r0, [r0, r3] + 5791 .LVL461: +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5792 .loc 1 2193 19 discriminator 4 view .LVU1591 + 5793 0020 C0B2 uxtb r0, r0 + 5794 0022 F2E7 b .L391 + 5795 .LVL462: + 5796 .L395: +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5797 .loc 1 2193 19 discriminator 7 view .LVU1592 + 5798 0024 4423 movs r3, #68 + 5799 0026 C05C ldrb r0, [r0, r3] + 5800 .LVL463: +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5801 .loc 1 2193 19 discriminator 7 view .LVU1593 + 5802 0028 C0B2 uxtb r0, r0 + 5803 002a EEE7 b .L391 + 5804 .cfi_endproc + 5805 .LFE76: + 5807 .text + 5808 .Letext0: + 5809 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 5810 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 5811 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 5812 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 5813 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 5814 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 5815 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h" + 5816 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h" + ARM GAS /tmp/ccsFKqBV.s page 171 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_tim_ex.c + /tmp/ccsFKqBV.s:19 .text.TIM_CCxNChannelCmd:00000000 $t + /tmp/ccsFKqBV.s:24 .text.TIM_CCxNChannelCmd:00000000 TIM_CCxNChannelCmd + /tmp/ccsFKqBV.s:70 .text.TIM_DMAErrorCCxN:00000000 $t + /tmp/ccsFKqBV.s:75 .text.TIM_DMAErrorCCxN:00000000 TIM_DMAErrorCCxN + /tmp/ccsFKqBV.s:160 .text.TIM_DMADelayPulseNCplt:00000000 $t + /tmp/ccsFKqBV.s:165 .text.TIM_DMADelayPulseNCplt:00000000 TIM_DMADelayPulseNCplt + /tmp/ccsFKqBV.s:269 .text.HAL_TIMEx_HallSensor_MspInit:00000000 $t + /tmp/ccsFKqBV.s:275 .text.HAL_TIMEx_HallSensor_MspInit:00000000 HAL_TIMEx_HallSensor_MspInit + /tmp/ccsFKqBV.s:291 .text.HAL_TIMEx_HallSensor_Init:00000000 $t + /tmp/ccsFKqBV.s:297 .text.HAL_TIMEx_HallSensor_Init:00000000 HAL_TIMEx_HallSensor_Init + /tmp/ccsFKqBV.s:524 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 $t + /tmp/ccsFKqBV.s:530 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 HAL_TIMEx_HallSensor_MspDeInit + /tmp/ccsFKqBV.s:546 .text.HAL_TIMEx_HallSensor_DeInit:00000000 $t + /tmp/ccsFKqBV.s:552 .text.HAL_TIMEx_HallSensor_DeInit:00000000 HAL_TIMEx_HallSensor_DeInit + /tmp/ccsFKqBV.s:632 .text.HAL_TIMEx_HallSensor_DeInit:0000004c $d + /tmp/ccsFKqBV.s:638 .text.HAL_TIMEx_HallSensor_Start:00000000 $t + /tmp/ccsFKqBV.s:644 .text.HAL_TIMEx_HallSensor_Start:00000000 HAL_TIMEx_HallSensor_Start + /tmp/ccsFKqBV.s:815 .text.HAL_TIMEx_HallSensor_Start:00000090 $d + /tmp/ccsFKqBV.s:821 .text.HAL_TIMEx_HallSensor_Stop:00000000 $t + /tmp/ccsFKqBV.s:827 .text.HAL_TIMEx_HallSensor_Stop:00000000 HAL_TIMEx_HallSensor_Stop + /tmp/ccsFKqBV.s:891 .text.HAL_TIMEx_HallSensor_Stop:00000040 $d + /tmp/ccsFKqBV.s:897 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 $t + /tmp/ccsFKqBV.s:903 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 HAL_TIMEx_HallSensor_Start_IT + /tmp/ccsFKqBV.s:1081 .text.HAL_TIMEx_HallSensor_Start_IT:00000098 $d + /tmp/ccsFKqBV.s:1087 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 $t + /tmp/ccsFKqBV.s:1093 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 HAL_TIMEx_HallSensor_Stop_IT + /tmp/ccsFKqBV.s:1163 .text.HAL_TIMEx_HallSensor_Stop_IT:00000048 $d + /tmp/ccsFKqBV.s:1169 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 $t + /tmp/ccsFKqBV.s:1175 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 HAL_TIMEx_HallSensor_Start_DMA + /tmp/ccsFKqBV.s:1374 .text.HAL_TIMEx_HallSensor_Start_DMA:000000b8 $d + /tmp/ccsFKqBV.s:1383 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 $t + /tmp/ccsFKqBV.s:1389 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 HAL_TIMEx_HallSensor_Stop_DMA + /tmp/ccsFKqBV.s:1458 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000048 $d + /tmp/ccsFKqBV.s:1465 .text.HAL_TIMEx_OCN_Start:00000000 $t + /tmp/ccsFKqBV.s:1471 .text.HAL_TIMEx_OCN_Start:00000000 HAL_TIMEx_OCN_Start + /tmp/ccsFKqBV.s:1653 .text.HAL_TIMEx_OCN_Start:000000c8 $d + /tmp/ccsFKqBV.s:1659 .text.HAL_TIMEx_OCN_Stop:00000000 $t + /tmp/ccsFKqBV.s:1665 .text.HAL_TIMEx_OCN_Stop:00000000 HAL_TIMEx_OCN_Stop + /tmp/ccsFKqBV.s:1771 .text.HAL_TIMEx_OCN_Stop:00000070 $d + /tmp/ccsFKqBV.s:1778 .text.HAL_TIMEx_OCN_Start_IT:00000000 $t + /tmp/ccsFKqBV.s:1784 .text.HAL_TIMEx_OCN_Start_IT:00000000 HAL_TIMEx_OCN_Start_IT + /tmp/ccsFKqBV.s:2018 .text.HAL_TIMEx_OCN_Start_IT:00000100 $d + /tmp/ccsFKqBV.s:2024 .text.HAL_TIMEx_OCN_Stop_IT:00000000 $t + /tmp/ccsFKqBV.s:2030 .text.HAL_TIMEx_OCN_Stop_IT:00000000 HAL_TIMEx_OCN_Stop_IT + /tmp/ccsFKqBV.s:2215 .text.HAL_TIMEx_OCN_Stop_IT:000000bc $d + /tmp/ccsFKqBV.s:2222 .text.HAL_TIMEx_OCN_Start_DMA:00000000 $t + /tmp/ccsFKqBV.s:2228 .text.HAL_TIMEx_OCN_Start_DMA:00000000 HAL_TIMEx_OCN_Start_DMA + /tmp/ccsFKqBV.s:2655 .text.HAL_TIMEx_OCN_Start_DMA:000001d4 $d + /tmp/ccsFKqBV.s:2664 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 $t + /tmp/ccsFKqBV.s:2670 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 HAL_TIMEx_OCN_Stop_DMA + /tmp/ccsFKqBV.s:2852 .text.HAL_TIMEx_OCN_Stop_DMA:000000bc $d + /tmp/ccsFKqBV.s:2862 .text.HAL_TIMEx_PWMN_Start:00000000 $t + /tmp/ccsFKqBV.s:2868 .text.HAL_TIMEx_PWMN_Start:00000000 HAL_TIMEx_PWMN_Start + /tmp/ccsFKqBV.s:3050 .text.HAL_TIMEx_PWMN_Start:000000c8 $d + /tmp/ccsFKqBV.s:3056 .text.HAL_TIMEx_PWMN_Stop:00000000 $t + ARM GAS /tmp/ccsFKqBV.s page 172 + + + /tmp/ccsFKqBV.s:3062 .text.HAL_TIMEx_PWMN_Stop:00000000 HAL_TIMEx_PWMN_Stop + /tmp/ccsFKqBV.s:3168 .text.HAL_TIMEx_PWMN_Stop:00000070 $d + /tmp/ccsFKqBV.s:3175 .text.HAL_TIMEx_PWMN_Start_IT:00000000 $t + /tmp/ccsFKqBV.s:3181 .text.HAL_TIMEx_PWMN_Start_IT:00000000 HAL_TIMEx_PWMN_Start_IT + /tmp/ccsFKqBV.s:3415 .text.HAL_TIMEx_PWMN_Start_IT:00000100 $d + /tmp/ccsFKqBV.s:3421 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 $t + /tmp/ccsFKqBV.s:3427 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 HAL_TIMEx_PWMN_Stop_IT + /tmp/ccsFKqBV.s:3612 .text.HAL_TIMEx_PWMN_Stop_IT:000000bc $d + /tmp/ccsFKqBV.s:3619 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 $t + /tmp/ccsFKqBV.s:3625 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 HAL_TIMEx_PWMN_Start_DMA + /tmp/ccsFKqBV.s:4052 .text.HAL_TIMEx_PWMN_Start_DMA:000001d4 $d + /tmp/ccsFKqBV.s:4061 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 $t + /tmp/ccsFKqBV.s:4067 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 HAL_TIMEx_PWMN_Stop_DMA + /tmp/ccsFKqBV.s:4249 .text.HAL_TIMEx_PWMN_Stop_DMA:000000bc $d + /tmp/ccsFKqBV.s:4259 .text.HAL_TIMEx_OnePulseN_Start:00000000 $t + /tmp/ccsFKqBV.s:4265 .text.HAL_TIMEx_OnePulseN_Start:00000000 HAL_TIMEx_OnePulseN_Start + /tmp/ccsFKqBV.s:4414 .text.HAL_TIMEx_OnePulseN_Stop:00000000 $t + /tmp/ccsFKqBV.s:4420 .text.HAL_TIMEx_OnePulseN_Stop:00000000 HAL_TIMEx_OnePulseN_Stop + /tmp/ccsFKqBV.s:4524 .text.HAL_TIMEx_OnePulseN_Stop:0000006c $d + /tmp/ccsFKqBV.s:4531 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 $t + /tmp/ccsFKqBV.s:4537 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 HAL_TIMEx_OnePulseN_Start_IT + /tmp/ccsFKqBV.s:4699 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 $t + /tmp/ccsFKqBV.s:4705 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 HAL_TIMEx_OnePulseN_Stop_IT + /tmp/ccsFKqBV.s:4821 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000080 $d + /tmp/ccsFKqBV.s:4828 .text.HAL_TIMEx_ConfigCommutEvent:00000000 $t + /tmp/ccsFKqBV.s:4834 .text.HAL_TIMEx_ConfigCommutEvent:00000000 HAL_TIMEx_ConfigCommutEvent + /tmp/ccsFKqBV.s:4957 .text.HAL_TIMEx_ConfigCommutEvent:00000070 $d + /tmp/ccsFKqBV.s:4962 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 $t + /tmp/ccsFKqBV.s:4968 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 HAL_TIMEx_ConfigCommutEvent_IT + /tmp/ccsFKqBV.s:5091 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000070 $d + /tmp/ccsFKqBV.s:5096 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 $t + /tmp/ccsFKqBV.s:5102 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 HAL_TIMEx_ConfigCommutEvent_DMA + /tmp/ccsFKqBV.s:5244 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000084 $d + /tmp/ccsFKqBV.s:5599 .text.TIMEx_DMACommutationCplt:00000000 TIMEx_DMACommutationCplt + /tmp/ccsFKqBV.s:5658 .text.TIMEx_DMACommutationHalfCplt:00000000 TIMEx_DMACommutationHalfCplt + /tmp/ccsFKqBV.s:5251 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 $t + /tmp/ccsFKqBV.s:5257 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 HAL_TIMEx_MasterConfigSynchronization + /tmp/ccsFKqBV.s:5379 .text.HAL_TIMEx_MasterConfigSynchronization:0000005c $d + /tmp/ccsFKqBV.s:5385 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 $t + /tmp/ccsFKqBV.s:5391 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 HAL_TIMEx_ConfigBreakDeadTime + /tmp/ccsFKqBV.s:5508 .text.HAL_TIMEx_ConfigBreakDeadTime:00000054 $d + /tmp/ccsFKqBV.s:5518 .text.HAL_TIMEx_RemapConfig:00000000 $t + /tmp/ccsFKqBV.s:5524 .text.HAL_TIMEx_RemapConfig:00000000 HAL_TIMEx_RemapConfig + /tmp/ccsFKqBV.s:5571 .text.HAL_TIMEx_CommutCallback:00000000 $t + /tmp/ccsFKqBV.s:5577 .text.HAL_TIMEx_CommutCallback:00000000 HAL_TIMEx_CommutCallback + /tmp/ccsFKqBV.s:5593 .text.TIMEx_DMACommutationCplt:00000000 $t + /tmp/ccsFKqBV.s:5630 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 $t + /tmp/ccsFKqBV.s:5636 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 HAL_TIMEx_CommutHalfCpltCallback + /tmp/ccsFKqBV.s:5652 .text.TIMEx_DMACommutationHalfCplt:00000000 $t + /tmp/ccsFKqBV.s:5689 .text.HAL_TIMEx_BreakCallback:00000000 $t + /tmp/ccsFKqBV.s:5695 .text.HAL_TIMEx_BreakCallback:00000000 HAL_TIMEx_BreakCallback + /tmp/ccsFKqBV.s:5711 .text.HAL_TIMEx_HallSensor_GetState:00000000 $t + /tmp/ccsFKqBV.s:5717 .text.HAL_TIMEx_HallSensor_GetState:00000000 HAL_TIMEx_HallSensor_GetState + /tmp/ccsFKqBV.s:5739 .text.HAL_TIMEx_GetChannelNState:00000000 $t + /tmp/ccsFKqBV.s:5745 .text.HAL_TIMEx_GetChannelNState:00000000 HAL_TIMEx_GetChannelNState + +UNDEFINED SYMBOLS + ARM GAS /tmp/ccsFKqBV.s page 173 + + +HAL_TIM_ErrorCallback +HAL_TIM_PWM_PulseFinishedCallback +TIM_Base_SetConfig +TIM_TI1_SetConfig +TIM_OC2_SetConfig +TIM_CCxChannelCmd +HAL_DMA_Start_IT +TIM_DMACaptureCplt +TIM_DMACaptureHalfCplt +TIM_DMAError +HAL_DMA_Abort_IT +TIM_DMADelayPulseHalfCplt diff --git a/Software/build/debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o 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