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dma configuration activated , dma1 and dma2

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This commit is contained in:
n.jayaprakash
2024-05-16 14:35:47 +02:00
parent d9d7da87c0
commit 624b28052a
9 changed files with 5648 additions and 5030 deletions
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2
Core/Inc/stm32f3xx_it.h
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@ -55,9 +55,11 @@ void SVC_Handler(void);
void DebugMon_Handler(void); void DebugMon_Handler(void);
void PendSV_Handler(void); void PendSV_Handler(void);
void SysTick_Handler(void); void SysTick_Handler(void);
void DMA1_Channel1_IRQHandler(void);
void USB_LP_CAN_RX0_IRQHandler(void); void USB_LP_CAN_RX0_IRQHandler(void);
void CAN_RX1_IRQHandler(void); void CAN_RX1_IRQHandler(void);
void CAN_SCE_IRQHandler(void); void CAN_SCE_IRQHandler(void);
void DMA2_Channel1_IRQHandler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */
/* USER CODE END EFP */ /* USER CODE END EFP */

28
Core/Src/main.c
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@ -44,6 +44,8 @@
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc1;
ADC_HandleTypeDef hadc2; ADC_HandleTypeDef hadc2;
DMA_HandleTypeDef hdma_adc1;
DMA_HandleTypeDef hdma_adc2;
CAN_HandleTypeDef hcan; CAN_HandleTypeDef hcan;
@ -62,6 +64,7 @@ UART_HandleTypeDef huart1;
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void); void SystemClock_Config(void);
static void MX_GPIO_Init(void); static void MX_GPIO_Init(void);
static void MX_DMA_Init(void);
static void MX_ADC1_Init(void); static void MX_ADC1_Init(void);
static void MX_ADC2_Init(void); static void MX_ADC2_Init(void);
static void MX_CAN_Init(void); static void MX_CAN_Init(void);
@ -111,6 +114,7 @@ int main(void)
/* Initialize all configured peripherals */ /* Initialize all configured peripherals */
MX_GPIO_Init(); MX_GPIO_Init();
MX_DMA_Init();
MX_ADC1_Init(); MX_ADC1_Init();
MX_ADC2_Init(); MX_ADC2_Init();
MX_CAN_Init(); MX_CAN_Init();
@ -241,7 +245,7 @@ static void MX_ADC1_Init(void)
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc1.Init.NbrOfConversion = 1; hadc1.Init.NbrOfConversion = 1;
hadc1.Init.DMAContinuousRequests = DISABLE; hadc1.Init.DMAContinuousRequests = ENABLE;
hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc1.Init.LowPowerAutoWait = DISABLE; hadc1.Init.LowPowerAutoWait = DISABLE;
hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
@ -306,7 +310,7 @@ static void MX_ADC2_Init(void)
hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc2.Init.NbrOfConversion = 1; hadc2.Init.NbrOfConversion = 1;
hadc2.Init.DMAContinuousRequests = DISABLE; hadc2.Init.DMAContinuousRequests = ENABLE;
hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV; hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc2.Init.LowPowerAutoWait = DISABLE; hadc2.Init.LowPowerAutoWait = DISABLE;
hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
@ -593,6 +597,26 @@ static void MX_USART1_UART_Init(void)
} }
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
__HAL_RCC_DMA2_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
/* DMA2_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn);
}
/** /**
* @brief GPIO Initialization Function * @brief GPIO Initialization Function
* @param None * @param None

41
Core/Src/stm32f3xx_hal_msp.c
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@ -24,6 +24,9 @@
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
/* USER CODE END Includes */ /* USER CODE END Includes */
extern DMA_HandleTypeDef hdma_adc1;
extern DMA_HandleTypeDef hdma_adc2;
/* Private typedef -----------------------------------------------------------*/ /* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */ /* USER CODE BEGIN TD */
@ -123,6 +126,23 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc1.Init.Mode = DMA_CIRCULAR;
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
/* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */
@ -157,6 +177,23 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* ADC2 DMA Init */
/* ADC2 Init */
hdma_adc2.Instance = DMA2_Channel1;
hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc2.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc2.Init.Mode = DMA_CIRCULAR;
hdma_adc2.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_adc2) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc2);
/* USER CODE BEGIN ADC2_MspInit 1 */ /* USER CODE BEGIN ADC2_MspInit 1 */
/* USER CODE END ADC2_MspInit 1 */ /* USER CODE END ADC2_MspInit 1 */
@ -197,6 +234,8 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
HAL_GPIO_DeInit(GPIOA, DSEL_8_Pin|isense5_Pin|isense3_Pin|isense7_Pin); HAL_GPIO_DeInit(GPIOA, DSEL_8_Pin|isense5_Pin|isense3_Pin|isense7_Pin);
/* ADC1 DMA DeInit */
HAL_DMA_DeInit(hadc->DMA_Handle);
/* USER CODE BEGIN ADC1_MspDeInit 1 */ /* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */ /* USER CODE END ADC1_MspDeInit 1 */
@ -223,6 +262,8 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4); HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4);
/* ADC2 DMA DeInit */
HAL_DMA_DeInit(hadc->DMA_Handle);
/* USER CODE BEGIN ADC2_MspDeInit 1 */ /* USER CODE BEGIN ADC2_MspDeInit 1 */
/* USER CODE END ADC2_MspDeInit 1 */ /* USER CODE END ADC2_MspDeInit 1 */

30
Core/Src/stm32f3xx_it.c
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@ -55,6 +55,8 @@
/* USER CODE END 0 */ /* USER CODE END 0 */
/* External variables --------------------------------------------------------*/ /* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_adc1;
extern DMA_HandleTypeDef hdma_adc2;
extern CAN_HandleTypeDef hcan; extern CAN_HandleTypeDef hcan;
/* USER CODE BEGIN EV */ /* USER CODE BEGIN EV */
@ -199,6 +201,20 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32f3xx.s). */ /* please refer to the startup file (startup_stm32f3xx.s). */
/******************************************************************************/ /******************************************************************************/
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
/** /**
* @brief This function handles USB low priority or CAN_RX0 interrupts. * @brief This function handles USB low priority or CAN_RX0 interrupts.
*/ */
@ -241,6 +257,20 @@ void CAN_SCE_IRQHandler(void)
/* USER CODE END CAN_SCE_IRQn 1 */ /* USER CODE END CAN_SCE_IRQn 1 */
} }
/**
* @brief This function handles DMA2 channel1 global interrupt.
*/
void DMA2_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Channel1_IRQn 0 */
/* USER CODE END DMA2_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc2);
/* USER CODE BEGIN DMA2_Channel1_IRQn 1 */
/* USER CODE END DMA2_Channel1_IRQn 1 */
}
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */

52
PDU FT24 MCU.ioc
View File

@ -1,6 +1,7 @@
#MicroXplorer Configuration settings - do not modify #MicroXplorer Configuration settings - do not modify
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_1 ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_1
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,Offset-0\#ChannelRegularConversion,NbrOfConversionFlag,master ADC1.DMAContinuousRequests=ENABLE
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,Offset-0\#ChannelRegularConversion,NbrOfConversionFlag,master,DMAContinuousRequests
ADC1.NbrOfConversionFlag=1 ADC1.NbrOfConversionFlag=1
ADC1.Offset-0\#ChannelRegularConversion=0 ADC1.Offset-0\#ChannelRegularConversion=0
ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
@ -8,7 +9,10 @@ ADC1.Rank-0\#ChannelRegularConversion=1
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
ADC1.master=1 ADC1.master=1
ADC2.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_1 ADC2.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_1
ADC2.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,Offset-0\#ChannelRegularConversion,NbrOfConversionFlag ADC2.ClockPrescaler=ADC_CLOCK_ASYNC_DIV1
ADC2.DMAContinuousRequests=ENABLE
ADC2.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,Offset-0\#ChannelRegularConversion,NbrOfConversionFlag,ClockPrescaler,LowPowerAutoWait,DMAContinuousRequests
ADC2.LowPowerAutoWait=DISABLE
ADC2.NbrOfConversionFlag=1 ADC2.NbrOfConversionFlag=1
ADC2.Offset-0\#ChannelRegularConversion=0 ADC2.Offset-0\#ChannelRegularConversion=0
ADC2.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE ADC2.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
@ -26,6 +30,27 @@ CAN.CalculateTimeQuantum=125.0
CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2,NART,ABOM CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2,NART,ABOM
CAN.NART=DISABLE CAN.NART=DISABLE
CAN.Prescaler=2 CAN.Prescaler=2
Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.ADC1.0.Instance=DMA1_Channel1
Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
Dma.ADC1.0.Mode=DMA_CIRCULAR
Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
Dma.ADC1.0.Priority=DMA_PRIORITY_LOW
Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.ADC2.1.Direction=DMA_PERIPH_TO_MEMORY
Dma.ADC2.1.Instance=DMA2_Channel1
Dma.ADC2.1.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.ADC2.1.MemInc=DMA_MINC_ENABLE
Dma.ADC2.1.Mode=DMA_CIRCULAR
Dma.ADC2.1.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.ADC2.1.PeriphInc=DMA_PINC_DISABLE
Dma.ADC2.1.Priority=DMA_PRIORITY_LOW
Dma.ADC2.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.Request0=ADC1
Dma.Request1=ADC2
Dma.RequestsNb=2
File.Version=6 File.Version=6
GPIO.groupedBy=Group By Peripherals GPIO.groupedBy=Group By Peripherals
I2C1.IPParameters=Timing I2C1.IPParameters=Timing
@ -35,16 +60,17 @@ Mcu.CPN=STM32F302RBT6
Mcu.Family=STM32F3 Mcu.Family=STM32F3
Mcu.IP0=ADC1 Mcu.IP0=ADC1
Mcu.IP1=ADC2 Mcu.IP1=ADC2
Mcu.IP10=USART1 Mcu.IP10=TIM6
Mcu.IP11=USART1
Mcu.IP2=CAN Mcu.IP2=CAN
Mcu.IP3=I2C1 Mcu.IP3=DMA
Mcu.IP4=NVIC Mcu.IP4=I2C1
Mcu.IP5=RCC Mcu.IP5=NVIC
Mcu.IP6=SYS Mcu.IP6=RCC
Mcu.IP7=TIM2 Mcu.IP7=SYS
Mcu.IP8=TIM3 Mcu.IP8=TIM2
Mcu.IP9=TIM6 Mcu.IP9=TIM3
Mcu.IPNb=11 Mcu.IPNb=12
Mcu.Name=STM32F302R(B-C)Tx Mcu.Name=STM32F302R(B-C)Tx
Mcu.Package=LQFP64 Mcu.Package=LQFP64
Mcu.Pin0=PF0-OSC_IN Mcu.Pin0=PF0-OSC_IN
@ -94,6 +120,8 @@ MxDb.Version=DB.6.0.92
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.CAN_RX1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.CAN_RX1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.CAN_SCE_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.CAN_SCE_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA2_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@ -274,7 +302,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath= ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_ADC2_Init-ADC2-false-HAL-true,5-MX_CAN_Init-CAN-false-HAL-true,6-MX_TIM2_Init-TIM2-false-HAL-true,7-MX_TIM3_Init-TIM3-false-HAL-true,8-MX_I2C1_Init-I2C1-false-HAL-true,9-MX_USART1_UART_Init-USART1-false-HAL-true ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_ADC2_Init-ADC2-false-HAL-true,6-MX_CAN_Init-CAN-false-HAL-true,7-MX_TIM2_Init-TIM2-false-HAL-true,8-MX_TIM3_Init-TIM3-false-HAL-true,9-MX_I2C1_Init-I2C1-false-HAL-true,10-MX_USART1_UART_Init-USART1-false-HAL-true,11-MX_TIM6_Init-TIM6-false-HAL-true
RCC.ADC12outputFreq_Value=64000000 RCC.ADC12outputFreq_Value=64000000
RCC.AHBFreq_Value=16000000 RCC.AHBFreq_Value=16000000
RCC.APB1Freq_Value=16000000 RCC.APB1Freq_Value=16000000

BIN
build/PDU_FT24_Code.bin
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Binary file not shown.

5088
build/main.lst
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File diff suppressed because it is too large Load Diff

4744
build/stm32f3xx_hal_msp.lst
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File diff suppressed because it is too large Load Diff

693
build/stm32f3xx_it.lst
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@ -1,4 +1,4 @@
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1 ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 1
1 .cpu cortex-m4 1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
28:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN TD */ 28:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN TD */
29:Core/Src/stm32f3xx_it.c **** 29:Core/Src/stm32f3xx_it.c ****
30:Core/Src/stm32f3xx_it.c **** /* USER CODE END TD */ 30:Core/Src/stm32f3xx_it.c **** /* USER CODE END TD */
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 2 ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 2
31:Core/Src/stm32f3xx_it.c **** 31:Core/Src/stm32f3xx_it.c ****
@ -88,20 +88,22 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
55:Core/Src/stm32f3xx_it.c **** /* USER CODE END 0 */ 55:Core/Src/stm32f3xx_it.c **** /* USER CODE END 0 */
56:Core/Src/stm32f3xx_it.c **** 56:Core/Src/stm32f3xx_it.c ****
57:Core/Src/stm32f3xx_it.c **** /* External variables --------------------------------------------------------*/ 57:Core/Src/stm32f3xx_it.c **** /* External variables --------------------------------------------------------*/
58:Core/Src/stm32f3xx_it.c **** extern CAN_HandleTypeDef hcan; 58:Core/Src/stm32f3xx_it.c **** extern DMA_HandleTypeDef hdma_adc1;
59:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN EV */ 59:Core/Src/stm32f3xx_it.c **** extern DMA_HandleTypeDef hdma_adc2;
60:Core/Src/stm32f3xx_it.c **** 60:Core/Src/stm32f3xx_it.c **** extern CAN_HandleTypeDef hcan;
61:Core/Src/stm32f3xx_it.c **** /* USER CODE END EV */ 61:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN EV */
62:Core/Src/stm32f3xx_it.c **** 62:Core/Src/stm32f3xx_it.c ****
63:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ 63:Core/Src/stm32f3xx_it.c **** /* USER CODE END EV */
64:Core/Src/stm32f3xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */ 64:Core/Src/stm32f3xx_it.c ****
65:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ 65:Core/Src/stm32f3xx_it.c **** /******************************************************************************/
66:Core/Src/stm32f3xx_it.c **** /** 66:Core/Src/stm32f3xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
67:Core/Src/stm32f3xx_it.c **** * @brief This function handles Non maskable interrupt. 67:Core/Src/stm32f3xx_it.c **** /******************************************************************************/
68:Core/Src/stm32f3xx_it.c **** */ 68:Core/Src/stm32f3xx_it.c **** /**
69:Core/Src/stm32f3xx_it.c **** void NMI_Handler(void) 69:Core/Src/stm32f3xx_it.c **** * @brief This function handles Non maskable interrupt.
70:Core/Src/stm32f3xx_it.c **** { 70:Core/Src/stm32f3xx_it.c **** */
29 .loc 1 70 1 view -0 71:Core/Src/stm32f3xx_it.c **** void NMI_Handler(void)
72:Core/Src/stm32f3xx_it.c **** {
29 .loc 1 72 1 view -0
30 .cfi_startproc 30 .cfi_startproc
31 @ Volatile: function does not return. 31 @ Volatile: function does not return.
32 @ args = 0, pretend = 0, frame = 0 32 @ args = 0, pretend = 0, frame = 0
@ -110,25 +112,25 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
35 .cfi_def_cfa_offset 8 35 .cfi_def_cfa_offset 8
36 .cfi_offset 3, -8 36 .cfi_offset 3, -8
37 .cfi_offset 14, -4 37 .cfi_offset 14, -4
71:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 73:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
72:Core/Src/stm32f3xx_it.c **** 74:Core/Src/stm32f3xx_it.c ****
73:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */ 75:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
74:Core/Src/stm32f3xx_it.c **** HAL_RCC_NMI_IRQHandler(); 76:Core/Src/stm32f3xx_it.c **** HAL_RCC_NMI_IRQHandler();
38 .loc 1 74 3 view .LVU1 38 .loc 1 76 3 view .LVU1
39 0002 FFF7FEFF bl HAL_RCC_NMI_IRQHandler 39 0002 FFF7FEFF bl HAL_RCC_NMI_IRQHandler
ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 3
40 .LVL0: 40 .LVL0:
41 .L2: 41 .L2:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 3 77:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
78:Core/Src/stm32f3xx_it.c **** while (1)
42 .loc 1 78 3 discriminator 1 view .LVU2
75:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 79:Core/Src/stm32f3xx_it.c **** {
76:Core/Src/stm32f3xx_it.c **** while (1) 80:Core/Src/stm32f3xx_it.c **** }
42 .loc 1 76 3 discriminator 1 view .LVU2 43 .loc 1 80 3 discriminator 1 view .LVU3
77:Core/Src/stm32f3xx_it.c **** { 78:Core/Src/stm32f3xx_it.c **** {
78:Core/Src/stm32f3xx_it.c **** } 44 .loc 1 78 9 discriminator 1 view .LVU4
43 .loc 1 78 3 discriminator 1 view .LVU3
76:Core/Src/stm32f3xx_it.c **** {
44 .loc 1 76 9 discriminator 1 view .LVU4
45 0006 FEE7 b .L2 45 0006 FEE7 b .L2
46 .cfi_endproc 46 .cfi_endproc
47 .LFE130: 47 .LFE130:
@ -140,33 +142,33 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
54 .thumb_func 54 .thumb_func
56 HardFault_Handler: 56 HardFault_Handler:
57 .LFB131: 57 .LFB131:
79:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */ 81:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
80:Core/Src/stm32f3xx_it.c **** } 82:Core/Src/stm32f3xx_it.c **** }
81:Core/Src/stm32f3xx_it.c **** 83:Core/Src/stm32f3xx_it.c ****
82:Core/Src/stm32f3xx_it.c **** /** 84:Core/Src/stm32f3xx_it.c **** /**
83:Core/Src/stm32f3xx_it.c **** * @brief This function handles Hard fault interrupt. 85:Core/Src/stm32f3xx_it.c **** * @brief This function handles Hard fault interrupt.
84:Core/Src/stm32f3xx_it.c **** */ 86:Core/Src/stm32f3xx_it.c **** */
85:Core/Src/stm32f3xx_it.c **** void HardFault_Handler(void) 87:Core/Src/stm32f3xx_it.c **** void HardFault_Handler(void)
86:Core/Src/stm32f3xx_it.c **** { 88:Core/Src/stm32f3xx_it.c **** {
58 .loc 1 86 1 view -0 58 .loc 1 88 1 view -0
59 .cfi_startproc 59 .cfi_startproc
60 @ Volatile: function does not return. 60 @ Volatile: function does not return.
61 @ args = 0, pretend = 0, frame = 0 61 @ args = 0, pretend = 0, frame = 0
62 @ frame_needed = 0, uses_anonymous_args = 0 62 @ frame_needed = 0, uses_anonymous_args = 0
63 @ link register save eliminated. 63 @ link register save eliminated.
64 .L5: 64 .L5:
87:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */ 89:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
88:Core/Src/stm32f3xx_it.c **** 90:Core/Src/stm32f3xx_it.c ****
89:Core/Src/stm32f3xx_it.c **** /* USER CODE END HardFault_IRQn 0 */ 91:Core/Src/stm32f3xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
90:Core/Src/stm32f3xx_it.c **** while (1) 92:Core/Src/stm32f3xx_it.c **** while (1)
65 .loc 1 90 3 discriminator 1 view .LVU6 65 .loc 1 92 3 discriminator 1 view .LVU6
91:Core/Src/stm32f3xx_it.c **** { 93:Core/Src/stm32f3xx_it.c **** {
92:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 94:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
93:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */ 95:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
94:Core/Src/stm32f3xx_it.c **** } 96:Core/Src/stm32f3xx_it.c **** }
66 .loc 1 94 3 discriminator 1 view .LVU7 66 .loc 1 96 3 discriminator 1 view .LVU7
90:Core/Src/stm32f3xx_it.c **** { 92:Core/Src/stm32f3xx_it.c **** {
67 .loc 1 90 9 discriminator 1 view .LVU8 67 .loc 1 92 9 discriminator 1 view .LVU8
68 0000 FEE7 b .L5 68 0000 FEE7 b .L5
69 .cfi_endproc 69 .cfi_endproc
70 .LFE131: 70 .LFE131:
@ -176,37 +178,37 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
75 .syntax unified 75 .syntax unified
76 .thumb 76 .thumb
77 .thumb_func 77 .thumb_func
ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 4
79 MemManage_Handler: 79 MemManage_Handler:
80 .LFB132: 80 .LFB132:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 4 97:Core/Src/stm32f3xx_it.c **** }
98:Core/Src/stm32f3xx_it.c ****
99:Core/Src/stm32f3xx_it.c **** /**
95:Core/Src/stm32f3xx_it.c **** } 100:Core/Src/stm32f3xx_it.c **** * @brief This function handles Memory management fault.
96:Core/Src/stm32f3xx_it.c **** 101:Core/Src/stm32f3xx_it.c **** */
97:Core/Src/stm32f3xx_it.c **** /** 102:Core/Src/stm32f3xx_it.c **** void MemManage_Handler(void)
98:Core/Src/stm32f3xx_it.c **** * @brief This function handles Memory management fault. 103:Core/Src/stm32f3xx_it.c **** {
99:Core/Src/stm32f3xx_it.c **** */ 81 .loc 1 103 1 view -0
100:Core/Src/stm32f3xx_it.c **** void MemManage_Handler(void)
101:Core/Src/stm32f3xx_it.c **** {
81 .loc 1 101 1 view -0
82 .cfi_startproc 82 .cfi_startproc
83 @ Volatile: function does not return. 83 @ Volatile: function does not return.
84 @ args = 0, pretend = 0, frame = 0 84 @ args = 0, pretend = 0, frame = 0
85 @ frame_needed = 0, uses_anonymous_args = 0 85 @ frame_needed = 0, uses_anonymous_args = 0
86 @ link register save eliminated. 86 @ link register save eliminated.
87 .L7: 87 .L7:
102:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 104:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
103:Core/Src/stm32f3xx_it.c **** 105:Core/Src/stm32f3xx_it.c ****
104:Core/Src/stm32f3xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */ 106:Core/Src/stm32f3xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
105:Core/Src/stm32f3xx_it.c **** while (1) 107:Core/Src/stm32f3xx_it.c **** while (1)
88 .loc 1 105 3 discriminator 1 view .LVU10 88 .loc 1 107 3 discriminator 1 view .LVU10
106:Core/Src/stm32f3xx_it.c **** { 108:Core/Src/stm32f3xx_it.c **** {
107:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 109:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
108:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */ 110:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
109:Core/Src/stm32f3xx_it.c **** } 111:Core/Src/stm32f3xx_it.c **** }
89 .loc 1 109 3 discriminator 1 view .LVU11 89 .loc 1 111 3 discriminator 1 view .LVU11
105:Core/Src/stm32f3xx_it.c **** { 107:Core/Src/stm32f3xx_it.c **** {
90 .loc 1 105 9 discriminator 1 view .LVU12 90 .loc 1 107 9 discriminator 1 view .LVU12
91 0000 FEE7 b .L7 91 0000 FEE7 b .L7
92 .cfi_endproc 92 .cfi_endproc
93 .LFE132: 93 .LFE132:
@ -218,35 +220,35 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
100 .thumb_func 100 .thumb_func
102 BusFault_Handler: 102 BusFault_Handler:
103 .LFB133: 103 .LFB133:
110:Core/Src/stm32f3xx_it.c **** } 112:Core/Src/stm32f3xx_it.c **** }
111:Core/Src/stm32f3xx_it.c **** 113:Core/Src/stm32f3xx_it.c ****
112:Core/Src/stm32f3xx_it.c **** /** 114:Core/Src/stm32f3xx_it.c **** /**
113:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault. 115:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
114:Core/Src/stm32f3xx_it.c **** */ 116:Core/Src/stm32f3xx_it.c **** */
115:Core/Src/stm32f3xx_it.c **** void BusFault_Handler(void) 117:Core/Src/stm32f3xx_it.c **** void BusFault_Handler(void)
116:Core/Src/stm32f3xx_it.c **** { 118:Core/Src/stm32f3xx_it.c **** {
104 .loc 1 116 1 view -0 104 .loc 1 118 1 view -0
105 .cfi_startproc 105 .cfi_startproc
106 @ Volatile: function does not return. 106 @ Volatile: function does not return.
107 @ args = 0, pretend = 0, frame = 0 107 @ args = 0, pretend = 0, frame = 0
108 @ frame_needed = 0, uses_anonymous_args = 0 108 @ frame_needed = 0, uses_anonymous_args = 0
109 @ link register save eliminated. 109 @ link register save eliminated.
110 .L9: 110 .L9:
117:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */ 119:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
118:Core/Src/stm32f3xx_it.c **** 120:Core/Src/stm32f3xx_it.c ****
119:Core/Src/stm32f3xx_it.c **** /* USER CODE END BusFault_IRQn 0 */ 121:Core/Src/stm32f3xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
120:Core/Src/stm32f3xx_it.c **** while (1) 122:Core/Src/stm32f3xx_it.c **** while (1)
111 .loc 1 120 3 discriminator 1 view .LVU14 ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 5
121:Core/Src/stm32f3xx_it.c **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 5
122:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 111 .loc 1 122 3 discriminator 1 view .LVU14
123:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */ 123:Core/Src/stm32f3xx_it.c **** {
124:Core/Src/stm32f3xx_it.c **** } 124:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
112 .loc 1 124 3 discriminator 1 view .LVU15 125:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
120:Core/Src/stm32f3xx_it.c **** { 126:Core/Src/stm32f3xx_it.c **** }
113 .loc 1 120 9 discriminator 1 view .LVU16 112 .loc 1 126 3 discriminator 1 view .LVU15
122:Core/Src/stm32f3xx_it.c **** {
113 .loc 1 122 9 discriminator 1 view .LVU16
114 0000 FEE7 b .L9 114 0000 FEE7 b .L9
115 .cfi_endproc 115 .cfi_endproc
116 .LFE133: 116 .LFE133:
@ -258,32 +260,32 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
123 .thumb_func 123 .thumb_func
125 UsageFault_Handler: 125 UsageFault_Handler:
126 .LFB134: 126 .LFB134:
125:Core/Src/stm32f3xx_it.c **** } 127:Core/Src/stm32f3xx_it.c **** }
126:Core/Src/stm32f3xx_it.c **** 128:Core/Src/stm32f3xx_it.c ****
127:Core/Src/stm32f3xx_it.c **** /** 129:Core/Src/stm32f3xx_it.c **** /**
128:Core/Src/stm32f3xx_it.c **** * @brief This function handles Undefined instruction or illegal state. 130:Core/Src/stm32f3xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
129:Core/Src/stm32f3xx_it.c **** */ 131:Core/Src/stm32f3xx_it.c **** */
130:Core/Src/stm32f3xx_it.c **** void UsageFault_Handler(void) 132:Core/Src/stm32f3xx_it.c **** void UsageFault_Handler(void)
131:Core/Src/stm32f3xx_it.c **** { 133:Core/Src/stm32f3xx_it.c **** {
127 .loc 1 131 1 view -0 127 .loc 1 133 1 view -0
128 .cfi_startproc 128 .cfi_startproc
129 @ Volatile: function does not return. 129 @ Volatile: function does not return.
130 @ args = 0, pretend = 0, frame = 0 130 @ args = 0, pretend = 0, frame = 0
131 @ frame_needed = 0, uses_anonymous_args = 0 131 @ frame_needed = 0, uses_anonymous_args = 0
132 @ link register save eliminated. 132 @ link register save eliminated.
133 .L11: 133 .L11:
132:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */ 134:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
133:Core/Src/stm32f3xx_it.c **** 135:Core/Src/stm32f3xx_it.c ****
134:Core/Src/stm32f3xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */ 136:Core/Src/stm32f3xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
135:Core/Src/stm32f3xx_it.c **** while (1) 137:Core/Src/stm32f3xx_it.c **** while (1)
134 .loc 1 135 3 discriminator 1 view .LVU18 134 .loc 1 137 3 discriminator 1 view .LVU18
136:Core/Src/stm32f3xx_it.c **** { 138:Core/Src/stm32f3xx_it.c **** {
137:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 139:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
138:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */ 140:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
139:Core/Src/stm32f3xx_it.c **** } 141:Core/Src/stm32f3xx_it.c **** }
135 .loc 1 139 3 discriminator 1 view .LVU19 135 .loc 1 141 3 discriminator 1 view .LVU19
135:Core/Src/stm32f3xx_it.c **** { 137:Core/Src/stm32f3xx_it.c **** {
136 .loc 1 135 9 discriminator 1 view .LVU20 136 .loc 1 137 9 discriminator 1 view .LVU20
137 0000 FEE7 b .L11 137 0000 FEE7 b .L11
138 .cfi_endproc 138 .cfi_endproc
139 .LFE134: 139 .LFE134:
@ -295,29 +297,29 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
146 .thumb_func 146 .thumb_func
148 SVC_Handler: 148 SVC_Handler:
149 .LFB135: 149 .LFB135:
140:Core/Src/stm32f3xx_it.c **** } 142:Core/Src/stm32f3xx_it.c **** }
141:Core/Src/stm32f3xx_it.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 6
142:Core/Src/stm32f3xx_it.c **** /**
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 6
143:Core/Src/stm32f3xx_it.c **** * @brief This function handles System service call via SWI instruction. 143:Core/Src/stm32f3xx_it.c ****
144:Core/Src/stm32f3xx_it.c **** */ 144:Core/Src/stm32f3xx_it.c **** /**
145:Core/Src/stm32f3xx_it.c **** void SVC_Handler(void) 145:Core/Src/stm32f3xx_it.c **** * @brief This function handles System service call via SWI instruction.
146:Core/Src/stm32f3xx_it.c **** { 146:Core/Src/stm32f3xx_it.c **** */
150 .loc 1 146 1 view -0 147:Core/Src/stm32f3xx_it.c **** void SVC_Handler(void)
148:Core/Src/stm32f3xx_it.c **** {
150 .loc 1 148 1 view -0
151 .cfi_startproc 151 .cfi_startproc
152 @ args = 0, pretend = 0, frame = 0 152 @ args = 0, pretend = 0, frame = 0
153 @ frame_needed = 0, uses_anonymous_args = 0 153 @ frame_needed = 0, uses_anonymous_args = 0
154 @ link register save eliminated. 154 @ link register save eliminated.
147:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */ 149:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
148:Core/Src/stm32f3xx_it.c **** 150:Core/Src/stm32f3xx_it.c ****
149:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 0 */ 151:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
150:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */ 152:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
151:Core/Src/stm32f3xx_it.c **** 153:Core/Src/stm32f3xx_it.c ****
152:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 1 */ 154:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
153:Core/Src/stm32f3xx_it.c **** } 155:Core/Src/stm32f3xx_it.c **** }
155 .loc 1 153 1 view .LVU22 155 .loc 1 155 1 view .LVU22
156 0000 7047 bx lr 156 0000 7047 bx lr
157 .cfi_endproc 157 .cfi_endproc
158 .LFE135: 158 .LFE135:
@ -329,25 +331,25 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
165 .thumb_func 165 .thumb_func
167 DebugMon_Handler: 167 DebugMon_Handler:
168 .LFB136: 168 .LFB136:
154:Core/Src/stm32f3xx_it.c **** 156:Core/Src/stm32f3xx_it.c ****
155:Core/Src/stm32f3xx_it.c **** /** 157:Core/Src/stm32f3xx_it.c **** /**
156:Core/Src/stm32f3xx_it.c **** * @brief This function handles Debug monitor. 158:Core/Src/stm32f3xx_it.c **** * @brief This function handles Debug monitor.
157:Core/Src/stm32f3xx_it.c **** */ 159:Core/Src/stm32f3xx_it.c **** */
158:Core/Src/stm32f3xx_it.c **** void DebugMon_Handler(void) 160:Core/Src/stm32f3xx_it.c **** void DebugMon_Handler(void)
159:Core/Src/stm32f3xx_it.c **** { 161:Core/Src/stm32f3xx_it.c **** {
169 .loc 1 159 1 view -0 169 .loc 1 161 1 view -0
170 .cfi_startproc 170 .cfi_startproc
171 @ args = 0, pretend = 0, frame = 0 171 @ args = 0, pretend = 0, frame = 0
172 @ frame_needed = 0, uses_anonymous_args = 0 172 @ frame_needed = 0, uses_anonymous_args = 0
173 @ link register save eliminated. 173 @ link register save eliminated.
160:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 162:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
161:Core/Src/stm32f3xx_it.c **** 163:Core/Src/stm32f3xx_it.c ****
162:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */ 164:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
163:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 165:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
164:Core/Src/stm32f3xx_it.c **** 166:Core/Src/stm32f3xx_it.c ****
165:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */ 167:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
166:Core/Src/stm32f3xx_it.c **** } 168:Core/Src/stm32f3xx_it.c **** }
174 .loc 1 166 1 view .LVU24 174 .loc 1 168 1 view .LVU24
175 0000 7047 bx lr 175 0000 7047 bx lr
176 .cfi_endproc 176 .cfi_endproc
177 .LFE136: 177 .LFE136:
@ -356,31 +358,31 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
181 .global PendSV_Handler 181 .global PendSV_Handler
182 .syntax unified 182 .syntax unified
183 .thumb 183 .thumb
ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 7
184 .thumb_func 184 .thumb_func
186 PendSV_Handler: 186 PendSV_Handler:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 7
187 .LFB137: 187 .LFB137:
167:Core/Src/stm32f3xx_it.c **** 169:Core/Src/stm32f3xx_it.c ****
168:Core/Src/stm32f3xx_it.c **** /** 170:Core/Src/stm32f3xx_it.c **** /**
169:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pendable request for system service. 171:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pendable request for system service.
170:Core/Src/stm32f3xx_it.c **** */ 172:Core/Src/stm32f3xx_it.c **** */
171:Core/Src/stm32f3xx_it.c **** void PendSV_Handler(void) 173:Core/Src/stm32f3xx_it.c **** void PendSV_Handler(void)
172:Core/Src/stm32f3xx_it.c **** { 174:Core/Src/stm32f3xx_it.c **** {
188 .loc 1 172 1 view -0 188 .loc 1 174 1 view -0
189 .cfi_startproc 189 .cfi_startproc
190 @ args = 0, pretend = 0, frame = 0 190 @ args = 0, pretend = 0, frame = 0
191 @ frame_needed = 0, uses_anonymous_args = 0 191 @ frame_needed = 0, uses_anonymous_args = 0
192 @ link register save eliminated. 192 @ link register save eliminated.
173:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */ 175:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
174:Core/Src/stm32f3xx_it.c **** 176:Core/Src/stm32f3xx_it.c ****
175:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 0 */ 177:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
176:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */ 178:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
177:Core/Src/stm32f3xx_it.c **** 179:Core/Src/stm32f3xx_it.c ****
178:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 1 */ 180:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
179:Core/Src/stm32f3xx_it.c **** } 181:Core/Src/stm32f3xx_it.c **** }
193 .loc 1 179 1 view .LVU26 193 .loc 1 181 1 view .LVU26
194 0000 7047 bx lr 194 0000 7047 bx lr
195 .cfi_endproc 195 .cfi_endproc
196 .LFE137: 196 .LFE137:
@ -392,13 +394,13 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
203 .thumb_func 203 .thumb_func
205 SysTick_Handler: 205 SysTick_Handler:
206 .LFB138: 206 .LFB138:
180:Core/Src/stm32f3xx_it.c **** 182:Core/Src/stm32f3xx_it.c ****
181:Core/Src/stm32f3xx_it.c **** /** 183:Core/Src/stm32f3xx_it.c **** /**
182:Core/Src/stm32f3xx_it.c **** * @brief This function handles System tick timer. 184:Core/Src/stm32f3xx_it.c **** * @brief This function handles System tick timer.
183:Core/Src/stm32f3xx_it.c **** */ 185:Core/Src/stm32f3xx_it.c **** */
184:Core/Src/stm32f3xx_it.c **** void SysTick_Handler(void) 186:Core/Src/stm32f3xx_it.c **** void SysTick_Handler(void)
185:Core/Src/stm32f3xx_it.c **** { 187:Core/Src/stm32f3xx_it.c **** {
207 .loc 1 185 1 view -0 207 .loc 1 187 1 view -0
208 .cfi_startproc 208 .cfi_startproc
209 @ args = 0, pretend = 0, frame = 0 209 @ args = 0, pretend = 0, frame = 0
210 @ frame_needed = 0, uses_anonymous_args = 0 210 @ frame_needed = 0, uses_anonymous_args = 0
@ -406,46 +408,46 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
212 .cfi_def_cfa_offset 8 212 .cfi_def_cfa_offset 8
213 .cfi_offset 3, -8 213 .cfi_offset 3, -8
214 .cfi_offset 14, -4 214 .cfi_offset 14, -4
186:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */ 188:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
187:Core/Src/stm32f3xx_it.c **** 189:Core/Src/stm32f3xx_it.c ****
188:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 0 */ 190:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
189:Core/Src/stm32f3xx_it.c **** HAL_IncTick(); 191:Core/Src/stm32f3xx_it.c **** HAL_IncTick();
215 .loc 1 189 3 view .LVU28 215 .loc 1 191 3 view .LVU28
216 0002 FFF7FEFF bl HAL_IncTick 216 0002 FFF7FEFF bl HAL_IncTick
217 .LVL1: 217 .LVL1:
190:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ 192:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
191:Core/Src/stm32f3xx_it.c **** 193:Core/Src/stm32f3xx_it.c ****
192:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ 194:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
193:Core/Src/stm32f3xx_it.c **** } ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 8
218 .loc 1 193 1 is_stmt 0 view .LVU29
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 8
195:Core/Src/stm32f3xx_it.c **** }
218 .loc 1 195 1 is_stmt 0 view .LVU29
219 0006 08BD pop {r3, pc} 219 0006 08BD pop {r3, pc}
220 .cfi_endproc 220 .cfi_endproc
221 .LFE138: 221 .LFE138:
223 .section .text.USB_LP_CAN_RX0_IRQHandler,"ax",%progbits 223 .section .text.DMA1_Channel1_IRQHandler,"ax",%progbits
224 .align 1 224 .align 1
225 .global USB_LP_CAN_RX0_IRQHandler 225 .global DMA1_Channel1_IRQHandler
226 .syntax unified 226 .syntax unified
227 .thumb 227 .thumb
228 .thumb_func 228 .thumb_func
230 USB_LP_CAN_RX0_IRQHandler: 230 DMA1_Channel1_IRQHandler:
231 .LFB139: 231 .LFB139:
194:Core/Src/stm32f3xx_it.c **** 196:Core/Src/stm32f3xx_it.c ****
195:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ 197:Core/Src/stm32f3xx_it.c **** /******************************************************************************/
196:Core/Src/stm32f3xx_it.c **** /* STM32F3xx Peripheral Interrupt Handlers */ 198:Core/Src/stm32f3xx_it.c **** /* STM32F3xx Peripheral Interrupt Handlers */
197:Core/Src/stm32f3xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */ 199:Core/Src/stm32f3xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
198:Core/Src/stm32f3xx_it.c **** /* For the available peripheral interrupt handler names, */ 200:Core/Src/stm32f3xx_it.c **** /* For the available peripheral interrupt handler names, */
199:Core/Src/stm32f3xx_it.c **** /* please refer to the startup file (startup_stm32f3xx.s). */ 201:Core/Src/stm32f3xx_it.c **** /* please refer to the startup file (startup_stm32f3xx.s). */
200:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ 202:Core/Src/stm32f3xx_it.c **** /******************************************************************************/
201:Core/Src/stm32f3xx_it.c **** 203:Core/Src/stm32f3xx_it.c ****
202:Core/Src/stm32f3xx_it.c **** /** 204:Core/Src/stm32f3xx_it.c **** /**
203:Core/Src/stm32f3xx_it.c **** * @brief This function handles USB low priority or CAN_RX0 interrupts. 205:Core/Src/stm32f3xx_it.c **** * @brief This function handles DMA1 channel1 global interrupt.
204:Core/Src/stm32f3xx_it.c **** */ 206:Core/Src/stm32f3xx_it.c **** */
205:Core/Src/stm32f3xx_it.c **** void USB_LP_CAN_RX0_IRQHandler(void) 207:Core/Src/stm32f3xx_it.c **** void DMA1_Channel1_IRQHandler(void)
206:Core/Src/stm32f3xx_it.c **** { 208:Core/Src/stm32f3xx_it.c **** {
232 .loc 1 206 1 is_stmt 1 view -0 232 .loc 1 208 1 is_stmt 1 view -0
233 .cfi_startproc 233 .cfi_startproc
234 @ args = 0, pretend = 0, frame = 0 234 @ args = 0, pretend = 0, frame = 0
235 @ frame_needed = 0, uses_anonymous_args = 0 235 @ frame_needed = 0, uses_anonymous_args = 0
@ -453,44 +455,44 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
237 .cfi_def_cfa_offset 8 237 .cfi_def_cfa_offset 8
238 .cfi_offset 3, -8 238 .cfi_offset 3, -8
239 .cfi_offset 14, -4 239 .cfi_offset 14, -4
207:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 0 */ 209:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
208:Core/Src/stm32f3xx_it.c **** 210:Core/Src/stm32f3xx_it.c ****
209:Core/Src/stm32f3xx_it.c **** /* USER CODE END USB_LP_CAN_RX0_IRQn 0 */ 211:Core/Src/stm32f3xx_it.c **** /* USER CODE END DMA1_Channel1_IRQn 0 */
210:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan); 212:Core/Src/stm32f3xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc1);
240 .loc 1 210 3 view .LVU31 240 .loc 1 212 3 view .LVU31
241 0002 0248 ldr r0, .L19 241 0002 0248 ldr r0, .L19
242 0004 FFF7FEFF bl HAL_CAN_IRQHandler 242 0004 FFF7FEFF bl HAL_DMA_IRQHandler
243 .LVL2: 243 .LVL2:
211:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 1 */ 213:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
212:Core/Src/stm32f3xx_it.c **** 214:Core/Src/stm32f3xx_it.c ****
213:Core/Src/stm32f3xx_it.c **** /* USER CODE END USB_LP_CAN_RX0_IRQn 1 */ 215:Core/Src/stm32f3xx_it.c **** /* USER CODE END DMA1_Channel1_IRQn 1 */
214:Core/Src/stm32f3xx_it.c **** } 216:Core/Src/stm32f3xx_it.c **** }
244 .loc 1 214 1 is_stmt 0 view .LVU32 244 .loc 1 216 1 is_stmt 0 view .LVU32
245 0008 08BD pop {r3, pc} 245 0008 08BD pop {r3, pc}
246 .L20: 246 .L20:
247 000a 00BF .align 2 247 000a 00BF .align 2
248 .L19: 248 .L19:
249 000c 00000000 .word hcan 249 000c 00000000 .word hdma_adc1
250 .cfi_endproc 250 .cfi_endproc
251 .LFE139: 251 .LFE139:
253 .section .text.CAN_RX1_IRQHandler,"ax",%progbits 253 .section .text.USB_LP_CAN_RX0_IRQHandler,"ax",%progbits
254 .align 1 254 .align 1
255 .global CAN_RX1_IRQHandler 255 .global USB_LP_CAN_RX0_IRQHandler
ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 9
256 .syntax unified 256 .syntax unified
257 .thumb 257 .thumb
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 9
258 .thumb_func 258 .thumb_func
260 CAN_RX1_IRQHandler: 260 USB_LP_CAN_RX0_IRQHandler:
261 .LFB140: 261 .LFB140:
215:Core/Src/stm32f3xx_it.c **** 217:Core/Src/stm32f3xx_it.c ****
216:Core/Src/stm32f3xx_it.c **** /** 218:Core/Src/stm32f3xx_it.c **** /**
217:Core/Src/stm32f3xx_it.c **** * @brief This function handles CAN RX1 interrupt. 219:Core/Src/stm32f3xx_it.c **** * @brief This function handles USB low priority or CAN_RX0 interrupts.
218:Core/Src/stm32f3xx_it.c **** */ 220:Core/Src/stm32f3xx_it.c **** */
219:Core/Src/stm32f3xx_it.c **** void CAN_RX1_IRQHandler(void) 221:Core/Src/stm32f3xx_it.c **** void USB_LP_CAN_RX0_IRQHandler(void)
220:Core/Src/stm32f3xx_it.c **** { 222:Core/Src/stm32f3xx_it.c **** {
262 .loc 1 220 1 is_stmt 1 view -0 262 .loc 1 222 1 is_stmt 1 view -0
263 .cfi_startproc 263 .cfi_startproc
264 @ args = 0, pretend = 0, frame = 0 264 @ args = 0, pretend = 0, frame = 0
265 @ frame_needed = 0, uses_anonymous_args = 0 265 @ frame_needed = 0, uses_anonymous_args = 0
@ -498,19 +500,19 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
267 .cfi_def_cfa_offset 8 267 .cfi_def_cfa_offset 8
268 .cfi_offset 3, -8 268 .cfi_offset 3, -8
269 .cfi_offset 14, -4 269 .cfi_offset 14, -4
221:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_RX1_IRQn 0 */ 223:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 0 */
222:Core/Src/stm32f3xx_it.c **** 224:Core/Src/stm32f3xx_it.c ****
223:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_RX1_IRQn 0 */ 225:Core/Src/stm32f3xx_it.c **** /* USER CODE END USB_LP_CAN_RX0_IRQn 0 */
224:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan); 226:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan);
270 .loc 1 224 3 view .LVU34 270 .loc 1 226 3 view .LVU34
271 0002 0248 ldr r0, .L23 271 0002 0248 ldr r0, .L23
272 0004 FFF7FEFF bl HAL_CAN_IRQHandler 272 0004 FFF7FEFF bl HAL_CAN_IRQHandler
273 .LVL3: 273 .LVL3:
225:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_RX1_IRQn 1 */ 227:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 1 */
226:Core/Src/stm32f3xx_it.c **** 228:Core/Src/stm32f3xx_it.c ****
227:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_RX1_IRQn 1 */ 229:Core/Src/stm32f3xx_it.c **** /* USER CODE END USB_LP_CAN_RX0_IRQn 1 */
228:Core/Src/stm32f3xx_it.c **** } 230:Core/Src/stm32f3xx_it.c **** }
274 .loc 1 228 1 is_stmt 0 view .LVU35 274 .loc 1 230 1 is_stmt 0 view .LVU35
275 0008 08BD pop {r3, pc} 275 0008 08BD pop {r3, pc}
276 .L24: 276 .L24:
277 000a 00BF .align 2 277 000a 00BF .align 2
@ -518,44 +520,44 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
279 000c 00000000 .word hcan 279 000c 00000000 .word hcan
280 .cfi_endproc 280 .cfi_endproc
281 .LFE140: 281 .LFE140:
283 .section .text.CAN_SCE_IRQHandler,"ax",%progbits 283 .section .text.CAN_RX1_IRQHandler,"ax",%progbits
284 .align 1 284 .align 1
285 .global CAN_SCE_IRQHandler 285 .global CAN_RX1_IRQHandler
286 .syntax unified 286 .syntax unified
287 .thumb 287 .thumb
288 .thumb_func 288 .thumb_func
290 CAN_SCE_IRQHandler: 290 CAN_RX1_IRQHandler:
291 .LFB141: 291 .LFB141:
229:Core/Src/stm32f3xx_it.c **** 231:Core/Src/stm32f3xx_it.c ****
230:Core/Src/stm32f3xx_it.c **** /** 232:Core/Src/stm32f3xx_it.c **** /**
231:Core/Src/stm32f3xx_it.c **** * @brief This function handles CAN SCE interrupt. 233:Core/Src/stm32f3xx_it.c **** * @brief This function handles CAN RX1 interrupt.
232:Core/Src/stm32f3xx_it.c **** */ 234:Core/Src/stm32f3xx_it.c **** */
233:Core/Src/stm32f3xx_it.c **** void CAN_SCE_IRQHandler(void) 235:Core/Src/stm32f3xx_it.c **** void CAN_RX1_IRQHandler(void)
234:Core/Src/stm32f3xx_it.c **** { 236:Core/Src/stm32f3xx_it.c **** {
292 .loc 1 234 1 is_stmt 1 view -0 292 .loc 1 236 1 is_stmt 1 view -0
293 .cfi_startproc 293 .cfi_startproc
294 @ args = 0, pretend = 0, frame = 0 294 @ args = 0, pretend = 0, frame = 0
295 @ frame_needed = 0, uses_anonymous_args = 0 295 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 10
296 0000 08B5 push {r3, lr} 296 0000 08B5 push {r3, lr}
297 .cfi_def_cfa_offset 8 297 .cfi_def_cfa_offset 8
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 10
298 .cfi_offset 3, -8 298 .cfi_offset 3, -8
299 .cfi_offset 14, -4 299 .cfi_offset 14, -4
235:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_SCE_IRQn 0 */ 237:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_RX1_IRQn 0 */
236:Core/Src/stm32f3xx_it.c **** 238:Core/Src/stm32f3xx_it.c ****
237:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_SCE_IRQn 0 */ 239:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_RX1_IRQn 0 */
238:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan); 240:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan);
300 .loc 1 238 3 view .LVU37 300 .loc 1 240 3 view .LVU37
301 0002 0248 ldr r0, .L27 301 0002 0248 ldr r0, .L27
302 0004 FFF7FEFF bl HAL_CAN_IRQHandler 302 0004 FFF7FEFF bl HAL_CAN_IRQHandler
303 .LVL4: 303 .LVL4:
239:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_SCE_IRQn 1 */ 241:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_RX1_IRQn 1 */
240:Core/Src/stm32f3xx_it.c **** 242:Core/Src/stm32f3xx_it.c ****
241:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_SCE_IRQn 1 */ 243:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_RX1_IRQn 1 */
242:Core/Src/stm32f3xx_it.c **** } 244:Core/Src/stm32f3xx_it.c **** }
304 .loc 1 242 1 is_stmt 0 view .LVU38 304 .loc 1 244 1 is_stmt 0 view .LVU38
305 0008 08BD pop {r3, pc} 305 0008 08BD pop {r3, pc}
306 .L28: 306 .L28:
307 000a 00BF .align 2 307 000a 00BF .align 2
@ -563,50 +565,151 @@ ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 1
309 000c 00000000 .word hcan 309 000c 00000000 .word hcan
310 .cfi_endproc 310 .cfi_endproc
311 .LFE141: 311 .LFE141:
313 .text 313 .section .text.CAN_SCE_IRQHandler,"ax",%progbits
314 .Letext0: 314 .align 1
315 .file 2 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 315 .global CAN_SCE_IRQHandler
316 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 316 .syntax unified
317 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 317 .thumb
318 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 318 .thumb_func
319 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" 320 CAN_SCE_IRQHandler:
320 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" 321 .LFB142:
321 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" 245:Core/Src/stm32f3xx_it.c ****
ARM GAS C:\Users\nived\AppData\Local\Temp\ccJm8A36.s page 11 246:Core/Src/stm32f3xx_it.c **** /**
247:Core/Src/stm32f3xx_it.c **** * @brief This function handles CAN SCE interrupt.
248:Core/Src/stm32f3xx_it.c **** */
249:Core/Src/stm32f3xx_it.c **** void CAN_SCE_IRQHandler(void)
250:Core/Src/stm32f3xx_it.c **** {
322 .loc 1 250 1 is_stmt 1 view -0
323 .cfi_startproc
324 @ args = 0, pretend = 0, frame = 0
325 @ frame_needed = 0, uses_anonymous_args = 0
326 0000 08B5 push {r3, lr}
327 .cfi_def_cfa_offset 8
328 .cfi_offset 3, -8
329 .cfi_offset 14, -4
251:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_SCE_IRQn 0 */
252:Core/Src/stm32f3xx_it.c ****
253:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_SCE_IRQn 0 */
254:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan);
330 .loc 1 254 3 view .LVU40
331 0002 0248 ldr r0, .L31
332 0004 FFF7FEFF bl HAL_CAN_IRQHandler
333 .LVL5:
255:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_SCE_IRQn 1 */
256:Core/Src/stm32f3xx_it.c ****
257:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_SCE_IRQn 1 */
ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 11
258:Core/Src/stm32f3xx_it.c **** }
334 .loc 1 258 1 is_stmt 0 view .LVU41
335 0008 08BD pop {r3, pc}
336 .L32:
337 000a 00BF .align 2
338 .L31:
339 000c 00000000 .word hcan
340 .cfi_endproc
341 .LFE142:
343 .section .text.DMA2_Channel1_IRQHandler,"ax",%progbits
344 .align 1
345 .global DMA2_Channel1_IRQHandler
346 .syntax unified
347 .thumb
348 .thumb_func
350 DMA2_Channel1_IRQHandler:
351 .LFB143:
259:Core/Src/stm32f3xx_it.c ****
260:Core/Src/stm32f3xx_it.c **** /**
261:Core/Src/stm32f3xx_it.c **** * @brief This function handles DMA2 channel1 global interrupt.
262:Core/Src/stm32f3xx_it.c **** */
263:Core/Src/stm32f3xx_it.c **** void DMA2_Channel1_IRQHandler(void)
264:Core/Src/stm32f3xx_it.c **** {
352 .loc 1 264 1 is_stmt 1 view -0
353 .cfi_startproc
354 @ args = 0, pretend = 0, frame = 0
355 @ frame_needed = 0, uses_anonymous_args = 0
356 0000 08B5 push {r3, lr}
357 .cfi_def_cfa_offset 8
358 .cfi_offset 3, -8
359 .cfi_offset 14, -4
265:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DMA2_Channel1_IRQn 0 */
266:Core/Src/stm32f3xx_it.c ****
267:Core/Src/stm32f3xx_it.c **** /* USER CODE END DMA2_Channel1_IRQn 0 */
268:Core/Src/stm32f3xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc2);
360 .loc 1 268 3 view .LVU43
361 0002 0248 ldr r0, .L35
362 0004 FFF7FEFF bl HAL_DMA_IRQHandler
363 .LVL6:
269:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DMA2_Channel1_IRQn 1 */
270:Core/Src/stm32f3xx_it.c ****
271:Core/Src/stm32f3xx_it.c **** /* USER CODE END DMA2_Channel1_IRQn 1 */
272:Core/Src/stm32f3xx_it.c **** }
364 .loc 1 272 1 is_stmt 0 view .LVU44
365 0008 08BD pop {r3, pc}
366 .L36:
367 000a 00BF .align 2
368 .L35:
369 000c 00000000 .word hdma_adc2
370 .cfi_endproc
371 .LFE143:
373 .text
374 .Letext0:
375 .file 2 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
376 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
377 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
378 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 12
379 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
380 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
381 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h"
382 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
383 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h"
ARM GAS C:\Users\nived\AppData\Local\Temp\cchNGiDa.s page 13
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_it.c *ABS*:00000000 stm32f3xx_it.c
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:21 .text.NMI_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:21 .text.NMI_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:27 .text.NMI_Handler:00000000 NMI_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:27 .text.NMI_Handler:00000000 NMI_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:50 .text.HardFault_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:50 .text.HardFault_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:56 .text.HardFault_Handler:00000000 HardFault_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:56 .text.HardFault_Handler:00000000 HardFault_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:73 .text.MemManage_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:73 .text.MemManage_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:79 .text.MemManage_Handler:00000000 MemManage_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:79 .text.MemManage_Handler:00000000 MemManage_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:96 .text.BusFault_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:96 .text.BusFault_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:102 .text.BusFault_Handler:00000000 BusFault_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:102 .text.BusFault_Handler:00000000 BusFault_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:119 .text.UsageFault_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:119 .text.UsageFault_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:125 .text.UsageFault_Handler:00000000 UsageFault_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:125 .text.UsageFault_Handler:00000000 UsageFault_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:142 .text.SVC_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:142 .text.SVC_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:148 .text.SVC_Handler:00000000 SVC_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:148 .text.SVC_Handler:00000000 SVC_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:161 .text.DebugMon_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:161 .text.DebugMon_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:167 .text.DebugMon_Handler:00000000 DebugMon_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:167 .text.DebugMon_Handler:00000000 DebugMon_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:180 .text.PendSV_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:180 .text.PendSV_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:186 .text.PendSV_Handler:00000000 PendSV_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:186 .text.PendSV_Handler:00000000 PendSV_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:199 .text.SysTick_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:199 .text.SysTick_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:205 .text.SysTick_Handler:00000000 SysTick_Handler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:205 .text.SysTick_Handler:00000000 SysTick_Handler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:224 .text.USB_LP_CAN_RX0_IRQHandler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:224 .text.DMA1_Channel1_IRQHandler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:230 .text.USB_LP_CAN_RX0_IRQHandler:00000000 USB_LP_CAN_RX0_IRQHandler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:230 .text.DMA1_Channel1_IRQHandler:00000000 DMA1_Channel1_IRQHandler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:249 .text.USB_LP_CAN_RX0_IRQHandler:0000000c $d C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:249 .text.DMA1_Channel1_IRQHandler:0000000c $d
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:254 .text.CAN_RX1_IRQHandler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:254 .text.USB_LP_CAN_RX0_IRQHandler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:260 .text.CAN_RX1_IRQHandler:00000000 CAN_RX1_IRQHandler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:260 .text.USB_LP_CAN_RX0_IRQHandler:00000000 USB_LP_CAN_RX0_IRQHandler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:279 .text.CAN_RX1_IRQHandler:0000000c $d C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:279 .text.USB_LP_CAN_RX0_IRQHandler:0000000c $d
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:284 .text.CAN_SCE_IRQHandler:00000000 $t C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:284 .text.CAN_RX1_IRQHandler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:290 .text.CAN_SCE_IRQHandler:00000000 CAN_SCE_IRQHandler C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:290 .text.CAN_RX1_IRQHandler:00000000 CAN_RX1_IRQHandler
C:\Users\nived\AppData\Local\Temp\ccJm8A36.s:309 .text.CAN_SCE_IRQHandler:0000000c $d C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:309 .text.CAN_RX1_IRQHandler:0000000c $d
C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:314 .text.CAN_SCE_IRQHandler:00000000 $t
C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:320 .text.CAN_SCE_IRQHandler:00000000 CAN_SCE_IRQHandler
C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:339 .text.CAN_SCE_IRQHandler:0000000c $d
C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:344 .text.DMA2_Channel1_IRQHandler:00000000 $t
C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:350 .text.DMA2_Channel1_IRQHandler:00000000 DMA2_Channel1_IRQHandler
C:\Users\nived\AppData\Local\Temp\cchNGiDa.s:369 .text.DMA2_Channel1_IRQHandler:0000000c $d
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
HAL_RCC_NMI_IRQHandler HAL_RCC_NMI_IRQHandler
HAL_IncTick HAL_IncTick
HAL_DMA_IRQHandler
hdma_adc1
HAL_CAN_IRQHandler HAL_CAN_IRQHandler
hcan hcan
hdma_adc2