FaSTTUBe
/
PDU_Code
49
1
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
PDU_Code/build/stm32f3xx_hal_can.lst

7273 lines
473 KiB
Plaintext
Raw Normal View History

gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 1
restructured repo
2024-05-12 14:08:58 +02:00
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_can.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c"
20 .section .text.HAL_CAN_MspInit,"ax",%progbits
21 .align 1
22 .weak HAL_CAN_MspInit
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_CAN_MspInit:
28 .LVL0:
29 .LFB132:
1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ******************************************************************************
3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @file stm32f3xx_hal_can.c
4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @author MCD Application Team
5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN HAL module driver.
6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * functionalities of the Controller Area Network (CAN) peripheral:
8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Initialization and de-initialization functions
9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Configuration functions
10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Control functions
11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Interrupts management
12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Callbacks functions
13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Peripheral State and Error functions
14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ******************************************************************************
16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @attention
17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Copyright (c) 2016 STMicroelectronics.
19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * All rights reserved.
20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This software is licensed under terms that can be found in the LICENSE file
22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * in the root directory of this software component.
23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ******************************************************************************
26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim
27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### How to use this driver #####
29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 2
restructured repo
2024-05-12 14:08:58 +02:00
30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..]
31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Initialize the CAN low level resources by implementing the
32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspInit():
33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE()
34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Configure CAN pins
35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Enable the clock for the CAN GPIOs
36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Configure CAN pins as alternate function open-drain
37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification())
38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Configure the CAN interrupt priority using
39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_NVIC_SetPriority()
40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ()
41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler()
42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This
44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** function resorts to HAL_CAN_MspInit() for low-level initialization.
45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Configure the reception filters using the following configuration
47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** functions:
48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_ConfigFilter()
49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Start the CAN module using HAL_CAN_Start() function. At this level
51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the node is active on the bus: it receive messages, and can send
52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** messages.
53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) To manage messages transmission, the following Tx control functions
55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can be used:
56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_AddTxMessage() to request transmission of a new
57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** message.
58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending
59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** message.
60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx
61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mailboxes.
62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_IsTxMessagePending() to check if a message is pending
63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** in a Tx mailbox.
64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message
65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** sent, if time triggered communication mode is enabled.
66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) When a message is received into the CAN Rx FIFOs, it can be retrieved
68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using the HAL_CAN_GetRxMessage() function. The function
69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are
70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** stored in the Rx Fifo.
71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Calling the HAL_CAN_Stop() function stops the CAN module.
73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The deinitialization is achieved with HAL_CAN_DeInit() function.
75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Polling mode operation ***
78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================
79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..]
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Reception:
81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel()
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** until at least one message is received.
83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Then get the message using HAL_CAN_GetRxMessage().
84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Transmission:
86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Monitor the Tx mailboxes availability until at least one Tx
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 3
restructured repo
2024-05-12 14:08:58 +02:00
87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel().
88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Then request transmission of a message using
89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_AddTxMessage().
90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Interrupt mode operation ***
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ================================
94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..]
95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Notifications are activated using HAL_CAN_ActivateNotification()
96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** function. Then, the process can be controlled through the
97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** available user callbacks: HAL_CAN_xxxCallback(), using same APIs
98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage().
99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Notifications can be deactivated using
101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_DeactivateNotification() function.
102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and
104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig
105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and
106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options
107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** here.
108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Directly get the Rx message in the callback, using
109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxMessage().
110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Or deactivate the notification in the callback without
111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** getting the Rx message. The Rx message can then be got later
112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using HAL_CAN_GetRxMessage(). Once the Rx message have been
113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** read, the notification can be activated again.
114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Sleep mode ***
117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==================
118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..]
119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The CAN peripheral can be put in sleep mode (low power), using
120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the
121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** current CAN activity (transmission or reception of a CAN frame) will
122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** be completed.
123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) A notification can be activated to be informed when the sleep mode
125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** will be entered.
126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) It can be checked if the sleep mode is entered using
128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_IsSleepActive().
129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Note that the CAN state (accessible from the API HAL_CAN_GetState())
130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is
131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** submitted (the sleep mode is not yet entered), and become
132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective.
133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The wake-up from sleep mode can be triggered by two ways:
135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Using HAL_CAN_WakeUp(). When returning from this function,
136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the sleep mode is exited (if return status is HAL_OK).
137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) When a start of Rx CAN frame is detected by the CAN peripheral,
138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if automatic wake up mode is enabled.
139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Callback registration ***
141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** =============================================
142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 4
restructured repo
2024-05-12 14:08:58 +02:00
144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** allows the user to configure dynamically the driver callbacks.
145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Use Function HAL_CAN_RegisterCallback() to register an interrupt callback.
146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Function HAL_CAN_RegisterCallback() allows to register following callbacks:
148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback.
149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback.
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback.
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback.
152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback.
153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback.
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback.
155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback.
156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback.
157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback.
158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) SleepCallback : Sleep Callback.
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback.
160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) ErrorCallback : Error Callback.
161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspInitCallback : CAN MspInit.
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit.
163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This function takes as parameters the HAL peripheral handle, the Callback ID
164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and a pointer to the user callback function.
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Use function HAL_CAN_UnRegisterCallback() to reset a callback to the default
167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** weak function.
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle,
169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and the Callback ID.
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This function allows to reset following callbacks:
171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback.
172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback.
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback.
174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback.
175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback.
176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback.
177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback.
178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback.
179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback.
180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback.
181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) SleepCallback : Sleep Callback.
182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback.
183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) ErrorCallback : Error Callback.
184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspInitCallback : CAN MspInit.
185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit.
186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** By default, after the HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET,
188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** all callbacks are set to the corresponding weak functions:
189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** example HAL_CAN_ErrorCallback().
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Exception done for MspInit and MspDeInit functions that are
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** reset to the legacy weak function in the HAL_CAN_Init()/ HAL_CAN_DeInit() only when
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** these callbacks are null (not registered beforehand).
193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if not, MspInit or MspDeInit are not null, the HAL_CAN_Init()/ HAL_CAN_DeInit()
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only.
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Exception done MspInit/MspDeInit that can be registered/unregistered
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state,
199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** In that case first register the MspInit/MspDeInit user callbacks
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 5
restructured repo
2024-05-12 14:08:58 +02:00
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using HAL_CAN_RegisterCallback() before calling HAL_CAN_DeInit()
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** or HAL_CAN_Init() function.
203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or
205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** not defined, the callback registration feature is not available and all callbacks
206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** are set to the corresponding weak functions.
207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim
209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ******************************************************************************
210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Includes ------------------------------------------------------------------*/
213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #include "stm32f3xx_hal.h"
214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @addtogroup STM32F3xx_HAL_Driver
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if defined(CAN)
220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN CAN
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN driver modules
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #ifdef HAL_CAN_MODULE_ENABLED
227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #ifdef HAL_CAN_LEGACY_MODULE_ENABLED
229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once"
230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private typedef -----------------------------------------------------------*/
233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private define ------------------------------------------------------------*/
234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Private_Constants CAN Private Constants
235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #define CAN_TIMEOUT_VALUE 10U
238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @}
240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private macro -------------------------------------------------------------*/
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private variables ---------------------------------------------------------*/
243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private function prototypes -----------------------------------------------*/
244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exported functions --------------------------------------------------------*/
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions CAN Exported Functions
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initialization and Configuration functions
252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Initialization and de-initialization functions #####
256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 6
restructured repo
2024-05-12 14:08:58 +02:00
258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Init : Initialize and configure the CAN.
259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_DeInit : De-initialize the CAN.
260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_MspInit : Initialize the CAN MSP.
261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP.
262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim
264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initializes the CAN peripheral according to the specified
269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * parameters in the CAN_InitStruct.
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart;
277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan == NULL)
280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */
285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode));
287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff));
288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp));
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission));
290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked));
291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority));
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode));
293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth));
294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1));
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2));
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET)
300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset callbacks to legacy functions */
302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0M
303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0F
304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1M
305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1F
306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbo
307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbo
308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbo
309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbo
310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbo
311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbo
312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCal
313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFr
314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCal
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 7
restructured repo
2024-05-12 14:08:58 +02:00
315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->MspInitCallback == NULL)
317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */
319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */
322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback(hcan);
323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET)
327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspInit(hcan);
330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request initialisation */
334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick();
338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait initialisation acknowledge */
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U)
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR;
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exit from sleep mode */
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */
358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick();
359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Sleep mode leave acknowledge */
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */
369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR;
370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 8
restructured repo
2024-05-12 14:08:58 +02:00
372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the time triggered communication mode */
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.TimeTriggeredMode == ENABLE)
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic bus-off management */
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoBusOff == ENABLE)
387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic wake-up mode */
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoWakeUp == ENABLE)
397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic retransmission */
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoRetransmission == ENABLE)
407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART);
409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_NART);
413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the receive FIFO locked mode */
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.ReceiveFifoLocked == ENABLE)
417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the transmit FIFO priority */
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.TransmitFifoPriority == ENABLE)
427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 9
restructured repo
2024-05-12 14:08:58 +02:00
429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the bit timing register */
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode |
437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.SyncJumpWidth |
438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.TimeSeg1 |
439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.TimeSeg2 |
440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (hcan->Init.Prescaler - 1U)));
441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialize the error code */
443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE;
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialize the CAN state */
446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY;
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Deinitializes the CAN peripheral registers to their default
454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * reset values.
455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan)
460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */
462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan == NULL)
463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */
468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Stop the CAN module */
471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (void)HAL_CAN_Stop(hcan);
472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->MspDeInitCallback == NULL)
475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */
477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */
480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback(hcan);
481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspDeInit(hcan);
485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 10
restructured repo
2024-05-12 14:08:58 +02:00
486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN peripheral */
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET);
489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN ErrorCode */
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE;
492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_RESET;
495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initializes the CAN MSP.
502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan)
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
30 .loc 1 507 1 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 @ link register save eliminated.
508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
35 .loc 1 509 3 view .LVU1
510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_MspInit could be implemented in the user file
513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
36 .loc 1 514 1 is_stmt 0 view .LVU2
37 0000 7047 bx lr
38 .cfi_endproc
39 .LFE132:
41 .section .text.HAL_CAN_Init,"ax",%progbits
42 .align 1
43 .global HAL_CAN_Init
44 .syntax unified
45 .thumb
46 .thumb_func
48 HAL_CAN_Init:
49 .LVL1:
50 .LFB130:
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart;
51 .loc 1 275 1 is_stmt 1 view -0
52 .cfi_startproc
53 @ args = 0, pretend = 0, frame = 0
54 @ frame_needed = 0, uses_anonymous_args = 0
276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
55 .loc 1 276 3 view .LVU4
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
56 .loc 1 279 3 view .LVU5
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 11
restructured repo
2024-05-12 14:08:58 +02:00
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
57 .loc 1 279 6 is_stmt 0 view .LVU6
58 0000 0028 cmp r0, #0
59 0002 00F0A180 beq .L21
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart;
60 .loc 1 275 1 view .LVU7
61 0006 38B5 push {r3, r4, r5, lr}
62 .cfi_def_cfa_offset 16
63 .cfi_offset 3, -16
64 .cfi_offset 4, -12
65 .cfi_offset 5, -8
66 .cfi_offset 14, -4
67 0008 0446 mov r4, r0
285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode));
68 .loc 1 285 3 is_stmt 1 view .LVU8
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff));
69 .loc 1 286 3 view .LVU9
287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp));
70 .loc 1 287 3 view .LVU10
288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission));
71 .loc 1 288 3 view .LVU11
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked));
72 .loc 1 289 3 view .LVU12
290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority));
73 .loc 1 290 3 view .LVU13
291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode));
74 .loc 1 291 3 view .LVU14
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth));
75 .loc 1 292 3 view .LVU15
293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1));
76 .loc 1 293 3 view .LVU16
294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2));
77 .loc 1 294 3 view .LVU17
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
78 .loc 1 295 3 view .LVU18
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
79 .loc 1 296 3 view .LVU19
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
80 .loc 1 326 3 view .LVU20
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
81 .loc 1 326 11 is_stmt 0 view .LVU21
82 000a 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
83 .loc 1 326 6 view .LVU22
84 000e D3B1 cbz r3, .L26
85 .LVL2:
86 .L4:
334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
87 .loc 1 334 3 is_stmt 1 view .LVU23
88 0010 2268 ldr r2, [r4]
89 0012 1368 ldr r3, [r2]
90 0014 43F00103 orr r3, r3, #1
91 0018 1360 str r3, [r2]
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
92 .loc 1 337 3 view .LVU24
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
93 .loc 1 337 15 is_stmt 0 view .LVU25
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 12
restructured repo
2024-05-12 14:08:58 +02:00
94 001a FFF7FEFF bl HAL_GetTick
95 .LVL3:
96 001e 0546 mov r5, r0
97 .LVL4:
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
98 .loc 1 340 3 is_stmt 1 view .LVU26
99 .L5:
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
100 .loc 1 340 47 view .LVU27
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
101 .loc 1 340 15 is_stmt 0 view .LVU28
102 0020 2368 ldr r3, [r4]
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
103 .loc 1 340 25 view .LVU29
104 0022 5A68 ldr r2, [r3, #4]
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
105 .loc 1 340 47 view .LVU30
106 0024 12F0010F tst r2, #1
107 0028 10D1 bne .L27
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
108 .loc 1 342 5 is_stmt 1 view .LVU31
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
109 .loc 1 342 10 is_stmt 0 view .LVU32
110 002a FFF7FEFF bl HAL_GetTick
111 .LVL5:
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
112 .loc 1 342 24 view .LVU33
113 002e 401B subs r0, r0, r5
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
114 .loc 1 342 8 view .LVU34
115 0030 0A28 cmp r0, #10
116 0032 F5D9 bls .L5
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
117 .loc 1 345 7 is_stmt 1 view .LVU35
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
118 .loc 1 345 11 is_stmt 0 view .LVU36
119 0034 636A ldr r3, [r4, #36]
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
120 .loc 1 345 23 view .LVU37
121 0036 43F40033 orr r3, r3, #131072
122 003a 6362 str r3, [r4, #36]
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
123 .loc 1 348 7 is_stmt 1 view .LVU38
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
124 .loc 1 348 19 is_stmt 0 view .LVU39
125 003c 0523 movs r3, #5
126 003e 84F82030 strb r3, [r4, #32]
350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
127 .loc 1 350 7 is_stmt 1 view .LVU40
350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
128 .loc 1 350 14 is_stmt 0 view .LVU41
129 0042 0120 movs r0, #1
130 .L3:
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
131 .loc 1 450 1 view .LVU42
132 0044 38BD pop {r3, r4, r5, pc}
133 .LVL6:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 13
restructured repo
2024-05-12 14:08:58 +02:00
134 .L26:
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
135 .loc 1 329 5 is_stmt 1 view .LVU43
136 0046 FFF7FEFF bl HAL_CAN_MspInit
137 .LVL7:
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
138 .loc 1 329 5 is_stmt 0 view .LVU44
139 004a E1E7 b .L4
140 .LVL8:
141 .L27:
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
142 .loc 1 355 3 is_stmt 1 view .LVU45
143 004c 1A68 ldr r2, [r3]
144 004e 22F00202 bic r2, r2, #2
145 0052 1A60 str r2, [r3]
358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
146 .loc 1 358 3 view .LVU46
358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
147 .loc 1 358 15 is_stmt 0 view .LVU47
148 0054 FFF7FEFF bl HAL_GetTick
149 .LVL9:
150 0058 0546 mov r5, r0
151 .LVL10:
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
152 .loc 1 361 3 is_stmt 1 view .LVU48
153 .L7:
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
154 .loc 1 361 47 view .LVU49
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
155 .loc 1 361 15 is_stmt 0 view .LVU50
156 005a 2368 ldr r3, [r4]
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
157 .loc 1 361 25 view .LVU51
158 005c 5A68 ldr r2, [r3, #4]
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
159 .loc 1 361 47 view .LVU52
160 005e 12F0020F tst r2, #2
161 0062 0DD0 beq .L28
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
162 .loc 1 363 5 is_stmt 1 view .LVU53
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
163 .loc 1 363 10 is_stmt 0 view .LVU54
164 0064 FFF7FEFF bl HAL_GetTick
165 .LVL11:
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
166 .loc 1 363 24 view .LVU55
167 0068 401B subs r0, r0, r5
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
168 .loc 1 363 8 view .LVU56
169 006a 0A28 cmp r0, #10
170 006c F5D9 bls .L7
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
171 .loc 1 366 7 is_stmt 1 view .LVU57
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
172 .loc 1 366 11 is_stmt 0 view .LVU58
173 006e 636A ldr r3, [r4, #36]
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 14
restructured repo
2024-05-12 14:08:58 +02:00
174 .loc 1 366 23 view .LVU59
175 0070 43F40033 orr r3, r3, #131072
176 0074 6362 str r3, [r4, #36]
369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
177 .loc 1 369 7 is_stmt 1 view .LVU60
369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
178 .loc 1 369 19 is_stmt 0 view .LVU61
179 0076 0523 movs r3, #5
180 0078 84F82030 strb r3, [r4, #32]
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
181 .loc 1 371 7 is_stmt 1 view .LVU62
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
182 .loc 1 371 14 is_stmt 0 view .LVU63
183 007c 0120 movs r0, #1
184 007e E1E7 b .L3
185 .L28:
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
186 .loc 1 376 3 is_stmt 1 view .LVU64
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
187 .loc 1 376 17 is_stmt 0 view .LVU65
188 0080 227E ldrb r2, [r4, #24] @ zero_extendqisi2
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
189 .loc 1 376 6 view .LVU66
190 0082 012A cmp r2, #1
191 0084 3DD0 beq .L29
382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
192 .loc 1 382 5 is_stmt 1 view .LVU67
193 0086 1A68 ldr r2, [r3]
194 0088 22F08002 bic r2, r2, #128
195 008c 1A60 str r2, [r3]
196 .L10:
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
197 .loc 1 386 3 view .LVU68
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
198 .loc 1 386 17 is_stmt 0 view .LVU69
199 008e 637E ldrb r3, [r4, #25] @ zero_extendqisi2
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
200 .loc 1 386 6 view .LVU70
201 0090 012B cmp r3, #1
202 0092 3BD0 beq .L30
392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
203 .loc 1 392 5 is_stmt 1 view .LVU71
204 0094 2268 ldr r2, [r4]
205 0096 1368 ldr r3, [r2]
206 0098 23F04003 bic r3, r3, #64
207 009c 1360 str r3, [r2]
208 .L12:
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
209 .loc 1 396 3 view .LVU72
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
210 .loc 1 396 17 is_stmt 0 view .LVU73
211 009e A37E ldrb r3, [r4, #26] @ zero_extendqisi2
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
212 .loc 1 396 6 view .LVU74
213 00a0 012B cmp r3, #1
214 00a2 39D0 beq .L31
402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 15
restructured repo
2024-05-12 14:08:58 +02:00
215 .loc 1 402 5 is_stmt 1 view .LVU75
216 00a4 2268 ldr r2, [r4]
217 00a6 1368 ldr r3, [r2]
218 00a8 23F02003 bic r3, r3, #32
219 00ac 1360 str r3, [r2]
220 .L14:
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
221 .loc 1 406 3 view .LVU76
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
222 .loc 1 406 17 is_stmt 0 view .LVU77
223 00ae E37E ldrb r3, [r4, #27] @ zero_extendqisi2
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
224 .loc 1 406 6 view .LVU78
225 00b0 012B cmp r3, #1
226 00b2 37D0 beq .L32
412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
227 .loc 1 412 5 is_stmt 1 view .LVU79
228 00b4 2268 ldr r2, [r4]
229 00b6 1368 ldr r3, [r2]
230 00b8 43F01003 orr r3, r3, #16
231 00bc 1360 str r3, [r2]
232 .L16:
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
233 .loc 1 416 3 view .LVU80
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
234 .loc 1 416 17 is_stmt 0 view .LVU81
235 00be 237F ldrb r3, [r4, #28] @ zero_extendqisi2
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
236 .loc 1 416 6 view .LVU82
237 00c0 012B cmp r3, #1
238 00c2 35D0 beq .L33
422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
239 .loc 1 422 5 is_stmt 1 view .LVU83
240 00c4 2268 ldr r2, [r4]
241 00c6 1368 ldr r3, [r2]
242 00c8 23F00803 bic r3, r3, #8
243 00cc 1360 str r3, [r2]
244 .L18:
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
245 .loc 1 426 3 view .LVU84
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
246 .loc 1 426 17 is_stmt 0 view .LVU85
247 00ce 637F ldrb r3, [r4, #29] @ zero_extendqisi2
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
248 .loc 1 426 6 view .LVU86
249 00d0 012B cmp r3, #1
250 00d2 33D0 beq .L34
432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
251 .loc 1 432 5 is_stmt 1 view .LVU87
252 00d4 2268 ldr r2, [r4]
253 00d6 1368 ldr r3, [r2]
254 00d8 23F00403 bic r3, r3, #4
255 00dc 1360 str r3, [r2]
256 .L20:
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.SyncJumpWidth |
257 .loc 1 436 3 view .LVU88
258 00de A368 ldr r3, [r4, #8]
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 16
restructured repo
2024-05-12 14:08:58 +02:00
259 00e0 E268 ldr r2, [r4, #12]
260 00e2 1343 orrs r3, r3, r2
261 00e4 2269 ldr r2, [r4, #16]
262 00e6 1343 orrs r3, r3, r2
263 00e8 6269 ldr r2, [r4, #20]
264 00ea 1343 orrs r3, r3, r2
265 00ec 6268 ldr r2, [r4, #4]
266 00ee 013A subs r2, r2, #1
267 00f0 2168 ldr r1, [r4]
268 00f2 1343 orrs r3, r3, r2
269 00f4 CB61 str r3, [r1, #28]
443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
270 .loc 1 443 3 view .LVU89
443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
271 .loc 1 443 19 is_stmt 0 view .LVU90
272 00f6 0020 movs r0, #0
273 00f8 6062 str r0, [r4, #36]
446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
274 .loc 1 446 3 is_stmt 1 view .LVU91
446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
275 .loc 1 446 15 is_stmt 0 view .LVU92
276 00fa 0123 movs r3, #1
277 00fc 84F82030 strb r3, [r4, #32]
449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
278 .loc 1 449 3 is_stmt 1 view .LVU93
449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
279 .loc 1 449 10 is_stmt 0 view .LVU94
280 0100 A0E7 b .L3
281 .L29:
378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
282 .loc 1 378 5 is_stmt 1 view .LVU95
283 0102 1A68 ldr r2, [r3]
284 0104 42F08002 orr r2, r2, #128
285 0108 1A60 str r2, [r3]
286 010a C0E7 b .L10
287 .L30:
388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
288 .loc 1 388 5 view .LVU96
289 010c 2268 ldr r2, [r4]
290 010e 1368 ldr r3, [r2]
291 0110 43F04003 orr r3, r3, #64
292 0114 1360 str r3, [r2]
293 0116 C2E7 b .L12
294 .L31:
398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
295 .loc 1 398 5 view .LVU97
296 0118 2268 ldr r2, [r4]
297 011a 1368 ldr r3, [r2]
298 011c 43F02003 orr r3, r3, #32
299 0120 1360 str r3, [r2]
300 0122 C4E7 b .L14
301 .L32:
408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
302 .loc 1 408 5 view .LVU98
303 0124 2268 ldr r2, [r4]
304 0126 1368 ldr r3, [r2]
305 0128 23F01003 bic r3, r3, #16
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 17
restructured repo
2024-05-12 14:08:58 +02:00
306 012c 1360 str r3, [r2]
307 012e C6E7 b .L16
308 .L33:
418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
309 .loc 1 418 5 view .LVU99
310 0130 2268 ldr r2, [r4]
311 0132 1368 ldr r3, [r2]
312 0134 43F00803 orr r3, r3, #8
313 0138 1360 str r3, [r2]
314 013a C8E7 b .L18
315 .L34:
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
316 .loc 1 428 5 view .LVU100
317 013c 2268 ldr r2, [r4]
318 013e 1368 ldr r3, [r2]
319 0140 43F00403 orr r3, r3, #4
320 0144 1360 str r3, [r2]
321 0146 CAE7 b .L20
322 .LVL12:
323 .L21:
324 .cfi_def_cfa_offset 0
325 .cfi_restore 3
326 .cfi_restore 4
327 .cfi_restore 5
328 .cfi_restore 14
281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
329 .loc 1 281 12 is_stmt 0 view .LVU101
330 0148 0120 movs r0, #1
331 .LVL13:
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
332 .loc 1 450 1 view .LVU102
333 014a 7047 bx lr
334 .cfi_endproc
335 .LFE130:
337 .section .text.HAL_CAN_MspDeInit,"ax",%progbits
338 .align 1
339 .weak HAL_CAN_MspDeInit
340 .syntax unified
341 .thumb
342 .thumb_func
344 HAL_CAN_MspDeInit:
345 .LVL14:
346 .LFB133:
515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief DeInitializes the CAN MSP.
518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan)
523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
347 .loc 1 523 1 is_stmt 1 view -0
348 .cfi_startproc
349 @ args = 0, pretend = 0, frame = 0
350 @ frame_needed = 0, uses_anonymous_args = 0
351 @ link register save eliminated.
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 18
restructured repo
2024-05-12 14:08:58 +02:00
524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
352 .loc 1 525 3 view .LVU104
526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_MspDeInit could be implemented in the user file
529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
353 .loc 1 530 1 is_stmt 0 view .LVU105
354 0000 7047 bx lr
355 .cfi_endproc
356 .LFE133:
358 .section .text.HAL_CAN_ConfigFilter,"ax",%progbits
359 .align 1
360 .global HAL_CAN_ConfigFilter
361 .syntax unified
362 .thumb
363 .thumb_func
365 HAL_CAN_ConfigFilter:
366 .LVL15:
367 .LFB134:
531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Register a CAN CallBack.
535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * To be used instead of the weak predefined callback
536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for CAN module
538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param CallbackID ID of the callback to be registered
539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one of the following values:
540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID
541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID
542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID
543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID
544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID
545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID
547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID
548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID
549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID
550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID
552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID
553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID
554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID
555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pCallback pointer to the Callback function
556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Callb
559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** void (* pCallback)(CAN_HandleTypeDef *_hcan))
560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK;
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pCallback == NULL)
564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */
566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 19
restructured repo
2024-05-12 14:08:58 +02:00
567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY)
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID)
574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID :
576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = pCallback;
577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID :
580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = pCallback;
581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID :
584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = pCallback;
585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID :
588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = pCallback;
589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID :
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = pCallback;
593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID :
596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = pCallback;
597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID :
600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = pCallback;
601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID :
604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = pCallback;
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID :
608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = pCallback;
609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID :
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = pCallback;
613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID :
616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = pCallback;
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID :
620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = pCallback;
621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID :
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 20
restructured repo
2024-05-12 14:08:58 +02:00
624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = pCallback;
625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID :
628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = pCallback;
629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID :
632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = pCallback;
633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default :
636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */
637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */
640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR;
641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET)
645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID)
647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID :
649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = pCallback;
650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID :
653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = pCallback;
654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default :
657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */
661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR;
662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */
671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR;
672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status;
675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Unregister a CAN CallBack.
679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * CAN callback is redirected to the weak predefined callback
680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 21
restructured repo
2024-05-12 14:08:58 +02:00
681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for CAN module
682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param CallbackID ID of the callback to be unregistered
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one of the following values:
684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID
685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID
686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID
687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID
688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID
689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID
690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID
691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID
692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID
693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID
694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID
696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID
697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID
698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID
699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Cal
702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK;
704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY)
706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID)
708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID :
710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback;
711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID :
714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback;
715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID :
718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback;
719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID :
722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback;
723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID :
726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback;
727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID :
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback;
731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID :
734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback;
735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID :
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 22
restructured repo
2024-05-12 14:08:58 +02:00
738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback;
739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID :
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback;
743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID :
746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback;
747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID :
750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback;
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID :
754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback;
755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID :
758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback;
759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID :
762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit;
763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID :
766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit;
767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default :
770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */
774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR;
775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET)
779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID)
781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID :
783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit;
784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID :
787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit;
788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default :
791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */
792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 23
restructured repo
2024-05-12 14:08:58 +02:00
795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR;
796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */
802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */
805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR;
806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status;
809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @}
814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group2 Configuration functions
817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Configuration functions.
818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim
820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Configuration functions #####
822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to:
824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters
825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim
827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Configures the CAN reception filter according to the specified
832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * parameters in the CAN_FilterInitStruct.
833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that
836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * contains the filter configuration information.
837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterCon
840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
368 .loc 1 840 1 is_stmt 1 view -0
369 .cfi_startproc
370 @ args = 0, pretend = 0, frame = 0
371 @ frame_needed = 0, uses_anonymous_args = 0
372 @ link register save eliminated.
841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t filternbrbitpos;
373 .loc 1 841 3 view .LVU107
842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_TypeDef *can_ip = hcan->Instance;
374 .loc 1 842 3 view .LVU108
375 .loc 1 842 16 is_stmt 0 view .LVU109
376 0000 0268 ldr r2, [r0]
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 24
restructured repo
2024-05-12 14:08:58 +02:00
377 .LVL16:
843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
378 .loc 1 843 3 is_stmt 1 view .LVU110
379 .loc 1 843 24 is_stmt 0 view .LVU111
380 0002 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
381 .LVL17:
844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
382 .loc 1 845 3 is_stmt 1 view .LVU112
383 .loc 1 845 38 is_stmt 0 view .LVU113
384 0006 013B subs r3, r3, #1
385 .LVL18:
386 .loc 1 845 38 view .LVU114
387 0008 DBB2 uxtb r3, r3
388 .loc 1 845 6 view .LVU115
389 000a 012B cmp r3, #1
390 000c 05D9 bls .L50
846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */
849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh));
850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow));
851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh));
852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow));
853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation));
857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* CAN is single instance with 14 dedicated filters banks */
859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */
861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank));
862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialisation mode for the filter */
864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FMR, CAN_FMR_FINIT);
865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Convert filter number into bit position */
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU);
868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Deactivation */
870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FA1R, filternbrbitpos);
871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Scale */
873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)
874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 16-bit scale for the filter */
876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FS1R, filternbrbitpos);
877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* First 16-bit identifier and First 16-bit mask */
879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Or First 16-bit identifier and Second 16-bit identifier */
880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 =
881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) |
882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Second 16-bit identifier and Second 16-bit mask */
885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Or Third 16-bit identifier and Fourth 16-bit identifier */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 25
restructured repo
2024-05-12 14:08:58 +02:00
886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 =
887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh);
889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)
892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit scale for the filter */
894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FS1R, filternbrbitpos);
895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit identifier or First 32-bit identifier */
897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 =
898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) |
899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit mask or Second 32-bit identifier */
902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 =
903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow);
905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Mode */
908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)
909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Id/Mask mode for the filter*/
911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FM1R, filternbrbitpos);
912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Identifier list mode for the filter*/
916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FM1R, filternbrbitpos);
917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter FIFO assignment */
920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)
921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* FIFO 0 assignation for the filter */
923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FFA1R, filternbrbitpos);
924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* FIFO 1 assignation for the filter */
928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FFA1R, filternbrbitpos);
929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter activation */
932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE)
933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FA1R, filternbrbitpos);
935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Leave the initialisation mode for the filter */
938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT);
939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 26
restructured repo
2024-05-12 14:08:58 +02:00
943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
391 .loc 1 946 5 is_stmt 1 view .LVU116
392 .loc 1 946 9 is_stmt 0 view .LVU117
393 000e 436A ldr r3, [r0, #36]
394 .loc 1 946 21 view .LVU118
395 0010 43F48023 orr r3, r3, #262144
396 0014 4362 str r3, [r0, #36]
947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
397 .loc 1 948 5 is_stmt 1 view .LVU119
398 .loc 1 948 12 is_stmt 0 view .LVU120
399 0016 0120 movs r0, #1
400 .LVL19:
949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
401 .loc 1 950 1 view .LVU121
402 0018 7047 bx lr
403 .LVL20:
404 .L50:
840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t filternbrbitpos;
405 .loc 1 840 1 view .LVU122
406 001a 30B4 push {r4, r5}
407 .cfi_def_cfa_offset 8
408 .cfi_offset 4, -8
409 .cfi_offset 5, -4
849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow));
410 .loc 1 849 5 is_stmt 1 view .LVU123
850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh));
411 .loc 1 850 5 view .LVU124
851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow));
412 .loc 1 851 5 view .LVU125
852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
413 .loc 1 852 5 view .LVU126
853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
414 .loc 1 853 5 view .LVU127
854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
415 .loc 1 854 5 view .LVU128
855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation));
416 .loc 1 855 5 view .LVU129
856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
417 .loc 1 856 5 view .LVU130
861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
418 .loc 1 861 5 view .LVU131
864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
419 .loc 1 864 5 view .LVU132
420 001c D2F80032 ldr r3, [r2, #512]
421 0020 43F00103 orr r3, r3, #1
422 0024 C2F80032 str r3, [r2, #512]
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
423 .loc 1 867 5 view .LVU133
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
424 .loc 1 867 52 is_stmt 0 view .LVU134
425 0028 4B69 ldr r3, [r1, #20]
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 27
restructured repo
2024-05-12 14:08:58 +02:00
426 .loc 1 867 65 view .LVU135
427 002a 03F01F03 and r3, r3, #31
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
428 .loc 1 867 21 view .LVU136
429 002e 0120 movs r0, #1
430 .LVL21:
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
431 .loc 1 867 21 view .LVU137
432 0030 00FA03F3 lsl r3, r0, r3
433 .LVL22:
870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
434 .loc 1 870 5 is_stmt 1 view .LVU138
435 0034 D2F81C02 ldr r0, [r2, #540]
436 0038 6FEA030C mvn ip, r3
437 003c 20EA0300 bic r0, r0, r3
438 0040 C2F81C02 str r0, [r2, #540]
873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
439 .loc 1 873 5 view .LVU139
873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
440 .loc 1 873 22 is_stmt 0 view .LVU140
441 0044 C869 ldr r0, [r1, #28]
873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
442 .loc 1 873 8 view .LVU141
443 0046 B0B9 cbnz r0, .L38
876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
444 .loc 1 876 7 is_stmt 1 view .LVU142
445 0048 D2F80C02 ldr r0, [r2, #524]
446 004c 0CEA0000 and r0, ip, r0
447 0050 C2F80C02 str r0, [r2, #524]
880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) |
448 .loc 1 880 7 view .LVU143
882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
449 .loc 1 882 22 is_stmt 0 view .LVU144
450 0054 8C88 ldrh r4, [r1, #4]
880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) |
451 .loc 1 880 44 view .LVU145
452 0056 4869 ldr r0, [r1, #20]
881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
453 .loc 1 881 75 view .LVU146
454 0058 CD68 ldr r5, [r1, #12]
455 005a 44EA0544 orr r4, r4, r5, lsl #16
880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) |
456 .loc 1 880 62 view .LVU147
457 005e 4830 adds r0, r0, #72
458 0060 42F83040 str r4, [r2, r0, lsl #3]
886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
459 .loc 1 886 7 is_stmt 1 view .LVU148
888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
460 .loc 1 888 22 is_stmt 0 view .LVU149
461 0064 0C88 ldrh r4, [r1]
886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
462 .loc 1 886 44 view .LVU150
463 0066 4869 ldr r0, [r1, #20]
887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh);
464 .loc 1 887 76 view .LVU151
465 0068 8D68 ldr r5, [r1, #8]
466 006a 44EA0544 orr r4, r4, r5, lsl #16
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 28
restructured repo
2024-05-12 14:08:58 +02:00
886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
467 .loc 1 886 62 view .LVU152
468 006e 4830 adds r0, r0, #72
469 0070 02EBC000 add r0, r2, r0, lsl #3
470 0074 4460 str r4, [r0, #4]
471 .L38:
891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
472 .loc 1 891 5 is_stmt 1 view .LVU153
891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
473 .loc 1 891 22 is_stmt 0 view .LVU154
474 0076 C869 ldr r0, [r1, #28]
891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
475 .loc 1 891 8 view .LVU155
476 0078 0128 cmp r0, #1
477 007a 1BD0 beq .L51
478 .L39:
908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
479 .loc 1 908 5 is_stmt 1 view .LVU156
908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
480 .loc 1 908 22 is_stmt 0 view .LVU157
481 007c 8869 ldr r0, [r1, #24]
908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
482 .loc 1 908 8 view .LVU158
483 007e 80BB cbnz r0, .L40
911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
484 .loc 1 911 7 is_stmt 1 view .LVU159
485 0080 D2F80402 ldr r0, [r2, #516]
486 0084 0CEA0000 and r0, ip, r0
487 0088 C2F80402 str r0, [r2, #516]
488 .L41:
920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
489 .loc 1 920 5 view .LVU160
920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
490 .loc 1 920 22 is_stmt 0 view .LVU161
491 008c 0869 ldr r0, [r1, #16]
920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
492 .loc 1 920 8 view .LVU162
493 008e 70BB cbnz r0, .L42
923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
494 .loc 1 923 7 is_stmt 1 view .LVU163
495 0090 D2F81402 ldr r0, [r2, #532]
496 0094 0CEA0000 and r0, ip, r0
497 0098 C2F81402 str r0, [r2, #532]
498 .L43:
932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
499 .loc 1 932 5 view .LVU164
932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
500 .loc 1 932 22 is_stmt 0 view .LVU165
501 009c 096A ldr r1, [r1, #32]
502 .LVL23:
932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
503 .loc 1 932 8 view .LVU166
504 009e 0129 cmp r1, #1
505 00a0 2BD0 beq .L52
506 .LVL24:
507 .L44:
938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 29
restructured repo
2024-05-12 14:08:58 +02:00
508 .loc 1 938 5 is_stmt 1 view .LVU167
509 00a2 D2F80032 ldr r3, [r2, #512]
510 00a6 23F00103 bic r3, r3, #1
511 00aa C2F80032 str r3, [r2, #512]
941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
512 .loc 1 941 5 view .LVU168
941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
513 .loc 1 941 12 is_stmt 0 view .LVU169
514 00ae 0020 movs r0, #0
515 .loc 1 950 1 view .LVU170
516 00b0 30BC pop {r4, r5}
517 .cfi_remember_state
518 .cfi_restore 5
519 .cfi_restore 4
520 .cfi_def_cfa_offset 0
521 00b2 7047 bx lr
522 .LVL25:
523 .L51:
524 .cfi_restore_state
894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
525 .loc 1 894 7 is_stmt 1 view .LVU171
526 00b4 D2F80C02 ldr r0, [r2, #524]
527 00b8 1843 orrs r0, r0, r3
528 00ba C2F80C02 str r0, [r2, #524]
897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) |
529 .loc 1 897 7 view .LVU172
899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
530 .loc 1 899 22 is_stmt 0 view .LVU173
531 00be 8C88 ldrh r4, [r1, #4]
897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) |
532 .loc 1 897 44 view .LVU174
533 00c0 4869 ldr r0, [r1, #20]
898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
534 .loc 1 898 72 view .LVU175
535 00c2 0D68 ldr r5, [r1]
536 00c4 44EA0544 orr r4, r4, r5, lsl #16
897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) |
537 .loc 1 897 62 view .LVU176
538 00c8 4830 adds r0, r0, #72
539 00ca 42F83040 str r4, [r2, r0, lsl #3]
902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
540 .loc 1 902 7 is_stmt 1 view .LVU177
904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
541 .loc 1 904 22 is_stmt 0 view .LVU178
542 00ce 8C89 ldrh r4, [r1, #12]
902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
543 .loc 1 902 44 view .LVU179
544 00d0 4869 ldr r0, [r1, #20]
903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow);
545 .loc 1 903 76 view .LVU180
546 00d2 8D68 ldr r5, [r1, #8]
547 00d4 44EA0544 orr r4, r4, r5, lsl #16
902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
548 .loc 1 902 62 view .LVU181
549 00d8 4830 adds r0, r0, #72
550 00da 02EBC000 add r0, r2, r0, lsl #3
551 00de 4460 str r4, [r0, #4]
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 30
restructured repo
2024-05-12 14:08:58 +02:00
552 00e0 CCE7 b .L39
553 .L40:
916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
554 .loc 1 916 7 is_stmt 1 view .LVU182
555 00e2 D2F80402 ldr r0, [r2, #516]
556 00e6 1843 orrs r0, r0, r3
557 00e8 C2F80402 str r0, [r2, #516]
558 00ec CEE7 b .L41
559 .L42:
928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
560 .loc 1 928 7 view .LVU183
561 00ee D2F81402 ldr r0, [r2, #532]
562 00f2 1843 orrs r0, r0, r3
563 00f4 C2F81402 str r0, [r2, #532]
564 00f8 D0E7 b .L43
565 .LVL26:
566 .L52:
934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
567 .loc 1 934 7 view .LVU184
568 00fa D2F81C12 ldr r1, [r2, #540]
569 00fe 0B43 orrs r3, r3, r1
570 .LVL27:
934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
571 .loc 1 934 7 is_stmt 0 view .LVU185
572 0100 C2F81C32 str r3, [r2, #540]
573 0104 CDE7 b .L44
574 .cfi_endproc
575 .LFE134:
577 .section .text.HAL_CAN_Start,"ax",%progbits
578 .align 1
579 .global HAL_CAN_Start
580 .syntax unified
581 .thumb
582 .thumb_func
584 HAL_CAN_Start:
585 .LVL28:
586 .LFB135:
951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @}
954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group3 Control functions
957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Control functions
958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim
960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Control functions #####
962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to:
964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Start : Start the CAN module
965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Stop : Stop the CAN module
966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RequestSleep : Request sleep mode entry.
967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_WakeUp : Wake up from sleep mode.
968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IsSleepActive : Check is sleep mode is active.
969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes
970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and activate the corresponding
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 31
restructured repo
2024-05-12 14:08:58 +02:00
971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmission request
972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_AbortTxRequest : Abort transmission request
973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level
974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is
975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pending on the selected Tx mailbox
976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO
977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level
978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim
980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Start the CAN module.
985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan)
990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
587 .loc 1 990 1 is_stmt 1 view -0
588 .cfi_startproc
589 @ args = 0, pretend = 0, frame = 0
590 @ frame_needed = 0, uses_anonymous_args = 0
591 .loc 1 990 1 is_stmt 0 view .LVU187
592 0000 70B5 push {r4, r5, r6, lr}
593 .cfi_def_cfa_offset 16
594 .cfi_offset 4, -16
595 .cfi_offset 5, -12
596 .cfi_offset 6, -8
597 .cfi_offset 14, -4
598 0002 0446 mov r4, r0
991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart;
599 .loc 1 991 3 is_stmt 1 view .LVU188
992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY)
600 .loc 1 993 3 view .LVU189
601 .loc 1 993 11 is_stmt 0 view .LVU190
602 0004 90F82050 ldrb r5, [r0, #32] @ zero_extendqisi2
603 0008 EDB2 uxtb r5, r5
604 .loc 1 993 6 view .LVU191
605 000a 012D cmp r5, #1
606 000c 06D0 beq .L59
994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN peripheral state */
996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_LISTENING;
997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request leave initialisation */
999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick();
1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait the acknowledge */
1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U)
1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check for the Timeout */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 32
restructured repo
2024-05-12 14:08:58 +02:00
1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */
1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR;
1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN ErrorCode */
1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE;
1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY;
607 .loc 1 1029 5 is_stmt 1 view .LVU192
608 .loc 1 1029 9 is_stmt 0 view .LVU193
609 000e 436A ldr r3, [r0, #36]
610 .loc 1 1029 21 view .LVU194
611 0010 43F40023 orr r3, r3, #524288
612 0014 4362 str r3, [r0, #36]
1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
613 .loc 1 1031 5 is_stmt 1 view .LVU195
614 .loc 1 1031 12 is_stmt 0 view .LVU196
615 0016 0125 movs r5, #1
616 .LVL29:
617 .L56:
1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
618 .loc 1 1033 1 view .LVU197
619 0018 2846 mov r0, r5
620 001a 70BD pop {r4, r5, r6, pc}
621 .LVL30:
622 .L59:
996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
623 .loc 1 996 5 is_stmt 1 view .LVU198
996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
624 .loc 1 996 17 is_stmt 0 view .LVU199
625 001c 0223 movs r3, #2
626 001e 80F82030 strb r3, [r0, #32]
999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
627 .loc 1 999 5 is_stmt 1 view .LVU200
628 0022 0268 ldr r2, [r0]
629 0024 1368 ldr r3, [r2]
630 0026 23F00103 bic r3, r3, #1
631 002a 1360 str r3, [r2]
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
632 .loc 1 1002 5 view .LVU201
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 33
restructured repo
2024-05-12 14:08:58 +02:00
633 .loc 1 1002 17 is_stmt 0 view .LVU202
634 002c FFF7FEFF bl HAL_GetTick
635 .LVL31:
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
636 .loc 1 1002 17 view .LVU203
637 0030 0646 mov r6, r0
638 .LVL32:
1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
639 .loc 1 1005 5 is_stmt 1 view .LVU204
640 .L55:
1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
641 .loc 1 1005 49 view .LVU205
1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
642 .loc 1 1005 17 is_stmt 0 view .LVU206
643 0032 2368 ldr r3, [r4]
1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
644 .loc 1 1005 27 view .LVU207
645 0034 5B68 ldr r3, [r3, #4]
1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
646 .loc 1 1005 49 view .LVU208
647 0036 13F0010F tst r3, #1
648 003a 0CD0 beq .L60
1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
649 .loc 1 1008 7 is_stmt 1 view .LVU209
1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
650 .loc 1 1008 12 is_stmt 0 view .LVU210
651 003c FFF7FEFF bl HAL_GetTick
652 .LVL33:
1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
653 .loc 1 1008 26 view .LVU211
654 0040 831B subs r3, r0, r6
1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
655 .loc 1 1008 10 view .LVU212
656 0042 0A2B cmp r3, #10
657 0044 F5D9 bls .L55
1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
658 .loc 1 1011 9 is_stmt 1 view .LVU213
1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
659 .loc 1 1011 13 is_stmt 0 view .LVU214
660 0046 636A ldr r3, [r4, #36]
1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
661 .loc 1 1011 25 view .LVU215
662 0048 43F40033 orr r3, r3, #131072
663 004c 6362 str r3, [r4, #36]
1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
664 .loc 1 1014 9 is_stmt 1 view .LVU216
1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
665 .loc 1 1014 21 is_stmt 0 view .LVU217
666 004e 0523 movs r3, #5
667 0050 84F82030 strb r3, [r4, #32]
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
668 .loc 1 1016 9 is_stmt 1 view .LVU218
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
669 .loc 1 1016 16 is_stmt 0 view .LVU219
670 0054 E0E7 b .L56
671 .L60:
1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 34
restructured repo
2024-05-12 14:08:58 +02:00
672 .loc 1 1021 5 is_stmt 1 view .LVU220
1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
673 .loc 1 1021 21 is_stmt 0 view .LVU221
674 0056 0025 movs r5, #0
675 0058 6562 str r5, [r4, #36]
1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
676 .loc 1 1024 5 is_stmt 1 view .LVU222
1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
677 .loc 1 1024 12 is_stmt 0 view .LVU223
678 005a DDE7 b .L56
679 .cfi_endproc
680 .LFE135:
682 .section .text.HAL_CAN_Stop,"ax",%progbits
683 .align 1
684 .global HAL_CAN_Stop
685 .syntax unified
686 .thumb
687 .thumb_func
689 HAL_CAN_Stop:
690 .LVL34:
691 .LFB136:
1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Stop the CAN module and enable access to configuration registers.
1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan)
1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
692 .loc 1 1042 1 is_stmt 1 view -0
693 .cfi_startproc
694 @ args = 0, pretend = 0, frame = 0
695 @ frame_needed = 0, uses_anonymous_args = 0
696 .loc 1 1042 1 is_stmt 0 view .LVU225
697 0000 38B5 push {r3, r4, r5, lr}
698 .cfi_def_cfa_offset 16
699 .cfi_offset 3, -16
700 .cfi_offset 4, -12
701 .cfi_offset 5, -8
702 .cfi_offset 14, -4
703 0002 0446 mov r4, r0
1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart;
704 .loc 1 1043 3 is_stmt 1 view .LVU226
1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_LISTENING)
705 .loc 1 1045 3 view .LVU227
706 .loc 1 1045 11 is_stmt 0 view .LVU228
707 0004 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
708 0008 DBB2 uxtb r3, r3
709 .loc 1 1045 6 view .LVU229
710 000a 022B cmp r3, #2
711 000c 05D0 beq .L67
1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request initialisation */
1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 35
restructured repo
2024-05-12 14:08:58 +02:00
1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */
1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick();
1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait the acknowledge */
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U)
1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check for the Timeout */
1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */
1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR;
1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exit from sleep mode */
1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN peripheral state */
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY;
1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED;
712 .loc 1 1081 5 is_stmt 1 view .LVU230
713 .loc 1 1081 9 is_stmt 0 view .LVU231
714 000e 436A ldr r3, [r0, #36]
715 .loc 1 1081 21 view .LVU232
716 0010 43F48013 orr r3, r3, #1048576
717 0014 4362 str r3, [r0, #36]
1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
718 .loc 1 1083 5 is_stmt 1 view .LVU233
719 .loc 1 1083 12 is_stmt 0 view .LVU234
720 0016 0120 movs r0, #1
721 .LVL35:
722 .L64:
1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
723 .loc 1 1085 1 view .LVU235
724 0018 38BD pop {r3, r4, r5, pc}
725 .LVL36:
726 .L67:
1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
727 .loc 1 1048 5 is_stmt 1 view .LVU236
728 001a 0268 ldr r2, [r0]
729 001c 1368 ldr r3, [r2]
730 001e 43F00103 orr r3, r3, #1
731 0022 1360 str r3, [r2]
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 36
restructured repo
2024-05-12 14:08:58 +02:00
1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
732 .loc 1 1051 5 view .LVU237
1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
733 .loc 1 1051 17 is_stmt 0 view .LVU238
734 0024 FFF7FEFF bl HAL_GetTick
735 .LVL37:
1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
736 .loc 1 1051 17 view .LVU239
737 0028 0546 mov r5, r0
738 .LVL38:
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
739 .loc 1 1054 5 is_stmt 1 view .LVU240
740 .L63:
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
741 .loc 1 1054 49 view .LVU241
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
742 .loc 1 1054 17 is_stmt 0 view .LVU242
743 002a 2368 ldr r3, [r4]
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
744 .loc 1 1054 27 view .LVU243
745 002c 5A68 ldr r2, [r3, #4]
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
746 .loc 1 1054 49 view .LVU244
747 002e 12F0010F tst r2, #1
748 0032 0DD1 bne .L68
1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
749 .loc 1 1057 7 is_stmt 1 view .LVU245
1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
750 .loc 1 1057 12 is_stmt 0 view .LVU246
751 0034 FFF7FEFF bl HAL_GetTick
752 .LVL39:
1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
753 .loc 1 1057 26 view .LVU247
754 0038 431B subs r3, r0, r5
1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
755 .loc 1 1057 10 view .LVU248
756 003a 0A2B cmp r3, #10
757 003c F5D9 bls .L63
1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
758 .loc 1 1060 9 is_stmt 1 view .LVU249
1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
759 .loc 1 1060 13 is_stmt 0 view .LVU250
760 003e 636A ldr r3, [r4, #36]
1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
761 .loc 1 1060 25 view .LVU251
762 0040 43F40033 orr r3, r3, #131072
763 0044 6362 str r3, [r4, #36]
1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
764 .loc 1 1063 9 is_stmt 1 view .LVU252
1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
765 .loc 1 1063 21 is_stmt 0 view .LVU253
766 0046 0523 movs r3, #5
767 0048 84F82030 strb r3, [r4, #32]
1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
768 .loc 1 1065 9 is_stmt 1 view .LVU254
1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
769 .loc 1 1065 16 is_stmt 0 view .LVU255
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 37
restructured repo
2024-05-12 14:08:58 +02:00
770 004c 0120 movs r0, #1
771 004e E3E7 b .L64
772 .L68:
1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
773 .loc 1 1070 5 is_stmt 1 view .LVU256
774 0050 1A68 ldr r2, [r3]
775 0052 22F00202 bic r2, r2, #2
776 0056 1A60 str r2, [r3]
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
777 .loc 1 1073 5 view .LVU257
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
778 .loc 1 1073 17 is_stmt 0 view .LVU258
779 0058 0123 movs r3, #1
780 005a 84F82030 strb r3, [r4, #32]
1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
781 .loc 1 1076 5 is_stmt 1 view .LVU259
1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
782 .loc 1 1076 12 is_stmt 0 view .LVU260
783 005e 0020 movs r0, #0
784 0060 DAE7 b .L64
785 .cfi_endproc
786 .LFE136:
788 .section .text.HAL_CAN_DeInit,"ax",%progbits
789 .align 1
790 .global HAL_CAN_DeInit
791 .syntax unified
792 .thumb
793 .thumb_func
795 HAL_CAN_DeInit:
796 .LVL40:
797 .LFB131:
460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */
798 .loc 1 460 1 is_stmt 1 view -0
799 .cfi_startproc
800 @ args = 0, pretend = 0, frame = 0
801 @ frame_needed = 0, uses_anonymous_args = 0
462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
802 .loc 1 462 3 view .LVU262
462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
803 .loc 1 462 6 is_stmt 0 view .LVU263
804 0000 80B1 cbz r0, .L71
460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */
805 .loc 1 460 1 view .LVU264
806 0002 10B5 push {r4, lr}
807 .cfi_def_cfa_offset 8
808 .cfi_offset 4, -8
809 .cfi_offset 14, -4
810 0004 0446 mov r4, r0
468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
811 .loc 1 468 3 is_stmt 1 view .LVU265
471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
812 .loc 1 471 3 view .LVU266
471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
813 .loc 1 471 9 is_stmt 0 view .LVU267
814 0006 FFF7FEFF bl HAL_CAN_Stop
815 .LVL41:
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 38
restructured repo
2024-05-12 14:08:58 +02:00
816 .loc 1 484 3 is_stmt 1 view .LVU268
817 000a 2046 mov r0, r4
818 000c FFF7FEFF bl HAL_CAN_MspDeInit
819 .LVL42:
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
820 .loc 1 488 3 view .LVU269
821 0010 2268 ldr r2, [r4]
822 0012 1368 ldr r3, [r2]
823 0014 43F40043 orr r3, r3, #32768
824 0018 1360 str r3, [r2]
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
825 .loc 1 491 3 view .LVU270
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
826 .loc 1 491 19 is_stmt 0 view .LVU271
827 001a 0020 movs r0, #0
828 001c 6062 str r0, [r4, #36]
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
829 .loc 1 494 3 is_stmt 1 view .LVU272
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
830 .loc 1 494 15 is_stmt 0 view .LVU273
831 001e 84F82000 strb r0, [r4, #32]
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
832 .loc 1 497 3 is_stmt 1 view .LVU274
498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
833 .loc 1 498 1 is_stmt 0 view .LVU275
834 0022 10BD pop {r4, pc}
835 .LVL43:
836 .L71:
837 .cfi_def_cfa_offset 0
838 .cfi_restore 4
839 .cfi_restore 14
464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
840 .loc 1 464 12 view .LVU276
841 0024 0120 movs r0, #1
842 .LVL44:
498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
843 .loc 1 498 1 view .LVU277
844 0026 7047 bx lr
845 .cfi_endproc
846 .LFE131:
848 .section .text.HAL_CAN_RequestSleep,"ax",%progbits
849 .align 1
850 .global HAL_CAN_RequestSleep
851 .syntax unified
852 .thumb
853 .thumb_func
855 HAL_CAN_RequestSleep:
856 .LVL45:
857 .LFB137:
1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Request the sleep mode (low power) entry.
1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * When returning from this function, Sleep mode will be entered
1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * as soon as the current CAN activity (transmission or reception
1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * of a CAN frame) has been completed.
1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 39
restructured repo
2024-05-12 14:08:58 +02:00
1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status.
1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan)
1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
858 .loc 1 1097 1 is_stmt 1 view -0
859 .cfi_startproc
860 @ args = 0, pretend = 0, frame = 0
861 @ frame_needed = 0, uses_anonymous_args = 0
862 @ link register save eliminated.
1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
863 .loc 1 1098 3 view .LVU279
864 .loc 1 1098 24 is_stmt 0 view .LVU280
865 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
866 .LVL46:
1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
867 .loc 1 1100 3 is_stmt 1 view .LVU281
868 .loc 1 1100 38 is_stmt 0 view .LVU282
869 0004 013B subs r3, r3, #1
870 .LVL47:
871 .loc 1 1100 38 view .LVU283
872 0006 DBB2 uxtb r3, r3
873 .loc 1 1100 6 view .LVU284
874 0008 012B cmp r3, #1
875 000a 05D9 bls .L79
1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request Sleep mode */
1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
876 .loc 1 1112 5 is_stmt 1 view .LVU285
877 .loc 1 1112 9 is_stmt 0 view .LVU286
878 000c 436A ldr r3, [r0, #36]
879 .loc 1 1112 21 view .LVU287
880 000e 43F48023 orr r3, r3, #262144
881 0012 4362 str r3, [r0, #36]
1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
882 .loc 1 1115 5 is_stmt 1 view .LVU288
883 .loc 1 1115 12 is_stmt 0 view .LVU289
884 0014 0120 movs r0, #1
885 .LVL48:
1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
886 .loc 1 1117 1 view .LVU290
887 0016 7047 bx lr
888 .LVL49:
889 .L79:
1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 40
restructured repo
2024-05-12 14:08:58 +02:00
890 .loc 1 1104 5 is_stmt 1 view .LVU291
891 0018 0268 ldr r2, [r0]
892 001a 1368 ldr r3, [r2]
893 001c 43F00203 orr r3, r3, #2
894 0020 1360 str r3, [r2]
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
895 .loc 1 1107 5 view .LVU292
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
896 .loc 1 1107 12 is_stmt 0 view .LVU293
897 0022 0020 movs r0, #0
898 .LVL50:
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
899 .loc 1 1107 12 view .LVU294
900 0024 7047 bx lr
901 .cfi_endproc
902 .LFE137:
904 .section .text.HAL_CAN_WakeUp,"ax",%progbits
905 .align 1
906 .global HAL_CAN_WakeUp
907 .syntax unified
908 .thumb
909 .thumb_func
911 HAL_CAN_WakeUp:
912 .LVL51:
913 .LFB138:
1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Wake up from sleep mode.
1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * When returning with HAL_OK status from this function, Sleep mode
1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * is exited.
1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status.
1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
914 .loc 1 1128 1 is_stmt 1 view -0
915 .cfi_startproc
916 @ args = 0, pretend = 0, frame = 8
917 @ frame_needed = 0, uses_anonymous_args = 0
918 @ link register save eliminated.
919 .loc 1 1128 1 is_stmt 0 view .LVU296
920 0000 82B0 sub sp, sp, #8
921 .cfi_def_cfa_offset 8
1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __IO uint32_t count = 0;
922 .loc 1 1129 3 is_stmt 1 view .LVU297
923 .loc 1 1129 17 is_stmt 0 view .LVU298
924 0002 0023 movs r3, #0
925 0004 0193 str r3, [sp, #4]
1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t timeout = 1000000U;
926 .loc 1 1130 3 is_stmt 1 view .LVU299
927 .LVL52:
1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
928 .loc 1 1131 3 view .LVU300
929 .loc 1 1131 24 is_stmt 0 view .LVU301
930 0006 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
931 .LVL53:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 41
restructured repo
2024-05-12 14:08:58 +02:00
1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
932 .loc 1 1133 3 is_stmt 1 view .LVU302
933 .loc 1 1133 38 is_stmt 0 view .LVU303
934 000a 013B subs r3, r3, #1
935 .LVL54:
936 .loc 1 1133 38 view .LVU304
937 000c DBB2 uxtb r3, r3
938 .loc 1 1133 6 view .LVU305
939 000e 012B cmp r3, #1
940 0010 18D8 bhi .L81
1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wake up request */
1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
941 .loc 1 1137 5 is_stmt 1 view .LVU306
942 0012 0268 ldr r2, [r0]
943 0014 1368 ldr r3, [r2]
944 0016 23F00203 bic r3, r3, #2
945 001a 1360 str r3, [r2]
946 .L84:
1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait sleep mode is exited */
1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** do
947 .loc 1 1140 5 view .LVU307
1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Increment counter */
1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** count++;
948 .loc 1 1143 7 view .LVU308
949 .loc 1 1143 12 is_stmt 0 view .LVU309
950 001c 019B ldr r3, [sp, #4]
951 001e 0133 adds r3, r3, #1
952 0020 0193 str r3, [sp, #4]
1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if timeout is reached */
1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (count > timeout)
953 .loc 1 1146 7 is_stmt 1 view .LVU310
954 .loc 1 1146 17 is_stmt 0 view .LVU311
955 0022 019A ldr r2, [sp, #4]
956 .loc 1 1146 10 view .LVU312
957 0024 0B4B ldr r3, .L87
958 0026 9A42 cmp r2, r3
959 0028 06D8 bhi .L86
1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U);
960 .loc 1 1154 49 is_stmt 1 view .LVU313
961 .loc 1 1154 17 is_stmt 0 view .LVU314
962 002a 0368 ldr r3, [r0]
963 .loc 1 1154 27 view .LVU315
964 002c 5B68 ldr r3, [r3, #4]
965 .loc 1 1154 49 view .LVU316
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 42
restructured repo
2024-05-12 14:08:58 +02:00
966 002e 13F0020F tst r3, #2
967 0032 F3D1 bne .L84
1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
968 .loc 1 1157 12 view .LVU317
969 0034 0020 movs r0, #0
970 .LVL55:
971 .loc 1 1157 12 view .LVU318
972 0036 0AE0 b .L83
973 .LVL56:
974 .L86:
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
975 .loc 1 1149 9 is_stmt 1 view .LVU319
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
976 .loc 1 1149 13 is_stmt 0 view .LVU320
977 0038 436A ldr r3, [r0, #36]
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
978 .loc 1 1149 25 view .LVU321
979 003a 43F40033 orr r3, r3, #131072
980 003e 4362 str r3, [r0, #36]
1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
981 .loc 1 1151 9 is_stmt 1 view .LVU322
1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
982 .loc 1 1151 16 is_stmt 0 view .LVU323
983 0040 0120 movs r0, #1
984 .LVL57:
1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
985 .loc 1 1151 16 view .LVU324
986 0042 04E0 b .L83
987 .LVL58:
988 .L81:
1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
989 .loc 1 1162 5 is_stmt 1 view .LVU325
990 .loc 1 1162 9 is_stmt 0 view .LVU326
991 0044 436A ldr r3, [r0, #36]
992 .loc 1 1162 21 view .LVU327
993 0046 43F48023 orr r3, r3, #262144
994 004a 4362 str r3, [r0, #36]
1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
995 .loc 1 1164 5 is_stmt 1 view .LVU328
996 .loc 1 1164 12 is_stmt 0 view .LVU329
997 004c 0120 movs r0, #1
998 .LVL59:
999 .L83:
1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1000 .loc 1 1166 1 view .LVU330
1001 004e 02B0 add sp, sp, #8
1002 .cfi_def_cfa_offset 0
1003 @ sp needed
1004 0050 7047 bx lr
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 43
restructured repo
2024-05-12 14:08:58 +02:00
1005 .L88:
1006 0052 00BF .align 2
1007 .L87:
1008 0054 40420F00 .word 1000000
1009 .cfi_endproc
1010 .LFE138:
1012 .section .text.HAL_CAN_IsSleepActive,"ax",%progbits
1013 .align 1
1014 .global HAL_CAN_IsSleepActive
1015 .syntax unified
1016 .thumb
1017 .thumb_func
1019 HAL_CAN_IsSleepActive:
1020 .LVL60:
1021 .LFB139:
1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Check is sleep mode is active.
1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Status
1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 0 : Sleep mode is not active.
1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 1 : Sleep mode is active.
1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan)
1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1022 .loc 1 1177 1 is_stmt 1 view -0
1023 .cfi_startproc
1024 @ args = 0, pretend = 0, frame = 0
1025 @ frame_needed = 0, uses_anonymous_args = 0
1026 @ link register save eliminated.
1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t status = 0U;
1027 .loc 1 1178 3 view .LVU332
1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1028 .loc 1 1179 3 view .LVU333
1029 .loc 1 1179 24 is_stmt 0 view .LVU334
1030 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
1031 .LVL61:
1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1032 .loc 1 1181 3 is_stmt 1 view .LVU335
1033 .loc 1 1181 38 is_stmt 0 view .LVU336
1034 0004 013B subs r3, r3, #1
1035 .LVL62:
1036 .loc 1 1181 38 view .LVU337
1037 0006 DBB2 uxtb r3, r3
1038 .loc 1 1181 6 view .LVU338
1039 0008 012B cmp r3, #1
1040 000a 01D9 bls .L93
1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1041 .loc 1 1178 12 view .LVU339
1042 000c 0020 movs r0, #0
1043 .LVL63:
1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1044 .loc 1 1178 12 view .LVU340
1045 000e 7047 bx lr
1046 .LVL64:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 44
restructured repo
2024-05-12 14:08:58 +02:00
1047 .L93:
1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Sleep mode */
1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
1048 .loc 1 1185 5 is_stmt 1 view .LVU341
1049 .loc 1 1185 14 is_stmt 0 view .LVU342
1050 0010 0368 ldr r3, [r0]
1051 .loc 1 1185 24 view .LVU343
1052 0012 5868 ldr r0, [r3, #4]
1053 .LVL65:
1054 .loc 1 1185 8 view .LVU344
1055 0014 10F00200 ands r0, r0, #2
1056 0018 00D1 bne .L92
1057 001a 7047 bx lr
1058 .L92:
1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = 1U;
1059 .loc 1 1187 14 view .LVU345
1060 001c 0120 movs r0, #1
1061 .LVL66:
1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status;
1062 .loc 1 1192 3 is_stmt 1 view .LVU346
1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1063 .loc 1 1193 1 is_stmt 0 view .LVU347
1064 001e 7047 bx lr
1065 .cfi_endproc
1066 .LFE139:
1068 .section .text.HAL_CAN_AddTxMessage,"ax",%progbits
1069 .align 1
1070 .global HAL_CAN_AddTxMessage
1071 .syntax unified
1072 .thumb
1073 .thumb_func
1075 HAL_CAN_AddTxMessage:
1076 .LVL67:
1077 .LFB140:
1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Add a message to the first free Tx mailbox and activate the
1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * corresponding transmission request.
1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pHeader pointer to a CAN_TxHeaderTypeDef structure.
1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param aData array containing the payload of the Tx frame.
1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pTxMailbox pointer to a variable where the function will return
1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the TxMailbox used to store the Tx message.
1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_Tx_Mailboxes.
1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader,
1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** const uint8_t aData[], uint32_t *pTxMailbox)
1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 45
restructured repo
2024-05-12 14:08:58 +02:00
1078 .loc 1 1209 1 is_stmt 1 view -0
1079 .cfi_startproc
1080 @ args = 0, pretend = 0, frame = 0
1081 @ frame_needed = 0, uses_anonymous_args = 0
1082 .loc 1 1209 1 is_stmt 0 view .LVU349
1083 0000 30B5 push {r4, r5, lr}
1084 .cfi_def_cfa_offset 12
1085 .cfi_offset 4, -12
1086 .cfi_offset 5, -8
1087 .cfi_offset 14, -4
1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t transmitmailbox;
1088 .loc 1 1210 3 is_stmt 1 view .LVU350
1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1089 .loc 1 1211 3 view .LVU351
1090 .loc 1 1211 24 is_stmt 0 view .LVU352
1091 0002 90F820C0 ldrb ip, [r0, #32] @ zero_extendqisi2
1092 .LVL68:
1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsr = READ_REG(hcan->Instance->TSR);
1093 .loc 1 1212 3 is_stmt 1 view .LVU353
1094 .loc 1 1212 12 is_stmt 0 view .LVU354
1095 0006 0468 ldr r4, [r0]
1096 0008 A468 ldr r4, [r4, #8]
1097 .LVL69:
1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */
1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IDTYPE(pHeader->IDE));
1098 .loc 1 1215 3 is_stmt 1 view .LVU355
1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RTR(pHeader->RTR));
1099 .loc 1 1216 3 view .LVU356
1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_DLC(pHeader->DLC));
1100 .loc 1 1217 3 view .LVU357
1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD)
1101 .loc 1 1218 3 view .LVU358
1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_STDID(pHeader->StdId));
1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_EXTID(pHeader->ExtId));
1102 .loc 1 1224 5 view .LVU359
1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime));
1103 .loc 1 1226 3 view .LVU360
1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1104 .loc 1 1228 3 view .LVU361
1105 .loc 1 1228 38 is_stmt 0 view .LVU362
1106 000a 0CF1FF3C add ip, ip, #-1
1107 .LVL70:
1108 .loc 1 1228 38 view .LVU363
1109 000e 5FFA8CFC uxtb ip, ip
1110 .loc 1 1228 6 view .LVU364
1111 0012 BCF1010F cmp ip, #1
1112 0016 62D8 bhi .L95
1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that all the Tx mailboxes are not full */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 46
restructured repo
2024-05-12 14:08:58 +02:00
1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((tsr & CAN_TSR_TME0) != 0U) ||
1113 .loc 1 1232 5 is_stmt 1 view .LVU365
1114 .loc 1 1232 8 is_stmt 0 view .LVU366
1115 0018 14F0E05F tst r4, #469762048
1116 001c 59D0 beq .L96
1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) ||
1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((tsr & CAN_TSR_TME2) != 0U))
1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Select an empty transmit mailbox */
1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos;
1117 .loc 1 1237 7 is_stmt 1 view .LVU367
1118 .loc 1 1237 23 is_stmt 0 view .LVU368
1119 001e C4F3016C ubfx ip, r4, #24, #2
1120 .LVL71:
1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Store the Tx mailbox */
1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *pTxMailbox = (uint32_t)1 << transmitmailbox;
1121 .loc 1 1240 7 is_stmt 1 view .LVU369
1122 .loc 1 1240 33 is_stmt 0 view .LVU370
1123 0022 0124 movs r4, #1
1124 .LVL72:
1125 .loc 1 1240 33 view .LVU371
1126 0024 04FA0CF4 lsl r4, r4, ip
1127 .loc 1 1240 19 view .LVU372
1128 0028 1C60 str r4, [r3]
1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the Id */
1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD)
1129 .loc 1 1243 7 is_stmt 1 view .LVU373
1130 .loc 1 1243 18 is_stmt 0 view .LVU374
1131 002a 8B68 ldr r3, [r1, #8]
1132 .LVL73:
1133 .loc 1 1243 10 view .LVU375
1134 002c 002B cmp r3, #0
1135 002e 3DD1 bne .L97
1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) |
1136 .loc 1 1245 9 is_stmt 1 view .LVU376
1137 .loc 1 1245 68 is_stmt 0 view .LVU377
1138 0030 0D68 ldr r5, [r1]
1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR);
1139 .loc 1 1246 67 view .LVU378
1140 0032 CB68 ldr r3, [r1, #12]
1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR);
1141 .loc 1 1245 13 view .LVU379
1142 0034 0468 ldr r4, [r0]
1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR);
1143 .loc 1 1245 98 view .LVU380
1144 0036 43EA4555 orr r5, r3, r5, lsl #21
1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR);
1145 .loc 1 1245 57 view .LVU381
1146 003a 0CF11803 add r3, ip, #24
1147 003e 1B01 lsls r3, r3, #4
1148 0040 E550 str r5, [r4, r3]
1149 .L98:
1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 47
restructured repo
2024-05-12 14:08:58 +02:00
1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE |
1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR);
1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the DLC */
1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC);
1150 .loc 1 1256 7 is_stmt 1 view .LVU382
1151 .loc 1 1256 11 is_stmt 0 view .LVU383
1152 0042 0368 ldr r3, [r0]
1153 .loc 1 1256 66 view .LVU384
1154 0044 0C69 ldr r4, [r1, #16]
1155 .loc 1 1256 56 view .LVU385
1156 0046 0CF1180E add lr, ip, #24
1157 004a 03EB0E13 add r3, r3, lr, lsl #4
1158 004e 5C60 str r4, [r3, #4]
1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the Transmit Global Time mode */
1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->TransmitGlobalTime == ENABLE)
1159 .loc 1 1259 7 is_stmt 1 view .LVU386
1160 .loc 1 1259 18 is_stmt 0 view .LVU387
1161 0050 0B7D ldrb r3, [r1, #20] @ zero_extendqisi2
1162 .loc 1 1259 10 view .LVU388
1163 0052 012B cmp r3, #1
1164 0054 35D0 beq .L102
1165 .LVL74:
1166 .L99:
1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT);
1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the data field */
1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR,
1167 .loc 1 1265 7 is_stmt 1 view .LVU389
1168 0056 D179 ldrb r1, [r2, #7] @ zero_extendqisi2
1169 0058 9379 ldrb r3, [r2, #6] @ zero_extendqisi2
1170 005a 1B04 lsls r3, r3, #16
1171 005c 43EA0163 orr r3, r3, r1, lsl #24
1172 0060 5179 ldrb r1, [r2, #5] @ zero_extendqisi2
1173 0062 43EA0123 orr r3, r3, r1, lsl #8
1174 0066 1479 ldrb r4, [r2, #4] @ zero_extendqisi2
1175 0068 0168 ldr r1, [r0]
1176 006a 2343 orrs r3, r3, r4
1177 006c 01EB0C11 add r1, r1, ip, lsl #4
1178 0070 C1F88C31 str r3, [r1, #396]
1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) |
1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) |
1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) |
1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos));
1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR,
1179 .loc 1 1270 7 view .LVU390
1180 0074 D178 ldrb r1, [r2, #3] @ zero_extendqisi2
1181 0076 9378 ldrb r3, [r2, #2] @ zero_extendqisi2
1182 0078 1B04 lsls r3, r3, #16
1183 007a 43EA0163 orr r3, r3, r1, lsl #24
1184 007e 5178 ldrb r1, [r2, #1] @ zero_extendqisi2
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 48
restructured repo
2024-05-12 14:08:58 +02:00
1185 0080 43EA0123 orr r3, r3, r1, lsl #8
1186 0084 1178 ldrb r1, [r2] @ zero_extendqisi2
1187 0086 0268 ldr r2, [r0]
1188 .LVL75:
1189 .loc 1 1270 7 is_stmt 0 view .LVU391
1190 0088 0B43 orrs r3, r3, r1
1191 008a 02EB0C12 add r2, r2, ip, lsl #4
1192 008e C2F88831 str r3, [r2, #392]
1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) |
1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) |
1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) |
1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos));
1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request transmission */
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ);
1193 .loc 1 1277 7 is_stmt 1 view .LVU392
1194 0092 0268 ldr r2, [r0]
1195 0094 0CF1180C add ip, ip, #24
1196 .LVL76:
1197 .loc 1 1277 7 is_stmt 0 view .LVU393
1198 0098 4FEA0C1C lsl ip, ip, #4
1199 009c 52F80C30 ldr r3, [r2, ip]
1200 00a0 43F00103 orr r3, r3, #1
1201 00a4 42F80C30 str r3, [r2, ip]
1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
1202 .loc 1 1280 7 is_stmt 1 view .LVU394
1203 .loc 1 1280 14 is_stmt 0 view .LVU395
1204 00a8 0020 movs r0, #0
1205 .LVL77:
1206 .loc 1 1280 14 view .LVU396
1207 00aa 1DE0 b .L100
1208 .LVL78:
1209 .L97:
1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE |
1210 .loc 1 1250 9 is_stmt 1 view .LVU397
1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE |
1211 .loc 1 1250 68 is_stmt 0 view .LVU398
1212 00ac 4C68 ldr r4, [r1, #4]
1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE |
1213 .loc 1 1250 98 view .LVU399
1214 00ae 43EAC403 orr r3, r3, r4, lsl #3
1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1215 .loc 1 1252 67 view .LVU400
1216 00b2 CC68 ldr r4, [r1, #12]
1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR);
1217 .loc 1 1251 73 view .LVU401
1218 00b4 2343 orrs r3, r3, r4
1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE |
1219 .loc 1 1250 57 view .LVU402
1220 00b6 0CF11804 add r4, ip, #24
1221 00ba 2401 lsls r4, r4, #4
1222 00bc 0568 ldr r5, [r0]
1223 00be 2B51 str r3, [r5, r4]
1224 00c0 BFE7 b .L98
1225 .L102:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 49
restructured repo
2024-05-12 14:08:58 +02:00
1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1226 .loc 1 1261 9 is_stmt 1 view .LVU403
1227 00c2 0368 ldr r3, [r0]
1228 00c4 03EB0E13 add r3, r3, lr, lsl #4
1229 00c8 5968 ldr r1, [r3, #4]
1230 .LVL79:
1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1231 .loc 1 1261 9 is_stmt 0 view .LVU404
1232 00ca 41F48071 orr r1, r1, #256
1233 00ce 5960 str r1, [r3, #4]
1234 00d0 C1E7 b .L99
1235 .LVL80:
1236 .L96:
1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
1237 .loc 1 1285 7 is_stmt 1 view .LVU405
1238 .loc 1 1285 11 is_stmt 0 view .LVU406
1239 00d2 436A ldr r3, [r0, #36]
1240 .LVL81:
1241 .loc 1 1285 23 view .LVU407
1242 00d4 43F40013 orr r3, r3, #2097152
1243 00d8 4362 str r3, [r0, #36]
1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1244 .loc 1 1287 7 is_stmt 1 view .LVU408
1245 .loc 1 1287 14 is_stmt 0 view .LVU409
1246 00da 0120 movs r0, #1
1247 .LVL82:
1248 .loc 1 1287 14 view .LVU410
1249 00dc 04E0 b .L100
1250 .LVL83:
1251 .L95:
1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
1252 .loc 1 1293 5 is_stmt 1 view .LVU411
1253 .loc 1 1293 9 is_stmt 0 view .LVU412
1254 00de 436A ldr r3, [r0, #36]
1255 .LVL84:
1256 .loc 1 1293 21 view .LVU413
1257 00e0 43F48023 orr r3, r3, #262144
1258 00e4 4362 str r3, [r0, #36]
1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1259 .loc 1 1295 5 is_stmt 1 view .LVU414
1260 .loc 1 1295 12 is_stmt 0 view .LVU415
1261 00e6 0120 movs r0, #1
1262 .LVL85:
1263 .L100:
1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 50
restructured repo
2024-05-12 14:08:58 +02:00
1264 .loc 1 1297 1 view .LVU416
1265 00e8 30BD pop {r4, r5, pc}
1266 .cfi_endproc
1267 .LFE140:
1269 .section .text.HAL_CAN_AbortTxRequest,"ax",%progbits
1270 .align 1
1271 .global HAL_CAN_AbortTxRequest
1272 .syntax unified
1273 .thumb
1274 .thumb_func
1276 HAL_CAN_AbortTxRequest:
1277 .LVL86:
1278 .LFB141:
1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Abort transmission requests
1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailboxes List of the Tx Mailboxes to abort.
1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes.
1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes)
1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1279 .loc 1 1308 1 is_stmt 1 view -0
1280 .cfi_startproc
1281 @ args = 0, pretend = 0, frame = 0
1282 @ frame_needed = 0, uses_anonymous_args = 0
1283 @ link register save eliminated.
1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1284 .loc 1 1309 3 view .LVU418
1285 .loc 1 1309 24 is_stmt 0 view .LVU419
1286 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
1287 .LVL87:
1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */
1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes));
1288 .loc 1 1312 3 is_stmt 1 view .LVU420
1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1289 .loc 1 1314 3 view .LVU421
1290 .loc 1 1314 38 is_stmt 0 view .LVU422
1291 0004 013B subs r3, r3, #1
1292 .LVL88:
1293 .loc 1 1314 38 view .LVU423
1294 0006 DBB2 uxtb r3, r3
1295 .loc 1 1314 6 view .LVU424
1296 0008 012B cmp r3, #1
1297 000a 05D9 bls .L109
1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 0 */
1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U)
1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 0 */
1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0);
1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 51
restructured repo
2024-05-12 14:08:58 +02:00
1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 1 */
1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U)
1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 1 */
1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1);
1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 2 */
1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U)
1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 2 */
1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2);
1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
1298 .loc 1 1344 5 is_stmt 1 view .LVU425
1299 .loc 1 1344 9 is_stmt 0 view .LVU426
1300 000c 436A ldr r3, [r0, #36]
1301 .loc 1 1344 21 view .LVU427
1302 000e 43F48023 orr r3, r3, #262144
1303 0012 4362 str r3, [r0, #36]
1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1304 .loc 1 1346 5 is_stmt 1 view .LVU428
1305 .loc 1 1346 12 is_stmt 0 view .LVU429
1306 0014 0120 movs r0, #1
1307 .LVL89:
1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1308 .loc 1 1348 1 view .LVU430
1309 0016 7047 bx lr
1310 .LVL90:
1311 .L109:
1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1312 .loc 1 1318 5 is_stmt 1 view .LVU431
1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1313 .loc 1 1318 8 is_stmt 0 view .LVU432
1314 0018 11F0010F tst r1, #1
1315 001c 04D0 beq .L105
1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1316 .loc 1 1321 7 is_stmt 1 view .LVU433
1317 001e 0268 ldr r2, [r0]
1318 0020 9368 ldr r3, [r2, #8]
1319 0022 43F08003 orr r3, r3, #128
1320 0026 9360 str r3, [r2, #8]
1321 .L105:
1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1322 .loc 1 1325 5 view .LVU434
1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1323 .loc 1 1325 8 is_stmt 0 view .LVU435
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 52
restructured repo
2024-05-12 14:08:58 +02:00
1324 0028 11F0020F tst r1, #2
1325 002c 04D0 beq .L106
1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1326 .loc 1 1328 7 is_stmt 1 view .LVU436
1327 002e 0268 ldr r2, [r0]
1328 0030 9368 ldr r3, [r2, #8]
1329 0032 43F40043 orr r3, r3, #32768
1330 0036 9360 str r3, [r2, #8]
1331 .L106:
1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1332 .loc 1 1332 5 view .LVU437
1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1333 .loc 1 1332 8 is_stmt 0 view .LVU438
1334 0038 11F0040F tst r1, #4
1335 003c 04D0 beq .L107
1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1336 .loc 1 1335 7 is_stmt 1 view .LVU439
1337 003e 0268 ldr r2, [r0]
1338 0040 9368 ldr r3, [r2, #8]
1339 0042 43F40003 orr r3, r3, #8388608
1340 0046 9360 str r3, [r2, #8]
1341 .L107:
1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1342 .loc 1 1339 5 view .LVU440
1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1343 .loc 1 1339 12 is_stmt 0 view .LVU441
1344 0048 0020 movs r0, #0
1345 .LVL91:
1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1346 .loc 1 1339 12 view .LVU442
1347 004a 7047 bx lr
1348 .cfi_endproc
1349 .LFE141:
1351 .section .text.HAL_CAN_GetTxMailboxesFreeLevel,"ax",%progbits
1352 .align 1
1353 .global HAL_CAN_GetTxMailboxesFreeLevel
1354 .syntax unified
1355 .thumb
1356 .thumb_func
1358 HAL_CAN_GetTxMailboxesFreeLevel:
1359 .LVL92:
1360 .LFB142:
1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes.
1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Number of free Tx Mailboxes.
1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan)
1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1361 .loc 1 1357 1 is_stmt 1 view -0
1362 .cfi_startproc
1363 @ args = 0, pretend = 0, frame = 0
1364 @ frame_needed = 0, uses_anonymous_args = 0
1365 @ link register save eliminated.
1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t freelevel = 0U;
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 53
restructured repo
2024-05-12 14:08:58 +02:00
1366 .loc 1 1358 3 view .LVU444
1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1367 .loc 1 1359 3 view .LVU445
1368 .loc 1 1359 24 is_stmt 0 view .LVU446
1369 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
1370 .LVL93:
1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1371 .loc 1 1361 3 is_stmt 1 view .LVU447
1372 .loc 1 1361 38 is_stmt 0 view .LVU448
1373 0004 013B subs r3, r3, #1
1374 .LVL94:
1375 .loc 1 1361 38 view .LVU449
1376 0006 DBB2 uxtb r3, r3
1377 .loc 1 1361 6 view .LVU450
1378 0008 012B cmp r3, #1
1379 000a 01D9 bls .L116
1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1380 .loc 1 1358 12 view .LVU451
1381 000c 0020 movs r0, #0
1382 .LVL95:
1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 0 status */
1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U)
1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++;
1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 1 status */
1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U)
1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++;
1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 2 status */
1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U)
1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++;
1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return Tx Mailboxes free level */
1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return freelevel;
1383 .loc 1 1384 3 is_stmt 1 view .LVU452
1384 .L110:
1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1385 .loc 1 1385 1 is_stmt 0 view .LVU453
1386 000e 7047 bx lr
1387 .LVL96:
1388 .L116:
1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1389 .loc 1 1365 5 is_stmt 1 view .LVU454
1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1390 .loc 1 1365 14 is_stmt 0 view .LVU455
1391 0010 0368 ldr r3, [r0]
1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 54
restructured repo
2024-05-12 14:08:58 +02:00
1392 .loc 1 1365 24 view .LVU456
1393 0012 9868 ldr r0, [r3, #8]
1394 .LVL97:
1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1395 .loc 1 1365 8 view .LVU457
1396 0014 10F08060 ands r0, r0, #67108864
1397 0018 00D0 beq .L112
1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1398 .loc 1 1367 16 view .LVU458
1399 001a 0120 movs r0, #1
1400 .L112:
1401 .LVL98:
1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1402 .loc 1 1371 5 is_stmt 1 view .LVU459
1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1403 .loc 1 1371 24 is_stmt 0 view .LVU460
1404 001c 9A68 ldr r2, [r3, #8]
1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1405 .loc 1 1371 8 view .LVU461
1406 001e 12F0006F tst r2, #134217728
1407 0022 00D0 beq .L113
1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1408 .loc 1 1373 7 is_stmt 1 view .LVU462
1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1409 .loc 1 1373 16 is_stmt 0 view .LVU463
1410 0024 0130 adds r0, r0, #1
1411 .LVL99:
1412 .L113:
1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1413 .loc 1 1377 5 is_stmt 1 view .LVU464
1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1414 .loc 1 1377 24 is_stmt 0 view .LVU465
1415 0026 9B68 ldr r3, [r3, #8]
1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1416 .loc 1 1377 8 view .LVU466
1417 0028 13F0805F tst r3, #268435456
1418 002c EFD0 beq .L110
1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1419 .loc 1 1379 7 is_stmt 1 view .LVU467
1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1420 .loc 1 1379 16 is_stmt 0 view .LVU468
1421 002e 0130 adds r0, r0, #1
1422 .LVL100:
1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1423 .loc 1 1379 16 view .LVU469
1424 0030 7047 bx lr
1425 .cfi_endproc
1426 .LFE142:
1428 .section .text.HAL_CAN_IsTxMessagePending,"ax",%progbits
1429 .align 1
1430 .global HAL_CAN_IsTxMessagePending
1431 .syntax unified
1432 .thumb
1433 .thumb_func
1435 HAL_CAN_IsTxMessagePending:
1436 .LVL101:
1437 .LFB143:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 55
restructured repo
2024-05-12 14:08:58 +02:00
1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Check if a transmission request is pending on the selected Tx
1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Mailboxes.
1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailboxes List of Tx Mailboxes to check.
1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes.
1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Status
1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 0 : No pending transmission request on any selected Tx Mailboxes.
1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 1 : Pending transmission request on at least one of the selected
1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Tx Mailbox.
1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes)
1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1438 .loc 1 1400 1 is_stmt 1 view -0
1439 .cfi_startproc
1440 @ args = 0, pretend = 0, frame = 0
1441 @ frame_needed = 0, uses_anonymous_args = 0
1442 @ link register save eliminated.
1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t status = 0U;
1443 .loc 1 1401 3 view .LVU471
1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1444 .loc 1 1402 3 view .LVU472
1445 .loc 1 1402 24 is_stmt 0 view .LVU473
1446 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
1447 .LVL102:
1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */
1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes));
1448 .loc 1 1405 3 is_stmt 1 view .LVU474
1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1449 .loc 1 1407 3 view .LVU475
1450 .loc 1 1407 38 is_stmt 0 view .LVU476
1451 0004 013B subs r3, r3, #1
1452 .LVL103:
1453 .loc 1 1407 38 view .LVU477
1454 0006 DBB2 uxtb r3, r3
1455 .loc 1 1407 6 view .LVU478
1456 0008 012B cmp r3, #1
1457 000a 01D9 bls .L121
1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1458 .loc 1 1401 12 view .LVU479
1459 000c 0020 movs r0, #0
1460 .LVL104:
1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1461 .loc 1 1401 12 view .LVU480
1462 000e 7047 bx lr
1463 .LVL105:
1464 .L121:
1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check pending transmission request on the selected Tx Mailboxes */
1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_P
1465 .loc 1 1411 5 is_stmt 1 view .LVU481
1466 .loc 1 1411 14 is_stmt 0 view .LVU482
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 56
restructured repo
2024-05-12 14:08:58 +02:00
1467 0010 0368 ldr r3, [r0]
1468 .loc 1 1411 24 view .LVU483
1469 0012 9B68 ldr r3, [r3, #8]
1470 .loc 1 1411 30 view .LVU484
1471 0014 03EA8163 and r3, r3, r1, lsl #26
1472 .loc 1 1411 8 view .LVU485
1473 0018 B3EB816F cmp r3, r1, lsl #26
1474 001c 01D0 beq .L122
1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = 1U;
1475 .loc 1 1413 14 view .LVU486
1476 001e 0120 movs r0, #1
1477 .LVL106:
1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return status */
1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status;
1478 .loc 1 1418 3 is_stmt 1 view .LVU487
1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1479 .loc 1 1419 1 is_stmt 0 view .LVU488
1480 0020 7047 bx lr
1481 .LVL107:
1482 .L122:
1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1483 .loc 1 1401 12 view .LVU489
1484 0022 0020 movs r0, #0
1485 .LVL108:
1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1486 .loc 1 1401 12 view .LVU490
1487 0024 7047 bx lr
1488 .cfi_endproc
1489 .LFE143:
1491 .section .text.HAL_CAN_GetTxTimestamp,"ax",%progbits
1492 .align 1
1493 .global HAL_CAN_GetTxTimestamp
1494 .syntax unified
1495 .thumb
1496 .thumb_func
1498 HAL_CAN_GetTxTimestamp:
1499 .LVL109:
1500 .LFB144:
1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return timestamp of Tx message sent, if time triggered communication
1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mode is enabled.
1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailbox Tx Mailbox where the timestamp of message sent will be
1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * read.
1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one value of @arg CAN_Tx_Mailboxes.
1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Timestamp of message sent from Tx Mailbox.
1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox)
1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1501 .loc 1 1432 1 is_stmt 1 view -0
1502 .cfi_startproc
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 57
restructured repo
2024-05-12 14:08:58 +02:00
1503 @ args = 0, pretend = 0, frame = 0
1504 @ frame_needed = 0, uses_anonymous_args = 0
1505 @ link register save eliminated.
1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t timestamp = 0U;
1506 .loc 1 1433 3 view .LVU492
1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t transmitmailbox;
1507 .loc 1 1434 3 view .LVU493
1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1508 .loc 1 1435 3 view .LVU494
1509 .loc 1 1435 24 is_stmt 0 view .LVU495
1510 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
1511 .LVL110:
1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */
1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX(TxMailbox));
1512 .loc 1 1438 3 is_stmt 1 view .LVU496
1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1513 .loc 1 1440 3 view .LVU497
1514 .loc 1 1440 38 is_stmt 0 view .LVU498
1515 0004 013B subs r3, r3, #1
1516 .LVL111:
1517 .loc 1 1440 38 view .LVU499
1518 0006 DBB2 uxtb r3, r3
1519 .loc 1 1440 6 view .LVU500
1520 0008 012B cmp r3, #1
1521 000a 01D9 bls .L126
1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t transmitmailbox;
1522 .loc 1 1433 12 view .LVU501
1523 000c 0020 movs r0, #0
1524 .LVL112:
1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Select the Tx mailbox */
1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmitmailbox = POSITION_VAL(TxMailbox);
1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get timestamp */
1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TI
1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return the timestamp */
1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return timestamp;
1525 .loc 1 1451 3 is_stmt 1 view .LVU502
1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1526 .loc 1 1452 1 is_stmt 0 view .LVU503
1527 000e 7047 bx lr
1528 .LVL113:
1529 .L126:
1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1530 .loc 1 1444 5 is_stmt 1 view .LVU504
1531 .LBB4:
1532 .LBI4:
1533 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 58
restructured repo
2024-05-12 14:08:58 +02:00
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 59
restructured repo
2024-05-12 14:08:58 +02:00
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 60
restructured repo
2024-05-12 14:08:58 +02:00
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
144:Drivers/CMSIS/Include/cmsis_gcc.h ****
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
154:Drivers/CMSIS/Include/cmsis_gcc.h ****
155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
158:Drivers/CMSIS/Include/cmsis_gcc.h ****
159:Drivers/CMSIS/Include/cmsis_gcc.h ****
160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
169:Drivers/CMSIS/Include/cmsis_gcc.h ****
170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
174:Drivers/CMSIS/Include/cmsis_gcc.h ****
175:Drivers/CMSIS/Include/cmsis_gcc.h ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 61
restructured repo
2024-05-12 14:08:58 +02:00
176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
185:Drivers/CMSIS/Include/cmsis_gcc.h ****
186:Drivers/CMSIS/Include/cmsis_gcc.h ****
187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
198:Drivers/CMSIS/Include/cmsis_gcc.h ****
199:Drivers/CMSIS/Include/cmsis_gcc.h ****
200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
208:Drivers/CMSIS/Include/cmsis_gcc.h ****
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
213:Drivers/CMSIS/Include/cmsis_gcc.h ****
214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
218:Drivers/CMSIS/Include/cmsis_gcc.h **** */
219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
222:Drivers/CMSIS/Include/cmsis_gcc.h ****
223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
227:Drivers/CMSIS/Include/cmsis_gcc.h ****
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 62
restructured repo
2024-05-12 14:08:58 +02:00
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
240:Drivers/CMSIS/Include/cmsis_gcc.h ****
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
246:Drivers/CMSIS/Include/cmsis_gcc.h **** */
247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
250:Drivers/CMSIS/Include/cmsis_gcc.h ****
251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
254:Drivers/CMSIS/Include/cmsis_gcc.h ****
255:Drivers/CMSIS/Include/cmsis_gcc.h ****
256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
270:Drivers/CMSIS/Include/cmsis_gcc.h ****
271:Drivers/CMSIS/Include/cmsis_gcc.h ****
272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
276:Drivers/CMSIS/Include/cmsis_gcc.h **** */
277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
281:Drivers/CMSIS/Include/cmsis_gcc.h ****
282:Drivers/CMSIS/Include/cmsis_gcc.h ****
283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 63
restructured repo
2024-05-12 14:08:58 +02:00
290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
295:Drivers/CMSIS/Include/cmsis_gcc.h ****
296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
300:Drivers/CMSIS/Include/cmsis_gcc.h **** */
301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
304:Drivers/CMSIS/Include/cmsis_gcc.h ****
305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
309:Drivers/CMSIS/Include/cmsis_gcc.h ****
310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
319:Drivers/CMSIS/Include/cmsis_gcc.h ****
320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
324:Drivers/CMSIS/Include/cmsis_gcc.h ****
325:Drivers/CMSIS/Include/cmsis_gcc.h ****
326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
334:Drivers/CMSIS/Include/cmsis_gcc.h **** }
335:Drivers/CMSIS/Include/cmsis_gcc.h ****
336:Drivers/CMSIS/Include/cmsis_gcc.h ****
337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
342:Drivers/CMSIS/Include/cmsis_gcc.h **** */
343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 64
restructured repo
2024-05-12 14:08:58 +02:00
347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
359:Drivers/CMSIS/Include/cmsis_gcc.h ****
360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
363:Drivers/CMSIS/Include/cmsis_gcc.h ****
364:Drivers/CMSIS/Include/cmsis_gcc.h ****
365:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
369:Drivers/CMSIS/Include/cmsis_gcc.h **** */
370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
377:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
381:Drivers/CMSIS/Include/cmsis_gcc.h **** */
382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
385:Drivers/CMSIS/Include/cmsis_gcc.h ****
386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
388:Drivers/CMSIS/Include/cmsis_gcc.h **** }
389:Drivers/CMSIS/Include/cmsis_gcc.h ****
390:Drivers/CMSIS/Include/cmsis_gcc.h ****
391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
396:Drivers/CMSIS/Include/cmsis_gcc.h **** */
397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
398:Drivers/CMSIS/Include/cmsis_gcc.h **** {
399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
400:Drivers/CMSIS/Include/cmsis_gcc.h ****
401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 65
restructured repo
2024-05-12 14:08:58 +02:00
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
405:Drivers/CMSIS/Include/cmsis_gcc.h ****
406:Drivers/CMSIS/Include/cmsis_gcc.h ****
407:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
411:Drivers/CMSIS/Include/cmsis_gcc.h **** */
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
417:Drivers/CMSIS/Include/cmsis_gcc.h ****
418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
423:Drivers/CMSIS/Include/cmsis_gcc.h **** */
424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
425:Drivers/CMSIS/Include/cmsis_gcc.h **** {
426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
429:Drivers/CMSIS/Include/cmsis_gcc.h ****
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
434:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
438:Drivers/CMSIS/Include/cmsis_gcc.h **** */
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
440:Drivers/CMSIS/Include/cmsis_gcc.h **** {
441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
442:Drivers/CMSIS/Include/cmsis_gcc.h **** }
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
444:Drivers/CMSIS/Include/cmsis_gcc.h ****
445:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
449:Drivers/CMSIS/Include/cmsis_gcc.h **** */
450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
454:Drivers/CMSIS/Include/cmsis_gcc.h ****
455:Drivers/CMSIS/Include/cmsis_gcc.h ****
456:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
460:Drivers/CMSIS/Include/cmsis_gcc.h **** */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 66
restructured repo
2024-05-12 14:08:58 +02:00
461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
462:Drivers/CMSIS/Include/cmsis_gcc.h **** {
463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
464:Drivers/CMSIS/Include/cmsis_gcc.h ****
465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
468:Drivers/CMSIS/Include/cmsis_gcc.h ****
469:Drivers/CMSIS/Include/cmsis_gcc.h ****
470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
471:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
475:Drivers/CMSIS/Include/cmsis_gcc.h **** */
476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
479:Drivers/CMSIS/Include/cmsis_gcc.h ****
480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
485:Drivers/CMSIS/Include/cmsis_gcc.h ****
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
495:Drivers/CMSIS/Include/cmsis_gcc.h ****
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
498:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
502:Drivers/CMSIS/Include/cmsis_gcc.h **** */
503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
504:Drivers/CMSIS/Include/cmsis_gcc.h **** {
505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
508:Drivers/CMSIS/Include/cmsis_gcc.h ****
509:Drivers/CMSIS/Include/cmsis_gcc.h ****
510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
515:Drivers/CMSIS/Include/cmsis_gcc.h **** */
516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 67
restructured repo
2024-05-12 14:08:58 +02:00
518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
519:Drivers/CMSIS/Include/cmsis_gcc.h **** }
520:Drivers/CMSIS/Include/cmsis_gcc.h ****
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
526:Drivers/CMSIS/Include/cmsis_gcc.h **** */
527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
528:Drivers/CMSIS/Include/cmsis_gcc.h **** {
529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
530:Drivers/CMSIS/Include/cmsis_gcc.h ****
531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
534:Drivers/CMSIS/Include/cmsis_gcc.h ****
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
537:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
541:Drivers/CMSIS/Include/cmsis_gcc.h **** */
542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
545:Drivers/CMSIS/Include/cmsis_gcc.h ****
546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
548:Drivers/CMSIS/Include/cmsis_gcc.h **** }
549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
550:Drivers/CMSIS/Include/cmsis_gcc.h ****
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
552:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
556:Drivers/CMSIS/Include/cmsis_gcc.h **** */
557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
558:Drivers/CMSIS/Include/cmsis_gcc.h **** {
559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
560:Drivers/CMSIS/Include/cmsis_gcc.h **** }
561:Drivers/CMSIS/Include/cmsis_gcc.h ****
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
568:Drivers/CMSIS/Include/cmsis_gcc.h **** */
569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
570:Drivers/CMSIS/Include/cmsis_gcc.h **** {
571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
574:Drivers/CMSIS/Include/cmsis_gcc.h ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 68
restructured repo
2024-05-12 14:08:58 +02:00
575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
578:Drivers/CMSIS/Include/cmsis_gcc.h ****
579:Drivers/CMSIS/Include/cmsis_gcc.h ****
580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
582:Drivers/CMSIS/Include/cmsis_gcc.h ****
583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
591:Drivers/CMSIS/Include/cmsis_gcc.h **** */
592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
593:Drivers/CMSIS/Include/cmsis_gcc.h **** {
594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
604:Drivers/CMSIS/Include/cmsis_gcc.h ****
605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
606:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
610:Drivers/CMSIS/Include/cmsis_gcc.h ****
611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
613:Drivers/CMSIS/Include/cmsis_gcc.h **** */
614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
615:Drivers/CMSIS/Include/cmsis_gcc.h **** {
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
626:Drivers/CMSIS/Include/cmsis_gcc.h ****
627:Drivers/CMSIS/Include/cmsis_gcc.h ****
628:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 69
restructured repo
2024-05-12 14:08:58 +02:00
632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
633:Drivers/CMSIS/Include/cmsis_gcc.h ****
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
636:Drivers/CMSIS/Include/cmsis_gcc.h **** */
637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
647:Drivers/CMSIS/Include/cmsis_gcc.h ****
648:Drivers/CMSIS/Include/cmsis_gcc.h ****
649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
654:Drivers/CMSIS/Include/cmsis_gcc.h ****
655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
657:Drivers/CMSIS/Include/cmsis_gcc.h **** */
658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
666:Drivers/CMSIS/Include/cmsis_gcc.h **** }
667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
668:Drivers/CMSIS/Include/cmsis_gcc.h ****
669:Drivers/CMSIS/Include/cmsis_gcc.h ****
670:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
675:Drivers/CMSIS/Include/cmsis_gcc.h ****
676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
678:Drivers/CMSIS/Include/cmsis_gcc.h **** */
679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 70
restructured repo
2024-05-12 14:08:58 +02:00
689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
690:Drivers/CMSIS/Include/cmsis_gcc.h **** }
691:Drivers/CMSIS/Include/cmsis_gcc.h ****
692:Drivers/CMSIS/Include/cmsis_gcc.h ****
693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
698:Drivers/CMSIS/Include/cmsis_gcc.h ****
699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
701:Drivers/CMSIS/Include/cmsis_gcc.h **** */
702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 71
restructured repo
2024-05-12 14:08:58 +02:00
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
756:Drivers/CMSIS/Include/cmsis_gcc.h ****
757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
760:Drivers/CMSIS/Include/cmsis_gcc.h ****
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
765:Drivers/CMSIS/Include/cmsis_gcc.h **** */
766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
767:Drivers/CMSIS/Include/cmsis_gcc.h **** {
768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
777:Drivers/CMSIS/Include/cmsis_gcc.h ****
778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
784:Drivers/CMSIS/Include/cmsis_gcc.h **** }
785:Drivers/CMSIS/Include/cmsis_gcc.h ****
786:Drivers/CMSIS/Include/cmsis_gcc.h ****
787:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 72
restructured repo
2024-05-12 14:08:58 +02:00
803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
808:Drivers/CMSIS/Include/cmsis_gcc.h ****
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
811:Drivers/CMSIS/Include/cmsis_gcc.h ****
812:Drivers/CMSIS/Include/cmsis_gcc.h ****
813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
818:Drivers/CMSIS/Include/cmsis_gcc.h ****
819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
831:Drivers/CMSIS/Include/cmsis_gcc.h ****
832:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
835:Drivers/CMSIS/Include/cmsis_gcc.h **** */
836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
837:Drivers/CMSIS/Include/cmsis_gcc.h ****
838:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
841:Drivers/CMSIS/Include/cmsis_gcc.h **** */
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
843:Drivers/CMSIS/Include/cmsis_gcc.h ****
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
845:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
849:Drivers/CMSIS/Include/cmsis_gcc.h **** */
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
851:Drivers/CMSIS/Include/cmsis_gcc.h ****
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
856:Drivers/CMSIS/Include/cmsis_gcc.h **** */
857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
858:Drivers/CMSIS/Include/cmsis_gcc.h ****
859:Drivers/CMSIS/Include/cmsis_gcc.h ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 73
restructured repo
2024-05-12 14:08:58 +02:00
860:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
865:Drivers/CMSIS/Include/cmsis_gcc.h **** */
866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
870:Drivers/CMSIS/Include/cmsis_gcc.h ****
871:Drivers/CMSIS/Include/cmsis_gcc.h ****
872:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
876:Drivers/CMSIS/Include/cmsis_gcc.h **** */
877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
878:Drivers/CMSIS/Include/cmsis_gcc.h **** {
879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
880:Drivers/CMSIS/Include/cmsis_gcc.h **** }
881:Drivers/CMSIS/Include/cmsis_gcc.h ****
882:Drivers/CMSIS/Include/cmsis_gcc.h ****
883:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
887:Drivers/CMSIS/Include/cmsis_gcc.h **** */
888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
889:Drivers/CMSIS/Include/cmsis_gcc.h **** {
890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
891:Drivers/CMSIS/Include/cmsis_gcc.h **** }
892:Drivers/CMSIS/Include/cmsis_gcc.h ****
893:Drivers/CMSIS/Include/cmsis_gcc.h ****
894:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
899:Drivers/CMSIS/Include/cmsis_gcc.h **** */
900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
901:Drivers/CMSIS/Include/cmsis_gcc.h **** {
902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
906:Drivers/CMSIS/Include/cmsis_gcc.h ****
907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
912:Drivers/CMSIS/Include/cmsis_gcc.h ****
913:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 74
restructured repo
2024-05-12 14:08:58 +02:00
917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
918:Drivers/CMSIS/Include/cmsis_gcc.h **** */
919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
922:Drivers/CMSIS/Include/cmsis_gcc.h ****
923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
927:Drivers/CMSIS/Include/cmsis_gcc.h ****
928:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
933:Drivers/CMSIS/Include/cmsis_gcc.h **** */
934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
935:Drivers/CMSIS/Include/cmsis_gcc.h **** {
936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
940:Drivers/CMSIS/Include/cmsis_gcc.h ****
941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
945:Drivers/CMSIS/Include/cmsis_gcc.h ****
946:Drivers/CMSIS/Include/cmsis_gcc.h ****
947:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
953:Drivers/CMSIS/Include/cmsis_gcc.h **** */
954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
955:Drivers/CMSIS/Include/cmsis_gcc.h **** {
956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
960:Drivers/CMSIS/Include/cmsis_gcc.h **** }
961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
962:Drivers/CMSIS/Include/cmsis_gcc.h **** }
963:Drivers/CMSIS/Include/cmsis_gcc.h ****
964:Drivers/CMSIS/Include/cmsis_gcc.h ****
965:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
971:Drivers/CMSIS/Include/cmsis_gcc.h **** */
972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 75
restructured repo
2024-05-12 14:08:58 +02:00
974:Drivers/CMSIS/Include/cmsis_gcc.h ****
975:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
980:Drivers/CMSIS/Include/cmsis_gcc.h **** */
981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
1534 .loc 2 981 31 view .LVU505
1535 .LBB5:
982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1536 .loc 2 983 3 view .LVU506
984:Drivers/CMSIS/Include/cmsis_gcc.h ****
985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
1537 .loc 2 988 4 view .LVU507
1538 .syntax unified
1539 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1540 0010 91FAA1F1 rbit r1, r1
1541 @ 0 "" 2
1542 .LVL114:
989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
991:Drivers/CMSIS/Include/cmsis_gcc.h ****
992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
994:Drivers/CMSIS/Include/cmsis_gcc.h **** {
995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
998:Drivers/CMSIS/Include/cmsis_gcc.h **** }
999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
1543 .loc 2 1001 3 view .LVU508
1544 .loc 2 1001 3 is_stmt 0 view .LVU509
1545 .thumb
1546 .syntax unified
1547 .LBE5:
1548 .LBE4:
1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1549 .loc 1 1444 21 view .LVU510
1550 0014 B1FA81F1 clz r1, r1
1551 .LVL115:
1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1552 .loc 1 1447 5 is_stmt 1 view .LVU511
1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1553 .loc 1 1447 22 is_stmt 0 view .LVU512
1554 0018 0368 ldr r3, [r0]
1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1555 .loc 1 1447 61 view .LVU513
1556 001a 1831 adds r1, r1, #24
1557 .LVL116:
1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 76
restructured repo
2024-05-12 14:08:58 +02:00
1558 .loc 1 1447 61 view .LVU514
1559 001c 03EB0113 add r3, r3, r1, lsl #4
1560 0020 5868 ldr r0, [r3, #4]
1561 .LVL117:
1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1562 .loc 1 1447 85 view .LVU515
1563 0022 000C lsrs r0, r0, #16
1564 .LVL118:
1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1565 .loc 1 1447 85 view .LVU516
1566 0024 7047 bx lr
1567 .cfi_endproc
1568 .LFE144:
1570 .section .text.HAL_CAN_GetRxMessage,"ax",%progbits
1571 .align 1
1572 .global HAL_CAN_GetRxMessage
1573 .syntax unified
1574 .thumb
1575 .thumb_func
1577 HAL_CAN_GetRxMessage:
1578 .LVL119:
1579 .LFB145:
1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Get an CAN frame from the Rx FIFO zone into the message RAM.
1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param RxFifo Fifo number of the received message to be read.
1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number.
1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header
1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * of the Rx frame will be stored.
1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param aData array where the payload of the Rx frame will be stored.
1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo,
1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_RxHeaderTypeDef *pHeader, uint8_t aData[])
1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1580 .loc 1 1467 1 is_stmt 1 view -0
1581 .cfi_startproc
1582 @ args = 0, pretend = 0, frame = 0
1583 @ frame_needed = 0, uses_anonymous_args = 0
1584 @ link register save eliminated.
1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1585 .loc 1 1468 3 view .LVU518
1586 .loc 1 1468 24 is_stmt 0 view .LVU519
1587 0000 90F820C0 ldrb ip, [r0, #32] @ zero_extendqisi2
1588 .LVL120:
1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo));
1589 .loc 1 1470 3 is_stmt 1 view .LVU520
1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1590 .loc 1 1472 3 view .LVU521
1591 .loc 1 1472 38 is_stmt 0 view .LVU522
1592 0004 0CF1FF3C add ip, ip, #-1
1593 .LVL121:
1594 .loc 1 1472 38 view .LVU523
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 77
restructured repo
2024-05-12 14:08:58 +02:00
1595 0008 5FFA8CFC uxtb ip, ip
1596 .loc 1 1472 6 view .LVU524
1597 000c BCF1010F cmp ip, #1
1598 0010 00F2A580 bhi .L128
1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1599 .loc 1 1467 1 view .LVU525
1600 0014 30B4 push {r4, r5}
1601 .cfi_def_cfa_offset 8
1602 .cfi_offset 4, -8
1603 .cfi_offset 5, -4
1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the Rx FIFO */
1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */
1604 .loc 1 1476 5 is_stmt 1 view .LVU526
1605 .loc 1 1476 8 is_stmt 0 view .LVU527
1606 0016 51B9 cbnz r1, .L129
1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that the Rx FIFO 0 is not empty */
1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U)
1607 .loc 1 1479 7 is_stmt 1 view .LVU528
1608 .loc 1 1479 16 is_stmt 0 view .LVU529
1609 0018 0468 ldr r4, [r0]
1610 .loc 1 1479 26 view .LVU530
1611 001a E468 ldr r4, [r4, #12]
1612 .loc 1 1479 10 view .LVU531
1613 001c 14F0030F tst r4, #3
1614 0020 10D1 bne .L130
1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
1615 .loc 1 1482 9 is_stmt 1 view .LVU532
1616 .loc 1 1482 13 is_stmt 0 view .LVU533
1617 0022 436A ldr r3, [r0, #36]
1618 .LVL122:
1619 .loc 1 1482 25 view .LVU534
1620 0024 43F40013 orr r3, r3, #2097152
1621 0028 4362 str r3, [r0, #36]
1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1622 .loc 1 1484 9 is_stmt 1 view .LVU535
1623 .loc 1 1484 16 is_stmt 0 view .LVU536
1624 002a 0120 movs r0, #1
1625 .LVL123:
1626 .loc 1 1484 16 view .LVU537
1627 002c 7EE0 b .L131
1628 .LVL124:
1629 .L129:
1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */
1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that the Rx FIFO 1 is not empty */
1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U)
1630 .loc 1 1490 7 is_stmt 1 view .LVU538
1631 .loc 1 1490 16 is_stmt 0 view .LVU539
1632 002e 0468 ldr r4, [r0]
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 78
restructured repo
2024-05-12 14:08:58 +02:00
1633 .loc 1 1490 26 view .LVU540
1634 0030 2469 ldr r4, [r4, #16]
1635 .loc 1 1490 10 view .LVU541
1636 0032 14F0030F tst r4, #3
1637 0036 05D1 bne .L130
1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
1638 .loc 1 1493 9 is_stmt 1 view .LVU542
1639 .loc 1 1493 13 is_stmt 0 view .LVU543
1640 0038 436A ldr r3, [r0, #36]
1641 .LVL125:
1642 .loc 1 1493 25 view .LVU544
1643 003a 43F40013 orr r3, r3, #2097152
1644 003e 4362 str r3, [r0, #36]
1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1645 .loc 1 1495 9 is_stmt 1 view .LVU545
1646 .loc 1 1495 16 is_stmt 0 view .LVU546
1647 0040 0120 movs r0, #1
1648 .LVL126:
1649 .loc 1 1495 16 view .LVU547
1650 0042 73E0 b .L131
1651 .LVL127:
1652 .L130:
1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get the header */
1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR;
1653 .loc 1 1500 5 is_stmt 1 view .LVU548
1654 .loc 1 1500 39 is_stmt 0 view .LVU549
1655 0044 0568 ldr r5, [r0]
1656 .loc 1 1500 71 view .LVU550
1657 0046 01F11B04 add r4, r1, #27
1658 004a 2401 lsls r4, r4, #4
1659 004c 2C59 ldr r4, [r5, r4]
1660 .loc 1 1500 33 view .LVU551
1661 004e 04F00404 and r4, r4, #4
1662 .loc 1 1500 18 view .LVU552
1663 0052 9460 str r4, [r2, #8]
1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD)
1664 .loc 1 1501 5 is_stmt 1 view .LVU553
1665 .loc 1 1501 8 is_stmt 0 view .LVU554
1666 0054 002C cmp r4, #0
1667 0056 6BD1 bne .L132
1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_
1668 .loc 1 1503 7 is_stmt 1 view .LVU555
1669 .loc 1 1503 45 is_stmt 0 view .LVU556
1670 0058 0568 ldr r5, [r0]
1671 .loc 1 1503 77 view .LVU557
1672 005a 01F11B04 add r4, r1, #27
1673 005e 2401 lsls r4, r4, #4
1674 0060 2C59 ldr r4, [r5, r4]
1675 .loc 1 1503 83 view .LVU558
1676 0062 640D lsrs r4, r4, #21
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 79
restructured repo
2024-05-12 14:08:58 +02:00
1677 .loc 1 1503 22 view .LVU559
1678 0064 1460 str r4, [r2]
1679 .L133:
1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) &
1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos;
1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR);
1680 .loc 1 1510 5 is_stmt 1 view .LVU560
1681 .loc 1 1510 40 is_stmt 0 view .LVU561
1682 0066 0468 ldr r4, [r0]
1683 .loc 1 1510 72 view .LVU562
1684 0068 01F11B0C add ip, r1, #27
1685 006c 4FEA0C1C lsl ip, ip, #4
1686 0070 54F80C40 ldr r4, [r4, ip]
1687 .loc 1 1510 34 view .LVU563
1688 0074 04F00204 and r4, r4, #2
1689 .loc 1 1510 18 view .LVU564
1690 0078 D460 str r4, [r2, #12]
1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U)
1691 .loc 1 1511 5 is_stmt 1 view .LVU565
1692 .loc 1 1511 31 is_stmt 0 view .LVU566
1693 007a 0468 ldr r4, [r0]
1694 .loc 1 1511 63 view .LVU567
1695 007c A444 add ip, ip, r4
1696 007e DCF80450 ldr r5, [ip, #4]
1697 .loc 1 1511 8 view .LVU568
1698 0082 15F0080F tst r5, #8
1699 0086 5BD0 beq .L134
1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Truncate DLC to 8 if received field is over range */
1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->DLC = 8U;
1700 .loc 1 1514 7 is_stmt 1 view .LVU569
1701 .loc 1 1514 20 is_stmt 0 view .LVU570
1702 0088 0824 movs r4, #8
1703 008a 1461 str r4, [r2, #16]
1704 .L135:
1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_P
1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_
1705 .loc 1 1520 5 is_stmt 1 view .LVU571
1706 .loc 1 1520 54 is_stmt 0 view .LVU572
1707 008c 0468 ldr r4, [r0]
1708 .loc 1 1520 86 view .LVU573
1709 008e 01F11B0C add ip, r1, #27
1710 0092 04EB0C14 add r4, r4, ip, lsl #4
1711 0096 6468 ldr r4, [r4, #4]
1712 .loc 1 1520 93 view .LVU574
1713 0098 C4F30724 ubfx r4, r4, #8, #8
1714 .loc 1 1520 31 view .LVU575
1715 009c 9461 str r4, [r2, #24]
1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 80
restructured repo
2024-05-12 14:08:58 +02:00
1716 .loc 1 1521 5 is_stmt 1 view .LVU576
1717 .loc 1 1521 48 is_stmt 0 view .LVU577
1718 009e 0468 ldr r4, [r0]
1719 .loc 1 1521 80 view .LVU578
1720 00a0 04EB0C14 add r4, r4, ip, lsl #4
1721 00a4 6468 ldr r4, [r4, #4]
1722 .loc 1 1521 87 view .LVU579
1723 00a6 240C lsrs r4, r4, #16
1724 .loc 1 1521 24 view .LVU580
1725 00a8 5461 str r4, [r2, #20]
1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get the data */
1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R
1726 .loc 1 1524 5 is_stmt 1 view .LVU581
1727 .loc 1 1524 49 is_stmt 0 view .LVU582
1728 00aa 0268 ldr r2, [r0]
1729 .LVL128:
1730 .loc 1 1524 81 view .LVU583
1731 00ac 02EB0112 add r2, r2, r1, lsl #4
1732 00b0 D2F8B821 ldr r2, [r2, #440]
1733 .loc 1 1524 14 view .LVU584
1734 00b4 1A70 strb r2, [r3]
1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R
1735 .loc 1 1525 5 is_stmt 1 view .LVU585
1736 .loc 1 1525 49 is_stmt 0 view .LVU586
1737 00b6 0268 ldr r2, [r0]
1738 .loc 1 1525 81 view .LVU587
1739 00b8 02EB0112 add r2, r2, r1, lsl #4
1740 00bc D2F8B821 ldr r2, [r2, #440]
1741 .loc 1 1525 16 view .LVU588
1742 00c0 C2F30722 ubfx r2, r2, #8, #8
1743 .loc 1 1525 14 view .LVU589
1744 00c4 5A70 strb r2, [r3, #1]
1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R
1745 .loc 1 1526 5 is_stmt 1 view .LVU590
1746 .loc 1 1526 49 is_stmt 0 view .LVU591
1747 00c6 0268 ldr r2, [r0]
1748 .loc 1 1526 81 view .LVU592
1749 00c8 02EB0112 add r2, r2, r1, lsl #4
1750 00cc D2F8B821 ldr r2, [r2, #440]
1751 .loc 1 1526 16 view .LVU593
1752 00d0 C2F30742 ubfx r2, r2, #16, #8
1753 .loc 1 1526 14 view .LVU594
1754 00d4 9A70 strb r2, [r3, #2]
1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R
1755 .loc 1 1527 5 is_stmt 1 view .LVU595
1756 .loc 1 1527 49 is_stmt 0 view .LVU596
1757 00d6 0268 ldr r2, [r0]
1758 .loc 1 1527 81 view .LVU597
1759 00d8 02EB0112 add r2, r2, r1, lsl #4
1760 00dc D2F8B821 ldr r2, [r2, #440]
1761 .loc 1 1527 16 view .LVU598
1762 00e0 120E lsrs r2, r2, #24
1763 .loc 1 1527 14 view .LVU599
1764 00e2 DA70 strb r2, [r3, #3]
1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R
1765 .loc 1 1528 5 is_stmt 1 view .LVU600
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 81
restructured repo
2024-05-12 14:08:58 +02:00
1766 .loc 1 1528 49 is_stmt 0 view .LVU601
1767 00e4 0268 ldr r2, [r0]
1768 .loc 1 1528 81 view .LVU602
1769 00e6 02EB0112 add r2, r2, r1, lsl #4
1770 00ea D2F8BC21 ldr r2, [r2, #444]
1771 .loc 1 1528 14 view .LVU603
1772 00ee 1A71 strb r2, [r3, #4]
1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R
1773 .loc 1 1529 5 is_stmt 1 view .LVU604
1774 .loc 1 1529 49 is_stmt 0 view .LVU605
1775 00f0 0268 ldr r2, [r0]
1776 .loc 1 1529 81 view .LVU606
1777 00f2 02EB0112 add r2, r2, r1, lsl #4
1778 00f6 D2F8BC21 ldr r2, [r2, #444]
1779 .loc 1 1529 16 view .LVU607
1780 00fa C2F30722 ubfx r2, r2, #8, #8
1781 .loc 1 1529 14 view .LVU608
1782 00fe 5A71 strb r2, [r3, #5]
1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R
1783 .loc 1 1530 5 is_stmt 1 view .LVU609
1784 .loc 1 1530 49 is_stmt 0 view .LVU610
1785 0100 0268 ldr r2, [r0]
1786 .loc 1 1530 81 view .LVU611
1787 0102 02EB0112 add r2, r2, r1, lsl #4
1788 0106 D2F8BC21 ldr r2, [r2, #444]
1789 .loc 1 1530 16 view .LVU612
1790 010a C2F30742 ubfx r2, r2, #16, #8
1791 .loc 1 1530 14 view .LVU613
1792 010e 9A71 strb r2, [r3, #6]
1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R
1793 .loc 1 1531 5 is_stmt 1 view .LVU614
1794 .loc 1 1531 49 is_stmt 0 view .LVU615
1795 0110 0268 ldr r2, [r0]
1796 .loc 1 1531 81 view .LVU616
1797 0112 02EB0112 add r2, r2, r1, lsl #4
1798 0116 D2F8BC21 ldr r2, [r2, #444]
1799 .loc 1 1531 16 view .LVU617
1800 011a 120E lsrs r2, r2, #24
1801 .loc 1 1531 14 view .LVU618
1802 011c DA71 strb r2, [r3, #7]
1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release the FIFO */
1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */
1803 .loc 1 1534 5 is_stmt 1 view .LVU619
1804 .loc 1 1534 8 is_stmt 0 view .LVU620
1805 011e C1B9 cbnz r1, .L136
1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release RX FIFO 0 */
1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0);
1806 .loc 1 1537 7 is_stmt 1 view .LVU621
1807 0120 0268 ldr r2, [r0]
1808 0122 D368 ldr r3, [r2, #12]
1809 .LVL129:
1810 .loc 1 1537 7 is_stmt 0 view .LVU622
1811 0124 43F02003 orr r3, r3, #32
1812 0128 D360 str r3, [r2, #12]
1813 .L137:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 82
restructured repo
2024-05-12 14:08:58 +02:00
1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */
1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release RX FIFO 1 */
1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1);
1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
1814 .loc 1 1546 5 is_stmt 1 view .LVU623
1815 .loc 1 1546 12 is_stmt 0 view .LVU624
1816 012a 0020 movs r0, #0
1817 .LVL130:
1818 .L131:
1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1819 .loc 1 1555 1 view .LVU625
1820 012c 30BC pop {r4, r5}
1821 .cfi_remember_state
1822 .cfi_restore 5
1823 .cfi_restore 4
1824 .cfi_def_cfa_offset 0
1825 012e 7047 bx lr
1826 .LVL131:
1827 .L132:
1828 .cfi_restore_state
1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos;
1829 .loc 1 1507 7 is_stmt 1 view .LVU626
1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1830 .loc 1 1508 29 is_stmt 0 view .LVU627
1831 0130 0568 ldr r5, [r0]
1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1832 .loc 1 1508 61 view .LVU628
1833 0132 01F11B04 add r4, r1, #27
1834 0136 2401 lsls r4, r4, #4
1835 0138 2C59 ldr r4, [r5, r4]
1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1836 .loc 1 1508 67 view .LVU629
1837 013a E408 lsrs r4, r4, #3
1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos;
1838 .loc 1 1507 22 view .LVU630
1839 013c 5460 str r4, [r2, #4]
1840 013e 92E7 b .L133
1841 .L134:
1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1842 .loc 1 1518 7 is_stmt 1 view .LVU631
1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1843 .loc 1 1518 75 is_stmt 0 view .LVU632
1844 0140 01F11B05 add r5, r1, #27
1845 0144 04EB0514 add r4, r4, r5, lsl #4
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 83
restructured repo
2024-05-12 14:08:58 +02:00
1846 0148 6468 ldr r4, [r4, #4]
1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1847 .loc 1 1518 82 view .LVU633
1848 014a 04F00F04 and r4, r4, #15
1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1849 .loc 1 1518 20 view .LVU634
1850 014e 1461 str r4, [r2, #16]
1851 0150 9CE7 b .L135
1852 .LVL132:
1853 .L136:
1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1854 .loc 1 1542 7 is_stmt 1 view .LVU635
1855 0152 0268 ldr r2, [r0]
1856 0154 1369 ldr r3, [r2, #16]
1857 .LVL133:
1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1858 .loc 1 1542 7 is_stmt 0 view .LVU636
1859 0156 43F02003 orr r3, r3, #32
1860 015a 1361 str r3, [r2, #16]
1861 015c E5E7 b .L137
1862 .LVL134:
1863 .L128:
1864 .cfi_def_cfa_offset 0
1865 .cfi_restore 4
1866 .cfi_restore 5
1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1867 .loc 1 1551 5 is_stmt 1 view .LVU637
1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1868 .loc 1 1551 9 is_stmt 0 view .LVU638
1869 015e 436A ldr r3, [r0, #36]
1870 .LVL135:
1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1871 .loc 1 1551 21 view .LVU639
1872 0160 43F48023 orr r3, r3, #262144
1873 0164 4362 str r3, [r0, #36]
1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1874 .loc 1 1553 5 is_stmt 1 view .LVU640
1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1875 .loc 1 1553 12 is_stmt 0 view .LVU641
1876 0166 0120 movs r0, #1
1877 .LVL136:
1878 .loc 1 1555 1 view .LVU642
1879 0168 7047 bx lr
1880 .cfi_endproc
1881 .LFE145:
1883 .section .text.HAL_CAN_GetRxFifoFillLevel,"ax",%progbits
1884 .align 1
1885 .global HAL_CAN_GetRxFifoFillLevel
1886 .syntax unified
1887 .thumb
1888 .thumb_func
1890 HAL_CAN_GetRxFifoFillLevel:
1891 .LVL137:
1892 .LFB146:
1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return Rx FIFO fill level.
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 84
restructured repo
2024-05-12 14:08:58 +02:00
1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param RxFifo Rx FIFO.
1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number.
1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Number of messages available in Rx FIFO.
1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo)
1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1893 .loc 1 1566 1 is_stmt 1 view -0
1894 .cfi_startproc
1895 @ args = 0, pretend = 0, frame = 0
1896 @ frame_needed = 0, uses_anonymous_args = 0
1897 @ link register save eliminated.
1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t filllevel = 0U;
1898 .loc 1 1567 3 view .LVU644
1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1899 .loc 1 1568 3 view .LVU645
1900 .loc 1 1568 24 is_stmt 0 view .LVU646
1901 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
1902 .LVL138:
1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */
1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo));
1903 .loc 1 1571 3 is_stmt 1 view .LVU647
1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1904 .loc 1 1573 3 view .LVU648
1905 .loc 1 1573 38 is_stmt 0 view .LVU649
1906 0004 013B subs r3, r3, #1
1907 .LVL139:
1908 .loc 1 1573 38 view .LVU650
1909 0006 DBB2 uxtb r3, r3
1910 .loc 1 1573 6 view .LVU651
1911 0008 012B cmp r3, #1
1912 000a 01D9 bls .L146
1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1913 .loc 1 1567 12 view .LVU652
1914 000c 0020 movs r0, #0
1915 .LVL140:
1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0)
1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0;
1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* RxFifo == CAN_RX_FIFO1 */
1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1;
1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return Rx FIFO fill level */
1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return filllevel;
1916 .loc 1 1587 3 is_stmt 1 view .LVU653
1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1917 .loc 1 1588 1 is_stmt 0 view .LVU654
1918 000e 7047 bx lr
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 85
restructured repo
2024-05-12 14:08:58 +02:00
1919 .LVL141:
1920 .L146:
1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1921 .loc 1 1576 5 is_stmt 1 view .LVU655
1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1922 .loc 1 1576 8 is_stmt 0 view .LVU656
1923 0010 21B9 cbnz r1, .L144
1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1924 .loc 1 1578 7 is_stmt 1 view .LVU657
1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1925 .loc 1 1578 23 is_stmt 0 view .LVU658
1926 0012 0368 ldr r3, [r0]
1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1927 .loc 1 1578 33 view .LVU659
1928 0014 D868 ldr r0, [r3, #12]
1929 .LVL142:
1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1930 .loc 1 1578 17 view .LVU660
1931 0016 00F00300 and r0, r0, #3
1932 .LVL143:
1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1933 .loc 1 1578 17 view .LVU661
1934 001a 7047 bx lr
1935 .LVL144:
1936 .L144:
1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1937 .loc 1 1582 7 is_stmt 1 view .LVU662
1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1938 .loc 1 1582 23 is_stmt 0 view .LVU663
1939 001c 0368 ldr r3, [r0]
1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1940 .loc 1 1582 33 view .LVU664
1941 001e 1869 ldr r0, [r3, #16]
1942 .LVL145:
1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1943 .loc 1 1582 17 view .LVU665
1944 0020 00F00300 and r0, r0, #3
1945 .LVL146:
1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1946 .loc 1 1582 17 view .LVU666
1947 0024 7047 bx lr
1948 .cfi_endproc
1949 .LFE146:
1951 .section .text.HAL_CAN_ActivateNotification,"ax",%progbits
1952 .align 1
1953 .global HAL_CAN_ActivateNotification
1954 .syntax unified
1955 .thumb
1956 .thumb_func
1958 HAL_CAN_ActivateNotification:
1959 .LVL147:
1960 .LFB147:
1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @}
1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 86
restructured repo
2024-05-12 14:08:58 +02:00
1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group4 Interrupts management
1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Interrupts management
1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim
1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Interrupts management #####
1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to:
1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ActivateNotification : Enable interrupts
1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_DeactivateNotification : Disable interrupts
1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IRQHandler : Handles CAN interrupt request
1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim
1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Enable interrupts.
1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param ActiveITs indicates which interrupts will be enabled.
1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts.
1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs)
1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1961 .loc 1 1619 1 is_stmt 1 view -0
1962 .cfi_startproc
1963 @ args = 0, pretend = 0, frame = 0
1964 @ frame_needed = 0, uses_anonymous_args = 0
1965 @ link register save eliminated.
1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
1966 .loc 1 1620 3 view .LVU668
1967 .loc 1 1620 24 is_stmt 0 view .LVU669
1968 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
1969 .LVL148:
1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */
1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IT(ActiveITs));
1970 .loc 1 1623 3 is_stmt 1 view .LVU670
1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
1971 .loc 1 1625 3 view .LVU671
1972 .loc 1 1625 38 is_stmt 0 view .LVU672
1973 0004 013B subs r3, r3, #1
1974 .LVL149:
1975 .loc 1 1625 38 view .LVU673
1976 0006 DBB2 uxtb r3, r3
1977 .loc 1 1625 6 view .LVU674
1978 0008 012B cmp r3, #1
1979 000a 05D9 bls .L150
1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Enable the selected interrupts */
1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_ENABLE_IT(hcan, ActiveITs);
1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 87
restructured repo
2024-05-12 14:08:58 +02:00
1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
1980 .loc 1 1637 5 is_stmt 1 view .LVU675
1981 .loc 1 1637 9 is_stmt 0 view .LVU676
1982 000c 436A ldr r3, [r0, #36]
1983 .loc 1 1637 21 view .LVU677
1984 000e 43F48023 orr r3, r3, #262144
1985 0012 4362 str r3, [r0, #36]
1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
1986 .loc 1 1639 5 is_stmt 1 view .LVU678
1987 .loc 1 1639 12 is_stmt 0 view .LVU679
1988 0014 0120 movs r0, #1
1989 .LVL150:
1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1990 .loc 1 1641 1 view .LVU680
1991 0016 7047 bx lr
1992 .LVL151:
1993 .L150:
1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1994 .loc 1 1629 5 is_stmt 1 view .LVU681
1995 0018 0268 ldr r2, [r0]
1996 001a 5369 ldr r3, [r2, #20]
1997 001c 0B43 orrs r3, r3, r1
1998 001e 5361 str r3, [r2, #20]
1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1999 .loc 1 1632 5 view .LVU682
1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2000 .loc 1 1632 12 is_stmt 0 view .LVU683
2001 0020 0020 movs r0, #0
2002 .LVL152:
1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2003 .loc 1 1632 12 view .LVU684
2004 0022 7047 bx lr
2005 .cfi_endproc
2006 .LFE147:
2008 .section .text.HAL_CAN_DeactivateNotification,"ax",%progbits
2009 .align 1
2010 .global HAL_CAN_DeactivateNotification
2011 .syntax unified
2012 .thumb
2013 .thumb_func
2015 HAL_CAN_DeactivateNotification:
2016 .LVL153:
2017 .LFB148:
1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Disable interrupts.
1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param InactiveITs indicates which interrupts will be disabled.
1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts.
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 88
restructured repo
2024-05-12 14:08:58 +02:00
1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs)
1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2018 .loc 1 1652 1 is_stmt 1 view -0
2019 .cfi_startproc
2020 @ args = 0, pretend = 0, frame = 0
2021 @ frame_needed = 0, uses_anonymous_args = 0
2022 @ link register save eliminated.
1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
2023 .loc 1 1653 3 view .LVU686
2024 .loc 1 1653 24 is_stmt 0 view .LVU687
2025 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
2026 .LVL154:
1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */
1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IT(InactiveITs));
2027 .loc 1 1656 3 is_stmt 1 view .LVU688
1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
2028 .loc 1 1658 3 view .LVU689
2029 .loc 1 1658 38 is_stmt 0 view .LVU690
2030 0004 013B subs r3, r3, #1
2031 .LVL155:
2032 .loc 1 1658 38 view .LVU691
2033 0006 DBB2 uxtb r3, r3
2034 .loc 1 1658 6 view .LVU692
2035 0008 012B cmp r3, #1
2036 000a 05D9 bls .L154
1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Disable the selected interrupts */
1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_DISABLE_IT(hcan, InactiveITs);
1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */
1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK;
1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
2037 .loc 1 1670 5 is_stmt 1 view .LVU693
2038 .loc 1 1670 9 is_stmt 0 view .LVU694
2039 000c 436A ldr r3, [r0, #36]
2040 .loc 1 1670 21 view .LVU695
2041 000e 43F48023 orr r3, r3, #262144
2042 0012 4362 str r3, [r0, #36]
1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR;
2043 .loc 1 1672 5 is_stmt 1 view .LVU696
2044 .loc 1 1672 12 is_stmt 0 view .LVU697
2045 0014 0120 movs r0, #1
2046 .LVL156:
1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2047 .loc 1 1674 1 view .LVU698
2048 0016 7047 bx lr
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 89
restructured repo
2024-05-12 14:08:58 +02:00
2049 .LVL157:
2050 .L154:
1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2051 .loc 1 1662 5 is_stmt 1 view .LVU699
2052 0018 0268 ldr r2, [r0]
2053 001a 5369 ldr r3, [r2, #20]
2054 001c 23EA0103 bic r3, r3, r1
2055 0020 5361 str r3, [r2, #20]
1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2056 .loc 1 1665 5 view .LVU700
1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2057 .loc 1 1665 12 is_stmt 0 view .LVU701
2058 0022 0020 movs r0, #0
2059 .LVL158:
1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2060 .loc 1 1665 12 view .LVU702
2061 0024 7047 bx lr
2062 .cfi_endproc
2063 .LFE148:
2065 .section .text.HAL_CAN_TxMailbox0CompleteCallback,"ax",%progbits
2066 .align 1
2067 .weak HAL_CAN_TxMailbox0CompleteCallback
2068 .syntax unified
2069 .thumb
2070 .thumb_func
2072 HAL_CAN_TxMailbox0CompleteCallback:
2073 .LVL159:
2074 .LFB150:
1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Handles CAN interrupt request
1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE;
1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER);
1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR);
1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR);
1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R);
1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R);
1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR);
1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox empty interrupt management *****************************/
1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U)
1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 0 management *****************************************/
1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP0) != 0U)
1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */
1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0);
1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK0) != 0U)
1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 0 complete callback */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 90
restructured repo
2024-05-12 14:08:58 +02:00
1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback(hcan);
1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox0CompleteCallback(hcan);
1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST0) != 0U)
1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST0;
1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR0) != 0U)
1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR0;
1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 0 abort callback */
1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback(hcan);
1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox0AbortCallback(hcan);
1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 1 management *****************************************/
1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP1) != 0U)
1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */
1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1);
1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK1) != 0U)
1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 1 complete callback */
1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback(hcan);
1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox1CompleteCallback(hcan);
1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST1) != 0U)
1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST1;
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 91
restructured repo
2024-05-12 14:08:58 +02:00
1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR1) != 0U)
1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR1;
1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 1 abort callback */
1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback(hcan);
1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox1AbortCallback(hcan);
1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 2 management *****************************************/
1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP2) != 0U)
1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */
1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2);
1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK2) != 0U)
1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 2 complete callback */
1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback(hcan);
1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox2CompleteCallback(hcan);
1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST2) != 0U)
1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST2;
1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR2) != 0U)
1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR2;
1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 2 abort callback */
1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback(hcan);
1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 92
restructured repo
2024-05-12 14:08:58 +02:00
1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox2AbortCallback(hcan);
1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 overrun interrupt management *****************************/
1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U)
1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FOVR0) != 0U)
1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Rx Fifo 0 overrun error */
1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV0;
1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO0 Overrun Flag */
1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0);
1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 full interrupt management ********************************/
1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U)
1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FULL0) != 0U)
1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO 0 full Flag */
1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0);
1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 full Callback */
1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback(hcan);
1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo0FullCallback(hcan);
1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 message pending interrupt management *********************/
1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U)
1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if message is still pending */
1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U)
1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 message pending Callback */
1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback(hcan);
1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo0MsgPendingCallback(hcan);
1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 overrun interrupt management *****************************/
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 93
restructured repo
2024-05-12 14:08:58 +02:00
1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U)
1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FOVR1) != 0U)
1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Rx Fifo 1 overrun error */
1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV1;
1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO1 Overrun Flag */
1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1);
1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 full interrupt management ********************************/
1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U)
1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FULL1) != 0U)
1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO 1 full Flag */
1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1);
1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 full Callback */
1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback(hcan);
1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo1FullCallback(hcan);
1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 message pending interrupt management *********************/
1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U)
1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if message is still pending */
1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U)
1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 message pending Callback */
1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback(hcan);
1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo1MsgPendingCallback(hcan);
1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep interrupt management *********************************************/
1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_SLEEP_ACK) != 0U)
1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_SLAKI) != 0U)
1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear Sleep interrupt Flag */
1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI);
1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep Callback */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 94
restructured repo
2024-05-12 14:08:58 +02:00
1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback(hcan);
1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_SleepCallback(hcan);
1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* WakeUp interrupt management *********************************************/
1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_WAKEUP) != 0U)
1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_WKUI) != 0U)
1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear WakeUp Flag */
1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU);
1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* WakeUp Callback */
1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback(hcan);
1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_WakeUpFromRxMsgCallback(hcan);
1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Error interrupts management *********************************************/
1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_ERROR) != 0U)
1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_ERRI) != 0U)
1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Error Warning Flag */
1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) &&
1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U))
1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Error Warning */
1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EWG;
1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Warning Flag as read-only */
1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Error Passive Flag */
1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) &&
1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U))
1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Error Passive */
1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EPV;
1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Passive Flag as read-only */
1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Bus-off Flag */
1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_BUSOFF) != 0U) &&
1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U))
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 95
restructured repo
2024-05-12 14:08:58 +02:00
1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bus-Off */
1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BOF;
1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Bus-Off as read-only */
1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Last Error Code Flag */
1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) &&
1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U))
1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (esrflags & CAN_ESR_LEC)
2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_0):
2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Stuff error */
2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_STF;
2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1):
2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Form error */
2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_FOR;
2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Acknowledgement error */
2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_ACK;
2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2):
2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bit recessive error */
2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BR;
2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bit Dominant error */
2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BD;
2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to CRC error */
2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_CRC;
2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default:
2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear Last error code Flag */
2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC);
2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear ERRI Flag */
2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI);
2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call the Error call Back in case of Errors */
2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (errorcode != HAL_CAN_ERROR_NONE)
2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code in handle */
2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= errorcode;
2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call Error callback function */
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 96
restructured repo
2024-05-12 14:08:58 +02:00
2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/
2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback(hcan);
2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else
2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */
2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_ErrorCallback(hcan);
2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @}
2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group5 Callback functions
2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN Callback functions
2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim
2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Callback functions #####
2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..]
2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This subsection provides the following callback functions:
2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox0CompleteCallback
2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox1CompleteCallback
2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox2CompleteCallback
2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox0AbortCallback
2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox1AbortCallback
2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox2AbortCallback
2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo0MsgPendingCallback
2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo0FullCallback
2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo1MsgPendingCallback
2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo1FullCallback
2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_SleepCallback
2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_WakeUpFromRxMsgCallback
2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ErrorCallback
2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim
2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 0 complete callback.
2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan)
2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2075 .loc 1 2094 1 is_stmt 1 view -0
2076 .cfi_startproc
2077 @ args = 0, pretend = 0, frame = 0
2078 @ frame_needed = 0, uses_anonymous_args = 0
2079 @ link register save eliminated.
2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2080 .loc 1 2096 3 view .LVU704
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 97
restructured repo
2024-05-12 14:08:58 +02:00
2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the
2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2081 .loc 1 2102 1 is_stmt 0 view .LVU705
2082 0000 7047 bx lr
2083 .cfi_endproc
2084 .LFE150:
2086 .section .text.HAL_CAN_TxMailbox1CompleteCallback,"ax",%progbits
2087 .align 1
2088 .weak HAL_CAN_TxMailbox1CompleteCallback
2089 .syntax unified
2090 .thumb
2091 .thumb_func
2093 HAL_CAN_TxMailbox1CompleteCallback:
2094 .LVL160:
2095 .LFB151:
2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 1 complete callback.
2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan)
2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2096 .loc 1 2111 1 is_stmt 1 view -0
2097 .cfi_startproc
2098 @ args = 0, pretend = 0, frame = 0
2099 @ frame_needed = 0, uses_anonymous_args = 0
2100 @ link register save eliminated.
2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2101 .loc 1 2113 3 view .LVU707
2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the
2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2102 .loc 1 2119 1 is_stmt 0 view .LVU708
2103 0000 7047 bx lr
2104 .cfi_endproc
2105 .LFE151:
2107 .section .text.HAL_CAN_TxMailbox2CompleteCallback,"ax",%progbits
2108 .align 1
2109 .weak HAL_CAN_TxMailbox2CompleteCallback
2110 .syntax unified
2111 .thumb
2112 .thumb_func
2114 HAL_CAN_TxMailbox2CompleteCallback:
2115 .LVL161:
2116 .LFB152:
2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 98
restructured repo
2024-05-12 14:08:58 +02:00
2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 2 complete callback.
2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan)
2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2117 .loc 1 2128 1 is_stmt 1 view -0
2118 .cfi_startproc
2119 @ args = 0, pretend = 0, frame = 0
2120 @ frame_needed = 0, uses_anonymous_args = 0
2121 @ link register save eliminated.
2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2122 .loc 1 2130 3 view .LVU710
2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the
2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2123 .loc 1 2136 1 is_stmt 0 view .LVU711
2124 0000 7047 bx lr
2125 .cfi_endproc
2126 .LFE152:
2128 .section .text.HAL_CAN_TxMailbox0AbortCallback,"ax",%progbits
2129 .align 1
2130 .weak HAL_CAN_TxMailbox0AbortCallback
2131 .syntax unified
2132 .thumb
2133 .thumb_func
2135 HAL_CAN_TxMailbox0AbortCallback:
2136 .LVL162:
2137 .LFB153:
2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 0 Cancellation callback.
2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan)
2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2138 .loc 1 2145 1 is_stmt 1 view -0
2139 .cfi_startproc
2140 @ args = 0, pretend = 0, frame = 0
2141 @ frame_needed = 0, uses_anonymous_args = 0
2142 @ link register save eliminated.
2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2143 .loc 1 2147 3 view .LVU713
2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox0AbortCallback could be implemented in the
2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 99
restructured repo
2024-05-12 14:08:58 +02:00
2144 .loc 1 2153 1 is_stmt 0 view .LVU714
2145 0000 7047 bx lr
2146 .cfi_endproc
2147 .LFE153:
2149 .section .text.HAL_CAN_TxMailbox1AbortCallback,"ax",%progbits
2150 .align 1
2151 .weak HAL_CAN_TxMailbox1AbortCallback
2152 .syntax unified
2153 .thumb
2154 .thumb_func
2156 HAL_CAN_TxMailbox1AbortCallback:
2157 .LVL163:
2158 .LFB154:
2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 1 Cancellation callback.
2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan)
2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2159 .loc 1 2162 1 is_stmt 1 view -0
2160 .cfi_startproc
2161 @ args = 0, pretend = 0, frame = 0
2162 @ frame_needed = 0, uses_anonymous_args = 0
2163 @ link register save eliminated.
2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2164 .loc 1 2164 3 view .LVU716
2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox1AbortCallback could be implemented in the
2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2165 .loc 1 2170 1 is_stmt 0 view .LVU717
2166 0000 7047 bx lr
2167 .cfi_endproc
2168 .LFE154:
2170 .section .text.HAL_CAN_TxMailbox2AbortCallback,"ax",%progbits
2171 .align 1
2172 .weak HAL_CAN_TxMailbox2AbortCallback
2173 .syntax unified
2174 .thumb
2175 .thumb_func
2177 HAL_CAN_TxMailbox2AbortCallback:
2178 .LVL164:
2179 .LFB155:
2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 2 Cancellation callback.
2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains
2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan)
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 100
restructured repo
2024-05-12 14:08:58 +02:00
2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2180 .loc 1 2179 1 is_stmt 1 view -0
2181 .cfi_startproc
2182 @ args = 0, pretend = 0, frame = 0
2183 @ frame_needed = 0, uses_anonymous_args = 0
2184 @ link register save eliminated.
2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2185 .loc 1 2181 3 view .LVU719
2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox2AbortCallback could be implemented in the
2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2186 .loc 1 2187 1 is_stmt 0 view .LVU720
2187 0000 7047 bx lr
2188 .cfi_endproc
2189 .LFE155:
2191 .section .text.HAL_CAN_RxFifo0MsgPendingCallback,"ax",%progbits
2192 .align 1
2193 .weak HAL_CAN_RxFifo0MsgPendingCallback
2194 .syntax unified
2195 .thumb
2196 .thumb_func
2198 HAL_CAN_RxFifo0MsgPendingCallback:
2199 .LVL165:
2200 .LFB156:
2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 0 message pending callback.
2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)
2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2201 .loc 1 2196 1 is_stmt 1 view -0
2202 .cfi_startproc
2203 @ args = 0, pretend = 0, frame = 0
2204 @ frame_needed = 0, uses_anonymous_args = 0
2205 @ link register save eliminated.
2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2206 .loc 1 2198 3 view .LVU722
2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the
2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2207 .loc 1 2204 1 is_stmt 0 view .LVU723
2208 0000 7047 bx lr
2209 .cfi_endproc
2210 .LFE156:
2212 .section .text.HAL_CAN_RxFifo0FullCallback,"ax",%progbits
2213 .align 1
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 101
restructured repo
2024-05-12 14:08:58 +02:00
2214 .weak HAL_CAN_RxFifo0FullCallback
2215 .syntax unified
2216 .thumb
2217 .thumb_func
2219 HAL_CAN_RxFifo0FullCallback:
2220 .LVL166:
2221 .LFB157:
2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 0 full callback.
2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan)
2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2222 .loc 1 2213 1 is_stmt 1 view -0
2223 .cfi_startproc
2224 @ args = 0, pretend = 0, frame = 0
2225 @ frame_needed = 0, uses_anonymous_args = 0
2226 @ link register save eliminated.
2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2227 .loc 1 2215 3 view .LVU725
2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo0FullCallback could be implemented in the user
2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** file
2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2228 .loc 1 2221 1 is_stmt 0 view .LVU726
2229 0000 7047 bx lr
2230 .cfi_endproc
2231 .LFE157:
2233 .section .text.HAL_CAN_RxFifo1MsgPendingCallback,"ax",%progbits
2234 .align 1
2235 .weak HAL_CAN_RxFifo1MsgPendingCallback
2236 .syntax unified
2237 .thumb
2238 .thumb_func
2240 HAL_CAN_RxFifo1MsgPendingCallback:
2241 .LVL167:
2242 .LFB158:
2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 1 message pending callback.
2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan)
2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2243 .loc 1 2230 1 is_stmt 1 view -0
2244 .cfi_startproc
2245 @ args = 0, pretend = 0, frame = 0
2246 @ frame_needed = 0, uses_anonymous_args = 0
2247 @ link register save eliminated.
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 102
restructured repo
2024-05-12 14:08:58 +02:00
2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2248 .loc 1 2232 3 view .LVU728
2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the
2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2249 .loc 1 2238 1 is_stmt 0 view .LVU729
2250 0000 7047 bx lr
2251 .cfi_endproc
2252 .LFE158:
2254 .section .text.HAL_CAN_RxFifo1FullCallback,"ax",%progbits
2255 .align 1
2256 .weak HAL_CAN_RxFifo1FullCallback
2257 .syntax unified
2258 .thumb
2259 .thumb_func
2261 HAL_CAN_RxFifo1FullCallback:
2262 .LVL168:
2263 .LFB159:
2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 1 full callback.
2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan)
2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2264 .loc 1 2247 1 is_stmt 1 view -0
2265 .cfi_startproc
2266 @ args = 0, pretend = 0, frame = 0
2267 @ frame_needed = 0, uses_anonymous_args = 0
2268 @ link register save eliminated.
2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2269 .loc 1 2249 3 view .LVU731
2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo1FullCallback could be implemented in the user
2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** file
2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2270 .loc 1 2255 1 is_stmt 0 view .LVU732
2271 0000 7047 bx lr
2272 .cfi_endproc
2273 .LFE159:
2275 .section .text.HAL_CAN_SleepCallback,"ax",%progbits
2276 .align 1
2277 .weak HAL_CAN_SleepCallback
2278 .syntax unified
2279 .thumb
2280 .thumb_func
2282 HAL_CAN_SleepCallback:
2283 .LVL169:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 103
restructured repo
2024-05-12 14:08:58 +02:00
2284 .LFB160:
2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Sleep callback.
2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan)
2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2285 .loc 1 2264 1 is_stmt 1 view -0
2286 .cfi_startproc
2287 @ args = 0, pretend = 0, frame = 0
2288 @ frame_needed = 0, uses_anonymous_args = 0
2289 @ link register save eliminated.
2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2290 .loc 1 2266 3 view .LVU734
2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_SleepCallback could be implemented in the user file
2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2291 .loc 1 2271 1 is_stmt 0 view .LVU735
2292 0000 7047 bx lr
2293 .cfi_endproc
2294 .LFE160:
2296 .section .text.HAL_CAN_WakeUpFromRxMsgCallback,"ax",%progbits
2297 .align 1
2298 .weak HAL_CAN_WakeUpFromRxMsgCallback
2299 .syntax unified
2300 .thumb
2301 .thumb_func
2303 HAL_CAN_WakeUpFromRxMsgCallback:
2304 .LVL170:
2305 .LFB161:
2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief WakeUp from Rx message callback.
2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan)
2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2306 .loc 1 2280 1 is_stmt 1 view -0
2307 .cfi_startproc
2308 @ args = 0, pretend = 0, frame = 0
2309 @ frame_needed = 0, uses_anonymous_args = 0
2310 @ link register save eliminated.
2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2311 .loc 1 2282 3 view .LVU737
2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the
2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 104
restructured repo
2024-05-12 14:08:58 +02:00
2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2312 .loc 1 2288 1 is_stmt 0 view .LVU738
2313 0000 7047 bx lr
2314 .cfi_endproc
2315 .LFE161:
2317 .section .text.HAL_CAN_ErrorCallback,"ax",%progbits
2318 .align 1
2319 .weak HAL_CAN_ErrorCallback
2320 .syntax unified
2321 .thumb
2322 .thumb_func
2324 HAL_CAN_ErrorCallback:
2325 .LVL171:
2326 .LFB162:
2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Error CAN callback.
2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None
2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2327 .loc 1 2297 1 is_stmt 1 view -0
2328 .cfi_startproc
2329 @ args = 0, pretend = 0, frame = 0
2330 @ frame_needed = 0, uses_anonymous_args = 0
2331 @ link register save eliminated.
2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */
2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan);
2332 .loc 1 2299 3 view .LVU740
2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed,
2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_ErrorCallback could be implemented in the user file
2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2333 .loc 1 2304 1 is_stmt 0 view .LVU741
2334 0000 7047 bx lr
2335 .cfi_endproc
2336 .LFE162:
2338 .section .text.HAL_CAN_IRQHandler,"ax",%progbits
2339 .align 1
2340 .global HAL_CAN_IRQHandler
2341 .syntax unified
2342 .thumb
2343 .thumb_func
2345 HAL_CAN_IRQHandler:
2346 .LVL172:
2347 .LFB149:
1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE;
2348 .loc 1 1683 1 is_stmt 1 view -0
2349 .cfi_startproc
2350 @ args = 0, pretend = 0, frame = 0
2351 @ frame_needed = 0, uses_anonymous_args = 0
1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE;
2352 .loc 1 1683 1 is_stmt 0 view .LVU743
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 105
restructured repo
2024-05-12 14:08:58 +02:00
2353 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
2354 .cfi_def_cfa_offset 40
2355 .cfi_offset 3, -40
2356 .cfi_offset 4, -36
2357 .cfi_offset 5, -32
2358 .cfi_offset 6, -28
2359 .cfi_offset 7, -24
2360 .cfi_offset 8, -20
2361 .cfi_offset 9, -16
2362 .cfi_offset 10, -12
2363 .cfi_offset 11, -8
2364 .cfi_offset 14, -4
2365 0004 0546 mov r5, r0
1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER);
2366 .loc 1 1684 3 is_stmt 1 view .LVU744
2367 .LVL173:
1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR);
2368 .loc 1 1685 3 view .LVU745
1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR);
2369 .loc 1 1685 25 is_stmt 0 view .LVU746
2370 0006 0368 ldr r3, [r0]
1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR);
2371 .loc 1 1685 12 view .LVU747
2372 0008 5C69 ldr r4, [r3, #20]
2373 .LVL174:
1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR);
2374 .loc 1 1686 3 is_stmt 1 view .LVU748
1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR);
2375 .loc 1 1686 12 is_stmt 0 view .LVU749
2376 000a D3F80480 ldr r8, [r3, #4]
2377 .LVL175:
1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R);
2378 .loc 1 1687 3 is_stmt 1 view .LVU750
1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R);
2379 .loc 1 1687 12 is_stmt 0 view .LVU751
2380 000e 9F68 ldr r7, [r3, #8]
2381 .LVL176:
1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R);
2382 .loc 1 1688 3 is_stmt 1 view .LVU752
1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R);
2383 .loc 1 1688 12 is_stmt 0 view .LVU753
2384 0010 D3F80CB0 ldr fp, [r3, #12]
2385 .LVL177:
1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR);
2386 .loc 1 1689 3 is_stmt 1 view .LVU754
1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR);
2387 .loc 1 1689 12 is_stmt 0 view .LVU755
2388 0014 D3F810A0 ldr r10, [r3, #16]
2389 .LVL178:
1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2390 .loc 1 1690 3 is_stmt 1 view .LVU756
1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2391 .loc 1 1690 12 is_stmt 0 view .LVU757
2392 0018 D3F81890 ldr r9, [r3, #24]
2393 .LVL179:
1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2394 .loc 1 1693 3 is_stmt 1 view .LVU758
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 106
restructured repo
2024-05-12 14:08:58 +02:00
1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2395 .loc 1 1693 6 is_stmt 0 view .LVU759
2396 001c 14F00106 ands r6, r4, #1
2397 0020 3BD0 beq .L169
1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2398 .loc 1 1696 5 is_stmt 1 view .LVU760
1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2399 .loc 1 1696 8 is_stmt 0 view .LVU761
2400 0022 17F00106 ands r6, r7, #1
2401 0026 16D0 beq .L170
1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2402 .loc 1 1699 7 is_stmt 1 view .LVU762
2403 0028 0122 movs r2, #1
2404 002a 9A60 str r2, [r3, #8]
1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2405 .loc 1 1701 7 view .LVU763
1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2406 .loc 1 1701 10 is_stmt 0 view .LVU764
2407 002c 17F0020F tst r7, #2
2408 0030 08D1 bne .L204
1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2409 .loc 1 1714 9 is_stmt 1 view .LVU765
1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2410 .loc 1 1714 12 is_stmt 0 view .LVU766
2411 0032 17F0040F tst r7, #4
2412 0036 0CD1 bne .L201
1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2413 .loc 1 1719 14 is_stmt 1 view .LVU767
1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2414 .loc 1 1719 17 is_stmt 0 view .LVU768
2415 0038 17F00806 ands r6, r7, #8
2416 003c 06D0 beq .L205
1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2417 .loc 1 1722 21 view .LVU769
2418 003e 4FF48056 mov r6, #4096
2419 0042 08E0 b .L170
2420 .L204:
1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2421 .loc 1 1709 9 is_stmt 1 view .LVU770
2422 0044 FFF7FEFF bl HAL_CAN_TxMailbox0CompleteCallback
2423 .LVL180:
1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER);
2424 .loc 1 1684 12 is_stmt 0 view .LVU771
2425 0048 0026 movs r6, #0
2426 004a 04E0 b .L170
2427 .LVL181:
2428 .L205:
1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2429 .loc 1 1732 11 is_stmt 1 view .LVU772
2430 004c FFF7FEFF bl HAL_CAN_TxMailbox0AbortCallback
2431 .LVL182:
1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2432 .loc 1 1732 11 is_stmt 0 view .LVU773
2433 0050 01E0 b .L170
2434 .LVL183:
2435 .L201:
1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 107
restructured repo
2024-05-12 14:08:58 +02:00
2436 .loc 1 1717 21 view .LVU774
2437 0052 4FF40066 mov r6, #2048
2438 .LVL184:
2439 .L170:
1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2440 .loc 1 1739 5 is_stmt 1 view .LVU775
1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2441 .loc 1 1739 8 is_stmt 0 view .LVU776
2442 0056 17F4807F tst r7, #256
2443 005a 0DD0 beq .L172
1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2444 .loc 1 1742 7 is_stmt 1 view .LVU777
2445 005c 2B68 ldr r3, [r5]
2446 005e 4FF48072 mov r2, #256
2447 0062 9A60 str r2, [r3, #8]
1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2448 .loc 1 1744 7 view .LVU778
1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2449 .loc 1 1744 10 is_stmt 0 view .LVU779
2450 0064 17F4007F tst r7, #512
2451 0068 40F08680 bne .L206
1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2452 .loc 1 1757 9 is_stmt 1 view .LVU780
1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2453 .loc 1 1757 12 is_stmt 0 view .LVU781
2454 006c 17F4806F tst r7, #1024
2455 0070 00F08680 beq .L174
1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2456 .loc 1 1760 11 is_stmt 1 view .LVU782
1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2457 .loc 1 1760 21 is_stmt 0 view .LVU783
2458 0074 46F40056 orr r6, r6, #8192
2459 .LVL185:
2460 .L172:
1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2461 .loc 1 1782 5 is_stmt 1 view .LVU784
1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2462 .loc 1 1782 8 is_stmt 0 view .LVU785
2463 0078 17F4803F tst r7, #65536
2464 007c 0DD0 beq .L169
1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2465 .loc 1 1785 7 is_stmt 1 view .LVU786
2466 007e 2B68 ldr r3, [r5]
2467 0080 4FF48032 mov r2, #65536
2468 0084 9A60 str r2, [r3, #8]
1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2469 .loc 1 1787 7 view .LVU787
1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2470 .loc 1 1787 10 is_stmt 0 view .LVU788
2471 0086 17F4003F tst r7, #131072
2472 008a 40F08380 bne .L207
1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2473 .loc 1 1800 9 is_stmt 1 view .LVU789
1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2474 .loc 1 1800 12 is_stmt 0 view .LVU790
2475 008e 17F4802F tst r7, #262144
2476 0092 00F08380 beq .L177
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 108
restructured repo
2024-05-12 14:08:58 +02:00
1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2477 .loc 1 1803 11 is_stmt 1 view .LVU791
1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2478 .loc 1 1803 21 is_stmt 0 view .LVU792
2479 0096 46F40046 orr r6, r6, #32768
2480 .LVL186:
2481 .L169:
1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2482 .loc 1 1826 3 is_stmt 1 view .LVU793
1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2483 .loc 1 1826 6 is_stmt 0 view .LVU794
2484 009a 14F0080F tst r4, #8
2485 009e 07D0 beq .L179
1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2486 .loc 1 1828 5 is_stmt 1 view .LVU795
1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2487 .loc 1 1828 8 is_stmt 0 view .LVU796
2488 00a0 1BF0100F tst fp, #16
2489 00a4 04D0 beq .L179
1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2490 .loc 1 1831 7 is_stmt 1 view .LVU797
1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2491 .loc 1 1831 17 is_stmt 0 view .LVU798
2492 00a6 46F40076 orr r6, r6, #512
2493 .LVL187:
1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2494 .loc 1 1834 7 is_stmt 1 view .LVU799
2495 00aa 2B68 ldr r3, [r5]
2496 00ac 1022 movs r2, #16
2497 00ae DA60 str r2, [r3, #12]
2498 .L179:
1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2499 .loc 1 1839 3 view .LVU800
1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2500 .loc 1 1839 6 is_stmt 0 view .LVU801
2501 00b0 14F0040F tst r4, #4
2502 00b4 02D0 beq .L180
1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2503 .loc 1 1841 5 is_stmt 1 view .LVU802
1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2504 .loc 1 1841 8 is_stmt 0 view .LVU803
2505 00b6 1BF0080F tst fp, #8
2506 00ba 79D1 bne .L208
2507 .L180:
1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2508 .loc 1 1858 3 is_stmt 1 view .LVU804
1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2509 .loc 1 1858 6 is_stmt 0 view .LVU805
2510 00bc 14F0020F tst r4, #2
2511 00c0 04D0 beq .L181
1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2512 .loc 1 1861 5 is_stmt 1 view .LVU806
1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2513 .loc 1 1861 14 is_stmt 0 view .LVU807
2514 00c2 2B68 ldr r3, [r5]
1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2515 .loc 1 1861 24 view .LVU808
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 109
restructured repo
2024-05-12 14:08:58 +02:00
2516 00c4 DB68 ldr r3, [r3, #12]
1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2517 .loc 1 1861 8 view .LVU809
2518 00c6 13F0030F tst r3, #3
2519 00ca 78D1 bne .L209
2520 .L181:
1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2521 .loc 1 1875 3 is_stmt 1 view .LVU810
1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2522 .loc 1 1875 6 is_stmt 0 view .LVU811
2523 00cc 14F0400F tst r4, #64
2524 00d0 07D0 beq .L182
1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2525 .loc 1 1877 5 is_stmt 1 view .LVU812
1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2526 .loc 1 1877 8 is_stmt 0 view .LVU813
2527 00d2 1AF0100F tst r10, #16
2528 00d6 04D0 beq .L182
1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2529 .loc 1 1880 7 is_stmt 1 view .LVU814
1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2530 .loc 1 1880 17 is_stmt 0 view .LVU815
2531 00d8 46F48066 orr r6, r6, #1024
2532 .LVL188:
1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2533 .loc 1 1883 7 is_stmt 1 view .LVU816
2534 00dc 2B68 ldr r3, [r5]
2535 00de 1022 movs r2, #16
2536 00e0 1A61 str r2, [r3, #16]
2537 .L182:
1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2538 .loc 1 1888 3 view .LVU817
1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2539 .loc 1 1888 6 is_stmt 0 view .LVU818
2540 00e2 14F0200F tst r4, #32
2541 00e6 02D0 beq .L183
1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2542 .loc 1 1890 5 is_stmt 1 view .LVU819
1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2543 .loc 1 1890 8 is_stmt 0 view .LVU820
2544 00e8 1AF0080F tst r10, #8
2545 00ec 6BD1 bne .L210
2546 .L183:
1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2547 .loc 1 1907 3 is_stmt 1 view .LVU821
1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2548 .loc 1 1907 6 is_stmt 0 view .LVU822
2549 00ee 14F0100F tst r4, #16
2550 00f2 04D0 beq .L184
1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2551 .loc 1 1910 5 is_stmt 1 view .LVU823
1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2552 .loc 1 1910 14 is_stmt 0 view .LVU824
2553 00f4 2B68 ldr r3, [r5]
1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2554 .loc 1 1910 24 view .LVU825
2555 00f6 1B69 ldr r3, [r3, #16]
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 110
restructured repo
2024-05-12 14:08:58 +02:00
1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2556 .loc 1 1910 8 view .LVU826
2557 00f8 13F0030F tst r3, #3
2558 00fc 6AD1 bne .L211
2559 .L184:
1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2560 .loc 1 1924 3 is_stmt 1 view .LVU827
1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2561 .loc 1 1924 6 is_stmt 0 view .LVU828
2562 00fe 14F4003F tst r4, #131072
2563 0102 02D0 beq .L185
1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2564 .loc 1 1926 5 is_stmt 1 view .LVU829
1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2565 .loc 1 1926 8 is_stmt 0 view .LVU830
2566 0104 18F0100F tst r8, #16
2567 0108 68D1 bne .L212
2568 .L185:
1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2569 .loc 1 1943 3 is_stmt 1 view .LVU831
1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2570 .loc 1 1943 6 is_stmt 0 view .LVU832
2571 010a 14F4803F tst r4, #65536
2572 010e 02D0 beq .L186
1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2573 .loc 1 1945 5 is_stmt 1 view .LVU833
1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2574 .loc 1 1945 8 is_stmt 0 view .LVU834
2575 0110 18F0080F tst r8, #8
2576 0114 69D1 bne .L213
2577 .L186:
1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2578 .loc 1 1962 3 is_stmt 1 view .LVU835
1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2579 .loc 1 1962 6 is_stmt 0 view .LVU836
2580 0116 14F4004F tst r4, #32768
2581 011a 7AD0 beq .L187
1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2582 .loc 1 1964 5 is_stmt 1 view .LVU837
1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2583 .loc 1 1964 8 is_stmt 0 view .LVU838
2584 011c 18F0040F tst r8, #4
2585 0120 74D0 beq .L188
1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U))
2586 .loc 1 1967 7 is_stmt 1 view .LVU839
1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U))
2587 .loc 1 1967 10 is_stmt 0 view .LVU840
2588 0122 14F4807F tst r4, #256
2589 0126 04D0 beq .L189
1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U))
2590 .loc 1 1967 55 discriminator 1 view .LVU841
2591 0128 19F0010F tst r9, #1
2592 012c 01D0 beq .L189
1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2593 .loc 1 1971 9 is_stmt 1 view .LVU842
1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2594 .loc 1 1971 19 is_stmt 0 view .LVU843
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 111
restructured repo
2024-05-12 14:08:58 +02:00
2595 012e 46F00106 orr r6, r6, #1
2596 .LVL189:
2597 .L189:
1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U))
2598 .loc 1 1977 7 is_stmt 1 view .LVU844
1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U))
2599 .loc 1 1977 10 is_stmt 0 view .LVU845
2600 0132 14F4007F tst r4, #512
2601 0136 04D0 beq .L190
1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U))
2602 .loc 1 1977 55 discriminator 1 view .LVU846
2603 0138 19F0020F tst r9, #2
2604 013c 01D0 beq .L190
1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2605 .loc 1 1981 9 is_stmt 1 view .LVU847
1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2606 .loc 1 1981 19 is_stmt 0 view .LVU848
2607 013e 46F00206 orr r6, r6, #2
2608 .LVL190:
2609 .L190:
1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U))
2610 .loc 1 1987 7 is_stmt 1 view .LVU849
1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U))
2611 .loc 1 1987 10 is_stmt 0 view .LVU850
2612 0142 14F4806F tst r4, #1024
2613 0146 04D0 beq .L191
1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U))
2614 .loc 1 1987 48 discriminator 1 view .LVU851
2615 0148 19F0040F tst r9, #4
2616 014c 01D0 beq .L191
1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2617 .loc 1 1991 9 is_stmt 1 view .LVU852
1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2618 .loc 1 1991 19 is_stmt 0 view .LVU853
2619 014e 46F00406 orr r6, r6, #4
2620 .LVL191:
2621 .L191:
1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U))
2622 .loc 1 1997 7 is_stmt 1 view .LVU854
1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U))
2623 .loc 1 1997 10 is_stmt 0 view .LVU855
2624 0152 14F4006F tst r4, #2048
2625 0156 59D0 beq .L188
1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U))
2626 .loc 1 1997 57 discriminator 1 view .LVU856
2627 0158 19F07009 ands r9, r9, #112
2628 .LVL192:
1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U))
2629 .loc 1 1997 57 discriminator 1 view .LVU857
2630 015c 56D0 beq .L188
2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2631 .loc 1 2000 9 is_stmt 1 view .LVU858
2632 015e B9F1400F cmp r9, #64
2633 0162 65D0 beq .L192
2634 0164 58D8 bhi .L193
2635 0166 B9F1200F cmp r9, #32
2636 016a 5ED0 beq .L194
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 112
restructured repo
2024-05-12 14:08:58 +02:00
2637 016c B9F1300F cmp r9, #48
2638 0170 42D1 bne .L214
2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2639 .loc 1 2012 13 view .LVU859
2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2640 .loc 1 2012 23 is_stmt 0 view .LVU860
2641 0172 46F02006 orr r6, r6, #32
2642 .LVL193:
2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2):
2643 .loc 1 2013 13 is_stmt 1 view .LVU861
2644 0176 44E0 b .L197
2645 .LVL194:
2646 .L206:
1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2647 .loc 1 1752 9 view .LVU862
2648 0178 2846 mov r0, r5
2649 017a FFF7FEFF bl HAL_CAN_TxMailbox1CompleteCallback
2650 .LVL195:
2651 017e 7BE7 b .L172
2652 .L174:
1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2653 .loc 1 1762 14 view .LVU863
1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2654 .loc 1 1762 17 is_stmt 0 view .LVU864
2655 0180 17F4006F tst r7, #2048
2656 0184 02D0 beq .L175
1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2657 .loc 1 1765 11 is_stmt 1 view .LVU865
1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2658 .loc 1 1765 21 is_stmt 0 view .LVU866
2659 0186 46F48046 orr r6, r6, #16384
2660 .LVL196:
1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2661 .loc 1 1765 21 view .LVU867
2662 018a 75E7 b .L172
2663 .L175:
1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2664 .loc 1 1775 11 is_stmt 1 view .LVU868
2665 018c 2846 mov r0, r5
2666 018e FFF7FEFF bl HAL_CAN_TxMailbox1AbortCallback
2667 .LVL197:
2668 0192 71E7 b .L172
2669 .L207:
1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2670 .loc 1 1795 9 view .LVU869
2671 0194 2846 mov r0, r5
2672 0196 FFF7FEFF bl HAL_CAN_TxMailbox2CompleteCallback
2673 .LVL198:
2674 019a 7EE7 b .L169
2675 .L177:
1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2676 .loc 1 1805 14 view .LVU870
1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2677 .loc 1 1805 17 is_stmt 0 view .LVU871
2678 019c 17F4002F tst r7, #524288
2679 01a0 02D0 beq .L178
1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 113
restructured repo
2024-05-12 14:08:58 +02:00
2680 .loc 1 1808 11 is_stmt 1 view .LVU872
1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2681 .loc 1 1808 21 is_stmt 0 view .LVU873
2682 01a2 46F48036 orr r6, r6, #65536
2683 .LVL199:
1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2684 .loc 1 1808 21 view .LVU874
2685 01a6 78E7 b .L169
2686 .L178:
1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2687 .loc 1 1818 11 is_stmt 1 view .LVU875
2688 01a8 2846 mov r0, r5
2689 01aa FFF7FEFF bl HAL_CAN_TxMailbox2AbortCallback
2690 .LVL200:
2691 01ae 74E7 b .L169
2692 .L208:
1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2693 .loc 1 1844 7 view .LVU876
2694 01b0 2B68 ldr r3, [r5]
2695 01b2 0822 movs r2, #8
2696 01b4 DA60 str r2, [r3, #12]
1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2697 .loc 1 1852 7 view .LVU877
2698 01b6 2846 mov r0, r5
2699 01b8 FFF7FEFF bl HAL_CAN_RxFifo0FullCallback
2700 .LVL201:
2701 01bc 7EE7 b .L180
2702 .L209:
1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2703 .loc 1 1869 7 view .LVU878
2704 01be 2846 mov r0, r5
2705 01c0 FFF7FEFF bl HAL_CAN_RxFifo0MsgPendingCallback
2706 .LVL202:
2707 01c4 82E7 b .L181
2708 .L210:
1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2709 .loc 1 1893 7 view .LVU879
2710 01c6 2B68 ldr r3, [r5]
2711 01c8 0822 movs r2, #8
2712 01ca 1A61 str r2, [r3, #16]
1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2713 .loc 1 1901 7 view .LVU880
2714 01cc 2846 mov r0, r5
2715 01ce FFF7FEFF bl HAL_CAN_RxFifo1FullCallback
2716 .LVL203:
2717 01d2 8CE7 b .L183
2718 .L211:
1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2719 .loc 1 1918 7 view .LVU881
2720 01d4 2846 mov r0, r5
2721 01d6 FFF7FEFF bl HAL_CAN_RxFifo1MsgPendingCallback
2722 .LVL204:
2723 01da 90E7 b .L184
2724 .L212:
1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2725 .loc 1 1929 7 view .LVU882
2726 01dc 2B68 ldr r3, [r5]
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 114
restructured repo
2024-05-12 14:08:58 +02:00
2727 01de 1022 movs r2, #16
2728 01e0 5A60 str r2, [r3, #4]
1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2729 .loc 1 1937 7 view .LVU883
2730 01e2 2846 mov r0, r5
2731 01e4 FFF7FEFF bl HAL_CAN_SleepCallback
2732 .LVL205:
2733 01e8 8FE7 b .L185
2734 .L213:
1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2735 .loc 1 1948 7 view .LVU884
2736 01ea 2B68 ldr r3, [r5]
2737 01ec 0822 movs r2, #8
2738 01ee 5A60 str r2, [r3, #4]
1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2739 .loc 1 1956 7 view .LVU885
2740 01f0 2846 mov r0, r5
2741 01f2 FFF7FEFF bl HAL_CAN_WakeUpFromRxMsgCallback
2742 .LVL206:
2743 01f6 8EE7 b .L186
2744 .LVL207:
2745 .L214:
2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2746 .loc 1 2000 9 is_stmt 0 view .LVU886
2747 01f8 B9F1100F cmp r9, #16
2748 01fc 01D1 bne .L197
2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2749 .loc 1 2004 13 is_stmt 1 view .LVU887
2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2750 .loc 1 2004 23 is_stmt 0 view .LVU888
2751 01fe 46F00806 orr r6, r6, #8
2752 .LVL208:
2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1):
2753 .loc 1 2005 13 is_stmt 1 view .LVU889
2754 .L197:
2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2755 .loc 1 2031 9 view .LVU890
2756 0202 2A68 ldr r2, [r5]
2757 0204 9369 ldr r3, [r2, #24]
2758 0206 23F07003 bic r3, r3, #112
2759 020a 9361 str r3, [r2, #24]
2760 .L188:
2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2761 .loc 1 2036 5 view .LVU891
2762 020c 2B68 ldr r3, [r5]
2763 020e 0422 movs r2, #4
2764 0210 5A60 str r2, [r3, #4]
2765 .L187:
2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2766 .loc 1 2040 3 view .LVU892
2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2767 .loc 1 2040 6 is_stmt 0 view .LVU893
2768 0212 9EB9 cbnz r6, .L215
2769 .L168:
2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2770 .loc 1 2054 1 view .LVU894
2771 0214 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 115
restructured repo
2024-05-12 14:08:58 +02:00
2772 .LVL209:
2773 .L193:
2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2774 .loc 1 2000 9 view .LVU895
2775 0218 B9F1500F cmp r9, #80
2776 021c 0BD0 beq .L198
2777 021e B9F1600F cmp r9, #96
2778 0222 EED1 bne .L197
2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2779 .loc 1 2024 13 is_stmt 1 view .LVU896
2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2780 .loc 1 2024 23 is_stmt 0 view .LVU897
2781 0224 46F48076 orr r6, r6, #256
2782 .LVL210:
2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default:
2783 .loc 1 2025 13 is_stmt 1 view .LVU898
2784 0228 EBE7 b .L197
2785 .L194:
2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2786 .loc 1 2008 13 view .LVU899
2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2787 .loc 1 2008 23 is_stmt 0 view .LVU900
2788 022a 46F01006 orr r6, r6, #16
2789 .LVL211:
2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
2790 .loc 1 2009 13 is_stmt 1 view .LVU901
2791 022e E8E7 b .L197
2792 .L192:
2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2793 .loc 1 2016 13 view .LVU902
2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2794 .loc 1 2016 23 is_stmt 0 view .LVU903
2795 0230 46F04006 orr r6, r6, #64
2796 .LVL212:
2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
2797 .loc 1 2017 13 is_stmt 1 view .LVU904
2798 0234 E5E7 b .L197
2799 .L198:
2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2800 .loc 1 2020 13 view .LVU905
2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break;
2801 .loc 1 2020 23 is_stmt 0 view .LVU906
2802 0236 46F08006 orr r6, r6, #128
2803 .LVL213:
2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
2804 .loc 1 2021 13 is_stmt 1 view .LVU907
2805 023a E2E7 b .L197
2806 .L215:
2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2807 .loc 1 2043 5 view .LVU908
2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2808 .loc 1 2043 9 is_stmt 0 view .LVU909
2809 023c 6B6A ldr r3, [r5, #36]
2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2810 .loc 1 2043 21 view .LVU910
2811 023e 3343 orrs r3, r3, r6
2812 0240 6B62 str r3, [r5, #36]
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 116
restructured repo
2024-05-12 14:08:58 +02:00
2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
2813 .loc 1 2051 5 is_stmt 1 view .LVU911
2814 0242 2846 mov r0, r5
2815 0244 FFF7FEFF bl HAL_CAN_ErrorCallback
2816 .LVL214:
2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2817 .loc 1 2054 1 is_stmt 0 view .LVU912
2818 0248 E4E7 b .L168
2819 .cfi_endproc
2820 .LFE149:
2822 .section .text.HAL_CAN_GetState,"ax",%progbits
2823 .align 1
2824 .global HAL_CAN_GetState
2825 .syntax unified
2826 .thumb
2827 .thumb_func
2829 HAL_CAN_GetState:
2830 .LVL215:
2831 .LFB163:
2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @}
2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions
2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN Peripheral State functions
2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *
2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim
2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Peripheral State and Error functions #####
2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ==============================================================================
2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..]
2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This subsection provides functions allowing to :
2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetState() : Return the CAN state.
2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetError() : Return the CAN error codes if any.
2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ResetError(): Reset the CAN error codes if any.
2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim
2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{
2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return the CAN state.
2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL state
2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan)
2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2832 .loc 1 2334 1 is_stmt 1 view -0
2833 .cfi_startproc
2834 @ args = 0, pretend = 0, frame = 0
2835 @ frame_needed = 0, uses_anonymous_args = 0
2836 @ link register save eliminated.
2837 .loc 1 2334 1 is_stmt 0 view .LVU914
2838 0000 0246 mov r2, r0
2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 117
restructured repo
2024-05-12 14:08:58 +02:00
2839 .loc 1 2335 3 is_stmt 1 view .LVU915
2840 .loc 1 2335 24 is_stmt 0 view .LVU916
2841 0002 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
2842 0006 D8B2 uxtb r0, r3
2843 .LVL216:
2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
2844 .loc 1 2337 3 is_stmt 1 view .LVU917
2845 .loc 1 2337 38 is_stmt 0 view .LVU918
2846 0008 013B subs r3, r3, #1
2847 000a DBB2 uxtb r3, r3
2848 .loc 1 2337 6 view .LVU919
2849 000c 012B cmp r3, #1
2850 000e 00D9 bls .L220
2851 .LVL217:
2852 .L217:
2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check sleep mode acknowledge flag */
2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep mode is active */
2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_ACTIVE;
2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check sleep mode request flag */
2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U)
2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep mode request is pending */
2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_PENDING;
2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Neither sleep mode request nor sleep mode acknowledge */
2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2853 .loc 1 2355 5 is_stmt 1 view .LVU920
2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return CAN state */
2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return state;
2854 .loc 1 2359 3 view .LVU921
2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2855 .loc 1 2360 1 is_stmt 0 view .LVU922
2856 0010 7047 bx lr
2857 .LVL218:
2858 .L220:
2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2859 .loc 1 2341 5 is_stmt 1 view .LVU923
2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2860 .loc 1 2341 14 is_stmt 0 view .LVU924
2861 0012 1368 ldr r3, [r2]
2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2862 .loc 1 2341 24 view .LVU925
2863 0014 5A68 ldr r2, [r3, #4]
2864 .LVL219:
2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2865 .loc 1 2341 8 view .LVU926
2866 0016 12F0020F tst r2, #2
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 118
restructured repo
2024-05-12 14:08:58 +02:00
2867 001a 05D1 bne .L218
2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2868 .loc 1 2347 10 is_stmt 1 view .LVU927
2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2869 .loc 1 2347 29 is_stmt 0 view .LVU928
2870 001c 1B68 ldr r3, [r3]
2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2871 .loc 1 2347 13 view .LVU929
2872 001e 13F0020F tst r3, #2
2873 0022 F5D0 beq .L217
2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2874 .loc 1 2350 13 view .LVU930
2875 0024 0320 movs r0, #3
2876 .LVL220:
2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2877 .loc 1 2350 13 view .LVU931
2878 0026 F3E7 b .L217
2879 .LVL221:
2880 .L218:
2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2881 .loc 1 2344 13 view .LVU932
2882 0028 0420 movs r0, #4
2883 .LVL222:
2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2884 .loc 1 2344 13 view .LVU933
2885 002a 7047 bx lr
2886 .cfi_endproc
2887 .LFE163:
2889 .section .text.HAL_CAN_GetError,"ax",%progbits
2890 .align 1
2891 .global HAL_CAN_GetError
2892 .syntax unified
2893 .thumb
2894 .thumb_func
2896 HAL_CAN_GetError:
2897 .LVL223:
2898 .LFB164:
2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return the CAN error code.
2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval CAN Error Code
2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan)
2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2899 .loc 1 2369 1 is_stmt 1 view -0
2900 .cfi_startproc
2901 @ args = 0, pretend = 0, frame = 0
2902 @ frame_needed = 0, uses_anonymous_args = 0
2903 @ link register save eliminated.
2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return CAN error code */
2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return hcan->ErrorCode;
2904 .loc 1 2371 3 view .LVU935
2905 .loc 1 2371 14 is_stmt 0 view .LVU936
2906 0000 406A ldr r0, [r0, #36]
2907 .LVL224:
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 119
restructured repo
2024-05-12 14:08:58 +02:00
2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2908 .loc 1 2372 1 view .LVU937
2909 0002 7047 bx lr
2910 .cfi_endproc
2911 .LFE164:
2913 .section .text.HAL_CAN_ResetError,"ax",%progbits
2914 .align 1
2915 .global HAL_CAN_ResetError
2916 .syntax unified
2917 .thumb
2918 .thumb_func
2920 HAL_CAN_ResetError:
2921 .LVL225:
2922 .LFB165:
2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /**
2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Reset the CAN error code.
2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains
2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN.
2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status
2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */
2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan)
2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2923 .loc 1 2381 1 is_stmt 1 view -0
2924 .cfi_startproc
2925 @ args = 0, pretend = 0, frame = 0
2926 @ frame_needed = 0, uses_anonymous_args = 0
2927 @ link register save eliminated.
2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK;
2928 .loc 1 2382 3 view .LVU939
2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
2929 .loc 1 2383 3 view .LVU940
2930 .loc 1 2383 24 is_stmt 0 view .LVU941
2931 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2
2932 .LVL226:
2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) ||
2933 .loc 1 2385 3 is_stmt 1 view .LVU942
2934 .loc 1 2385 38 is_stmt 0 view .LVU943
2935 0004 013B subs r3, r3, #1
2936 .LVL227:
2937 .loc 1 2385 38 view .LVU944
2938 0006 DBB2 uxtb r3, r3
2939 .loc 1 2385 6 view .LVU945
2940 0008 012B cmp r3, #1
2941 000a 05D9 bls .L225
2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING))
2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset CAN error code */
2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = 0U;
2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else
2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** {
2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */
2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
2942 .loc 1 2394 5 is_stmt 1 view .LVU946
2943 .loc 1 2394 9 is_stmt 0 view .LVU947
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 120
restructured repo
2024-05-12 14:08:58 +02:00
2944 000c 436A ldr r3, [r0, #36]
2945 .loc 1 2394 21 view .LVU948
2946 000e 43F48023 orr r3, r3, #262144
2947 0012 4362 str r3, [r0, #36]
2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR;
2948 .loc 1 2396 5 is_stmt 1 view .LVU949
2949 .LVL228:
2950 .loc 1 2396 12 is_stmt 0 view .LVU950
2951 0014 0120 movs r0, #1
2952 .LVL229:
2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c ****
2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return the status */
2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status;
2953 .loc 1 2400 3 is_stmt 1 view .LVU951
2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2954 .loc 1 2401 1 is_stmt 0 view .LVU952
2955 0016 7047 bx lr
2956 .LVL230:
2957 .L225:
2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2958 .loc 1 2389 5 is_stmt 1 view .LVU953
2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** }
2959 .loc 1 2389 21 is_stmt 0 view .LVU954
2960 0018 0023 movs r3, #0
2961 001a 4362 str r3, [r0, #36]
2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
2962 .loc 1 2382 21 view .LVU955
2963 001c 1846 mov r0, r3
2964 .LVL231:
2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State;
2965 .loc 1 2382 21 view .LVU956
2966 001e 7047 bx lr
2967 .cfi_endproc
2968 .LFE165:
2970 .text
2971 .Letext0:
2972 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
2973 .file 4 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
2974 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
2975 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
2976 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
2977 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h"
2978 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 121
restructured repo
2024-05-12 14:08:58 +02:00
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_can.c
gss active , current monitor after channel contr check
2024-05-15 21:16:02 +02:00
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:21 .text.HAL_CAN_MspInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:27 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:42 .text.HAL_CAN_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:48 .text.HAL_CAN_Init:00000000 HAL_CAN_Init
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:338 .text.HAL_CAN_MspDeInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:344 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:359 .text.HAL_CAN_ConfigFilter:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:365 .text.HAL_CAN_ConfigFilter:00000000 HAL_CAN_ConfigFilter
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:578 .text.HAL_CAN_Start:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:584 .text.HAL_CAN_Start:00000000 HAL_CAN_Start
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:683 .text.HAL_CAN_Stop:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:689 .text.HAL_CAN_Stop:00000000 HAL_CAN_Stop
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:789 .text.HAL_CAN_DeInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:795 .text.HAL_CAN_DeInit:00000000 HAL_CAN_DeInit
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:849 .text.HAL_CAN_RequestSleep:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:855 .text.HAL_CAN_RequestSleep:00000000 HAL_CAN_RequestSleep
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:905 .text.HAL_CAN_WakeUp:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:911 .text.HAL_CAN_WakeUp:00000000 HAL_CAN_WakeUp
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1008 .text.HAL_CAN_WakeUp:00000054 $d
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1013 .text.HAL_CAN_IsSleepActive:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1019 .text.HAL_CAN_IsSleepActive:00000000 HAL_CAN_IsSleepActive
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1069 .text.HAL_CAN_AddTxMessage:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1075 .text.HAL_CAN_AddTxMessage:00000000 HAL_CAN_AddTxMessage
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1270 .text.HAL_CAN_AbortTxRequest:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1276 .text.HAL_CAN_AbortTxRequest:00000000 HAL_CAN_AbortTxRequest
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1352 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1358 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 HAL_CAN_GetTxMailboxesFreeLevel
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1429 .text.HAL_CAN_IsTxMessagePending:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1435 .text.HAL_CAN_IsTxMessagePending:00000000 HAL_CAN_IsTxMessagePending
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1492 .text.HAL_CAN_GetTxTimestamp:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1498 .text.HAL_CAN_GetTxTimestamp:00000000 HAL_CAN_GetTxTimestamp
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1571 .text.HAL_CAN_GetRxMessage:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1577 .text.HAL_CAN_GetRxMessage:00000000 HAL_CAN_GetRxMessage
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1884 .text.HAL_CAN_GetRxFifoFillLevel:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1890 .text.HAL_CAN_GetRxFifoFillLevel:00000000 HAL_CAN_GetRxFifoFillLevel
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1952 .text.HAL_CAN_ActivateNotification:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:1958 .text.HAL_CAN_ActivateNotification:00000000 HAL_CAN_ActivateNotification
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2009 .text.HAL_CAN_DeactivateNotification:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2015 .text.HAL_CAN_DeactivateNotification:00000000 HAL_CAN_DeactivateNotification
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2066 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2072 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 HAL_CAN_TxMailbox0CompleteCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2087 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2093 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 HAL_CAN_TxMailbox1CompleteCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2108 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2114 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 HAL_CAN_TxMailbox2CompleteCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2129 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2135 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 HAL_CAN_TxMailbox0AbortCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2150 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2156 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 HAL_CAN_TxMailbox1AbortCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2171 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2177 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 HAL_CAN_TxMailbox2AbortCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2192 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2198 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 HAL_CAN_RxFifo0MsgPendingCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2213 .text.HAL_CAN_RxFifo0FullCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2219 .text.HAL_CAN_RxFifo0FullCallback:00000000 HAL_CAN_RxFifo0FullCallback
ARM GAS C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s page 122
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2234 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2240 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 HAL_CAN_RxFifo1MsgPendingCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2255 .text.HAL_CAN_RxFifo1FullCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2261 .text.HAL_CAN_RxFifo1FullCallback:00000000 HAL_CAN_RxFifo1FullCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2276 .text.HAL_CAN_SleepCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2282 .text.HAL_CAN_SleepCallback:00000000 HAL_CAN_SleepCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2297 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2303 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 HAL_CAN_WakeUpFromRxMsgCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2318 .text.HAL_CAN_ErrorCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2324 .text.HAL_CAN_ErrorCallback:00000000 HAL_CAN_ErrorCallback
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2339 .text.HAL_CAN_IRQHandler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2345 .text.HAL_CAN_IRQHandler:00000000 HAL_CAN_IRQHandler
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2823 .text.HAL_CAN_GetState:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2829 .text.HAL_CAN_GetState:00000000 HAL_CAN_GetState
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2890 .text.HAL_CAN_GetError:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2896 .text.HAL_CAN_GetError:00000000 HAL_CAN_GetError
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2914 .text.HAL_CAN_ResetError:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccQRa1Yp.s:2920 .text.HAL_CAN_ResetError:00000000 HAL_CAN_ResetError
restructured repo
2024-05-12 14:08:58 +02:00
UNDEFINED SYMBOLS
HAL_GetTick