743 lines
29 KiB
ArmAsm
743 lines
29 KiB
ArmAsm
/**
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******************************************************************************
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* @file startup_stm32h7a3xx.s
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* @author MCD Application Team
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* @brief STM32H7B3xx Devices vector table for GCC based toolchain.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions ISR address
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* - Branches to main in the C library (which eventually
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* calls main()).
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* After Reset the Cortex-M processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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.syntax unified
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.cpu cortex-m7
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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/**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval : None
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*/
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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ldr sp, =_estack /* set stack pointer */
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/* Call the clock system initialization function.*/
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bl SystemInit
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/* Copy the data segment initializers from flash to SRAM */
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ldr r0, =_sdata
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ldr r1, =_edata
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ldr r2, =_sidata
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movs r3, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r4, [r2, r3]
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str r4, [r0, r3]
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adds r3, r3, #4
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LoopCopyDataInit:
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adds r4, r0, r3
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cmp r4, r1
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bcc CopyDataInit
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/* Zero fill the bss segment. */
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ldr r2, =_sbss
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ldr r4, =_ebss
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movs r3, #0
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b LoopFillZerobss
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FillZerobss:
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str r3, [r2]
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adds r2, r2, #4
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LoopFillZerobss:
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cmp r2, r4
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bcc FillZerobss
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/* Call static constructors */
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bl __libc_init_array
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/* Call the application's entry point.*/
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bl main
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bx lr
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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* @param None
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* @retval None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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*******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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/* External Interrupts */
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.word WWDG_IRQHandler /* Window WatchDog */
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.word PVD_PVM_IRQHandler /* PVD/PVM through EXTI Line detection */
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.word RTC_TAMP_STAMP_CSS_LSE_IRQHandler /* Tamper and TimeStamps through the EXTI line */
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.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
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.word FLASH_IRQHandler /* FLASH */
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.word RCC_IRQHandler /* RCC */
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.word EXTI0_IRQHandler /* EXTI Line0 */
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.word EXTI1_IRQHandler /* EXTI Line1 */
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.word EXTI2_IRQHandler /* EXTI Line2 */
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.word EXTI3_IRQHandler /* EXTI Line3 */
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.word EXTI4_IRQHandler /* EXTI Line4 */
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.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
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.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
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.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
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.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
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.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
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.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
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.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
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.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
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.word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */
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.word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */
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.word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */
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.word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */
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.word EXTI9_5_IRQHandler /* External Line[9:5]s */
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.word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */
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.word TIM1_UP_IRQHandler /* TIM1 Update interrupt */
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.word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */
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.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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.word TIM2_IRQHandler /* TIM2 */
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.word TIM3_IRQHandler /* TIM3 */
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.word TIM4_IRQHandler /* TIM4 */
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.word I2C1_EV_IRQHandler /* I2C1 Event */
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.word I2C1_ER_IRQHandler /* I2C1 Error */
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.word I2C2_EV_IRQHandler /* I2C2 Event */
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.word I2C2_ER_IRQHandler /* I2C2 Error */
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.word SPI1_IRQHandler /* SPI1 */
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.word SPI2_IRQHandler /* SPI2 */
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.word USART1_IRQHandler /* USART1 */
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.word USART2_IRQHandler /* USART2 */
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.word USART3_IRQHandler /* USART3 */
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.word EXTI15_10_IRQHandler /* External Line[15:10]s */
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.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
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.word DFSDM2_IRQHandler /* DFSDM2 Interrupt */
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.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
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.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
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.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
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.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
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.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
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.word FMC_IRQHandler /* FMC */
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.word SDMMC1_IRQHandler /* SDMMC1 */
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.word TIM5_IRQHandler /* TIM5 */
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.word SPI3_IRQHandler /* SPI3 */
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.word UART4_IRQHandler /* UART4 */
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.word UART5_IRQHandler /* UART5 */
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.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
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.word TIM7_IRQHandler /* TIM7 */
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.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
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.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
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.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
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.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
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.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/
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.word DFSDM1_FLT4_IRQHandler /* DFSDM Filter4 Interrupt */
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.word DFSDM1_FLT5_IRQHandler /* DFSDM Filter5 Interrupt */
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.word DFSDM1_FLT6_IRQHandler /* DFSDM Filter6 Interrupt */
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.word DFSDM1_FLT7_IRQHandler /* DFSDM Filter7 Interrupt */
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.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
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.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
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.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
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.word USART6_IRQHandler /* USART6 */
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.word I2C3_EV_IRQHandler /* I2C3 event */
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.word I2C3_ER_IRQHandler /* I2C3 error */
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.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
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.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
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.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
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.word OTG_HS_IRQHandler /* USB OTG HS */
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.word DCMI_PSSI_IRQHandler /* DCMI, PSSI */
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.word 0 /* Reserved */
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.word RNG_IRQHandler /* RNG */
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.word FPU_IRQHandler /* FPU */
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.word UART7_IRQHandler /* UART7 */
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.word UART8_IRQHandler /* UART8 */
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.word SPI4_IRQHandler /* SPI4 */
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.word SPI5_IRQHandler /* SPI5 */
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.word SPI6_IRQHandler /* SPI6 */
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.word SAI1_IRQHandler /* SAI1 */
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.word LTDC_IRQHandler /* LTDC */
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.word LTDC_ER_IRQHandler /* LTDC error */
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.word DMA2D_IRQHandler /* DMA2D */
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.word SAI2_IRQHandler /* SAI2 */
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.word OCTOSPI1_IRQHandler /* OCTOSPI1 */
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.word LPTIM1_IRQHandler /* LPTIM1 */
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.word CEC_IRQHandler /* HDMI_CEC */
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.word I2C4_EV_IRQHandler /* I2C4 Event */
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.word I2C4_ER_IRQHandler /* I2C4 Error */
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.word SPDIF_RX_IRQHandler /* SPDIF_RX */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */
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.word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */
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.word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */
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.word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */
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.word 0 /* Reserved */
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.word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */
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.word TIM15_IRQHandler /* TIM15 global Interrupt */
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.word TIM16_IRQHandler /* TIM16 global Interrupt */
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.word TIM17_IRQHandler /* TIM17 global Interrupt */
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.word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */
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.word MDIOS_IRQHandler /* MDIOS global Interrupt */
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.word JPEG_IRQHandler /* JPEG global Interrupt */
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.word MDMA_IRQHandler /* MDMA global Interrupt */
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.word 0 /* Reserved */
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.word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */
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.word HSEM1_IRQHandler /* HSEM1 global Interrupt */
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.word 0 /* Reserved */
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.word DAC2_IRQHandler /* DAC2 global Interrupt */
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.word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */
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.word BDMA2_Channel0_IRQHandler /* BDMA2 Channel 0 global Interrupt */
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.word BDMA2_Channel1_IRQHandler /* BDMA2 Channel 1 global Interrupt */
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.word BDMA2_Channel2_IRQHandler /* BDMA2 Channel 2 global Interrupt */
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.word BDMA2_Channel3_IRQHandler /* BDMA2 Channel 3 global Interrupt */
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.word BDMA2_Channel4_IRQHandler /* BDMA2 Channel 4 global Interrupt */
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.word BDMA2_Channel5_IRQHandler /* BDMA2 Channel 5 global Interrupt */
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.word BDMA2_Channel6_IRQHandler /* BDMA2 Channel 6 global Interrupt */
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.word BDMA2_Channel7_IRQHandler /* BDMA2 Channel 7 global Interrupt */
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.word COMP_IRQHandler /* COMP global Interrupt */
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.word LPTIM2_IRQHandler /* LP TIM2 global interrupt */
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.word LPTIM3_IRQHandler /* LP TIM3 global interrupt */
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.word UART9_IRQHandler /* UART9 global interrupt */
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.word USART10_IRQHandler /* USART10 global interrupt */
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.word LPUART1_IRQHandler /* LP UART1 interrupt */
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.word 0 /* Reserved */
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.word CRS_IRQHandler /* Clock Recovery Global Interrupt */
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.word ECC_IRQHandler /* ECC diagnostic Global Interrupt */
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.word 0 /* Reserved */
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.word DTS_IRQHandler /* DTS */
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.word 0 /* Reserved */
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.word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */
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.word OCTOSPI2_IRQHandler /* OCTOSPI2 */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word GFXMMU_IRQHandler /* GFXMMU */
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.word BDMA1_IRQHandler /* BDMA1 */
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler,Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler,Default_Handler
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler,Default_Handler
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.weak SVC_Handler
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.thumb_set SVC_Handler,Default_Handler
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler,Default_Handler
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.weak PendSV_Handler
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.thumb_set PendSV_Handler,Default_Handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler,Default_Handler
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.weak WWDG_IRQHandler
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.thumb_set WWDG_IRQHandler,Default_Handler
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.weak PVD_PVM_IRQHandler
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.thumb_set PVD_PVM_IRQHandler,Default_Handler
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.weak RTC_TAMP_STAMP_CSS_LSE_IRQHandler
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.thumb_set RTC_TAMP_STAMP_CSS_LSE_IRQHandler,Default_Handler
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.weak RTC_WKUP_IRQHandler
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.thumb_set RTC_WKUP_IRQHandler,Default_Handler
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.weak FLASH_IRQHandler
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.thumb_set FLASH_IRQHandler,Default_Handler
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.weak RCC_IRQHandler
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.thumb_set RCC_IRQHandler,Default_Handler
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.weak EXTI0_IRQHandler
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.thumb_set EXTI0_IRQHandler,Default_Handler
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.weak EXTI1_IRQHandler
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.thumb_set EXTI1_IRQHandler,Default_Handler
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.weak EXTI2_IRQHandler
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.thumb_set EXTI2_IRQHandler,Default_Handler
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.weak EXTI3_IRQHandler
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.thumb_set EXTI3_IRQHandler,Default_Handler
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.weak EXTI4_IRQHandler
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.thumb_set EXTI4_IRQHandler,Default_Handler
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.weak DMA1_Stream0_IRQHandler
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.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
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.weak DMA1_Stream1_IRQHandler
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.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
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.weak DMA1_Stream2_IRQHandler
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.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
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.weak DMA1_Stream3_IRQHandler
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.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
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.weak DMA1_Stream4_IRQHandler
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.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
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.weak DMA1_Stream5_IRQHandler
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.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
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.weak DMA1_Stream6_IRQHandler
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.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
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.weak ADC_IRQHandler
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.thumb_set ADC_IRQHandler,Default_Handler
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.weak FDCAN1_IT0_IRQHandler
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.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
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.weak FDCAN2_IT0_IRQHandler
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.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
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.weak FDCAN1_IT1_IRQHandler
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.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
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.weak FDCAN2_IT1_IRQHandler
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.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
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.weak EXTI9_5_IRQHandler
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.thumb_set EXTI9_5_IRQHandler,Default_Handler
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.weak TIM1_BRK_IRQHandler
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.thumb_set TIM1_BRK_IRQHandler,Default_Handler
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.weak TIM1_UP_IRQHandler
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.thumb_set TIM1_UP_IRQHandler,Default_Handler
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.weak TIM1_TRG_COM_IRQHandler
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.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
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.weak TIM1_CC_IRQHandler
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.thumb_set TIM1_CC_IRQHandler,Default_Handler
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.weak TIM2_IRQHandler
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.thumb_set TIM2_IRQHandler,Default_Handler
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.weak TIM3_IRQHandler
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.thumb_set TIM3_IRQHandler,Default_Handler
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.weak TIM4_IRQHandler
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.thumb_set TIM4_IRQHandler,Default_Handler
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.weak I2C1_EV_IRQHandler
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.thumb_set I2C1_EV_IRQHandler,Default_Handler
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.weak I2C1_ER_IRQHandler
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.thumb_set I2C1_ER_IRQHandler,Default_Handler
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.weak I2C2_EV_IRQHandler
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.thumb_set I2C2_EV_IRQHandler,Default_Handler
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.weak I2C2_ER_IRQHandler
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.thumb_set I2C2_ER_IRQHandler,Default_Handler
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.weak SPI1_IRQHandler
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.thumb_set SPI1_IRQHandler,Default_Handler
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.weak SPI2_IRQHandler
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.thumb_set SPI2_IRQHandler,Default_Handler
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.weak USART1_IRQHandler
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.thumb_set USART1_IRQHandler,Default_Handler
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.weak USART2_IRQHandler
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.thumb_set USART2_IRQHandler,Default_Handler
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.weak USART3_IRQHandler
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.thumb_set USART3_IRQHandler,Default_Handler
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.weak EXTI15_10_IRQHandler
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.thumb_set EXTI15_10_IRQHandler,Default_Handler
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.weak RTC_Alarm_IRQHandler
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.thumb_set RTC_Alarm_IRQHandler,Default_Handler
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.weak DFSDM2_IRQHandler
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.thumb_set DFSDM2_IRQHandler,Default_Handler
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.weak TIM8_BRK_TIM12_IRQHandler
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.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
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.weak TIM8_UP_TIM13_IRQHandler
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.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
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.weak TIM8_TRG_COM_TIM14_IRQHandler
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.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
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.weak TIM8_CC_IRQHandler
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.thumb_set TIM8_CC_IRQHandler,Default_Handler
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.weak DMA1_Stream7_IRQHandler
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.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
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.weak FMC_IRQHandler
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.thumb_set FMC_IRQHandler,Default_Handler
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.weak SDMMC1_IRQHandler
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.thumb_set SDMMC1_IRQHandler,Default_Handler
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.weak TIM5_IRQHandler
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.thumb_set TIM5_IRQHandler,Default_Handler
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.weak SPI3_IRQHandler
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.thumb_set SPI3_IRQHandler,Default_Handler
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.weak UART4_IRQHandler
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.thumb_set UART4_IRQHandler,Default_Handler
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.weak UART5_IRQHandler
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.thumb_set UART5_IRQHandler,Default_Handler
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.weak TIM6_DAC_IRQHandler
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.thumb_set TIM6_DAC_IRQHandler,Default_Handler
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.weak TIM7_IRQHandler
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.thumb_set TIM7_IRQHandler,Default_Handler
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.weak DMA2_Stream0_IRQHandler
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.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
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.weak DMA2_Stream1_IRQHandler
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.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
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.weak DMA2_Stream2_IRQHandler
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.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
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.weak DMA2_Stream3_IRQHandler
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.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
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.weak DMA2_Stream4_IRQHandler
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.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
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.weak FDCAN_CAL_IRQHandler
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.thumb_set FDCAN_CAL_IRQHandler,Default_Handler
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.weak DFSDM1_FLT4_IRQHandler
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.thumb_set DFSDM1_FLT4_IRQHandler,Default_Handler
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.weak DFSDM1_FLT5_IRQHandler
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.thumb_set DFSDM1_FLT5_IRQHandler,Default_Handler
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.weak DFSDM1_FLT6_IRQHandler
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.thumb_set DFSDM1_FLT6_IRQHandler,Default_Handler
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.weak DFSDM1_FLT7_IRQHandler
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.thumb_set DFSDM1_FLT7_IRQHandler,Default_Handler
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.weak DMA2_Stream5_IRQHandler
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.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
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.weak DMA2_Stream6_IRQHandler
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.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
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.weak DMA2_Stream7_IRQHandler
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.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
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.weak USART6_IRQHandler
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.thumb_set USART6_IRQHandler,Default_Handler
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.weak I2C3_EV_IRQHandler
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.thumb_set I2C3_EV_IRQHandler,Default_Handler
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.weak I2C3_ER_IRQHandler
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.thumb_set I2C3_ER_IRQHandler,Default_Handler
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.weak OTG_HS_EP1_OUT_IRQHandler
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.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
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.weak OTG_HS_EP1_IN_IRQHandler
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.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
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.weak OTG_HS_WKUP_IRQHandler
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.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
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.weak OTG_HS_IRQHandler
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.thumb_set OTG_HS_IRQHandler,Default_Handler
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.weak DCMI_PSSI_IRQHandler
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.thumb_set DCMI_PSSI_IRQHandler,Default_Handler
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.weak RNG_IRQHandler
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.thumb_set RNG_IRQHandler,Default_Handler
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.weak FPU_IRQHandler
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.thumb_set FPU_IRQHandler,Default_Handler
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.weak UART7_IRQHandler
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.thumb_set UART7_IRQHandler,Default_Handler
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.weak UART8_IRQHandler
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.thumb_set UART8_IRQHandler,Default_Handler
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.weak SPI4_IRQHandler
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.thumb_set SPI4_IRQHandler,Default_Handler
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.weak SPI5_IRQHandler
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.thumb_set SPI5_IRQHandler,Default_Handler
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.weak SPI6_IRQHandler
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.thumb_set SPI6_IRQHandler,Default_Handler
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.weak SAI1_IRQHandler
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.thumb_set SAI1_IRQHandler,Default_Handler
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.weak LTDC_IRQHandler
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.thumb_set LTDC_IRQHandler,Default_Handler
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.weak LTDC_ER_IRQHandler
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.thumb_set LTDC_ER_IRQHandler,Default_Handler
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.weak DMA2D_IRQHandler
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.thumb_set DMA2D_IRQHandler,Default_Handler
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.weak SAI2_IRQHandler
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.thumb_set SAI2_IRQHandler,Default_Handler
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.weak OCTOSPI1_IRQHandler
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.thumb_set OCTOSPI1_IRQHandler,Default_Handler
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.weak LPTIM1_IRQHandler
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.thumb_set LPTIM1_IRQHandler,Default_Handler
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.weak CEC_IRQHandler
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.thumb_set CEC_IRQHandler,Default_Handler
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.weak I2C4_EV_IRQHandler
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.thumb_set I2C4_EV_IRQHandler,Default_Handler
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.weak I2C4_ER_IRQHandler
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.thumb_set I2C4_ER_IRQHandler,Default_Handler
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.weak SPDIF_RX_IRQHandler
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.thumb_set SPDIF_RX_IRQHandler,Default_Handler
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.weak DMAMUX1_OVR_IRQHandler
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.thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
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.weak DFSDM1_FLT0_IRQHandler
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.thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
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.weak DFSDM1_FLT1_IRQHandler
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.thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
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.weak DFSDM1_FLT2_IRQHandler
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.thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
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.weak DFSDM1_FLT3_IRQHandler
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.thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
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.weak SWPMI1_IRQHandler
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.thumb_set SWPMI1_IRQHandler,Default_Handler
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.weak TIM15_IRQHandler
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.thumb_set TIM15_IRQHandler,Default_Handler
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.weak TIM16_IRQHandler
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.thumb_set TIM16_IRQHandler,Default_Handler
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.weak TIM17_IRQHandler
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.thumb_set TIM17_IRQHandler,Default_Handler
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.weak MDIOS_WKUP_IRQHandler
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.thumb_set MDIOS_WKUP_IRQHandler,Default_Handler
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.weak MDIOS_IRQHandler
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.thumb_set MDIOS_IRQHandler,Default_Handler
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.weak JPEG_IRQHandler
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.thumb_set JPEG_IRQHandler,Default_Handler
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.weak MDMA_IRQHandler
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.thumb_set MDMA_IRQHandler,Default_Handler
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.weak SDMMC2_IRQHandler
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.thumb_set SDMMC2_IRQHandler,Default_Handler
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.weak HSEM1_IRQHandler
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.thumb_set HSEM1_IRQHandler,Default_Handler
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.weak DAC2_IRQHandler
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.thumb_set DAC2_IRQHandler,Default_Handler
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.weak DMAMUX2_OVR_IRQHandler
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.thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler
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.weak BDMA2_Channel0_IRQHandler
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.thumb_set BDMA2_Channel0_IRQHandler,Default_Handler
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.weak BDMA2_Channel1_IRQHandler
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.thumb_set BDMA2_Channel1_IRQHandler,Default_Handler
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.weak BDMA2_Channel2_IRQHandler
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.thumb_set BDMA2_Channel2_IRQHandler,Default_Handler
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.weak BDMA2_Channel3_IRQHandler
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.thumb_set BDMA2_Channel3_IRQHandler,Default_Handler
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.weak BDMA2_Channel4_IRQHandler
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.thumb_set BDMA2_Channel4_IRQHandler,Default_Handler
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.weak BDMA2_Channel5_IRQHandler
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.thumb_set BDMA2_Channel5_IRQHandler,Default_Handler
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.weak BDMA2_Channel6_IRQHandler
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.thumb_set BDMA2_Channel6_IRQHandler,Default_Handler
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.weak BDMA2_Channel7_IRQHandler
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.thumb_set BDMA2_Channel7_IRQHandler,Default_Handler
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.weak COMP_IRQHandler
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.thumb_set COMP_IRQHandler,Default_Handler
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.weak LPTIM2_IRQHandler
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.thumb_set LPTIM2_IRQHandler,Default_Handler
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.weak LPTIM3_IRQHandler
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.thumb_set LPTIM3_IRQHandler,Default_Handler
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.weak LPTIM4_IRQHandler
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.thumb_set LPTIM4_IRQHandler,Default_Handler
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.weak LPTIM5_IRQHandler
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.thumb_set LPTIM5_IRQHandler,Default_Handler
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.weak UART9_IRQHandler
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.thumb_set UART9_IRQHandler,Default_Handler
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.weak USART10_IRQHandler
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.thumb_set USART10_IRQHandler,Default_Handler
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.weak LPUART1_IRQHandler
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.thumb_set LPUART1_IRQHandler,Default_Handler
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.weak CRS_IRQHandler
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.thumb_set CRS_IRQHandler,Default_Handler
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.weak ECC_IRQHandler
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.thumb_set ECC_IRQHandler,Default_Handler
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.weak DTS_IRQHandler
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.thumb_set DTS_IRQHandler,Default_Handler
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.weak WAKEUP_PIN_IRQHandler
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.thumb_set WAKEUP_PIN_IRQHandler,Default_Handler
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.weak OCTOSPI2_IRQHandler
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.thumb_set OCTOSPI2_IRQHandler,Default_Handler
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.weak GFXMMU_IRQHandler
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.thumb_set GFXMMU_IRQHandler,Default_Handler
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.weak BDMA1_IRQHandler
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.thumb_set BDMA1_IRQHandler,Default_Handler
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