1178 lines
63 KiB
C
1178 lines
63 KiB
C
/**
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******************************************************************************
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* @file stm32h7xx_hal_usart.h
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* @author MCD Application Team
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* @brief Header file of USART HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7xx_HAL_USART_H
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#define STM32H7xx_HAL_USART_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal_def.h"
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/** @addtogroup STM32H7xx_HAL_Driver
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* @{
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*/
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/** @addtogroup USART
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup USART_Exported_Types USART Exported Types
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* @{
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*/
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/**
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* @brief USART Init Structure definition
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*/
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typedef struct
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{
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uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
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The baud rate is computed using the following formula:
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Baud Rate Register[15:4] = ((2 * fclk_pres) /
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((huart->Init.BaudRate)))[15:4]
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Baud Rate Register[3] = 0
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Baud Rate Register[2:0] = (((2 * fclk_pres) /
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((huart->Init.BaudRate)))[3:0]) >> 1
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where fclk_pres is the USART input clock frequency (fclk)
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divided by a prescaler.
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@note Oversampling by 8 is systematically applied to
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achieve high baud rates. */
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uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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This parameter can be a value of @ref USARTEx_Word_Length. */
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uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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This parameter can be a value of @ref USART_Stop_Bits. */
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uint32_t Parity; /*!< Specifies the parity mode.
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This parameter can be a value of @ref USART_Parity
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@note When parity is enabled, the computed parity is inserted
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at the MSB position of the transmitted data (9th bit when
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the word length is set to 9 data bits; 8th bit when the
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word length is set to 8 data bits). */
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uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
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This parameter can be a value of @ref USART_Mode. */
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uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
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This parameter can be a value of @ref USART_Clock_Polarity. */
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uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
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This parameter can be a value of @ref USART_Clock_Phase. */
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uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
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data bit (MSB) has to be output on the SCLK pin in synchronous mode.
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This parameter can be a value of @ref USART_Last_Bit. */
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uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the USART clock source.
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This parameter can be a value of @ref USART_ClockPrescaler. */
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} USART_InitTypeDef;
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/**
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* @brief HAL USART State structures definition
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*/
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typedef enum
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{
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HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */
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HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
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HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
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HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
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HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
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HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
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HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
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HAL_USART_STATE_ERROR = 0x04U /*!< Error */
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} HAL_USART_StateTypeDef;
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/**
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* @brief USART clock sources definitions
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*/
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typedef enum
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{
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USART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */
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USART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */
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USART_CLOCKSOURCE_PLL2 = 0x02U, /*!< PLL2Q clock source */
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USART_CLOCKSOURCE_PLL3 = 0x04U, /*!< PLL3Q clock source */
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USART_CLOCKSOURCE_HSI = 0x08U, /*!< HSI clock source */
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USART_CLOCKSOURCE_CSI = 0x10U, /*!< CSI clock source */
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USART_CLOCKSOURCE_LSE = 0x20U, /*!< LSE clock source */
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USART_CLOCKSOURCE_UNDEFINED = 0x40U /*!< Undefined clock source */
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} USART_ClockSourceTypeDef;
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/**
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* @brief USART handle Structure definition
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*/
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typedef struct __USART_HandleTypeDef
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{
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USART_TypeDef *Instance; /*!< USART registers base address */
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USART_InitTypeDef Init; /*!< USART communication parameters */
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const uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
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uint16_t TxXferSize; /*!< USART Tx Transfer size */
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__IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
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uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
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uint16_t RxXferSize; /*!< USART Rx Transfer size */
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__IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
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uint16_t Mask; /*!< USART Rx RDR register mask */
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uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
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uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
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uint32_t SlaveMode; /*!< Enable/Disable UART SPI Slave Mode. This parameter can be a value
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of @ref USARTEx_Slave_Mode */
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uint32_t FifoMode; /*!< Specifies if the FIFO mode will be used. This parameter can be a value
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of @ref USARTEx_FIFO_mode. */
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void (*RxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Rx IRQ handler */
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void (*TxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Tx IRQ handler */
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DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
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DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
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HAL_LockTypeDef Lock; /*!< Locking object */
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__IO HAL_USART_StateTypeDef State; /*!< USART communication state */
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__IO uint32_t ErrorCode; /*!< USART Error code */
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#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
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void (* TxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Half Complete Callback */
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void (* TxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Complete Callback */
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void (* RxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Half Complete Callback */
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void (* RxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Complete Callback */
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void (* TxRxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Rx Complete Callback */
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void (* ErrorCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Error Callback */
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void (* AbortCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Abort Complete Callback */
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void (* RxFifoFullCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Fifo Full Callback */
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void (* TxFifoEmptyCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Fifo Empty Callback */
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void (* MspInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp Init callback */
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void (* MspDeInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp DeInit callback */
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#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
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} USART_HandleTypeDef;
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#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
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/**
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* @brief HAL USART Callback ID enumeration definition
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*/
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typedef enum
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{
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HAL_USART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< USART Tx Half Complete Callback ID */
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HAL_USART_TX_COMPLETE_CB_ID = 0x01U, /*!< USART Tx Complete Callback ID */
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HAL_USART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< USART Rx Half Complete Callback ID */
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HAL_USART_RX_COMPLETE_CB_ID = 0x03U, /*!< USART Rx Complete Callback ID */
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HAL_USART_TX_RX_COMPLETE_CB_ID = 0x04U, /*!< USART Tx Rx Complete Callback ID */
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HAL_USART_ERROR_CB_ID = 0x05U, /*!< USART Error Callback ID */
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HAL_USART_ABORT_COMPLETE_CB_ID = 0x06U, /*!< USART Abort Complete Callback ID */
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HAL_USART_RX_FIFO_FULL_CB_ID = 0x07U, /*!< USART Rx Fifo Full Callback ID */
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HAL_USART_TX_FIFO_EMPTY_CB_ID = 0x08U, /*!< USART Tx Fifo Empty Callback ID */
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HAL_USART_MSPINIT_CB_ID = 0x09U, /*!< USART MspInit callback ID */
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HAL_USART_MSPDEINIT_CB_ID = 0x0AU /*!< USART MspDeInit callback ID */
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} HAL_USART_CallbackIDTypeDef;
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/**
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* @brief HAL USART Callback pointer definition
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*/
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typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< pointer to an USART callback function */
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#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup USART_Exported_Constants USART Exported Constants
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* @{
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*/
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/** @defgroup USART_Error_Definition USART Error Definition
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* @{
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*/
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#define HAL_USART_ERROR_NONE (0x00000000U) /*!< No error */
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#define HAL_USART_ERROR_PE (0x00000001U) /*!< Parity error */
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#define HAL_USART_ERROR_NE (0x00000002U) /*!< Noise error */
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#define HAL_USART_ERROR_FE (0x00000004U) /*!< Frame error */
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#define HAL_USART_ERROR_ORE (0x00000008U) /*!< Overrun error */
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#define HAL_USART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
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#define HAL_USART_ERROR_UDR (0x00000020U) /*!< SPI slave underrun error */
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#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
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#define HAL_USART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */
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#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
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#define HAL_USART_ERROR_RTO (0x00000080U) /*!< Receiver Timeout error */
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/**
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* @}
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*/
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/** @defgroup USART_Stop_Bits USART Number of Stop Bits
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* @{
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*/
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#define USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< USART frame with 0.5 stop bit */
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#define USART_STOPBITS_1 0x00000000U /*!< USART frame with 1 stop bit */
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#define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */
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#define USART_STOPBITS_2 USART_CR2_STOP_1 /*!< USART frame with 2 stop bits */
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/**
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* @}
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*/
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/** @defgroup USART_Parity USART Parity
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* @{
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*/
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#define USART_PARITY_NONE 0x00000000U /*!< No parity */
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#define USART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
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#define USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
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/**
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* @}
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*/
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/** @defgroup USART_Mode USART Mode
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* @{
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*/
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#define USART_MODE_RX USART_CR1_RE /*!< RX mode */
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#define USART_MODE_TX USART_CR1_TE /*!< TX mode */
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#define USART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
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/**
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* @}
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*/
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/** @defgroup USART_Clock USART Clock
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* @{
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*/
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#define USART_CLOCK_DISABLE 0x00000000U /*!< USART clock disable */
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#define USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< USART clock enable */
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/**
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* @}
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*/
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/** @defgroup USART_Clock_Polarity USART Clock Polarity
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* @{
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*/
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#define USART_POLARITY_LOW 0x00000000U /*!< Driver enable signal is active high */
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#define USART_POLARITY_HIGH USART_CR2_CPOL /*!< Driver enable signal is active low */
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/**
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* @}
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*/
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/** @defgroup USART_Clock_Phase USART Clock Phase
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* @{
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*/
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#define USART_PHASE_1EDGE 0x00000000U /*!< USART frame phase on first clock transition */
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#define USART_PHASE_2EDGE USART_CR2_CPHA /*!< USART frame phase on second clock transition */
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/**
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* @}
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*/
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/** @defgroup USART_Last_Bit USART Last Bit
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* @{
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*/
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#define USART_LASTBIT_DISABLE 0x00000000U /*!< USART frame last data bit clock pulse not output to SCLK pin */
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#define USART_LASTBIT_ENABLE USART_CR2_LBCL /*!< USART frame last data bit clock pulse output to SCLK pin */
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/**
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* @}
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*/
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/** @defgroup USART_ClockPrescaler USART Clock Prescaler
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* @{
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*/
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#define USART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
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#define USART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
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#define USART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
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#define USART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
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#define USART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
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#define USART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
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#define USART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
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#define USART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
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#define USART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
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#define USART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
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#define USART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
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#define USART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
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/**
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* @}
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*/
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/** @defgroup USART_Request_Parameters USART Request Parameters
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* @{
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*/
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#define USART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
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#define USART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
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/**
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* @}
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*/
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/** @defgroup USART_Flags USART Flags
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* Elements values convention: 0xXXXX
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* - 0xXXXX : Flag mask in the ISR register
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* @{
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*/
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#define USART_FLAG_TXFT USART_ISR_TXFT /*!< USART TXFIFO threshold flag */
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#define USART_FLAG_RXFT USART_ISR_RXFT /*!< USART RXFIFO threshold flag */
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#define USART_FLAG_RXFF USART_ISR_RXFF /*!< USART RXFIFO Full flag */
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#define USART_FLAG_TXFE USART_ISR_TXFE /*!< USART TXFIFO Empty flag */
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#define USART_FLAG_REACK USART_ISR_REACK /*!< USART receive enable acknowledge flag */
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#define USART_FLAG_TEACK USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */
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#define USART_FLAG_BUSY USART_ISR_BUSY /*!< USART busy flag */
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#define USART_FLAG_UDR USART_ISR_UDR /*!< SPI slave underrun error flag */
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#define USART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< USART transmit data register empty */
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#define USART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< USART TXFIFO not full */
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#define USART_FLAG_RTOF USART_ISR_RTOF /*!< USART receiver timeout flag */
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#define USART_FLAG_TC USART_ISR_TC /*!< USART transmission complete */
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#define USART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< USART read data register not empty */
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#define USART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< USART RXFIFO not empty */
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#define USART_FLAG_IDLE USART_ISR_IDLE /*!< USART idle flag */
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#define USART_FLAG_ORE USART_ISR_ORE /*!< USART overrun error */
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#define USART_FLAG_NE USART_ISR_NE /*!< USART noise error */
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#define USART_FLAG_FE USART_ISR_FE /*!< USART frame error */
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#define USART_FLAG_PE USART_ISR_PE /*!< USART parity error */
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/**
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* @}
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*/
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/** @defgroup USART_Interrupt_definition USART Interrupts Definition
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* Elements values convention: 0000ZZZZ0XXYYYYYb
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* - YYYYY : Interrupt source position in the XX register (5bits)
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* - XX : Interrupt source register (2bits)
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* - 01: CR1 register
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* - 10: CR2 register
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* - 11: CR3 register
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* - ZZZZ : Flag position in the ISR register(4bits)
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* @{
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*/
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#define USART_IT_PE 0x0028U /*!< USART parity error interruption */
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#define USART_IT_TXE 0x0727U /*!< USART transmit data register empty interruption */
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#define USART_IT_TXFNF 0x0727U /*!< USART TX FIFO not full interruption */
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#define USART_IT_TC 0x0626U /*!< USART transmission complete interruption */
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#define USART_IT_RXNE 0x0525U /*!< USART read data register not empty interruption */
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#define USART_IT_RXFNE 0x0525U /*!< USART RXFIFO not empty interruption */
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#define USART_IT_IDLE 0x0424U /*!< USART idle interruption */
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#define USART_IT_ERR 0x0060U /*!< USART error interruption */
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#define USART_IT_ORE 0x0300U /*!< USART overrun error interruption */
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#define USART_IT_NE 0x0200U /*!< USART noise error interruption */
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#define USART_IT_FE 0x0100U /*!< USART frame error interruption */
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#define USART_IT_RXFF 0x183FU /*!< USART RXFIFO full interruption */
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#define USART_IT_TXFE 0x173EU /*!< USART TXFIFO empty interruption */
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#define USART_IT_RXFT 0x1A7CU /*!< USART RXFIFO threshold reached interruption */
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#define USART_IT_TXFT 0x1B77U /*!< USART TXFIFO threshold reached interruption */
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/**
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* @}
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*/
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/** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
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* @{
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*/
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#define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
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#define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
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#define USART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
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#define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
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#define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
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#define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
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#define USART_CLEAR_UDRF USART_ICR_UDRCF /*!< SPI slave underrun error Clear Flag */
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#define USART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO Empty Clear Flag */
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#define USART_CLEAR_RTOF USART_ICR_RTOCF /*!< USART receiver timeout clear flag */
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/**
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* @}
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*/
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/** @defgroup USART_Interruption_Mask USART Interruption Flags Mask
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* @{
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*/
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#define USART_IT_MASK 0x001FU /*!< USART interruptions flags mask */
|
|
#define USART_CR_MASK 0x00E0U /*!< USART control register mask */
|
|
#define USART_CR_POS 5U /*!< USART control register position */
|
|
#define USART_ISR_MASK 0x1F00U /*!< USART ISR register mask */
|
|
#define USART_ISR_POS 8U /*!< USART ISR register position */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Exported macros -----------------------------------------------------------*/
|
|
/** @defgroup USART_Exported_Macros USART Exported Macros
|
|
* @{
|
|
*/
|
|
|
|
/** @brief Reset USART handle state.
|
|
* @param __HANDLE__ USART handle.
|
|
* @retval None
|
|
*/
|
|
#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
|
|
#define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
|
(__HANDLE__)->State = HAL_USART_STATE_RESET; \
|
|
(__HANDLE__)->MspInitCallback = NULL; \
|
|
(__HANDLE__)->MspDeInitCallback = NULL; \
|
|
} while(0U)
|
|
#else
|
|
#define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
|
|
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
|
|
|
|
/** @brief Check whether the specified USART flag is set or not.
|
|
* @param __HANDLE__ specifies the USART Handle
|
|
* @param __FLAG__ specifies the flag to check.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref USART_FLAG_TXFT TXFIFO threshold flag
|
|
* @arg @ref USART_FLAG_RXFT RXFIFO threshold flag
|
|
* @arg @ref USART_FLAG_RXFF RXFIFO Full flag
|
|
* @arg @ref USART_FLAG_TXFE TXFIFO Empty flag
|
|
* @arg @ref USART_FLAG_REACK Receive enable acknowledge flag
|
|
* @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag
|
|
* @arg @ref USART_FLAG_BUSY Busy flag
|
|
* @arg @ref USART_FLAG_UDR SPI slave underrun error flag
|
|
* @arg @ref USART_FLAG_TXE Transmit data register empty flag
|
|
* @arg @ref USART_FLAG_TXFNF TXFIFO not full flag
|
|
* @arg @ref USART_FLAG_TC Transmission Complete flag
|
|
* @arg @ref USART_FLAG_RXNE Receive data register not empty flag
|
|
* @arg @ref USART_FLAG_RXFNE RXFIFO not empty flag
|
|
* @arg @ref USART_FLAG_RTOF Receiver Timeout flag
|
|
* @arg @ref USART_FLAG_IDLE Idle Line detection flag
|
|
* @arg @ref USART_FLAG_ORE OverRun Error flag
|
|
* @arg @ref USART_FLAG_NE Noise Error flag
|
|
* @arg @ref USART_FLAG_FE Framing Error flag
|
|
* @arg @ref USART_FLAG_PE Parity Error flag
|
|
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
|
*/
|
|
#define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
|
|
|
|
/** @brief Clear the specified USART pending flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @param __FLAG__ specifies the flag to check.
|
|
* This parameter can be any combination of the following values:
|
|
* @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
|
|
* @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
|
|
* @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
|
|
* @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
|
|
* @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
|
|
* @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag
|
|
* @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
|
|
* @arg @ref USART_CLEAR_RTOF Receiver Timeout clear flag
|
|
* @arg @ref USART_CLEAR_UDRF SPI slave underrun error Clear Flag
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
|
|
|
|
/** @brief Clear the USART PE pending flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF)
|
|
|
|
/** @brief Clear the USART FE pending flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF)
|
|
|
|
/** @brief Clear the USART NE pending flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF)
|
|
|
|
/** @brief Clear the USART ORE pending flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF)
|
|
|
|
/** @brief Clear the USART IDLE pending flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
|
|
|
|
/** @brief Clear the USART TX FIFO empty clear flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_TXFECF(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_TXFECF)
|
|
|
|
/** @brief Clear SPI slave underrun error flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_UDRFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_UDRF)
|
|
|
|
/** @brief Enable the specified USART interrupt.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @param __INTERRUPT__ specifies the USART interrupt source to enable.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref USART_IT_RXFF RXFIFO Full interrupt
|
|
* @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
|
|
* @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
|
|
* @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
|
|
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
|
* @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
|
|
* @arg @ref USART_IT_TC Transmission complete interrupt
|
|
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
|
* @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
|
|
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
|
* @arg @ref USART_IT_PE Parity Error interrupt
|
|
* @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__)\
|
|
(((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\
|
|
((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
|
((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\
|
|
((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
|
((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
|
|
|
|
/** @brief Disable the specified USART interrupt.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @param __INTERRUPT__ specifies the USART interrupt source to disable.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref USART_IT_RXFF RXFIFO Full interrupt
|
|
* @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
|
|
* @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
|
|
* @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
|
|
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
|
* @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
|
|
* @arg @ref USART_IT_TC Transmission complete interrupt
|
|
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
|
* @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
|
|
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
|
* @arg @ref USART_IT_PE Parity Error interrupt
|
|
* @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__)\
|
|
(((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\
|
|
((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
|
((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\
|
|
((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
|
((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
|
|
|
|
/** @brief Check whether the specified USART interrupt has occurred or not.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @param __INTERRUPT__ specifies the USART interrupt source to check.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref USART_IT_RXFF RXFIFO Full interrupt
|
|
* @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
|
|
* @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
|
|
* @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
|
|
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
|
* @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
|
|
* @arg @ref USART_IT_TC Transmission complete interrupt
|
|
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
|
* @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
|
|
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
|
* @arg @ref USART_IT_ORE OverRun Error interrupt
|
|
* @arg @ref USART_IT_NE Noise Error interrupt
|
|
* @arg @ref USART_IT_FE Framing Error interrupt
|
|
* @arg @ref USART_IT_PE Parity Error interrupt
|
|
* @retval The new state of __INTERRUPT__ (SET or RESET).
|
|
*/
|
|
#define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
|
|
& (0x01U << (((__INTERRUPT__) & USART_ISR_MASK)>>\
|
|
USART_ISR_POS))) != 0U) ? SET : RESET)
|
|
|
|
/** @brief Check whether the specified USART interrupt source is enabled or not.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @param __INTERRUPT__ specifies the USART interrupt source to check.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref USART_IT_RXFF RXFIFO Full interrupt
|
|
* @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
|
|
* @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
|
|
* @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
|
|
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
|
* @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
|
|
* @arg @ref USART_IT_TC Transmission complete interrupt
|
|
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
|
* @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
|
|
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
|
* @arg @ref USART_IT_ORE OverRun Error interrupt
|
|
* @arg @ref USART_IT_NE Noise Error interrupt
|
|
* @arg @ref USART_IT_FE Framing Error interrupt
|
|
* @arg @ref USART_IT_PE Parity Error interrupt
|
|
* @retval The new state of __INTERRUPT__ (SET or RESET).
|
|
*/
|
|
#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U) ?\
|
|
(__HANDLE__)->Instance->CR1 : \
|
|
(((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U) ?\
|
|
(__HANDLE__)->Instance->CR2 : \
|
|
(__HANDLE__)->Instance->CR3)) & (0x01U <<\
|
|
(((uint16_t)(__INTERRUPT__)) &\
|
|
USART_IT_MASK))) != 0U) ? SET : RESET)
|
|
|
|
/** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
|
|
* to clear the corresponding interrupt.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
|
|
* @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
|
|
* @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
|
|
* @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
|
|
* @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
|
|
* @arg @ref USART_CLEAR_RTOF Receiver timeout clear flag
|
|
* @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag
|
|
* @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
|
|
|
|
/** @brief Set a specific USART request flag.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @param __REQ__ specifies the request flag to set.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request
|
|
* @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request
|
|
*
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
|
|
|
|
/** @brief Enable the USART one bit sample method.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
|
|
|
|
/** @brief Disable the USART one bit sample method.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
|
|
|
|
/** @brief Enable USART.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
|
|
|
/** @brief Disable USART.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private macros --------------------------------------------------------*/
|
|
/** @defgroup USART_Private_Macros USART Private Macros
|
|
* @{
|
|
*/
|
|
|
|
/** @brief Get USART clock division factor from clock prescaler value.
|
|
* @param __CLOCKPRESCALER__ USART prescaler value.
|
|
* @retval USART clock division factor
|
|
*/
|
|
#define USART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
|
|
(((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) ? 1U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) ? 2U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) ? 4U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) ? 6U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) ? 8U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) ? 10U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) ? 12U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) ? 16U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) ? 32U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) ? 64U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) ? 128U : \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256) ? 256U : 1U)
|
|
|
|
/** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
|
|
* @param __PCLK__ USART clock.
|
|
* @param __BAUD__ Baud rate set by the user.
|
|
* @param __CLOCKPRESCALER__ USART prescaler value.
|
|
* @retval Division result
|
|
*/
|
|
#define USART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__)\
|
|
(((((__PCLK__)/USART_GET_DIV_FACTOR(__CLOCKPRESCALER__))*2U)\
|
|
+ ((__BAUD__)/2U)) / (__BAUD__))
|
|
|
|
/** @brief Report the USART clock source.
|
|
* @param __HANDLE__ specifies the USART Handle.
|
|
* @param __CLOCKSOURCE__ output variable.
|
|
* @retval the USART clocking source, written in __CLOCKSOURCE__.
|
|
*/
|
|
#if defined(UART9) && defined(USART10)
|
|
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
do { \
|
|
if((__HANDLE__)->Instance == USART1) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
{ \
|
|
case RCC_USART1CLKSOURCE_D2PCLK2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART2) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
|
{ \
|
|
case RCC_USART2CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART3) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
|
{ \
|
|
case RCC_USART3CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART6) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART6_SOURCE()) \
|
|
{ \
|
|
case RCC_USART6CLKSOURCE_D2PCLK2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART10) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART10_SOURCE()) \
|
|
{ \
|
|
case RCC_USART10CLKSOURCE_D2PCLK2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
|
|
break; \
|
|
case RCC_USART10CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART10CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART10CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART10CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART10CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else \
|
|
{ \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
} \
|
|
} while(0U)
|
|
#else
|
|
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
do { \
|
|
if((__HANDLE__)->Instance == USART1) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
{ \
|
|
case RCC_USART1CLKSOURCE_D2PCLK2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART2) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
|
{ \
|
|
case RCC_USART2CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART3) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
|
{ \
|
|
case RCC_USART3CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART6) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART6_SOURCE()) \
|
|
{ \
|
|
case RCC_USART6CLKSOURCE_D2PCLK2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else \
|
|
{ \
|
|
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
|
} \
|
|
} while(0U)
|
|
#endif /* UART9 && USART10 */
|
|
|
|
/** @brief Check USART Baud rate.
|
|
* @param __BAUDRATE__ Baudrate specified by the user.
|
|
* The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz)
|
|
* divided by the smallest oversampling used on the USART (i.e. 8)
|
|
* @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) */
|
|
#define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
|
|
|
|
/**
|
|
* @brief Ensure that USART frame number of stop bits is valid.
|
|
* @param __STOPBITS__ USART frame number of stop bits.
|
|
* @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
|
|
*/
|
|
#define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \
|
|
((__STOPBITS__) == USART_STOPBITS_1) || \
|
|
((__STOPBITS__) == USART_STOPBITS_1_5) || \
|
|
((__STOPBITS__) == USART_STOPBITS_2))
|
|
|
|
/**
|
|
* @brief Ensure that USART frame parity is valid.
|
|
* @param __PARITY__ USART frame parity.
|
|
* @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
|
|
*/
|
|
#define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
|
|
((__PARITY__) == USART_PARITY_EVEN) || \
|
|
((__PARITY__) == USART_PARITY_ODD))
|
|
|
|
/**
|
|
* @brief Ensure that USART communication mode is valid.
|
|
* @param __MODE__ USART communication mode.
|
|
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
|
|
*/
|
|
#define IS_USART_MODE(__MODE__) ((((__MODE__) & 0xFFFFFFF3U) == 0x00U) && ((__MODE__) != 0x00U))
|
|
|
|
/**
|
|
* @brief Ensure that USART clock state is valid.
|
|
* @param __CLOCK__ USART clock state.
|
|
* @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid)
|
|
*/
|
|
#define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \
|
|
((__CLOCK__) == USART_CLOCK_ENABLE))
|
|
|
|
/**
|
|
* @brief Ensure that USART frame polarity is valid.
|
|
* @param __CPOL__ USART frame polarity.
|
|
* @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
|
|
*/
|
|
#define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
|
|
|
|
/**
|
|
* @brief Ensure that USART frame phase is valid.
|
|
* @param __CPHA__ USART frame phase.
|
|
* @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
|
|
*/
|
|
#define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
|
|
|
|
/**
|
|
* @brief Ensure that USART frame last bit clock pulse setting is valid.
|
|
* @param __LASTBIT__ USART frame last bit clock pulse setting.
|
|
* @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid)
|
|
*/
|
|
#define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
|
|
((__LASTBIT__) == USART_LASTBIT_ENABLE))
|
|
|
|
/**
|
|
* @brief Ensure that USART request parameter is valid.
|
|
* @param __PARAM__ USART request parameter.
|
|
* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
|
|
*/
|
|
#define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
|
|
((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
|
|
|
|
/**
|
|
* @brief Ensure that USART Prescaler is valid.
|
|
* @param __CLOCKPRESCALER__ USART Prescaler value.
|
|
* @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
|
|
*/
|
|
#define IS_USART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) || \
|
|
((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256))
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Include USART HAL Extended module */
|
|
#include "stm32h7xx_hal_usart_ex.h"
|
|
|
|
/* Exported functions --------------------------------------------------------*/
|
|
/** @addtogroup USART_Exported_Functions USART Exported Functions
|
|
* @{
|
|
*/
|
|
|
|
/** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
|
|
* @{
|
|
*/
|
|
|
|
/* Initialization and de-initialization functions ****************************/
|
|
HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
|
|
HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
|
|
void HAL_USART_MspInit(USART_HandleTypeDef *husart);
|
|
void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
|
|
|
|
/* Callbacks Register/UnRegister functions ***********************************/
|
|
#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
|
|
HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID,
|
|
pUSART_CallbackTypeDef pCallback);
|
|
HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID);
|
|
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup USART_Exported_Functions_Group2 IO operation functions
|
|
* @{
|
|
*/
|
|
|
|
/* IO operation functions *****************************************************/
|
|
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size,
|
|
uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
|
|
uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
|
|
uint16_t Size);
|
|
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
|
|
uint16_t Size);
|
|
HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
|
|
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
|
|
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
|
|
/* Transfer Abort functions */
|
|
HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
|
|
HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
|
|
|
|
void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
|
|
void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
|
|
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
|
|
void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
|
|
void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
|
|
void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
|
|
void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
|
|
void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions
|
|
* @{
|
|
*/
|
|
|
|
/* Peripheral State and Error functions ***************************************/
|
|
HAL_USART_StateTypeDef HAL_USART_GetState(const USART_HandleTypeDef *husart);
|
|
uint32_t HAL_USART_GetError(const USART_HandleTypeDef *husart);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* STM32H7xx_HAL_USART_H */
|
|
|