860 lines
25 KiB
C
860 lines
25 KiB
C
/**
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******************************************************************************
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* @file stm32h7xx_hal_exti.c
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* @author MCD Application Team
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* @brief EXTI HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the General Purpose Input/Output (EXTI) peripheral:
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* + Initialization and de-initialization functions
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* + IO operation functions
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### EXTI Peripheral features #####
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==============================================================================
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[..]
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(+) Each Exti line can be configured within this driver.
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(+) Exti line can be configured in 3 different modes
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(++) Interrupt (CORE1 or CORE2 in case of dual core line )
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(++) Event (CORE1 or CORE2 in case of dual core line )
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(++) a combination of the previous
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(+) Configurable Exti lines can be configured with 3 different triggers
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(++) Rising
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(++) Falling
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(++) Both of them
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(+) When set in interrupt mode, configurable Exti lines have two diffenrents
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interrupt pending registers which allow to distinguish which transition
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occurs:
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(++) Rising edge pending interrupt
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(++) Falling
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(+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can
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be selected through multiplexer.
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(+) PendClearSource used to set the D3 Smart Run Domain autoamtic pend clear source.
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It is applicable for line with wkaeup target is Any (CPU1 , CPU2 and D3 smart run domain).
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Value can be one of the following:
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(++) EXTI_D3_PENDCLR_SRC_NONE : no pend clear source is selected :
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In this case corresponding bit of D2PMRx register is set to 0
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(+++) On a configurable Line : the D3 domain wakeup signal is
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automatically cleared after after the Delay + Rising Edge detect
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(+++) On a direct Line : the D3 domain wakeup signal is
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cleared after the direct event input signal is cleared
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(++) EXTI_D3_PENDCLR_SRC_DMACH6 : no pend clear source is selected :
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In this case corresponding bit of D2PMRx register is set to 1
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and corresponding bits(2) of D3PCRxL/H is set to b00 :
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DMA ch6 event selected as D3 domain pendclear source
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(++) EXTI_D3_PENDCLR_SRC_DMACH7 : no pend clear source is selected :
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In this case corresponding bit of D2PMRx register is set to 1
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and corresponding bits(2) of D3PCRxL/H is set to b01 :
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DMA ch7 event selected as D3 domain pendclear source
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(++) EXTI_D3_PENDCLR_SRC_LPTIM4 : no pend clear source is selected :
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In this case corresponding bit of D2PMRx register is set to 1
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and corresponding bits(2) of D3PCRxL/H is set to b10 :
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LPTIM4 out selected as D3 domain pendclear source
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(++) EXTI_D3_PENDCLR_SRC_LPTIM5 : no pend clear source is selected :
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In this case corresponding bit of D2PMRx register is set to 1
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and corresponding bits(2) of D3PCRxL/H is set to b11 :
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LPTIM5 out selected as D3 domain pendclear source
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##### How to use this driver #####
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==============================================================================
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[..]
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(#) Configure the EXTI line using HAL_EXTI_SetConfigLine().
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(++) Choose the interrupt line number by setting "Line" member from
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EXTI_ConfigTypeDef structure.
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(++) Configure the interrupt and/or event mode using "Mode" member from
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EXTI_ConfigTypeDef structure.
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(++) For configurable lines, configure rising and/or falling trigger
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"Trigger" member from EXTI_ConfigTypeDef structure.
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(++) For Exti lines linked to gpio, choose gpio port using "GPIOSel"
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member from GPIO_InitTypeDef structure.
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(++) For Exti lines with wkaeup target is Any (CPU1 , CPU2 and D3 smart run domain),
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choose gpio D3 PendClearSource using PendClearSource
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member from EXTI_PendClear_Source structure.
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(#) Get current Exti configuration of a dedicated line using
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HAL_EXTI_GetConfigLine().
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(++) Provide exiting handle as parameter.
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(++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
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(#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
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(++) Provide exiting handle as parameter.
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(#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
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(++) Provide exiting handle as first parameter.
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(++) Provide which callback will be registered using one value from
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EXTI_CallbackIDTypeDef.
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(++) Provide callback function pointer.
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(#) Get interrupt pending bit using HAL_EXTI_GetPending().
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(#) Clear interrupt pending bit using HAL_EXTI_GetPending().
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(#) Generate software interrupt using HAL_EXTI_GenerateSWI().
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@endverbatim
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal.h"
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/** @addtogroup STM32H7xx_HAL_Driver
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* @{
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*/
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/** @addtogroup EXTI
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* @{
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*/
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#ifdef HAL_EXTI_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private defines ------------------------------------------------------------*/
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/** @defgroup EXTI_Private_Constants EXTI Private Constants
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* @{
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*/
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#define EXTI_MODE_OFFSET 0x04U /* 0x10: offset between CPU IMR/EMR registers */
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#define EXTI_CONFIG_OFFSET 0x08U /* 0x20: offset between CPU Rising/Falling configuration registers */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup EXTI_Exported_Functions
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* @{
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*/
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/** @addtogroup EXTI_Exported_Functions_Group1
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* @brief Configuration functions
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*
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@verbatim
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===============================================================================
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##### Configuration functions #####
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===============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Set configuration of a dedicated Exti line.
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* @param hexti Exti handle.
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* @param pExtiConfig Pointer on EXTI configuration to be set.
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* @retval HAL Status.
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*/
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HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
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{
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__IO uint32_t *regaddr;
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uint32_t regval;
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uint32_t linepos;
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uint32_t maskline;
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uint32_t offset;
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uint32_t pcrlinepos;
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/* Check null pointer */
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if ((hexti == NULL) || (pExtiConfig == NULL))
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_EXTI_LINE(pExtiConfig->Line));
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assert_param(IS_EXTI_MODE(pExtiConfig->Mode));
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/* Assign line number to handle */
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hexti->Line = pExtiConfig->Line;
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/* compute line register offset and line mask */
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offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
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linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
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maskline = (1UL << linepos);
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/* Configure triggers for configurable lines */
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if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00U)
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{
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assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger));
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/* Configure rising trigger */
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regaddr = (__IO uint32_t *)(&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
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regval = *regaddr;
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/* Mask or set line */
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if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00U)
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{
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regval |= maskline;
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}
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else
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{
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regval &= ~maskline;
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}
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/* Store rising trigger mode */
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*regaddr = regval;
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/* Configure falling trigger */
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regaddr = (__IO uint32_t *)(&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
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regval = *regaddr;
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/* Mask or set line */
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if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00U)
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{
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regval |= maskline;
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}
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else
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{
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regval &= ~maskline;
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}
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/* Store falling trigger mode */
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*regaddr = regval;
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/* Configure gpio port selection in case of gpio exti line */
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if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
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{
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assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel));
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assert_param(IS_EXTI_GPIO_PIN(linepos));
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regval = SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL];
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regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03U)));
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regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03U)));
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SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL] = regval;
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}
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}
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/* Configure interrupt mode : read current mode */
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regaddr = (__IO uint32_t *)(&EXTI->IMR1 + (EXTI_MODE_OFFSET * offset));
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regval = *regaddr;
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/* Mask or set line */
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if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00U)
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{
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regval |= maskline;
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}
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else
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{
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regval &= ~maskline;
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}
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/* Store interrupt mode */
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*regaddr = regval;
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/* The event mode cannot be configured if the line does not support it */
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assert_param(((pExtiConfig->Line & EXTI_EVENT) == EXTI_EVENT) || ((pExtiConfig->Mode & EXTI_MODE_EVENT) != EXTI_MODE_EVENT));
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/* Configure event mode : read current mode */
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regaddr = (__IO uint32_t *)(&EXTI->EMR1 + (EXTI_MODE_OFFSET * offset));
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regval = *regaddr;
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/* Mask or set line */
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if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00U)
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{
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regval |= maskline;
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}
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else
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{
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regval &= ~maskline;
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}
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/* Store event mode */
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*regaddr = regval;
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#if defined (DUAL_CORE)
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/* Configure interrupt mode for Core2 : read current mode */
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regaddr = (__IO uint32_t *)(&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
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regval = *regaddr;
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/* Mask or set line */
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if ((pExtiConfig->Mode & EXTI_MODE_CORE2_INTERRUPT) != 0x00U)
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{
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regval |= maskline;
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}
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else
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{
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regval &= ~maskline;
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}
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/* Store interrupt mode */
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*regaddr = regval;
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/* The event mode cannot be configured if the line does not support it */
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assert_param(((pExtiConfig->Line & EXTI_EVENT) == EXTI_EVENT) || ((pExtiConfig->Mode & EXTI_MODE_CORE2_EVENT) != EXTI_MODE_CORE2_EVENT));
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/* Configure event mode : read current mode */
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regaddr = (__IO uint32_t *)(&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
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regval = *regaddr;
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/* Mask or set line */
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if ((pExtiConfig->Mode & EXTI_MODE_CORE2_EVENT) != 0x00U)
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{
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regval |= maskline;
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}
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else
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{
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regval &= ~maskline;
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}
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/* Store event mode */
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*regaddr = regval;
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#endif /* DUAL_CORE */
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/* Configure the D3 PendClear source in case of Wakeup target is Any */
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if ((pExtiConfig->Line & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)
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{
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assert_param(IS_EXTI_D3_PENDCLR_SRC(pExtiConfig->PendClearSource));
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/*Calc the PMR register address for the given line */
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regaddr = (__IO uint32_t *)(&EXTI->D3PMR1 + (EXTI_CONFIG_OFFSET * offset));
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regval = *regaddr;
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if(pExtiConfig->PendClearSource == EXTI_D3_PENDCLR_SRC_NONE)
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{
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/* Clear D3PMRx register for the given line */
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regval &= ~maskline;
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/* Store D3PMRx register value */
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*regaddr = regval;
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}
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else
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{
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/* Set D3PMRx register to 1 for the given line */
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regval |= maskline;
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/* Store D3PMRx register value */
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*regaddr = regval;
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if(linepos < 16UL)
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{
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regaddr = (__IO uint32_t *)(&EXTI->D3PCR1L + (EXTI_CONFIG_OFFSET * offset));
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pcrlinepos = 1UL << linepos;
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}
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else
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{
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regaddr = (__IO uint32_t *)(&EXTI->D3PCR1H + (EXTI_CONFIG_OFFSET * offset));
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pcrlinepos = 1UL << (linepos - 16UL);
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}
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regval = (*regaddr & (~(pcrlinepos * pcrlinepos * 3UL))) | (pcrlinepos * pcrlinepos * (pExtiConfig->PendClearSource - 1UL));
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*regaddr = regval;
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}
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}
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return HAL_OK;
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}
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/**
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* @brief Get configuration of a dedicated Exti line.
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* @param hexti Exti handle.
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* @param pExtiConfig Pointer on structure to store Exti configuration.
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* @retval HAL Status.
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*/
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HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
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{
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__IO uint32_t *regaddr;
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uint32_t regval;
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uint32_t linepos;
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uint32_t maskline;
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uint32_t offset;
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uint32_t pcrlinepos;
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/* Check null pointer */
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if ((hexti == NULL) || (pExtiConfig == NULL))
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{
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return HAL_ERROR;
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}
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/* Check the parameter */
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assert_param(IS_EXTI_LINE(hexti->Line));
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/* Store handle line number to configuration structure */
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pExtiConfig->Line = hexti->Line;
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/* compute line register offset and line mask */
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offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
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linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
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maskline = (1UL << linepos);
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/* 1] Get core mode : interrupt */
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regaddr = (__IO uint32_t *)(&EXTI->IMR1 + (EXTI_MODE_OFFSET * offset));
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regval = *regaddr;
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pExtiConfig->Mode = EXTI_MODE_NONE;
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/* Check if selected line is enable */
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if ((regval & maskline) != 0x00U)
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{
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pExtiConfig->Mode = EXTI_MODE_INTERRUPT;
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}
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/* Get event mode */
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regaddr = (__IO uint32_t *)(&EXTI->EMR1 + (EXTI_MODE_OFFSET * offset));
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regval = *regaddr;
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/* Check if selected line is enable */
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if ((regval & maskline) != 0x00U)
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{
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pExtiConfig->Mode |= EXTI_MODE_EVENT;
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}
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#if defined (DUAL_CORE)
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regaddr = (__IO uint32_t *)(&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
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regval = *regaddr;
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/* Check if selected line is enable */
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if ((regval & maskline) != 0x00U)
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{
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pExtiConfig->Mode = EXTI_MODE_CORE2_INTERRUPT;
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}
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/* Get event mode */
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regaddr = (__IO uint32_t *)(&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
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regval = *regaddr;
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/* Check if selected line is enable */
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if ((regval & maskline) != 0x00U)
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{
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pExtiConfig->Mode |= EXTI_MODE_CORE2_EVENT;
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}
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#endif /*DUAL_CORE*/
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/* Get default Trigger and GPIOSel configuration */
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pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
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pExtiConfig->GPIOSel = 0x00U;
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/* 2] Get trigger for configurable lines : rising */
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if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00U)
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{
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regaddr = (__IO uint32_t *)(&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
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regval = *regaddr;
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/* Check if configuration of selected line is enable */
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if ((regval & maskline) != 0x00U)
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{
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pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
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}
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/* Get falling configuration */
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regaddr = (__IO uint32_t *)(&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
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regval = *regaddr;
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/* Check if configuration of selected line is enable */
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if ((regval & maskline) != 0x00U)
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{
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pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING;
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}
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/* Get Gpio port selection for gpio lines */
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if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
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{
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assert_param(IS_EXTI_GPIO_PIN(linepos));
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regval = SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL];
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pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EXTICR1_EXTI0;
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}
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}
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/* Get default Pend Clear Source */
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pExtiConfig->PendClearSource = EXTI_D3_PENDCLR_SRC_NONE;
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/* 3] Get D3 Pend Clear source */
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if ((pExtiConfig->Line & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)
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{
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regaddr = (__IO uint32_t *)(&EXTI->D3PMR1 + (EXTI_CONFIG_OFFSET * offset));
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if(((*regaddr) & linepos) != 0UL)
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{
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/* if wakeup target is any and PMR set, the read pend clear source from D3PCRxL/H */
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if(linepos < 16UL)
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{
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regaddr = (__IO uint32_t *)(&EXTI->D3PCR1L + (EXTI_CONFIG_OFFSET * offset));
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pcrlinepos = 1UL << linepos;
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}
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else
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{
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regaddr = (__IO uint32_t *)(&EXTI->D3PCR1H + (EXTI_CONFIG_OFFSET * offset));
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pcrlinepos = 1UL << (linepos - 16UL);
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}
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pExtiConfig->PendClearSource = 1UL + ((*regaddr & (pcrlinepos * pcrlinepos * 3UL)) / (pcrlinepos * pcrlinepos));
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Clear whole configuration of a dedicated Exti line.
|
|
* @param hexti Exti handle.
|
|
* @retval HAL Status.
|
|
*/
|
|
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
|
|
{
|
|
__IO uint32_t *regaddr;
|
|
uint32_t regval;
|
|
uint32_t linepos;
|
|
uint32_t maskline;
|
|
uint32_t offset;
|
|
uint32_t pcrlinepos;
|
|
|
|
/* Check null pointer */
|
|
if (hexti == NULL)
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Check the parameter */
|
|
assert_param(IS_EXTI_LINE(hexti->Line));
|
|
|
|
/* compute line register offset and line mask */
|
|
offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
|
|
linepos = (hexti->Line & EXTI_PIN_MASK);
|
|
maskline = (1UL << linepos);
|
|
|
|
/* 1] Clear interrupt mode */
|
|
regaddr = (__IO uint32_t *)(&EXTI->IMR1 + (EXTI_MODE_OFFSET * offset));
|
|
regval = (*regaddr & ~maskline);
|
|
*regaddr = regval;
|
|
|
|
/* 2] Clear event mode */
|
|
regaddr = (__IO uint32_t *)(&EXTI->EMR1 + (EXTI_MODE_OFFSET * offset));
|
|
regval = (*regaddr & ~maskline);
|
|
*regaddr = regval;
|
|
|
|
#if defined (DUAL_CORE)
|
|
/* 1] Clear CM4 interrupt mode */
|
|
regaddr = (__IO uint32_t *)(&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
|
|
regval = (*regaddr & ~maskline);
|
|
*regaddr = regval;
|
|
|
|
/* 2] Clear CM4 event mode */
|
|
regaddr = (__IO uint32_t *)(&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
|
|
regval = (*regaddr & ~maskline);
|
|
*regaddr = regval;
|
|
#endif /* DUAL_CORE */
|
|
|
|
/* 3] Clear triggers in case of configurable lines */
|
|
if ((hexti->Line & EXTI_CONFIG) != 0x00U)
|
|
{
|
|
regaddr = (__IO uint32_t *)(&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
|
|
regval = (*regaddr & ~maskline);
|
|
*regaddr = regval;
|
|
|
|
regaddr = (__IO uint32_t *)(&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
|
|
regval = (*regaddr & ~maskline);
|
|
*regaddr = regval;
|
|
|
|
/* Get Gpio port selection for gpio lines */
|
|
if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO)
|
|
{
|
|
assert_param(IS_EXTI_GPIO_PIN(linepos));
|
|
|
|
regval = SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL];
|
|
regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03UL)));
|
|
SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL] = regval;
|
|
}
|
|
}
|
|
|
|
/* 4] Clear D3 Config lines */
|
|
if ((hexti->Line & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)
|
|
{
|
|
regaddr = (__IO uint32_t *)(&EXTI->D3PMR1 + (EXTI_CONFIG_OFFSET * offset));
|
|
*regaddr = (*regaddr & ~maskline);
|
|
|
|
if(linepos < 16UL)
|
|
{
|
|
regaddr = (__IO uint32_t *)(&EXTI->D3PCR1L + (EXTI_CONFIG_OFFSET * offset));
|
|
pcrlinepos = 1UL << linepos;
|
|
}
|
|
else
|
|
{
|
|
regaddr = (__IO uint32_t *)(&EXTI->D3PCR1H + (EXTI_CONFIG_OFFSET * offset));
|
|
pcrlinepos = 1UL << (linepos - 16UL);
|
|
}
|
|
|
|
/*Clear D3 PendClear source */
|
|
*regaddr &= (~(pcrlinepos * pcrlinepos * 3UL));
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Register callback for a dedicated Exti line.
|
|
* @param hexti Exti handle.
|
|
* @param CallbackID User callback identifier.
|
|
* This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values.
|
|
* @param pPendingCbfn function pointer to be stored as callback.
|
|
* @retval HAL Status.
|
|
*/
|
|
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void))
|
|
{
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
/* Check null pointer */
|
|
if (hexti == NULL)
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
switch (CallbackID)
|
|
{
|
|
case HAL_EXTI_COMMON_CB_ID:
|
|
hexti->PendingCallback = pPendingCbfn;
|
|
break;
|
|
|
|
default:
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
|
|
return status;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Store line number as handle private field.
|
|
* @param hexti Exti handle.
|
|
* @param ExtiLine Exti line number.
|
|
* This parameter can be from 0 to @ref EXTI_LINE_NB.
|
|
* @retval HAL Status.
|
|
*/
|
|
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_EXTI_LINE(ExtiLine));
|
|
|
|
/* Check null pointer */
|
|
if (hexti == NULL)
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
else
|
|
{
|
|
/* Store line number as handle private field */
|
|
hexti->Line = ExtiLine;
|
|
|
|
return HAL_OK;
|
|
}
|
|
}
|
|
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup EXTI_Exported_Functions_Group2
|
|
* @brief EXTI IO functions.
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### IO operation functions #####
|
|
===============================================================================
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Handle EXTI interrupt request.
|
|
* @param hexti Exti handle.
|
|
* @retval none.
|
|
*/
|
|
void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
|
|
{
|
|
__IO uint32_t *regaddr;
|
|
uint32_t regval;
|
|
uint32_t maskline;
|
|
uint32_t offset;
|
|
|
|
/* Compute line register offset and line mask */
|
|
offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
|
|
maskline = (1UL << (hexti->Line & EXTI_PIN_MASK));
|
|
|
|
#if defined(DUAL_CORE)
|
|
if (HAL_GetCurrentCPUID() == CM7_CPUID)
|
|
{
|
|
/* Get pending register address */
|
|
regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
|
|
}
|
|
else /* Cortex-M4*/
|
|
{
|
|
/* Get pending register address */
|
|
regaddr = (__IO uint32_t *)(&EXTI->C2PR1 + (EXTI_MODE_OFFSET * offset));
|
|
}
|
|
#else
|
|
regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
|
|
#endif /* DUAL_CORE */
|
|
|
|
/* Get pending bit */
|
|
regval = (*regaddr & maskline);
|
|
|
|
if (regval != 0x00U)
|
|
{
|
|
/* Clear pending bit */
|
|
*regaddr = maskline;
|
|
|
|
/* Call callback */
|
|
if (hexti->PendingCallback != NULL)
|
|
{
|
|
hexti->PendingCallback();
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Get interrupt pending bit of a dedicated line.
|
|
* @param hexti Exti handle.
|
|
* @param Edge Specify which pending edge as to be checked.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref EXTI_TRIGGER_RISING_FALLING
|
|
* This parameter is kept for compatibility with other series.
|
|
* @retval 1 if interrupt is pending else 0.
|
|
*/
|
|
uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
|
|
{
|
|
__IO uint32_t *regaddr;
|
|
uint32_t regval;
|
|
uint32_t linepos;
|
|
uint32_t maskline;
|
|
uint32_t offset;
|
|
|
|
/* Check parameters */
|
|
assert_param(IS_EXTI_LINE(hexti->Line));
|
|
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
|
|
assert_param(IS_EXTI_PENDING_EDGE(Edge));
|
|
|
|
/* compute line register offset and line mask */
|
|
offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
|
|
linepos = (hexti->Line & EXTI_PIN_MASK);
|
|
maskline = (1UL << linepos);
|
|
|
|
#if defined(DUAL_CORE)
|
|
if (HAL_GetCurrentCPUID() == CM7_CPUID)
|
|
{
|
|
/* Get pending register address */
|
|
regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
|
|
}
|
|
else /* Cortex-M4 */
|
|
{
|
|
/* Get pending register address */
|
|
regaddr = (__IO uint32_t *)(&EXTI->C2PR1 + (EXTI_MODE_OFFSET * offset));
|
|
}
|
|
#else
|
|
regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
|
|
#endif /* DUAL_CORE */
|
|
|
|
/* return 1 if bit is set else 0 */
|
|
regval = ((*regaddr & maskline) >> linepos);
|
|
return regval;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Clear interrupt pending bit of a dedicated line.
|
|
* @param hexti Exti handle.
|
|
* @param Edge Specify which pending edge as to be clear.
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref EXTI_TRIGGER_RISING_FALLING
|
|
* This parameter is kept for compatibility with other series.
|
|
* @retval None.
|
|
*/
|
|
void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
|
|
{
|
|
__IO uint32_t *regaddr;
|
|
uint32_t maskline;
|
|
uint32_t offset;
|
|
|
|
/* Check parameters */
|
|
assert_param(IS_EXTI_LINE(hexti->Line));
|
|
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
|
|
assert_param(IS_EXTI_PENDING_EDGE(Edge));
|
|
|
|
/* compute line register offset and line mask */
|
|
offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
|
|
maskline = (1UL << (hexti->Line & EXTI_PIN_MASK));
|
|
|
|
#if defined(DUAL_CORE)
|
|
if (HAL_GetCurrentCPUID() == CM7_CPUID)
|
|
{
|
|
/* Get pending register address */
|
|
regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
|
|
}
|
|
else /* Cortex-M4 */
|
|
{
|
|
/* Get pending register address */
|
|
regaddr = (__IO uint32_t *)(&EXTI->C2PR1 + (EXTI_MODE_OFFSET * offset));
|
|
}
|
|
#else
|
|
regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
|
|
#endif /* DUAL_CORE */
|
|
|
|
/* Clear Pending bit */
|
|
*regaddr = maskline;
|
|
}
|
|
|
|
/**
|
|
* @brief Generate a software interrupt for a dedicated line.
|
|
* @param hexti Exti handle.
|
|
* @retval None.
|
|
*/
|
|
void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
|
|
{
|
|
__IO uint32_t *regaddr;
|
|
uint32_t maskline;
|
|
uint32_t offset;
|
|
|
|
/* Check parameters */
|
|
assert_param(IS_EXTI_LINE(hexti->Line));
|
|
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
|
|
|
|
/* compute line register offset and line mask */
|
|
offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
|
|
maskline = (1UL << (hexti->Line & EXTI_PIN_MASK));
|
|
|
|
regaddr = (__IO uint32_t *)(&EXTI->SWIER1 + (EXTI_CONFIG_OFFSET * offset));
|
|
*regaddr = maskline;
|
|
}
|
|
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* HAL_EXTI_MODULE_ENABLED */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|