871 lines
48 KiB
C
871 lines
48 KiB
C
/**
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******************************************************************************
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* @file stm32h7xx_hal_uart_ex.h
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* @author MCD Application Team
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* @brief Header file of UART HAL Extended module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7xx_HAL_UART_EX_H
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#define STM32H7xx_HAL_UART_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal_def.h"
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/** @addtogroup STM32H7xx_HAL_Driver
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* @{
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*/
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/** @addtogroup UARTEx
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
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* @{
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*/
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/**
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* @brief UART wake up from stop mode parameters
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*/
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typedef struct
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{
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uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF).
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This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
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If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
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be filled up. */
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uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
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This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */
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uint8_t Address; /*!< UART/USART node address (7-bit long max). */
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} UART_WakeUpTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
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* @{
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*/
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/** @defgroup UARTEx_Word_Length UARTEx Word Length
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* @{
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*/
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#define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */
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#define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */
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#define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */
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/**
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* @}
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*/
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/** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
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* @{
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*/
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#define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */
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#define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */
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/**
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* @}
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*/
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/** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode
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* @brief UART FIFO mode
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* @{
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*/
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#define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
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#define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
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/**
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* @}
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*/
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/** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level
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* @brief UART TXFIFO threshold level
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* @{
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*/
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#define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */
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#define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */
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#define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */
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#define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */
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#define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */
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#define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */
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/**
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* @}
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*/
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/** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level
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* @brief UART RXFIFO threshold level
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* @{
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*/
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#define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */
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#define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */
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#define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */
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#define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */
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#define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */
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#define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup UARTEx_Exported_Functions
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* @{
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*/
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/** @addtogroup UARTEx_Exported_Functions_Group1
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* @{
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*/
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/* Initialization and de-initialization functions ****************************/
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HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime,
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uint32_t DeassertionTime);
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/**
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* @}
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*/
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/** @addtogroup UARTEx_Exported_Functions_Group2
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* @{
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*/
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void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
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void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart);
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void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart);
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/**
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* @}
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*/
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/** @addtogroup UARTEx_Exported_Functions_Group3
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* @{
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*/
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/* Peripheral Control functions **********************************************/
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HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
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HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
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HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
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HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
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HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart);
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HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart);
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HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
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HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
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HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
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uint32_t Timeout);
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HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup UARTEx_Private_Macros UARTEx Private Macros
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* @{
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*/
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/** @brief Report the UART clock source.
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* @param __HANDLE__ specifies the UART Handle.
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* @param __CLOCKSOURCE__ output variable.
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* @retval UART clocking source, written in __CLOCKSOURCE__.
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*/
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#if defined(UART9) && defined(USART10)
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#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
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do { \
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if((__HANDLE__)->Instance == USART1) \
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{ \
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switch(__HAL_RCC_GET_USART1_SOURCE()) \
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{ \
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case RCC_USART1CLKSOURCE_D2PCLK2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
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break; \
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case RCC_USART1CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_USART1CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_USART1CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_USART1CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_USART1CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if((__HANDLE__)->Instance == USART2) \
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{ \
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switch(__HAL_RCC_GET_USART2_SOURCE()) \
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{ \
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case RCC_USART2CLKSOURCE_D2PCLK1: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
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break; \
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case RCC_USART2CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_USART2CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_USART2CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_USART2CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_USART2CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if((__HANDLE__)->Instance == USART3) \
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{ \
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switch(__HAL_RCC_GET_USART3_SOURCE()) \
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{ \
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case RCC_USART3CLKSOURCE_D2PCLK1: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
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break; \
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case RCC_USART3CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_USART3CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_USART3CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_USART3CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_USART3CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if((__HANDLE__)->Instance == UART4) \
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{ \
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switch(__HAL_RCC_GET_UART4_SOURCE()) \
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{ \
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case RCC_UART4CLKSOURCE_D2PCLK1: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
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break; \
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case RCC_UART4CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_UART4CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_UART4CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_UART4CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_UART4CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if ((__HANDLE__)->Instance == UART5) \
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{ \
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switch(__HAL_RCC_GET_UART5_SOURCE()) \
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{ \
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case RCC_UART5CLKSOURCE_D2PCLK1: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
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break; \
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case RCC_UART5CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_UART5CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_UART5CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_UART5CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_UART5CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if((__HANDLE__)->Instance == USART6) \
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{ \
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switch(__HAL_RCC_GET_USART6_SOURCE()) \
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{ \
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case RCC_USART6CLKSOURCE_D2PCLK2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
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break; \
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case RCC_USART6CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_USART6CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_USART6CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_USART6CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_USART6CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if((__HANDLE__)->Instance == UART7) \
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{ \
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switch(__HAL_RCC_GET_UART7_SOURCE()) \
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{ \
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case RCC_UART7CLKSOURCE_D2PCLK1: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
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break; \
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case RCC_UART7CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_UART7CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_UART7CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_UART7CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_UART7CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if((__HANDLE__)->Instance == UART8) \
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{ \
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switch(__HAL_RCC_GET_UART8_SOURCE()) \
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{ \
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case RCC_UART8CLKSOURCE_D2PCLK1: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
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break; \
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case RCC_UART8CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_UART8CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_UART8CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_UART8CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_UART8CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if((__HANDLE__)->Instance == UART9) \
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{ \
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switch(__HAL_RCC_GET_UART9_SOURCE()) \
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{ \
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case RCC_UART9CLKSOURCE_D2PCLK2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
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break; \
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case RCC_UART9CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_UART9CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_UART9CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_UART9CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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case RCC_UART9CLKSOURCE_LSE: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
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break; \
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default: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
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break; \
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} \
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} \
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else if((__HANDLE__)->Instance == USART10) \
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{ \
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switch(__HAL_RCC_GET_USART10_SOURCE()) \
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{ \
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case RCC_USART10CLKSOURCE_D2PCLK2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
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break; \
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case RCC_USART10CLKSOURCE_PLL2: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
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break; \
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case RCC_USART10CLKSOURCE_PLL3: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
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break; \
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case RCC_USART10CLKSOURCE_HSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
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break; \
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case RCC_USART10CLKSOURCE_CSI: \
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(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
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break; \
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|
case RCC_USART10CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == LPUART1) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
|
|
{ \
|
|
case RCC_LPUART1CLKSOURCE_D3PCLK1: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D3PCLK1; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else \
|
|
{ \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
} \
|
|
} while(0U)
|
|
#else
|
|
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
do { \
|
|
if((__HANDLE__)->Instance == USART1) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
{ \
|
|
case RCC_USART1CLKSOURCE_D2PCLK2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART1CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART2) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
|
{ \
|
|
case RCC_USART2CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART2CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART3) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
|
{ \
|
|
case RCC_USART3CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART3CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == UART4) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_UART4_SOURCE()) \
|
|
{ \
|
|
case RCC_UART4CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_UART4CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_UART4CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_UART4CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_UART4CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_UART4CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if ((__HANDLE__)->Instance == UART5) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_UART5_SOURCE()) \
|
|
{ \
|
|
case RCC_UART5CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_UART5CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_UART5CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_UART5CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_UART5CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_UART5CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == USART6) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_USART6_SOURCE()) \
|
|
{ \
|
|
case RCC_USART6CLKSOURCE_D2PCLK2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_USART6CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == UART7) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_UART7_SOURCE()) \
|
|
{ \
|
|
case RCC_UART7CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_UART7CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_UART7CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_UART7CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_UART7CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_UART7CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == UART8) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_UART8_SOURCE()) \
|
|
{ \
|
|
case RCC_UART8CLKSOURCE_D2PCLK1: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
|
|
break; \
|
|
case RCC_UART8CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_UART8CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_UART8CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_UART8CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_UART8CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else if((__HANDLE__)->Instance == LPUART1) \
|
|
{ \
|
|
switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
|
|
{ \
|
|
case RCC_LPUART1CLKSOURCE_D3PCLK1: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_D3PCLK1; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_PLL2: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_PLL3: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_HSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_CSI: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
|
|
break; \
|
|
case RCC_LPUART1CLKSOURCE_LSE: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
break; \
|
|
default: \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
break; \
|
|
} \
|
|
} \
|
|
else \
|
|
{ \
|
|
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
} \
|
|
} while(0U)
|
|
#endif /* UART9 && USART10 */
|
|
|
|
/** @brief Report the UART mask to apply to retrieve the received data
|
|
* according to the word length and to the parity bits activation.
|
|
* @note If PCE = 1, the parity bit is not included in the data extracted
|
|
* by the reception API().
|
|
* This masking operation is not carried out in the case of
|
|
* DMA transfers.
|
|
* @param __HANDLE__ specifies the UART Handle.
|
|
* @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
|
|
*/
|
|
#define UART_MASK_COMPUTATION(__HANDLE__) \
|
|
do { \
|
|
if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
|
|
{ \
|
|
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
|
{ \
|
|
(__HANDLE__)->Mask = 0x01FFU ; \
|
|
} \
|
|
else \
|
|
{ \
|
|
(__HANDLE__)->Mask = 0x00FFU ; \
|
|
} \
|
|
} \
|
|
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
|
|
{ \
|
|
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
|
{ \
|
|
(__HANDLE__)->Mask = 0x00FFU ; \
|
|
} \
|
|
else \
|
|
{ \
|
|
(__HANDLE__)->Mask = 0x007FU ; \
|
|
} \
|
|
} \
|
|
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
|
|
{ \
|
|
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
|
{ \
|
|
(__HANDLE__)->Mask = 0x007FU ; \
|
|
} \
|
|
else \
|
|
{ \
|
|
(__HANDLE__)->Mask = 0x003FU ; \
|
|
} \
|
|
} \
|
|
else \
|
|
{ \
|
|
(__HANDLE__)->Mask = 0x0000U; \
|
|
} \
|
|
} while(0U)
|
|
|
|
/**
|
|
* @brief Ensure that UART frame length is valid.
|
|
* @param __LENGTH__ UART frame length.
|
|
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
|
|
*/
|
|
#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
|
|
((__LENGTH__) == UART_WORDLENGTH_8B) || \
|
|
((__LENGTH__) == UART_WORDLENGTH_9B))
|
|
|
|
/**
|
|
* @brief Ensure that UART wake-up address length is valid.
|
|
* @param __ADDRESS__ UART wake-up address length.
|
|
* @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
|
|
*/
|
|
#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
|
|
((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
|
|
|
|
/**
|
|
* @brief Ensure that UART TXFIFO threshold level is valid.
|
|
* @param __THRESHOLD__ UART TXFIFO threshold level.
|
|
* @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
|
|
*/
|
|
#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \
|
|
((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \
|
|
((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \
|
|
((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \
|
|
((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \
|
|
((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))
|
|
|
|
/**
|
|
* @brief Ensure that UART RXFIFO threshold level is valid.
|
|
* @param __THRESHOLD__ UART RXFIFO threshold level.
|
|
* @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
|
|
*/
|
|
#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \
|
|
((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \
|
|
((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \
|
|
((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \
|
|
((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \
|
|
((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private functions ---------------------------------------------------------*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* STM32H7xx_HAL_UART_EX_H */
|
|
|