488 lines
22 KiB
C
488 lines
22 KiB
C
/**
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******************************************************************************
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* @file stm32h7xx_hal_gpio_ex.h
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* @author MCD Application Team
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* @brief Header file of GPIO HAL Extension module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7xx_HAL_GPIO_EX_H
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#define STM32H7xx_HAL_GPIO_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal_def.h"
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/** @addtogroup STM32H7xx_HAL_Driver
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* @{
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*/
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/** @addtogroup GPIOEx GPIOEx
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup GPIOEx_Exported_Constants GPIO Exported Constants
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* @{
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*/
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/** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
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* @{
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*/
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/**
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* @brief AF 0 selection
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*/
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#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
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#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
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#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
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#define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */
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#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
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#if defined (PWR_CPUCR_PDDS_D2) /* PWR D1 and D2 domains exists */
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#define GPIO_AF0_C1DSLEEP ((uint8_t)0x00) /* Cortex-M7 Deep Sleep Alternate Function mapping : available on STM32H7 Rev.B and above */
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#define GPIO_AF0_C1SLEEP ((uint8_t)0x00) /* Cortex-M7 Sleep Alternate Function mapping : available on STM32H7 Rev.B and above */
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#define GPIO_AF0_D1PWREN ((uint8_t)0x00) /* Domain 1 PWR enable Alternate Function mapping : available on STM32H7 Rev.B and above */
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#define GPIO_AF0_D2PWREN ((uint8_t)0x00) /* Domain 2 PWR enable Alternate Function mapping : available on STM32H7 Rev.B and above */
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#if defined(DUAL_CORE)
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#define GPIO_AF0_C2DSLEEP ((uint8_t)0x00) /* Cortex-M4 Deep Sleep Alternate Function mapping : available on STM32H7 Rev.B and above */
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#define GPIO_AF0_C2SLEEP ((uint8_t)0x00) /* Cortex-M4 Sleep Alternate Function mapping : available on STM32H7 Rev.B and above */
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#endif /* DUAL_CORE */
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#endif /* PWR_CPUCR_PDDS_D2 */
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/**
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* @brief AF 1 selection
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*/
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#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
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#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
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#define GPIO_AF1_TIM16 ((uint8_t)0x01) /* TIM16 Alternate Function mapping */
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#define GPIO_AF1_TIM17 ((uint8_t)0x01) /* TIM17 Alternate Function mapping */
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#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
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#if defined(HRTIM1)
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#define GPIO_AF1_HRTIM1 ((uint8_t)0x01) /* HRTIM1 Alternate Function mapping */
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#endif /* HRTIM1 */
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#if defined(SAI4)
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#define GPIO_AF1_SAI4 ((uint8_t)0x01) /* SAI4 Alternate Function mapping : available on STM32H72xxx/STM32H73xxx */
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#endif /* SAI4 */
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#define GPIO_AF1_FMC ((uint8_t)0x01) /* FMC Alternate Function mapping : available on STM32H72xxx/STM32H73xxx */
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/**
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* @brief AF 2 selection
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*/
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#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
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#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
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#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
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#define GPIO_AF2_TIM12 ((uint8_t)0x02) /* TIM12 Alternate Function mapping */
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#define GPIO_AF2_SAI1 ((uint8_t)0x02) /* SAI1 Alternate Function mapping */
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#if defined(HRTIM1)
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#define GPIO_AF2_HRTIM1 ((uint8_t)0x02) /* HRTIM1 Alternate Function mapping */
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#endif /* HRTIM1 */
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#define GPIO_AF2_TIM15 ((uint8_t)0x02) /* TIM15 Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */
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#if defined(FDCAN3)
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#define GPIO_AF2_FDCAN3 ((uint8_t)0x02) /* FDCAN3 Alternate Function mapping */
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#endif /*FDCAN3*/
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/**
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* @brief AF 3 selection
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*/
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#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
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#define GPIO_AF3_LPTIM2 ((uint8_t)0x03) /* LPTIM2 Alternate Function mapping */
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#define GPIO_AF3_DFSDM1 ((uint8_t)0x03) /* DFSDM Alternate Function mapping */
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#define GPIO_AF3_LPTIM3 ((uint8_t)0x03) /* LPTIM3 Alternate Function mapping */
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#define GPIO_AF3_LPTIM4 ((uint8_t)0x03) /* LPTIM4 Alternate Function mapping */
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#define GPIO_AF3_LPTIM5 ((uint8_t)0x03) /* LPTIM5 Alternate Function mapping */
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#define GPIO_AF3_LPUART ((uint8_t)0x03) /* LPUART Alternate Function mapping */
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#if defined(OCTOSPIM)
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#define GPIO_AF3_OCTOSPIM_P1 ((uint8_t)0x03) /* OCTOSPI Manager Port 1 Alternate Function mapping */
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#define GPIO_AF3_OCTOSPIM_P2 ((uint8_t)0x03) /* OCTOSPI Manager Port 2 Alternate Function mapping */
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#endif /* OCTOSPIM */
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#if defined(HRTIM1)
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#define GPIO_AF3_HRTIM1 ((uint8_t)0x03) /* HRTIM1 Alternate Function mapping */
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#endif /* HRTIM1 */
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#define GPIO_AF3_LTDC ((uint8_t)0x03) /* LTDC Alternate Function mapping : available on STM32H72xxx/STM32H73xxx */
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/**
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* @brief AF 4 selection
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*/
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#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
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#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
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#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
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#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */
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#if defined(I2C5)
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#define GPIO_AF4_I2C5 ((uint8_t)0x04) /* I2C5 Alternate Function mapping */
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#endif /* I2C5*/
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#define GPIO_AF4_TIM15 ((uint8_t)0x04) /* TIM15 Alternate Function mapping */
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#define GPIO_AF4_CEC ((uint8_t)0x04) /* CEC Alternate Function mapping */
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#define GPIO_AF4_LPTIM2 ((uint8_t)0x04) /* LPTIM2 Alternate Function mapping */
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#define GPIO_AF4_USART1 ((uint8_t)0x04) /* USART1 Alternate Function mapping */
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#if defined(USART10)
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#define GPIO_AF4_USART10 ((uint8_t)0x04) /* USART10 Alternate Function mapping : available on STM32H72xxx/STM32H73xxx */
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#endif /*USART10*/
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#define GPIO_AF4_DFSDM1 ((uint8_t)0x04) /* DFSDM Alternate Function mapping */
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#if defined(DFSDM2_BASE)
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#define GPIO_AF4_DFSDM2 ((uint8_t)0x04) /* DFSDM2 Alternate Function mapping */
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#endif /* DFSDM2_BASE */
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#define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */
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#if defined(PSSI)
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#define GPIO_AF4_PSSI ((uint8_t)0x04) /* PSSI Alternate Function mapping */
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#endif /* PSSI */
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#if defined(OCTOSPIM)
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#define GPIO_AF4_OCTOSPIM_P1 ((uint8_t)0x04) /* OCTOSPI Manager Port 1 Alternate Function mapping : available on STM32H72xxx/STM32H73xxx */
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#endif /* OCTOSPIM */
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/**
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* @brief AF 5 selection
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*/
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#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
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#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */
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#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3 Alternate Function mapping */
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#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
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#define GPIO_AF5_SPI5 ((uint8_t)0x05) /* SPI5 Alternate Function mapping */
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#define GPIO_AF5_SPI6 ((uint8_t)0x05) /* SPI6 Alternate Function mapping */
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#define GPIO_AF5_CEC ((uint8_t)0x05) /* CEC Alternate Function mapping */
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#if defined(FDCAN3)
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#define GPIO_AF5_FDCAN3 ((uint8_t)0x05) /* FDCAN3 Alternate Function mapping */
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#endif /*FDCAN3*/
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/**
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* @brief AF 6 selection
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*/
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#define GPIO_AF6_SPI2 ((uint8_t)0x06) /* SPI2 Alternate Function mapping */
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#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */
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#define GPIO_AF6_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */
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#define GPIO_AF6_I2C4 ((uint8_t)0x06) /* I2C4 Alternate Function mapping */
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#if defined(I2C5)
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#define GPIO_AF6_I2C5 ((uint8_t)0x06) /* I2C5 Alternate Function mapping */
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#endif /* I2C5*/
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#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM Alternate Function mapping */
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#define GPIO_AF6_UART4 ((uint8_t)0x06) /* UART4 Alternate Function mapping */
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#if defined(DFSDM2_BASE)
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#define GPIO_AF6_DFSDM2 ((uint8_t)0x06) /* DFSDM2 Alternate Function mapping */
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#endif /* DFSDM2_BASE */
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#if defined(SAI3)
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#define GPIO_AF6_SAI3 ((uint8_t)0x06) /* SAI3 Alternate Function mapping */
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#endif /* SAI3 */
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#if defined(OCTOSPIM)
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#define GPIO_AF6_OCTOSPIM_P1 ((uint8_t)0x06) /* OCTOSPI Manager Port 1 Alternate Function mapping */
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#endif /* OCTOSPIM */
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/**
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* @brief AF 7 selection
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*/
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#define GPIO_AF7_SPI2 ((uint8_t)0x07) /* SPI2 Alternate Function mapping */
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#define GPIO_AF7_SPI3 ((uint8_t)0x07) /* SPI3 Alternate Function mapping */
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#define GPIO_AF7_SPI6 ((uint8_t)0x07) /* SPI6 Alternate Function mapping */
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#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
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#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
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#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
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#define GPIO_AF7_USART6 ((uint8_t)0x07) /* USART6 Alternate Function mapping */
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#define GPIO_AF7_UART7 ((uint8_t)0x07) /* UART7 Alternate Function mapping */
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#define GPIO_AF7_SDMMC1 ((uint8_t)0x07) /* SDMMC1 Alternate Function mapping */
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/**
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* @brief AF 8 selection
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*/
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#define GPIO_AF8_SPI6 ((uint8_t)0x08) /* SPI6 Alternate Function mapping */
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#if defined(SAI2)
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#define GPIO_AF8_SAI2 ((uint8_t)0x08) /* SAI2 Alternate Function mapping */
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#endif /*SAI2*/
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#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
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#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
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#define GPIO_AF8_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
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#define GPIO_AF8_SPDIF ((uint8_t)0x08) /* SPDIF Alternate Function mapping */
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#define GPIO_AF8_LPUART ((uint8_t)0x08) /* LPUART Alternate Function mapping */
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#define GPIO_AF8_SDMMC1 ((uint8_t)0x08) /* SDMMC1 Alternate Function mapping */
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#if defined(SAI4)
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#define GPIO_AF8_SAI4 ((uint8_t)0x08) /* SAI4 Alternate Function mapping */
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#endif /* SAI4 */
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/**
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* @brief AF 9 selection
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*/
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#define GPIO_AF9_FDCAN1 ((uint8_t)0x09) /* FDCAN1 Alternate Function mapping */
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#define GPIO_AF9_FDCAN2 ((uint8_t)0x09) /* FDCAN2 Alternate Function mapping */
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#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
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#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
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#define GPIO_AF9_SDMMC2 ((uint8_t)0x09) /* SDMMC2 Alternate Function mapping */
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#define GPIO_AF9_LTDC ((uint8_t)0x09) /* LTDC Alternate Function mapping */
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#define GPIO_AF9_SPDIF ((uint8_t)0x09) /* SPDIF Alternate Function mapping */
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#define GPIO_AF9_FMC ((uint8_t)0x09) /* FMC Alternate Function mapping */
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#if defined(QUADSPI)
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#define GPIO_AF9_QUADSPI ((uint8_t)0x09) /* QUADSPI Alternate Function mapping */
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#endif /* QUADSPI */
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#if defined(SAI4)
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#define GPIO_AF9_SAI4 ((uint8_t)0x09) /* SAI4 Alternate Function mapping */
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#endif /* SAI4 */
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#if defined(OCTOSPIM)
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#define GPIO_AF9_OCTOSPIM_P1 ((uint8_t)0x09) /* OCTOSPI Manager Port 1 Alternate Function mapping */
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#define GPIO_AF9_OCTOSPIM_P2 ((uint8_t)0x09) /* OCTOSPI Manager Port 2 Alternate Function mapping */
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#endif /* OCTOSPIM */
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/**
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* @brief AF 10 selection
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*/
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#if defined(SAI2)
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#define GPIO_AF10_SAI2 ((uint8_t)0x0A) /* SAI2 Alternate Function mapping */
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#endif /*SAI2*/
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#define GPIO_AF10_SDMMC2 ((uint8_t)0x0A) /* SDMMC2 Alternate Function mapping */
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#if defined(USB2_OTG_FS)
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#define GPIO_AF10_OTG2_FS ((uint8_t)0x0A) /* OTG2_FS Alternate Function mapping */
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#endif /*USB2_OTG_FS*/
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#define GPIO_AF10_COMP1 ((uint8_t)0x0A) /* COMP1 Alternate Function mapping */
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#define GPIO_AF10_COMP2 ((uint8_t)0x0A) /* COMP2 Alternate Function mapping */
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#if defined(LTDC)
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#define GPIO_AF10_LTDC ((uint8_t)0x0A) /* LTDC Alternate Function mapping */
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#endif /*LTDC*/
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#define GPIO_AF10_CRS_SYNC ((uint8_t)0x0A) /* CRS Sync Alternate Function mapping : available on STM32H7 Rev.B and above */
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#if defined(QUADSPI)
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#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */
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#endif /* QUADSPI */
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#if defined(SAI4)
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#define GPIO_AF10_SAI4 ((uint8_t)0x0A) /* SAI4 Alternate Function mapping */
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#endif /* SAI4 */
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#if !defined(USB2_OTG_FS)
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#define GPIO_AF10_OTG1_FS ((uint8_t)0x0A) /* OTG1_FS Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */
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#endif /* !USB2_OTG_FS */
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#define GPIO_AF10_OTG1_HS ((uint8_t)0x0A) /* OTG1_HS Alternate Function mapping */
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#if defined(OCTOSPIM)
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#define GPIO_AF10_OCTOSPIM_P1 ((uint8_t)0x0A) /* OCTOSPI Manager Port 1 Alternate Function mapping */
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#endif /* OCTOSPIM */
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#define GPIO_AF10_TIM8 ((uint8_t)0x0A) /* TIM8 Alternate Function mapping */
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#define GPIO_AF10_FMC ((uint8_t)0x0A) /* FMC Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */
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/**
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* @brief AF 11 selection
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*/
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#define GPIO_AF11_SWP ((uint8_t)0x0B) /* SWP Alternate Function mapping */
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#define GPIO_AF11_MDIOS ((uint8_t)0x0B) /* MDIOS Alternate Function mapping */
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#define GPIO_AF11_UART7 ((uint8_t)0x0B) /* UART7 Alternate Function mapping */
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#define GPIO_AF11_SDMMC2 ((uint8_t)0x0B) /* SDMMC2 Alternate Function mapping */
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#define GPIO_AF11_DFSDM1 ((uint8_t)0x0B) /* DFSDM1 Alternate Function mapping */
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#define GPIO_AF11_COMP1 ((uint8_t)0x0B) /* COMP1 Alternate Function mapping */
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#define GPIO_AF11_COMP2 ((uint8_t)0x0B) /* COMP2 Alternate Function mapping */
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#define GPIO_AF11_TIM1 ((uint8_t)0x0B) /* TIM1 Alternate Function mapping */
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#define GPIO_AF11_TIM8 ((uint8_t)0x0B) /* TIM8 Alternate Function mapping */
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#define GPIO_AF11_I2C4 ((uint8_t)0x0B) /* I2C4 Alternate Function mapping */
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#if defined(DFSDM2_BASE)
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#define GPIO_AF11_DFSDM2 ((uint8_t)0x0B) /* DFSDM2 Alternate Function mapping */
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#endif /* DFSDM2_BASE */
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#if defined(USART10)
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#define GPIO_AF11_USART10 ((uint8_t)0x0B) /* USART10 Alternate Function mapping */
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#endif /* USART10 */
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#if defined(UART9)
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#define GPIO_AF11_UART9 ((uint8_t)0x0B) /* UART9 Alternate Function mapping */
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#endif /* UART9 */
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#if defined(ETH)
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#define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETH Alternate Function mapping */
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#endif /* ETH */
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#if defined(LTDC)
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#define GPIO_AF11_LTDC ((uint8_t)0x0B) /* LTDC Alternate Function mapping : available on STM32H7A3xxx/STM32H7B3xxx/STM32H7B0xxx and STM32H72xxx/STM32H73xxx */
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#endif /*LTDC*/
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#if defined(OCTOSPIM)
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#define GPIO_AF11_OCTOSPIM_P1 ((uint8_t)0x0B) /* OCTOSPI Manager Port 1 Alternate Function mapping */
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#endif /* OCTOSPIM */
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/**
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* @brief AF 12 selection
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*/
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#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
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#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */
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#define GPIO_AF12_MDIOS ((uint8_t)0x0C) /* MDIOS Alternate Function mapping */
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#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */
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#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */
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#define GPIO_AF12_TIM1 ((uint8_t)0x0C) /* TIM1 Alternate Function mapping */
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#define GPIO_AF12_TIM8 ((uint8_t)0x0C) /* TIM8 Alternate Function mapping */
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#if defined(LTDC)
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#define GPIO_AF12_LTDC ((uint8_t)0x0C) /* LTDC Alternate Function mapping */
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#endif /*LTDC*/
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#if defined(USB2_OTG_FS)
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#define GPIO_AF12_OTG1_FS ((uint8_t)0x0C) /* OTG1_FS Alternate Function mapping */
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#endif /* USB2_OTG_FS */
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#if defined(OCTOSPIM)
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#define GPIO_AF12_OCTOSPIM_P1 ((uint8_t)0x0C) /* OCTOSPI Manager Port 1 Alternate Function mapping */
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#endif /* OCTOSPIM */
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/**
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* @brief AF 13 selection
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*/
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#define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
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#define GPIO_AF13_COMP1 ((uint8_t)0x0D) /* COMP1 Alternate Function mapping */
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#define GPIO_AF13_COMP2 ((uint8_t)0x0D) /* COMP2 Alternate Function mapping */
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#if defined(LTDC)
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#define GPIO_AF13_LTDC ((uint8_t)0x0D) /* LTDC Alternate Function mapping */
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#endif /*LTDC*/
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#if defined(DSI)
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#define GPIO_AF13_DSI ((uint8_t)0x0D) /* DSI Alternate Function mapping */
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#endif /* DSI */
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#if defined(PSSI)
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#define GPIO_AF13_PSSI ((uint8_t)0x0D) /* PSSI Alternate Function mapping */
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#endif /* PSSI */
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#define GPIO_AF13_TIM1 ((uint8_t)0x0D) /* TIM1 Alternate Function mapping */
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#if defined(TIM23)
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#define GPIO_AF13_TIM23 ((uint8_t)0x0D) /* TIM23 Alternate Function mapping */
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#endif /*TIM23*/
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/**
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* @brief AF 14 selection
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*/
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#define GPIO_AF14_LTDC ((uint8_t)0x0E) /* LTDC Alternate Function mapping */
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#define GPIO_AF14_UART5 ((uint8_t)0x0E) /* UART5 Alternate Function mapping */
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#if defined(TIM24)
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#define GPIO_AF14_TIM24 ((uint8_t)0x0E) /* TIM24 Alternate Function mapping */
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#endif /*TIM24*/
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/**
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* @brief AF 15 selection
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*/
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#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
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#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup GPIOEx_Exported_Macros GPIO Exported Macros
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* @{
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*/
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup GPIOEx_Exported_Functions GPIO Exported Functions
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* @{
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*/
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/**
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* @}
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup GPIOEx_Private_Constants GPIO Private Constants
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* @{
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*/
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/**
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* @brief GPIO pin available on the platform
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*/
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/* Defines the available pins per GPIOs */
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#define GPIOA_PIN_AVAILABLE GPIO_PIN_All
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#define GPIOB_PIN_AVAILABLE GPIO_PIN_All
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#define GPIOC_PIN_AVAILABLE GPIO_PIN_All
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#define GPIOD_PIN_AVAILABLE GPIO_PIN_All
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#define GPIOE_PIN_AVAILABLE GPIO_PIN_All
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#define GPIOF_PIN_AVAILABLE GPIO_PIN_All
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#define GPIOG_PIN_AVAILABLE GPIO_PIN_All
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#if defined(GPIOI)
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#define GPIOI_PIN_AVAILABLE GPIO_PIN_All
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#endif /*GPIOI*/
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#if defined(GPIOI)
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#define GPIOJ_PIN_AVAILABLE GPIO_PIN_All
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#else
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#define GPIOJ_PIN_AVAILABLE (GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 )
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#endif /* GPIOI */
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#define GPIOH_PIN_AVAILABLE GPIO_PIN_All
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#if defined(GPIOI)
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#define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
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GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7)
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#else
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#define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 )
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#endif /* GPIOI */
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/**
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* @}
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|
*/
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|
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/* Private macros ------------------------------------------------------------*/
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|
/** @defgroup GPIOEx_Private_Macros GPIO Private Macros
|
|
* @{
|
|
*/
|
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/** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
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|
* @{
|
|
*/
|
|
#if defined(GPIOI)
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|
#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0UL :\
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((__GPIOx__) == (GPIOB))? 1UL :\
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((__GPIOx__) == (GPIOC))? 2UL :\
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((__GPIOx__) == (GPIOD))? 3UL :\
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((__GPIOx__) == (GPIOE))? 4UL :\
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((__GPIOx__) == (GPIOF))? 5UL :\
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((__GPIOx__) == (GPIOG))? 6UL :\
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((__GPIOx__) == (GPIOH))? 7UL :\
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((__GPIOx__) == (GPIOI))? 8UL :\
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((__GPIOx__) == (GPIOJ))? 9UL : 10UL)
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#else
|
|
#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0UL :\
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|
((__GPIOx__) == (GPIOB))? 1UL :\
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((__GPIOx__) == (GPIOC))? 2UL :\
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|
((__GPIOx__) == (GPIOD))? 3UL :\
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|
((__GPIOx__) == (GPIOE))? 4UL :\
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|
((__GPIOx__) == (GPIOF))? 5UL :\
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|
((__GPIOx__) == (GPIOG))? 6UL :\
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|
((__GPIOx__) == (GPIOH))? 7UL :\
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|
((__GPIOx__) == (GPIOJ))? 9UL : 10UL)
|
|
#endif /* GPIOI */
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|
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|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup GPIOEx_IS_Alternat_function_selection GPIO Check Alternate Function
|
|
* @{
|
|
*/
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private functions ---------------------------------------------------------*/
|
|
/** @defgroup GPIOEx_Private_Functions GPIO Private Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* STM32H7xx_HAL_GPIO_EX_H */
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