10 Commits

Author SHA1 Message Date
ba94373f3e Update param freq 2024-08-01 20:56:09 +02:00
25da5cde32 Fix dumb config typo 2024-07-24 09:35:22 +02:00
10aa474124 Fix DRS 2024-07-23 15:13:22 +02:00
5fb5d271b1 Fix display issues and inc logic 2024-07-22 19:35:23 +02:00
a4bea0d78b add commit hash (manual!) 2024-07-22 19:32:24 +02:00
a07d51f223 Add most recent params for FT24 2024-07-22 08:43:42 +02:00
555a114ae5 Fix buttons 2024-07-21 20:57:24 +02:00
6db74c2242 Fix TouchGFX again again (upgrade to 24) 2024-07-21 19:25:19 +02:00
a32d497074 Fix TouchGFX again 2024-07-21 16:30:53 +02:00
0f5cfe56a9 Add VDE 2024-07-21 15:51:22 +02:00
24 changed files with 1325 additions and 416 deletions

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@ -21,19 +21,19 @@
/* Includes ------------------------------------------------------------------*/
#include "app_azure_rtos.h"
#include "stm32h7xx.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "app.h"
#include "app_touchgfx.h"
#include "leds.h"
#include "main.h"
#include "ui.h"
#include "vehicle.h"
#include "app_touchgfx.h"
#include "tx_api.h"
#include "tx_port.h"
#include "ui.h"
#include "vehicle.h"
/* USER CODE END Includes */
@ -56,10 +56,11 @@
#if (USE_STATIC_ALLOCATION == 1)
/* USER CODE BEGIN TX_Pool_Buffer */
/* USER CODE END TX_Pool_Buffer */
#if defined ( __ICCARM__ )
#pragma data_alignment=4
#if defined(__ICCARM__)
#pragma data_alignment = 4
#endif
__ALIGN_BEGIN static UCHAR tx_byte_pool_buffer[TX_APP_MEM_POOL_SIZE] __ALIGN_END;
__ALIGN_BEGIN static UCHAR
tx_byte_pool_buffer[TX_APP_MEM_POOL_SIZE] __ALIGN_END;
static TX_BYTE_POOL tx_app_byte_pool;
#endif
@ -69,6 +70,7 @@ TX_THREAD app_thread;
TX_THREAD ui_thread;
TX_THREAD vehicle_thread;
TX_THREAD led_thread;
TX_THREAD params_thread;
TX_QUEUE gui_button_queue;
TX_EVENT_FLAGS_GROUP gui_update_events;
/* USER CODE END PV */
@ -79,12 +81,11 @@ TX_EVENT_FLAGS_GROUP gui_update_events;
/* USER CODE END PFP */
/**
* @brief Define the initial system.
* @param first_unused_memory : Pointer to the first unused memory
* @retval None
*/
VOID tx_application_define(VOID *first_unused_memory)
{
* @brief Define the initial system.
* @param first_unused_memory : Pointer to the first unused memory
* @retval None
*/
VOID tx_application_define(VOID *first_unused_memory) {
/* USER CODE BEGIN tx_application_define_1*/
/* USER CODE END tx_application_define_1 */
@ -92,22 +93,20 @@ VOID tx_application_define(VOID *first_unused_memory)
UINT status = TX_SUCCESS;
VOID *memory_ptr;
if (tx_byte_pool_create(&tx_app_byte_pool, "Tx App memory pool", tx_byte_pool_buffer, TX_APP_MEM_POOL_SIZE) != TX_SUCCESS)
{
if (tx_byte_pool_create(&tx_app_byte_pool, "Tx App memory pool",
tx_byte_pool_buffer,
TX_APP_MEM_POOL_SIZE) != TX_SUCCESS) {
/* USER CODE BEGIN TX_Byte_Pool_Error */
/* USER CODE END TX_Byte_Pool_Error */
}
else
{
} else {
/* USER CODE BEGIN TX_Byte_Pool_Success */
/* USER CODE END TX_Byte_Pool_Success */
memory_ptr = (VOID *)&tx_app_byte_pool;
status = App_ThreadX_Init(memory_ptr);
if (status != TX_SUCCESS)
{
if (status != TX_SUCCESS) {
/* USER CODE BEGIN App_ThreadX_Init_Error */
while (1) {
}
@ -117,21 +116,22 @@ VOID tx_application_define(VOID *first_unused_memory)
/* USER CODE BEGIN App_ThreadX_Init_Success */
/* USER CODE END App_ThreadX_Init_Success */
}
#else
/*
* Using dynamic memory allocation requires to apply some changes to the linker file.
* ThreadX needs to pass a pointer to the first free memory location in RAM to the tx_application_define() function,
* Using dynamic memory allocation requires to apply some changes to the
linker file.
* ThreadX needs to pass a pointer to the first free memory location in RAM to
the tx_application_define() function,
* using the "first_unused_memory" argument.
* This require changes in the linker files to expose this memory location.
* For EWARM add the following section into the .icf file:
place in RAM_region { last section FREE_MEM };
* For MDK-ARM
- either define the RW_IRAM1 region in the ".sct" file
- or modify the line below in "tx_initialize_low_level.S to match the memory region being used
LDR r1, =|Image$$RW_IRAM1$$ZI$$Limit|
- or modify the line below in "tx_initialize_low_level.S to match the
memory region being used LDR r1, =|Image$$RW_IRAM1$$ZI$$Limit|
* For STM32CubeIDE add the following section into the .ld file:
._threadx_heap :
@ -141,13 +141,17 @@ VOID tx_application_define(VOID *first_unused_memory)
. = . + 64K;
. = ALIGN(8);
} >RAM_D1 AT> RAM_D1
* The simplest way to provide memory for ThreadX is to define a new section, see ._threadx_heap above.
* The simplest way to provide memory for ThreadX is to define a new
section, see ._threadx_heap above.
* In the example above the ThreadX heap size is set to 64KBytes.
* The ._threadx_heap must be located between the .bss and the ._user_heap_stack sections in the linker script.
* Caution: Make sure that ThreadX does not need more than the provided heap memory (64KBytes in this example).
* The ._threadx_heap must be located between the .bss and the
._user_heap_stack sections in the linker script.
* Caution: Make sure that ThreadX does not need more than the provided
heap memory (64KBytes in this example).
* Read more in STM32CubeIDE User Guide, chapter: "Linker script".
* The "tx_initialize_low_level.S" should be also modified to enable the "USE_DYNAMIC_MEMORY_ALLOCATION" flag.
* The "tx_initialize_low_level.S" should be also modified to enable the
"USE_DYNAMIC_MEMORY_ALLOCATION" flag.
*/
/* USER CODE BEGIN DYNAMIC_MEM_ALLOC */
@ -208,6 +212,15 @@ VOID tx_application_define(VOID *first_unused_memory)
Error_Handler();
}
void *params_thread_stack = mem;
mem += THREAD_STACK_SIZE;
if (tx_thread_create(&params_thread, "Params Thread", params_thread_entry, 0,
params_thread_stack, THREAD_STACK_SIZE,
THREAD_PRIO_PARAMS, THREAD_PRIO_UI, TX_NO_TIME_SLICE,
TX_AUTO_START) != TX_SUCCESS) {
Error_Handler();
}
if (MX_TouchGFX_Init(mem) != TX_SUCCESS) {
Error_Handler();
}
@ -215,5 +228,4 @@ VOID tx_application_define(VOID *first_unused_memory)
mem += 4096;
/* USER CODE END DYNAMIC_MEM_ALLOC */
#endif
}

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@ -27,7 +27,6 @@ extern "C" {
/* Includes ------------------------------------------------------------------*/
#include "app_azure_rtos_config.h"
#include "app_threadx.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
@ -44,6 +43,7 @@ extern "C" {
#define THREAD_STACK_SIZE 4096
#define THREAD_PRIO_APP 10
#define THREAD_PRIO_PARAMS 8
#define THREAD_PRIO_UI 6
#define THREAD_PRIO_VEHICLE 7
#define THREAD_PRIO_LED 11

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@ -24,7 +24,7 @@
/* Defines ------------------------------------------------------------------*/
/* STMicroelectronics.X-CUBE-AZRTOS-H7.3.0.0 */
#define THREADX_ENABLED
/* STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2 */
/* STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0 */
#define TOUCHGFX_APP
#endif /* __RTE_COMPONENTS_H__ */

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@ -7,20 +7,20 @@ extern "C" {
#include <stddef.h>
#include <stdint.h>
#include <tx_port.h>
#include "util.h"
CountedEnum(ParamType, size_t, PF_BBAL, PF_SLIPREF, PF_MUMAX, PF_ASRP, PF_ASRON,
PF_ASRI, PF_PLIM);
CountedEnum(ParamType, size_t, PF_PLIM, PF_TLIM, PF_SLIM, PF_TVEC, PF_PG,
PF_REKU);
typedef struct {
float bbal;
float slipref;
float mumax;
unsigned asrp;
unsigned asri;
unsigned asron;
unsigned plim;
unsigned plim; //< Power limit
unsigned tlim; //< Torque limit
unsigned slim; //< Speed limit
unsigned tvec; //< Torque vectoring
unsigned pg; //< Power ground
unsigned reku; //< Rekuperation
} Params;
extern Params params;
@ -30,8 +30,13 @@ void params_inc(ParamType param);
void params_dec(ParamType param);
void params_broadcast(ParamType param);
/** FT24 only
* Broadcasts the current registered params to the CAN bus every second
*/
void params_thread_entry(ULONG _);
#ifdef __cplusplus
}
#endif
#endif // INC_PARAMS_H
#endif // INC_PARAMS_H

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@ -7,7 +7,7 @@
extern "C" {
#endif
#define NUM_BUTTONS 6
#define NUM_BUTTONS 7
#define NUM_ENCS 2
#define BUTTON_MIN_INTERVAL 50 // ms
#define ENC_MAX_PHASE 50 // ms

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@ -1,106 +1,121 @@
#include "params.h"
#include <tx_api.h>
#include "can-halal.h"
#include "leds.h"
#include "vehicle.h"
/**
* Decrements the given value if it is above the minimum allowed value
*/
// TODO these functions take into account that the parameters are unsigned, it's
// definitely better to have them signed but would need to be tested with the
// autobox
#define DEC_IF_ABOVE(param_val, min_val, decr_amt) \
((param_val) = (((int)(param_val) - (int)(decr_amt)) > (int)(min_val)) \
? ((param_val) - (decr_amt)) \
: (min_val))
#define INC_IF_BELOW(param_val, max_val, incr_amt) \
((param_val) = (((param_val) + (incr_amt)) < (max_val)) \
? ((param_val) + (incr_amt)) \
: (max_val))
Params params = {0};
void params_init() {
params.bbal = 50;
// Default values
params.plim = 20;
params.tlim = 1400;
params.slim = 70;
params.tvec = 50;
params.pg = 0;
params.reku = 0;
}
void params_inc(ParamType param) {
switch (param) {
case PF_BBAL:
params.bbal += 0.5f;
if (params.bbal > 100.0f) {
params.bbal = 100.0f;
}
break;
case PF_SLIPREF:
params.slipref += 0.01f;
break;
case PF_MUMAX:
params.mumax += 0.1f;
break;
case PF_ASRP:
params.asrp++;
break;
case PF_ASRI:
params.asri++;
break;
case PF_ASRON:
params.asron = 1;
break;
case PF_PLIM:
params.plim = (params.plim < 80) ? params.plim + 1 : 80;
break;
case PF_PLIM:
INC_IF_BELOW(params.plim, 80, 1);
break;
case PF_TLIM:
INC_IF_BELOW(params.tlim, 1500, 100);
break;
case PF_SLIM:
INC_IF_BELOW(params.slim, 100, 1);
break;
case PF_TVEC:
INC_IF_BELOW(params.tvec, 100, 1);
break;
case PF_PG:
INC_IF_BELOW(params.pg, 100, 1);
break;
case PF_REKU:
INC_IF_BELOW(params.reku, 100, 1);
break;
}
}
void params_dec(ParamType param) {
switch (param) {
case PF_BBAL:
params.bbal -= 0.5f;
if (params.bbal < 0.0f) {
params.bbal = 0.0f;
}
break;
case PF_SLIPREF:
if (params.slipref > 0) {
params.slipref -= 0.01f;
}
break;
case PF_MUMAX:
if (params.mumax > 0) {
params.mumax -= 0.1f;
}
break;
case PF_ASRP:
if (params.asrp > 0) {
params.asrp--;
}
break;
case PF_ASRI:
if (params.asri > 0) {
params.asri--;
}
break;
case PF_ASRON:
params.asron = 0;
break;
case PF_PLIM:
params.plim = (params.plim > 2) ? params.plim - 1 : 2;
break;
case PF_PLIM:
DEC_IF_ABOVE(params.plim, 0, 1);
break;
case PF_TLIM:
DEC_IF_ABOVE(params.tlim, 0, 100);
break;
case PF_SLIM:
DEC_IF_ABOVE(params.slim, 0, 1);
break;
case PF_TVEC:
DEC_IF_ABOVE(params.tvec, 0, 1);
break;
case PF_PG:
DEC_IF_ABOVE(params.pg, 0, 1);
break;
case PF_REKU:
DEC_IF_ABOVE(params.reku, 0, 1);
break;
}
}
void params_broadcast(ParamType param) {
int32_t value;
switch (param) {
case PF_BBAL:
value = params.bbal * 10;
break;
case PF_SLIPREF:
value = params.slipref * 100;
break;
case PF_MUMAX:
value = params.mumax * 10;
break;
case PF_ASRP:
value = params.asrp;
break;
case PF_ASRI:
value = params.asri;
break;
case PF_ASRON:
value = params.asron;
break;
case PF_PLIM:
value = params.plim;
break;
default:
return;
case PF_PLIM:
value = params.plim;
break;
case PF_TLIM:
value = params.tlim;
break;
case PF_SLIM:
value = params.slim;
break;
case PF_TVEC:
value = params.tvec;
break;
case PF_PG:
value = params.pg;
break;
case PF_REKU:
value = params.reku;
break;
default:
return;
}
vehicle_broadcast_param(param, value);
}
void params_thread_entry(ULONG _) {
tx_thread_sleep(TX_TIMER_TICKS_PER_SECOND);
while (1) {
for (size_t i = 0; i < ParamType_COUNT; i++) {
led_set(1, 0, 255, 0);
params_broadcast(i);
}
// Wait one second
tx_thread_sleep(TX_TIMER_TICKS_PER_SECOND);
}
}

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@ -20,7 +20,6 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */

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@ -10,12 +10,18 @@
#include "tx_api.h"
#include "vehicle.h"
#include "leds.h"
#define DRS_BUTTON_IDX (6)
#define DRS_PRESS_WAIT_CYCLES (1000)
static int drs_press_buf_cycles = 0;
void ui_thread_entry(ULONG _) {
GPIO_TypeDef *button_ports[NUM_BUTTONS] = {BTN1_GPIO_Port, BTN2_GPIO_Port,
BTN3_GPIO_Port, BTN4_GPIO_Port,
BTN5_GPIO_Port, BTN6_GPIO_Port};
BTN5_GPIO_Port, BTN6_GPIO_Port, SW_DRS_GPIO_Port};
uint16_t button_pins[NUM_BUTTONS] = {BTN1_Pin, BTN2_Pin, BTN3_Pin,
BTN4_Pin, BTN5_Pin, BTN6_Pin};
BTN4_Pin, BTN5_Pin, BTN6_Pin, SW_DRS_Pin};
GPIO_PinState button_states[NUM_BUTTONS] = {GPIO_PIN_RESET};
uint32_t button_press_times[NUM_BUTTONS] = {HAL_GetTick()};
@ -44,6 +50,17 @@ void ui_thread_entry(ULONG _) {
tx_event_flags_set(&gui_update_events, GUI_UPDATE_NEXT_SCREEN, TX_OR);
}
if (button_states[DRS_BUTTON_IDX] == GPIO_PIN_SET) {
// Set leftmost led to blue to indicate DRS activation
drs_press_buf_cycles = DRS_PRESS_WAIT_CYCLES;
led_set(0, 0, 0, 255);
} if (drs_press_buf_cycles < 0) {
// Assume no longer active, turn off
led_set(0, 0, 0, 0);
} else if (drs_press_buf_cycles >= 0) {
drs_press_buf_cycles--;
}
vehicle_broadcast_buttons(button_states);
// Release so other threads can get scheduled

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@ -1,16 +1,14 @@
#include "vehicle.h"
#include "main.h"
#include "ui.h"
#include "vehicle_state.h"
#include "can-halal.h"
#include "main.h"
#include "stm32h7xx.h"
#include "stm32h7xx_hal.h"
#include "stm32h7xx_hal_fdcan.h"
#include "stm32h7xx_hal_gpio.h"
#include "tx_api.h"
#include "ui.h"
#include "vehicle_state.h"
#define CAN_ID_AMS_SLAVE_PANIC 0x9
#define CAN_ID_AMS_STATUS 0xA
@ -98,7 +96,8 @@ void vehicle_broadcast_param(ParamType param, int32_t value) {
void vehicle_broadcast_buttons(GPIO_PinState *button_states) {
uint8_t data = (button_states[0] << 2) | (button_states[1] << 0) |
(button_states[2] << 1) | (button_states[3] << 3);
(button_states[2] << 1) | (button_states[3] << 3) |
(button_states[6] << 4);
ftcan_transmit(CAN_ID_STW_BUTTONS, &data, 1);
}
@ -112,142 +111,144 @@ void ftcan_msg_received_cb(uint16_t id, size_t datalen, const uint8_t *data) {
}
} else {
switch (id) {
case CAN_ID_AMS_SLAVE_PANIC:
vehicle_state.last_ams_slave_panic.id = data[0];
vehicle_state.last_ams_slave_panic.kind = data[1];
ptr = &data[2];
vehicle_state.last_ams_slave_panic.arg =
ftcan_unmarshal_unsigned(&ptr, 4);
break;
case CAN_ID_AMS_STATUS:
vehicle_state.ts_state = data[0] & 0x7F;
vehicle_state.sdc_closed = (data[0] & 0x80) >> 7;
vehicle_state.soc_ts = data[1];
ptr = &data[2];
vehicle_state.min_cell_volt =
ftcan_unmarshal_unsigned(&ptr, 2) * CAN_AMS_STATUS_VOLTAGE_FACTOR;
vehicle_state.max_cell_temp =
ftcan_unmarshal_signed(&ptr, 2) * CAN_AMS_STATUS_TEMP_FACTOR;
vehicle_state.imd_ok = (data[6] >> 7);
// TODO: Separate temperatures for left and right side of battery
vehicle_state.temps.bat_l = vehicle_state.max_cell_temp;
vehicle_state.temps.bat_r = vehicle_state.max_cell_temp;
break;
case CAN_ID_SDCL_TX:
vehicle_state.sdcl_state[0] = data[0] & CAN_SDCL_STATE_1_MASK;
vehicle_state.sdcl_state[1] = data[0] & CAN_SDCL_STATE_2_MASK;
vehicle_state.sdcl_state[2] = data[0] & CAN_SDCL_STATE_3_MASK;
break;
case CAN_ID_PDU_RESPONSE:
vehicle_state.pdu_sdc_active = data[0] & CAN_PDU_RESPONSE_SDC_TX_MASK;
break;
case CAN_ID_AMS_ERROR:
vehicle_state.last_ams_error.kind = data[0];
vehicle_state.last_ams_error.arg = data[1];
break;
case CAN_ID_JETSON_TX:
vehicle_state.last_jetson_msg = HAL_GetTick();
vehicle_state.as_ok = data[0] & CAN_JETSON_TX_AS_OK_MASK;
vehicle_state.desired_speed =
((int8_t)data[1]) * CAN_JETSON_TX_SPEED_FACTOR;
vehicle_state.desired_angle =
((int8_t)data[2]) * CAN_JETSON_TX_ANGLE_FACTOR;
break;
case CAN_ID_ABX_DRIVER:
vehicle_state.brake_press_f =
(data[1] | ((data[2] & 0x0F) << 8)) * CAN_ABX_DRIVER_PRESS_FACTOR;
vehicle_state.brake_press_r =
((data[2] >> 4) | (data[3] << 4)) * CAN_ABX_DRIVER_PRESS_FACTOR;
vehicle_state.speed = data[5] * CAN_ABX_DRIVER_SPEED_FACTOR;
break;
case CAN_ID_ABX_HYDRAULICS:
vehicle_state.hyd_press_a =
(data[0] | ((data[1] & 0x0F) << 8)) * CAN_ABX_DRIVER_PRESS_FACTOR;
vehicle_state.hyd_press_b =
((data[1] >> 4) | (data[2] << 4)) * CAN_ABX_DRIVER_PRESS_FACTOR;
break;
case CAN_ID_ABX_TIMINGS:
vehicle_state.lap_best = (data[0] | (data[1] << 8)) * 0.01f;
vehicle_state.lap_last = (data[2] | (data[3] << 8)) * 0.01f;
break;
case CAN_ID_ABX_BRAKE_T:
vehicle_state.temps.brake_fl = (data[0] | (data[1] << 8)) * 0.01f;
vehicle_state.temps.brake_fr = (data[2] | (data[3] << 8)) * 0.01f;
vehicle_state.temps.brake_rl = (data[4] | (data[5] << 8)) * 0.01f;
vehicle_state.temps.brake_rr = (data[6] | (data[7] << 8)) * 0.01f;
break;
case CAN_ID_CS_INTERNAL:
vehicle_state.temps.inv_l =
(data[0] | (data[1] << 8)) * CAN_CS_INTERNAL_TEMP_FACTOR;
vehicle_state.temps.inv_r =
(data[2] | (data[3] << 8)) * CAN_CS_INTERNAL_TEMP_FACTOR;
vehicle_state.temps.mot_l =
(data[4] | (data[5] << 8)) * CAN_CS_INTERNAL_TEMP_FACTOR;
vehicle_state.temps.mot_r =
(data[6] | (data[7] << 8)) * CAN_CS_INTERNAL_TEMP_FACTOR;
break;
case CAN_ID_ABX_MISC:
vehicle_state.distance_total =
(data[3] | (data[4] << 8)) * CAN_ABX_MISC_DISTANCE_TOTAL_FACTOR;
vehicle_state.soc_lv = data[5];
vehicle_state.lv_bat_voltage =
data[6] * CAN_ABX_MISC_LV_BAT_VOLTAGE_FACTOR;
break;
case CAN_ID_EPSC_OUT:
vehicle_state.last_epsc_msg = HAL_GetTick();
vehicle_state.measured_angle =
((int16_t)((data[0] << 8) | (data[1]))) * CAN_EPSC_OUT_ANGLE_FACTOR;
break;
case CAN_ID_AS_MISSION_FB:
vehicle_state.active_mission = data[0] & 0b111;
break;
case CAN_ID_STW_STATUS:
vehicle_state.as_state = data[0] & 0b111;
vehicle_state.r2d_progress = data[0] >> 4;
vehicle_state.errors.invl_ready = (data[1] >> 0) & 1;
vehicle_state.errors.invr_ready = (data[1] >> 1) & 1;
vehicle_state.errors.sdc_bfl = (data[1] >> 2) & 1;
vehicle_state.errors.sdc_brl = (data[1] >> 3) & 1;
vehicle_state.errors.sdc_acc = (data[1] >> 4) & 1;
vehicle_state.errors.sdc_hvb = (data[1] >> 5) & 1;
vehicle_state.lap_count = data[2] & 0b111111;
vehicle_state.ini_chk_state = data[3];
vehicle_state.errors.err_sdc = (data[4] >> 0) & 1;
vehicle_state.errors.err_ams = (data[4] >> 1) & 1;
vehicle_state.errors.err_pdu = (data[4] >> 2) & 1;
vehicle_state.errors.err_ini_chk = (data[4] >> 3) & 1;
vehicle_state.errors.err_con_mon = (data[4] >> 4) & 1;
vehicle_state.errors.err_scs = (data[4] >> 5) & 1;
vehicle_state.errors.err_sbspd = (data[4] >> 6) & 1;
vehicle_state.errors.err_appsp = (data[4] >> 7) & 1;
vehicle_state.errors.err_as = (data[5] >> 0) & 1;
vehicle_state.errors.err_ros = (data[5] >> 1) & 1;
vehicle_state.errors.err_res = (data[5] >> 2) & 1;
vehicle_state.errors.err_invl = (data[5] >> 3) & 1;
vehicle_state.errors.err_invr = (data[5] >> 4) & 1;
break;
case CAN_ID_ABX_PARAM_CONFIRMED:
vehicle_state.last_param_confirmed = data[0];
tx_event_flags_set(&gui_update_events, GUI_UPDATE_PARAM_CONFIRMED, TX_OR);
break;
case CAN_ID_SHUNT_CURRENT: {
// The first two bytes of shunt result messages are metadata
const uint8_t *result_ptr = &data[2];
vehicle_state.ts_current = ftcan_unmarshal_signed(&result_ptr, 4) * 1e-3;
break;
}
case CAN_ID_SHUNT_VOLTAGE1: {
const uint8_t *result_ptr = &data[2];
vehicle_state.ts_voltage_bat =
ftcan_unmarshal_signed(&result_ptr, 4) * 1e-3;
break;
}
case CAN_ID_SHUNT_VOLTAGE2: {
const uint8_t *result_ptr = &data[2];
vehicle_state.ts_voltage_veh =
ftcan_unmarshal_signed(&result_ptr, 4) * 1e-3;
break;
}
case CAN_ID_AMS_SLAVE_PANIC:
vehicle_state.last_ams_slave_panic.id = data[0];
vehicle_state.last_ams_slave_panic.kind = data[1];
ptr = &data[2];
vehicle_state.last_ams_slave_panic.arg =
ftcan_unmarshal_unsigned(&ptr, 4);
break;
case CAN_ID_AMS_STATUS:
vehicle_state.ts_state = data[0] & 0x7F;
vehicle_state.sdc_closed = (data[0] & 0x80) >> 7;
vehicle_state.soc_ts = data[1];
ptr = &data[2];
vehicle_state.min_cell_volt =
ftcan_unmarshal_unsigned(&ptr, 2) * CAN_AMS_STATUS_VOLTAGE_FACTOR;
vehicle_state.max_cell_temp =
ftcan_unmarshal_signed(&ptr, 2) * CAN_AMS_STATUS_TEMP_FACTOR;
vehicle_state.imd_ok = (data[6] >> 7);
// TODO: Separate temperatures for left and right side of battery
vehicle_state.temps.bat_l = vehicle_state.max_cell_temp;
vehicle_state.temps.bat_r = vehicle_state.max_cell_temp;
break;
case CAN_ID_SDCL_TX:
vehicle_state.sdcl_state[0] = data[0] & CAN_SDCL_STATE_1_MASK;
vehicle_state.sdcl_state[1] = data[0] & CAN_SDCL_STATE_2_MASK;
vehicle_state.sdcl_state[2] = data[0] & CAN_SDCL_STATE_3_MASK;
break;
case CAN_ID_PDU_RESPONSE:
vehicle_state.pdu_sdc_active = data[0] & CAN_PDU_RESPONSE_SDC_TX_MASK;
break;
case CAN_ID_AMS_ERROR:
vehicle_state.last_ams_error.kind = data[0];
vehicle_state.last_ams_error.arg = data[1];
break;
case CAN_ID_JETSON_TX:
vehicle_state.last_jetson_msg = HAL_GetTick();
vehicle_state.as_ok = data[0] & CAN_JETSON_TX_AS_OK_MASK;
vehicle_state.desired_speed =
((int8_t)data[1]) * CAN_JETSON_TX_SPEED_FACTOR;
vehicle_state.desired_angle =
((int8_t)data[2]) * CAN_JETSON_TX_ANGLE_FACTOR;
break;
case CAN_ID_ABX_DRIVER:
vehicle_state.brake_press_f =
(data[1] | ((data[2] & 0x0F) << 8)) * CAN_ABX_DRIVER_PRESS_FACTOR;
vehicle_state.brake_press_r =
((data[2] >> 4) | (data[3] << 4)) * CAN_ABX_DRIVER_PRESS_FACTOR;
vehicle_state.speed = data[5] * CAN_ABX_DRIVER_SPEED_FACTOR;
break;
case CAN_ID_ABX_HYDRAULICS:
vehicle_state.hyd_press_a =
(data[0] | ((data[1] & 0x0F) << 8)) * CAN_ABX_DRIVER_PRESS_FACTOR;
vehicle_state.hyd_press_b =
((data[1] >> 4) | (data[2] << 4)) * CAN_ABX_DRIVER_PRESS_FACTOR;
break;
case CAN_ID_ABX_TIMINGS:
vehicle_state.lap_best = (data[0] | (data[1] << 8)) * 0.01f;
vehicle_state.lap_last = (data[2] | (data[3] << 8)) * 0.01f;
break;
case CAN_ID_ABX_BRAKE_T:
vehicle_state.temps.brake_fl = (data[0] | (data[1] << 8)) * 0.01f;
vehicle_state.temps.brake_fr = (data[2] | (data[3] << 8)) * 0.01f;
vehicle_state.temps.brake_rl = (data[4] | (data[5] << 8)) * 0.01f;
vehicle_state.temps.brake_rr = (data[6] | (data[7] << 8)) * 0.01f;
break;
case CAN_ID_CS_INTERNAL:
vehicle_state.temps.inv_l =
(data[0] | (data[1] << 8)) * CAN_CS_INTERNAL_TEMP_FACTOR;
vehicle_state.temps.inv_r =
(data[2] | (data[3] << 8)) * CAN_CS_INTERNAL_TEMP_FACTOR;
vehicle_state.temps.mot_l =
(data[4] | (data[5] << 8)) * CAN_CS_INTERNAL_TEMP_FACTOR;
vehicle_state.temps.mot_r =
(data[6] | (data[7] << 8)) * CAN_CS_INTERNAL_TEMP_FACTOR;
break;
case CAN_ID_ABX_MISC:
vehicle_state.distance_total =
(data[3] | (data[4] << 8)) * CAN_ABX_MISC_DISTANCE_TOTAL_FACTOR;
vehicle_state.soc_lv = data[5];
vehicle_state.lv_bat_voltage =
data[6] * CAN_ABX_MISC_LV_BAT_VOLTAGE_FACTOR;
break;
case CAN_ID_EPSC_OUT:
vehicle_state.last_epsc_msg = HAL_GetTick();
vehicle_state.measured_angle =
((int16_t)((data[0] << 8) | (data[1]))) * CAN_EPSC_OUT_ANGLE_FACTOR;
break;
case CAN_ID_AS_MISSION_FB:
vehicle_state.active_mission = data[0] & 0b111;
break;
case CAN_ID_STW_STATUS:
vehicle_state.as_state = data[0] & 0b111;
vehicle_state.r2d_progress = data[0] >> 4;
vehicle_state.errors.invl_ready = (data[1] >> 0) & 1;
vehicle_state.errors.invr_ready = (data[1] >> 1) & 1;
vehicle_state.errors.sdc_bfl = (data[1] >> 2) & 1;
vehicle_state.errors.sdc_brl = (data[1] >> 3) & 1;
vehicle_state.errors.sdc_acc = (data[1] >> 4) & 1;
vehicle_state.errors.sdc_hvb = (data[1] >> 5) & 1;
vehicle_state.lap_count = data[2] & 0b111111;
vehicle_state.ini_chk_state = data[3];
vehicle_state.errors.err_sdc = (data[4] >> 0) & 1;
vehicle_state.errors.err_ams = (data[4] >> 1) & 1;
vehicle_state.errors.err_pdu = (data[4] >> 2) & 1;
vehicle_state.errors.err_ini_chk = (data[4] >> 3) & 1;
vehicle_state.errors.err_con_mon = (data[4] >> 4) & 1;
vehicle_state.errors.err_scs = (data[4] >> 5) & 1;
vehicle_state.errors.err_sbspd = (data[4] >> 6) & 1;
vehicle_state.errors.err_appsp = (data[4] >> 7) & 1;
vehicle_state.errors.err_as = (data[5] >> 0) & 1;
vehicle_state.errors.err_ros = (data[5] >> 1) & 1;
vehicle_state.errors.err_res = (data[5] >> 2) & 1;
vehicle_state.errors.err_invl = (data[5] >> 3) & 1;
vehicle_state.errors.err_invr = (data[5] >> 4) & 1;
break;
case CAN_ID_ABX_PARAM_CONFIRMED:
vehicle_state.last_param_confirmed = data[0];
tx_event_flags_set(&gui_update_events, GUI_UPDATE_PARAM_CONFIRMED,
TX_OR);
break;
case CAN_ID_SHUNT_CURRENT: {
// The first two bytes of shunt result messages are metadata
const uint8_t *result_ptr = &data[2];
vehicle_state.ts_current =
ftcan_unmarshal_signed(&result_ptr, 4) * 1e-3;
break;
}
case CAN_ID_SHUNT_VOLTAGE1: {
const uint8_t *result_ptr = &data[2];
vehicle_state.ts_voltage_bat =
ftcan_unmarshal_signed(&result_ptr, 4) * 1e-3;
break;
}
case CAN_ID_SHUNT_VOLTAGE2: {
const uint8_t *result_ptr = &data[2];
vehicle_state.ts_voltage_veh =
ftcan_unmarshal_signed(&result_ptr, 4) * 1e-3;
break;
}
}
}
tx_event_flags_set(&gui_update_events, GUI_UPDATE_VEHICLE_STATE, TX_OR);

View File

@ -1,5 +1,5 @@
##########################################################################################################################
# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Sun Jul 21 12:04:39 CEST 2024]
# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Sun Jul 21 18:35:39 CEST 2024]
##########################################################################################################################
# ------------------------------------------------

View File

@ -29,6 +29,7 @@ cDefinitions:
cxxDefinitions:
- USE_HAL_DRIVER
- STM32H7A3xx
- COMPILER_GIT_BUILD_HASH="a07d51f"
asDefinitions: []
@ -170,3 +171,4 @@ customMakefileRules:
makeFlags:
# - -O # use this option when the output of make is mixed up only works for make version 4.0 and upwards
# - --silent # use this option to silence the output of the build
# - -j1

View File

@ -2,7 +2,7 @@
******************************************************************************
* File Name : app_touchgfx.c
******************************************************************************
* This file was created by TouchGFX Generator 4.23.2. This file is only
* This file was created by TouchGFX Generator 4.24.0. This file is only
* generated once! Delete this file from your project and re-generate code
* using STM32CubeMX or change this file manually to update it.
******************************************************************************

View File

@ -2,7 +2,7 @@
******************************************************************************
* File Name : app_touchgfx.h
******************************************************************************
* This file was created by TouchGFX Generator 4.23.2. This file is only
* This file was created by TouchGFX Generator 4.24.0. This file is only
* generated once! Delete this file from your project and re-generate code
* using STM32CubeMX or change this file manually to update it.
******************************************************************************

View File

@ -26,5 +26,5 @@
"AdditionalFeatures": [
]
},
"Version": "4.23.2"
"Version": "4.24.0"
}

View File

@ -17,7 +17,7 @@ CountedEnum(DataFieldType, size_t, DF_TSState, DF_ASState, DF_ActiveMission,
DF_Speed, DF_BBal, DF_BPF, DF_BPR, DF_DistanceTotal, DF_TempMotL,
DF_TempMotR, DF_TempInvL, DF_TempInvR, DF_TempBrakeFL,
DF_TempBrakeFR, DF_TempBrakeRL, DF_TempBrakeRR, DF_LapBest,
DF_LapLast, DF_LVBatVoltage);
DF_LapLast, DF_LVBatVoltage, DF_GitBuildHash);
enum class NamedFieldKind { Float, Bool, Text, Int };

View File

@ -9,17 +9,27 @@
#include <algorithm>
#include <cstring>
#define _STRINGIZE(x) #x
#define STRINGIZE(x) _STRINGIZE(x)
#ifndef COMPILER_GIT_BUILD_HASH
#define COMPILER_GIT_BUILD_HASH "git id not found"
#endif
static const char* git_hash = STRINGIZE(COMPILER_GIT_BUILD_HASH);
#define VEH_FIELD(FIELD) []() { return (void *)&vehicle_state.FIELD; }
#define VEH_BIT_FIELD(FIELD) \
[]() { \
static int x; \
x = vehicle_state.FIELD; \
return (void *)&x; \
#define VEH_BIT_FIELD(FIELD) \
[]() { \
static int x; \
x = vehicle_state.FIELD; \
return (void *)&x; \
}
void *get_tsstate_text() {
void *get_tsstate_text()
{
const char *text;
switch (vehicle_state.ts_state) {
switch (vehicle_state.ts_state)
{
case TS_INACTIVE:
text = "INACT";
break;
@ -47,9 +57,11 @@ void *get_tsstate_text() {
return (void *)text;
}
void *get_asstate_text() {
void *get_asstate_text()
{
const char *text;
switch (vehicle_state.as_state) {
switch (vehicle_state.as_state)
{
case AS_OFF:
text = "OFF";
break;
@ -74,9 +86,11 @@ void *get_asstate_text() {
return (void *)text;
}
void *get_mission_text() {
void *get_mission_text()
{
const char *text;
switch (vehicle_state.active_mission) {
switch (vehicle_state.active_mission)
{
case MISSION_NONE:
text = "NONE";
break;
@ -107,9 +121,11 @@ void *get_mission_text() {
return (void *)text;
}
void *get_r2dprog_text() {
void *get_r2dprog_text()
{
const char *text;
switch (vehicle_state.r2d_progress) {
switch (vehicle_state.r2d_progress)
{
case R2D_NONE:
text = "NONE";
break;
@ -143,61 +159,106 @@ void *get_r2dprog_text() {
return (void *)text;
}
void *get_inichk_text() {
void *get_inichk_text()
{
return (void *)inichkstate_str(vehicle_state.ini_chk_state);
}
void *get_sdc_text() {
void *get_sdc_text()
{
const char *text;
if (vehicle_state.errors.sdc_bfl) {
if (vehicle_state.errors.sdc_bfl)
{
text = "BFL";
} else if (vehicle_state.errors.sdc_brl) {
}
else if (vehicle_state.errors.sdc_brl)
{
text = "BRL";
} else if (vehicle_state.errors.sdc_acc) {
}
else if (vehicle_state.errors.sdc_acc)
{
text = "ACC";
} else if (vehicle_state.errors.sdc_hvb) {
}
else if (vehicle_state.errors.sdc_hvb)
{
text = "HVB";
} else {
}
else
{
text = "CLOSED";
}
return (void *)text;
}
void *get_err_text() {
void *get_err_text()
{
const char *text;
if (vehicle_state.errors.err_sdc) {
if (vehicle_state.errors.err_sdc)
{
text = "SDC";
} else if (vehicle_state.errors.err_ams) {
}
else if (vehicle_state.errors.err_ams)
{
text = "AMS";
} else if (vehicle_state.errors.err_pdu) {
}
else if (vehicle_state.errors.err_pdu)
{
text = "PDU";
} else if (vehicle_state.errors.err_ini_chk) {
}
else if (vehicle_state.errors.err_ini_chk)
{
text = "IniChk";
} else if (vehicle_state.errors.err_con_mon) {
}
else if (vehicle_state.errors.err_con_mon)
{
text = "ConMon";
} else if (vehicle_state.errors.err_scs) {
}
else if (vehicle_state.errors.err_scs)
{
text = "SCS";
} else if (vehicle_state.errors.err_sbspd) {
}
else if (vehicle_state.errors.err_sbspd)
{
text = "sBSPD";
} else if (vehicle_state.errors.err_appsp) {
}
else if (vehicle_state.errors.err_appsp)
{
text = "APPSp";
} else if (vehicle_state.errors.err_as) {
}
else if (vehicle_state.errors.err_as)
{
text = "AS";
} else if (vehicle_state.errors.err_ros) {
}
else if (vehicle_state.errors.err_ros)
{
text = "ROS";
} else if (vehicle_state.errors.err_res) {
}
else if (vehicle_state.errors.err_res)
{
text = "RES";
} else if (vehicle_state.errors.err_invl) {
}
else if (vehicle_state.errors.err_invl)
{
text = "INVL";
} else if (vehicle_state.errors.err_invr) {
}
else if (vehicle_state.errors.err_invr)
{
text = "INVR";
} else {
}
else
{
text = "NONE";
}
return (void *)text;
}
void *get_zero() {
void *get_compiler_build_hash()
{
return (void *)git_hash;
}
void *get_zero()
{
static float zero = 0.0f;
return &zero;
}
@ -265,7 +326,7 @@ NamedFieldDescription dataFieldDescs[] = {
VEH_FIELD(lap_last)},
[DF_LVBatVoltage] = {NamedFieldKind::Float, "LVVBAT", 2, 2,
VEH_FIELD(lv_bat_voltage)},
};
[DF_GitBuildHash] = {NamedFieldKind::Text, "BLDHASH", 1, 0, get_compiler_build_hash}};
static_assert(sizeof(dataFieldDescs) / sizeof(dataFieldDescs[0]) ==
DataFieldType_COUNT,
@ -274,14 +335,12 @@ static_assert(sizeof(dataFieldDescs) / sizeof(dataFieldDescs[0]) ==
#define PARAM_FIELD(FIELD) []() { return (void *)&params.FIELD; }
NamedFieldDescription paramFieldDescs[] = {
[PF_BBAL] = {NamedFieldKind::Float, "BBAL", 2, 1, PARAM_FIELD(bbal)},
[PF_SLIPREF] = {NamedFieldKind::Float, "SLIPREF", 2, 2,
PARAM_FIELD(slipref)},
[PF_MUMAX] = {NamedFieldKind::Float, "MUMAX", 2, 1, PARAM_FIELD(mumax)},
[PF_ASRP] = {NamedFieldKind::Int, "ASR-P", 2, 0, PARAM_FIELD(asrp)},
[PF_ASRON] = {NamedFieldKind::Int, "ASR-ON", 2, 0, PARAM_FIELD(asron)},
[PF_ASRI] = {NamedFieldKind::Int, "ASR-I", 2, 0, PARAM_FIELD(asri)},
[PF_PLIM] = {NamedFieldKind::Int, "PLIM", 2, 0, PARAM_FIELD(plim)},
[PF_TLIM] = {NamedFieldKind::Int, "TLIM", 4, 1, PARAM_FIELD(tlim)},
[PF_SLIM] = {NamedFieldKind::Int, "SLIM", 2, 2, PARAM_FIELD(slim)},
[PF_TVEC] = {NamedFieldKind::Int, "TVEC", 2, 1, PARAM_FIELD(tvec)},
[PF_PG] = {NamedFieldKind::Int, "PG", 2, 0, PARAM_FIELD(pg)},
[PF_REKU] = {NamedFieldKind::Int, "REKU", 2, 0, PARAM_FIELD(reku)},
};
static_assert(sizeof(paramFieldDescs) / sizeof(paramFieldDescs[0]) ==
@ -293,31 +352,38 @@ size_t dataFieldAlphaIndexByField[DataFieldType_COUNT];
ParamType paramByAlphaIndex[ParamType_COUNT];
size_t paramAlphaIndexByParam[ParamType_COUNT];
template <class T> struct NFAlphabeticComp {
template <class T>
struct NFAlphabeticComp
{
NFAlphabeticComp(const NamedFieldDescription *fieldDescs)
: fieldDescs{fieldDescs} {}
const NamedFieldDescription *fieldDescs;
bool operator()(const T &a, const T &b) const {
bool operator()(const T &a, const T &b) const
{
return strcmp(fieldDescs[a].title, fieldDescs[b].title) < 0;
}
};
template <class T>
void namedFieldSort(const NamedFieldDescription *fieldDescs, T *fieldByAlpha,
size_t *alphaIndexByField, size_t numFields) {
for (size_t i = 0; i < numFields; i++) {
size_t *alphaIndexByField, size_t numFields)
{
for (size_t i = 0; i < numFields; i++)
{
fieldByAlpha[i] = static_cast<T>(i);
}
std::sort(fieldByAlpha, fieldByAlpha + numFields,
NFAlphabeticComp<T>(fieldDescs));
for (size_t i = 0; i < numFields; i++) {
for (size_t i = 0; i < numFields; i++)
{
alphaIndexByField[fieldByAlpha[i]] = i;
}
}
void namedFieldSort() {
void namedFieldSort()
{
namedFieldSort(dataFieldDescs, dataFieldByAlphaIndex,
dataFieldAlphaIndexByField, DataFieldType_COUNT);
namedFieldSort(paramFieldDescs, paramByAlphaIndex, paramAlphaIndexByParam,
@ -328,7 +394,9 @@ template <class T>
NamedField<T>::NamedField(const NamedFieldDescription *fieldDescs)
: fieldDescs{fieldDescs} {}
template <class T> void NamedField<T>::setType(T type) {
template <class T>
void NamedField<T>::setType(T type)
{
this->type = type;
desc = &fieldDescs[type];
@ -340,11 +408,15 @@ template <class T> void NamedField<T>::setType(T type) {
updateValue();
}
template <class T> const T &NamedField<T>::getType() { return type; }
template <class T>
const T &NamedField<T>::getType() { return type; }
template <class T> void NamedField<T>::updateValue() {
template <class T>
void NamedField<T>::updateValue()
{
void *val = desc->getValue();
switch (desc->kind) {
switch (desc->kind)
{
case NamedFieldKind::Float:
setFloatValue(*static_cast<float *>(val));
break;
@ -360,32 +432,45 @@ template <class T> void NamedField<T>::updateValue() {
}
}
template <class T> void NamedField<T>::setFloatValue(float floatValue) {
template <class T>
void NamedField<T>::setFloatValue(float floatValue)
{
fieldValue.f = floatValue;
updateValueBuffer();
}
template <class T> void NamedField<T>::setBoolValue(int boolValue) {
template <class T>
void NamedField<T>::setBoolValue(int boolValue)
{
fieldValue.b = boolValue;
updateValueBuffer();
}
template <class T> void NamedField<T>::setIntValue(int intValue) {
template <class T>
void NamedField<T>::setIntValue(int intValue)
{
fieldValue.i = intValue;
updateValueBuffer();
}
template <class T> void NamedField<T>::setStrValue(const char *strValue) {
template <class T>
void NamedField<T>::setStrValue(const char *strValue)
{
touchgfx::Unicode::strncpy(valueBuffer, strValue,
sizeof(valueBuffer) / sizeof(*valueBuffer));
updateValueBuffer();
}
template <class T> void NamedField<T>::updateValueBuffer() {
switch (desc->kind) {
case NamedFieldKind::Float: {
template <class T>
void NamedField<T>::updateValueBuffer()
{
switch (desc->kind)
{
case NamedFieldKind::Float:
{
size_t width = desc->int_digits;
if (desc->decimal_digits != 0) {
if (desc->decimal_digits != 0)
{
width += desc->decimal_digits + 1; // 1 digit for the decimal point
}
float params[3] = {(float)width, (float)desc->decimal_digits, fieldValue.f};
@ -394,7 +479,8 @@ template <class T> void NamedField<T>::updateValueBuffer() {
params);
break;
}
case NamedFieldKind::Bool: {
case NamedFieldKind::Bool:
{
const char *str = fieldValue.b ? "YES" : "NO";
touchgfx::Unicode::strncpy(valueBuffer, str,
sizeof(valueBuffer) / sizeof(*valueBuffer));

View File

@ -24,6 +24,9 @@
/* USER CODE BEGIN TouchGFXHAL.cpp */
#include "STWButtonController.hpp"
STWButtonController stwBC;
using namespace touchgfx;
void TouchGFXHAL::initialize()
@ -35,6 +38,7 @@ void TouchGFXHAL::initialize()
// Please note, HAL::initialize() must be called to initialize the framework.
TouchGFXGeneratedHAL::initialize();
setButtonController(&stwBC);
}
/**

View File

@ -2,7 +2,7 @@
******************************************************************************
* File Name : OSWrappers.cpp
******************************************************************************
* This file is generated by TouchGFX Generator 4.23.2. Please, do not edit!
* This file is generated by TouchGFX Generator 4.24.0. Please, do not edit!
******************************************************************************
* @attention
*
@ -16,7 +16,6 @@
******************************************************************************
*/
#include <cassert>
#include <touchgfx/hal/HAL.hpp>
#include <touchgfx/hal/OSWrappers.hpp>
@ -25,6 +24,8 @@
#include "tx_api.h"
#include "tx_byte_pool.h"
#include <cassert>
// tx_thread.h is not C++ compatible, declare used symbols here as externals
extern "C" volatile UINT _tx_thread_preempt_disable;
extern "C" VOID _tx_thread_system_preempt_check(VOID);

View File

@ -2,7 +2,7 @@
******************************************************************************
* File Name : STM32DMA.cpp
******************************************************************************
* This file is generated by TouchGFX Generator 4.23.2. Please, do not edit!
* This file is generated by TouchGFX Generator 4.24.0. Please, do not edit!
******************************************************************************
* @attention
*
@ -16,27 +16,686 @@
******************************************************************************
*/
#include "stm32h7xx_hal.h"
#include "stm32h7xx_hal_dma2d.h"
#include <STM32DMA.hpp>
#include <assert.h>
#include <cassert>
#include <touchgfx/hal/HAL.hpp>
#include <touchgfx/hal/Paint.hpp>
/* Makes touchgfx specific types and variables visible to this file */
using namespace touchgfx;
typedef struct
{
const uint16_t format;
const uint16_t size;
const uint32_t* const data;
} clutData_t;
extern "C" void DMA2D_IRQHandler()
{
/* Transfer Complete Interrupt management ************************************/
if ((READ_REG(DMA2D->ISR) & DMA2D_FLAG_TC) != RESET)
{
/* Verify Transfer Complete Interrupt */
if ((READ_REG(DMA2D->CR) & DMA2D_IT_TC) != RESET)
{
/* Disable the transfer complete interrupt */
DMA2D->CR &= ~(DMA2D_IT_TC);
/* Clear the transfer complete flag */
DMA2D->IFCR = (DMA2D_FLAG_TC);
/* Signal DMA queue of execution complete */
touchgfx::HAL::getInstance()->signalDMAInterrupt();
}
}
}
STM32DMA::STM32DMA()
: DMA_Interface(q), q(&b, 1)
: DMA_Interface(dma_queue), dma_queue(queue_storage, sizeof(queue_storage) / sizeof(queue_storage[0]))
{
}
touchgfx::BlitOperations STM32DMA::getBlitCaps()
STM32DMA::~STM32DMA()
{
return static_cast<touchgfx::BlitOperations>(0);
/* Disable DMA2D global Interrupt */
NVIC_DisableIRQ(DMA2D_IRQn);
}
void STM32DMA::setupDataCopy(const touchgfx::BlitOp& blitOp)
void STM32DMA::initialize()
{
assert(0 && "DMA operation not supported");
/* Ensure DMA2D Clock is enabled */
__HAL_RCC_DMA2D_CLK_ENABLE();
__HAL_RCC_DMA2D_FORCE_RESET();
__HAL_RCC_DMA2D_RELEASE_RESET();
/* Enable DMA2D global Interrupt */
HAL_NVIC_SetPriority(DMA2D_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2D_IRQn);
}
void STM32DMA::setupDataFill(const touchgfx::BlitOp& blitOp)
inline uint32_t STM32DMA::getChromARTInputFormat(Bitmap::BitmapFormat format)
{
assert(0 && "DMA operation not supported");
// Default color mode set to ARGB8888
uint32_t dma2dColorMode = DMA2D_INPUT_ARGB8888;
switch (format)
{
case Bitmap::ARGB8888: /* DMA2D input mode set to 32bit ARGB */
dma2dColorMode = DMA2D_INPUT_ARGB8888;
break;
case Bitmap::RGB888: /* DMA2D input mode set to 24bit RGB */
dma2dColorMode = DMA2D_INPUT_RGB888;
break;
case Bitmap::RGB565: /* DMA2D input mode set to 16bit RGB */
dma2dColorMode = DMA2D_INPUT_RGB565;
break;
case Bitmap::ARGB2222: /* Fall through */
case Bitmap::ABGR2222: /* Fall through */
case Bitmap::RGBA2222: /* Fall through */
case Bitmap::BGRA2222: /* Fall through */
case Bitmap::L8: /* DMA2D input mode set to 8bit Color Look up table*/
dma2dColorMode = DMA2D_INPUT_L8;
break;
case Bitmap::BW: /* Fall through */
case Bitmap::BW_RLE: /* Fall through */
case Bitmap::GRAY4: /* Fall through */
case Bitmap::GRAY2: /* Fall through */
default: /* Unsupported input format for DMA2D */
assert(0 && "Unsupported Format!");
break;
}
return dma2dColorMode;
}
inline uint32_t STM32DMA::getChromARTOutputFormat(Bitmap::BitmapFormat format)
{
// Default color mode set to ARGB8888
uint32_t dma2dColorMode = DMA2D_OUTPUT_ARGB8888;
switch (format)
{
case Bitmap::ARGB8888: /* DMA2D output mode set to 32bit ARGB */
dma2dColorMode = DMA2D_OUTPUT_ARGB8888;
break;
case Bitmap::RGB888: /* Fall through */
case Bitmap::ARGB2222: /* Fall through */
case Bitmap::ABGR2222: /* Fall through */
case Bitmap::RGBA2222: /* Fall through */
case Bitmap::BGRA2222: /* DMA2D output mode set to 24bit RGB */
dma2dColorMode = DMA2D_OUTPUT_RGB888;
break;
case Bitmap::RGB565: /* DMA2D output mode set to 16bit RGB */
dma2dColorMode = DMA2D_OUTPUT_RGB565;
break;
case Bitmap::L8: /* Fall through */
case Bitmap::BW: /* Fall through */
case Bitmap::BW_RLE: /* Fall through */
case Bitmap::GRAY4: /* Fall through */
case Bitmap::GRAY2: /* Fall through */
default: /* Unsupported output format for DMA2D */
assert(0 && "Unsupported Format!");
break;
}
return dma2dColorMode;
}
BlitOperations STM32DMA::getBlitCaps()
{
return static_cast<BlitOperations>(BLIT_OP_FILL
| BLIT_OP_FILL_WITH_ALPHA
| BLIT_OP_COPY
| BLIT_OP_COPY_L8
| BLIT_OP_COPY_WITH_ALPHA
| BLIT_OP_COPY_ARGB8888
| BLIT_OP_COPY_ARGB8888_WITH_ALPHA
| BLIT_OP_COPY_A4
| BLIT_OP_COPY_A8);
}
/*
* void STM32DMA::setupDataCopy(const BlitOp& blitOp) handles blit operation of
* BLIT_OP_COPY
* BLIT_OP_COPY_L8
* BLIT_OP_COPY_WITH_ALPHA
* BLIT_OP_COPY_ARGB8888
* BLIT_OP_COPY_ARGB8888_WITH_ALPHA
* BLIT_OP_COPY_A4
* BLIT_OP_COPY_A8
*/
void STM32DMA::setupDataCopy(const BlitOp& blitOp)
{
uint32_t dma2dForegroundColorMode = getChromARTInputFormat(static_cast<Bitmap::BitmapFormat>(blitOp.srcFormat));
uint32_t dma2dBackgroundColorMode = getChromARTInputFormat(static_cast<Bitmap::BitmapFormat>(blitOp.dstFormat));
uint32_t dma2dOutputColorMode = getChromARTOutputFormat(static_cast<Bitmap::BitmapFormat>(blitOp.dstFormat));
/* DMA2D OOR register configuration */
WRITE_REG(DMA2D->OOR, blitOp.dstLoopStride - blitOp.nSteps);
/* DMA2D BGOR register configuration */
WRITE_REG(DMA2D->BGOR, blitOp.dstLoopStride - blitOp.nSteps);
/* DMA2D FGOR register configuration */
WRITE_REG(DMA2D->FGOR, blitOp.srcLoopStride - blitOp.nSteps);
/* DMA2D OPFCCR register configuration */
WRITE_REG(DMA2D->OPFCCR, dma2dOutputColorMode);
/* Configure DMA2D data size */
WRITE_REG(DMA2D->NLR, (blitOp.nLoops | (blitOp.nSteps << DMA2D_NLR_PL_Pos)));
/* Configure DMA2D destination address */
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* Configure DMA2D source address */
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(blitOp.pSrc));
switch (blitOp.operation)
{
case BLIT_OP_COPY_A4:
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_A4 | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (blitOp.alpha << 24));
/* set DMA2D foreground color */
WRITE_REG(DMA2D->FGCOLR, blitOp.color);
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, dma2dBackgroundColorMode | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* Set DMA2D mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_IT_TC | DMA2D_CR_START | DMA2D_IT_CE | DMA2D_IT_TE);
break;
case BLIT_OP_COPY_A8:
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_A8 | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (blitOp.alpha << 24));
/* set DMA2D foreground color */
WRITE_REG(DMA2D->FGCOLR, blitOp.color);
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, dma2dBackgroundColorMode | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* Set DMA2D mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_IT_TC | DMA2D_CR_START | DMA2D_IT_CE | DMA2D_IT_TE);
break;
case BLIT_OP_COPY_WITH_ALPHA:
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, dma2dForegroundColorMode | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (blitOp.alpha << 24));
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, dma2dBackgroundColorMode | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* Set DMA2D mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_IT_TC | DMA2D_CR_START | DMA2D_IT_CE | DMA2D_IT_TE);
break;
case BLIT_OP_COPY_L8:
{
bool blend = true;
const clutData_t* const palette = reinterpret_cast<const clutData_t*>(blitOp.pClut);
/* Write foreground CLUT memory address */
WRITE_REG(DMA2D->FGCMAR, reinterpret_cast<uint32_t>(&palette->data));
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, dma2dForegroundColorMode | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (blitOp.alpha << 24));
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, dma2dBackgroundColorMode | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* Configure CLUT */
switch ((Bitmap::ClutFormat)palette->format)
{
case Bitmap::CLUT_FORMAT_L8_ARGB8888:
/* Write foreground CLUT size and CLUT color mode */
MODIFY_REG(DMA2D->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), (((palette->size - 1) << DMA2D_FGPFCCR_CS_Pos) | (DMA2D_CCM_ARGB8888 << DMA2D_FGPFCCR_CCM_Pos)));
break;
case Bitmap::CLUT_FORMAT_L8_RGB888:
if (blitOp.alpha == 255)
{
blend = false;
}
MODIFY_REG(DMA2D->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), (((palette->size - 1) << DMA2D_FGPFCCR_CS_Pos) | (DMA2D_CCM_RGB888 << DMA2D_FGPFCCR_CCM_Pos)));
break;
case Bitmap::CLUT_FORMAT_L8_RGB565:
default:
assert(0 && "Unsupported format");
break;
}
/* Enable the CLUT loading for the foreground */
SET_BIT(DMA2D->FGPFCCR, DMA2D_FGPFCCR_START);
while ((READ_REG(DMA2D->FGPFCCR) & DMA2D_FGPFCCR_START) != 0U)
{
}
DMA2D->IFCR = (DMA2D_FLAG_CTC);
/* Set DMA2D mode */
if (blend)
{
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_IT_TC | DMA2D_CR_START | DMA2D_IT_CE | DMA2D_IT_TE);
}
else
{
WRITE_REG(DMA2D->CR, DMA2D_M2M_PFC | DMA2D_IT_TC | DMA2D_CR_START | DMA2D_IT_CE | DMA2D_IT_TE);
}
}
break;
case BLIT_OP_COPY_ARGB8888:
case BLIT_OP_COPY_ARGB8888_WITH_ALPHA:
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, dma2dForegroundColorMode | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (blitOp.alpha << 24));
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, dma2dBackgroundColorMode | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* Set DMA2D mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_IT_TC | DMA2D_CR_START | DMA2D_IT_CE | DMA2D_IT_TE);
break;
default: /* BLIT_OP_COPY */
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, dma2dForegroundColorMode | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (blitOp.alpha << 24));
/* Perform pixel-format-conversion (PFC) If Bitmap format is not same format as framebuffer format */
if (blitOp.srcFormat != blitOp.dstFormat)
{
/* Start DMA2D : PFC Mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_PFC | DMA2D_IT_TC | DMA2D_CR_START | DMA2D_IT_CE | DMA2D_IT_TE);
}
else
{
/* Start DMA2D : M2M Mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M | DMA2D_IT_TC | DMA2D_CR_START | DMA2D_IT_CE | DMA2D_IT_TE);
}
break;
}
}
/*
* void STM32DMA::setupDataFill(const BlitOp& blitOp) handles blit operation of
* BLIT_OP_FILL
* BLIT_OP_FILL_WITH_ALPHA
*/
void STM32DMA::setupDataFill(const BlitOp& blitOp)
{
uint32_t dma2dOutputColorMode = getChromARTOutputFormat(static_cast<Bitmap::BitmapFormat>(blitOp.dstFormat));
/* DMA2D OPFCCR register configuration */
WRITE_REG(DMA2D->OPFCCR, dma2dOutputColorMode);
/* Configure DMA2D data size */
WRITE_REG(DMA2D->NLR, (blitOp.nLoops | (blitOp.nSteps << DMA2D_NLR_PL_Pos)));
/* Configure DMA2D destination address */
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* DMA2D OOR register configuration */
WRITE_REG(DMA2D->OOR, blitOp.dstLoopStride - blitOp.nSteps);
if (blitOp.operation == BLIT_OP_FILL_WITH_ALPHA)
{
/* DMA2D BGOR register configuration */
WRITE_REG(DMA2D->BGOR, blitOp.dstLoopStride - blitOp.nSteps);
/* DMA2D FGOR register configuration */
WRITE_REG(DMA2D->FGOR, blitOp.dstLoopStride - blitOp.nSteps);
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, dma2dOutputColorMode | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Write DMA2D FGPFCCR register */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_A8 | (DMA2D_REPLACE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | ((blitOp.alpha << 24) & DMA2D_FGPFCCR_ALPHA));
/* DMA2D FGCOLR register configuration */
WRITE_REG(DMA2D->FGCOLR, blitOp.color);
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* Configure DMA2D source address */
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(blitOp.pDst));
/* Enable the Peripheral and Enable the transfer complete interrupt */
WRITE_REG(DMA2D->CR, (DMA2D_IT_TC | DMA2D_CR_START | DMA2D_M2M_BLEND | DMA2D_IT_CE | DMA2D_IT_TE));
}
else
{
/* Write DMA2D FGPFCCR register */
WRITE_REG(DMA2D->FGPFCCR, dma2dOutputColorMode | (DMA2D_NO_MODIF_ALPHA << DMA2D_FGPFCCR_AM_Pos));
/* DMA2D FGOR register configuration */
WRITE_REG(DMA2D->FGOR, 0);
/* Set color */
WRITE_REG(DMA2D->OCOLR, ((blitOp.color >> 8) & 0xF800) | ((blitOp.color >> 5) & 0x07E0) | ((blitOp.color >> 3) & 0x001F));
/* Enable the Peripheral and Enable the transfer complete interrupt */
WRITE_REG(DMA2D->CR, (DMA2D_IT_TC | DMA2D_CR_START | DMA2D_R2M | DMA2D_IT_CE | DMA2D_IT_TE));
}
}
namespace touchgfx
{
namespace paint
{
namespace
{
const clutData_t* L8CLUT = 0;
uint32_t L8ClutLoaded = 0;
} // namespace
void setL8Palette(const uint8_t* const data)
{
L8CLUT = reinterpret_cast<const clutData_t*>(data - offsetof(clutData_t, data));
L8ClutLoaded = 0;
}
/**
* @fn void tearDown();
*
* @brief Waits until previous DMA drawing operation has finished
*/
void tearDown()
{
/* Wait for DMA2D to finish last run */
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
/* Clear transfer flags */
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
}
/** Flushes a line of pixels in the data cache if used.
*
* @brief Flushes decoded RGB pixels when rendering compressed images
*/
void flushLine(uint32_t* addr, int sizebytes)
{
// This funciton is used when decompressing RGB images to flush
// the currently decoded pixels in the cache to allow the DMA2D
// to blend the pixels correcly.
if (SCB->CCR & SCB_CCR_DC_Msk)
{
SCB_CleanDCache_by_Addr(addr, sizebytes);
}
}
namespace rgb565
{
/**
* @fn void lineFromColor();
*
* @brief Renders Canvas Widget chunks using DMA.
* This functions will not generate an interrupt, and will not affect the DMA queue.
*/
void lineFromColor(uint16_t* const ptr, const unsigned count, const uint32_t color, const uint8_t alpha, const uint32_t color565)
{
/* Wait for DMA2D to finish last run */
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
/* Clear transfer flags */
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
/* DMA2D OPFCCR register configuration */
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
/* Configure DMA2D data size */
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
/* Configure DMA2D destination address */
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
if (alpha < 0xFF)
{
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, DMA2D_OUTPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Write DMA2D FGPFCCR register */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_A8 | (DMA2D_REPLACE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (alpha << DMA2D_FGPFCCR_ALPHA_Pos));
/* DMA2D FGCOLR register configuration */
WRITE_REG(DMA2D->FGCOLR, color);
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, (uint32_t)ptr);
/* Configure DMA2D source address */
WRITE_REG(DMA2D->FGMAR, (uint32_t)ptr);
/* Enable the Peripheral and Enable the transfer complete interrupt */
WRITE_REG(DMA2D->CR, (DMA2D_CR_START | DMA2D_M2M_BLEND));
}
else
{
/* Write DMA2D FGPFCCR register */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_OUTPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_FGPFCCR_AM_Pos));
/* Set color */
WRITE_REG(DMA2D->OCOLR, color565);
/* Enable the Peripheral and Enable the transfer complete interrupt */
WRITE_REG(DMA2D->CR, (DMA2D_CR_START | DMA2D_R2M));
}
}
void lineFromRGB565(uint16_t* const ptr, const uint16_t* const data, const unsigned count, const uint8_t alpha)
{
/* Wait for DMA2D to finish last run */
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
/* Clear transfer flags */
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
/* DMA2D OPFCCR register configuration */
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
/* Configure DMA2D data size */
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
/* Configure DMA2D destination address */
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
/* Configure DMA2D source address */
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
if (alpha < 0xFF)
{
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (alpha << DMA2D_FGPFCCR_ALPHA_Pos));
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
/* Set DMA2D mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
}
else
{
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (alpha << DMA2D_FGPFCCR_ALPHA_Pos));
/* Start DMA2D : M2M Mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M | DMA2D_CR_START);
}
}
void lineFromARGB8888(uint16_t* const ptr, const uint32_t* const data, const unsigned count, const uint8_t alpha)
{
/* Wait for DMA2D to finish last run */
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
/* Clear transfer flags */
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
/* DMA2D OPFCCR register configuration */
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
/* Configure DMA2D data size */
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
/* Configure DMA2D destination address */
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
/* Configure DMA2D source address */
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_ARGB8888 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << DMA2D_FGPFCCR_ALPHA_Pos));
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
/* Set DMA2D mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
}
void lineFromL8RGB888(uint16_t* const ptr, const uint8_t* const data, const unsigned count, const uint8_t alpha)
{
/* wait for DMA2D to finish last run */
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
/* DMA2D OPFCCR register configuration */
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
/* Configure DMA2D data size */
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
/* Configure DMA2D destination address */
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
/* Configure DMA2D source address */
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
/* Load CLUT if not already loaded */
if (L8ClutLoaded == 0)
{
/* Write foreground CLUT memory address */
WRITE_REG(DMA2D->FGCMAR, reinterpret_cast<uint32_t>(&L8CLUT->data));
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_L8 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << DMA2D_FGPFCCR_ALPHA_Pos));
MODIFY_REG(DMA2D->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), (((L8CLUT->size - 1) << DMA2D_FGPFCCR_CS_Pos) | (DMA2D_CCM_RGB888 << DMA2D_FGPFCCR_CCM_Pos)));
/* Enable the CLUT loading for the foreground */
SET_BIT(DMA2D->FGPFCCR, DMA2D_FGPFCCR_START);
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Mark CLUT loaded */
L8ClutLoaded = 1;
/* Wait for load to finish */
while ((READ_REG(DMA2D->FGPFCCR) & DMA2D_FGPFCCR_START) != 0U);
/* Clear CLUT Transfer Complete flag */
DMA2D->IFCR = (DMA2D_FLAG_CTC);
}
else
{
/* Set correct alpha for these pixels */
MODIFY_REG(DMA2D->FGPFCCR, DMA2D_BGPFCCR_ALPHA_Msk, alpha << DMA2D_FGPFCCR_ALPHA_Pos);
}
/* Start pixel transfer in correct mode */
if (alpha < 0xFF)
{
/* Set DMA2D mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
}
else
{
/* Set DMA2D mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_PFC | DMA2D_CR_START);
}
}
void lineFromL8ARGB8888(uint16_t* const ptr, const uint8_t* const data, const unsigned count, const uint8_t alpha)
{
/* wait for DMA2D to finish last run */
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
/* DMA2D OPFCCR register configuration */
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
/* Configure DMA2D data size */
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
/* Configure DMA2D destination address */
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
/* Configure DMA2D source address */
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
/* Configure DMA2D Stream source2 address */
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
/* Load CLUT if not already loaded */
if (L8ClutLoaded == 0)
{
/* Write foreground CLUT memory address */
WRITE_REG(DMA2D->FGCMAR, reinterpret_cast<uint32_t>(&L8CLUT->data));
/* Set DMA2D color mode and alpha mode */
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_L8 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << DMA2D_FGPFCCR_ALPHA_Pos));
MODIFY_REG(DMA2D->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), (((L8CLUT->size - 1) << DMA2D_FGPFCCR_CS_Pos) | (DMA2D_CCM_ARGB8888 << DMA2D_FGPFCCR_CCM_Pos)));
/* Enable the CLUT loading for the foreground */
SET_BIT(DMA2D->FGPFCCR, DMA2D_FGPFCCR_START);
/* Write DMA2D BGPFCCR register */
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
/* Mark CLUT loaded */
L8ClutLoaded = 1;
/* Wait for load to finish */
while ((READ_REG(DMA2D->FGPFCCR) & DMA2D_FGPFCCR_START) != 0U);
/* Clear CLUT Transfer Complete flag */
DMA2D->IFCR = (DMA2D_FLAG_CTC);
}
else
{
/* Set correct alpha for these pixels */
MODIFY_REG(DMA2D->FGPFCCR, DMA2D_BGPFCCR_ALPHA_Msk, alpha << DMA2D_FGPFCCR_ALPHA_Pos);
}
/* Start pixel transfer in blending mode */
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
}
} // namespace rgb565
} // namespace paint
} // namespace touchgfx
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

View File

@ -2,7 +2,7 @@
******************************************************************************
* File Name : STM32DMA.hpp
******************************************************************************
* This file is generated by TouchGFX Generator 4.23.2. Please, do not edit!
* This file is generated by TouchGFX Generator 4.24.0. Please, do not edit!
******************************************************************************
* @attention
*
@ -18,7 +18,7 @@
#ifndef STM32DMA_HPP
#define STM32DMA_HPP
#include <touchgfx/hal/BlitOp.hpp>
#include <touchgfx/Bitmap.hpp>
#include <touchgfx/hal/DMA.hpp>
/**
@ -26,68 +26,139 @@
*
* @brief This class specializes DMA_Interface for the STM32 processors.
*
* @see touchgfx::DMA_Interface
* @sa touchgfx::DMA_Interface
*/
class STM32DMA : public touchgfx::DMA_Interface
{
/**
* @typedef touchgfx::DMA_Interface Base
*
* @brief Defines an alias representing the base.
*
Defines an alias representing the base.
*/
typedef touchgfx::DMA_Interface Base;
public:
/**
* @fn STM32DMA::STM32DMA();
*
* @brief Default constructor.
*
* Default constructor.
*/
STM32DMA();
/**
* @fn STM32DMA::~STM32DMA();
*
* @brief Destructor.
*
* Destructor.
*/
virtual ~STM32DMA();
/**
* @fn DMAType touchgfx::STM32DMA::getDMAType()
*
* @brief Function for obtaining the DMA type of the concrete DMA_Interface implementation.
*
* Function for obtaining the DMA type of the concrete DMA_Interface implementation.
* As default, will return DMA_TYPE_CHROMART type value.
*
* @return a DMAType value of the concrete DMA_Interface implementation.
*/
virtual touchgfx::DMAType getDMAType(void)
{
return touchgfx::DMA_TYPE_CHROMART;
}
/**
* @fn touchgfx::BlitOperations STM32DMA::getBlitCaps();
*
* @brief No blit operations supported by this DMA implementation.
* @brief Gets the blit capabilities.
*
* @return Zero (no blit ops supported).
* Gets the blit capabilities.
*
* This DMA supports a range of blit caps: BLIT_OP_COPY, BLIT_OP_COPY_ARGB8888,
* BLIT_OP_COPY_ARGB8888_WITH_ALPHA, BLIT_OP_COPY_A4, BLIT_OP_COPY_A8.
*
*
* @return Currently supported blitcaps.
*/
virtual touchgfx::BlitOperations getBlitCaps();
/**
* @fn void STM32DMA::initialize();
*
* @brief Perform hardware specific initialization.
*
* Perform hardware specific initialization.
*/
virtual void initialize();
/**
* @fn void STM32DMA::signalDMAInterrupt()
*
* @brief Raises a DMA interrupt signal.
*
* Raises a DMA interrupt signal.
*/
virtual void signalDMAInterrupt()
{
executeCompleted();
}
protected:
/**
* @fn virtual void STM32DMA::setupDataCopy(const touchgfx::BlitOp& blitOp);
*
* @brief Asserts if used.
* @brief Configures the DMA for copying data to the frame buffer.
*
* @param blitOp The blit operation to be performed by this DMA instance.
* Configures the DMA for copying data to the frame buffer.
*
* @param blitOp Details on the copy to perform.
*/
virtual void setupDataCopy(const touchgfx::BlitOp& blitOp);
/**
* @fn virtual void STM32DMA::setupDataFill(const touchgfx::BlitOp& blitOp);
*
* @brief Asserts if used.
* @brief Configures the DMA for "filling" the frame-buffer with a single color.
*
* @param blitOp The blit operation to be performed by this DMA instance.
* Configures the DMA for "filling" the frame-buffer with a single color.
*
* @param blitOp Details on the "fill" to perform.
*/
virtual void setupDataFill(const touchgfx::BlitOp& blitOp);
/**
* @fn virtual void STM32DMA::signalDMAInterrupt();
*
* @brief Does nothing.
*/
virtual void signalDMAInterrupt()
{
}
/**
* @fn virtual void STM32DMA::flush();
*
* @brief Block until all DMA transfers are complete. Since this particular DMA does not do
* anything, return immediately.
*/
virtual void flush()
{
}
private:
touchgfx::LockFreeDMA_Queue q;
touchgfx::BlitOp b;
};
#endif // TOUCHGFX_NODMA_HPP
touchgfx::LockFreeDMA_Queue dma_queue;
touchgfx::BlitOp queue_storage[96];
/**
* @fn void STM32DMA::getChromARTInputFormat()
*
* @brief Convert Bitmap format to ChromART Input format.
*
* @param format Bitmap format.
*
* @return ChromART Input format.
*/
inline uint32_t getChromARTInputFormat(touchgfx::Bitmap::BitmapFormat format);
/**
* @fn void STM32DMA::getChromARTOutputFormat()
*
* @brief Convert Bitmap format to ChromART Output format.
*
* @param format Bitmap format.
*
* @return ChromART Output format.
*/
inline uint32_t getChromARTOutputFormat(touchgfx::Bitmap::BitmapFormat format);
};
#endif // STM32DMA_HPP
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

View File

@ -2,7 +2,7 @@
******************************************************************************
* File Name : TouchGFXConfiguration.cpp
******************************************************************************
* This file is generated by TouchGFX Generator 4.23.2. Please, do not edit!
* This file is generated by TouchGFX Generator 4.24.0. Please, do not edit!
******************************************************************************
* @attention
*

View File

@ -2,7 +2,7 @@
******************************************************************************
* File Name : TouchGFXGeneratedHAL.cpp
******************************************************************************
* This file is generated by TouchGFX Generator 4.23.2. Please, do not edit!
* This file is generated by TouchGFX Generator 4.24.0. Please, do not edit!
******************************************************************************
* @attention
*
@ -19,8 +19,7 @@
#include <TouchGFXGeneratedHAL.hpp>
#include <touchgfx/hal/OSWrappers.hpp>
#include <gui/common/FrontendHeap.hpp>
#include <touchgfx/hal/PaintImpl.hpp>
#include <touchgfx/hal/PaintRGB565Impl.hpp>
#include <touchgfx/hal/GPIO.hpp>
#include "stm32h7xx.h"
#include "stm32h7xx_hal_ltdc.h"
@ -37,21 +36,24 @@ void TouchGFXGeneratedHAL::initialize()
{
HAL::initialize();
registerEventListener(*(Application::getInstance()));
setFrameBufferStartAddresses((void*)0x24040000, (void*)0x24040000, (void*)0);
setFrameBufferStartAddresses((void*)0x24040000, (void*)0x240A0000, (void*)0);
}
void TouchGFXGeneratedHAL::configureInterrupts()
{
NVIC_SetPriority(DMA2D_IRQn, 9);
NVIC_SetPriority(LTDC_IRQn, 9);
}
void TouchGFXGeneratedHAL::enableInterrupts()
{
NVIC_EnableIRQ(DMA2D_IRQn);
NVIC_EnableIRQ(LTDC_IRQn);
}
void TouchGFXGeneratedHAL::disableInterrupts()
{
NVIC_DisableIRQ(DMA2D_IRQn);
NVIC_DisableIRQ(LTDC_IRQn);
}
@ -101,10 +103,11 @@ bool TouchGFXGeneratedHAL::blockCopy(void* RESTRICT dest, const void* RESTRICT s
void TouchGFXGeneratedHAL::InvalidateCache()
{
// If the framebuffer is placed in Write Through cached memory (e.g. SRAM) then
// the DCache must be flushed prior to DMA2D accessing it. That's done
// using the function SCB_CleanInvalidateDCache(). Remember to enable "CPU Cache" in the
// "System Core" settings for "Cortex M7" in CubeMX in order for this function call to work.
// Because DMA2D access main memory directly, the DCache must be invalidated
// becuase it could hold a wrong image of the framebuffer. That's done
// using the function SCB_CleanInvalidateDCache(). Remember to enable
// "CPU Cache" in the "System Core" settings for "Cortex M7" in CubeMX
// in order for this function call to work.
if (SCB->CCR & SCB_CCR_DC_Msk)
{
SCB_CleanInvalidateDCache();
@ -113,14 +116,48 @@ void TouchGFXGeneratedHAL::InvalidateCache()
void TouchGFXGeneratedHAL::FlushCache()
{
// If the framebuffer is placed in Write Through cached memory (e.g. SRAM) then
// If the framebuffer is placed in Write-Back cached memory (e.g. SRAM) then
// the DCache must be flushed prior to DMA2D accessing it. That's done
// using the function SCB_CleanInvalidateDCache(). Remember to enable "CPU Cache" in the
// "System Core" settings for "Cortex M7" in CubeMX in order for this function call to work.
// using the function SCB_CleanInvalidateDCache(). Remember to enable
// "CPU Cache" in the "System Core" settings for "Cortex M7" in CubeMX in
// order for this function call to work.
if (SCB->CCR & SCB_CCR_DC_Msk)
{
SCB_CleanInvalidateDCache();
}
}
extern "C"
{
void HAL_LTDC_LineEventCallback(LTDC_HandleTypeDef* hltdc)
{
if (!HAL::getInstance())
{
return;
}
if (LTDC->LIPCR == lcd_int_active_line)
{
//entering active area
HAL_LTDC_ProgramLineEvent(hltdc, lcd_int_porch_line);
HAL::getInstance()->vSync();
OSWrappers::signalVSync();
// Swap frame buffers immediately instead of waiting for the task to be scheduled in.
// Note: task will also swap when it wakes up, but that operation is guarded and will not have
// any effect if already swapped.
HAL::getInstance()->swapFrameBuffers();
GPIO::set(GPIO::VSYNC_FREQ);
}
else
{
//exiting active area
HAL_LTDC_ProgramLineEvent(hltdc, lcd_int_active_line);
// Signal to the framework that display update has finished.
HAL::getInstance()->frontPorchEntered();
GPIO::clear(GPIO::VSYNC_FREQ);
}
}
}
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

View File

@ -2,7 +2,7 @@
******************************************************************************
* File Name : TouchGFXGeneratedHAL.hpp
******************************************************************************
* This file is generated by TouchGFX Generator 4.23.2. Please, do not edit!
* This file is generated by TouchGFX Generator 4.24.0. Please, do not edit!
******************************************************************************
* @attention
*
@ -60,27 +60,27 @@ public:
/**
* @fn virtual void TouchGFXGeneratedHAL::configureInterrupts();
*
* @brief Sets the DMA and LCD interrupt priorities.
* @brief Sets the DMA, LCD, and GPU2D (if enabled) interrupt priorities.
*
* Sets the DMA and LCD interrupt priorities.
* Sets the DMA, LCD, and GPU2D (if enabled) interrupt priorities.
*/
virtual void configureInterrupts();
/**
* @fn virtual void TouchGFXGeneratedHAL::enableInterrupts();
*
* @brief Enables the DMA and LCD interrupts.
* @brief Enables the DMA, LCD, and GPU2D (if enabled) interrupts.
*
* Enables the DMA and LCD interrupts.
* Enables the DMA, LCD, and GPU2D (if enabled) interrupts.
*/
virtual void enableInterrupts();
/**
* @fn virtual void TouchGFXGeneratedHAL::disableInterrupts();
*
* @brief Disables the DMA and LCD interrupts.
* @brief Disables the DMA, LDC, and GPU2D (if enabled) interrupts.
*
* Disables the DMA and LCD interrupts.
* Disables the DMA, LDC, and GPU2D (if enabled) interrupts.
*/
virtual void disableInterrupts();
@ -114,8 +114,6 @@ public:
* @brief This function is called whenever the framework has performed a partial draw.
*
* This function is called whenever the framework has performed a partial draw.
* On the STM32F7, make sure to clean and invalidate the data cache. This is to
* ensure that LTDC sees correct data when transferring to the display.
*
* @param rect The area of the screen that has been drawn, expressed in absolute coordinates.
*

View File

@ -153,13 +153,13 @@ Mcu.Pin70=VP_SYS_VS_tim6
Mcu.Pin71=VP_TIM1_VS_ClockSourceINT
Mcu.Pin72=VP_TIM2_VS_ClockSourceINT
Mcu.Pin73=VP_TIM17_VS_ClockSourceINT
Mcu.Pin74=VP_STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.23.2
Mcu.Pin75=VP_STMicroelectronics.X-CUBE-AZRTOS-H7_VS_RTOSJjThreadX_6.1.12_3.0.0
Mcu.Pin74=VP_STMicroelectronics.X-CUBE-AZRTOS-H7_VS_RTOSJjThreadX_6.1.12_3.0.0
Mcu.Pin75=VP_STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.24.0
Mcu.Pin8=PF3
Mcu.Pin9=PF4
Mcu.PinsNb=76
Mcu.ThirdParty0=STMicroelectronics.X-CUBE-AZRTOS-H7.3.0.0
Mcu.ThirdParty1=STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2
Mcu.ThirdParty1=STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0
Mcu.ThirdPartyNb=2
Mcu.UserConstants=
Mcu.UserName=STM32H7A3ZITx
@ -575,17 +575,19 @@ STMicroelectronics.X-CUBE-AZRTOS-H7.3.0.0.TX_APP_GENERATE_INIT_CODE=false
STMicroelectronics.X-CUBE-AZRTOS-H7.3.0.0.ThreadXCcRTOSJjThreadXJjCore=true
STMicroelectronics.X-CUBE-AZRTOS-H7.3.0.0_IsAnAzureRtosMw=true
STMicroelectronics.X-CUBE-AZRTOS-H7.3.0.0_SwParameter=ThreadXCcRTOSJjThreadXJjCore\:true;
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.ApplicationCcGraphicsJjApplication=TouchGFXOoGenerator
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.GraphicsJjApplication_Checked=true
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.IPParameters=tgfx_custom_height,ApplicationCcGraphicsJjApplication,tgfx_location,tgfx_address1,tgfx_display_interface,tgfx_buffering_strategy,tgfx_address2
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.tgfx_address1=0x24040000
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.tgfx_address2=0x24040000
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.tgfx_buffering_strategy=Double
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.tgfx_custom_height=480
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.tgfx_display_interface=disp_ltdc
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2.tgfx_location=By Address
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2_IsPackSelfContextualization=true
STMicroelectronics.X-CUBE-TOUCHGFX.4.23.2_SwParameter=ApplicationCcGraphicsJjApplication\:TouchGFXOoGenerator;
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.ApplicationCcGraphicsJjApplication=TouchGFXOoGenerator
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.GraphicsJjApplication_Checked=true
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.IPParameters=tgfx_display_interface,tgfx_vsync,tgfx_hardware_accelerator,tgfx_custom_height,tgfx_buffering_strategy,tgfx_location,tgfx_address1,tgfx_address2,ApplicationCcGraphicsJjApplication
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.tgfx_address1=0x24040000
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.tgfx_address2=0x240A0000
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.tgfx_buffering_strategy=Double
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.tgfx_custom_height=480
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.tgfx_display_interface=disp_ltdc
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.tgfx_hardware_accelerator=dma_2d
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.tgfx_location=By Address
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0.tgfx_vsync=vsync_ltdc
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0_IsPackSelfContextualization=true
STMicroelectronics.X-CUBE-TOUCHGFX.4.24.0_SwParameter=ApplicationCcGraphicsJjApplication\:TouchGFXOoGenerator;
TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
TIM1.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
TIM1.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
@ -612,8 +614,8 @@ VP_OCTOSPI1_VS_quad.Mode=quad_mode
VP_OCTOSPI1_VS_quad.Signal=OCTOSPI1_VS_quad
VP_STMicroelectronics.X-CUBE-AZRTOS-H7_VS_RTOSJjThreadX_6.1.12_3.0.0.Mode=RTOSJjThreadX
VP_STMicroelectronics.X-CUBE-AZRTOS-H7_VS_RTOSJjThreadX_6.1.12_3.0.0.Signal=STMicroelectronics.X-CUBE-AZRTOS-H7_VS_RTOSJjThreadX_6.1.12_3.0.0
VP_STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.23.2.Mode=GraphicsJjApplication
VP_STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.23.2.Signal=STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.23.2
VP_STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.24.0.Mode=GraphicsJjApplication
VP_STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.24.0.Signal=STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.24.0
VP_SYS_VS_tim6.Mode=TIM6
VP_SYS_VS_tim6.Signal=SYS_VS_tim6
VP_TIM17_VS_ClockSourceINT.Mode=Enable_Timer