GFX Develop Branch
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@ -255,7 +255,9 @@ HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_GetValue(ADC_HandleTypeDef *hadc,
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* @param SingleDiff This parameter can be only:
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* @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
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* @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
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* @param CalibrationFactor Calibration factor (coded on 7 bits maximum)
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* @param CalibrationFactor Calibration factor On devices STM32H72xx and STM32H73xx this parameter is coded on 11 bits
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* maximum for ADC1/2 and on 7 bits for ADC3.
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* On devices STM32H74xx and STM32H75xx this parameter is coded on 11 bits.
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* @retval HAL state
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*/
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HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
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@ -267,7 +269,19 @@ HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32
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/* Check the parameters */
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assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
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assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
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#if defined(ADC_VER_V5_V90)
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if (hadc->Instance == ADC3)
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{
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assert_param(IS_ADC_CALFACT_ADC3(CalibrationFactor));
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}
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else
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{
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assert_param(IS_ADC_CALFACT(CalibrationFactor));
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}
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#else
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assert_param(IS_ADC_CALFACT(CalibrationFactor));
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#endif
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/* Process locked */
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__HAL_LOCK(hadc);
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@ -991,8 +1005,11 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc)
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* Interruptions enabled in this function:
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* overrun, DMA half transfer, DMA transfer complete.
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* Each of these interruptions has its dedicated callback function.
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* @note Case of ADC slave using its own DMA channel (typical case being both ADC instances using DMA channel
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* of ADC master with data concatenated): multimode must be configured without data packing and
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* this function must be called first with handle of ADC slave, then with handle of ADC master.
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* @note State field of Slave ADC handle is not updated in this configuration:
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* user should not rely on it for information related to Slave regular
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* user should not rely on it for information related to Slave regular
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* conversions.
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* @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
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* @param pData Destination Buffer address.
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@ -1019,28 +1036,38 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t
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/* Process locked */
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__HAL_LOCK(hadc);
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tmphadcSlave.State = HAL_ADC_STATE_RESET;
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tmphadcSlave.ErrorCode = HAL_ADC_ERROR_NONE;
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/* Set a temporary handle of the ADC slave associated to the ADC master */
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ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
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if (tmphadcSlave.Instance == NULL)
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/* Case of ADC slave using its own DMA channel: check whether handle selected
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corresponds to ADC master or slave instance */
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if (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) != hadc->Instance)
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{
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/* Set ADC state */
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SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
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/* Process unlocked */
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__HAL_UNLOCK(hadc);
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return HAL_ERROR;
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/* Case of ADC slave selected: enable ADC instance */
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tmp_hal_status = ADC_Enable(hadc);
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}
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/* Enable the ADC peripherals: master and slave (in case if not already */
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/* enabled previously) */
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tmp_hal_status = ADC_Enable(hadc);
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if (tmp_hal_status == HAL_OK)
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else
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{
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tmp_hal_status = ADC_Enable(&tmphadcSlave);
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tmphadcSlave.State = HAL_ADC_STATE_RESET;
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tmphadcSlave.ErrorCode = HAL_ADC_ERROR_NONE;
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/* Set a temporary handle of the ADC slave associated to the ADC master */
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ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
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if (tmphadcSlave.Instance == NULL)
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{
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/* Set ADC state */
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SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
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/* Process unlocked */
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__HAL_UNLOCK(hadc);
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return HAL_ERROR;
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}
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/* Enable the ADC peripherals: master and slave (in case if not already */
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/* enabled previously) */
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tmp_hal_status = ADC_Enable(hadc);
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if (tmp_hal_status == HAL_OK)
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{
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tmp_hal_status = ADC_Enable(&tmphadcSlave);
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}
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}
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/* Start multimode conversion of ADCs pair */
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@ -1063,9 +1090,6 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t
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/* Set the DMA error callback */
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hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
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/* Pointer to the common control register */
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tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
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/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
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/* start (in case of SW start): */
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@ -1081,15 +1105,29 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t
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/* Enable ADC overrun interrupt */
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__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
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/* Start the DMA channel */
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tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
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/* Case of ADC slave using its own DMA channel: check whether handle selected
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corresponds to ADC master or slave instance */
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if (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) != hadc->Instance)
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{
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/* Case of ADC slave selected: Start the DMA channel. */
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/* Note: Data transfer will start upon next call of this function using handle of ADC master */
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tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
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}
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else
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{
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/* Pointer to the common control register */
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tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
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/* Enable conversion of regular group. */
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/* If software start has been selected, conversion starts immediately. */
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/* If external trigger has been selected, conversion will start at next */
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/* trigger event. */
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/* Start ADC group regular conversion */
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LL_ADC_REG_StartConversion(hadc->Instance);
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/* Start the DMA channel */
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tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
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/* Enable conversion of regular group. */
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/* If software start has been selected, conversion starts immediately. */
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/* If external trigger has been selected, conversion will start at next */
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/* trigger event. */
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/* Start ADC group regular conversion */
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LL_ADC_REG_StartConversion(hadc->Instance);
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}
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}
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else
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{
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@ -2015,16 +2053,19 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_I
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/* mode is disabled. */
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if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
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{
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#if defined(ADC_VER_V5_V90)
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if (hadc->Instance != ADC3)
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if (!(__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel)))
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{
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/* ADC channels preselection */
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hadc->Instance->PCSEL_RES0 |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel) & 0x1FUL));
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}
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#if defined(ADC_VER_V5_V90)
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if (hadc->Instance != ADC3)
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{
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/* ADC channels preselection */
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hadc->Instance->PCSEL_RES0 |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel) & 0x1FUL));
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}
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#else
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/* ADC channels preselection */
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hadc->Instance->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel) & 0x1FUL));
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/* ADC channels preselection */
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hadc->Instance->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel) & 0x1FUL));
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#endif /* ADC_VER_V5_V90 */
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}
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/* If auto-injected mode is disabled: no constraint */
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if (sConfigInjected->AutoInjectedConv == DISABLE)
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