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update to CubeMX 6.14.0, FW_H7 1.12.1

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This commit is contained in:
Leonard Gies
2025-04-01 23:59:23 +02:00
parent 5c441a87cd
commit 4ed2283fc9
280 changed files with 16378 additions and 6476 deletions
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45
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.c
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@ -1325,21 +1325,24 @@ HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pDat
status = HAL_ERROR;
}
/* Enable the QSPI transfer error Interrupt */
__HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE);
/* Use DMAEN bit with no impact on H7 HW to record MDMA transfer request */
SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
/* Enable the QSPI transmit MDMA */
if (HAL_MDMA_Start_IT(hqspi->hmdma, (uint32_t)pData, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize, 1) == HAL_OK)
{
/* Process unlocked */
__HAL_UNLOCK(hqspi);
/* Enable the QSPI transfer error Interrupt */
__HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE);
/* Enable using MDMA by setting DMAEN, note that DMAEN bit is "reserved"
but no impact on H7 HW and it minimize the cost in the footprint */
SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
}
else
{
/* Clear DMAEN bit with no impact on H7 HW to cancel MDMA transfer request */
CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
status = HAL_ERROR;
hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;
hqspi->State = HAL_QSPI_STATE_READY;
@ -1440,21 +1443,23 @@ HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData
/* Start the transfer by re-writing the address in AR register */
WRITE_REG(hqspi->Instance->AR, addr_reg);
/* Enable the QSPI transfer error Interrupt */
__HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE);
/* Use DMAEN bit with no impact on H7 HW to record MDMA transfer request */
SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
/* Enable the MDMA */
if (HAL_MDMA_Start_IT(hqspi->hmdma, (uint32_t)&hqspi->Instance->DR, (uint32_t)pData, hqspi->RxXferSize, 1) == HAL_OK)
{
/* Process unlocked */
__HAL_UNLOCK(hqspi);
/* Enable the QSPI transfer error Interrupt */
__HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE);
/* Enable using MDMA by setting DMAEN, note that DMAEN bit is "reserved"
but no impact on H7 HW and it minimize the cost in the footprint */
SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
}
else
{
/* Clear DMAEN bit with no impact on H7 HW to cancel MDMA transfer request */
CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
status = HAL_ERROR;
hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;
hqspi->State = HAL_QSPI_STATE_READY;
@ -2550,6 +2555,9 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin
cmd->AlternateBytesSize | cmd->AlternateByteMode |
cmd->AddressMode | cmd->InstructionMode |
cmd->Instruction | FunctionalMode));
/* Clear AR register */
CLEAR_REG(hqspi->Instance->AR);
}
}
else
@ -2577,6 +2585,9 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin
cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
cmd->AlternateByteMode | cmd->AddressMode |
cmd->InstructionMode | cmd->Instruction | FunctionalMode));
/* Clear AR register */
CLEAR_REG(hqspi->Instance->AR);
}
}
}
@ -2611,6 +2622,9 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin
cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
cmd->AlternateBytesSize | cmd->AlternateByteMode |
cmd->AddressMode | cmd->InstructionMode | FunctionalMode));
/* Clear AR register */
CLEAR_REG(hqspi->Instance->AR);
}
}
else
@ -2640,6 +2654,9 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin
cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
cmd->AlternateByteMode | cmd->AddressMode |
cmd->InstructionMode | FunctionalMode));
/* Clear AR register */
CLEAR_REG(hqspi->Instance->AR);
}
}
}