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Make CAN work

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This commit is contained in:
Jasper Blanckenburg
2023-03-08 20:20:01 +01:00
parent 81b7a23a34
commit 0ddea60a50
13 changed files with 227 additions and 74 deletions
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20
Core/Src/main.c
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@ -169,7 +169,7 @@ void SystemClock_Config(void) {
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {
}
@ -187,9 +187,9 @@ void SystemClock_Config(void) {
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 4;
RCC_OscInitStruct.PLL.PLLN = 8;
RCC_OscInitStruct.PLL.PLLN = 20;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 128;
RCC_OscInitStruct.PLL.PLLQ = 4;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
@ -211,7 +211,7 @@ void SystemClock_Config(void) {
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
Error_Handler();
}
}
@ -300,18 +300,18 @@ static void MX_FDCAN1_Init(void) {
hfdcan1.Init.AutoRetransmission = DISABLE;
hfdcan1.Init.TransmitPause = DISABLE;
hfdcan1.Init.ProtocolException = DISABLE;
hfdcan1.Init.NominalPrescaler = 16;
hfdcan1.Init.NominalPrescaler = 2;
hfdcan1.Init.NominalSyncJumpWidth = 1;
hfdcan1.Init.NominalTimeSeg1 = 2;
hfdcan1.Init.NominalTimeSeg2 = 2;
hfdcan1.Init.NominalTimeSeg1 = 63;
hfdcan1.Init.NominalTimeSeg2 = 16;
hfdcan1.Init.DataPrescaler = 1;
hfdcan1.Init.DataSyncJumpWidth = 1;
hfdcan1.Init.DataTimeSeg1 = 1;
hfdcan1.Init.DataTimeSeg2 = 1;
hfdcan1.Init.MessageRAMOffset = 0;
hfdcan1.Init.StdFiltersNbr = 0;
hfdcan1.Init.StdFiltersNbr = 1;
hfdcan1.Init.ExtFiltersNbr = 0;
hfdcan1.Init.RxFifo0ElmtsNbr = 0;
hfdcan1.Init.RxFifo0ElmtsNbr = 16;
hfdcan1.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
hfdcan1.Init.RxFifo1ElmtsNbr = 0;
hfdcan1.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
@ -319,7 +319,7 @@ static void MX_FDCAN1_Init(void) {
hfdcan1.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
hfdcan1.Init.TxEventsNbr = 0;
hfdcan1.Init.TxBuffersNbr = 0;
hfdcan1.Init.TxFifoQueueElmtsNbr = 0;
hfdcan1.Init.TxFifoQueueElmtsNbr = 1;
hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
hfdcan1.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK) {

8
Core/Src/stm32h7xx_hal_msp.c
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@ -205,6 +205,11 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* hfdcan)
GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN1;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* FDCAN1 interrupt Init */
HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn);
HAL_NVIC_SetPriority(FDCAN1_IT1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(FDCAN1_IT1_IRQn);
/* USER CODE BEGIN FDCAN1_MspInit 1 */
/* USER CODE END FDCAN1_MspInit 1 */
@ -234,6 +239,9 @@ void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* hfdcan)
*/
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1);
/* FDCAN1 interrupt DeInit */
HAL_NVIC_DisableIRQ(FDCAN1_IT0_IRQn);
HAL_NVIC_DisableIRQ(FDCAN1_IT1_IRQn);
/* USER CODE BEGIN FDCAN1_MspDeInit 1 */
/* USER CODE END FDCAN1_MspDeInit 1 */

29
Core/Src/stm32h7xx_it.c
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@ -55,6 +55,7 @@
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern FDCAN_HandleTypeDef hfdcan1;
extern LTDC_HandleTypeDef hltdc;
extern TIM_HandleTypeDef htim6;
@ -188,6 +189,34 @@ void EXTI4_IRQHandler(void)
/* USER CODE END EXTI4_IRQn 1 */
}
/**
* @brief This function handles FDCAN1 interrupt 0.
*/
void FDCAN1_IT0_IRQHandler(void)
{
/* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */
/* USER CODE END FDCAN1_IT0_IRQn 0 */
HAL_FDCAN_IRQHandler(&hfdcan1);
/* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */
/* USER CODE END FDCAN1_IT0_IRQn 1 */
}
/**
* @brief This function handles FDCAN1 interrupt 1.
*/
void FDCAN1_IT1_IRQHandler(void)
{
/* USER CODE BEGIN FDCAN1_IT1_IRQn 0 */
/* USER CODE END FDCAN1_IT1_IRQn 0 */
HAL_FDCAN_IRQHandler(&hfdcan1);
/* USER CODE BEGIN FDCAN1_IT1_IRQn 1 */
/* USER CODE END FDCAN1_IT1_IRQn 1 */
}
/**
* @brief This function handles EXTI line[9:5] interrupts.
*/

6
Core/Src/tx_initialize_low_level.s
View File

@ -66,7 +66,7 @@
.global __Vectors
@
@
SYSTEM_CLOCK = 64000000
SYSTEM_CLOCK = 160000000
SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
.text 32
@ -287,7 +287,7 @@ __tx_DBGHandler:
EXTERN _tx_execution_isr_exit
;
;
SYSTEM_CLOCK EQU 64000000
SYSTEM_CLOCK EQU 160000000
SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
#ifdef USE_DYNAMIC_MEMORY_ALLOCATION
RSEG FREE_MEM:DATA
@ -470,7 +470,7 @@ SysTick_Handler:
@
@
SYSTEM_CLOCK = 64000000
SYSTEM_CLOCK = 160000000
SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
.text 32

75
Core/Src/vehicle.c Normal file
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@ -0,0 +1,75 @@
#include "vehicle.h"
#include "main.h"
#include "stm32h7xx.h"
#include "stm32h7xx_hal.h"
#include "stm32h7xx_hal_fdcan.h"
#include "stm32h7xx_hal_gpio.h"
#include "tx_api.h"
#include "ui.h"
FDCAN_HandleTypeDef *hcan;
void vehicle_thread_entry(ULONG hfdcan_addr) {
hcan = (void *)hfdcan_addr;
FDCAN_FilterTypeDef filter;
filter.IdType = FDCAN_STANDARD_ID;
filter.FilterIndex = 0;
filter.FilterType = FDCAN_FILTER_MASK;
filter.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
filter.FilterID1 = 0x123;
filter.FilterID2 = 0x7FF;
if (HAL_FDCAN_ConfigFilter(hcan, &filter) != HAL_OK) {
Error_Handler();
}
// Reject non-matching messages
if (HAL_FDCAN_ConfigGlobalFilter(hcan, FDCAN_REJECT, FDCAN_REJECT,
FDCAN_REJECT_REMOTE,
FDCAN_REJECT_REMOTE) != HAL_OK) {
Error_Handler();
}
if (HAL_FDCAN_Start(hcan)) {
Error_Handler();
}
if (HAL_FDCAN_ActivateNotification(hcan, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0) !=
HAL_OK) {
Error_Handler();
}
FDCAN_TxHeaderTypeDef tx_header;
tx_header.IdType = FDCAN_STANDARD_ID;
tx_header.TxFrameType = FDCAN_DATA_FRAME;
tx_header.ErrorStateIndicator = FDCAN_ESI_PASSIVE;
tx_header.BitRateSwitch = FDCAN_BRS_OFF;
tx_header.FDFormat = FDCAN_CLASSIC_CAN;
tx_header.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
tx_header.MessageMarker = 0;
while (1) {
tx_header.Identifier = 0x456;
tx_header.DataLength = FDCAN_DLC_BYTES_2;
uint8_t data[] = {0xFF, 0xEE};
if (HAL_FDCAN_GetTxFifoFreeLevel(hcan) != 0) {
HAL_FDCAN_AddMessageToTxFifoQ(hcan, &tx_header, data);
}
tx_thread_sleep(10);
}
}
void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan,
uint32_t RxFifo0ITs) {
if (hfdcan != hcan || (RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE) == RESET) {
return;
}
static FDCAN_RxHeaderTypeDef header;
static uint8_t data[8];
if (HAL_FDCAN_GetRxMessage(hcan, FDCAN_RX_FIFO0, &header, data) != HAL_OK) {
Error_Handler();
}
if (header.IdType != FDCAN_STANDARD_ID || header.Identifier == 0x123) {
HAL_GPIO_TogglePin(STATUS2_GPIO_Port, STATUS2_Pin);
}
}