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ARM GAS /tmp/ccmNZWYr.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "AMS_HighLevel.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/AMS_HighLevel.c"
20 .section .text.AMS_Init,"ax",%progbits
21 .align 1
22 .global AMS_Init
23 .syntax unified
24 .thumb
25 .thumb_func
27 AMS_Init:
28 .LVL0:
29 .LFB130:
1:Core/Src/AMS_HighLevel.c **** /*
2:Core/Src/AMS_HighLevel.c **** * AMS_HighLevel.c
3:Core/Src/AMS_HighLevel.c **** *
4:Core/Src/AMS_HighLevel.c **** * Created on: 20.07.2022
5:Core/Src/AMS_HighLevel.c **** * Author: max
6:Core/Src/AMS_HighLevel.c **** */
7:Core/Src/AMS_HighLevel.c ****
8:Core/Src/AMS_HighLevel.c ****
9:Core/Src/AMS_HighLevel.c **** #include "AMS_HighLevel.h"
10:Core/Src/AMS_HighLevel.c ****
11:Core/Src/AMS_HighLevel.c **** Cell_Module module;
12:Core/Src/AMS_HighLevel.c **** uint32_t balancedCells = 0;
13:Core/Src/AMS_HighLevel.c **** uint8_t BalancingActive = 0;
14:Core/Src/AMS_HighLevel.c **** uint8_t stateofcharge = 100;
15:Core/Src/AMS_HighLevel.c **** int64_t currentintegrator = 0;
16:Core/Src/AMS_HighLevel.c **** uint32_t lastticks = 0;
17:Core/Src/AMS_HighLevel.c **** uint32_t currenttick = 0;
18:Core/Src/AMS_HighLevel.c **** uint8_t eepromconfigured = 0;
19:Core/Src/AMS_HighLevel.c ****
20:Core/Src/AMS_HighLevel.c **** uint8_t internalbalancingalgo = 1;
21:Core/Src/AMS_HighLevel.c **** uint16_t startbalancingthreshold = 41000;
22:Core/Src/AMS_HighLevel.c **** uint16_t stopbalancingthreshold = 30000;
23:Core/Src/AMS_HighLevel.c **** uint16_t balancingvoltagedelta = 10;
24:Core/Src/AMS_HighLevel.c ****
25:Core/Src/AMS_HighLevel.c ****
26:Core/Src/AMS_HighLevel.c **** uint16_t amsuv = 0;
27:Core/Src/AMS_HighLevel.c **** uint16_t amsov = 0;
28:Core/Src/AMS_HighLevel.c ****
29:Core/Src/AMS_HighLevel.c **** uint8_t amserrorcode = 0;
ARM GAS /tmp/ccmNZWYr.s page 2
30:Core/Src/AMS_HighLevel.c **** uint8_t amswarningcode = 0;
31:Core/Src/AMS_HighLevel.c ****
32:Core/Src/AMS_HighLevel.c **** uint8_t numberofCells = 17;
33:Core/Src/AMS_HighLevel.c **** uint8_t numberofAux = 0;
34:Core/Src/AMS_HighLevel.c ****
35:Core/Src/AMS_HighLevel.c ****
36:Core/Src/AMS_HighLevel.c **** amsState currentAMSState = AMSDEACTIVE;
37:Core/Src/AMS_HighLevel.c **** amsState lastAMSState = AMSDEACTIVE;
38:Core/Src/AMS_HighLevel.c ****
39:Core/Src/AMS_HighLevel.c **** void AMS_Init(SPI_HandleTypeDef *hspi)
40:Core/Src/AMS_HighLevel.c **** {
30 .loc 1 40 1 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 .loc 1 40 1 is_stmt 0 view .LVU1
35 0000 08B5 push {r3, lr}
36 .cfi_def_cfa_offset 8
37 .cfi_offset 3, -8
38 .cfi_offset 14, -4
41:Core/Src/AMS_HighLevel.c **** if(eepromconfigured == 1)
39 .loc 1 41 2 is_stmt 1 view .LVU2
40 .loc 1 41 22 is_stmt 0 view .LVU3
41 0002 0F4B ldr r3, .L6
42 0004 1B78 ldrb r3, [r3] @ zero_extendqisi2
43 .loc 1 41 4 view .LVU4
44 0006 012B cmp r3, #1
45 0008 11D0 beq .L5
42:Core/Src/AMS_HighLevel.c **** {
43:Core/Src/AMS_HighLevel.c **** /*amsov = eepromcellovervoltage>>4;
44:Core/Src/AMS_HighLevel.c **** amsuv = (eepromcellundervoltage-1)>>4;
45:Core/Src/AMS_HighLevel.c **** numberofCells = eepromnumofcells;
46:Core/Src/AMS_HighLevel.c **** numberofAux = eepromnumofaux;
47:Core/Src/AMS_HighLevel.c **** initAMS(hspi, eepromnumofcells, eepromnumofaux);*/
48:Core/Src/AMS_HighLevel.c **** amsConfigOverVoltage(amsov);
49:Core/Src/AMS_HighLevel.c **** amsConfigUnderVoltage(amsuv);
50:Core/Src/AMS_HighLevel.c **** }
51:Core/Src/AMS_HighLevel.c **** else
52:Core/Src/AMS_HighLevel.c **** {
53:Core/Src/AMS_HighLevel.c **** initAMS(hspi, numberofCells, numberofAux);
46 .loc 1 53 3 is_stmt 1 view .LVU5
47 000a 0E4B ldr r3, .L6+4
48 000c 1A78 ldrb r2, [r3] @ zero_extendqisi2
49 000e 0E4B ldr r3, .L6+8
50 0010 1978 ldrb r1, [r3] @ zero_extendqisi2
51 0012 FFF7FEFF bl initAMS
52 .LVL1:
54:Core/Src/AMS_HighLevel.c **** amsov = DEFAULT_OV;
53 .loc 1 54 3 view .LVU6
54 .loc 1 54 9 is_stmt 0 view .LVU7
55 0016 0D4B ldr r3, .L6+12
56 0018 40F64122 movw r2, #2625
57 001c 1A80 strh r2, [r3] @ movhi
55:Core/Src/AMS_HighLevel.c **** amsuv = DEFAULT_UV;
58 .loc 1 55 3 is_stmt 1 view .LVU8
59 .loc 1 55 9 is_stmt 0 view .LVU9
60 001e 0C4B ldr r3, .L6+16
ARM GAS /tmp/ccmNZWYr.s page 3
61 0020 40F21A62 movw r2, #1562
62 0024 1A80 strh r2, [r3] @ movhi
63 .L3:
56:Core/Src/AMS_HighLevel.c **** }
57:Core/Src/AMS_HighLevel.c ****
58:Core/Src/AMS_HighLevel.c ****
59:Core/Src/AMS_HighLevel.c **** currentAMSState = AMSIDLE;
64 .loc 1 59 2 is_stmt 1 view .LVU10
65 .loc 1 59 18 is_stmt 0 view .LVU11
66 0026 0B4B ldr r3, .L6+20
67 0028 0122 movs r2, #1
68 002a 1A70 strb r2, [r3]
60:Core/Src/AMS_HighLevel.c ****
61:Core/Src/AMS_HighLevel.c ****
62:Core/Src/AMS_HighLevel.c **** }
69 .loc 1 62 1 view .LVU12
70 002c 08BD pop {r3, pc}
71 .LVL2:
72 .L5:
48:Core/Src/AMS_HighLevel.c **** amsConfigUnderVoltage(amsuv);
73 .loc 1 48 3 is_stmt 1 view .LVU13
74 002e 074B ldr r3, .L6+12
75 0030 1888 ldrh r0, [r3]
76 .LVL3:
48:Core/Src/AMS_HighLevel.c **** amsConfigUnderVoltage(amsuv);
77 .loc 1 48 3 is_stmt 0 view .LVU14
78 0032 FFF7FEFF bl amsConfigOverVoltage
79 .LVL4:
49:Core/Src/AMS_HighLevel.c **** }
80 .loc 1 49 3 is_stmt 1 view .LVU15
81 0036 064B ldr r3, .L6+16
82 0038 1888 ldrh r0, [r3]
83 003a FFF7FEFF bl amsConfigUnderVoltage
84 .LVL5:
85 003e F2E7 b .L3
86 .L7:
87 .align 2
88 .L6:
89 0040 00000000 .word eepromconfigured
90 0044 00000000 .word numberofAux
91 0048 00000000 .word numberofCells
92 004c 00000000 .word amsov
93 0050 00000000 .word amsuv
94 0054 00000000 .word currentAMSState
95 .cfi_endproc
96 .LFE130:
98 .section .text.AMS_Warning_Loop,"ax",%progbits
99 .align 1
100 .global AMS_Warning_Loop
101 .syntax unified
102 .thumb
103 .thumb_func
105 AMS_Warning_Loop:
106 .LFB133:
63:Core/Src/AMS_HighLevel.c ****
64:Core/Src/AMS_HighLevel.c **** void AMS_Loop()
65:Core/Src/AMS_HighLevel.c **** {
ARM GAS /tmp/ccmNZWYr.s page 4
66:Core/Src/AMS_HighLevel.c ****
67:Core/Src/AMS_HighLevel.c **** //On Transition Functions called ones if the State Changed
68:Core/Src/AMS_HighLevel.c ****
69:Core/Src/AMS_HighLevel.c **** if(currentAMSState != lastAMSState)
70:Core/Src/AMS_HighLevel.c **** {
71:Core/Src/AMS_HighLevel.c **** switch(currentAMSState)
72:Core/Src/AMS_HighLevel.c **** {
73:Core/Src/AMS_HighLevel.c **** case AMSIDLE:
74:Core/Src/AMS_HighLevel.c **** break;
75:Core/Src/AMS_HighLevel.c **** case AMSDEACTIVE:
76:Core/Src/AMS_HighLevel.c **** break;
77:Core/Src/AMS_HighLevel.c **** case AMSCHARGING:
78:Core/Src/AMS_HighLevel.c **** break;
79:Core/Src/AMS_HighLevel.c **** case AMSIDLEBALANCING:
80:Core/Src/AMS_HighLevel.c **** break;
81:Core/Src/AMS_HighLevel.c **** case AMSDISCHARGING:
82:Core/Src/AMS_HighLevel.c **** break;
83:Core/Src/AMS_HighLevel.c **** case AMSWARNING:
84:Core/Src/AMS_HighLevel.c **** writeWarningLog(0x01);
85:Core/Src/AMS_HighLevel.c **** break;
86:Core/Src/AMS_HighLevel.c **** case AMSERROR:
87:Core/Src/AMS_HighLevel.c **** writeErrorLog(amserrorcode);
88:Core/Src/AMS_HighLevel.c **** break;
89:Core/Src/AMS_HighLevel.c **** }
90:Core/Src/AMS_HighLevel.c **** lastAMSState = currentAMSState;
91:Core/Src/AMS_HighLevel.c **** }
92:Core/Src/AMS_HighLevel.c ****
93:Core/Src/AMS_HighLevel.c **** //Main Loops for different AMS States
94:Core/Src/AMS_HighLevel.c ****
95:Core/Src/AMS_HighLevel.c **** switch(currentAMSState)
96:Core/Src/AMS_HighLevel.c **** {
97:Core/Src/AMS_HighLevel.c **** case AMSIDLE:
98:Core/Src/AMS_HighLevel.c **** AMS_Idle_Loop();
99:Core/Src/AMS_HighLevel.c **** break;
100:Core/Src/AMS_HighLevel.c **** case AMSDEACTIVE:
101:Core/Src/AMS_HighLevel.c **** break;
102:Core/Src/AMS_HighLevel.c **** case AMSCHARGING:
103:Core/Src/AMS_HighLevel.c **** break;
104:Core/Src/AMS_HighLevel.c **** case AMSIDLEBALANCING:
105:Core/Src/AMS_HighLevel.c **** AMS_Idle_Loop();
106:Core/Src/AMS_HighLevel.c **** break;
107:Core/Src/AMS_HighLevel.c **** case AMSDISCHARGING:
108:Core/Src/AMS_HighLevel.c **** break;
109:Core/Src/AMS_HighLevel.c **** case AMSWARNING:
110:Core/Src/AMS_HighLevel.c **** AMS_Warning_Loop();
111:Core/Src/AMS_HighLevel.c **** break;
112:Core/Src/AMS_HighLevel.c **** case AMSERROR:
113:Core/Src/AMS_HighLevel.c **** break;
114:Core/Src/AMS_HighLevel.c **** }
115:Core/Src/AMS_HighLevel.c **** }
116:Core/Src/AMS_HighLevel.c ****
117:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Idle_Loop()
118:Core/Src/AMS_HighLevel.c **** {
119:Core/Src/AMS_HighLevel.c **** amsWakeUp();
120:Core/Src/AMS_HighLevel.c **** amsConfigOverVoltage(amsov);
121:Core/Src/AMS_HighLevel.c **** amsConfigUnderVoltage(amsuv);
122:Core/Src/AMS_HighLevel.c **** amsConfigAuxMeasurement(0xFFFF);
ARM GAS /tmp/ccmNZWYr.s page 5
123:Core/Src/AMS_HighLevel.c **** amsClearAux();
124:Core/Src/AMS_HighLevel.c **** amsCellMeasurement(&module);
125:Core/Src/AMS_HighLevel.c **** amsInternalStatusMeasurement(&module);
126:Core/Src/AMS_HighLevel.c **** amsAuxMeasurement(&module);
127:Core/Src/AMS_HighLevel.c **** amsCheckUnderOverVoltage(&module);
128:Core/Src/AMS_HighLevel.c **** integrateCurrent();
129:Core/Src/AMS_HighLevel.c ****
130:Core/Src/AMS_HighLevel.c **** static uint32_t channelstobalance = 1;
131:Core/Src/AMS_HighLevel.c ****
132:Core/Src/AMS_HighLevel.c **** channelstobalance = 0x1FFFF;
133:Core/Src/AMS_HighLevel.c **** /* if(channelstobalance & 0x20000){
134:Core/Src/AMS_HighLevel.c **** channelstobalance = 1;
135:Core/Src/AMS_HighLevel.c **** }*/
136:Core/Src/AMS_HighLevel.c ****
137:Core/Src/AMS_HighLevel.c **** amsConfigBalancing(channelstobalance);
138:Core/Src/AMS_HighLevel.c **** amsStartBalancing(100);
139:Core/Src/AMS_HighLevel.c ****
140:Core/Src/AMS_HighLevel.c **** if((module.overVoltage | module.underVoltage))
141:Core/Src/AMS_HighLevel.c **** {
142:Core/Src/AMS_HighLevel.c **** //amsSendWarning();
143:Core/Src/AMS_HighLevel.c **** // currentAMSState = AMSWARNING;
144:Core/Src/AMS_HighLevel.c **** }
145:Core/Src/AMS_HighLevel.c ****
146:Core/Src/AMS_HighLevel.c **** // AMS_Balancing_Loop();
147:Core/Src/AMS_HighLevel.c ****
148:Core/Src/AMS_HighLevel.c **** /* if(BalancingActive)
149:Core/Src/AMS_HighLevel.c **** {
150:Core/Src/AMS_HighLevel.c **** amsStartBalancing(100);
151:Core/Src/AMS_HighLevel.c **** }
152:Core/Src/AMS_HighLevel.c **** else
153:Core/Src/AMS_HighLevel.c **** {
154:Core/Src/AMS_HighLevel.c **** amsStopBalancing();
155:Core/Src/AMS_HighLevel.c **** }*/
156:Core/Src/AMS_HighLevel.c **** //amsConfigBalancing(balancedCells);
157:Core/Src/AMS_HighLevel.c **** //volatile amscheck = amscheckOpenCellWire(&module);
158:Core/Src/AMS_HighLevel.c **** return 0;
159:Core/Src/AMS_HighLevel.c **** }
160:Core/Src/AMS_HighLevel.c ****
161:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Warning_Loop()
162:Core/Src/AMS_HighLevel.c **** {
107 .loc 1 162 1 view -0
108 .cfi_startproc
109 @ args = 0, pretend = 0, frame = 0
110 @ frame_needed = 0, uses_anonymous_args = 0
111 0000 10B5 push {r4, lr}
112 .cfi_def_cfa_offset 8
113 .cfi_offset 4, -8
114 .cfi_offset 14, -4
163:Core/Src/AMS_HighLevel.c ****
164:Core/Src/AMS_HighLevel.c **** amsWakeUp();
115 .loc 1 164 4 view .LVU17
116 0002 FFF7FEFF bl amsWakeUp
117 .LVL6:
165:Core/Src/AMS_HighLevel.c **** amsConfigOverVoltage(amsov);
118 .loc 1 165 4 view .LVU18
119 0006 144B ldr r3, .L12
120 0008 1888 ldrh r0, [r3]
ARM GAS /tmp/ccmNZWYr.s page 6
121 000a FFF7FEFF bl amsConfigOverVoltage
122 .LVL7:
166:Core/Src/AMS_HighLevel.c **** amsConfigUnderVoltage(amsuv);
123 .loc 1 166 4 view .LVU19
124 000e 134B ldr r3, .L12+4
125 0010 1888 ldrh r0, [r3]
126 0012 FFF7FEFF bl amsConfigUnderVoltage
127 .LVL8:
167:Core/Src/AMS_HighLevel.c **** amsConfigAuxMeasurement(0xFFFF);
128 .loc 1 167 4 view .LVU20
129 0016 4FF6FF70 movw r0, #65535
130 001a FFF7FEFF bl amsConfigAuxMeasurement
131 .LVL9:
168:Core/Src/AMS_HighLevel.c **** amsClearAux();
132 .loc 1 168 4 view .LVU21
133 001e FFF7FEFF bl amsClearAux
134 .LVL10:
169:Core/Src/AMS_HighLevel.c **** amsCellMeasurement(&module);
135 .loc 1 169 4 view .LVU22
136 0022 0F4C ldr r4, .L12+8
137 0024 2046 mov r0, r4
138 0026 FFF7FEFF bl amsCellMeasurement
139 .LVL11:
170:Core/Src/AMS_HighLevel.c **** amsInternalStatusMeasurement(&module);
140 .loc 1 170 4 view .LVU23
141 002a 2046 mov r0, r4
142 002c FFF7FEFF bl amsInternalStatusMeasurement
143 .LVL12:
171:Core/Src/AMS_HighLevel.c **** amsAuxMeasurement(&module);
144 .loc 1 171 4 view .LVU24
145 0030 2046 mov r0, r4
146 0032 FFF7FEFF bl amsAuxMeasurement
147 .LVL13:
172:Core/Src/AMS_HighLevel.c **** amsCheckUnderOverVoltage(&module);
148 .loc 1 172 4 view .LVU25
149 0036 2046 mov r0, r4
150 0038 FFF7FEFF bl amsCheckUnderOverVoltage
151 .LVL14:
173:Core/Src/AMS_HighLevel.c ****
174:Core/Src/AMS_HighLevel.c **** if(!(module.overVoltage | module.underVoltage))
152 .loc 1 174 4 view .LVU26
153 .loc 1 174 15 is_stmt 0 view .LVU27
154 003c A36D ldr r3, [r4, #88]
155 .loc 1 174 36 view .LVU28
156 003e E26D ldr r2, [r4, #92]
157 .loc 1 174 6 view .LVU29
158 0040 1343 orrs r3, r3, r2
159 0042 03D0 beq .L11
160 .L9:
175:Core/Src/AMS_HighLevel.c **** {
176:Core/Src/AMS_HighLevel.c **** currentAMSState = AMSIDLE;
177:Core/Src/AMS_HighLevel.c **** amsClearWarning();
178:Core/Src/AMS_HighLevel.c **** }
179:Core/Src/AMS_HighLevel.c **** amsStopBalancing();
161 .loc 1 179 4 is_stmt 1 view .LVU30
162 0044 FFF7FEFF bl amsStopBalancing
163 .LVL15:
ARM GAS /tmp/ccmNZWYr.s page 7
180:Core/Src/AMS_HighLevel.c ****
181:Core/Src/AMS_HighLevel.c **** return 0;
164 .loc 1 181 2 view .LVU31
182:Core/Src/AMS_HighLevel.c **** }
165 .loc 1 182 1 is_stmt 0 view .LVU32
166 0048 0020 movs r0, #0
167 004a 10BD pop {r4, pc}
168 .L11:
176:Core/Src/AMS_HighLevel.c **** amsClearWarning();
169 .loc 1 176 5 is_stmt 1 view .LVU33
176:Core/Src/AMS_HighLevel.c **** amsClearWarning();
170 .loc 1 176 21 is_stmt 0 view .LVU34
171 004c 054B ldr r3, .L12+12
172 004e 0122 movs r2, #1
173 0050 1A70 strb r2, [r3]
177:Core/Src/AMS_HighLevel.c **** }
174 .loc 1 177 5 is_stmt 1 view .LVU35
175 0052 FFF7FEFF bl amsClearWarning
176 .LVL16:
177 0056 F5E7 b .L9
178 .L13:
179 .align 2
180 .L12:
181 0058 00000000 .word amsov
182 005c 00000000 .word amsuv
183 0060 00000000 .word module
184 0064 00000000 .word currentAMSState
185 .cfi_endproc
186 .LFE133:
188 .section .text.AMS_Error_Loop,"ax",%progbits
189 .align 1
190 .global AMS_Error_Loop
191 .syntax unified
192 .thumb
193 .thumb_func
195 AMS_Error_Loop:
196 .LFB134:
183:Core/Src/AMS_HighLevel.c ****
184:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Error_Loop()
185:Core/Src/AMS_HighLevel.c **** {
197 .loc 1 185 1 view -0
198 .cfi_startproc
199 @ args = 0, pretend = 0, frame = 0
200 @ frame_needed = 0, uses_anonymous_args = 0
201 @ link register save eliminated.
186:Core/Src/AMS_HighLevel.c **** return 0;
202 .loc 1 186 2 view .LVU37
187:Core/Src/AMS_HighLevel.c **** }
203 .loc 1 187 1 is_stmt 0 view .LVU38
204 0000 0020 movs r0, #0
205 0002 7047 bx lr
206 .cfi_endproc
207 .LFE134:
209 .section .text.AMS_Charging_Loop,"ax",%progbits
210 .align 1
211 .global AMS_Charging_Loop
212 .syntax unified
ARM GAS /tmp/ccmNZWYr.s page 8
213 .thumb
214 .thumb_func
216 AMS_Charging_Loop:
217 .LFB135:
188:Core/Src/AMS_HighLevel.c ****
189:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Charging_Loop()
190:Core/Src/AMS_HighLevel.c **** {
218 .loc 1 190 1 is_stmt 1 view -0
219 .cfi_startproc
220 @ args = 0, pretend = 0, frame = 0
221 @ frame_needed = 0, uses_anonymous_args = 0
222 @ link register save eliminated.
191:Core/Src/AMS_HighLevel.c **** return 0;
223 .loc 1 191 2 view .LVU40
192:Core/Src/AMS_HighLevel.c **** }
224 .loc 1 192 1 is_stmt 0 view .LVU41
225 0000 0020 movs r0, #0
226 0002 7047 bx lr
227 .cfi_endproc
228 .LFE135:
230 .section .text.AMS_Discharging_Loop,"ax",%progbits
231 .align 1
232 .global AMS_Discharging_Loop
233 .syntax unified
234 .thumb
235 .thumb_func
237 AMS_Discharging_Loop:
238 .LFB136:
193:Core/Src/AMS_HighLevel.c ****
194:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Discharging_Loop()
195:Core/Src/AMS_HighLevel.c **** {
239 .loc 1 195 1 is_stmt 1 view -0
240 .cfi_startproc
241 @ args = 0, pretend = 0, frame = 0
242 @ frame_needed = 0, uses_anonymous_args = 0
243 @ link register save eliminated.
196:Core/Src/AMS_HighLevel.c **** return 0;
244 .loc 1 196 2 view .LVU43
197:Core/Src/AMS_HighLevel.c **** }
245 .loc 1 197 1 is_stmt 0 view .LVU44
246 0000 0020 movs r0, #0
247 0002 7047 bx lr
248 .cfi_endproc
249 .LFE136:
251 .section .text.AMS_Balancing_Loop,"ax",%progbits
252 .align 1
253 .global AMS_Balancing_Loop
254 .syntax unified
255 .thumb
256 .thumb_func
258 AMS_Balancing_Loop:
259 .LFB137:
198:Core/Src/AMS_HighLevel.c ****
199:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Balancing_Loop()
200:Core/Src/AMS_HighLevel.c **** {
260 .loc 1 200 1 is_stmt 1 view -0
261 .cfi_startproc
ARM GAS /tmp/ccmNZWYr.s page 9
262 @ args = 0, pretend = 0, frame = 0
263 @ frame_needed = 0, uses_anonymous_args = 0
264 0000 70B5 push {r4, r5, r6, lr}
265 .cfi_def_cfa_offset 16
266 .cfi_offset 4, -16
267 .cfi_offset 5, -12
268 .cfi_offset 6, -8
269 .cfi_offset 14, -4
201:Core/Src/AMS_HighLevel.c **** uint8_t balancingdone = 1;
270 .loc 1 201 2 view .LVU46
271 .LVL17:
202:Core/Src/AMS_HighLevel.c **** if((eepromconfigured == 1) && (internalbalancingalgo == 1) && (module.internalDieTemp<28000/*Therm
272 .loc 1 202 2 view .LVU47
273 .loc 1 202 23 is_stmt 0 view .LVU48
274 0002 3E4B ldr r3, .L42
275 0004 1B78 ldrb r3, [r3] @ zero_extendqisi2
276 .loc 1 202 4 view .LVU49
277 0006 012B cmp r3, #1
278 0008 03D1 bne .L18
279 .loc 1 202 55 discriminator 1 view .LVU50
280 000a 3D4B ldr r3, .L42+4
281 000c 1C78 ldrb r4, [r3] @ zero_extendqisi2
282 .loc 1 202 29 discriminator 1 view .LVU51
283 000e 012C cmp r4, #1
284 0010 04D0 beq .L37
285 .L18:
203:Core/Src/AMS_HighLevel.c **** {
204:Core/Src/AMS_HighLevel.c **** uint16_t highestcellvoltage = module.cellVoltages[0];
205:Core/Src/AMS_HighLevel.c **** uint16_t lowestcellvoltage = module.cellVoltages[0];
206:Core/Src/AMS_HighLevel.c **** uint8_t highestcell = 0;
207:Core/Src/AMS_HighLevel.c **** uint8_t lowestcell = 0;
208:Core/Src/AMS_HighLevel.c ****
209:Core/Src/AMS_HighLevel.c **** for(uint8_t n = 0; n < numberofCells; n++)
210:Core/Src/AMS_HighLevel.c **** {
211:Core/Src/AMS_HighLevel.c **** if(module.cellVoltages[n] > highestcellvoltage)
212:Core/Src/AMS_HighLevel.c **** {
213:Core/Src/AMS_HighLevel.c **** highestcellvoltage = module.cellVoltages[n];
214:Core/Src/AMS_HighLevel.c **** highestcell = n;
215:Core/Src/AMS_HighLevel.c **** }
216:Core/Src/AMS_HighLevel.c **** if(module.cellVoltages[n] < lowestcellvoltage)
217:Core/Src/AMS_HighLevel.c **** {
218:Core/Src/AMS_HighLevel.c **** lowestcellvoltage = module.cellVoltages[n];
219:Core/Src/AMS_HighLevel.c **** lowestcell = n;
220:Core/Src/AMS_HighLevel.c **** }
221:Core/Src/AMS_HighLevel.c **** }
222:Core/Src/AMS_HighLevel.c ****
223:Core/Src/AMS_HighLevel.c **** if(currentAMSState == AMSCHARGING) //Balancing is only Active if the BMS is in Charging Mode
224:Core/Src/AMS_HighLevel.c **** {
225:Core/Src/AMS_HighLevel.c ****
226:Core/Src/AMS_HighLevel.c **** uint32_t channelstobalance = 0;
227:Core/Src/AMS_HighLevel.c ****
228:Core/Src/AMS_HighLevel.c **** if(highestcellvoltage > startbalancingthreshold)
229:Core/Src/AMS_HighLevel.c **** {
230:Core/Src/AMS_HighLevel.c **** for(uint8_t n = 0; n < numberofCells; n++)
231:Core/Src/AMS_HighLevel.c **** {
232:Core/Src/AMS_HighLevel.c **** if(module.cellVoltages[n] > stopbalancingthreshold)
233:Core/Src/AMS_HighLevel.c **** {
ARM GAS /tmp/ccmNZWYr.s page 10
234:Core/Src/AMS_HighLevel.c **** uint16_t dv = module.cellVoltages[n]-lowestcellvoltage;
235:Core/Src/AMS_HighLevel.c **** if(dv > (balancingvoltagedelta*1000))
236:Core/Src/AMS_HighLevel.c **** {
237:Core/Src/AMS_HighLevel.c **** balancingdone = 0;
238:Core/Src/AMS_HighLevel.c **** channelstobalance |= 1<<n;
239:Core/Src/AMS_HighLevel.c **** }
240:Core/Src/AMS_HighLevel.c **** }
241:Core/Src/AMS_HighLevel.c **** }
242:Core/Src/AMS_HighLevel.c **** }
243:Core/Src/AMS_HighLevel.c ****
244:Core/Src/AMS_HighLevel.c **** amsConfigBalancing(channelstobalance);
245:Core/Src/AMS_HighLevel.c **** amsStartBalancing(100);
246:Core/Src/AMS_HighLevel.c **** }
247:Core/Src/AMS_HighLevel.c ****
248:Core/Src/AMS_HighLevel.c **** else if(currentAMSState == AMSIDLEBALANCING)
249:Core/Src/AMS_HighLevel.c **** {
250:Core/Src/AMS_HighLevel.c ****
251:Core/Src/AMS_HighLevel.c **** uint32_t channelstobalance = 0;
252:Core/Src/AMS_HighLevel.c ****
253:Core/Src/AMS_HighLevel.c **** if(lowestcellvoltage < stopbalancingthreshold) //If under Voltage of one Cell is reached
254:Core/Src/AMS_HighLevel.c **** {
255:Core/Src/AMS_HighLevel.c **** amsStopBalancing();
256:Core/Src/AMS_HighLevel.c **** balancingdone = 1;
257:Core/Src/AMS_HighLevel.c **** }
258:Core/Src/AMS_HighLevel.c **** else // otherwise continue with regular Balancing Algorithm
259:Core/Src/AMS_HighLevel.c **** {
260:Core/Src/AMS_HighLevel.c **** for(uint8_t n = 0; n < numberofCells; n++)
261:Core/Src/AMS_HighLevel.c **** {
262:Core/Src/AMS_HighLevel.c **** uint16_t dv = module.cellVoltages[n] - lowestcellvoltage;
263:Core/Src/AMS_HighLevel.c **** if(dv > balancingvoltagedelta)
264:Core/Src/AMS_HighLevel.c **** {
265:Core/Src/AMS_HighLevel.c **** balancingdone = 0;
266:Core/Src/AMS_HighLevel.c **** channelstobalance |= 1<<n;
267:Core/Src/AMS_HighLevel.c **** }
268:Core/Src/AMS_HighLevel.c **** }
269:Core/Src/AMS_HighLevel.c ****
270:Core/Src/AMS_HighLevel.c **** amsConfigBalancing(channelstobalance);
271:Core/Src/AMS_HighLevel.c **** amsStartBalancing(100);
272:Core/Src/AMS_HighLevel.c **** }
273:Core/Src/AMS_HighLevel.c ****
274:Core/Src/AMS_HighLevel.c **** }
275:Core/Src/AMS_HighLevel.c **** }
276:Core/Src/AMS_HighLevel.c **** else
277:Core/Src/AMS_HighLevel.c **** {
278:Core/Src/AMS_HighLevel.c **** amsStopBalancing();
286 .loc 1 278 3 is_stmt 1 view .LVU52
287 0012 FFF7FEFF bl amsStopBalancing
288 .LVL18:
279:Core/Src/AMS_HighLevel.c **** balancingdone = 1;
289 .loc 1 279 3 view .LVU53
290 .loc 1 279 17 is_stmt 0 view .LVU54
291 0016 0124 movs r4, #1
292 .LVL19:
293 .L28:
280:Core/Src/AMS_HighLevel.c **** }
281:Core/Src/AMS_HighLevel.c **** return balancingdone;
294 .loc 1 281 2 is_stmt 1 view .LVU55
ARM GAS /tmp/ccmNZWYr.s page 11
282:Core/Src/AMS_HighLevel.c **** }
295 .loc 1 282 1 is_stmt 0 view .LVU56
296 0018 2046 mov r0, r4
297 001a 70BD pop {r4, r5, r6, pc}
298 .LVL20:
299 .L37:
202:Core/Src/AMS_HighLevel.c **** {
300 .loc 1 202 71 discriminator 2 view .LVU57
301 001c 394B ldr r3, .L42+8
302 001e 1A8F ldrh r2, [r3, #56]
202:Core/Src/AMS_HighLevel.c **** {
303 .loc 1 202 61 discriminator 2 view .LVU58
304 0020 46F65F53 movw r3, #27999
305 0024 9A42 cmp r2, r3
306 0026 F4D8 bhi .L18
307 .LBB2:
204:Core/Src/AMS_HighLevel.c **** uint16_t lowestcellvoltage = module.cellVoltages[0];
308 .loc 1 204 3 is_stmt 1 view .LVU59
204:Core/Src/AMS_HighLevel.c **** uint16_t lowestcellvoltage = module.cellVoltages[0];
309 .loc 1 204 12 is_stmt 0 view .LVU60
310 0028 364B ldr r3, .L42+8
311 002a 1888 ldrh r0, [r3]
312 .LVL21:
205:Core/Src/AMS_HighLevel.c **** uint8_t highestcell = 0;
313 .loc 1 205 3 is_stmt 1 view .LVU61
206:Core/Src/AMS_HighLevel.c **** uint8_t lowestcell = 0;
314 .loc 1 206 3 view .LVU62
207:Core/Src/AMS_HighLevel.c ****
315 .loc 1 207 3 view .LVU63
209:Core/Src/AMS_HighLevel.c **** {
316 .loc 1 209 3 view .LVU64
317 .LBB3:
209:Core/Src/AMS_HighLevel.c **** {
318 .loc 1 209 7 view .LVU65
209:Core/Src/AMS_HighLevel.c **** {
319 .loc 1 209 7 is_stmt 0 view .LVU66
320 .LBE3:
205:Core/Src/AMS_HighLevel.c **** uint8_t highestcell = 0;
321 .loc 1 205 12 view .LVU67
322 002c 0146 mov r1, r0
323 .LBB4:
209:Core/Src/AMS_HighLevel.c **** {
324 .loc 1 209 15 view .LVU68
325 002e 0023 movs r3, #0
209:Core/Src/AMS_HighLevel.c **** {
326 .loc 1 209 3 view .LVU69
327 0030 01E0 b .L19
328 .LVL22:
329 .L21:
209:Core/Src/AMS_HighLevel.c **** {
330 .loc 1 209 42 is_stmt 1 discriminator 2 view .LVU70
331 0032 0133 adds r3, r3, #1
332 .LVL23:
209:Core/Src/AMS_HighLevel.c **** {
333 .loc 1 209 42 is_stmt 0 discriminator 2 view .LVU71
334 0034 DBB2 uxtb r3, r3
335 .LVL24:
ARM GAS /tmp/ccmNZWYr.s page 12
336 .L19:
209:Core/Src/AMS_HighLevel.c **** {
337 .loc 1 209 24 is_stmt 1 discriminator 1 view .LVU72
338 0036 344A ldr r2, .L42+12
339 0038 1278 ldrb r2, [r2] @ zero_extendqisi2
340 003a 9A42 cmp r2, r3
341 003c 09D9 bls .L38
211:Core/Src/AMS_HighLevel.c **** {
342 .loc 1 211 4 view .LVU73
211:Core/Src/AMS_HighLevel.c **** {
343 .loc 1 211 26 is_stmt 0 view .LVU74
344 003e 314A ldr r2, .L42+8
345 0040 32F81320 ldrh r2, [r2, r3, lsl #1]
211:Core/Src/AMS_HighLevel.c **** {
346 .loc 1 211 6 view .LVU75
347 0044 8242 cmp r2, r0
348 0046 00D9 bls .L20
213:Core/Src/AMS_HighLevel.c **** highestcell = n;
349 .loc 1 213 24 view .LVU76
350 0048 1046 mov r0, r2
351 .LVL25:
352 .L20:
216:Core/Src/AMS_HighLevel.c **** {
353 .loc 1 216 4 is_stmt 1 view .LVU77
216:Core/Src/AMS_HighLevel.c **** {
354 .loc 1 216 6 is_stmt 0 view .LVU78
355 004a 8A42 cmp r2, r1
356 004c F1D2 bcs .L21
218:Core/Src/AMS_HighLevel.c **** lowestcell = n;
357 .loc 1 218 23 view .LVU79
358 004e 1146 mov r1, r2
359 .LVL26:
218:Core/Src/AMS_HighLevel.c **** lowestcell = n;
360 .loc 1 218 23 view .LVU80
361 0050 EFE7 b .L21
362 .LVL27:
363 .L38:
218:Core/Src/AMS_HighLevel.c **** lowestcell = n;
364 .loc 1 218 23 view .LVU81
365 .LBE4:
223:Core/Src/AMS_HighLevel.c **** {
366 .loc 1 223 3 is_stmt 1 view .LVU82
223:Core/Src/AMS_HighLevel.c **** {
367 .loc 1 223 22 is_stmt 0 view .LVU83
368 0052 2E4B ldr r3, .L42+16
369 .LVL28:
223:Core/Src/AMS_HighLevel.c **** {
370 .loc 1 223 22 view .LVU84
371 0054 1B78 ldrb r3, [r3] @ zero_extendqisi2
223:Core/Src/AMS_HighLevel.c **** {
372 .loc 1 223 5 view .LVU85
373 0056 022B cmp r3, #2
374 0058 08D0 beq .L39
248:Core/Src/AMS_HighLevel.c **** {
375 .loc 1 248 8 is_stmt 1 view .LVU86
248:Core/Src/AMS_HighLevel.c **** {
376 .loc 1 248 10 is_stmt 0 view .LVU87
ARM GAS /tmp/ccmNZWYr.s page 13
377 005a 032B cmp r3, #3
378 005c DCD1 bne .L28
379 .LBB5:
251:Core/Src/AMS_HighLevel.c ****
380 .loc 1 251 4 is_stmt 1 view .LVU88
381 .LVL29:
253:Core/Src/AMS_HighLevel.c **** {
382 .loc 1 253 4 view .LVU89
253:Core/Src/AMS_HighLevel.c **** {
383 .loc 1 253 25 is_stmt 0 view .LVU90
384 005e 2C4B ldr r3, .L42+20
385 0060 1B88 ldrh r3, [r3]
253:Core/Src/AMS_HighLevel.c **** {
386 .loc 1 253 6 view .LVU91
387 0062 8B42 cmp r3, r1
388 0064 2DD8 bhi .L40
389 .LBB6:
260:Core/Src/AMS_HighLevel.c **** {
390 .loc 1 260 18 view .LVU92
391 0066 0023 movs r3, #0
392 .LBE6:
251:Core/Src/AMS_HighLevel.c ****
393 .loc 1 251 13 view .LVU93
394 0068 1846 mov r0, r3
395 .LVL30:
251:Core/Src/AMS_HighLevel.c ****
396 .loc 1 251 13 view .LVU94
397 006a 2FE0 b .L29
398 .LVL31:
399 .L39:
251:Core/Src/AMS_HighLevel.c ****
400 .loc 1 251 13 view .LVU95
401 .LBE5:
402 .LBB9:
226:Core/Src/AMS_HighLevel.c ****
403 .loc 1 226 4 is_stmt 1 view .LVU96
228:Core/Src/AMS_HighLevel.c **** {
404 .loc 1 228 4 view .LVU97
228:Core/Src/AMS_HighLevel.c **** {
405 .loc 1 228 26 is_stmt 0 view .LVU98
406 006c 294B ldr r3, .L42+24
407 006e 1B88 ldrh r3, [r3]
228:Core/Src/AMS_HighLevel.c **** {
408 .loc 1 228 6 view .LVU99
409 0070 8342 cmp r3, r0
410 0072 23D3 bcc .L34
226:Core/Src/AMS_HighLevel.c ****
411 .loc 1 226 13 view .LVU100
412 0074 0020 movs r0, #0
413 .LVL32:
414 .L25:
244:Core/Src/AMS_HighLevel.c **** amsStartBalancing(100);
415 .loc 1 244 4 is_stmt 1 view .LVU101
416 0076 FFF7FEFF bl amsConfigBalancing
417 .LVL33:
245:Core/Src/AMS_HighLevel.c **** }
418 .loc 1 245 4 view .LVU102
ARM GAS /tmp/ccmNZWYr.s page 14
419 007a 6420 movs r0, #100
420 007c FFF7FEFF bl amsStartBalancing
421 .LVL34:
422 .LBE9:
423 0080 CAE7 b .L28
424 .LVL35:
425 .L26:
426 .LBB12:
427 .LBB10:
230:Core/Src/AMS_HighLevel.c **** {
428 .loc 1 230 44 discriminator 2 view .LVU103
429 0082 0133 adds r3, r3, #1
430 .LVL36:
230:Core/Src/AMS_HighLevel.c **** {
431 .loc 1 230 44 is_stmt 0 discriminator 2 view .LVU104
432 0084 DBB2 uxtb r3, r3
433 .LVL37:
434 .L24:
230:Core/Src/AMS_HighLevel.c **** {
435 .loc 1 230 26 is_stmt 1 discriminator 1 view .LVU105
436 0086 9A42 cmp r2, r3
437 0088 F5D9 bls .L25
232:Core/Src/AMS_HighLevel.c **** {
438 .loc 1 232 6 view .LVU106
232:Core/Src/AMS_HighLevel.c **** {
439 .loc 1 232 28 is_stmt 0 view .LVU107
440 008a 1E4D ldr r5, .L42+8
441 008c 35F813C0 ldrh ip, [r5, r3, lsl #1]
232:Core/Src/AMS_HighLevel.c **** {
442 .loc 1 232 32 view .LVU108
443 0090 1F4D ldr r5, .L42+20
444 0092 B5F800E0 ldrh lr, [r5]
232:Core/Src/AMS_HighLevel.c **** {
445 .loc 1 232 8 view .LVU109
446 0096 F445 cmp ip, lr
447 0098 F3D9 bls .L26
448 .LBB11:
234:Core/Src/AMS_HighLevel.c **** if(dv > (balancingvoltagedelta*1000))
449 .loc 1 234 7 is_stmt 1 view .LVU110
234:Core/Src/AMS_HighLevel.c **** if(dv > (balancingvoltagedelta*1000))
450 .loc 1 234 16 is_stmt 0 view .LVU111
451 009a ACEB010C sub ip, ip, r1
452 009e 1FFA8CFC uxth ip, ip
453 .LVL38:
235:Core/Src/AMS_HighLevel.c **** {
454 .loc 1 235 7 is_stmt 1 view .LVU112
235:Core/Src/AMS_HighLevel.c **** {
455 .loc 1 235 37 is_stmt 0 view .LVU113
456 00a2 1D4D ldr r5, .L42+28
457 00a4 2D88 ldrh r5, [r5]
458 00a6 4FF47A7E mov lr, #1000
459 00aa 0EFB05F5 mul r5, lr, r5
235:Core/Src/AMS_HighLevel.c **** {
460 .loc 1 235 9 view .LVU114
461 00ae AC45 cmp ip, r5
462 00b0 E7DD ble .L26
237:Core/Src/AMS_HighLevel.c **** channelstobalance |= 1<<n;
ARM GAS /tmp/ccmNZWYr.s page 15
463 .loc 1 237 8 is_stmt 1 view .LVU115
464 .LVL39:
238:Core/Src/AMS_HighLevel.c **** }
465 .loc 1 238 8 view .LVU116
238:Core/Src/AMS_HighLevel.c **** }
466 .loc 1 238 30 is_stmt 0 view .LVU117
467 00b2 0124 movs r4, #1
468 00b4 9C40 lsls r4, r4, r3
238:Core/Src/AMS_HighLevel.c **** }
469 .loc 1 238 26 view .LVU118
470 00b6 2043 orrs r0, r0, r4
471 .LVL40:
237:Core/Src/AMS_HighLevel.c **** channelstobalance |= 1<<n;
472 .loc 1 237 22 view .LVU119
473 00b8 0024 movs r4, #0
474 00ba E2E7 b .L26
475 .LVL41:
476 .L34:
237:Core/Src/AMS_HighLevel.c **** channelstobalance |= 1<<n;
477 .loc 1 237 22 view .LVU120
478 .LBE11:
230:Core/Src/AMS_HighLevel.c **** {
479 .loc 1 230 17 view .LVU121
480 00bc 0023 movs r3, #0
481 .LBE10:
226:Core/Src/AMS_HighLevel.c ****
482 .loc 1 226 13 view .LVU122
483 00be 1846 mov r0, r3
484 .LVL42:
226:Core/Src/AMS_HighLevel.c ****
485 .loc 1 226 13 view .LVU123
486 00c0 E1E7 b .L24
487 .LVL43:
488 .L40:
226:Core/Src/AMS_HighLevel.c ****
489 .loc 1 226 13 view .LVU124
490 .LBE12:
491 .LBB13:
255:Core/Src/AMS_HighLevel.c **** balancingdone = 1;
492 .loc 1 255 5 is_stmt 1 view .LVU125
493 00c2 FFF7FEFF bl amsStopBalancing
494 .LVL44:
256:Core/Src/AMS_HighLevel.c **** }
495 .loc 1 256 5 view .LVU126
256:Core/Src/AMS_HighLevel.c **** }
496 .loc 1 256 5 is_stmt 0 view .LVU127
497 00c6 A7E7 b .L28
498 .LVL45:
499 .L30:
500 .LBB8:
260:Core/Src/AMS_HighLevel.c **** {
501 .loc 1 260 45 is_stmt 1 discriminator 2 view .LVU128
502 00c8 0133 adds r3, r3, #1
503 .LVL46:
260:Core/Src/AMS_HighLevel.c **** {
504 .loc 1 260 45 is_stmt 0 discriminator 2 view .LVU129
505 00ca DBB2 uxtb r3, r3
ARM GAS /tmp/ccmNZWYr.s page 16
506 .LVL47:
507 .L29:
260:Core/Src/AMS_HighLevel.c **** {
508 .loc 1 260 27 is_stmt 1 discriminator 1 view .LVU130
509 00cc 9A42 cmp r2, r3
510 00ce 0FD9 bls .L41
511 .LBB7:
262:Core/Src/AMS_HighLevel.c **** if(dv > balancingvoltagedelta)
512 .loc 1 262 7 view .LVU131
262:Core/Src/AMS_HighLevel.c **** if(dv > balancingvoltagedelta)
513 .loc 1 262 40 is_stmt 0 view .LVU132
514 00d0 0C4D ldr r5, .L42+8
515 00d2 35F813C0 ldrh ip, [r5, r3, lsl #1]
262:Core/Src/AMS_HighLevel.c **** if(dv > balancingvoltagedelta)
516 .loc 1 262 16 view .LVU133
517 00d6 ACEB010C sub ip, ip, r1
518 00da 1FFA8CFC uxth ip, ip
519 .LVL48:
263:Core/Src/AMS_HighLevel.c **** {
520 .loc 1 263 7 is_stmt 1 view .LVU134
263:Core/Src/AMS_HighLevel.c **** {
521 .loc 1 263 13 is_stmt 0 view .LVU135
522 00de 0E4D ldr r5, .L42+28
523 00e0 2D88 ldrh r5, [r5]
263:Core/Src/AMS_HighLevel.c **** {
524 .loc 1 263 9 view .LVU136
525 00e2 6545 cmp r5, ip
526 00e4 F0D2 bcs .L30
265:Core/Src/AMS_HighLevel.c **** channelstobalance |= 1<<n;
527 .loc 1 265 8 is_stmt 1 view .LVU137
528 .LVL49:
266:Core/Src/AMS_HighLevel.c **** }
529 .loc 1 266 8 view .LVU138
266:Core/Src/AMS_HighLevel.c **** }
530 .loc 1 266 30 is_stmt 0 view .LVU139
531 00e6 0124 movs r4, #1
532 00e8 9C40 lsls r4, r4, r3
266:Core/Src/AMS_HighLevel.c **** }
533 .loc 1 266 26 view .LVU140
534 00ea 2043 orrs r0, r0, r4
535 .LVL50:
265:Core/Src/AMS_HighLevel.c **** channelstobalance |= 1<<n;
536 .loc 1 265 22 view .LVU141
537 00ec 0024 movs r4, #0
538 00ee EBE7 b .L30
539 .LVL51:
540 .L41:
265:Core/Src/AMS_HighLevel.c **** channelstobalance |= 1<<n;
541 .loc 1 265 22 view .LVU142
542 .LBE7:
543 .LBE8:
270:Core/Src/AMS_HighLevel.c **** amsStartBalancing(100);
544 .loc 1 270 6 is_stmt 1 view .LVU143
545 00f0 FFF7FEFF bl amsConfigBalancing
546 .LVL52:
271:Core/Src/AMS_HighLevel.c **** }
547 .loc 1 271 6 view .LVU144
ARM GAS /tmp/ccmNZWYr.s page 17
548 00f4 6420 movs r0, #100
549 00f6 FFF7FEFF bl amsStartBalancing
550 .LVL53:
551 00fa 8DE7 b .L28
552 .L43:
553 .align 2
554 .L42:
555 00fc 00000000 .word eepromconfigured
556 0100 00000000 .word internalbalancingalgo
557 0104 00000000 .word module
558 0108 00000000 .word numberofCells
559 010c 00000000 .word currentAMSState
560 0110 00000000 .word stopbalancingthreshold
561 0114 00000000 .word startbalancingthreshold
562 0118 00000000 .word balancingvoltagedelta
563 .LBE13:
564 .LBE2:
565 .cfi_endproc
566 .LFE137:
568 .section .text.writeWarningLog,"ax",%progbits
569 .align 1
570 .global writeWarningLog
571 .syntax unified
572 .thumb
573 .thumb_func
575 writeWarningLog:
576 .LVL54:
577 .LFB138:
283:Core/Src/AMS_HighLevel.c ****
284:Core/Src/AMS_HighLevel.c **** uint8_t writeWarningLog(uint8_t warningCode)
285:Core/Src/AMS_HighLevel.c **** {
578 .loc 1 285 1 view -0
579 .cfi_startproc
580 @ args = 0, pretend = 0, frame = 0
581 @ frame_needed = 0, uses_anonymous_args = 0
582 @ link register save eliminated.
286:Core/Src/AMS_HighLevel.c **** //eepromWriteWarningLog(warningCode);
287:Core/Src/AMS_HighLevel.c **** return 0;
583 .loc 1 287 2 view .LVU146
288:Core/Src/AMS_HighLevel.c **** }
584 .loc 1 288 1 is_stmt 0 view .LVU147
585 0000 0020 movs r0, #0
586 .LVL55:
587 .loc 1 288 1 view .LVU148
588 0002 7047 bx lr
589 .cfi_endproc
590 .LFE138:
592 .section .text.writeErrorLog,"ax",%progbits
593 .align 1
594 .global writeErrorLog
595 .syntax unified
596 .thumb
597 .thumb_func
599 writeErrorLog:
600 .LVL56:
601 .LFB139:
289:Core/Src/AMS_HighLevel.c **** uint8_t writeErrorLog(uint8_t errorCode)
ARM GAS /tmp/ccmNZWYr.s page 18
290:Core/Src/AMS_HighLevel.c **** {
602 .loc 1 290 1 is_stmt 1 view -0
603 .cfi_startproc
604 @ args = 0, pretend = 0, frame = 0
605 @ frame_needed = 0, uses_anonymous_args = 0
606 @ link register save eliminated.
291:Core/Src/AMS_HighLevel.c **** //eepromWriteErrorLog(errorCode);
292:Core/Src/AMS_HighLevel.c **** return 0;
607 .loc 1 292 2 view .LVU150
293:Core/Src/AMS_HighLevel.c **** }
608 .loc 1 293 1 is_stmt 0 view .LVU151
609 0000 0020 movs r0, #0
610 .LVL57:
611 .loc 1 293 1 view .LVU152
612 0002 7047 bx lr
613 .cfi_endproc
614 .LFE139:
616 .section .text.integrateCurrent,"ax",%progbits
617 .align 1
618 .global integrateCurrent
619 .syntax unified
620 .thumb
621 .thumb_func
623 integrateCurrent:
624 .LFB140:
294:Core/Src/AMS_HighLevel.c ****
295:Core/Src/AMS_HighLevel.c **** uint8_t integrateCurrent()
296:Core/Src/AMS_HighLevel.c **** {
625 .loc 1 296 1 is_stmt 1 view -0
626 .cfi_startproc
627 @ args = 0, pretend = 0, frame = 0
628 @ frame_needed = 0, uses_anonymous_args = 0
629 0000 38B5 push {r3, r4, r5, lr}
630 .cfi_def_cfa_offset 16
631 .cfi_offset 3, -16
632 .cfi_offset 4, -12
633 .cfi_offset 5, -8
634 .cfi_offset 14, -4
297:Core/Src/AMS_HighLevel.c **** lastticks = currenttick;
635 .loc 1 297 2 view .LVU154
636 .loc 1 297 12 is_stmt 0 view .LVU155
637 0002 0D4C ldr r4, .L49
638 0004 0D4D ldr r5, .L49+4
639 0006 2B68 ldr r3, [r5]
640 0008 2360 str r3, [r4]
298:Core/Src/AMS_HighLevel.c **** currenttick = HAL_GetTick();
641 .loc 1 298 2 is_stmt 1 view .LVU156
642 .loc 1 298 16 is_stmt 0 view .LVU157
643 000a FFF7FEFF bl HAL_GetTick
644 .LVL58:
645 .loc 1 298 14 view .LVU158
646 000e 2860 str r0, [r5]
299:Core/Src/AMS_HighLevel.c **** if(currenttick < lastticks)
647 .loc 1 299 2 is_stmt 1 view .LVU159
648 .loc 1 299 17 is_stmt 0 view .LVU160
649 0010 2268 ldr r2, [r4]
650 .loc 1 299 4 view .LVU161
ARM GAS /tmp/ccmNZWYr.s page 19
651 0012 9042 cmp r0, r2
652 0014 0ED2 bcs .L47
300:Core/Src/AMS_HighLevel.c **** {
301:Core/Src/AMS_HighLevel.c **** currentintegrator += (module.auxVoltages[0] - module.auxVoltages[2])*(currenttick-lastticks);
653 .loc 1 301 3 is_stmt 1 view .LVU162
654 .loc 1 301 43 is_stmt 0 view .LVU163
655 0016 0A49 ldr r1, .L49+8
656 0018 8B8C ldrh r3, [r1, #36]
657 .loc 1 301 67 view .LVU164
658 001a 098D ldrh r1, [r1, #40]
659 .loc 1 301 47 view .LVU165
660 001c 5B1A subs r3, r3, r1
661 .loc 1 301 84 view .LVU166
662 001e 801A subs r0, r0, r2
663 .loc 1 301 71 view .LVU167
664 0020 00FB03F3 mul r3, r0, r3
665 .loc 1 301 21 view .LVU168
666 0024 0749 ldr r1, .L49+12
667 0026 0A68 ldr r2, [r1]
668 0028 4868 ldr r0, [r1, #4]
669 002a D218 adds r2, r2, r3
670 002c 40F10000 adc r0, r0, #0
671 0030 0A60 str r2, [r1]
672 0032 4860 str r0, [r1, #4]
673 .L47:
302:Core/Src/AMS_HighLevel.c **** }
303:Core/Src/AMS_HighLevel.c **** return 0;
674 .loc 1 303 2 is_stmt 1 view .LVU169
304:Core/Src/AMS_HighLevel.c **** }
675 .loc 1 304 1 is_stmt 0 view .LVU170
676 0034 0020 movs r0, #0
677 0036 38BD pop {r3, r4, r5, pc}
678 .L50:
679 .align 2
680 .L49:
681 0038 00000000 .word lastticks
682 003c 00000000 .word currenttick
683 0040 00000000 .word module
684 0044 00000000 .word currentintegrator
685 .cfi_endproc
686 .LFE140:
688 .section .text.AMS_Idle_Loop,"ax",%progbits
689 .align 1
690 .global AMS_Idle_Loop
691 .syntax unified
692 .thumb
693 .thumb_func
695 AMS_Idle_Loop:
696 .LFB132:
118:Core/Src/AMS_HighLevel.c **** amsWakeUp();
697 .loc 1 118 1 is_stmt 1 view -0
698 .cfi_startproc
699 @ args = 0, pretend = 0, frame = 0
700 @ frame_needed = 0, uses_anonymous_args = 0
701 0000 10B5 push {r4, lr}
702 .cfi_def_cfa_offset 8
703 .cfi_offset 4, -8
ARM GAS /tmp/ccmNZWYr.s page 20
704 .cfi_offset 14, -4
119:Core/Src/AMS_HighLevel.c **** amsConfigOverVoltage(amsov);
705 .loc 1 119 4 view .LVU172
706 0002 FFF7FEFF bl amsWakeUp
707 .LVL59:
120:Core/Src/AMS_HighLevel.c **** amsConfigUnderVoltage(amsuv);
708 .loc 1 120 4 view .LVU173
709 0006 134B ldr r3, .L53
710 0008 1888 ldrh r0, [r3]
711 000a FFF7FEFF bl amsConfigOverVoltage
712 .LVL60:
121:Core/Src/AMS_HighLevel.c **** amsConfigAuxMeasurement(0xFFFF);
713 .loc 1 121 4 view .LVU174
714 000e 124B ldr r3, .L53+4
715 0010 1888 ldrh r0, [r3]
716 0012 FFF7FEFF bl amsConfigUnderVoltage
717 .LVL61:
122:Core/Src/AMS_HighLevel.c **** amsClearAux();
718 .loc 1 122 4 view .LVU175
719 0016 4FF6FF70 movw r0, #65535
720 001a FFF7FEFF bl amsConfigAuxMeasurement
721 .LVL62:
123:Core/Src/AMS_HighLevel.c **** amsCellMeasurement(&module);
722 .loc 1 123 4 view .LVU176
723 001e FFF7FEFF bl amsClearAux
724 .LVL63:
124:Core/Src/AMS_HighLevel.c **** amsInternalStatusMeasurement(&module);
725 .loc 1 124 4 view .LVU177
726 0022 0E4C ldr r4, .L53+8
727 0024 2046 mov r0, r4
728 0026 FFF7FEFF bl amsCellMeasurement
729 .LVL64:
125:Core/Src/AMS_HighLevel.c **** amsAuxMeasurement(&module);
730 .loc 1 125 4 view .LVU178
731 002a 2046 mov r0, r4
732 002c FFF7FEFF bl amsInternalStatusMeasurement
733 .LVL65:
126:Core/Src/AMS_HighLevel.c **** amsCheckUnderOverVoltage(&module);
734 .loc 1 126 4 view .LVU179
735 0030 2046 mov r0, r4
736 0032 FFF7FEFF bl amsAuxMeasurement
737 .LVL66:
127:Core/Src/AMS_HighLevel.c **** integrateCurrent();
738 .loc 1 127 4 view .LVU180
739 0036 2046 mov r0, r4
740 0038 FFF7FEFF bl amsCheckUnderOverVoltage
741 .LVL67:
128:Core/Src/AMS_HighLevel.c ****
742 .loc 1 128 4 view .LVU181
743 003c FFF7FEFF bl integrateCurrent
744 .LVL68:
130:Core/Src/AMS_HighLevel.c ****
745 .loc 1 130 4 view .LVU182
132:Core/Src/AMS_HighLevel.c **** /* if(channelstobalance & 0x20000){
746 .loc 1 132 4 view .LVU183
132:Core/Src/AMS_HighLevel.c **** /* if(channelstobalance & 0x20000){
747 .loc 1 132 22 is_stmt 0 view .LVU184
ARM GAS /tmp/ccmNZWYr.s page 21
748 0040 0748 ldr r0, .L53+12
749 0042 084B ldr r3, .L53+16
750 0044 1860 str r0, [r3]
137:Core/Src/AMS_HighLevel.c **** amsStartBalancing(100);
751 .loc 1 137 4 is_stmt 1 view .LVU185
752 0046 FFF7FEFF bl amsConfigBalancing
753 .LVL69:
138:Core/Src/AMS_HighLevel.c ****
754 .loc 1 138 4 view .LVU186
755 004a 6420 movs r0, #100
756 004c FFF7FEFF bl amsStartBalancing
757 .LVL70:
140:Core/Src/AMS_HighLevel.c **** {
758 .loc 1 140 4 view .LVU187
144:Core/Src/AMS_HighLevel.c ****
759 .loc 1 144 4 view .LVU188
158:Core/Src/AMS_HighLevel.c **** }
760 .loc 1 158 4 view .LVU189
159:Core/Src/AMS_HighLevel.c ****
761 .loc 1 159 1 is_stmt 0 view .LVU190
762 0050 0020 movs r0, #0
763 0052 10BD pop {r4, pc}
764 .L54:
765 .align 2
766 .L53:
767 0054 00000000 .word amsov
768 0058 00000000 .word amsuv
769 005c 00000000 .word module
770 0060 FFFF0100 .word 131071
771 0064 00000000 .word channelstobalance.0
772 .cfi_endproc
773 .LFE132:
775 .section .text.AMS_Loop,"ax",%progbits
776 .align 1
777 .global AMS_Loop
778 .syntax unified
779 .thumb
780 .thumb_func
782 AMS_Loop:
783 .LFB131:
65:Core/Src/AMS_HighLevel.c ****
784 .loc 1 65 1 is_stmt 1 view -0
785 .cfi_startproc
786 @ args = 0, pretend = 0, frame = 0
787 @ frame_needed = 0, uses_anonymous_args = 0
788 0000 08B5 push {r3, lr}
789 .cfi_def_cfa_offset 8
790 .cfi_offset 3, -8
791 .cfi_offset 14, -4
69:Core/Src/AMS_HighLevel.c **** {
792 .loc 1 69 2 view .LVU192
69:Core/Src/AMS_HighLevel.c **** {
793 .loc 1 69 21 is_stmt 0 view .LVU193
794 0002 0C4B ldr r3, .L62
795 0004 1B78 ldrb r3, [r3] @ zero_extendqisi2
796 0006 0C4A ldr r2, .L62+4
797 0008 1278 ldrb r2, [r2] @ zero_extendqisi2
ARM GAS /tmp/ccmNZWYr.s page 22
69:Core/Src/AMS_HighLevel.c **** {
798 .loc 1 69 4 view .LVU194
799 000a 9342 cmp r3, r2
800 000c 01D0 beq .L56
71:Core/Src/AMS_HighLevel.c **** {
801 .loc 1 71 3 is_stmt 1 view .LVU195
90:Core/Src/AMS_HighLevel.c **** }
802 .loc 1 90 3 view .LVU196
90:Core/Src/AMS_HighLevel.c **** }
803 .loc 1 90 16 is_stmt 0 view .LVU197
804 000e 0A4A ldr r2, .L62+4
805 0010 1370 strb r3, [r2]
806 .L56:
95:Core/Src/AMS_HighLevel.c **** {
807 .loc 1 95 2 is_stmt 1 view .LVU198
808 0012 032B cmp r3, #3
809 0014 07D0 beq .L57
810 0016 052B cmp r3, #5
811 0018 08D0 beq .L58
812 001a 012B cmp r3, #1
813 001c 00D0 beq .L61
814 .L55:
115:Core/Src/AMS_HighLevel.c ****
815 .loc 1 115 1 is_stmt 0 view .LVU199
816 001e 08BD pop {r3, pc}
817 .L61:
98:Core/Src/AMS_HighLevel.c **** break;
818 .loc 1 98 3 is_stmt 1 view .LVU200
819 0020 FFF7FEFF bl AMS_Idle_Loop
820 .LVL71:
99:Core/Src/AMS_HighLevel.c **** case AMSDEACTIVE:
821 .loc 1 99 2 view .LVU201
822 0024 FBE7 b .L55
823 .L57:
105:Core/Src/AMS_HighLevel.c **** break;
824 .loc 1 105 3 view .LVU202
825 0026 FFF7FEFF bl AMS_Idle_Loop
826 .LVL72:
106:Core/Src/AMS_HighLevel.c **** case AMSDISCHARGING:
827 .loc 1 106 2 view .LVU203
828 002a F8E7 b .L55
829 .L58:
110:Core/Src/AMS_HighLevel.c **** break;
830 .loc 1 110 3 view .LVU204
831 002c FFF7FEFF bl AMS_Warning_Loop
832 .LVL73:
111:Core/Src/AMS_HighLevel.c **** case AMSERROR:
833 .loc 1 111 2 view .LVU205
115:Core/Src/AMS_HighLevel.c ****
834 .loc 1 115 1 is_stmt 0 view .LVU206
835 0030 F5E7 b .L55
836 .L63:
837 0032 00BF .align 2
838 .L62:
839 0034 00000000 .word currentAMSState
840 0038 00000000 .word lastAMSState
841 .cfi_endproc
ARM GAS /tmp/ccmNZWYr.s page 23
842 .LFE131:
844 .section .bss.channelstobalance.0,"aw",%nobits
845 .align 2
848 channelstobalance.0:
849 0000 00000000 .space 4
850 .global lastAMSState
851 .section .bss.lastAMSState,"aw",%nobits
854 lastAMSState:
855 0000 00 .space 1
856 .global currentAMSState
857 .section .bss.currentAMSState,"aw",%nobits
860 currentAMSState:
861 0000 00 .space 1
862 .global numberofAux
863 .section .bss.numberofAux,"aw",%nobits
866 numberofAux:
867 0000 00 .space 1
868 .global numberofCells
869 .section .data.numberofCells,"aw"
872 numberofCells:
873 0000 11 .byte 17
874 .global amswarningcode
875 .section .bss.amswarningcode,"aw",%nobits
878 amswarningcode:
879 0000 00 .space 1
880 .global amserrorcode
881 .section .bss.amserrorcode,"aw",%nobits
884 amserrorcode:
885 0000 00 .space 1
886 .global amsov
887 .section .bss.amsov,"aw",%nobits
888 .align 1
891 amsov:
892 0000 0000 .space 2
893 .global amsuv
894 .section .bss.amsuv,"aw",%nobits
895 .align 1
898 amsuv:
899 0000 0000 .space 2
900 .global balancingvoltagedelta
901 .section .data.balancingvoltagedelta,"aw"
902 .align 1
905 balancingvoltagedelta:
906 0000 0A00 .short 10
907 .global stopbalancingthreshold
908 .section .data.stopbalancingthreshold,"aw"
909 .align 1
912 stopbalancingthreshold:
913 0000 3075 .short 30000
914 .global startbalancingthreshold
915 .section .data.startbalancingthreshold,"aw"
916 .align 1
919 startbalancingthreshold:
920 0000 28A0 .short -24536
921 .global internalbalancingalgo
922 .section .data.internalbalancingalgo,"aw"
925 internalbalancingalgo:
ARM GAS /tmp/ccmNZWYr.s page 24
926 0000 01 .byte 1
927 .global eepromconfigured
928 .section .bss.eepromconfigured,"aw",%nobits
931 eepromconfigured:
932 0000 00 .space 1
933 .global currenttick
934 .section .bss.currenttick,"aw",%nobits
935 .align 2
938 currenttick:
939 0000 00000000 .space 4
940 .global lastticks
941 .section .bss.lastticks,"aw",%nobits
942 .align 2
945 lastticks:
946 0000 00000000 .space 4
947 .global currentintegrator
948 .section .bss.currentintegrator,"aw",%nobits
949 .align 3
952 currentintegrator:
953 0000 00000000 .space 8
953 00000000
954 .global stateofcharge
955 .section .data.stateofcharge,"aw"
958 stateofcharge:
959 0000 64 .byte 100
960 .global BalancingActive
961 .section .bss.BalancingActive,"aw",%nobits
964 BalancingActive:
965 0000 00 .space 1
966 .global balancedCells
967 .section .bss.balancedCells,"aw",%nobits
968 .align 2
971 balancedCells:
972 0000 00000000 .space 4
973 .global module
974 .section .bss.module,"aw",%nobits
975 .align 2
978 module:
979 0000 00000000 .space 96
979 00000000
979 00000000
979 00000000
979 00000000
980 .text
981 .Letext0:
982 .file 2 "/home/david/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-non
983 .file 3 "/home/david/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-non
984 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
985 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
986 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
987 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
988 .file 8 "Core/Inc/ADBMS_LL_Driver.h"
989 .file 9 "Core/Inc/ADBMS_Abstraction.h"
990 .file 10 "Core/Inc/AMS_HighLevel.h"
991 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
ARM GAS /tmp/ccmNZWYr.s page 25
DEFINED SYMBOLS
*ABS*:0000000000000000 AMS_HighLevel.c
/tmp/ccmNZWYr.s:21 .text.AMS_Init:0000000000000000 $t
/tmp/ccmNZWYr.s:27 .text.AMS_Init:0000000000000000 AMS_Init
/tmp/ccmNZWYr.s:89 .text.AMS_Init:0000000000000040 $d
/tmp/ccmNZWYr.s:931 .bss.eepromconfigured:0000000000000000 eepromconfigured
/tmp/ccmNZWYr.s:866 .bss.numberofAux:0000000000000000 numberofAux
/tmp/ccmNZWYr.s:872 .data.numberofCells:0000000000000000 numberofCells
/tmp/ccmNZWYr.s:891 .bss.amsov:0000000000000000 amsov
/tmp/ccmNZWYr.s:898 .bss.amsuv:0000000000000000 amsuv
/tmp/ccmNZWYr.s:860 .bss.currentAMSState:0000000000000000 currentAMSState
/tmp/ccmNZWYr.s:99 .text.AMS_Warning_Loop:0000000000000000 $t
/tmp/ccmNZWYr.s:105 .text.AMS_Warning_Loop:0000000000000000 AMS_Warning_Loop
/tmp/ccmNZWYr.s:181 .text.AMS_Warning_Loop:0000000000000058 $d
/tmp/ccmNZWYr.s:978 .bss.module:0000000000000000 module
/tmp/ccmNZWYr.s:189 .text.AMS_Error_Loop:0000000000000000 $t
/tmp/ccmNZWYr.s:195 .text.AMS_Error_Loop:0000000000000000 AMS_Error_Loop
/tmp/ccmNZWYr.s:210 .text.AMS_Charging_Loop:0000000000000000 $t
/tmp/ccmNZWYr.s:216 .text.AMS_Charging_Loop:0000000000000000 AMS_Charging_Loop
/tmp/ccmNZWYr.s:231 .text.AMS_Discharging_Loop:0000000000000000 $t
/tmp/ccmNZWYr.s:237 .text.AMS_Discharging_Loop:0000000000000000 AMS_Discharging_Loop
/tmp/ccmNZWYr.s:252 .text.AMS_Balancing_Loop:0000000000000000 $t
/tmp/ccmNZWYr.s:258 .text.AMS_Balancing_Loop:0000000000000000 AMS_Balancing_Loop
/tmp/ccmNZWYr.s:555 .text.AMS_Balancing_Loop:00000000000000fc $d
/tmp/ccmNZWYr.s:925 .data.internalbalancingalgo:0000000000000000 internalbalancingalgo
/tmp/ccmNZWYr.s:912 .data.stopbalancingthreshold:0000000000000000 stopbalancingthreshold
/tmp/ccmNZWYr.s:919 .data.startbalancingthreshold:0000000000000000 startbalancingthreshold
/tmp/ccmNZWYr.s:905 .data.balancingvoltagedelta:0000000000000000 balancingvoltagedelta
/tmp/ccmNZWYr.s:569 .text.writeWarningLog:0000000000000000 $t
/tmp/ccmNZWYr.s:575 .text.writeWarningLog:0000000000000000 writeWarningLog
/tmp/ccmNZWYr.s:593 .text.writeErrorLog:0000000000000000 $t
/tmp/ccmNZWYr.s:599 .text.writeErrorLog:0000000000000000 writeErrorLog
/tmp/ccmNZWYr.s:617 .text.integrateCurrent:0000000000000000 $t
/tmp/ccmNZWYr.s:623 .text.integrateCurrent:0000000000000000 integrateCurrent
/tmp/ccmNZWYr.s:681 .text.integrateCurrent:0000000000000038 $d
/tmp/ccmNZWYr.s:945 .bss.lastticks:0000000000000000 lastticks
/tmp/ccmNZWYr.s:938 .bss.currenttick:0000000000000000 currenttick
/tmp/ccmNZWYr.s:952 .bss.currentintegrator:0000000000000000 currentintegrator
/tmp/ccmNZWYr.s:689 .text.AMS_Idle_Loop:0000000000000000 $t
/tmp/ccmNZWYr.s:695 .text.AMS_Idle_Loop:0000000000000000 AMS_Idle_Loop
/tmp/ccmNZWYr.s:767 .text.AMS_Idle_Loop:0000000000000054 $d
/tmp/ccmNZWYr.s:848 .bss.channelstobalance.0:0000000000000000 channelstobalance.0
/tmp/ccmNZWYr.s:776 .text.AMS_Loop:0000000000000000 $t
/tmp/ccmNZWYr.s:782 .text.AMS_Loop:0000000000000000 AMS_Loop
/tmp/ccmNZWYr.s:839 .text.AMS_Loop:0000000000000034 $d
/tmp/ccmNZWYr.s:854 .bss.lastAMSState:0000000000000000 lastAMSState
/tmp/ccmNZWYr.s:845 .bss.channelstobalance.0:0000000000000000 $d
/tmp/ccmNZWYr.s:855 .bss.lastAMSState:0000000000000000 $d
/tmp/ccmNZWYr.s:861 .bss.currentAMSState:0000000000000000 $d
/tmp/ccmNZWYr.s:867 .bss.numberofAux:0000000000000000 $d
/tmp/ccmNZWYr.s:878 .bss.amswarningcode:0000000000000000 amswarningcode
/tmp/ccmNZWYr.s:879 .bss.amswarningcode:0000000000000000 $d
/tmp/ccmNZWYr.s:884 .bss.amserrorcode:0000000000000000 amserrorcode
/tmp/ccmNZWYr.s:885 .bss.amserrorcode:0000000000000000 $d
/tmp/ccmNZWYr.s:888 .bss.amsov:0000000000000000 $d
/tmp/ccmNZWYr.s:895 .bss.amsuv:0000000000000000 $d
/tmp/ccmNZWYr.s:902 .data.balancingvoltagedelta:0000000000000000 $d
ARM GAS /tmp/ccmNZWYr.s page 26
/tmp/ccmNZWYr.s:909 .data.stopbalancingthreshold:0000000000000000 $d
/tmp/ccmNZWYr.s:916 .data.startbalancingthreshold:0000000000000000 $d
/tmp/ccmNZWYr.s:932 .bss.eepromconfigured:0000000000000000 $d
/tmp/ccmNZWYr.s:935 .bss.currenttick:0000000000000000 $d
/tmp/ccmNZWYr.s:942 .bss.lastticks:0000000000000000 $d
/tmp/ccmNZWYr.s:949 .bss.currentintegrator:0000000000000000 $d
/tmp/ccmNZWYr.s:958 .data.stateofcharge:0000000000000000 stateofcharge
/tmp/ccmNZWYr.s:964 .bss.BalancingActive:0000000000000000 BalancingActive
/tmp/ccmNZWYr.s:965 .bss.BalancingActive:0000000000000000 $d
/tmp/ccmNZWYr.s:971 .bss.balancedCells:0000000000000000 balancedCells
/tmp/ccmNZWYr.s:968 .bss.balancedCells:0000000000000000 $d
/tmp/ccmNZWYr.s:975 .bss.module:0000000000000000 $d
UNDEFINED SYMBOLS
initAMS
amsConfigOverVoltage
amsConfigUnderVoltage
amsWakeUp
amsConfigAuxMeasurement
amsClearAux
amsCellMeasurement
amsInternalStatusMeasurement
amsAuxMeasurement
amsCheckUnderOverVoltage
amsStopBalancing
amsClearWarning
amsConfigBalancing
amsStartBalancing
HAL_GetTick