ARM GAS /tmp/cc68VAom.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_msp.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/stm32f3xx_hal_msp.c" 20 .section .text.HAL_MspInit,"ax",%progbits 21 .align 1 22 .global HAL_MspInit 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_MspInit: 28 .LFB130: 1:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f3xx_hal_msp.c **** /** 3:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 4:Core/Src/stm32f3xx_hal_msp.c **** * @file stm32f3xx_hal_msp.c 5:Core/Src/stm32f3xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 6:Core/Src/stm32f3xx_hal_msp.c **** * and de-Initialization codes. 7:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 8:Core/Src/stm32f3xx_hal_msp.c **** * @attention 9:Core/Src/stm32f3xx_hal_msp.c **** * 10:Core/Src/stm32f3xx_hal_msp.c **** * Copyright (c) 2023 STMicroelectronics. 11:Core/Src/stm32f3xx_hal_msp.c **** * All rights reserved. 12:Core/Src/stm32f3xx_hal_msp.c **** * 13:Core/Src/stm32f3xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/stm32f3xx_hal_msp.c **** * in the root directory of this software component. 15:Core/Src/stm32f3xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/stm32f3xx_hal_msp.c **** * 17:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 18:Core/Src/stm32f3xx_hal_msp.c **** */ 19:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Header */ 20:Core/Src/stm32f3xx_hal_msp.c **** 21:Core/Src/stm32f3xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 22:Core/Src/stm32f3xx_hal_msp.c **** #include "main.h" 23:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 24:Core/Src/stm32f3xx_hal_msp.c **** 25:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Includes */ 26:Core/Src/stm32f3xx_hal_msp.c **** 27:Core/Src/stm32f3xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 28:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f3xx_hal_msp.c **** 30:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */ ARM GAS /tmp/cc68VAom.s page 2 31:Core/Src/stm32f3xx_hal_msp.c **** 32:Core/Src/stm32f3xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 33:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Define */ 34:Core/Src/stm32f3xx_hal_msp.c **** 35:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Define */ 36:Core/Src/stm32f3xx_hal_msp.c **** 37:Core/Src/stm32f3xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 38:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 39:Core/Src/stm32f3xx_hal_msp.c **** 40:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Macro */ 41:Core/Src/stm32f3xx_hal_msp.c **** 42:Core/Src/stm32f3xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 43:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PV */ 44:Core/Src/stm32f3xx_hal_msp.c **** 45:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PV */ 46:Core/Src/stm32f3xx_hal_msp.c **** 47:Core/Src/stm32f3xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 48:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 49:Core/Src/stm32f3xx_hal_msp.c **** 50:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PFP */ 51:Core/Src/stm32f3xx_hal_msp.c **** 52:Core/Src/stm32f3xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 53:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 54:Core/Src/stm32f3xx_hal_msp.c **** 55:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 56:Core/Src/stm32f3xx_hal_msp.c **** 57:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 58:Core/Src/stm32f3xx_hal_msp.c **** 59:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END 0 */ 60:Core/Src/stm32f3xx_hal_msp.c **** /** 61:Core/Src/stm32f3xx_hal_msp.c **** * Initializes the Global MSP. 62:Core/Src/stm32f3xx_hal_msp.c **** */ 63:Core/Src/stm32f3xx_hal_msp.c **** void HAL_MspInit(void) 64:Core/Src/stm32f3xx_hal_msp.c **** { 29 .loc 1 64 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 34 0000 82B0 sub sp, sp, #8 35 .cfi_def_cfa_offset 8 65:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 66:Core/Src/stm32f3xx_hal_msp.c **** 67:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 68:Core/Src/stm32f3xx_hal_msp.c **** 69:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 36 .loc 1 69 3 view .LVU1 37 .LBB2: 38 .loc 1 69 3 view .LVU2 39 .loc 1 69 3 view .LVU3 40 0002 0A4B ldr r3, .L3 41 0004 9A69 ldr r2, [r3, #24] 42 0006 42F00102 orr r2, r2, #1 43 000a 9A61 str r2, [r3, #24] 44 .loc 1 69 3 view .LVU4 45 000c 9A69 ldr r2, [r3, #24] 46 000e 02F00102 and r2, r2, #1 ARM GAS /tmp/cc68VAom.s page 3 47 0012 0092 str r2, [sp] 48 .loc 1 69 3 view .LVU5 49 0014 009A ldr r2, [sp] 50 .LBE2: 51 .loc 1 69 3 view .LVU6 70:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); 52 .loc 1 70 3 view .LVU7 53 .LBB3: 54 .loc 1 70 3 view .LVU8 55 .loc 1 70 3 view .LVU9 56 0016 DA69 ldr r2, [r3, #28] 57 0018 42F08052 orr r2, r2, #268435456 58 001c DA61 str r2, [r3, #28] 59 .loc 1 70 3 view .LVU10 60 001e DB69 ldr r3, [r3, #28] 61 0020 03F08053 and r3, r3, #268435456 62 0024 0193 str r3, [sp, #4] 63 .loc 1 70 3 view .LVU11 64 0026 019B ldr r3, [sp, #4] 65 .LBE3: 66 .loc 1 70 3 view .LVU12 71:Core/Src/stm32f3xx_hal_msp.c **** 72:Core/Src/stm32f3xx_hal_msp.c **** /* System interrupt init*/ 73:Core/Src/stm32f3xx_hal_msp.c **** 74:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 75:Core/Src/stm32f3xx_hal_msp.c **** 76:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 77:Core/Src/stm32f3xx_hal_msp.c **** } 67 .loc 1 77 1 is_stmt 0 view .LVU13 68 0028 02B0 add sp, sp, #8 69 .cfi_def_cfa_offset 0 70 @ sp needed 71 002a 7047 bx lr 72 .L4: 73 .align 2 74 .L3: 75 002c 00100240 .word 1073876992 76 .cfi_endproc 77 .LFE130: 79 .section .text.HAL_CAN_MspInit,"ax",%progbits 80 .align 1 81 .global HAL_CAN_MspInit 82 .syntax unified 83 .thumb 84 .thumb_func 86 HAL_CAN_MspInit: 87 .LVL0: 88 .LFB131: 78:Core/Src/stm32f3xx_hal_msp.c **** 79:Core/Src/stm32f3xx_hal_msp.c **** /** 80:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP Initialization 81:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 82:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer 83:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 84:Core/Src/stm32f3xx_hal_msp.c **** */ 85:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) 86:Core/Src/stm32f3xx_hal_msp.c **** { ARM GAS /tmp/cc68VAom.s page 4 89 .loc 1 86 1 is_stmt 1 view -0 90 .cfi_startproc 91 @ args = 0, pretend = 0, frame = 32 92 @ frame_needed = 0, uses_anonymous_args = 0 93 .loc 1 86 1 is_stmt 0 view .LVU15 94 0000 00B5 push {lr} 95 .cfi_def_cfa_offset 4 96 .cfi_offset 14, -4 97 0002 89B0 sub sp, sp, #36 98 .cfi_def_cfa_offset 40 87:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 99 .loc 1 87 3 is_stmt 1 view .LVU16 100 .loc 1 87 20 is_stmt 0 view .LVU17 101 0004 0023 movs r3, #0 102 0006 0393 str r3, [sp, #12] 103 0008 0493 str r3, [sp, #16] 104 000a 0593 str r3, [sp, #20] 105 000c 0693 str r3, [sp, #24] 106 000e 0793 str r3, [sp, #28] 88:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN) 107 .loc 1 88 3 is_stmt 1 view .LVU18 108 .loc 1 88 10 is_stmt 0 view .LVU19 109 0010 0268 ldr r2, [r0] 110 .loc 1 88 5 view .LVU20 111 0012 184B ldr r3, .L9 112 0014 9A42 cmp r2, r3 113 0016 02D0 beq .L8 114 .LVL1: 115 .L5: 89:Core/Src/stm32f3xx_hal_msp.c **** { 90:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 0 */ 91:Core/Src/stm32f3xx_hal_msp.c **** 92:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 0 */ 93:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 94:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_ENABLE(); 95:Core/Src/stm32f3xx_hal_msp.c **** 96:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 97:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 98:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX 99:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX 100:Core/Src/stm32f3xx_hal_msp.c **** */ 101:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; 102:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 103:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 106:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 107:Core/Src/stm32f3xx_hal_msp.c **** 108:Core/Src/stm32f3xx_hal_msp.c **** /* CAN interrupt Init */ 109:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0, 0); 110:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn); 111:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */ 112:Core/Src/stm32f3xx_hal_msp.c **** 113:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 1 */ 114:Core/Src/stm32f3xx_hal_msp.c **** } 115:Core/Src/stm32f3xx_hal_msp.c **** 116:Core/Src/stm32f3xx_hal_msp.c **** } ARM GAS /tmp/cc68VAom.s page 5 116 .loc 1 116 1 view .LVU21 117 0018 09B0 add sp, sp, #36 118 .cfi_remember_state 119 .cfi_def_cfa_offset 4 120 @ sp needed 121 001a 5DF804FB ldr pc, [sp], #4 122 .LVL2: 123 .L8: 124 .cfi_restore_state 94:Core/Src/stm32f3xx_hal_msp.c **** 125 .loc 1 94 5 is_stmt 1 view .LVU22 126 .LBB4: 94:Core/Src/stm32f3xx_hal_msp.c **** 127 .loc 1 94 5 view .LVU23 94:Core/Src/stm32f3xx_hal_msp.c **** 128 .loc 1 94 5 view .LVU24 129 001e 03F5D633 add r3, r3, #109568 130 0022 DA69 ldr r2, [r3, #28] 131 0024 42F00072 orr r2, r2, #33554432 132 0028 DA61 str r2, [r3, #28] 94:Core/Src/stm32f3xx_hal_msp.c **** 133 .loc 1 94 5 view .LVU25 134 002a DA69 ldr r2, [r3, #28] 135 002c 02F00072 and r2, r2, #33554432 136 0030 0192 str r2, [sp, #4] 94:Core/Src/stm32f3xx_hal_msp.c **** 137 .loc 1 94 5 view .LVU26 138 0032 019A ldr r2, [sp, #4] 139 .LBE4: 94:Core/Src/stm32f3xx_hal_msp.c **** 140 .loc 1 94 5 view .LVU27 96:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 141 .loc 1 96 5 view .LVU28 142 .LBB5: 96:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 143 .loc 1 96 5 view .LVU29 96:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 144 .loc 1 96 5 view .LVU30 145 0034 5A69 ldr r2, [r3, #20] 146 0036 42F40032 orr r2, r2, #131072 147 003a 5A61 str r2, [r3, #20] 96:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 148 .loc 1 96 5 view .LVU31 149 003c 5B69 ldr r3, [r3, #20] 150 003e 03F40033 and r3, r3, #131072 151 0042 0293 str r3, [sp, #8] 96:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 152 .loc 1 96 5 view .LVU32 153 0044 029B ldr r3, [sp, #8] 154 .LBE5: 96:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 155 .loc 1 96 5 view .LVU33 101:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 156 .loc 1 101 5 view .LVU34 101:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 157 .loc 1 101 25 is_stmt 0 view .LVU35 158 0046 4FF4C053 mov r3, #6144 ARM GAS /tmp/cc68VAom.s page 6 159 004a 0393 str r3, [sp, #12] 102:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 160 .loc 1 102 5 is_stmt 1 view .LVU36 102:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 161 .loc 1 102 26 is_stmt 0 view .LVU37 162 004c 0223 movs r3, #2 163 004e 0493 str r3, [sp, #16] 103:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 164 .loc 1 103 5 is_stmt 1 view .LVU38 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 165 .loc 1 104 5 view .LVU39 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 166 .loc 1 104 27 is_stmt 0 view .LVU40 167 0050 0323 movs r3, #3 168 0052 0693 str r3, [sp, #24] 105:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 169 .loc 1 105 5 is_stmt 1 view .LVU41 105:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 170 .loc 1 105 31 is_stmt 0 view .LVU42 171 0054 0923 movs r3, #9 172 0056 0793 str r3, [sp, #28] 106:Core/Src/stm32f3xx_hal_msp.c **** 173 .loc 1 106 5 is_stmt 1 view .LVU43 174 0058 03A9 add r1, sp, #12 175 005a 4FF09040 mov r0, #1207959552 176 .LVL3: 106:Core/Src/stm32f3xx_hal_msp.c **** 177 .loc 1 106 5 is_stmt 0 view .LVU44 178 005e FFF7FEFF bl HAL_GPIO_Init 179 .LVL4: 109:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn); 180 .loc 1 109 5 is_stmt 1 view .LVU45 181 0062 0022 movs r2, #0 182 0064 1146 mov r1, r2 183 0066 1420 movs r0, #20 184 0068 FFF7FEFF bl HAL_NVIC_SetPriority 185 .LVL5: 110:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */ 186 .loc 1 110 5 view .LVU46 187 006c 1420 movs r0, #20 188 006e FFF7FEFF bl HAL_NVIC_EnableIRQ 189 .LVL6: 190 .loc 1 116 1 is_stmt 0 view .LVU47 191 0072 D1E7 b .L5 192 .L10: 193 .align 2 194 .L9: 195 0074 00640040 .word 1073767424 196 .cfi_endproc 197 .LFE131: 199 .section .text.HAL_CAN_MspDeInit,"ax",%progbits 200 .align 1 201 .global HAL_CAN_MspDeInit 202 .syntax unified 203 .thumb 204 .thumb_func 206 HAL_CAN_MspDeInit: ARM GAS /tmp/cc68VAom.s page 7 207 .LVL7: 208 .LFB132: 117:Core/Src/stm32f3xx_hal_msp.c **** 118:Core/Src/stm32f3xx_hal_msp.c **** /** 119:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP De-Initialization 120:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 121:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer 122:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 123:Core/Src/stm32f3xx_hal_msp.c **** */ 124:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) 125:Core/Src/stm32f3xx_hal_msp.c **** { 209 .loc 1 125 1 is_stmt 1 view -0 210 .cfi_startproc 211 @ args = 0, pretend = 0, frame = 0 212 @ frame_needed = 0, uses_anonymous_args = 0 213 .loc 1 125 1 is_stmt 0 view .LVU49 214 0000 08B5 push {r3, lr} 215 .cfi_def_cfa_offset 8 216 .cfi_offset 3, -8 217 .cfi_offset 14, -4 126:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN) 218 .loc 1 126 3 is_stmt 1 view .LVU50 219 .loc 1 126 10 is_stmt 0 view .LVU51 220 0002 0268 ldr r2, [r0] 221 .loc 1 126 5 view .LVU52 222 0004 094B ldr r3, .L15 223 0006 9A42 cmp r2, r3 224 0008 00D0 beq .L14 225 .LVL8: 226 .L11: 127:Core/Src/stm32f3xx_hal_msp.c **** { 128:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 0 */ 129:Core/Src/stm32f3xx_hal_msp.c **** 130:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 0 */ 131:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 132:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_DISABLE(); 133:Core/Src/stm32f3xx_hal_msp.c **** 134:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 135:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX 136:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX 137:Core/Src/stm32f3xx_hal_msp.c **** */ 138:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); 139:Core/Src/stm32f3xx_hal_msp.c **** 140:Core/Src/stm32f3xx_hal_msp.c **** /* CAN interrupt DeInit */ 141:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn); 142:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */ 143:Core/Src/stm32f3xx_hal_msp.c **** 144:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 1 */ 145:Core/Src/stm32f3xx_hal_msp.c **** } 146:Core/Src/stm32f3xx_hal_msp.c **** 147:Core/Src/stm32f3xx_hal_msp.c **** } 227 .loc 1 147 1 view .LVU53 228 000a 08BD pop {r3, pc} 229 .LVL9: 230 .L14: 132:Core/Src/stm32f3xx_hal_msp.c **** 231 .loc 1 132 5 is_stmt 1 view .LVU54 ARM GAS /tmp/cc68VAom.s page 8 232 000c 084A ldr r2, .L15+4 233 000e D369 ldr r3, [r2, #28] 234 0010 23F00073 bic r3, r3, #33554432 235 0014 D361 str r3, [r2, #28] 138:Core/Src/stm32f3xx_hal_msp.c **** 236 .loc 1 138 5 view .LVU55 237 0016 4FF4C051 mov r1, #6144 238 001a 4FF09040 mov r0, #1207959552 239 .LVL10: 138:Core/Src/stm32f3xx_hal_msp.c **** 240 .loc 1 138 5 is_stmt 0 view .LVU56 241 001e FFF7FEFF bl HAL_GPIO_DeInit 242 .LVL11: 141:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */ 243 .loc 1 141 5 is_stmt 1 view .LVU57 244 0022 1420 movs r0, #20 245 0024 FFF7FEFF bl HAL_NVIC_DisableIRQ 246 .LVL12: 247 .loc 1 147 1 is_stmt 0 view .LVU58 248 0028 EFE7 b .L11 249 .L16: 250 002a 00BF .align 2 251 .L15: 252 002c 00640040 .word 1073767424 253 0030 00100240 .word 1073876992 254 .cfi_endproc 255 .LFE132: 257 .section .text.HAL_I2C_MspInit,"ax",%progbits 258 .align 1 259 .global HAL_I2C_MspInit 260 .syntax unified 261 .thumb 262 .thumb_func 264 HAL_I2C_MspInit: 265 .LVL13: 266 .LFB133: 148:Core/Src/stm32f3xx_hal_msp.c **** 149:Core/Src/stm32f3xx_hal_msp.c **** /** 150:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP Initialization 151:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 152:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer 153:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 154:Core/Src/stm32f3xx_hal_msp.c **** */ 155:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) 156:Core/Src/stm32f3xx_hal_msp.c **** { 267 .loc 1 156 1 is_stmt 1 view -0 268 .cfi_startproc 269 @ args = 0, pretend = 0, frame = 40 270 @ frame_needed = 0, uses_anonymous_args = 0 271 .loc 1 156 1 is_stmt 0 view .LVU60 272 0000 F0B5 push {r4, r5, r6, r7, lr} 273 .cfi_def_cfa_offset 20 274 .cfi_offset 4, -20 275 .cfi_offset 5, -16 276 .cfi_offset 6, -12 277 .cfi_offset 7, -8 278 .cfi_offset 14, -4 ARM GAS /tmp/cc68VAom.s page 9 279 0002 8BB0 sub sp, sp, #44 280 .cfi_def_cfa_offset 64 157:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 281 .loc 1 157 3 is_stmt 1 view .LVU61 282 .loc 1 157 20 is_stmt 0 view .LVU62 283 0004 0023 movs r3, #0 284 0006 0593 str r3, [sp, #20] 285 0008 0693 str r3, [sp, #24] 286 000a 0793 str r3, [sp, #28] 287 000c 0893 str r3, [sp, #32] 288 000e 0993 str r3, [sp, #36] 158:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1) 289 .loc 1 158 3 is_stmt 1 view .LVU63 290 .loc 1 158 10 is_stmt 0 view .LVU64 291 0010 0368 ldr r3, [r0] 292 .loc 1 158 5 view .LVU65 293 0012 304A ldr r2, .L23 294 0014 9342 cmp r3, r2 295 0016 04D0 beq .L21 159:Core/Src/stm32f3xx_hal_msp.c **** { 160:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 0 */ 161:Core/Src/stm32f3xx_hal_msp.c **** 162:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 0 */ 163:Core/Src/stm32f3xx_hal_msp.c **** 164:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 165:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 166:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 167:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL 168:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> I2C1_SDA 169:Core/Src/stm32f3xx_hal_msp.c **** */ 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = TMP_SCL_Pin; 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 172:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 173:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 174:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 175:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(TMP_SCL_GPIO_Port, &GPIO_InitStruct); 176:Core/Src/stm32f3xx_hal_msp.c **** 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = TMP_SDA_Pin; 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 179:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 180:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 181:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 182:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(TMP_SDA_GPIO_Port, &GPIO_InitStruct); 183:Core/Src/stm32f3xx_hal_msp.c **** 184:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 185:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_ENABLE(); 186:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 187:Core/Src/stm32f3xx_hal_msp.c **** 188:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 1 */ 189:Core/Src/stm32f3xx_hal_msp.c **** } 190:Core/Src/stm32f3xx_hal_msp.c **** else if(hi2c->Instance==I2C2) 296 .loc 1 190 8 is_stmt 1 view .LVU66 297 .loc 1 190 10 is_stmt 0 view .LVU67 298 0018 2F4A ldr r2, .L23+4 299 001a 9342 cmp r3, r2 300 001c 37D0 beq .L22 301 .LVL14: ARM GAS /tmp/cc68VAom.s page 10 302 .L17: 191:Core/Src/stm32f3xx_hal_msp.c **** { 192:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspInit 0 */ 193:Core/Src/stm32f3xx_hal_msp.c **** 194:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C2_MspInit 0 */ 195:Core/Src/stm32f3xx_hal_msp.c **** 196:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 197:Core/Src/stm32f3xx_hal_msp.c **** /**I2C2 GPIO Configuration 198:Core/Src/stm32f3xx_hal_msp.c **** PA9 ------> I2C2_SCL 199:Core/Src/stm32f3xx_hal_msp.c **** PA10 ------> I2C2_SDA 200:Core/Src/stm32f3xx_hal_msp.c **** */ 201:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; 202:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 203:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 204:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 205:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C2; 206:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 207:Core/Src/stm32f3xx_hal_msp.c **** 208:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 209:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C2_CLK_ENABLE(); 210:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspInit 1 */ 211:Core/Src/stm32f3xx_hal_msp.c **** 212:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C2_MspInit 1 */ 213:Core/Src/stm32f3xx_hal_msp.c **** } 214:Core/Src/stm32f3xx_hal_msp.c **** 215:Core/Src/stm32f3xx_hal_msp.c **** } 303 .loc 1 215 1 view .LVU68 304 001e 0BB0 add sp, sp, #44 305 .cfi_remember_state 306 .cfi_def_cfa_offset 20 307 @ sp needed 308 0020 F0BD pop {r4, r5, r6, r7, pc} 309 .LVL15: 310 .L21: 311 .cfi_restore_state 164:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 312 .loc 1 164 5 is_stmt 1 view .LVU69 313 .LBB6: 164:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 314 .loc 1 164 5 view .LVU70 164:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 315 .loc 1 164 5 view .LVU71 316 0022 2E4C ldr r4, .L23+8 317 0024 6369 ldr r3, [r4, #20] 318 0026 43F40033 orr r3, r3, #131072 319 002a 6361 str r3, [r4, #20] 164:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 320 .loc 1 164 5 view .LVU72 321 002c 6369 ldr r3, [r4, #20] 322 002e 03F40033 and r3, r3, #131072 323 0032 0093 str r3, [sp] 164:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 324 .loc 1 164 5 view .LVU73 325 0034 009B ldr r3, [sp] 326 .LBE6: 164:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 327 .loc 1 164 5 view .LVU74 ARM GAS /tmp/cc68VAom.s page 11 165:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 328 .loc 1 165 5 view .LVU75 329 .LBB7: 165:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 330 .loc 1 165 5 view .LVU76 165:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 331 .loc 1 165 5 view .LVU77 332 0036 6369 ldr r3, [r4, #20] 333 0038 43F48023 orr r3, r3, #262144 334 003c 6361 str r3, [r4, #20] 165:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 335 .loc 1 165 5 view .LVU78 336 003e 6369 ldr r3, [r4, #20] 337 0040 03F48023 and r3, r3, #262144 338 0044 0193 str r3, [sp, #4] 165:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 339 .loc 1 165 5 view .LVU79 340 0046 019B ldr r3, [sp, #4] 341 .LBE7: 165:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 342 .loc 1 165 5 view .LVU80 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 343 .loc 1 170 5 view .LVU81 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 344 .loc 1 170 25 is_stmt 0 view .LVU82 345 0048 4FF40043 mov r3, #32768 346 004c 0593 str r3, [sp, #20] 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 347 .loc 1 171 5 is_stmt 1 view .LVU83 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 348 .loc 1 171 26 is_stmt 0 view .LVU84 349 004e 1227 movs r7, #18 350 0050 0697 str r7, [sp, #24] 172:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 351 .loc 1 172 5 is_stmt 1 view .LVU85 173:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 352 .loc 1 173 5 view .LVU86 173:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 353 .loc 1 173 27 is_stmt 0 view .LVU87 354 0052 0326 movs r6, #3 355 0054 0896 str r6, [sp, #32] 174:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(TMP_SCL_GPIO_Port, &GPIO_InitStruct); 356 .loc 1 174 5 is_stmt 1 view .LVU88 174:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(TMP_SCL_GPIO_Port, &GPIO_InitStruct); 357 .loc 1 174 31 is_stmt 0 view .LVU89 358 0056 0425 movs r5, #4 359 0058 0995 str r5, [sp, #36] 175:Core/Src/stm32f3xx_hal_msp.c **** 360 .loc 1 175 5 is_stmt 1 view .LVU90 361 005a 05A9 add r1, sp, #20 362 005c 4FF09040 mov r0, #1207959552 363 .LVL16: 175:Core/Src/stm32f3xx_hal_msp.c **** 364 .loc 1 175 5 is_stmt 0 view .LVU91 365 0060 FFF7FEFF bl HAL_GPIO_Init 366 .LVL17: 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; ARM GAS /tmp/cc68VAom.s page 12 367 .loc 1 177 5 is_stmt 1 view .LVU92 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 368 .loc 1 177 25 is_stmt 0 view .LVU93 369 0064 8023 movs r3, #128 370 0066 0593 str r3, [sp, #20] 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 371 .loc 1 178 5 is_stmt 1 view .LVU94 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 372 .loc 1 178 26 is_stmt 0 view .LVU95 373 0068 0697 str r7, [sp, #24] 179:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 374 .loc 1 179 5 is_stmt 1 view .LVU96 179:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 375 .loc 1 179 26 is_stmt 0 view .LVU97 376 006a 0023 movs r3, #0 377 006c 0793 str r3, [sp, #28] 180:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 378 .loc 1 180 5 is_stmt 1 view .LVU98 180:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 379 .loc 1 180 27 is_stmt 0 view .LVU99 380 006e 0896 str r6, [sp, #32] 181:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(TMP_SDA_GPIO_Port, &GPIO_InitStruct); 381 .loc 1 181 5 is_stmt 1 view .LVU100 181:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(TMP_SDA_GPIO_Port, &GPIO_InitStruct); 382 .loc 1 181 31 is_stmt 0 view .LVU101 383 0070 0995 str r5, [sp, #36] 182:Core/Src/stm32f3xx_hal_msp.c **** 384 .loc 1 182 5 is_stmt 1 view .LVU102 385 0072 05A9 add r1, sp, #20 386 0074 1A48 ldr r0, .L23+12 387 0076 FFF7FEFF bl HAL_GPIO_Init 388 .LVL18: 185:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 389 .loc 1 185 5 view .LVU103 390 .LBB8: 185:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 391 .loc 1 185 5 view .LVU104 185:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 392 .loc 1 185 5 view .LVU105 393 007a E369 ldr r3, [r4, #28] 394 007c 43F40013 orr r3, r3, #2097152 395 0080 E361 str r3, [r4, #28] 185:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 396 .loc 1 185 5 view .LVU106 397 0082 E369 ldr r3, [r4, #28] 398 0084 03F40013 and r3, r3, #2097152 399 0088 0293 str r3, [sp, #8] 185:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 400 .loc 1 185 5 view .LVU107 401 008a 029B ldr r3, [sp, #8] 402 .LBE8: 185:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 403 .loc 1 185 5 view .LVU108 404 008c C7E7 b .L17 405 .LVL19: 406 .L22: 196:Core/Src/stm32f3xx_hal_msp.c **** /**I2C2 GPIO Configuration ARM GAS /tmp/cc68VAom.s page 13 407 .loc 1 196 5 view .LVU109 408 .LBB9: 196:Core/Src/stm32f3xx_hal_msp.c **** /**I2C2 GPIO Configuration 409 .loc 1 196 5 view .LVU110 196:Core/Src/stm32f3xx_hal_msp.c **** /**I2C2 GPIO Configuration 410 .loc 1 196 5 view .LVU111 411 008e 134C ldr r4, .L23+8 412 0090 6369 ldr r3, [r4, #20] 413 0092 43F40033 orr r3, r3, #131072 414 0096 6361 str r3, [r4, #20] 196:Core/Src/stm32f3xx_hal_msp.c **** /**I2C2 GPIO Configuration 415 .loc 1 196 5 view .LVU112 416 0098 6369 ldr r3, [r4, #20] 417 009a 03F40033 and r3, r3, #131072 418 009e 0393 str r3, [sp, #12] 196:Core/Src/stm32f3xx_hal_msp.c **** /**I2C2 GPIO Configuration 419 .loc 1 196 5 view .LVU113 420 00a0 039B ldr r3, [sp, #12] 421 .LBE9: 196:Core/Src/stm32f3xx_hal_msp.c **** /**I2C2 GPIO Configuration 422 .loc 1 196 5 view .LVU114 201:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 423 .loc 1 201 5 view .LVU115 201:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 424 .loc 1 201 25 is_stmt 0 view .LVU116 425 00a2 4FF4C063 mov r3, #1536 426 00a6 0593 str r3, [sp, #20] 202:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 427 .loc 1 202 5 is_stmt 1 view .LVU117 202:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 428 .loc 1 202 26 is_stmt 0 view .LVU118 429 00a8 1223 movs r3, #18 430 00aa 0693 str r3, [sp, #24] 203:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 431 .loc 1 203 5 is_stmt 1 view .LVU119 204:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C2; 432 .loc 1 204 5 view .LVU120 204:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C2; 433 .loc 1 204 27 is_stmt 0 view .LVU121 434 00ac 0323 movs r3, #3 435 00ae 0893 str r3, [sp, #32] 205:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 436 .loc 1 205 5 is_stmt 1 view .LVU122 205:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 437 .loc 1 205 31 is_stmt 0 view .LVU123 438 00b0 0423 movs r3, #4 439 00b2 0993 str r3, [sp, #36] 206:Core/Src/stm32f3xx_hal_msp.c **** 440 .loc 1 206 5 is_stmt 1 view .LVU124 441 00b4 05A9 add r1, sp, #20 442 00b6 4FF09040 mov r0, #1207959552 443 .LVL20: 206:Core/Src/stm32f3xx_hal_msp.c **** 444 .loc 1 206 5 is_stmt 0 view .LVU125 445 00ba FFF7FEFF bl HAL_GPIO_Init 446 .LVL21: 209:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspInit 1 */ ARM GAS /tmp/cc68VAom.s page 14 447 .loc 1 209 5 is_stmt 1 view .LVU126 448 .LBB10: 209:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspInit 1 */ 449 .loc 1 209 5 view .LVU127 209:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspInit 1 */ 450 .loc 1 209 5 view .LVU128 451 00be E369 ldr r3, [r4, #28] 452 00c0 43F48003 orr r3, r3, #4194304 453 00c4 E361 str r3, [r4, #28] 209:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspInit 1 */ 454 .loc 1 209 5 view .LVU129 455 00c6 E369 ldr r3, [r4, #28] 456 00c8 03F48003 and r3, r3, #4194304 457 00cc 0493 str r3, [sp, #16] 209:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspInit 1 */ 458 .loc 1 209 5 view .LVU130 459 00ce 049B ldr r3, [sp, #16] 460 .LBE10: 209:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspInit 1 */ 461 .loc 1 209 5 view .LVU131 462 .loc 1 215 1 is_stmt 0 view .LVU132 463 00d0 A5E7 b .L17 464 .L24: 465 00d2 00BF .align 2 466 .L23: 467 00d4 00540040 .word 1073763328 468 00d8 00580040 .word 1073764352 469 00dc 00100240 .word 1073876992 470 00e0 00040048 .word 1207960576 471 .cfi_endproc 472 .LFE133: 474 .section .text.HAL_I2C_MspDeInit,"ax",%progbits 475 .align 1 476 .global HAL_I2C_MspDeInit 477 .syntax unified 478 .thumb 479 .thumb_func 481 HAL_I2C_MspDeInit: 482 .LVL22: 483 .LFB134: 216:Core/Src/stm32f3xx_hal_msp.c **** 217:Core/Src/stm32f3xx_hal_msp.c **** /** 218:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP De-Initialization 219:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 220:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer 221:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 222:Core/Src/stm32f3xx_hal_msp.c **** */ 223:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) 224:Core/Src/stm32f3xx_hal_msp.c **** { 484 .loc 1 224 1 is_stmt 1 view -0 485 .cfi_startproc 486 @ args = 0, pretend = 0, frame = 0 487 @ frame_needed = 0, uses_anonymous_args = 0 488 .loc 1 224 1 is_stmt 0 view .LVU134 489 0000 08B5 push {r3, lr} 490 .cfi_def_cfa_offset 8 491 .cfi_offset 3, -8 ARM GAS /tmp/cc68VAom.s page 15 492 .cfi_offset 14, -4 225:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1) 493 .loc 1 225 3 is_stmt 1 view .LVU135 494 .loc 1 225 10 is_stmt 0 view .LVU136 495 0002 0368 ldr r3, [r0] 496 .loc 1 225 5 view .LVU137 497 0004 154A ldr r2, .L31 498 0006 9342 cmp r3, r2 499 0008 03D0 beq .L29 226:Core/Src/stm32f3xx_hal_msp.c **** { 227:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */ 228:Core/Src/stm32f3xx_hal_msp.c **** 229:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 0 */ 230:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 231:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_DISABLE(); 232:Core/Src/stm32f3xx_hal_msp.c **** 233:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 234:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL 235:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> I2C1_SDA 236:Core/Src/stm32f3xx_hal_msp.c **** */ 237:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(TMP_SCL_GPIO_Port, TMP_SCL_Pin); 238:Core/Src/stm32f3xx_hal_msp.c **** 239:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(TMP_SDA_GPIO_Port, TMP_SDA_Pin); 240:Core/Src/stm32f3xx_hal_msp.c **** 241:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */ 242:Core/Src/stm32f3xx_hal_msp.c **** 243:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 1 */ 244:Core/Src/stm32f3xx_hal_msp.c **** } 245:Core/Src/stm32f3xx_hal_msp.c **** else if(hi2c->Instance==I2C2) 500 .loc 1 245 8 is_stmt 1 view .LVU138 501 .loc 1 245 10 is_stmt 0 view .LVU139 502 000a 154A ldr r2, .L31+4 503 000c 9342 cmp r3, r2 504 000e 11D0 beq .L30 505 .LVL23: 506 .L25: 246:Core/Src/stm32f3xx_hal_msp.c **** { 247:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspDeInit 0 */ 248:Core/Src/stm32f3xx_hal_msp.c **** 249:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C2_MspDeInit 0 */ 250:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 251:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C2_CLK_DISABLE(); 252:Core/Src/stm32f3xx_hal_msp.c **** 253:Core/Src/stm32f3xx_hal_msp.c **** /**I2C2 GPIO Configuration 254:Core/Src/stm32f3xx_hal_msp.c **** PA9 ------> I2C2_SCL 255:Core/Src/stm32f3xx_hal_msp.c **** PA10 ------> I2C2_SDA 256:Core/Src/stm32f3xx_hal_msp.c **** */ 257:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9); 258:Core/Src/stm32f3xx_hal_msp.c **** 259:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10); 260:Core/Src/stm32f3xx_hal_msp.c **** 261:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C2_MspDeInit 1 */ 262:Core/Src/stm32f3xx_hal_msp.c **** 263:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C2_MspDeInit 1 */ 264:Core/Src/stm32f3xx_hal_msp.c **** } 265:Core/Src/stm32f3xx_hal_msp.c **** 266:Core/Src/stm32f3xx_hal_msp.c **** } ARM GAS /tmp/cc68VAom.s page 16 507 .loc 1 266 1 view .LVU140 508 0010 08BD pop {r3, pc} 509 .LVL24: 510 .L29: 231:Core/Src/stm32f3xx_hal_msp.c **** 511 .loc 1 231 5 is_stmt 1 view .LVU141 512 0012 02F5DE32 add r2, r2, #113664 513 0016 D369 ldr r3, [r2, #28] 514 0018 23F40013 bic r3, r3, #2097152 515 001c D361 str r3, [r2, #28] 237:Core/Src/stm32f3xx_hal_msp.c **** 516 .loc 1 237 5 view .LVU142 517 001e 4FF40041 mov r1, #32768 518 0022 4FF09040 mov r0, #1207959552 519 .LVL25: 237:Core/Src/stm32f3xx_hal_msp.c **** 520 .loc 1 237 5 is_stmt 0 view .LVU143 521 0026 FFF7FEFF bl HAL_GPIO_DeInit 522 .LVL26: 239:Core/Src/stm32f3xx_hal_msp.c **** 523 .loc 1 239 5 is_stmt 1 view .LVU144 524 002a 8021 movs r1, #128 525 002c 0D48 ldr r0, .L31+8 526 002e FFF7FEFF bl HAL_GPIO_DeInit 527 .LVL27: 528 0032 EDE7 b .L25 529 .LVL28: 530 .L30: 251:Core/Src/stm32f3xx_hal_msp.c **** 531 .loc 1 251 5 view .LVU145 532 0034 02F5DC32 add r2, r2, #112640 533 0038 D369 ldr r3, [r2, #28] 534 003a 23F48003 bic r3, r3, #4194304 535 003e D361 str r3, [r2, #28] 257:Core/Src/stm32f3xx_hal_msp.c **** 536 .loc 1 257 5 view .LVU146 537 0040 4FF40071 mov r1, #512 538 0044 4FF09040 mov r0, #1207959552 539 .LVL29: 257:Core/Src/stm32f3xx_hal_msp.c **** 540 .loc 1 257 5 is_stmt 0 view .LVU147 541 0048 FFF7FEFF bl HAL_GPIO_DeInit 542 .LVL30: 259:Core/Src/stm32f3xx_hal_msp.c **** 543 .loc 1 259 5 is_stmt 1 view .LVU148 544 004c 4FF48061 mov r1, #1024 545 0050 4FF09040 mov r0, #1207959552 546 0054 FFF7FEFF bl HAL_GPIO_DeInit 547 .LVL31: 548 .loc 1 266 1 is_stmt 0 view .LVU149 549 0058 DAE7 b .L25 550 .L32: 551 005a 00BF .align 2 552 .L31: 553 005c 00540040 .word 1073763328 554 0060 00580040 .word 1073764352 555 0064 00040048 .word 1207960576 ARM GAS /tmp/cc68VAom.s page 17 556 .cfi_endproc 557 .LFE134: 559 .section .text.HAL_SPI_MspInit,"ax",%progbits 560 .align 1 561 .global HAL_SPI_MspInit 562 .syntax unified 563 .thumb 564 .thumb_func 566 HAL_SPI_MspInit: 567 .LVL32: 568 .LFB135: 267:Core/Src/stm32f3xx_hal_msp.c **** 268:Core/Src/stm32f3xx_hal_msp.c **** /** 269:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP Initialization 270:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 271:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer 272:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 273:Core/Src/stm32f3xx_hal_msp.c **** */ 274:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) 275:Core/Src/stm32f3xx_hal_msp.c **** { 569 .loc 1 275 1 is_stmt 1 view -0 570 .cfi_startproc 571 @ args = 0, pretend = 0, frame = 32 572 @ frame_needed = 0, uses_anonymous_args = 0 573 .loc 1 275 1 is_stmt 0 view .LVU151 574 0000 00B5 push {lr} 575 .cfi_def_cfa_offset 4 576 .cfi_offset 14, -4 577 0002 89B0 sub sp, sp, #36 578 .cfi_def_cfa_offset 40 276:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 579 .loc 1 276 3 is_stmt 1 view .LVU152 580 .loc 1 276 20 is_stmt 0 view .LVU153 581 0004 0023 movs r3, #0 582 0006 0393 str r3, [sp, #12] 583 0008 0493 str r3, [sp, #16] 584 000a 0593 str r3, [sp, #20] 585 000c 0693 str r3, [sp, #24] 586 000e 0793 str r3, [sp, #28] 277:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI1) 587 .loc 1 277 3 is_stmt 1 view .LVU154 588 .loc 1 277 10 is_stmt 0 view .LVU155 589 0010 0268 ldr r2, [r0] 590 .loc 1 277 5 view .LVU156 591 0012 144B ldr r3, .L37 592 0014 9A42 cmp r2, r3 593 0016 02D0 beq .L36 594 .LVL33: 595 .L33: 278:Core/Src/stm32f3xx_hal_msp.c **** { 279:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspInit 0 */ 280:Core/Src/stm32f3xx_hal_msp.c **** 281:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspInit 0 */ 282:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 283:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI1_CLK_ENABLE(); 284:Core/Src/stm32f3xx_hal_msp.c **** 285:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); ARM GAS /tmp/cc68VAom.s page 18 286:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 287:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> SPI1_SCK 288:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> SPI1_MISO 289:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> SPI1_MOSI 290:Core/Src/stm32f3xx_hal_msp.c **** */ 291:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; 292:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 293:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 294:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 295:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 296:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 297:Core/Src/stm32f3xx_hal_msp.c **** 298:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspInit 1 */ 299:Core/Src/stm32f3xx_hal_msp.c **** 300:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspInit 1 */ 301:Core/Src/stm32f3xx_hal_msp.c **** } 302:Core/Src/stm32f3xx_hal_msp.c **** 303:Core/Src/stm32f3xx_hal_msp.c **** } 596 .loc 1 303 1 view .LVU157 597 0018 09B0 add sp, sp, #36 598 .cfi_remember_state 599 .cfi_def_cfa_offset 4 600 @ sp needed 601 001a 5DF804FB ldr pc, [sp], #4 602 .LVL34: 603 .L36: 604 .cfi_restore_state 283:Core/Src/stm32f3xx_hal_msp.c **** 605 .loc 1 283 5 is_stmt 1 view .LVU158 606 .LBB11: 283:Core/Src/stm32f3xx_hal_msp.c **** 607 .loc 1 283 5 view .LVU159 283:Core/Src/stm32f3xx_hal_msp.c **** 608 .loc 1 283 5 view .LVU160 609 001e 03F56043 add r3, r3, #57344 610 0022 9A69 ldr r2, [r3, #24] 611 0024 42F48052 orr r2, r2, #4096 612 0028 9A61 str r2, [r3, #24] 283:Core/Src/stm32f3xx_hal_msp.c **** 613 .loc 1 283 5 view .LVU161 614 002a 9A69 ldr r2, [r3, #24] 615 002c 02F48052 and r2, r2, #4096 616 0030 0192 str r2, [sp, #4] 283:Core/Src/stm32f3xx_hal_msp.c **** 617 .loc 1 283 5 view .LVU162 618 0032 019A ldr r2, [sp, #4] 619 .LBE11: 283:Core/Src/stm32f3xx_hal_msp.c **** 620 .loc 1 283 5 view .LVU163 285:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 621 .loc 1 285 5 view .LVU164 622 .LBB12: 285:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 623 .loc 1 285 5 view .LVU165 285:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 624 .loc 1 285 5 view .LVU166 625 0034 5A69 ldr r2, [r3, #20] ARM GAS /tmp/cc68VAom.s page 19 626 0036 42F40032 orr r2, r2, #131072 627 003a 5A61 str r2, [r3, #20] 285:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 628 .loc 1 285 5 view .LVU167 629 003c 5B69 ldr r3, [r3, #20] 630 003e 03F40033 and r3, r3, #131072 631 0042 0293 str r3, [sp, #8] 285:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 632 .loc 1 285 5 view .LVU168 633 0044 029B ldr r3, [sp, #8] 634 .LBE12: 285:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 635 .loc 1 285 5 view .LVU169 291:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 636 .loc 1 291 5 view .LVU170 291:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 637 .loc 1 291 25 is_stmt 0 view .LVU171 638 0046 E023 movs r3, #224 639 0048 0393 str r3, [sp, #12] 292:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 640 .loc 1 292 5 is_stmt 1 view .LVU172 292:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 641 .loc 1 292 26 is_stmt 0 view .LVU173 642 004a 0223 movs r3, #2 643 004c 0493 str r3, [sp, #16] 293:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 644 .loc 1 293 5 is_stmt 1 view .LVU174 294:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 645 .loc 1 294 5 view .LVU175 294:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 646 .loc 1 294 27 is_stmt 0 view .LVU176 647 004e 0323 movs r3, #3 648 0050 0693 str r3, [sp, #24] 295:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 649 .loc 1 295 5 is_stmt 1 view .LVU177 295:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 650 .loc 1 295 31 is_stmt 0 view .LVU178 651 0052 0523 movs r3, #5 652 0054 0793 str r3, [sp, #28] 296:Core/Src/stm32f3xx_hal_msp.c **** 653 .loc 1 296 5 is_stmt 1 view .LVU179 654 0056 03A9 add r1, sp, #12 655 0058 4FF09040 mov r0, #1207959552 656 .LVL35: 296:Core/Src/stm32f3xx_hal_msp.c **** 657 .loc 1 296 5 is_stmt 0 view .LVU180 658 005c FFF7FEFF bl HAL_GPIO_Init 659 .LVL36: 660 .loc 1 303 1 view .LVU181 661 0060 DAE7 b .L33 662 .L38: 663 0062 00BF .align 2 664 .L37: 665 0064 00300140 .word 1073819648 666 .cfi_endproc 667 .LFE135: 669 .section .text.HAL_SPI_MspDeInit,"ax",%progbits ARM GAS /tmp/cc68VAom.s page 20 670 .align 1 671 .global HAL_SPI_MspDeInit 672 .syntax unified 673 .thumb 674 .thumb_func 676 HAL_SPI_MspDeInit: 677 .LVL37: 678 .LFB136: 304:Core/Src/stm32f3xx_hal_msp.c **** 305:Core/Src/stm32f3xx_hal_msp.c **** /** 306:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP De-Initialization 307:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 308:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer 309:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 310:Core/Src/stm32f3xx_hal_msp.c **** */ 311:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) 312:Core/Src/stm32f3xx_hal_msp.c **** { 679 .loc 1 312 1 is_stmt 1 view -0 680 .cfi_startproc 681 @ args = 0, pretend = 0, frame = 0 682 @ frame_needed = 0, uses_anonymous_args = 0 683 .loc 1 312 1 is_stmt 0 view .LVU183 684 0000 08B5 push {r3, lr} 685 .cfi_def_cfa_offset 8 686 .cfi_offset 3, -8 687 .cfi_offset 14, -4 313:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI1) 688 .loc 1 313 3 is_stmt 1 view .LVU184 689 .loc 1 313 10 is_stmt 0 view .LVU185 690 0002 0268 ldr r2, [r0] 691 .loc 1 313 5 view .LVU186 692 0004 074B ldr r3, .L43 693 0006 9A42 cmp r2, r3 694 0008 00D0 beq .L42 695 .LVL38: 696 .L39: 314:Core/Src/stm32f3xx_hal_msp.c **** { 315:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspDeInit 0 */ 316:Core/Src/stm32f3xx_hal_msp.c **** 317:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspDeInit 0 */ 318:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 319:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI1_CLK_DISABLE(); 320:Core/Src/stm32f3xx_hal_msp.c **** 321:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 322:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> SPI1_SCK 323:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> SPI1_MISO 324:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> SPI1_MOSI 325:Core/Src/stm32f3xx_hal_msp.c **** */ 326:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); 327:Core/Src/stm32f3xx_hal_msp.c **** 328:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspDeInit 1 */ 329:Core/Src/stm32f3xx_hal_msp.c **** 330:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspDeInit 1 */ 331:Core/Src/stm32f3xx_hal_msp.c **** } 332:Core/Src/stm32f3xx_hal_msp.c **** 333:Core/Src/stm32f3xx_hal_msp.c **** } 697 .loc 1 333 1 view .LVU187 ARM GAS /tmp/cc68VAom.s page 21 698 000a 08BD pop {r3, pc} 699 .LVL39: 700 .L42: 319:Core/Src/stm32f3xx_hal_msp.c **** 701 .loc 1 319 5 is_stmt 1 view .LVU188 702 000c 064A ldr r2, .L43+4 703 000e 9369 ldr r3, [r2, #24] 704 0010 23F48053 bic r3, r3, #4096 705 0014 9361 str r3, [r2, #24] 326:Core/Src/stm32f3xx_hal_msp.c **** 706 .loc 1 326 5 view .LVU189 707 0016 E021 movs r1, #224 708 0018 4FF09040 mov r0, #1207959552 709 .LVL40: 326:Core/Src/stm32f3xx_hal_msp.c **** 710 .loc 1 326 5 is_stmt 0 view .LVU190 711 001c FFF7FEFF bl HAL_GPIO_DeInit 712 .LVL41: 713 .loc 1 333 1 view .LVU191 714 0020 F3E7 b .L39 715 .L44: 716 0022 00BF .align 2 717 .L43: 718 0024 00300140 .word 1073819648 719 0028 00100240 .word 1073876992 720 .cfi_endproc 721 .LFE136: 723 .text 724 .Letext0: 725 .file 2 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 726 .file 3 "/home/david/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-non 727 .file 4 "/home/david/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-non 728 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 729 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 730 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" 731 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 732 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" 733 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" 734 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" 735 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" ARM GAS /tmp/cc68VAom.s page 22 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f3xx_hal_msp.c /tmp/cc68VAom.s:21 .text.HAL_MspInit:0000000000000000 $t /tmp/cc68VAom.s:27 .text.HAL_MspInit:0000000000000000 HAL_MspInit /tmp/cc68VAom.s:75 .text.HAL_MspInit:000000000000002c $d /tmp/cc68VAom.s:80 .text.HAL_CAN_MspInit:0000000000000000 $t /tmp/cc68VAom.s:86 .text.HAL_CAN_MspInit:0000000000000000 HAL_CAN_MspInit /tmp/cc68VAom.s:195 .text.HAL_CAN_MspInit:0000000000000074 $d /tmp/cc68VAom.s:200 .text.HAL_CAN_MspDeInit:0000000000000000 $t /tmp/cc68VAom.s:206 .text.HAL_CAN_MspDeInit:0000000000000000 HAL_CAN_MspDeInit /tmp/cc68VAom.s:252 .text.HAL_CAN_MspDeInit:000000000000002c $d /tmp/cc68VAom.s:258 .text.HAL_I2C_MspInit:0000000000000000 $t /tmp/cc68VAom.s:264 .text.HAL_I2C_MspInit:0000000000000000 HAL_I2C_MspInit /tmp/cc68VAom.s:467 .text.HAL_I2C_MspInit:00000000000000d4 $d /tmp/cc68VAom.s:475 .text.HAL_I2C_MspDeInit:0000000000000000 $t /tmp/cc68VAom.s:481 .text.HAL_I2C_MspDeInit:0000000000000000 HAL_I2C_MspDeInit /tmp/cc68VAom.s:553 .text.HAL_I2C_MspDeInit:000000000000005c $d /tmp/cc68VAom.s:560 .text.HAL_SPI_MspInit:0000000000000000 $t /tmp/cc68VAom.s:566 .text.HAL_SPI_MspInit:0000000000000000 HAL_SPI_MspInit /tmp/cc68VAom.s:665 .text.HAL_SPI_MspInit:0000000000000064 $d /tmp/cc68VAom.s:670 .text.HAL_SPI_MspDeInit:0000000000000000 $t /tmp/cc68VAom.s:676 .text.HAL_SPI_MspDeInit:0000000000000000 HAL_SPI_MspDeInit /tmp/cc68VAom.s:718 .text.HAL_SPI_MspDeInit:0000000000000024 $d UNDEFINED SYMBOLS HAL_GPIO_Init HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ HAL_GPIO_DeInit HAL_NVIC_DisableIRQ