ARM GAS  /tmp/ccM8v3Tj.s 			page 1


   1              		.cpu cortex-m4
   2              		.arch armv7e-m
   3              		.fpu fpv4-sp-d16
   4              		.eabi_attribute 27, 1
   5              		.eabi_attribute 28, 1
   6              		.eabi_attribute 20, 1
   7              		.eabi_attribute 21, 1
   8              		.eabi_attribute 23, 3
   9              		.eabi_attribute 24, 1
  10              		.eabi_attribute 25, 1
  11              		.eabi_attribute 26, 1
  12              		.eabi_attribute 30, 1
  13              		.eabi_attribute 34, 1
  14              		.eabi_attribute 18, 4
  15              		.file	"main.c"
  16              		.text
  17              	.Ltext0:
  18              		.cfi_sections	.debug_frame
  19              		.file 1 "Core/Src/main.c"
  20              		.section	.text.MX_GPIO_Init,"ax",%progbits
  21              		.align	1
  22              		.syntax unified
  23              		.thumb
  24              		.thumb_func
  26              	MX_GPIO_Init:
  27              	.LFB136:
   1:Core/Src/main.c **** /* USER CODE BEGIN Header */
   2:Core/Src/main.c **** /**
   3:Core/Src/main.c ****   ******************************************************************************
   4:Core/Src/main.c ****   * @file           : main.c
   5:Core/Src/main.c ****   * @brief          : Main program body
   6:Core/Src/main.c ****   ******************************************************************************
   7:Core/Src/main.c ****   * @attention
   8:Core/Src/main.c ****   *
   9:Core/Src/main.c ****   * Copyright (c) 2023 STMicroelectronics.
  10:Core/Src/main.c ****   * All rights reserved.
  11:Core/Src/main.c ****   *
  12:Core/Src/main.c ****   * This software is licensed under terms that can be found in the LICENSE file
  13:Core/Src/main.c ****   * in the root directory of this software component.
  14:Core/Src/main.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  15:Core/Src/main.c ****   *
  16:Core/Src/main.c ****   ******************************************************************************
  17:Core/Src/main.c ****   */
  18:Core/Src/main.c **** /* USER CODE END Header */
  19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/
  20:Core/Src/main.c **** #include "main.h"
  21:Core/Src/main.c **** 
  22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
  23:Core/Src/main.c **** /* USER CODE BEGIN Includes */
  24:Core/Src/main.c **** #include "ADBMS_Abstraction.h"
  25:Core/Src/main.c **** #include "ADBMS_CMD_MAKROS.h"
  26:Core/Src/main.c **** #include "AMS_HighLevel.h"
  27:Core/Src/main.c **** #include "AMS_CAN.h"
  28:Core/Src/main.c **** #include "Testbench.h"
  29:Core/Src/main.c **** /* USER CODE END Includes */
  30:Core/Src/main.c **** 
  31:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
ARM GAS  /tmp/ccM8v3Tj.s 			page 2


  32:Core/Src/main.c **** /* USER CODE BEGIN PTD */
  33:Core/Src/main.c **** 
  34:Core/Src/main.c **** /* USER CODE END PTD */
  35:Core/Src/main.c **** 
  36:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/
  37:Core/Src/main.c **** /* USER CODE BEGIN PD */
  38:Core/Src/main.c **** #define N_SENSORS 12
  39:Core/Src/main.c **** #define eAdress 0xAE
  40:Core/Src/main.c **** /* USER CODE END PD */
  41:Core/Src/main.c **** 
  42:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/
  43:Core/Src/main.c **** /* USER CODE BEGIN PM */
  44:Core/Src/main.c **** 
  45:Core/Src/main.c **** /* USER CODE END PM */
  46:Core/Src/main.c **** 
  47:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/
  48:Core/Src/main.c **** CAN_HandleTypeDef hcan;
  49:Core/Src/main.c **** 
  50:Core/Src/main.c **** I2C_HandleTypeDef hi2c1;
  51:Core/Src/main.c **** I2C_HandleTypeDef hi2c2;
  52:Core/Src/main.c **** 
  53:Core/Src/main.c **** SPI_HandleTypeDef hspi1;
  54:Core/Src/main.c **** 
  55:Core/Src/main.c **** /* USER CODE BEGIN PV */
  56:Core/Src/main.c **** static uint32_t last_error = 0;
  57:Core/Src/main.c **** extern uint8_t canTestData;
  58:Core/Src/main.c **** extern int PENDING_MESSAGE_HANDLE;
  59:Core/Src/main.c **** extern
  60:Core/Src/main.c **** /* USER CODE END PV */
  61:Core/Src/main.c **** 
  62:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
  63:Core/Src/main.c **** void SystemClock_Config(void);
  64:Core/Src/main.c **** static void MX_GPIO_Init(void);
  65:Core/Src/main.c **** static void MX_CAN_Init(void);
  66:Core/Src/main.c **** static void MX_I2C1_Init(void);
  67:Core/Src/main.c **** static void MX_I2C2_Init(void);
  68:Core/Src/main.c **** static void MX_SPI1_Init(void);
  69:Core/Src/main.c **** /* USER CODE BEGIN PFP */
  70:Core/Src/main.c **** void lowPowerLoop(void);
  71:Core/Src/main.c **** HAL_StatusTypeDef sensor_init(int);
  72:Core/Src/main.c **** HAL_StatusTypeDef sensor_read(int, uint16_t*);
  73:Core/Src/main.c **** uint8_t readeeprom(uint16_t address);
  74:Core/Src/main.c **** void writeeeprom(uint16_t address, uint8_t data);
  75:Core/Src/main.c **** 
  76:Core/Src/main.c **** 
  77:Core/Src/main.c **** /* USER CODE END PFP */
  78:Core/Src/main.c **** 
  79:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
  80:Core/Src/main.c **** /* USER CODE BEGIN 0 */
  81:Core/Src/main.c **** 
  82:Core/Src/main.c **** /* USER CODE END 0 */
  83:Core/Src/main.c **** 
  84:Core/Src/main.c **** /**
  85:Core/Src/main.c ****   * @brief  The application entry point.
  86:Core/Src/main.c ****   * @retval int
  87:Core/Src/main.c ****   */
  88:Core/Src/main.c **** int main(void)
ARM GAS  /tmp/ccM8v3Tj.s 			page 3


  89:Core/Src/main.c **** {
  90:Core/Src/main.c ****   /* USER CODE BEGIN 1 */
  91:Core/Src/main.c **** 
  92:Core/Src/main.c ****   /* USER CODE END 1 */
  93:Core/Src/main.c **** 
  94:Core/Src/main.c ****   /* MCU Configuration--------------------------------------------------------*/
  95:Core/Src/main.c **** 
  96:Core/Src/main.c ****   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  97:Core/Src/main.c ****   HAL_Init();
  98:Core/Src/main.c **** 
  99:Core/Src/main.c ****   /* USER CODE BEGIN Init */
 100:Core/Src/main.c **** 
 101:Core/Src/main.c ****   /* USER CODE END Init */
 102:Core/Src/main.c **** 
 103:Core/Src/main.c ****   /* Configure the system clock */
 104:Core/Src/main.c ****   SystemClock_Config();
 105:Core/Src/main.c **** 
 106:Core/Src/main.c ****   /* USER CODE BEGIN SysInit */
 107:Core/Src/main.c **** 
 108:Core/Src/main.c ****   /* USER CODE END SysInit */
 109:Core/Src/main.c **** 
 110:Core/Src/main.c ****   /* Initialize all configured peripherals */
 111:Core/Src/main.c ****   MX_GPIO_Init();
 112:Core/Src/main.c ****   MX_CAN_Init();
 113:Core/Src/main.c ****   MX_I2C1_Init();
 114:Core/Src/main.c ****   MX_I2C2_Init();
 115:Core/Src/main.c ****   MX_SPI1_Init();
 116:Core/Src/main.c ****   /* USER CODE BEGIN 2 */
 117:Core/Src/main.c ****  // eepromInitParameters();
 118:Core/Src/main.c ****   for (int i = 0; i < N_SENSORS; i++) {
 119:Core/Src/main.c ****      if (sensor_init(i) != HAL_OK) {
 120:Core/Src/main.c ****        last_error = HAL_GetTick();
 121:Core/Src/main.c ****      }
 122:Core/Src/main.c ****    }
 123:Core/Src/main.c **** 
 124:Core/Src/main.c ****    AMS_Init(&hspi1);
 125:Core/Src/main.c ****    ams_can_init(&hcan, &hcan);
 126:Core/Src/main.c ****    //amsConfigAuxMeasurement(9);
 127:Core/Src/main.c **** 
 128:Core/Src/main.c **** //   startUARTConsole(&huart2, &module);
 129:Core/Src/main.c **** //   htim2.Instance->CCR1 = 0x01FF;
 130:Core/Src/main.c **** //   HAL_TIM_Base_Start(&htim2);
 131:Core/Src/main.c ****   /* USER CODE END 2 */
 132:Core/Src/main.c **** 
 133:Core/Src/main.c ****   /* Infinite loop */
 134:Core/Src/main.c ****   /* USER CODE BEGIN WHILE */
 135:Core/Src/main.c ****    writeeeprom(1, 69);
 136:Core/Src/main.c ****    uint16_t temperatures[N_SENSORS];
 137:Core/Src/main.c ****    AMS_Loop();
 138:Core/Src/main.c ****    while (1){
 139:Core/Src/main.c **** 	 if(BMS_IN_TEST_MODE == 1 ){ ////&& PENDING_MESSAGE_HANDLE == 1
 140:Core/Src/main.c **** 			   testLoop(&canTestData);
 141:Core/Src/main.c ****     /* USER CODE END WHILE */
 142:Core/Src/main.c ****     /* USER CODE BEGIN 3 */
 143:Core/Src/main.c **** 
 144:Core/Src/main.c **** 	  for (int i = 0; i < N_SENSORS; i++) {
 145:Core/Src/main.c **** 	        if (sensor_read(i, &temperatures[i]) != HAL_OK) {
ARM GAS  /tmp/ccM8v3Tj.s 			page 4


 146:Core/Src/main.c **** 	          sensor_init(i);
 147:Core/Src/main.c **** 	          last_error = HAL_GetTick();
 148:Core/Src/main.c **** 	        }
 149:Core/Src/main.c **** 	   }
 150:Core/Src/main.c **** 	  if(BMS_IN_TEST_MODE != 1){
 151:Core/Src/main.c **** 		  ams_can_send_heartbeat(); //for testing
 152:Core/Src/main.c **** 	  }
 153:Core/Src/main.c **** 
 154:Core/Src/main.c **** 	 }
 155:Core/Src/main.c ****   }
 156:Core/Src/main.c **** 
 157:Core/Src/main.c ****   /* USER CODE END 3 */
 158:Core/Src/main.c **** }
 159:Core/Src/main.c **** 
 160:Core/Src/main.c **** /**
 161:Core/Src/main.c ****   * @brief System Clock Configuration
 162:Core/Src/main.c ****   * @retval None
 163:Core/Src/main.c ****   */
 164:Core/Src/main.c **** void SystemClock_Config(void)
 165:Core/Src/main.c **** {
 166:Core/Src/main.c ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 167:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 168:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 169:Core/Src/main.c **** 
 170:Core/Src/main.c ****   /** Initializes the RCC Oscillators according to the specified parameters
 171:Core/Src/main.c ****   * in the RCC_OscInitTypeDef structure.
 172:Core/Src/main.c ****   */
 173:Core/Src/main.c ****   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE;
 174:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 175:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 176:Core/Src/main.c ****   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 177:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
 178:Core/Src/main.c ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 179:Core/Src/main.c ****   {
 180:Core/Src/main.c ****     Error_Handler();
 181:Core/Src/main.c ****   }
 182:Core/Src/main.c **** 
 183:Core/Src/main.c ****   /** Initializes the CPU, AHB and APB buses clocks
 184:Core/Src/main.c ****   */
 185:Core/Src/main.c ****   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 186:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 187:Core/Src/main.c ****   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
 188:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 189:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 190:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 191:Core/Src/main.c **** 
 192:Core/Src/main.c ****   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 193:Core/Src/main.c ****   {
 194:Core/Src/main.c ****     Error_Handler();
 195:Core/Src/main.c ****   }
 196:Core/Src/main.c ****   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_I2C2;
 197:Core/Src/main.c ****   PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI;
 198:Core/Src/main.c ****   PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_HSI;
 199:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 200:Core/Src/main.c ****   {
 201:Core/Src/main.c ****     Error_Handler();
 202:Core/Src/main.c ****   }
ARM GAS  /tmp/ccM8v3Tj.s 			page 5


 203:Core/Src/main.c **** }
 204:Core/Src/main.c **** 
 205:Core/Src/main.c **** /**
 206:Core/Src/main.c ****   * @brief CAN Initialization Function
 207:Core/Src/main.c ****   * @param None
 208:Core/Src/main.c ****   * @retval None
 209:Core/Src/main.c ****   */
 210:Core/Src/main.c **** static void MX_CAN_Init(void)
 211:Core/Src/main.c **** {
 212:Core/Src/main.c **** 
 213:Core/Src/main.c ****   /* USER CODE BEGIN CAN_Init 0 */
 214:Core/Src/main.c **** 
 215:Core/Src/main.c ****   /* USER CODE END CAN_Init 0 */
 216:Core/Src/main.c **** 
 217:Core/Src/main.c ****   /* USER CODE BEGIN CAN_Init 1 */
 218:Core/Src/main.c **** 
 219:Core/Src/main.c ****   /* USER CODE END CAN_Init 1 */
 220:Core/Src/main.c ****   hcan.Instance = CAN;
 221:Core/Src/main.c ****   hcan.Init.Prescaler = 2;
 222:Core/Src/main.c ****   hcan.Init.Mode = CAN_MODE_NORMAL;
 223:Core/Src/main.c ****   hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
 224:Core/Src/main.c ****   hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
 225:Core/Src/main.c ****   hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
 226:Core/Src/main.c ****   hcan.Init.TimeTriggeredMode = DISABLE;
 227:Core/Src/main.c ****   hcan.Init.AutoBusOff = ENABLE;
 228:Core/Src/main.c ****   hcan.Init.AutoWakeUp = DISABLE;
 229:Core/Src/main.c ****   hcan.Init.AutoRetransmission = ENABLE;
 230:Core/Src/main.c ****   hcan.Init.ReceiveFifoLocked = DISABLE;
 231:Core/Src/main.c ****   hcan.Init.TransmitFifoPriority = DISABLE;
 232:Core/Src/main.c ****   if (HAL_CAN_Init(&hcan) != HAL_OK)
 233:Core/Src/main.c ****   {
 234:Core/Src/main.c ****     Error_Handler();
 235:Core/Src/main.c ****   }
 236:Core/Src/main.c ****   /* USER CODE BEGIN CAN_Init 2 */
 237:Core/Src/main.c **** 
 238:Core/Src/main.c ****   /* USER CODE END CAN_Init 2 */
 239:Core/Src/main.c **** 
 240:Core/Src/main.c **** }
 241:Core/Src/main.c **** 
 242:Core/Src/main.c **** /**
 243:Core/Src/main.c ****   * @brief I2C1 Initialization Function
 244:Core/Src/main.c ****   * @param None
 245:Core/Src/main.c ****   * @retval None
 246:Core/Src/main.c ****   */
 247:Core/Src/main.c **** static void MX_I2C1_Init(void)
 248:Core/Src/main.c **** {
 249:Core/Src/main.c **** 
 250:Core/Src/main.c ****   /* USER CODE BEGIN I2C1_Init 0 */
 251:Core/Src/main.c **** 
 252:Core/Src/main.c ****   /* USER CODE END I2C1_Init 0 */
 253:Core/Src/main.c **** 
 254:Core/Src/main.c ****   /* USER CODE BEGIN I2C1_Init 1 */
 255:Core/Src/main.c **** 
 256:Core/Src/main.c ****   /* USER CODE END I2C1_Init 1 */
 257:Core/Src/main.c ****   hi2c1.Instance = I2C1;
 258:Core/Src/main.c ****   hi2c1.Init.Timing = 0x2000090E;
 259:Core/Src/main.c ****   hi2c1.Init.OwnAddress1 = 0;
ARM GAS  /tmp/ccM8v3Tj.s 			page 6


 260:Core/Src/main.c ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 261:Core/Src/main.c ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 262:Core/Src/main.c ****   hi2c1.Init.OwnAddress2 = 0;
 263:Core/Src/main.c ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 264:Core/Src/main.c ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 265:Core/Src/main.c ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 266:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 267:Core/Src/main.c ****   {
 268:Core/Src/main.c ****     Error_Handler();
 269:Core/Src/main.c ****   }
 270:Core/Src/main.c **** 
 271:Core/Src/main.c ****   /** Configure Analogue filter
 272:Core/Src/main.c ****   */
 273:Core/Src/main.c ****   if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
 274:Core/Src/main.c ****   {
 275:Core/Src/main.c ****     Error_Handler();
 276:Core/Src/main.c ****   }
 277:Core/Src/main.c **** 
 278:Core/Src/main.c ****   /** Configure Digital filter
 279:Core/Src/main.c ****   */
 280:Core/Src/main.c ****   if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
 281:Core/Src/main.c ****   {
 282:Core/Src/main.c ****     Error_Handler();
 283:Core/Src/main.c ****   }
 284:Core/Src/main.c ****   /* USER CODE BEGIN I2C1_Init 2 */
 285:Core/Src/main.c **** 
 286:Core/Src/main.c ****   /* USER CODE END I2C1_Init 2 */
 287:Core/Src/main.c **** 
 288:Core/Src/main.c **** }
 289:Core/Src/main.c **** 
 290:Core/Src/main.c **** /**
 291:Core/Src/main.c ****   * @brief I2C2 Initialization Function
 292:Core/Src/main.c ****   * @param None
 293:Core/Src/main.c ****   * @retval None
 294:Core/Src/main.c ****   */
 295:Core/Src/main.c **** static void MX_I2C2_Init(void)
 296:Core/Src/main.c **** {
 297:Core/Src/main.c **** 
 298:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 0 */
 299:Core/Src/main.c **** 
 300:Core/Src/main.c ****   /* USER CODE END I2C2_Init 0 */
 301:Core/Src/main.c **** 
 302:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 1 */
 303:Core/Src/main.c **** 
 304:Core/Src/main.c ****   /* USER CODE END I2C2_Init 1 */
 305:Core/Src/main.c ****   hi2c2.Instance = I2C2;
 306:Core/Src/main.c ****   hi2c2.Init.Timing = 0x2000090E;
 307:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
 308:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 309:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 310:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
 311:Core/Src/main.c ****   hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 312:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 313:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 314:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
 315:Core/Src/main.c ****   {
 316:Core/Src/main.c ****     Error_Handler();
ARM GAS  /tmp/ccM8v3Tj.s 			page 7


 317:Core/Src/main.c ****   }
 318:Core/Src/main.c **** 
 319:Core/Src/main.c ****   /** Configure Analogue filter
 320:Core/Src/main.c ****   */
 321:Core/Src/main.c ****   if (HAL_I2CEx_ConfigAnalogFilter(&hi2c2, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
 322:Core/Src/main.c ****   {
 323:Core/Src/main.c ****     Error_Handler();
 324:Core/Src/main.c ****   }
 325:Core/Src/main.c **** 
 326:Core/Src/main.c ****   /** Configure Digital filter
 327:Core/Src/main.c ****   */
 328:Core/Src/main.c ****   if (HAL_I2CEx_ConfigDigitalFilter(&hi2c2, 0) != HAL_OK)
 329:Core/Src/main.c ****   {
 330:Core/Src/main.c ****     Error_Handler();
 331:Core/Src/main.c ****   }
 332:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 2 */
 333:Core/Src/main.c **** 
 334:Core/Src/main.c ****   /* USER CODE END I2C2_Init 2 */
 335:Core/Src/main.c **** 
 336:Core/Src/main.c **** }
 337:Core/Src/main.c **** 
 338:Core/Src/main.c **** /**
 339:Core/Src/main.c ****   * @brief SPI1 Initialization Function
 340:Core/Src/main.c ****   * @param None
 341:Core/Src/main.c ****   * @retval None
 342:Core/Src/main.c ****   */
 343:Core/Src/main.c **** static void MX_SPI1_Init(void)
 344:Core/Src/main.c **** {
 345:Core/Src/main.c **** 
 346:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 0 */
 347:Core/Src/main.c **** 
 348:Core/Src/main.c ****   /* USER CODE END SPI1_Init 0 */
 349:Core/Src/main.c **** 
 350:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 1 */
 351:Core/Src/main.c **** 
 352:Core/Src/main.c ****   /* USER CODE END SPI1_Init 1 */
 353:Core/Src/main.c ****   /* SPI1 parameter configuration*/
 354:Core/Src/main.c ****   hspi1.Instance = SPI1;
 355:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
 356:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_2LINES;
 357:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
 358:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
 359:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
 360:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
 361:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
 362:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 363:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
 364:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
 365:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 7;
 366:Core/Src/main.c ****   hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
 367:Core/Src/main.c ****   hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
 368:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
 369:Core/Src/main.c ****   {
 370:Core/Src/main.c ****     Error_Handler();
 371:Core/Src/main.c ****   }
 372:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 2 */
 373:Core/Src/main.c **** 
ARM GAS  /tmp/ccM8v3Tj.s 			page 8


 374:Core/Src/main.c ****   /* USER CODE END SPI1_Init 2 */
 375:Core/Src/main.c **** 
 376:Core/Src/main.c **** }
 377:Core/Src/main.c **** 
 378:Core/Src/main.c **** /**
 379:Core/Src/main.c ****   * @brief GPIO Initialization Function
 380:Core/Src/main.c ****   * @param None
 381:Core/Src/main.c ****   * @retval None
 382:Core/Src/main.c ****   */
 383:Core/Src/main.c **** static void MX_GPIO_Init(void)
 384:Core/Src/main.c **** {
  28              		.loc 1 384 1 view -0
  29              		.cfi_startproc
  30              		@ args = 0, pretend = 0, frame = 32
  31              		@ frame_needed = 0, uses_anonymous_args = 0
  32 0000 70B5     		push	{r4, r5, r6, lr}
  33              		.cfi_def_cfa_offset 16
  34              		.cfi_offset 4, -16
  35              		.cfi_offset 5, -12
  36              		.cfi_offset 6, -8
  37              		.cfi_offset 14, -4
  38 0002 88B0     		sub	sp, sp, #32
  39              		.cfi_def_cfa_offset 48
 385:Core/Src/main.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
  40              		.loc 1 385 3 view .LVU1
  41              		.loc 1 385 20 is_stmt 0 view .LVU2
  42 0004 0024     		movs	r4, #0
  43 0006 0394     		str	r4, [sp, #12]
  44 0008 0494     		str	r4, [sp, #16]
  45 000a 0594     		str	r4, [sp, #20]
  46 000c 0694     		str	r4, [sp, #24]
  47 000e 0794     		str	r4, [sp, #28]
 386:Core/Src/main.c **** 
 387:Core/Src/main.c ****   /* GPIO Ports Clock Enable */
 388:Core/Src/main.c ****   __HAL_RCC_GPIOF_CLK_ENABLE();
  48              		.loc 1 388 3 is_stmt 1 view .LVU3
  49              	.LBB4:
  50              		.loc 1 388 3 view .LVU4
  51              		.loc 1 388 3 view .LVU5
  52 0010 204B     		ldr	r3, .L3
  53 0012 5A69     		ldr	r2, [r3, #20]
  54 0014 42F48002 		orr	r2, r2, #4194304
  55 0018 5A61     		str	r2, [r3, #20]
  56              		.loc 1 388 3 view .LVU6
  57 001a 5A69     		ldr	r2, [r3, #20]
  58 001c 02F48002 		and	r2, r2, #4194304
  59 0020 0092     		str	r2, [sp]
  60              		.loc 1 388 3 view .LVU7
  61 0022 009A     		ldr	r2, [sp]
  62              	.LBE4:
  63              		.loc 1 388 3 view .LVU8
 389:Core/Src/main.c ****   __HAL_RCC_GPIOA_CLK_ENABLE();
  64              		.loc 1 389 3 view .LVU9
  65              	.LBB5:
  66              		.loc 1 389 3 view .LVU10
  67              		.loc 1 389 3 view .LVU11
  68 0024 5A69     		ldr	r2, [r3, #20]
ARM GAS  /tmp/ccM8v3Tj.s 			page 9


  69 0026 42F40032 		orr	r2, r2, #131072
  70 002a 5A61     		str	r2, [r3, #20]
  71              		.loc 1 389 3 view .LVU12
  72 002c 5A69     		ldr	r2, [r3, #20]
  73 002e 02F40032 		and	r2, r2, #131072
  74 0032 0192     		str	r2, [sp, #4]
  75              		.loc 1 389 3 view .LVU13
  76 0034 019A     		ldr	r2, [sp, #4]
  77              	.LBE5:
  78              		.loc 1 389 3 view .LVU14
 390:Core/Src/main.c ****   __HAL_RCC_GPIOB_CLK_ENABLE();
  79              		.loc 1 390 3 view .LVU15
  80              	.LBB6:
  81              		.loc 1 390 3 view .LVU16
  82              		.loc 1 390 3 view .LVU17
  83 0036 5A69     		ldr	r2, [r3, #20]
  84 0038 42F48022 		orr	r2, r2, #262144
  85 003c 5A61     		str	r2, [r3, #20]
  86              		.loc 1 390 3 view .LVU18
  87 003e 5B69     		ldr	r3, [r3, #20]
  88 0040 03F48023 		and	r3, r3, #262144
  89 0044 0293     		str	r3, [sp, #8]
  90              		.loc 1 390 3 view .LVU19
  91 0046 029B     		ldr	r3, [sp, #8]
  92              	.LBE6:
  93              		.loc 1 390 3 view .LVU20
 391:Core/Src/main.c **** 
 392:Core/Src/main.c ****   /*Configure GPIO pin Output Level */
 393:Core/Src/main.c ****   HAL_GPIO_WritePin(GPIOA, CSB_Pin|Status_3_Pin, GPIO_PIN_RESET);
  94              		.loc 1 393 3 view .LVU21
  95 0048 2246     		mov	r2, r4
  96 004a 4FF48871 		mov	r1, #272
  97 004e 4FF09040 		mov	r0, #1207959552
  98 0052 FFF7FEFF 		bl	HAL_GPIO_WritePin
  99              	.LVL0:
 394:Core/Src/main.c **** 
 395:Core/Src/main.c ****   /*Configure GPIO pin Output Level */
 396:Core/Src/main.c ****   HAL_GPIO_WritePin(GPIOB, Status_0_Pin|Status_1_Pin|Status_2_Pin, GPIO_PIN_RESET);
 100              		.loc 1 396 3 view .LVU22
 101 0056 104D     		ldr	r5, .L3+4
 102 0058 2246     		mov	r2, r4
 103 005a 4FF46041 		mov	r1, #57344
 104 005e 2846     		mov	r0, r5
 105 0060 FFF7FEFF 		bl	HAL_GPIO_WritePin
 106              	.LVL1:
 397:Core/Src/main.c **** 
 398:Core/Src/main.c ****   /*Configure GPIO pins : CSB_Pin Status_3_Pin */
 399:Core/Src/main.c ****   GPIO_InitStruct.Pin = CSB_Pin|Status_3_Pin;
 107              		.loc 1 399 3 view .LVU23
 108              		.loc 1 399 23 is_stmt 0 view .LVU24
 109 0064 4FF48873 		mov	r3, #272
 110 0068 0393     		str	r3, [sp, #12]
 400:Core/Src/main.c ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 111              		.loc 1 400 3 is_stmt 1 view .LVU25
 112              		.loc 1 400 24 is_stmt 0 view .LVU26
 113 006a 0126     		movs	r6, #1
 114 006c 0496     		str	r6, [sp, #16]
ARM GAS  /tmp/ccM8v3Tj.s 			page 10


 401:Core/Src/main.c ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
 115              		.loc 1 401 3 is_stmt 1 view .LVU27
 116              		.loc 1 401 24 is_stmt 0 view .LVU28
 117 006e 0594     		str	r4, [sp, #20]
 402:Core/Src/main.c ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 118              		.loc 1 402 3 is_stmt 1 view .LVU29
 119              		.loc 1 402 25 is_stmt 0 view .LVU30
 120 0070 0694     		str	r4, [sp, #24]
 403:Core/Src/main.c ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 121              		.loc 1 403 3 is_stmt 1 view .LVU31
 122 0072 03A9     		add	r1, sp, #12
 123 0074 4FF09040 		mov	r0, #1207959552
 124 0078 FFF7FEFF 		bl	HAL_GPIO_Init
 125              	.LVL2:
 404:Core/Src/main.c **** 
 405:Core/Src/main.c ****   /*Configure GPIO pins : Status_0_Pin Status_1_Pin Status_2_Pin */
 406:Core/Src/main.c ****   GPIO_InitStruct.Pin = Status_0_Pin|Status_1_Pin|Status_2_Pin;
 126              		.loc 1 406 3 view .LVU32
 127              		.loc 1 406 23 is_stmt 0 view .LVU33
 128 007c 4FF46043 		mov	r3, #57344
 129 0080 0393     		str	r3, [sp, #12]
 407:Core/Src/main.c ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 130              		.loc 1 407 3 is_stmt 1 view .LVU34
 131              		.loc 1 407 24 is_stmt 0 view .LVU35
 132 0082 0496     		str	r6, [sp, #16]
 408:Core/Src/main.c ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
 133              		.loc 1 408 3 is_stmt 1 view .LVU36
 134              		.loc 1 408 24 is_stmt 0 view .LVU37
 135 0084 0594     		str	r4, [sp, #20]
 409:Core/Src/main.c ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 136              		.loc 1 409 3 is_stmt 1 view .LVU38
 137              		.loc 1 409 25 is_stmt 0 view .LVU39
 138 0086 0694     		str	r4, [sp, #24]
 410:Core/Src/main.c ****   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 139              		.loc 1 410 3 is_stmt 1 view .LVU40
 140 0088 03A9     		add	r1, sp, #12
 141 008a 2846     		mov	r0, r5
 142 008c FFF7FEFF 		bl	HAL_GPIO_Init
 143              	.LVL3:
 411:Core/Src/main.c **** 
 412:Core/Src/main.c **** }
 144              		.loc 1 412 1 is_stmt 0 view .LVU41
 145 0090 08B0     		add	sp, sp, #32
 146              		.cfi_def_cfa_offset 16
 147              		@ sp needed
 148 0092 70BD     		pop	{r4, r5, r6, pc}
 149              	.L4:
 150              		.align	2
 151              	.L3:
 152 0094 00100240 		.word	1073876992
 153 0098 00040048 		.word	1207960576
 154              		.cfi_endproc
 155              	.LFE136:
 157              		.section	.text.sensor_init,"ax",%progbits
 158              		.align	1
 159              		.global	sensor_init
 160              		.syntax unified
ARM GAS  /tmp/ccM8v3Tj.s 			page 11


 161              		.thumb
 162              		.thumb_func
 164              	sensor_init:
 165              	.LVL4:
 166              	.LFB137:
 413:Core/Src/main.c **** 
 414:Core/Src/main.c **** /* USER CODE BEGIN 4 */
 415:Core/Src/main.c **** HAL_StatusTypeDef sensor_init(int n) {
 167              		.loc 1 415 38 is_stmt 1 view -0
 168              		.cfi_startproc
 169              		@ args = 0, pretend = 0, frame = 8
 170              		@ frame_needed = 0, uses_anonymous_args = 0
 171              		.loc 1 415 38 is_stmt 0 view .LVU43
 172 0000 00B5     		push	{lr}
 173              		.cfi_def_cfa_offset 4
 174              		.cfi_offset 14, -4
 175 0002 85B0     		sub	sp, sp, #20
 176              		.cfi_def_cfa_offset 24
 416:Core/Src/main.c ****   uint16_t addr = (0b1000000 | n) << 1;
 177              		.loc 1 416 3 is_stmt 1 view .LVU44
 178              		.loc 1 416 35 is_stmt 0 view .LVU45
 179 0004 4100     		lsls	r1, r0, #1
 180 0006 41F08001 		orr	r1, r1, #128
 181 000a 09B2     		sxth	r1, r1
 182              		.loc 1 416 12 view .LVU46
 183 000c 89B2     		uxth	r1, r1
 184              	.LVL5:
 417:Core/Src/main.c ****   uint8_t data[] = {0};
 185              		.loc 1 417 3 is_stmt 1 view .LVU47
 186              		.loc 1 417 11 is_stmt 0 view .LVU48
 187 000e 0023     		movs	r3, #0
 188 0010 8DF80C30 		strb	r3, [sp, #12]
 418:Core/Src/main.c ****   return HAL_I2C_Master_Transmit(&hi2c1, addr, data, sizeof(data), 100);
 189              		.loc 1 418 3 is_stmt 1 view .LVU49
 190              		.loc 1 418 10 is_stmt 0 view .LVU50
 191 0014 6423     		movs	r3, #100
 192 0016 0093     		str	r3, [sp]
 193 0018 0123     		movs	r3, #1
 194 001a 03AA     		add	r2, sp, #12
 195 001c 0248     		ldr	r0, .L7
 196              	.LVL6:
 197              		.loc 1 418 10 view .LVU51
 198 001e FFF7FEFF 		bl	HAL_I2C_Master_Transmit
 199              	.LVL7:
 419:Core/Src/main.c **** }
 200              		.loc 1 419 1 view .LVU52
 201 0022 05B0     		add	sp, sp, #20
 202              		.cfi_def_cfa_offset 4
 203              		@ sp needed
 204 0024 5DF804FB 		ldr	pc, [sp], #4
 205              	.L8:
 206              		.align	2
 207              	.L7:
 208 0028 00000000 		.word	hi2c1
 209              		.cfi_endproc
 210              	.LFE137:
 212              		.section	.text.sensor_read,"ax",%progbits
ARM GAS  /tmp/ccM8v3Tj.s 			page 12


 213              		.align	1
 214              		.global	sensor_read
 215              		.syntax unified
 216              		.thumb
 217              		.thumb_func
 219              	sensor_read:
 220              	.LVL8:
 221              	.LFB138:
 420:Core/Src/main.c **** 
 421:Core/Src/main.c **** HAL_StatusTypeDef sensor_read(int n, uint16_t *res) {
 222              		.loc 1 421 53 is_stmt 1 view -0
 223              		.cfi_startproc
 224              		@ args = 0, pretend = 0, frame = 8
 225              		@ frame_needed = 0, uses_anonymous_args = 0
 226              		.loc 1 421 53 is_stmt 0 view .LVU54
 227 0000 10B5     		push	{r4, lr}
 228              		.cfi_def_cfa_offset 8
 229              		.cfi_offset 4, -8
 230              		.cfi_offset 14, -4
 231 0002 84B0     		sub	sp, sp, #16
 232              		.cfi_def_cfa_offset 24
 233 0004 0C46     		mov	r4, r1
 422:Core/Src/main.c ****   uint16_t addr = (0b1000000 | n) << 1;
 234              		.loc 1 422 3 is_stmt 1 view .LVU55
 235              		.loc 1 422 35 is_stmt 0 view .LVU56
 236 0006 4000     		lsls	r0, r0, #1
 237              	.LVL9:
 238              		.loc 1 422 35 view .LVU57
 239 0008 00B2     		sxth	r0, r0
 240              	.LVL10:
 423:Core/Src/main.c ****   addr |= 1; // Read
 241              		.loc 1 423 3 is_stmt 1 view .LVU58
 242              		.loc 1 423 8 is_stmt 0 view .LVU59
 243 000a 40F08100 		orr	r0, r0, #129
 244              	.LVL11:
 424:Core/Src/main.c ****   uint8_t result[2];
 245              		.loc 1 424 3 is_stmt 1 view .LVU60
 425:Core/Src/main.c ****   HAL_StatusTypeDef status =
 246              		.loc 1 425 3 view .LVU61
 426:Core/Src/main.c ****       HAL_I2C_Master_Receive(&hi2c1, addr, result, sizeof(result), 100);
 247              		.loc 1 426 7 is_stmt 0 view .LVU62
 248 000e 6423     		movs	r3, #100
 249 0010 0093     		str	r3, [sp]
 250 0012 0223     		movs	r3, #2
 251 0014 03AA     		add	r2, sp, #12
 252 0016 81B2     		uxth	r1, r0
 253              	.LVL12:
 254              		.loc 1 426 7 view .LVU63
 255 0018 0648     		ldr	r0, .L12
 256              	.LVL13:
 257              		.loc 1 426 7 view .LVU64
 258 001a FFF7FEFF 		bl	HAL_I2C_Master_Receive
 259              	.LVL14:
 427:Core/Src/main.c ****   if (status == HAL_OK) {
 260              		.loc 1 427 3 is_stmt 1 view .LVU65
 261              		.loc 1 427 6 is_stmt 0 view .LVU66
 262 001e 30B9     		cbnz	r0, .L10
ARM GAS  /tmp/ccM8v3Tj.s 			page 13


 428:Core/Src/main.c ****     *res = (result[0] << 8) | result[1];
 263              		.loc 1 428 5 is_stmt 1 view .LVU67
 264              		.loc 1 428 19 is_stmt 0 view .LVU68
 265 0020 9DF80C20 		ldrb	r2, [sp, #12]	@ zero_extendqisi2
 266              		.loc 1 428 37 view .LVU69
 267 0024 9DF80D30 		ldrb	r3, [sp, #13]	@ zero_extendqisi2
 268              		.loc 1 428 29 view .LVU70
 269 0028 43EA0223 		orr	r3, r3, r2, lsl #8
 270              		.loc 1 428 10 view .LVU71
 271 002c 2380     		strh	r3, [r4]	@ movhi
 272              	.L10:
 429:Core/Src/main.c ****   }
 430:Core/Src/main.c ****   return status;
 273              		.loc 1 430 3 is_stmt 1 view .LVU72
 431:Core/Src/main.c **** }
 274              		.loc 1 431 1 is_stmt 0 view .LVU73
 275 002e 04B0     		add	sp, sp, #16
 276              		.cfi_def_cfa_offset 8
 277              		@ sp needed
 278 0030 10BD     		pop	{r4, pc}
 279              	.LVL15:
 280              	.L13:
 281              		.loc 1 431 1 view .LVU74
 282 0032 00BF     		.align	2
 283              	.L12:
 284 0034 00000000 		.word	hi2c1
 285              		.cfi_endproc
 286              	.LFE138:
 288              		.section	.text.readeeprom,"ax",%progbits
 289              		.align	1
 290              		.global	readeeprom
 291              		.syntax unified
 292              		.thumb
 293              		.thumb_func
 295              	readeeprom:
 296              	.LVL16:
 297              	.LFB139:
 432:Core/Src/main.c **** 
 433:Core/Src/main.c **** uint8_t readeeprom(uint16_t address){
 298              		.loc 1 433 37 is_stmt 1 view -0
 299              		.cfi_startproc
 300              		@ args = 0, pretend = 0, frame = 8
 301              		@ frame_needed = 0, uses_anonymous_args = 0
 302              		.loc 1 433 37 is_stmt 0 view .LVU76
 303 0000 00B5     		push	{lr}
 304              		.cfi_def_cfa_offset 4
 305              		.cfi_offset 14, -4
 306 0002 87B0     		sub	sp, sp, #28
 307              		.cfi_def_cfa_offset 32
 308 0004 0246     		mov	r2, r0
 434:Core/Src/main.c **** 	uint8_t data = 0;
 309              		.loc 1 434 2 is_stmt 1 view .LVU77
 310              		.loc 1 434 10 is_stmt 0 view .LVU78
 311 0006 0023     		movs	r3, #0
 312 0008 8DF81730 		strb	r3, [sp, #23]
 435:Core/Src/main.c **** 	//uint8_t* address2 = (uint8_t*)  &address;
 436:Core/Src/main.c **** 	//HAL_I2C_Master_Transmit(&hi2c2, 0xA0, address2, 2, 1000);
ARM GAS  /tmp/ccM8v3Tj.s 			page 14


 437:Core/Src/main.c **** 	//HAL_I2C_Master_Receive(&hi2c2, 0xA0, &data, 1, 1000);
 438:Core/Src/main.c **** 	HAL_I2C_Mem_Read(&hi2c2, 0xA0, address, 2,  &data, 1 , 1000);
 313              		.loc 1 438 2 is_stmt 1 view .LVU79
 314 000c 4FF47A73 		mov	r3, #1000
 315 0010 0293     		str	r3, [sp, #8]
 316 0012 0123     		movs	r3, #1
 317 0014 0193     		str	r3, [sp, #4]
 318 0016 0DF11703 		add	r3, sp, #23
 319 001a 0093     		str	r3, [sp]
 320 001c 0223     		movs	r3, #2
 321 001e A021     		movs	r1, #160
 322 0020 0348     		ldr	r0, .L16
 323              	.LVL17:
 324              		.loc 1 438 2 is_stmt 0 view .LVU80
 325 0022 FFF7FEFF 		bl	HAL_I2C_Mem_Read
 326              	.LVL18:
 439:Core/Src/main.c **** 	//HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
 440:Core/Src/main.c **** 	//                                   uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t 
 441:Core/Src/main.c **** 	return data;
 327              		.loc 1 441 2 is_stmt 1 view .LVU81
 442:Core/Src/main.c **** }
 328              		.loc 1 442 1 is_stmt 0 view .LVU82
 329 0026 9DF81700 		ldrb	r0, [sp, #23]	@ zero_extendqisi2
 330 002a 07B0     		add	sp, sp, #28
 331              		.cfi_def_cfa_offset 4
 332              		@ sp needed
 333 002c 5DF804FB 		ldr	pc, [sp], #4
 334              	.L17:
 335              		.align	2
 336              	.L16:
 337 0030 00000000 		.word	hi2c2
 338              		.cfi_endproc
 339              	.LFE139:
 341              		.section	.text.writeeeprom,"ax",%progbits
 342              		.align	1
 343              		.global	writeeeprom
 344              		.syntax unified
 345              		.thumb
 346              		.thumb_func
 348              	writeeeprom:
 349              	.LVL19:
 350              	.LFB140:
 443:Core/Src/main.c **** 
 444:Core/Src/main.c **** void writeeeprom(uint16_t address, uint8_t data){
 351              		.loc 1 444 49 is_stmt 1 view -0
 352              		.cfi_startproc
 353              		@ args = 0, pretend = 0, frame = 8
 354              		@ frame_needed = 0, uses_anonymous_args = 0
 355              		.loc 1 444 49 is_stmt 0 view .LVU84
 356 0000 00B5     		push	{lr}
 357              		.cfi_def_cfa_offset 4
 358              		.cfi_offset 14, -4
 359 0002 87B0     		sub	sp, sp, #28
 360              		.cfi_def_cfa_offset 32
 361 0004 0246     		mov	r2, r0
 362 0006 8DF81710 		strb	r1, [sp, #23]
 445:Core/Src/main.c **** 	HAL_I2C_Mem_Write(&hi2c2, 0xA0, address, 2, &data, 1, 1000);
ARM GAS  /tmp/ccM8v3Tj.s 			page 15


 363              		.loc 1 445 2 is_stmt 1 view .LVU85
 364 000a 4FF47A73 		mov	r3, #1000
 365 000e 0293     		str	r3, [sp, #8]
 366 0010 0123     		movs	r3, #1
 367 0012 0193     		str	r3, [sp, #4]
 368 0014 0DF11703 		add	r3, sp, #23
 369 0018 0093     		str	r3, [sp]
 370 001a 0223     		movs	r3, #2
 371 001c A021     		movs	r1, #160
 372              	.LVL20:
 373              		.loc 1 445 2 is_stmt 0 view .LVU86
 374 001e 0448     		ldr	r0, .L20
 375              	.LVL21:
 376              		.loc 1 445 2 view .LVU87
 377 0020 FFF7FEFF 		bl	HAL_I2C_Mem_Write
 378              	.LVL22:
 446:Core/Src/main.c **** 	HAL_Delay(5);
 379              		.loc 1 446 2 is_stmt 1 view .LVU88
 380 0024 0520     		movs	r0, #5
 381 0026 FFF7FEFF 		bl	HAL_Delay
 382              	.LVL23:
 447:Core/Src/main.c **** }
 383              		.loc 1 447 1 is_stmt 0 view .LVU89
 384 002a 07B0     		add	sp, sp, #28
 385              		.cfi_def_cfa_offset 4
 386              		@ sp needed
 387 002c 5DF804FB 		ldr	pc, [sp], #4
 388              	.L21:
 389              		.align	2
 390              	.L20:
 391 0030 00000000 		.word	hi2c2
 392              		.cfi_endproc
 393              	.LFE140:
 395              		.section	.text.Error_Handler,"ax",%progbits
 396              		.align	1
 397              		.global	Error_Handler
 398              		.syntax unified
 399              		.thumb
 400              		.thumb_func
 402              	Error_Handler:
 403              	.LFB141:
 448:Core/Src/main.c **** /* USER CODE END 4 */
 449:Core/Src/main.c **** 
 450:Core/Src/main.c **** /**
 451:Core/Src/main.c ****   * @brief  This function is executed in case of error occurrence.
 452:Core/Src/main.c ****   * @retval None
 453:Core/Src/main.c ****   */
 454:Core/Src/main.c **** void Error_Handler(void)
 455:Core/Src/main.c **** {
 404              		.loc 1 455 1 is_stmt 1 view -0
 405              		.cfi_startproc
 406              		@ Volatile: function does not return.
 407              		@ args = 0, pretend = 0, frame = 0
 408              		@ frame_needed = 0, uses_anonymous_args = 0
 409              		@ link register save eliminated.
 456:Core/Src/main.c ****   /* USER CODE BEGIN Error_Handler_Debug */
 457:Core/Src/main.c ****   /* User can add his own implementation to report the HAL error return state */
ARM GAS  /tmp/ccM8v3Tj.s 			page 16


 458:Core/Src/main.c ****   __disable_irq();
 410              		.loc 1 458 3 view .LVU91
 411              	.LBB7:
 412              	.LBI7:
 413              		.file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
   1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
   2:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @version  V5.0.4
   5:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @date     09. April 2018
   6:Drivers/CMSIS/Include/cmsis_gcc.h ****  ******************************************************************************/
   7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
   8:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
   9:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  10:Drivers/CMSIS/Include/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  12:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Drivers/CMSIS/Include/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Drivers/CMSIS/Include/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  16:Drivers/CMSIS/Include/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  18:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Drivers/CMSIS/Include/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Drivers/CMSIS/Include/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Drivers/CMSIS/Include/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Drivers/CMSIS/Include/cmsis_gcc.h ****  * limitations under the License.
  23:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  24:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
  36:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  38:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ASM
  41:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __INLINE
  44:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE                 
  50:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
  51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif                                           
  52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __NO_RETURN
ARM GAS  /tmp/ccM8v3Tj.s 			page 17


  53:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __USED
  56:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __WEAK
  59:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED
  62:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
  69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Drivers/CMSIS/Include/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
  87:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  88:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  97:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  98:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 108:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS  /tmp/ccM8v3Tj.s 			page 18


 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 120:Drivers/CMSIS/Include/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 121:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
 122:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 125:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 126:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
 127:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 128:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
 130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 131:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 136:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 137:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
 138:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 139:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 414              		.loc 2 140 27 view .LVU92
 415              	.LBB8:
 141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 142:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 416              		.loc 2 142 3 view .LVU93
 417              		.syntax unified
 418              	@ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
 419 0000 72B6     		cpsid i
 420              	@ 0 "" 2
 421              		.thumb
 422              		.syntax unified
 423              	.L23:
 424              	.LBE8:
 425              	.LBE7:
 459:Core/Src/main.c ****   while (1)
 426              		.loc 1 459 3 discriminator 1 view .LVU94
 460:Core/Src/main.c ****   {
 461:Core/Src/main.c ****   }
 427              		.loc 1 461 3 discriminator 1 view .LVU95
 459:Core/Src/main.c ****   while (1)
 428              		.loc 1 459 9 discriminator 1 view .LVU96
 429 0002 FEE7     		b	.L23
 430              		.cfi_endproc
 431              	.LFE141:
 433              		.section	.text.MX_CAN_Init,"ax",%progbits
 434              		.align	1
ARM GAS  /tmp/ccM8v3Tj.s 			page 19


 435              		.syntax unified
 436              		.thumb
 437              		.thumb_func
 439              	MX_CAN_Init:
 440              	.LFB132:
 211:Core/Src/main.c **** 
 441              		.loc 1 211 1 view -0
 442              		.cfi_startproc
 443              		@ args = 0, pretend = 0, frame = 0
 444              		@ frame_needed = 0, uses_anonymous_args = 0
 445 0000 08B5     		push	{r3, lr}
 446              		.cfi_def_cfa_offset 8
 447              		.cfi_offset 3, -8
 448              		.cfi_offset 14, -4
 220:Core/Src/main.c ****   hcan.Init.Prescaler = 2;
 449              		.loc 1 220 3 view .LVU98
 220:Core/Src/main.c ****   hcan.Init.Prescaler = 2;
 450              		.loc 1 220 17 is_stmt 0 view .LVU99
 451 0002 0D48     		ldr	r0, .L28
 452 0004 0D4B     		ldr	r3, .L28+4
 453 0006 0360     		str	r3, [r0]
 221:Core/Src/main.c ****   hcan.Init.Mode = CAN_MODE_NORMAL;
 454              		.loc 1 221 3 is_stmt 1 view .LVU100
 221:Core/Src/main.c ****   hcan.Init.Mode = CAN_MODE_NORMAL;
 455              		.loc 1 221 23 is_stmt 0 view .LVU101
 456 0008 0223     		movs	r3, #2
 457 000a 4360     		str	r3, [r0, #4]
 222:Core/Src/main.c ****   hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
 458              		.loc 1 222 3 is_stmt 1 view .LVU102
 222:Core/Src/main.c ****   hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
 459              		.loc 1 222 18 is_stmt 0 view .LVU103
 460 000c 0023     		movs	r3, #0
 461 000e 8360     		str	r3, [r0, #8]
 223:Core/Src/main.c ****   hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
 462              		.loc 1 223 3 is_stmt 1 view .LVU104
 223:Core/Src/main.c ****   hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
 463              		.loc 1 223 27 is_stmt 0 view .LVU105
 464 0010 C360     		str	r3, [r0, #12]
 224:Core/Src/main.c ****   hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
 465              		.loc 1 224 3 is_stmt 1 view .LVU106
 224:Core/Src/main.c ****   hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
 466              		.loc 1 224 22 is_stmt 0 view .LVU107
 467 0012 4FF44022 		mov	r2, #786432
 468 0016 0261     		str	r2, [r0, #16]
 225:Core/Src/main.c ****   hcan.Init.TimeTriggeredMode = DISABLE;
 469              		.loc 1 225 3 is_stmt 1 view .LVU108
 225:Core/Src/main.c ****   hcan.Init.TimeTriggeredMode = DISABLE;
 470              		.loc 1 225 22 is_stmt 0 view .LVU109
 471 0018 4FF48012 		mov	r2, #1048576
 472 001c 4261     		str	r2, [r0, #20]
 226:Core/Src/main.c ****   hcan.Init.AutoBusOff = ENABLE;
 473              		.loc 1 226 3 is_stmt 1 view .LVU110
 226:Core/Src/main.c ****   hcan.Init.AutoBusOff = ENABLE;
 474              		.loc 1 226 31 is_stmt 0 view .LVU111
 475 001e 0376     		strb	r3, [r0, #24]
 227:Core/Src/main.c ****   hcan.Init.AutoWakeUp = DISABLE;
 476              		.loc 1 227 3 is_stmt 1 view .LVU112
ARM GAS  /tmp/ccM8v3Tj.s 			page 20


 227:Core/Src/main.c ****   hcan.Init.AutoWakeUp = DISABLE;
 477              		.loc 1 227 24 is_stmt 0 view .LVU113
 478 0020 0122     		movs	r2, #1
 479 0022 4276     		strb	r2, [r0, #25]
 228:Core/Src/main.c ****   hcan.Init.AutoRetransmission = ENABLE;
 480              		.loc 1 228 3 is_stmt 1 view .LVU114
 228:Core/Src/main.c ****   hcan.Init.AutoRetransmission = ENABLE;
 481              		.loc 1 228 24 is_stmt 0 view .LVU115
 482 0024 8376     		strb	r3, [r0, #26]
 229:Core/Src/main.c ****   hcan.Init.ReceiveFifoLocked = DISABLE;
 483              		.loc 1 229 3 is_stmt 1 view .LVU116
 229:Core/Src/main.c ****   hcan.Init.ReceiveFifoLocked = DISABLE;
 484              		.loc 1 229 32 is_stmt 0 view .LVU117
 485 0026 C276     		strb	r2, [r0, #27]
 230:Core/Src/main.c ****   hcan.Init.TransmitFifoPriority = DISABLE;
 486              		.loc 1 230 3 is_stmt 1 view .LVU118
 230:Core/Src/main.c ****   hcan.Init.TransmitFifoPriority = DISABLE;
 487              		.loc 1 230 31 is_stmt 0 view .LVU119
 488 0028 0377     		strb	r3, [r0, #28]
 231:Core/Src/main.c ****   if (HAL_CAN_Init(&hcan) != HAL_OK)
 489              		.loc 1 231 3 is_stmt 1 view .LVU120
 231:Core/Src/main.c ****   if (HAL_CAN_Init(&hcan) != HAL_OK)
 490              		.loc 1 231 34 is_stmt 0 view .LVU121
 491 002a 4377     		strb	r3, [r0, #29]
 232:Core/Src/main.c ****   {
 492              		.loc 1 232 3 is_stmt 1 view .LVU122
 232:Core/Src/main.c ****   {
 493              		.loc 1 232 7 is_stmt 0 view .LVU123
 494 002c FFF7FEFF 		bl	HAL_CAN_Init
 495              	.LVL24:
 232:Core/Src/main.c ****   {
 496              		.loc 1 232 6 view .LVU124
 497 0030 00B9     		cbnz	r0, .L27
 240:Core/Src/main.c **** 
 498              		.loc 1 240 1 view .LVU125
 499 0032 08BD     		pop	{r3, pc}
 500              	.L27:
 234:Core/Src/main.c ****   }
 501              		.loc 1 234 5 is_stmt 1 view .LVU126
 502 0034 FFF7FEFF 		bl	Error_Handler
 503              	.LVL25:
 504              	.L29:
 505              		.align	2
 506              	.L28:
 507 0038 00000000 		.word	hcan
 508 003c 00640040 		.word	1073767424
 509              		.cfi_endproc
 510              	.LFE132:
 512              		.section	.text.MX_I2C1_Init,"ax",%progbits
 513              		.align	1
 514              		.syntax unified
 515              		.thumb
 516              		.thumb_func
 518              	MX_I2C1_Init:
 519              	.LFB133:
 248:Core/Src/main.c **** 
 520              		.loc 1 248 1 view -0
ARM GAS  /tmp/ccM8v3Tj.s 			page 21


 521              		.cfi_startproc
 522              		@ args = 0, pretend = 0, frame = 0
 523              		@ frame_needed = 0, uses_anonymous_args = 0
 524 0000 08B5     		push	{r3, lr}
 525              		.cfi_def_cfa_offset 8
 526              		.cfi_offset 3, -8
 527              		.cfi_offset 14, -4
 257:Core/Src/main.c ****   hi2c1.Init.Timing = 0x2000090E;
 528              		.loc 1 257 3 view .LVU128
 257:Core/Src/main.c ****   hi2c1.Init.Timing = 0x2000090E;
 529              		.loc 1 257 18 is_stmt 0 view .LVU129
 530 0002 1148     		ldr	r0, .L38
 531 0004 114B     		ldr	r3, .L38+4
 532 0006 0360     		str	r3, [r0]
 258:Core/Src/main.c ****   hi2c1.Init.OwnAddress1 = 0;
 533              		.loc 1 258 3 is_stmt 1 view .LVU130
 258:Core/Src/main.c ****   hi2c1.Init.OwnAddress1 = 0;
 534              		.loc 1 258 21 is_stmt 0 view .LVU131
 535 0008 114B     		ldr	r3, .L38+8
 536 000a 4360     		str	r3, [r0, #4]
 259:Core/Src/main.c ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 537              		.loc 1 259 3 is_stmt 1 view .LVU132
 259:Core/Src/main.c ****   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 538              		.loc 1 259 26 is_stmt 0 view .LVU133
 539 000c 0023     		movs	r3, #0
 540 000e 8360     		str	r3, [r0, #8]
 260:Core/Src/main.c ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 541              		.loc 1 260 3 is_stmt 1 view .LVU134
 260:Core/Src/main.c ****   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 542              		.loc 1 260 29 is_stmt 0 view .LVU135
 543 0010 0122     		movs	r2, #1
 544 0012 C260     		str	r2, [r0, #12]
 261:Core/Src/main.c ****   hi2c1.Init.OwnAddress2 = 0;
 545              		.loc 1 261 3 is_stmt 1 view .LVU136
 261:Core/Src/main.c ****   hi2c1.Init.OwnAddress2 = 0;
 546              		.loc 1 261 30 is_stmt 0 view .LVU137
 547 0014 0361     		str	r3, [r0, #16]
 262:Core/Src/main.c ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 548              		.loc 1 262 3 is_stmt 1 view .LVU138
 262:Core/Src/main.c ****   hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 549              		.loc 1 262 26 is_stmt 0 view .LVU139
 550 0016 4361     		str	r3, [r0, #20]
 263:Core/Src/main.c ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 551              		.loc 1 263 3 is_stmt 1 view .LVU140
 263:Core/Src/main.c ****   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 552              		.loc 1 263 31 is_stmt 0 view .LVU141
 553 0018 8361     		str	r3, [r0, #24]
 264:Core/Src/main.c ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 554              		.loc 1 264 3 is_stmt 1 view .LVU142
 264:Core/Src/main.c ****   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 555              		.loc 1 264 30 is_stmt 0 view .LVU143
 556 001a C361     		str	r3, [r0, #28]
 265:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 557              		.loc 1 265 3 is_stmt 1 view .LVU144
 265:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
 558              		.loc 1 265 28 is_stmt 0 view .LVU145
 559 001c 0362     		str	r3, [r0, #32]
ARM GAS  /tmp/ccM8v3Tj.s 			page 22


 266:Core/Src/main.c ****   {
 560              		.loc 1 266 3 is_stmt 1 view .LVU146
 266:Core/Src/main.c ****   {
 561              		.loc 1 266 7 is_stmt 0 view .LVU147
 562 001e FFF7FEFF 		bl	HAL_I2C_Init
 563              	.LVL26:
 266:Core/Src/main.c ****   {
 564              		.loc 1 266 6 view .LVU148
 565 0022 50B9     		cbnz	r0, .L35
 273:Core/Src/main.c ****   {
 566              		.loc 1 273 3 is_stmt 1 view .LVU149
 273:Core/Src/main.c ****   {
 567              		.loc 1 273 7 is_stmt 0 view .LVU150
 568 0024 0021     		movs	r1, #0
 569 0026 0848     		ldr	r0, .L38
 570 0028 FFF7FEFF 		bl	HAL_I2CEx_ConfigAnalogFilter
 571              	.LVL27:
 273:Core/Src/main.c ****   {
 572              		.loc 1 273 6 view .LVU151
 573 002c 38B9     		cbnz	r0, .L36
 280:Core/Src/main.c ****   {
 574              		.loc 1 280 3 is_stmt 1 view .LVU152
 280:Core/Src/main.c ****   {
 575              		.loc 1 280 7 is_stmt 0 view .LVU153
 576 002e 0021     		movs	r1, #0
 577 0030 0548     		ldr	r0, .L38
 578 0032 FFF7FEFF 		bl	HAL_I2CEx_ConfigDigitalFilter
 579              	.LVL28:
 280:Core/Src/main.c ****   {
 580              		.loc 1 280 6 view .LVU154
 581 0036 20B9     		cbnz	r0, .L37
 288:Core/Src/main.c **** 
 582              		.loc 1 288 1 view .LVU155
 583 0038 08BD     		pop	{r3, pc}
 584              	.L35:
 268:Core/Src/main.c ****   }
 585              		.loc 1 268 5 is_stmt 1 view .LVU156
 586 003a FFF7FEFF 		bl	Error_Handler
 587              	.LVL29:
 588              	.L36:
 275:Core/Src/main.c ****   }
 589              		.loc 1 275 5 view .LVU157
 590 003e FFF7FEFF 		bl	Error_Handler
 591              	.LVL30:
 592              	.L37:
 282:Core/Src/main.c ****   }
 593              		.loc 1 282 5 view .LVU158
 594 0042 FFF7FEFF 		bl	Error_Handler
 595              	.LVL31:
 596              	.L39:
 597 0046 00BF     		.align	2
 598              	.L38:
 599 0048 00000000 		.word	hi2c1
 600 004c 00540040 		.word	1073763328
 601 0050 0E090020 		.word	536873230
 602              		.cfi_endproc
 603              	.LFE133:
ARM GAS  /tmp/ccM8v3Tj.s 			page 23


 605              		.section	.text.MX_I2C2_Init,"ax",%progbits
 606              		.align	1
 607              		.syntax unified
 608              		.thumb
 609              		.thumb_func
 611              	MX_I2C2_Init:
 612              	.LFB134:
 296:Core/Src/main.c **** 
 613              		.loc 1 296 1 view -0
 614              		.cfi_startproc
 615              		@ args = 0, pretend = 0, frame = 0
 616              		@ frame_needed = 0, uses_anonymous_args = 0
 617 0000 08B5     		push	{r3, lr}
 618              		.cfi_def_cfa_offset 8
 619              		.cfi_offset 3, -8
 620              		.cfi_offset 14, -4
 305:Core/Src/main.c ****   hi2c2.Init.Timing = 0x2000090E;
 621              		.loc 1 305 3 view .LVU160
 305:Core/Src/main.c ****   hi2c2.Init.Timing = 0x2000090E;
 622              		.loc 1 305 18 is_stmt 0 view .LVU161
 623 0002 1148     		ldr	r0, .L48
 624 0004 114B     		ldr	r3, .L48+4
 625 0006 0360     		str	r3, [r0]
 306:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
 626              		.loc 1 306 3 is_stmt 1 view .LVU162
 306:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
 627              		.loc 1 306 21 is_stmt 0 view .LVU163
 628 0008 114B     		ldr	r3, .L48+8
 629 000a 4360     		str	r3, [r0, #4]
 307:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 630              		.loc 1 307 3 is_stmt 1 view .LVU164
 307:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 631              		.loc 1 307 26 is_stmt 0 view .LVU165
 632 000c 0023     		movs	r3, #0
 633 000e 8360     		str	r3, [r0, #8]
 308:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 634              		.loc 1 308 3 is_stmt 1 view .LVU166
 308:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 635              		.loc 1 308 29 is_stmt 0 view .LVU167
 636 0010 0122     		movs	r2, #1
 637 0012 C260     		str	r2, [r0, #12]
 309:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
 638              		.loc 1 309 3 is_stmt 1 view .LVU168
 309:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
 639              		.loc 1 309 30 is_stmt 0 view .LVU169
 640 0014 0361     		str	r3, [r0, #16]
 310:Core/Src/main.c ****   hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 641              		.loc 1 310 3 is_stmt 1 view .LVU170
 310:Core/Src/main.c ****   hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
 642              		.loc 1 310 26 is_stmt 0 view .LVU171
 643 0016 4361     		str	r3, [r0, #20]
 311:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 644              		.loc 1 311 3 is_stmt 1 view .LVU172
 311:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 645              		.loc 1 311 31 is_stmt 0 view .LVU173
 646 0018 8361     		str	r3, [r0, #24]
 312:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
ARM GAS  /tmp/ccM8v3Tj.s 			page 24


 647              		.loc 1 312 3 is_stmt 1 view .LVU174
 312:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 648              		.loc 1 312 30 is_stmt 0 view .LVU175
 649 001a C361     		str	r3, [r0, #28]
 313:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
 650              		.loc 1 313 3 is_stmt 1 view .LVU176
 313:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
 651              		.loc 1 313 28 is_stmt 0 view .LVU177
 652 001c 0362     		str	r3, [r0, #32]
 314:Core/Src/main.c ****   {
 653              		.loc 1 314 3 is_stmt 1 view .LVU178
 314:Core/Src/main.c ****   {
 654              		.loc 1 314 7 is_stmt 0 view .LVU179
 655 001e FFF7FEFF 		bl	HAL_I2C_Init
 656              	.LVL32:
 314:Core/Src/main.c ****   {
 657              		.loc 1 314 6 view .LVU180
 658 0022 50B9     		cbnz	r0, .L45
 321:Core/Src/main.c ****   {
 659              		.loc 1 321 3 is_stmt 1 view .LVU181
 321:Core/Src/main.c ****   {
 660              		.loc 1 321 7 is_stmt 0 view .LVU182
 661 0024 0021     		movs	r1, #0
 662 0026 0848     		ldr	r0, .L48
 663 0028 FFF7FEFF 		bl	HAL_I2CEx_ConfigAnalogFilter
 664              	.LVL33:
 321:Core/Src/main.c ****   {
 665              		.loc 1 321 6 view .LVU183
 666 002c 38B9     		cbnz	r0, .L46
 328:Core/Src/main.c ****   {
 667              		.loc 1 328 3 is_stmt 1 view .LVU184
 328:Core/Src/main.c ****   {
 668              		.loc 1 328 7 is_stmt 0 view .LVU185
 669 002e 0021     		movs	r1, #0
 670 0030 0548     		ldr	r0, .L48
 671 0032 FFF7FEFF 		bl	HAL_I2CEx_ConfigDigitalFilter
 672              	.LVL34:
 328:Core/Src/main.c ****   {
 673              		.loc 1 328 6 view .LVU186
 674 0036 20B9     		cbnz	r0, .L47
 336:Core/Src/main.c **** 
 675              		.loc 1 336 1 view .LVU187
 676 0038 08BD     		pop	{r3, pc}
 677              	.L45:
 316:Core/Src/main.c ****   }
 678              		.loc 1 316 5 is_stmt 1 view .LVU188
 679 003a FFF7FEFF 		bl	Error_Handler
 680              	.LVL35:
 681              	.L46:
 323:Core/Src/main.c ****   }
 682              		.loc 1 323 5 view .LVU189
 683 003e FFF7FEFF 		bl	Error_Handler
 684              	.LVL36:
 685              	.L47:
 330:Core/Src/main.c ****   }
 686              		.loc 1 330 5 view .LVU190
 687 0042 FFF7FEFF 		bl	Error_Handler
ARM GAS  /tmp/ccM8v3Tj.s 			page 25


 688              	.LVL37:
 689              	.L49:
 690 0046 00BF     		.align	2
 691              	.L48:
 692 0048 00000000 		.word	hi2c2
 693 004c 00580040 		.word	1073764352
 694 0050 0E090020 		.word	536873230
 695              		.cfi_endproc
 696              	.LFE134:
 698              		.section	.text.MX_SPI1_Init,"ax",%progbits
 699              		.align	1
 700              		.syntax unified
 701              		.thumb
 702              		.thumb_func
 704              	MX_SPI1_Init:
 705              	.LFB135:
 344:Core/Src/main.c **** 
 706              		.loc 1 344 1 view -0
 707              		.cfi_startproc
 708              		@ args = 0, pretend = 0, frame = 0
 709              		@ frame_needed = 0, uses_anonymous_args = 0
 710 0000 08B5     		push	{r3, lr}
 711              		.cfi_def_cfa_offset 8
 712              		.cfi_offset 3, -8
 713              		.cfi_offset 14, -4
 354:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
 714              		.loc 1 354 3 view .LVU192
 354:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
 715              		.loc 1 354 18 is_stmt 0 view .LVU193
 716 0002 1048     		ldr	r0, .L54
 717 0004 104B     		ldr	r3, .L54+4
 718 0006 0360     		str	r3, [r0]
 355:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_2LINES;
 719              		.loc 1 355 3 is_stmt 1 view .LVU194
 355:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_2LINES;
 720              		.loc 1 355 19 is_stmt 0 view .LVU195
 721 0008 4FF48273 		mov	r3, #260
 722 000c 4360     		str	r3, [r0, #4]
 356:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
 723              		.loc 1 356 3 is_stmt 1 view .LVU196
 356:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
 724              		.loc 1 356 24 is_stmt 0 view .LVU197
 725 000e 0023     		movs	r3, #0
 726 0010 8360     		str	r3, [r0, #8]
 357:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
 727              		.loc 1 357 3 is_stmt 1 view .LVU198
 357:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
 728              		.loc 1 357 23 is_stmt 0 view .LVU199
 729 0012 4FF4E062 		mov	r2, #1792
 730 0016 C260     		str	r2, [r0, #12]
 358:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
 731              		.loc 1 358 3 is_stmt 1 view .LVU200
 358:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
 732              		.loc 1 358 26 is_stmt 0 view .LVU201
 733 0018 0361     		str	r3, [r0, #16]
 359:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
 734              		.loc 1 359 3 is_stmt 1 view .LVU202
ARM GAS  /tmp/ccM8v3Tj.s 			page 26


 359:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
 735              		.loc 1 359 23 is_stmt 0 view .LVU203
 736 001a 4361     		str	r3, [r0, #20]
 360:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
 737              		.loc 1 360 3 is_stmt 1 view .LVU204
 360:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
 738              		.loc 1 360 18 is_stmt 0 view .LVU205
 739 001c 4FF40072 		mov	r2, #512
 740 0020 8261     		str	r2, [r0, #24]
 361:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 741              		.loc 1 361 3 is_stmt 1 view .LVU206
 361:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 742              		.loc 1 361 32 is_stmt 0 view .LVU207
 743 0022 2022     		movs	r2, #32
 744 0024 C261     		str	r2, [r0, #28]
 362:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
 745              		.loc 1 362 3 is_stmt 1 view .LVU208
 362:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
 746              		.loc 1 362 23 is_stmt 0 view .LVU209
 747 0026 0362     		str	r3, [r0, #32]
 363:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
 748              		.loc 1 363 3 is_stmt 1 view .LVU210
 363:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
 749              		.loc 1 363 21 is_stmt 0 view .LVU211
 750 0028 4362     		str	r3, [r0, #36]
 364:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 7;
 751              		.loc 1 364 3 is_stmt 1 view .LVU212
 364:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 7;
 752              		.loc 1 364 29 is_stmt 0 view .LVU213
 753 002a 8362     		str	r3, [r0, #40]
 365:Core/Src/main.c ****   hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
 754              		.loc 1 365 3 is_stmt 1 view .LVU214
 365:Core/Src/main.c ****   hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
 755              		.loc 1 365 28 is_stmt 0 view .LVU215
 756 002c 0722     		movs	r2, #7
 757 002e C262     		str	r2, [r0, #44]
 366:Core/Src/main.c ****   hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
 758              		.loc 1 366 3 is_stmt 1 view .LVU216
 366:Core/Src/main.c ****   hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
 759              		.loc 1 366 24 is_stmt 0 view .LVU217
 760 0030 0363     		str	r3, [r0, #48]
 367:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
 761              		.loc 1 367 3 is_stmt 1 view .LVU218
 367:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
 762              		.loc 1 367 23 is_stmt 0 view .LVU219
 763 0032 0823     		movs	r3, #8
 764 0034 4363     		str	r3, [r0, #52]
 368:Core/Src/main.c ****   {
 765              		.loc 1 368 3 is_stmt 1 view .LVU220
 368:Core/Src/main.c ****   {
 766              		.loc 1 368 7 is_stmt 0 view .LVU221
 767 0036 FFF7FEFF 		bl	HAL_SPI_Init
 768              	.LVL38:
 368:Core/Src/main.c ****   {
 769              		.loc 1 368 6 view .LVU222
 770 003a 00B9     		cbnz	r0, .L53
 376:Core/Src/main.c **** 
ARM GAS  /tmp/ccM8v3Tj.s 			page 27


 771              		.loc 1 376 1 view .LVU223
 772 003c 08BD     		pop	{r3, pc}
 773              	.L53:
 370:Core/Src/main.c ****   }
 774              		.loc 1 370 5 is_stmt 1 view .LVU224
 775 003e FFF7FEFF 		bl	Error_Handler
 776              	.LVL39:
 777              	.L55:
 778 0042 00BF     		.align	2
 779              	.L54:
 780 0044 00000000 		.word	hspi1
 781 0048 00300140 		.word	1073819648
 782              		.cfi_endproc
 783              	.LFE135:
 785              		.section	.text.SystemClock_Config,"ax",%progbits
 786              		.align	1
 787              		.global	SystemClock_Config
 788              		.syntax unified
 789              		.thumb
 790              		.thumb_func
 792              	SystemClock_Config:
 793              	.LFB131:
 165:Core/Src/main.c ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 794              		.loc 1 165 1 view -0
 795              		.cfi_startproc
 796              		@ args = 0, pretend = 0, frame = 112
 797              		@ frame_needed = 0, uses_anonymous_args = 0
 798 0000 00B5     		push	{lr}
 799              		.cfi_def_cfa_offset 4
 800              		.cfi_offset 14, -4
 801 0002 9DB0     		sub	sp, sp, #116
 802              		.cfi_def_cfa_offset 120
 166:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 803              		.loc 1 166 3 view .LVU226
 166:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 804              		.loc 1 166 22 is_stmt 0 view .LVU227
 805 0004 2822     		movs	r2, #40
 806 0006 0021     		movs	r1, #0
 807 0008 12A8     		add	r0, sp, #72
 808 000a FFF7FEFF 		bl	memset
 809              	.LVL40:
 167:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 810              		.loc 1 167 3 is_stmt 1 view .LVU228
 167:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 811              		.loc 1 167 22 is_stmt 0 view .LVU229
 812 000e 0021     		movs	r1, #0
 813 0010 0D91     		str	r1, [sp, #52]
 814 0012 0E91     		str	r1, [sp, #56]
 815 0014 0F91     		str	r1, [sp, #60]
 816 0016 1091     		str	r1, [sp, #64]
 817 0018 1191     		str	r1, [sp, #68]
 168:Core/Src/main.c **** 
 818              		.loc 1 168 3 is_stmt 1 view .LVU230
 168:Core/Src/main.c **** 
 819              		.loc 1 168 28 is_stmt 0 view .LVU231
 820 001a 3422     		movs	r2, #52
 821 001c 6846     		mov	r0, sp
ARM GAS  /tmp/ccM8v3Tj.s 			page 28


 822 001e FFF7FEFF 		bl	memset
 823              	.LVL41:
 173:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 824              		.loc 1 173 3 is_stmt 1 view .LVU232
 173:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 825              		.loc 1 173 36 is_stmt 0 view .LVU233
 826 0022 0323     		movs	r3, #3
 827 0024 1293     		str	r3, [sp, #72]
 174:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 828              		.loc 1 174 3 is_stmt 1 view .LVU234
 174:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 829              		.loc 1 174 30 is_stmt 0 view .LVU235
 830 0026 4FF48033 		mov	r3, #65536
 831 002a 1393     		str	r3, [sp, #76]
 175:Core/Src/main.c ****   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 832              		.loc 1 175 3 is_stmt 1 view .LVU236
 175:Core/Src/main.c ****   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 833              		.loc 1 175 30 is_stmt 0 view .LVU237
 834 002c 0123     		movs	r3, #1
 835 002e 1693     		str	r3, [sp, #88]
 176:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
 836              		.loc 1 176 3 is_stmt 1 view .LVU238
 176:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
 837              		.loc 1 176 41 is_stmt 0 view .LVU239
 838 0030 1023     		movs	r3, #16
 839 0032 1793     		str	r3, [sp, #92]
 177:Core/Src/main.c ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 840              		.loc 1 177 3 is_stmt 1 view .LVU240
 178:Core/Src/main.c ****   {
 841              		.loc 1 178 3 view .LVU241
 178:Core/Src/main.c ****   {
 842              		.loc 1 178 7 is_stmt 0 view .LVU242
 843 0034 12A8     		add	r0, sp, #72
 844 0036 FFF7FEFF 		bl	HAL_RCC_OscConfig
 845              	.LVL42:
 178:Core/Src/main.c ****   {
 846              		.loc 1 178 6 view .LVU243
 847 003a B8B9     		cbnz	r0, .L61
 185:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 848              		.loc 1 185 3 is_stmt 1 view .LVU244
 185:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 849              		.loc 1 185 31 is_stmt 0 view .LVU245
 850 003c 0F23     		movs	r3, #15
 851 003e 0D93     		str	r3, [sp, #52]
 187:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 852              		.loc 1 187 3 is_stmt 1 view .LVU246
 187:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 853              		.loc 1 187 34 is_stmt 0 view .LVU247
 854 0040 0123     		movs	r3, #1
 855 0042 0E93     		str	r3, [sp, #56]
 188:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 856              		.loc 1 188 3 is_stmt 1 view .LVU248
 188:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 857              		.loc 1 188 35 is_stmt 0 view .LVU249
 858 0044 0021     		movs	r1, #0
 859 0046 0F91     		str	r1, [sp, #60]
 189:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
ARM GAS  /tmp/ccM8v3Tj.s 			page 29


 860              		.loc 1 189 3 is_stmt 1 view .LVU250
 189:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 861              		.loc 1 189 36 is_stmt 0 view .LVU251
 862 0048 1091     		str	r1, [sp, #64]
 190:Core/Src/main.c **** 
 863              		.loc 1 190 3 is_stmt 1 view .LVU252
 190:Core/Src/main.c **** 
 864              		.loc 1 190 36 is_stmt 0 view .LVU253
 865 004a 1191     		str	r1, [sp, #68]
 192:Core/Src/main.c ****   {
 866              		.loc 1 192 3 is_stmt 1 view .LVU254
 192:Core/Src/main.c ****   {
 867              		.loc 1 192 7 is_stmt 0 view .LVU255
 868 004c 0DA8     		add	r0, sp, #52
 869 004e FFF7FEFF 		bl	HAL_RCC_ClockConfig
 870              	.LVL43:
 192:Core/Src/main.c ****   {
 871              		.loc 1 192 6 view .LVU256
 872 0052 68B9     		cbnz	r0, .L62
 196:Core/Src/main.c ****   PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI;
 873              		.loc 1 196 3 is_stmt 1 view .LVU257
 196:Core/Src/main.c ****   PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI;
 874              		.loc 1 196 38 is_stmt 0 view .LVU258
 875 0054 6023     		movs	r3, #96
 876 0056 0093     		str	r3, [sp]
 197:Core/Src/main.c ****   PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_HSI;
 877              		.loc 1 197 3 is_stmt 1 view .LVU259
 197:Core/Src/main.c ****   PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_HSI;
 878              		.loc 1 197 36 is_stmt 0 view .LVU260
 879 0058 0023     		movs	r3, #0
 880 005a 0793     		str	r3, [sp, #28]
 198:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 881              		.loc 1 198 3 is_stmt 1 view .LVU261
 198:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 882              		.loc 1 198 36 is_stmt 0 view .LVU262
 883 005c 0893     		str	r3, [sp, #32]
 199:Core/Src/main.c ****   {
 884              		.loc 1 199 3 is_stmt 1 view .LVU263
 199:Core/Src/main.c ****   {
 885              		.loc 1 199 7 is_stmt 0 view .LVU264
 886 005e 6846     		mov	r0, sp
 887 0060 FFF7FEFF 		bl	HAL_RCCEx_PeriphCLKConfig
 888              	.LVL44:
 199:Core/Src/main.c ****   {
 889              		.loc 1 199 6 view .LVU265
 890 0064 30B9     		cbnz	r0, .L63
 203:Core/Src/main.c **** 
 891              		.loc 1 203 1 view .LVU266
 892 0066 1DB0     		add	sp, sp, #116
 893              		.cfi_remember_state
 894              		.cfi_def_cfa_offset 4
 895              		@ sp needed
 896 0068 5DF804FB 		ldr	pc, [sp], #4
 897              	.L61:
 898              		.cfi_restore_state
 180:Core/Src/main.c ****   }
 899              		.loc 1 180 5 is_stmt 1 view .LVU267
ARM GAS  /tmp/ccM8v3Tj.s 			page 30


 900 006c FFF7FEFF 		bl	Error_Handler
 901              	.LVL45:
 902              	.L62:
 194:Core/Src/main.c ****   }
 903              		.loc 1 194 5 view .LVU268
 904 0070 FFF7FEFF 		bl	Error_Handler
 905              	.LVL46:
 906              	.L63:
 201:Core/Src/main.c ****   }
 907              		.loc 1 201 5 view .LVU269
 908 0074 FFF7FEFF 		bl	Error_Handler
 909              	.LVL47:
 910              		.cfi_endproc
 911              	.LFE131:
 913              		.section	.text.main,"ax",%progbits
 914              		.align	1
 915              		.global	main
 916              		.syntax unified
 917              		.thumb
 918              		.thumb_func
 920              	main:
 921              	.LFB130:
  89:Core/Src/main.c ****   /* USER CODE BEGIN 1 */
 922              		.loc 1 89 1 view -0
 923              		.cfi_startproc
 924              		@ args = 0, pretend = 0, frame = 24
 925              		@ frame_needed = 0, uses_anonymous_args = 0
 926 0000 10B5     		push	{r4, lr}
 927              		.cfi_def_cfa_offset 8
 928              		.cfi_offset 4, -8
 929              		.cfi_offset 14, -4
 930 0002 86B0     		sub	sp, sp, #24
 931              		.cfi_def_cfa_offset 32
  97:Core/Src/main.c **** 
 932              		.loc 1 97 3 view .LVU271
 933 0004 FFF7FEFF 		bl	HAL_Init
 934              	.LVL48:
 104:Core/Src/main.c **** 
 935              		.loc 1 104 3 view .LVU272
 936 0008 FFF7FEFF 		bl	SystemClock_Config
 937              	.LVL49:
 111:Core/Src/main.c ****   MX_CAN_Init();
 938              		.loc 1 111 3 view .LVU273
 939 000c FFF7FEFF 		bl	MX_GPIO_Init
 940              	.LVL50:
 112:Core/Src/main.c ****   MX_I2C1_Init();
 941              		.loc 1 112 3 view .LVU274
 942 0010 FFF7FEFF 		bl	MX_CAN_Init
 943              	.LVL51:
 113:Core/Src/main.c ****   MX_I2C2_Init();
 944              		.loc 1 113 3 view .LVU275
 945 0014 FFF7FEFF 		bl	MX_I2C1_Init
 946              	.LVL52:
 114:Core/Src/main.c ****   MX_SPI1_Init();
 947              		.loc 1 114 3 view .LVU276
 948 0018 FFF7FEFF 		bl	MX_I2C2_Init
 949              	.LVL53:
ARM GAS  /tmp/ccM8v3Tj.s 			page 31


 115:Core/Src/main.c ****   /* USER CODE BEGIN 2 */
 950              		.loc 1 115 3 view .LVU277
 951 001c FFF7FEFF 		bl	MX_SPI1_Init
 952              	.LVL54:
 118:Core/Src/main.c ****      if (sensor_init(i) != HAL_OK) {
 953              		.loc 1 118 3 view .LVU278
 954              	.LBB9:
 118:Core/Src/main.c ****      if (sensor_init(i) != HAL_OK) {
 955              		.loc 1 118 8 view .LVU279
 118:Core/Src/main.c ****      if (sensor_init(i) != HAL_OK) {
 956              		.loc 1 118 12 is_stmt 0 view .LVU280
 957 0020 0024     		movs	r4, #0
 118:Core/Src/main.c ****      if (sensor_init(i) != HAL_OK) {
 958              		.loc 1 118 3 view .LVU281
 959 0022 00E0     		b	.L65
 960              	.LVL55:
 961              	.L66:
 118:Core/Src/main.c ****      if (sensor_init(i) != HAL_OK) {
 962              		.loc 1 118 35 is_stmt 1 discriminator 2 view .LVU282
 963 0024 0134     		adds	r4, r4, #1
 964              	.LVL56:
 965              	.L65:
 118:Core/Src/main.c ****      if (sensor_init(i) != HAL_OK) {
 966              		.loc 1 118 21 discriminator 1 view .LVU283
 967 0026 0B2C     		cmp	r4, #11
 968 0028 09DC     		bgt	.L73
 119:Core/Src/main.c ****        last_error = HAL_GetTick();
 969              		.loc 1 119 6 view .LVU284
 119:Core/Src/main.c ****        last_error = HAL_GetTick();
 970              		.loc 1 119 10 is_stmt 0 view .LVU285
 971 002a 2046     		mov	r0, r4
 972 002c FFF7FEFF 		bl	sensor_init
 973              	.LVL57:
 119:Core/Src/main.c ****        last_error = HAL_GetTick();
 974              		.loc 1 119 9 view .LVU286
 975 0030 0028     		cmp	r0, #0
 976 0032 F7D0     		beq	.L66
 120:Core/Src/main.c ****      }
 977              		.loc 1 120 8 is_stmt 1 view .LVU287
 120:Core/Src/main.c ****      }
 978              		.loc 1 120 21 is_stmt 0 view .LVU288
 979 0034 FFF7FEFF 		bl	HAL_GetTick
 980              	.LVL58:
 120:Core/Src/main.c ****      }
 981              		.loc 1 120 19 view .LVU289
 982 0038 134B     		ldr	r3, .L74
 983 003a 1860     		str	r0, [r3]
 984 003c F2E7     		b	.L66
 985              	.L73:
 986              	.LBE9:
 124:Core/Src/main.c ****    ams_can_init(&hcan, &hcan);
 987              		.loc 1 124 4 is_stmt 1 view .LVU290
 988 003e 1348     		ldr	r0, .L74+4
 989 0040 FFF7FEFF 		bl	AMS_Init
 990              	.LVL59:
 125:Core/Src/main.c ****    //amsConfigAuxMeasurement(9);
 991              		.loc 1 125 4 view .LVU291
ARM GAS  /tmp/ccM8v3Tj.s 			page 32


 992 0044 1248     		ldr	r0, .L74+8
 993 0046 0146     		mov	r1, r0
 994 0048 FFF7FEFF 		bl	ams_can_init
 995              	.LVL60:
 135:Core/Src/main.c ****    uint16_t temperatures[N_SENSORS];
 996              		.loc 1 135 4 view .LVU292
 997 004c 4521     		movs	r1, #69
 998 004e 0120     		movs	r0, #1
 999 0050 FFF7FEFF 		bl	writeeeprom
 1000              	.LVL61:
 136:Core/Src/main.c ****    AMS_Loop();
 1001              		.loc 1 136 4 view .LVU293
 137:Core/Src/main.c ****    while (1){
 1002              		.loc 1 137 4 view .LVU294
 1003 0054 FFF7FEFF 		bl	AMS_Loop
 1004              	.LVL62:
 1005              	.L71:
 138:Core/Src/main.c **** 	 if(BMS_IN_TEST_MODE == 1 ){ ////&& PENDING_MESSAGE_HANDLE == 1
 1006              		.loc 1 138 4 view .LVU295
 139:Core/Src/main.c **** 			   testLoop(&canTestData);
 1007              		.loc 1 139 3 view .LVU296
 140:Core/Src/main.c ****     /* USER CODE END WHILE */
 1008              		.loc 1 140 7 view .LVU297
 1009 0058 0E48     		ldr	r0, .L74+12
 1010 005a FFF7FEFF 		bl	testLoop
 1011              	.LVL63:
 144:Core/Src/main.c **** 	        if (sensor_read(i, &temperatures[i]) != HAL_OK) {
 1012              		.loc 1 144 4 view .LVU298
 1013              	.LBB10:
 144:Core/Src/main.c **** 	        if (sensor_read(i, &temperatures[i]) != HAL_OK) {
 1014              		.loc 1 144 9 view .LVU299
 144:Core/Src/main.c **** 	        if (sensor_read(i, &temperatures[i]) != HAL_OK) {
 1015              		.loc 1 144 13 is_stmt 0 view .LVU300
 1016 005e 0024     		movs	r4, #0
 144:Core/Src/main.c **** 	        if (sensor_read(i, &temperatures[i]) != HAL_OK) {
 1017              		.loc 1 144 4 view .LVU301
 1018 0060 00E0     		b	.L68
 1019              	.LVL64:
 1020              	.L69:
 144:Core/Src/main.c **** 	        if (sensor_read(i, &temperatures[i]) != HAL_OK) {
 1021              		.loc 1 144 36 is_stmt 1 discriminator 2 view .LVU302
 1022 0062 0134     		adds	r4, r4, #1
 1023              	.LVL65:
 1024              	.L68:
 144:Core/Src/main.c **** 	        if (sensor_read(i, &temperatures[i]) != HAL_OK) {
 1025              		.loc 1 144 22 discriminator 1 view .LVU303
 1026 0064 0B2C     		cmp	r4, #11
 1027 0066 F7DC     		bgt	.L71
 145:Core/Src/main.c **** 	          sensor_init(i);
 1028              		.loc 1 145 10 view .LVU304
 145:Core/Src/main.c **** 	          sensor_init(i);
 1029              		.loc 1 145 14 is_stmt 0 view .LVU305
 1030 0068 0DEB4401 		add	r1, sp, r4, lsl #1
 1031 006c 2046     		mov	r0, r4
 1032 006e FFF7FEFF 		bl	sensor_read
 1033              	.LVL66:
 145:Core/Src/main.c **** 	          sensor_init(i);
ARM GAS  /tmp/ccM8v3Tj.s 			page 33


 1034              		.loc 1 145 13 view .LVU306
 1035 0072 0028     		cmp	r0, #0
 1036 0074 F5D0     		beq	.L69
 146:Core/Src/main.c **** 	          last_error = HAL_GetTick();
 1037              		.loc 1 146 12 is_stmt 1 view .LVU307
 1038 0076 2046     		mov	r0, r4
 1039 0078 FFF7FEFF 		bl	sensor_init
 1040              	.LVL67:
 147:Core/Src/main.c **** 	        }
 1041              		.loc 1 147 12 view .LVU308
 147:Core/Src/main.c **** 	        }
 1042              		.loc 1 147 25 is_stmt 0 view .LVU309
 1043 007c FFF7FEFF 		bl	HAL_GetTick
 1044              	.LVL68:
 147:Core/Src/main.c **** 	        }
 1045              		.loc 1 147 23 view .LVU310
 1046 0080 014B     		ldr	r3, .L74
 1047 0082 1860     		str	r0, [r3]
 1048 0084 EDE7     		b	.L69
 1049              	.L75:
 1050 0086 00BF     		.align	2
 1051              	.L74:
 1052 0088 00000000 		.word	last_error
 1053 008c 00000000 		.word	hspi1
 1054 0090 00000000 		.word	hcan
 1055 0094 00000000 		.word	canTestData
 1056              	.LBE10:
 1057              		.cfi_endproc
 1058              	.LFE130:
 1060              		.section	.bss.last_error,"aw",%nobits
 1061              		.align	2
 1064              	last_error:
 1065 0000 00000000 		.space	4
 1066              		.global	hspi1
 1067              		.section	.bss.hspi1,"aw",%nobits
 1068              		.align	2
 1071              	hspi1:
 1072 0000 00000000 		.space	100
 1072      00000000 
 1072      00000000 
 1072      00000000 
 1072      00000000 
 1073              		.global	hi2c2
 1074              		.section	.bss.hi2c2,"aw",%nobits
 1075              		.align	2
 1078              	hi2c2:
 1079 0000 00000000 		.space	76
 1079      00000000 
 1079      00000000 
 1079      00000000 
 1079      00000000 
 1080              		.global	hi2c1
 1081              		.section	.bss.hi2c1,"aw",%nobits
 1082              		.align	2
 1085              	hi2c1:
 1086 0000 00000000 		.space	76
 1086      00000000 
ARM GAS  /tmp/ccM8v3Tj.s 			page 34


 1086      00000000 
 1086      00000000 
 1086      00000000 
 1087              		.global	hcan
 1088              		.section	.bss.hcan,"aw",%nobits
 1089              		.align	2
 1092              	hcan:
 1093 0000 00000000 		.space	40
 1093      00000000 
 1093      00000000 
 1093      00000000 
 1093      00000000 
 1094              		.text
 1095              	.Letext0:
 1096              		.file 3 "/home/david/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-non
 1097              		.file 4 "/home/david/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-non
 1098              		.file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
 1099              		.file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
 1100              		.file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
 1101              		.file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h"
 1102              		.file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h"
 1103              		.file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h"
 1104              		.file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
 1105              		.file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h"
 1106              		.file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h"
 1107              		.file 14 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
 1108              		.file 15 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h"
 1109              		.file 16 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
 1110              		.file 17 "Core/Inc/Testbench.h"
 1111              		.file 18 "Core/Inc/AMS_CAN.h"
 1112              		.file 19 "Core/Inc/AMS_HighLevel.h"
 1113              		.file 20 "<built-in>"
ARM GAS  /tmp/ccM8v3Tj.s 			page 35


DEFINED SYMBOLS
                            *ABS*:0000000000000000 main.c
     /tmp/ccM8v3Tj.s:21     .text.MX_GPIO_Init:0000000000000000 $t
     /tmp/ccM8v3Tj.s:26     .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init
     /tmp/ccM8v3Tj.s:152    .text.MX_GPIO_Init:0000000000000094 $d
     /tmp/ccM8v3Tj.s:158    .text.sensor_init:0000000000000000 $t
     /tmp/ccM8v3Tj.s:164    .text.sensor_init:0000000000000000 sensor_init
     /tmp/ccM8v3Tj.s:208    .text.sensor_init:0000000000000028 $d
     /tmp/ccM8v3Tj.s:1085   .bss.hi2c1:0000000000000000 hi2c1
     /tmp/ccM8v3Tj.s:213    .text.sensor_read:0000000000000000 $t
     /tmp/ccM8v3Tj.s:219    .text.sensor_read:0000000000000000 sensor_read
     /tmp/ccM8v3Tj.s:284    .text.sensor_read:0000000000000034 $d
     /tmp/ccM8v3Tj.s:289    .text.readeeprom:0000000000000000 $t
     /tmp/ccM8v3Tj.s:295    .text.readeeprom:0000000000000000 readeeprom
     /tmp/ccM8v3Tj.s:337    .text.readeeprom:0000000000000030 $d
     /tmp/ccM8v3Tj.s:1078   .bss.hi2c2:0000000000000000 hi2c2
     /tmp/ccM8v3Tj.s:342    .text.writeeeprom:0000000000000000 $t
     /tmp/ccM8v3Tj.s:348    .text.writeeeprom:0000000000000000 writeeeprom
     /tmp/ccM8v3Tj.s:391    .text.writeeeprom:0000000000000030 $d
     /tmp/ccM8v3Tj.s:396    .text.Error_Handler:0000000000000000 $t
     /tmp/ccM8v3Tj.s:402    .text.Error_Handler:0000000000000000 Error_Handler
     /tmp/ccM8v3Tj.s:434    .text.MX_CAN_Init:0000000000000000 $t
     /tmp/ccM8v3Tj.s:439    .text.MX_CAN_Init:0000000000000000 MX_CAN_Init
     /tmp/ccM8v3Tj.s:507    .text.MX_CAN_Init:0000000000000038 $d
     /tmp/ccM8v3Tj.s:1092   .bss.hcan:0000000000000000 hcan
     /tmp/ccM8v3Tj.s:513    .text.MX_I2C1_Init:0000000000000000 $t
     /tmp/ccM8v3Tj.s:518    .text.MX_I2C1_Init:0000000000000000 MX_I2C1_Init
     /tmp/ccM8v3Tj.s:599    .text.MX_I2C1_Init:0000000000000048 $d
     /tmp/ccM8v3Tj.s:606    .text.MX_I2C2_Init:0000000000000000 $t
     /tmp/ccM8v3Tj.s:611    .text.MX_I2C2_Init:0000000000000000 MX_I2C2_Init
     /tmp/ccM8v3Tj.s:692    .text.MX_I2C2_Init:0000000000000048 $d
     /tmp/ccM8v3Tj.s:699    .text.MX_SPI1_Init:0000000000000000 $t
     /tmp/ccM8v3Tj.s:704    .text.MX_SPI1_Init:0000000000000000 MX_SPI1_Init
     /tmp/ccM8v3Tj.s:780    .text.MX_SPI1_Init:0000000000000044 $d
     /tmp/ccM8v3Tj.s:1071   .bss.hspi1:0000000000000000 hspi1
     /tmp/ccM8v3Tj.s:786    .text.SystemClock_Config:0000000000000000 $t
     /tmp/ccM8v3Tj.s:792    .text.SystemClock_Config:0000000000000000 SystemClock_Config
     /tmp/ccM8v3Tj.s:914    .text.main:0000000000000000 $t
     /tmp/ccM8v3Tj.s:920    .text.main:0000000000000000 main
     /tmp/ccM8v3Tj.s:1052   .text.main:0000000000000088 $d
     /tmp/ccM8v3Tj.s:1064   .bss.last_error:0000000000000000 last_error
     /tmp/ccM8v3Tj.s:1061   .bss.last_error:0000000000000000 $d
     /tmp/ccM8v3Tj.s:1068   .bss.hspi1:0000000000000000 $d
     /tmp/ccM8v3Tj.s:1075   .bss.hi2c2:0000000000000000 $d
     /tmp/ccM8v3Tj.s:1082   .bss.hi2c1:0000000000000000 $d
     /tmp/ccM8v3Tj.s:1089   .bss.hcan:0000000000000000 $d

UNDEFINED SYMBOLS
HAL_GPIO_WritePin
HAL_GPIO_Init
HAL_I2C_Master_Transmit
HAL_I2C_Master_Receive
HAL_I2C_Mem_Read
HAL_I2C_Mem_Write
HAL_Delay
HAL_CAN_Init
HAL_I2C_Init
ARM GAS  /tmp/ccM8v3Tj.s 			page 36


HAL_I2CEx_ConfigAnalogFilter
HAL_I2CEx_ConfigDigitalFilter
HAL_SPI_Init
memset
HAL_RCC_OscConfig
HAL_RCC_ClockConfig
HAL_RCCEx_PeriphCLKConfig
HAL_Init
HAL_GetTick
AMS_Init
ams_can_init
AMS_Loop
testLoop
canTestData
