560 lines
26 KiB
Plaintext
560 lines
26 KiB
Plaintext
ARM GAS /tmp/cc7wrW4n.s page 1
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1 .cpu cortex-m7
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2 .arch armv7e-m
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3 .fpu fpv5-d16
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4 .eabi_attribute 28, 1
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5 .eabi_attribute 20, 1
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6 .eabi_attribute 21, 1
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7 .eabi_attribute 23, 3
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8 .eabi_attribute 24, 1
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9 .eabi_attribute 25, 1
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10 .eabi_attribute 26, 1
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11 .eabi_attribute 30, 1
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12 .eabi_attribute 34, 1
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13 .eabi_attribute 18, 4
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14 .file "stm32h7xx_it.c"
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15 .text
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16 .Ltext0:
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17 .cfi_sections .debug_frame
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18 .file 1 "Core/Src/stm32h7xx_it.c"
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19 .section .text.NMI_Handler,"ax",%progbits
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20 .align 1
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21 .global NMI_Handler
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22 .syntax unified
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23 .thumb
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24 .thumb_func
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26 NMI_Handler:
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27 .LFB335:
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1:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN Header */
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2:Core/Src/stm32h7xx_it.c **** /**
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3:Core/Src/stm32h7xx_it.c **** ******************************************************************************
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4:Core/Src/stm32h7xx_it.c **** * @file stm32h7xx_it.c
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5:Core/Src/stm32h7xx_it.c **** * @brief Interrupt Service Routines.
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6:Core/Src/stm32h7xx_it.c **** ******************************************************************************
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7:Core/Src/stm32h7xx_it.c **** * @attention
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8:Core/Src/stm32h7xx_it.c **** *
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9:Core/Src/stm32h7xx_it.c **** * Copyright (c) 2025 STMicroelectronics.
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10:Core/Src/stm32h7xx_it.c **** * All rights reserved.
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11:Core/Src/stm32h7xx_it.c **** *
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12:Core/Src/stm32h7xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
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13:Core/Src/stm32h7xx_it.c **** * in the root directory of this software component.
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14:Core/Src/stm32h7xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
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15:Core/Src/stm32h7xx_it.c **** *
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16:Core/Src/stm32h7xx_it.c **** ******************************************************************************
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17:Core/Src/stm32h7xx_it.c **** */
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18:Core/Src/stm32h7xx_it.c **** /* USER CODE END Header */
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19:Core/Src/stm32h7xx_it.c ****
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20:Core/Src/stm32h7xx_it.c **** /* Includes ------------------------------------------------------------------*/
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21:Core/Src/stm32h7xx_it.c **** #include "main.h"
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22:Core/Src/stm32h7xx_it.c **** #include "stm32h7xx_it.h"
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23:Core/Src/stm32h7xx_it.c **** /* Private includes ----------------------------------------------------------*/
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24:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN Includes */
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25:Core/Src/stm32h7xx_it.c **** /* USER CODE END Includes */
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26:Core/Src/stm32h7xx_it.c ****
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27:Core/Src/stm32h7xx_it.c **** /* Private typedef -----------------------------------------------------------*/
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28:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN TD */
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29:Core/Src/stm32h7xx_it.c ****
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30:Core/Src/stm32h7xx_it.c **** /* USER CODE END TD */
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31:Core/Src/stm32h7xx_it.c ****
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ARM GAS /tmp/cc7wrW4n.s page 2
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32:Core/Src/stm32h7xx_it.c **** /* Private define ------------------------------------------------------------*/
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33:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN PD */
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34:Core/Src/stm32h7xx_it.c ****
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35:Core/Src/stm32h7xx_it.c **** /* USER CODE END PD */
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36:Core/Src/stm32h7xx_it.c ****
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37:Core/Src/stm32h7xx_it.c **** /* Private macro -------------------------------------------------------------*/
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38:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN PM */
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39:Core/Src/stm32h7xx_it.c ****
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40:Core/Src/stm32h7xx_it.c **** /* USER CODE END PM */
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41:Core/Src/stm32h7xx_it.c ****
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42:Core/Src/stm32h7xx_it.c **** /* Private variables ---------------------------------------------------------*/
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43:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN PV */
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44:Core/Src/stm32h7xx_it.c ****
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45:Core/Src/stm32h7xx_it.c **** /* USER CODE END PV */
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46:Core/Src/stm32h7xx_it.c ****
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47:Core/Src/stm32h7xx_it.c **** /* Private function prototypes -----------------------------------------------*/
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48:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN PFP */
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49:Core/Src/stm32h7xx_it.c ****
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50:Core/Src/stm32h7xx_it.c **** /* USER CODE END PFP */
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51:Core/Src/stm32h7xx_it.c ****
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52:Core/Src/stm32h7xx_it.c **** /* Private user code ---------------------------------------------------------*/
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53:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN 0 */
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54:Core/Src/stm32h7xx_it.c ****
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55:Core/Src/stm32h7xx_it.c **** /* USER CODE END 0 */
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56:Core/Src/stm32h7xx_it.c ****
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57:Core/Src/stm32h7xx_it.c **** /* External variables --------------------------------------------------------*/
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58:Core/Src/stm32h7xx_it.c **** extern DMA_HandleTypeDef hdma_adc1;
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59:Core/Src/stm32h7xx_it.c **** extern ADC_HandleTypeDef hadc1;
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60:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN EV */
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61:Core/Src/stm32h7xx_it.c ****
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62:Core/Src/stm32h7xx_it.c **** /* USER CODE END EV */
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63:Core/Src/stm32h7xx_it.c ****
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64:Core/Src/stm32h7xx_it.c **** /******************************************************************************/
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65:Core/Src/stm32h7xx_it.c **** /* Cortex Processor Interruption and Exception Handlers */
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66:Core/Src/stm32h7xx_it.c **** /******************************************************************************/
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67:Core/Src/stm32h7xx_it.c **** /**
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68:Core/Src/stm32h7xx_it.c **** * @brief This function handles Non maskable interrupt.
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69:Core/Src/stm32h7xx_it.c **** */
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70:Core/Src/stm32h7xx_it.c **** void NMI_Handler(void)
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71:Core/Src/stm32h7xx_it.c **** {
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28 .loc 1 71 1 view -0
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29 .cfi_startproc
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30 @ Volatile: function does not return.
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31 @ args = 0, pretend = 0, frame = 0
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32 @ frame_needed = 0, uses_anonymous_args = 0
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33 @ link register save eliminated.
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34 .L2:
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72:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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73:Core/Src/stm32h7xx_it.c ****
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74:Core/Src/stm32h7xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
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75:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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76:Core/Src/stm32h7xx_it.c **** while (1)
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35 .loc 1 76 4 view .LVU1
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77:Core/Src/stm32h7xx_it.c **** {
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78:Core/Src/stm32h7xx_it.c **** }
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36 .loc 1 78 3 view .LVU2
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76:Core/Src/stm32h7xx_it.c **** {
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ARM GAS /tmp/cc7wrW4n.s page 3
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37 .loc 1 76 10 view .LVU3
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38 0000 FEE7 b .L2
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39 .cfi_endproc
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40 .LFE335:
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42 .section .text.HardFault_Handler,"ax",%progbits
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43 .align 1
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44 .global HardFault_Handler
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45 .syntax unified
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46 .thumb
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47 .thumb_func
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49 HardFault_Handler:
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50 .LFB336:
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79:Core/Src/stm32h7xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
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80:Core/Src/stm32h7xx_it.c **** }
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81:Core/Src/stm32h7xx_it.c ****
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82:Core/Src/stm32h7xx_it.c **** /**
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83:Core/Src/stm32h7xx_it.c **** * @brief This function handles Hard fault interrupt.
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84:Core/Src/stm32h7xx_it.c **** */
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85:Core/Src/stm32h7xx_it.c **** void HardFault_Handler(void)
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86:Core/Src/stm32h7xx_it.c **** {
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51 .loc 1 86 1 view -0
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52 .cfi_startproc
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53 @ Volatile: function does not return.
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54 @ args = 0, pretend = 0, frame = 0
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55 @ frame_needed = 0, uses_anonymous_args = 0
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56 @ link register save eliminated.
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57 .L4:
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87:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
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88:Core/Src/stm32h7xx_it.c ****
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89:Core/Src/stm32h7xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
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90:Core/Src/stm32h7xx_it.c **** while (1)
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58 .loc 1 90 3 view .LVU5
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91:Core/Src/stm32h7xx_it.c **** {
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92:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
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93:Core/Src/stm32h7xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
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94:Core/Src/stm32h7xx_it.c **** }
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59 .loc 1 94 3 view .LVU6
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90:Core/Src/stm32h7xx_it.c **** {
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60 .loc 1 90 9 view .LVU7
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61 0000 FEE7 b .L4
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62 .cfi_endproc
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63 .LFE336:
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65 .section .text.MemManage_Handler,"ax",%progbits
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66 .align 1
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67 .global MemManage_Handler
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68 .syntax unified
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69 .thumb
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70 .thumb_func
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72 MemManage_Handler:
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73 .LFB337:
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95:Core/Src/stm32h7xx_it.c **** }
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96:Core/Src/stm32h7xx_it.c ****
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97:Core/Src/stm32h7xx_it.c **** /**
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98:Core/Src/stm32h7xx_it.c **** * @brief This function handles Memory management fault.
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99:Core/Src/stm32h7xx_it.c **** */
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100:Core/Src/stm32h7xx_it.c **** void MemManage_Handler(void)
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101:Core/Src/stm32h7xx_it.c **** {
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ARM GAS /tmp/cc7wrW4n.s page 4
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74 .loc 1 101 1 view -0
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75 .cfi_startproc
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76 @ Volatile: function does not return.
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77 @ args = 0, pretend = 0, frame = 0
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78 @ frame_needed = 0, uses_anonymous_args = 0
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79 @ link register save eliminated.
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80 .L6:
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102:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
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103:Core/Src/stm32h7xx_it.c ****
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104:Core/Src/stm32h7xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
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105:Core/Src/stm32h7xx_it.c **** while (1)
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81 .loc 1 105 3 view .LVU9
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106:Core/Src/stm32h7xx_it.c **** {
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107:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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108:Core/Src/stm32h7xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
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109:Core/Src/stm32h7xx_it.c **** }
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82 .loc 1 109 3 view .LVU10
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105:Core/Src/stm32h7xx_it.c **** {
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83 .loc 1 105 9 view .LVU11
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84 0000 FEE7 b .L6
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85 .cfi_endproc
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86 .LFE337:
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88 .section .text.BusFault_Handler,"ax",%progbits
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89 .align 1
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90 .global BusFault_Handler
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91 .syntax unified
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92 .thumb
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93 .thumb_func
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95 BusFault_Handler:
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96 .LFB338:
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110:Core/Src/stm32h7xx_it.c **** }
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111:Core/Src/stm32h7xx_it.c ****
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112:Core/Src/stm32h7xx_it.c **** /**
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113:Core/Src/stm32h7xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
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114:Core/Src/stm32h7xx_it.c **** */
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115:Core/Src/stm32h7xx_it.c **** void BusFault_Handler(void)
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116:Core/Src/stm32h7xx_it.c **** {
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97 .loc 1 116 1 view -0
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98 .cfi_startproc
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99 @ Volatile: function does not return.
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100 @ args = 0, pretend = 0, frame = 0
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101 @ frame_needed = 0, uses_anonymous_args = 0
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102 @ link register save eliminated.
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103 .L8:
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117:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
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118:Core/Src/stm32h7xx_it.c ****
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119:Core/Src/stm32h7xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
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120:Core/Src/stm32h7xx_it.c **** while (1)
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104 .loc 1 120 3 view .LVU13
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121:Core/Src/stm32h7xx_it.c **** {
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122:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
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123:Core/Src/stm32h7xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
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124:Core/Src/stm32h7xx_it.c **** }
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105 .loc 1 124 3 view .LVU14
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120:Core/Src/stm32h7xx_it.c **** {
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106 .loc 1 120 9 view .LVU15
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107 0000 FEE7 b .L8
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ARM GAS /tmp/cc7wrW4n.s page 5
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108 .cfi_endproc
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109 .LFE338:
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111 .section .text.UsageFault_Handler,"ax",%progbits
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112 .align 1
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113 .global UsageFault_Handler
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114 .syntax unified
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115 .thumb
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116 .thumb_func
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118 UsageFault_Handler:
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119 .LFB339:
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125:Core/Src/stm32h7xx_it.c **** }
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126:Core/Src/stm32h7xx_it.c ****
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127:Core/Src/stm32h7xx_it.c **** /**
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128:Core/Src/stm32h7xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
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129:Core/Src/stm32h7xx_it.c **** */
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130:Core/Src/stm32h7xx_it.c **** void UsageFault_Handler(void)
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131:Core/Src/stm32h7xx_it.c **** {
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120 .loc 1 131 1 view -0
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121 .cfi_startproc
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122 @ Volatile: function does not return.
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123 @ args = 0, pretend = 0, frame = 0
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124 @ frame_needed = 0, uses_anonymous_args = 0
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125 @ link register save eliminated.
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126 .L10:
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132:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
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133:Core/Src/stm32h7xx_it.c ****
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134:Core/Src/stm32h7xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
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135:Core/Src/stm32h7xx_it.c **** while (1)
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127 .loc 1 135 3 view .LVU17
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136:Core/Src/stm32h7xx_it.c **** {
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137:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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138:Core/Src/stm32h7xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
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139:Core/Src/stm32h7xx_it.c **** }
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128 .loc 1 139 3 view .LVU18
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135:Core/Src/stm32h7xx_it.c **** {
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129 .loc 1 135 9 view .LVU19
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130 0000 FEE7 b .L10
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131 .cfi_endproc
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132 .LFE339:
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134 .section .text.SVC_Handler,"ax",%progbits
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135 .align 1
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136 .global SVC_Handler
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137 .syntax unified
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138 .thumb
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139 .thumb_func
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141 SVC_Handler:
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142 .LFB340:
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140:Core/Src/stm32h7xx_it.c **** }
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141:Core/Src/stm32h7xx_it.c ****
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142:Core/Src/stm32h7xx_it.c **** /**
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143:Core/Src/stm32h7xx_it.c **** * @brief This function handles System service call via SWI instruction.
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144:Core/Src/stm32h7xx_it.c **** */
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145:Core/Src/stm32h7xx_it.c **** void SVC_Handler(void)
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146:Core/Src/stm32h7xx_it.c **** {
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143 .loc 1 146 1 view -0
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144 .cfi_startproc
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145 @ args = 0, pretend = 0, frame = 0
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ARM GAS /tmp/cc7wrW4n.s page 6
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146 @ frame_needed = 0, uses_anonymous_args = 0
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147 @ link register save eliminated.
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147:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
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148:Core/Src/stm32h7xx_it.c ****
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149:Core/Src/stm32h7xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
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150:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
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151:Core/Src/stm32h7xx_it.c ****
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152:Core/Src/stm32h7xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
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153:Core/Src/stm32h7xx_it.c **** }
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148 .loc 1 153 1 view .LVU21
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149 0000 7047 bx lr
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150 .cfi_endproc
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151 .LFE340:
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153 .section .text.DebugMon_Handler,"ax",%progbits
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154 .align 1
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155 .global DebugMon_Handler
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156 .syntax unified
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157 .thumb
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158 .thumb_func
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160 DebugMon_Handler:
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161 .LFB341:
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154:Core/Src/stm32h7xx_it.c ****
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155:Core/Src/stm32h7xx_it.c **** /**
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156:Core/Src/stm32h7xx_it.c **** * @brief This function handles Debug monitor.
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157:Core/Src/stm32h7xx_it.c **** */
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158:Core/Src/stm32h7xx_it.c **** void DebugMon_Handler(void)
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159:Core/Src/stm32h7xx_it.c **** {
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162 .loc 1 159 1 view -0
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163 .cfi_startproc
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164 @ args = 0, pretend = 0, frame = 0
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165 @ frame_needed = 0, uses_anonymous_args = 0
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166 @ link register save eliminated.
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160:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
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161:Core/Src/stm32h7xx_it.c ****
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162:Core/Src/stm32h7xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
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163:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
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164:Core/Src/stm32h7xx_it.c ****
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165:Core/Src/stm32h7xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
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166:Core/Src/stm32h7xx_it.c **** }
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167 .loc 1 166 1 view .LVU23
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168 0000 7047 bx lr
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169 .cfi_endproc
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170 .LFE341:
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172 .section .text.PendSV_Handler,"ax",%progbits
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173 .align 1
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174 .global PendSV_Handler
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175 .syntax unified
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176 .thumb
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177 .thumb_func
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179 PendSV_Handler:
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180 .LFB342:
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167:Core/Src/stm32h7xx_it.c ****
|
||
168:Core/Src/stm32h7xx_it.c **** /**
|
||
169:Core/Src/stm32h7xx_it.c **** * @brief This function handles Pendable request for system service.
|
||
170:Core/Src/stm32h7xx_it.c **** */
|
||
171:Core/Src/stm32h7xx_it.c **** void PendSV_Handler(void)
|
||
172:Core/Src/stm32h7xx_it.c **** {
|
||
ARM GAS /tmp/cc7wrW4n.s page 7
|
||
|
||
|
||
181 .loc 1 172 1 view -0
|
||
182 .cfi_startproc
|
||
183 @ args = 0, pretend = 0, frame = 0
|
||
184 @ frame_needed = 0, uses_anonymous_args = 0
|
||
185 @ link register save eliminated.
|
||
173:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
|
||
174:Core/Src/stm32h7xx_it.c ****
|
||
175:Core/Src/stm32h7xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
|
||
176:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
|
||
177:Core/Src/stm32h7xx_it.c ****
|
||
178:Core/Src/stm32h7xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
|
||
179:Core/Src/stm32h7xx_it.c **** }
|
||
186 .loc 1 179 1 view .LVU25
|
||
187 0000 7047 bx lr
|
||
188 .cfi_endproc
|
||
189 .LFE342:
|
||
191 .section .text.SysTick_Handler,"ax",%progbits
|
||
192 .align 1
|
||
193 .global SysTick_Handler
|
||
194 .syntax unified
|
||
195 .thumb
|
||
196 .thumb_func
|
||
198 SysTick_Handler:
|
||
199 .LFB343:
|
||
180:Core/Src/stm32h7xx_it.c ****
|
||
181:Core/Src/stm32h7xx_it.c **** /**
|
||
182:Core/Src/stm32h7xx_it.c **** * @brief This function handles System tick timer.
|
||
183:Core/Src/stm32h7xx_it.c **** */
|
||
184:Core/Src/stm32h7xx_it.c **** void SysTick_Handler(void)
|
||
185:Core/Src/stm32h7xx_it.c **** {
|
||
200 .loc 1 185 1 view -0
|
||
201 .cfi_startproc
|
||
202 @ args = 0, pretend = 0, frame = 0
|
||
203 @ frame_needed = 0, uses_anonymous_args = 0
|
||
204 0000 08B5 push {r3, lr}
|
||
205 .cfi_def_cfa_offset 8
|
||
206 .cfi_offset 3, -8
|
||
207 .cfi_offset 14, -4
|
||
186:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
|
||
187:Core/Src/stm32h7xx_it.c ****
|
||
188:Core/Src/stm32h7xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
|
||
189:Core/Src/stm32h7xx_it.c **** HAL_IncTick();
|
||
208 .loc 1 189 3 view .LVU27
|
||
209 0002 FFF7FEFF bl HAL_IncTick
|
||
210 .LVL0:
|
||
190:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
|
||
191:Core/Src/stm32h7xx_it.c ****
|
||
192:Core/Src/stm32h7xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
|
||
193:Core/Src/stm32h7xx_it.c **** }
|
||
211 .loc 1 193 1 is_stmt 0 view .LVU28
|
||
212 0006 08BD pop {r3, pc}
|
||
213 .cfi_endproc
|
||
214 .LFE343:
|
||
216 .section .text.DMA1_Stream0_IRQHandler,"ax",%progbits
|
||
217 .align 1
|
||
218 .global DMA1_Stream0_IRQHandler
|
||
219 .syntax unified
|
||
ARM GAS /tmp/cc7wrW4n.s page 8
|
||
|
||
|
||
220 .thumb
|
||
221 .thumb_func
|
||
223 DMA1_Stream0_IRQHandler:
|
||
224 .LFB344:
|
||
194:Core/Src/stm32h7xx_it.c ****
|
||
195:Core/Src/stm32h7xx_it.c **** /******************************************************************************/
|
||
196:Core/Src/stm32h7xx_it.c **** /* STM32H7xx Peripheral Interrupt Handlers */
|
||
197:Core/Src/stm32h7xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
|
||
198:Core/Src/stm32h7xx_it.c **** /* For the available peripheral interrupt handler names, */
|
||
199:Core/Src/stm32h7xx_it.c **** /* please refer to the startup file (startup_stm32h7xx.s). */
|
||
200:Core/Src/stm32h7xx_it.c **** /******************************************************************************/
|
||
201:Core/Src/stm32h7xx_it.c ****
|
||
202:Core/Src/stm32h7xx_it.c **** /**
|
||
203:Core/Src/stm32h7xx_it.c **** * @brief This function handles DMA1 stream0 global interrupt.
|
||
204:Core/Src/stm32h7xx_it.c **** */
|
||
205:Core/Src/stm32h7xx_it.c **** void DMA1_Stream0_IRQHandler(void)
|
||
206:Core/Src/stm32h7xx_it.c **** {
|
||
225 .loc 1 206 1 is_stmt 1 view -0
|
||
226 .cfi_startproc
|
||
227 @ args = 0, pretend = 0, frame = 0
|
||
228 @ frame_needed = 0, uses_anonymous_args = 0
|
||
229 0000 08B5 push {r3, lr}
|
||
230 .cfi_def_cfa_offset 8
|
||
231 .cfi_offset 3, -8
|
||
232 .cfi_offset 14, -4
|
||
207:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
|
||
208:Core/Src/stm32h7xx_it.c ****
|
||
209:Core/Src/stm32h7xx_it.c **** /* USER CODE END DMA1_Stream0_IRQn 0 */
|
||
210:Core/Src/stm32h7xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc1);
|
||
233 .loc 1 210 3 view .LVU30
|
||
234 0002 0248 ldr r0, .L18
|
||
235 0004 FFF7FEFF bl HAL_DMA_IRQHandler
|
||
236 .LVL1:
|
||
211:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
|
||
212:Core/Src/stm32h7xx_it.c ****
|
||
213:Core/Src/stm32h7xx_it.c **** /* USER CODE END DMA1_Stream0_IRQn 1 */
|
||
214:Core/Src/stm32h7xx_it.c **** }
|
||
237 .loc 1 214 1 is_stmt 0 view .LVU31
|
||
238 0008 08BD pop {r3, pc}
|
||
239 .L19:
|
||
240 000a 00BF .align 2
|
||
241 .L18:
|
||
242 000c 00000000 .word hdma_adc1
|
||
243 .cfi_endproc
|
||
244 .LFE344:
|
||
246 .section .text.ADC_IRQHandler,"ax",%progbits
|
||
247 .align 1
|
||
248 .global ADC_IRQHandler
|
||
249 .syntax unified
|
||
250 .thumb
|
||
251 .thumb_func
|
||
253 ADC_IRQHandler:
|
||
254 .LFB345:
|
||
215:Core/Src/stm32h7xx_it.c ****
|
||
216:Core/Src/stm32h7xx_it.c **** /**
|
||
217:Core/Src/stm32h7xx_it.c **** * @brief This function handles ADC1 and ADC2 global interrupts.
|
||
218:Core/Src/stm32h7xx_it.c **** */
|
||
ARM GAS /tmp/cc7wrW4n.s page 9
|
||
|
||
|
||
219:Core/Src/stm32h7xx_it.c **** void ADC_IRQHandler(void)
|
||
220:Core/Src/stm32h7xx_it.c **** {
|
||
255 .loc 1 220 1 is_stmt 1 view -0
|
||
256 .cfi_startproc
|
||
257 @ args = 0, pretend = 0, frame = 0
|
||
258 @ frame_needed = 0, uses_anonymous_args = 0
|
||
259 0000 08B5 push {r3, lr}
|
||
260 .cfi_def_cfa_offset 8
|
||
261 .cfi_offset 3, -8
|
||
262 .cfi_offset 14, -4
|
||
221:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN ADC_IRQn 0 */
|
||
222:Core/Src/stm32h7xx_it.c ****
|
||
223:Core/Src/stm32h7xx_it.c **** /* USER CODE END ADC_IRQn 0 */
|
||
224:Core/Src/stm32h7xx_it.c **** HAL_ADC_IRQHandler(&hadc1);
|
||
263 .loc 1 224 3 view .LVU33
|
||
264 0002 0248 ldr r0, .L22
|
||
265 0004 FFF7FEFF bl HAL_ADC_IRQHandler
|
||
266 .LVL2:
|
||
225:Core/Src/stm32h7xx_it.c **** /* USER CODE BEGIN ADC_IRQn 1 */
|
||
226:Core/Src/stm32h7xx_it.c ****
|
||
227:Core/Src/stm32h7xx_it.c **** /* USER CODE END ADC_IRQn 1 */
|
||
228:Core/Src/stm32h7xx_it.c **** }
|
||
267 .loc 1 228 1 is_stmt 0 view .LVU34
|
||
268 0008 08BD pop {r3, pc}
|
||
269 .L23:
|
||
270 000a 00BF .align 2
|
||
271 .L22:
|
||
272 000c 00000000 .word hadc1
|
||
273 .cfi_endproc
|
||
274 .LFE345:
|
||
276 .text
|
||
277 .Letext0:
|
||
278 .file 2 "/home/k/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-ea
|
||
279 .file 3 "/home/k/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-ea
|
||
280 .file 4 "Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7a3xx.h"
|
||
281 .file 5 "Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h"
|
||
282 .file 6 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h"
|
||
283 .file 7 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h"
|
||
284 .file 8 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_adc.h"
|
||
285 .file 9 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h"
|
||
ARM GAS /tmp/cc7wrW4n.s page 10
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:00000000 stm32h7xx_it.c
|
||
/tmp/cc7wrW4n.s:20 .text.NMI_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:26 .text.NMI_Handler:00000000 NMI_Handler
|
||
/tmp/cc7wrW4n.s:43 .text.HardFault_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:49 .text.HardFault_Handler:00000000 HardFault_Handler
|
||
/tmp/cc7wrW4n.s:66 .text.MemManage_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:72 .text.MemManage_Handler:00000000 MemManage_Handler
|
||
/tmp/cc7wrW4n.s:89 .text.BusFault_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:95 .text.BusFault_Handler:00000000 BusFault_Handler
|
||
/tmp/cc7wrW4n.s:112 .text.UsageFault_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler
|
||
/tmp/cc7wrW4n.s:135 .text.SVC_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:141 .text.SVC_Handler:00000000 SVC_Handler
|
||
/tmp/cc7wrW4n.s:154 .text.DebugMon_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler
|
||
/tmp/cc7wrW4n.s:173 .text.PendSV_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:179 .text.PendSV_Handler:00000000 PendSV_Handler
|
||
/tmp/cc7wrW4n.s:192 .text.SysTick_Handler:00000000 $t
|
||
/tmp/cc7wrW4n.s:198 .text.SysTick_Handler:00000000 SysTick_Handler
|
||
/tmp/cc7wrW4n.s:217 .text.DMA1_Stream0_IRQHandler:00000000 $t
|
||
/tmp/cc7wrW4n.s:223 .text.DMA1_Stream0_IRQHandler:00000000 DMA1_Stream0_IRQHandler
|
||
/tmp/cc7wrW4n.s:242 .text.DMA1_Stream0_IRQHandler:0000000c $d
|
||
/tmp/cc7wrW4n.s:247 .text.ADC_IRQHandler:00000000 $t
|
||
/tmp/cc7wrW4n.s:253 .text.ADC_IRQHandler:00000000 ADC_IRQHandler
|
||
/tmp/cc7wrW4n.s:272 .text.ADC_IRQHandler:0000000c $d
|
||
|
||
UNDEFINED SYMBOLS
|
||
HAL_IncTick
|
||
HAL_DMA_IRQHandler
|
||
hdma_adc1
|
||
HAL_ADC_IRQHandler
|
||
hadc1
|