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sensor-node/Software/build/debug/stm32h7xx_hal_adc_ex.lst

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ARM GAS /tmp/ccTOAmWG.s page 1
1 .cpu cortex-m7
2 .arch armv7e-m
3 .fpu fpv5-d16
4 .eabi_attribute 28, 1
5 .eabi_attribute 20, 1
6 .eabi_attribute 21, 1
7 .eabi_attribute 23, 3
8 .eabi_attribute 24, 1
9 .eabi_attribute 25, 1
10 .eabi_attribute 26, 1
11 .eabi_attribute 30, 1
12 .eabi_attribute 34, 1
13 .eabi_attribute 18, 4
14 .file "stm32h7xx_hal_adc_ex.c"
15 .text
16 .Ltext0:
17 .cfi_sections .debug_frame
18 .file 1 "Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c"
19 .section .text.LL_ADC_SetCalibrationOffsetFactor,"ax",%progbits
20 .align 1
21 .syntax unified
22 .thumb
23 .thumb_func
25 LL_ADC_SetCalibrationOffsetFactor:
26 .LVL0:
27 .LFB151:
28 .file 2 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h"
1:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ******************************************************************************
3:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @file stm32h7xx_ll_adc.h
4:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @author MCD Application Team
5:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Header file of ADC LL module.
6:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ******************************************************************************
7:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @attention
8:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
9:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Copyright (c) 2017 STMicroelectronics.
10:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * All rights reserved.
11:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
12:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This software is licensed under terms that can be found in the LICENSE file
13:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * in the root directory of this software component.
14:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * If no LICENSE file comes with this software, it is provided AS-IS.
15:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
16:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ******************************************************************************
17:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
18:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
19:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Define to prevent recursive inclusion -------------------------------------*/
20:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #ifndef STM32H7xx_LL_ADC_H
21:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define STM32H7xx_LL_ADC_H
22:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
23:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #ifdef __cplusplus
24:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** extern "C" {
25:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
26:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
27:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Includes ------------------------------------------------------------------*/
28:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #include "stm32h7xx.h"
29:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
30:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @addtogroup STM32H7xx_LL_Driver
ARM GAS /tmp/ccTOAmWG.s page 2
31:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
32:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
33:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
34:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined (ADC1) || defined (ADC2) || defined (ADC3)
35:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
36:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL ADC
37:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
38:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
39:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
40:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Private types -------------------------------------------------------------*/
41:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Private variables ---------------------------------------------------------*/
42:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
43:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Private constants ---------------------------------------------------------*/
44:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Constants ADC Private Constants
45:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
46:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
47:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
48:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC calibration: */
49:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal register offset for ADC calibration factors configuration */
50:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
51:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* To select into literals LL_ADC_CALIB_OFFSET, LL_ADC_CALIB_LINEARITY, ... */
52:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* the relevant bits for: */
53:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (concatenation of multiple bits used in different registers) */
54:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC calibration configuration: configuration before calibration start */
55:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC calibration factors: register offset */
56:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CALIB_FACTOR_OFFSET_REGOFFSET (0x00000000UL) /* Register CALFACT defined as referenc
57:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CALIB_FACTOR_LINEARITY_REGOFFSET (0x00000001UL) /* Register CALFACT2 offset vs register
58:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CALIB_FACTOR_REGOFFSET_MASK (ADC_CALIB_FACTOR_OFFSET_REGOFFSET | ADC_CALIB_FACTOR_
59:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CALIB_MODE_MASK (ADC_CR_ADCALLIN)
60:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CALIB_MODE_BINARY_MASK (ADC_CALIB_FACTOR_REGOFFSET_MASK) /* Mask to get binar
61:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
62:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
63:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC group regular sequencer: */
64:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* To select into literal LL_ADC_REG_RANK_x the relevant bits for: */
65:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - sequencer register offset */
66:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */
67:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
68:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal register offset for ADC group regular sequencer configuration */
69:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */
70:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SQR1_REGOFFSET (0x00000000UL)
71:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SQR2_REGOFFSET (0x00000100UL)
72:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SQR3_REGOFFSET (0x00000200UL)
73:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SQR4_REGOFFSET (0x00000300UL)
74:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
75:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_SQRX_REGOFFSET_MASK (ADC_SQR1_REGOFFSET | ADC_SQR2_REGOFFSET | ADC_SQR3_REGO
76:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SQRX_REGOFFSET_POS (8UL) /* Position of bits ADC_SQRx_REGOFFSET in ADC_REG_
77:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_ID_SQRX_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0)
78:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
79:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Definition of ADC group regular sequencer bits information to be inserted */
80:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* into ADC group regular sequencer ranks literals definition. */
81:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_1_SQRX_BITOFFSET_POS ( 6UL) /* Value equivalent to bitfield "ADC_SQR1_SQ1" po
82:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_2_SQRX_BITOFFSET_POS (12UL) /* Value equivalent to bitfield "ADC_SQR1_SQ2" po
83:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_3_SQRX_BITOFFSET_POS (18UL) /* Value equivalent to bitfield "ADC_SQR1_SQ3" po
84:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_4_SQRX_BITOFFSET_POS (24UL) /* Value equivalent to bitfield "ADC_SQR1_SQ4" po
85:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_5_SQRX_BITOFFSET_POS ( 0UL) /* Value equivalent to bitfield "ADC_SQR2_SQ5" po
86:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_6_SQRX_BITOFFSET_POS ( 6UL) /* Value equivalent to bitfield "ADC_SQR2_SQ6" po
87:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_7_SQRX_BITOFFSET_POS (12UL) /* Value equivalent to bitfield "ADC_SQR2_SQ7" po
ARM GAS /tmp/ccTOAmWG.s page 3
88:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_8_SQRX_BITOFFSET_POS (18UL) /* Value equivalent to bitfield "ADC_SQR2_SQ8" po
89:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_9_SQRX_BITOFFSET_POS (24UL) /* Value equivalent to bitfield "ADC_SQR2_SQ9" po
90:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_10_SQRX_BITOFFSET_POS ( 0UL) /* Value equivalent to bitfield "ADC_SQR3_SQ10" p
91:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_11_SQRX_BITOFFSET_POS ( 6UL) /* Value equivalent to bitfield "ADC_SQR3_SQ11" p
92:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_12_SQRX_BITOFFSET_POS (12UL) /* Value equivalent to bitfield "ADC_SQR3_SQ12" p
93:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_13_SQRX_BITOFFSET_POS (18UL) /* Value equivalent to bitfield "ADC_SQR3_SQ13" p
94:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_14_SQRX_BITOFFSET_POS (24UL) /* Value equivalent to bitfield "ADC_SQR3_SQ14" p
95:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_15_SQRX_BITOFFSET_POS ( 0UL) /* Value equivalent to bitfield "ADC_SQR4_SQ15" p
96:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_RANK_16_SQRX_BITOFFSET_POS ( 6UL) /* Value equivalent to bitfield "ADC_SQR4_SQ16" p
97:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
98:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
99:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
100:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC group injected sequencer: */
101:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_RANK_x the relevant bits for: */
102:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - data register offset */
103:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */
104:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
105:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal register offset for ADC group injected data register */
106:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */
107:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_JDR1_REGOFFSET (0x00000000UL)
108:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_JDR2_REGOFFSET (0x00000100UL)
109:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_JDR3_REGOFFSET (0x00000200UL)
110:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_JDR4_REGOFFSET (0x00000300UL)
111:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
112:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_JDRX_REGOFFSET_MASK (ADC_JDR1_REGOFFSET | ADC_JDR2_REGOFFSET | ADC_JDR3_REGO
113:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0)
114:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_JDRX_REGOFFSET_POS (8UL) /* Position of bits ADC_JDRx_REGOFFSET in ADC_INJ_
115:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
116:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Definition of ADC group injected sequencer bits information to be inserted */
117:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* into ADC group injected sequencer ranks literals definition. */
118:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_RANK_1_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ1_Pos)
119:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_RANK_2_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ2_Pos)
120:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_RANK_3_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ3_Pos)
121:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_RANK_4_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ4_Pos)
122:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
123:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
124:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
125:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC group regular trigger: */
126:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */
127:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - regular trigger source */
128:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - regular trigger edge */
129:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (
130:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
131:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */
132:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
133:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
134:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U *
135:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U *
136:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U *
137:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U *
138:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
139:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */
140:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
141:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
142:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U *
143:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U *
144:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U *
ARM GAS /tmp/ccTOAmWG.s page 4
145:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U *
146:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
147:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Definition of ADC group regular trigger bits information. */
148:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS ( 6UL) /* Value equivalent to bitfield "ADC_CFGR_EXTSEL"
149:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_REG_TRIG_EXTEN_BITOFFSET_POS (10UL) /* Value equivalent to bitfield "ADC_CFGR_EXTEN"
150:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
151:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
152:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
153:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC group injected trigger: */
154:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_TRIG_x the relevant bits for: */
155:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - injected trigger source */
156:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - injected trigger edge */
157:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_TRIG_EXT_EDGE_DEFAULT (ADC_JSQR_JEXTEN_0) /* Trigger edge set to rising edge (
158:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
159:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */
160:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
161:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
162:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_TRIG_SOURCE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTSEL) << (4U
163:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U
164:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U
165:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U
166:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
167:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */
168:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
169:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
170:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_TRIG_EDGE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN) << (4U *
171:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U *
172:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U *
173:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U *
174:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
175:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Definition of ADC group injected trigger bits information. */
176:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTSEL_BITOFFSET_POS ( 2UL) /* Value equivalent to bitfield "ADC_JSQR_JEXTSEL
177:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTEN_BITOFFSET_POS ( 6UL) /* Value equivalent to bitfield "ADC_JSQR_JEXTEN"
178:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
179:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
180:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
181:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
182:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
183:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
184:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC channel: */
185:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */
186:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - channel identifier defined by number */
187:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - channel identifier defined by bitfield */
188:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - channel differentiation between external channels (connected to */
189:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* GPIO pins) and internal channels (connected to internal paths) */
190:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - channel sampling time defined by SMPRx register offset */
191:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* and SMPx bits positions into SMPRx register */
192:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR_AWD1CH)
193:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_AWD2CR_AWD2CH)
194:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS (26UL)/* Value equivalent to bitfield "ADC_CHANNEL_ID_N
195:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK | ADC_CHANNEL_ID_BITFIELD_MA
196:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
197:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 (ADC_SQR2_SQ5) /* Equivalent to shift: (ADC_CHANNEL_NUMB
198:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
199:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Channel differentiation between external and internal channels */
200:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH (0x80000000UL) /* Marker of internal channel */
201:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH)
ARM GAS /tmp/ccTOAmWG.s page 5
202:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
203:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal register offset for ADC channel sampling time configuration */
204:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */
205:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SMPR1_REGOFFSET (0x00000000UL)
206:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SMPR2_REGOFFSET (0x02000000UL)
207:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_SMPRX_REGOFFSET_MASK (ADC_SMPR1_REGOFFSET | ADC_SMPR2_REGOFFSET)
208:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SMPRX_REGOFFSET_POS (25UL) /* Position of bits ADC_SMPRx_REGOFFSET in ADC_CH
209:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
210:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_MASK (0x01F00000UL)
211:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_POS (20UL) /* Value equivalent to bitfield "ADC_CH
212:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
213:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Definition of channels ID number information to be inserted into */
214:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* channels literals definition. */
215:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_0_NUMBER (0x00000000UL)
216:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_1_NUMBER (
217:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_2_NUMBER (
218:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_3_NUMBER (
219:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_4_NUMBER ( ADC_CFGR_AWD1CH
220:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_5_NUMBER ( ADC_CFGR_AWD1CH
221:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_6_NUMBER ( ADC_CFGR_AWD1CH
222:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_7_NUMBER ( ADC_CFGR_AWD1CH
223:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_8_NUMBER ( ADC_CFGR_AWD1CH_3
224:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_9_NUMBER ( ADC_CFGR_AWD1CH_3
225:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_10_NUMBER ( ADC_CFGR_AWD1CH_3
226:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_11_NUMBER ( ADC_CFGR_AWD1CH_3
227:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_12_NUMBER ( ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH
228:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_13_NUMBER ( ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH
229:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_14_NUMBER ( ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH
230:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_15_NUMBER ( ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH
231:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_16_NUMBER (ADC_CFGR_AWD1CH_4
232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_17_NUMBER (ADC_CFGR_AWD1CH_4
233:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_18_NUMBER (ADC_CFGR_AWD1CH_4
234:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_19_NUMBER (ADC_CFGR_AWD1CH_4
235:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
236:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Definition of channels ID bitfield information to be inserted into */
237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* channels literals definition. */
238:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
239:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_1_BITFIELD (ADC_AWD2CR_AWD2CH_1)
240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_2_BITFIELD (ADC_AWD2CR_AWD2CH_2)
241:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_3_BITFIELD (ADC_AWD2CR_AWD2CH_3)
242:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_4_BITFIELD (ADC_AWD2CR_AWD2CH_4)
243:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_5_BITFIELD (ADC_AWD2CR_AWD2CH_5)
244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_6_BITFIELD (ADC_AWD2CR_AWD2CH_6)
245:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_7_BITFIELD (ADC_AWD2CR_AWD2CH_7)
246:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_8_BITFIELD (ADC_AWD2CR_AWD2CH_8)
247:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_9_BITFIELD (ADC_AWD2CR_AWD2CH_9)
248:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_10_BITFIELD (ADC_AWD2CR_AWD2CH_10)
249:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_11_BITFIELD (ADC_AWD2CR_AWD2CH_11)
250:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_12_BITFIELD (ADC_AWD2CR_AWD2CH_12)
251:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_13_BITFIELD (ADC_AWD2CR_AWD2CH_13)
252:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_14_BITFIELD (ADC_AWD2CR_AWD2CH_14)
253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_15_BITFIELD (ADC_AWD2CR_AWD2CH_15)
254:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_16_BITFIELD (ADC_AWD2CR_AWD2CH_16)
255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_17_BITFIELD (ADC_AWD2CR_AWD2CH_17)
256:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_18_BITFIELD (ADC_AWD2CR_AWD2CH_18)
257:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_19_BITFIELD (ADC_AWD2CR_AWD2CH_19)
258:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
ARM GAS /tmp/ccTOAmWG.s page 6
259:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Definition of channels sampling time information to be inserted into */
260:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* channels literals definition. */
261:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_0_SMP (ADC_SMPR1_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF
262:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_1_SMP (ADC_SMPR1_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF
263:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_2_SMP (ADC_SMPR1_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF
264:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_3_SMP (ADC_SMPR1_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF
265:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_4_SMP (ADC_SMPR1_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF
266:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_5_SMP (ADC_SMPR1_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF
267:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_6_SMP (ADC_SMPR1_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF
268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_7_SMP (ADC_SMPR1_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF
269:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_8_SMP (ADC_SMPR1_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF
270:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_9_SMP (ADC_SMPR1_REGOFFSET | ((27UL) << ADC_CHANNEL_SMPx_BITOF
271:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_10_SMP (ADC_SMPR2_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF
272:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_11_SMP (ADC_SMPR2_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF
273:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_12_SMP (ADC_SMPR2_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF
274:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_13_SMP (ADC_SMPR2_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF
275:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_14_SMP (ADC_SMPR2_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF
276:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_15_SMP (ADC_SMPR2_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF
277:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_16_SMP (ADC_SMPR2_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF
278:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_17_SMP (ADC_SMPR2_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF
279:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_18_SMP (ADC_SMPR2_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF
280:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CHANNEL_19_SMP (ADC_SMPR2_REGOFFSET | ((27UL) << ADC_CHANNEL_SMPx_BITOF
281:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
282:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
283:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC mode single or differential ended: */
284:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* To select into literals LL_ADC_SINGLE_ENDED or LL_ADC_SINGLE_DIFFERENTIAL */
285:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* the relevant bits for: */
286:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (concatenation of multiple bits used in different registers) */
287:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC calibration: calibration start, calibration factor get or set */
288:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC channels: set each ADC channel ending mode */
289:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_START_MASK (ADC_CR_ADCALDIF)
290:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_FACTOR_MASK (ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S)
291:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_MASK (ADC_CHANNEL_ID_BITFIELD_MASK) /* Equivalent to ADC_DIFS
292:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_4 | ADC_CALFACT_CALFACT_S_3) /* B
293:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK (0x00010000UL) /* Selection o
294:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_POS (16UL) /* Selection o
295:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4 (ADC_SINGLEDIFF_CALIB_F_BIT_D_POS - 4UL) /* Shift of bi
296:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
297:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC analog watchdog: */
298:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */
299:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (concatenation of multiple bits used in different analog watchdogs, */
300:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (feature of several watchdogs not available on all STM32 families)). */
301:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - analog watchdog 1: monitored channel defined by number, */
302:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* selection of ADC group (ADC groups regular and-or injected). */
303:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - analog watchdog 2 and 3: monitored channel defined by bitfield, no */
304:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* selection on groups. */
305:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
306:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog channel configuration */
307:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CR1_REGOFFSET (0x00000000UL)
308:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CR2_REGOFFSET (0x00100000UL)
309:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CR3_REGOFFSET (0x00200000UL)
310:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
311:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Register offset gap between AWD1 and AWD2-AWD3 configuration registers */
312:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (Set separately as ADC_AWD_CRX_REGOFFSET to spare 32 bits space */
313:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
314:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_VAL (0x00000024UL)
315:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
ARM GAS /tmp/ccTOAmWG.s page 7
316:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD
317:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
318:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR_AWD1CH | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN |
319:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CR23_CHANNEL_MASK (ADC_AWD2CR_AWD2CH)
320:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR23_CHANNEL_MASK)
321:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
322:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_POS (20UL) /* Position of bits ADC_AWD_CRx_REGOFFSET in ADC_
323:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
324:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog threshold configuration */
325:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
326:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TR2_REGOFFSET (ADC_AWD_CR2_REGOFFSET)
327:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
328:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET | ADC_AWD_TR2_REGOFFSET | ADC_AWD
329:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_POS (ADC_AWD_CRX_REGOFFSET_POS) /* Position of bits ADC_
330:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
331:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_MASK (0x00010000UL) /* Selection of 1 bit t
332:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_POS (16UL) /* Selection of 1 bit t
333:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_SHIFT4 (ADC_AWD_TRX_BIT_HIGH_POS - 4UL) /* Shift of bit ADC_AWD
334:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
335:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
336:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Register offset gap between AWD1 and AWD2-AWD3 thresholds registers */
337:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (Set separately as ADC_AWD_TRX_REGOFFSET to spare 32 bits space */
338:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
339:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_AWD_TR12_REGOFFSETGAP_VAL (0x00000022UL)
340:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
341:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Legacy literals */
342:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD1_TR LL_ADC_AWD1
343:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD2_TR LL_ADC_AWD2
344:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD3_TR LL_ADC_AWD3
345:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
346:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal mask for ADC offset: */
347:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal register offset for ADC offset number configuration */
348:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_OFR1_REGOFFSET (0x00000000UL)
349:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_OFR2_REGOFFSET (0x00000001UL)
350:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_OFR3_REGOFFSET (0x00000002UL)
351:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_OFR4_REGOFFSET (0x00000003UL)
352:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_OFRx_REGOFFSET_MASK (ADC_OFR1_REGOFFSET | ADC_OFR2_REGOFFSET | ADC_OFR3_REGO
353:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
354:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
355:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* ADC registers bits positions */
356:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CFGR_RES_BITOFFSET_POS (ADC_CFGR_RES_Pos)
357:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos)
358:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CFGR_AWD1EN_BITOFFSET_POS (ADC_CFGR_AWD1EN_Pos)
359:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CFGR_JAWD1EN_BITOFFSET_POS (ADC_CFGR_JAWD1EN_Pos)
360:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
361:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CFGR_RES_BITOFFSET_POS_ADC3 (ADC3_CFGR_RES_Pos)
362:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
363:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
364:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
365:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* ADC registers bits groups */
366:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JA
367:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
368:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
369:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* ADC internal channels related definitions */
370:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Internal voltage reference VrefInt */
371:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_3)
372:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define VREFINT_CAL_ADDR ((uint16_t*) (0x8fff810UL)) /* Internal voltage referen
ARM GAS /tmp/ccTOAmWG.s page 8
373:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Address related to STM32
374:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else /* ADC_VER_V5_90 || ADC_VER_V5_X */
375:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define VREFINT_CAL_ADDR ((uint16_t*) (0x1FF1E860UL)) /* Internal voltage referen
376:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_3 */
377:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define VREFINT_CAL_VREF (3300UL) /* Analog voltage reference
378:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Temperature sensor */
379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_3)
380:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define TEMPSENSOR_CAL1_ADDR ((uint16_t*) (0x8fff814UL)) /* Internal temperature sen
381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define TEMPSENSOR_CAL2_ADDR ((uint16_t*) (0x8fff818UL)) /* Internal temperature sen
382:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Addresses related to STM
383:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else /* ADC_VER_V5_90 || ADC_VER_V5_X */
384:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define TEMPSENSOR_CAL1_ADDR ((uint16_t*) (0x1FF1E820UL)) /* Internal temperature sen
385:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define TEMPSENSOR_CAL2_ADDR ((uint16_t*) (0x1FF1E840UL)) /* Internal temperature sen
386:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_3 */
387:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
388:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define TEMPSENSOR_CAL1_TEMP (30L) /* Internal temperature sen
389:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined (STM32H742xx) || defined (STM32H743xx) || defined (STM32H753xx) || defined (STM32H750xx
390:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define TEMPSENSOR_CAL2_TEMP ((((DBGMCU->IDCODE) >> 16) <= ((uint32_t)0x1003)) ? 110L
391:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** temperature at which temperature sensor has been calibra
392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** 110 °C for revision Y and 130 °C for revision V (tole
393:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
394:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define TEMPSENSOR_CAL2_TEMP (130L) /* Internal temperature sen
395:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** calibrated in production for data into TEMPSENSOR_CAL2_A
396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* defined (STM32H742xx) || defined (STM32H743xx) || defined (STM32H753xx) */
397:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define TEMPSENSOR_CAL_VREFANALOG (3300UL) /* Analog voltage reference
398:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
399:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Registers addresses with ADC linearity calibration content (programmed during device production,
400:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_LINEAR_CALIB_REG_1_ADDR ((uint32_t*) (0x1FF1EC00UL))
401:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_LINEAR_CALIB_REG_2_ADDR ((uint32_t*) (0x1FF1EC04UL))
402:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_LINEAR_CALIB_REG_3_ADDR ((uint32_t*) (0x1FF1EC08UL))
403:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_LINEAR_CALIB_REG_4_ADDR ((uint32_t*) (0x1FF1EC0CUL))
404:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_LINEAR_CALIB_REG_5_ADDR ((uint32_t*) (0x1FF1EC10UL))
405:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_LINEAR_CALIB_REG_6_ADDR ((uint32_t*) (0x1FF1EC14UL))
406:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_LINEAR_CALIB_REG_COUNT (6UL)
407:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
408:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
409:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
410:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
411:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_Alias_definition ADC Alias definition
412:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
413:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
414:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SetChannelPreSelection LL_ADC_SetChannelPreselection /* Alias of LL_ADC_SetChann
415:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
416:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
417:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
418:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
419:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
420:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Private macros ------------------------------------------------------------*/
421:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Macros ADC Private Macros
422:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
423:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
424:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
425:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
426:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Driver macro reserved for internal use: set a pointer to
427:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a register from a register basis from which an offset
428:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is applied.
429:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __REG__ Register basis from which the offset is applied.
ARM GAS /tmp/ccTOAmWG.s page 9
430:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __REG_OFFFSET__ Offset to be applied (unit: number of registers).
431:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Pointer to register address
432:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
433:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
434:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__IO uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL))))
435:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
436:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
437:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
438:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
439:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
440:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
441:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Exported types ------------------------------------------------------------*/
442:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(USE_FULL_LL_DRIVER)
443:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
444:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
445:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
446:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
447:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
448:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Structure definition of some features of ADC common parameters
449:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and multimode
450:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (all ADC instances belonging to the same ADC common instance).
451:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_CommonInit()
452:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is conditioned to ADC instances state (all ADC instances
453:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sharing the same ADC common instance):
454:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * All ADC instances sharing the same ADC common instance must be
455:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * disabled.
456:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
457:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** typedef struct
458:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
459:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and
460:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_COMMON
461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** @note On this STM32 series, if ADC group injected is u
462:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** clock ratio constraints between ADC clock and AH
463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** must be respected. Refer to reference manual.
464:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
466:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
467:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t Multimode; /*!< Set ADC multimode configuration to operate in independ
468:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_
469:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
470:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
471:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
472:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t MultiDMATransfer; /*!< Set ADC dual ADC mode DMA transfer data format: Each D
473:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_
474:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
475:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
476:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
477:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t MultiTwoSamplingDelay; /*!< Set ADC multimode delay between 2 sampling phases.
478:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_
479:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
480:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
481:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
482:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** } LL_ADC_CommonInitTypeDef;
483:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
484:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
485:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Structure definition of some features of ADC instance.
486:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC instance.
ARM GAS /tmp/ccTOAmWG.s page 10
487:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Affects both group regular and group injected (availability
488:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of ADC group injected depends on STM32 families).
489:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to corresponding unitary functions into
490:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Instance .
491:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_Init()
492:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is conditioned to ADC state:
493:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instance must be disabled.
494:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency
495:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different
496:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * features can be set under different ADC state conditions
497:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going,
498:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC enabled with conversion on going, ...)
499:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function
500:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and potentially with ADC in a different state than disabled,
501:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * refer to description of each function for setting
502:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * conditioned to ADC state.
503:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
504:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** typedef struct
505:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
506:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t Resolution; /*!< Set ADC resolution.
507:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_RESOLU
508:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
509:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
510:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
511:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t LeftBitShift; /*!< Configures the left shifting applied to the final resu
512:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_LEFT_B
513:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
514:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t LowPowerMode; /*!< Set ADC low power mode.
515:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_LP_MOD
516:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
517:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
518:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
519:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** } LL_ADC_InitTypeDef;
520:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
521:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
522:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Structure definition of some features of ADC group regular.
523:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group regular.
524:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to corresponding unitary functions into
525:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular
526:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (functions with prefix "REG").
527:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_REG_Init()
528:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is conditioned to ADC state:
529:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instance must be disabled.
530:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency
531:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different
532:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * features can be set under different ADC state conditions
533:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going,
534:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC enabled with conversion on going, ...)
535:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function
536:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and potentially with ADC in a different state than disabled,
537:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * refer to description of each function for setting
538:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * conditioned to ADC state.
539:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
540:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** typedef struct
541:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
542:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: inter
543:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_TR
ARM GAS /tmp/ccTOAmWG.s page 11
544:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** @note On this STM32 series, setting trigger source to
545:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (default setting for compatibility with some ADC
546:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** In case of need to modify trigger edge, use func
547:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
548:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
549:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
550:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group regular sequencer length.
551:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE
552:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
553:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
554:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
555:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: se
556:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE
557:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** @note This parameter has an effect only if group regul
558:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (scan length of 2 ranks or more).
559:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
560:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
561:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regula
563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_CO
564:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Note: It is not possible to enable both ADC group regu
565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
566:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
567:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
568:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t DataTransferMode; /*!< Set ADC group regular conversion data transfer mode: n
569:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_DA
570:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
571:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
572:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
573:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun:
574:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** data preserved or overwritten.
575:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_OV
576:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
578:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
579:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** } LL_ADC_REG_InitTypeDef;
580:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
581:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
582:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Structure definition of some features of ADC group injected.
583:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group injected.
584:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to corresponding unitary functions into
585:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular
586:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (functions with prefix "INJ").
587:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_INJ_Init()
588:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is conditioned to ADC state:
589:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instance must be disabled.
590:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency
591:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different
592:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * features can be set under different ADC state conditions
593:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going,
594:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC enabled with conversion on going, ...)
595:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function
596:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and potentially with ADC in a different state than disabled,
597:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * refer to description of each function for setting
598:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * conditioned to ADC state.
599:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
600:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** typedef struct
ARM GAS /tmp/ccTOAmWG.s page 12
601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
602:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group injected conversion trigger source: inte
603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR
604:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** @note On this STM32 series, setting trigger source to
605:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (default setting for compatibility with some ADC
606:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** In case of need to modify trigger edge, use func
607:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
608:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
609:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
610:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group injected sequencer length.
611:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE
612:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
613:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
614:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
615:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group injected sequencer discontinuous mode: s
616:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE
617:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** @note This parameter has an effect only if group injec
618:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (scan length of 2 ranks or more).
619:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
620:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
621:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
622:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t TrigAuto; /*!< Set ADC group injected conversion trigger: independent
623:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR
624:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Note: This parameter must be set to set to independent
625:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
626:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** This feature can be modified afterwards using unitary
627:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
628:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** } LL_ADC_INJ_InitTypeDef;
629:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
630:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
631:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
632:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
633:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* USE_FULL_LL_DRIVER */
634:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
635:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Exported constants --------------------------------------------------------*/
636:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
637:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
638:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
639:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
640:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_FLAG ADC flags
641:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Flags defines which can be used with LL_ADC_ReadReg function
642:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
643:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
644:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /*!< ADC flag ADC instance ready */
645:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC flag ADC group regular end o
646:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOS ADC_ISR_EOS /*!< ADC flag ADC group regular end o
647:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC flag ADC group regular overr
648:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC flag ADC group regular end o
649:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC ADC_ISR_JEOC /*!< ADC flag ADC group injected end
650:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS ADC_ISR_JEOS /*!< ADC flag ADC group injected end
651:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF ADC_ISR_JQOVF /*!< ADC flag ADC group injected cont
652:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1 ADC_ISR_AWD1 /*!< ADC flag ADC analog watchdog 1 *
653:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2 ADC_ISR_AWD2 /*!< ADC flag ADC analog watchdog 2 *
654:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3 ADC_ISR_AWD3 /*!< ADC flag ADC analog watchdog 3 *
655:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_LDORDY ADC_ISR_LDORDY /*!< ADC flag ADC LDO output voltage
656:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_MST ADC_CSR_ADRDY_MST /*!< ADC flag ADC multimode master in
657:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_SLV ADC_CSR_ADRDY_SLV /*!< ADC flag ADC multimode slave ins
ARM GAS /tmp/ccTOAmWG.s page 13
658:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_MST ADC_CSR_EOC_MST /*!< ADC flag ADC multimode master gr
659:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_SLV ADC_CSR_EOC_SLV /*!< ADC flag ADC multimode slave gro
660:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_MST ADC_CSR_EOS_MST /*!< ADC flag ADC multimode master gr
661:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_SLV ADC_CSR_EOS_SLV /*!< ADC flag ADC multimode slave gro
662:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_MST ADC_CSR_OVR_MST /*!< ADC flag ADC multimode master gr
663:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_SLV ADC_CSR_OVR_SLV /*!< ADC flag ADC multimode slave gro
664:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_MST ADC_CSR_EOSMP_MST /*!< ADC flag ADC multimode master gr
665:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_SLV ADC_CSR_EOSMP_SLV /*!< ADC flag ADC multimode slave gro
666:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_MST ADC_CSR_JEOC_MST /*!< ADC flag ADC multimode master gr
667:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_SLV ADC_CSR_JEOC_SLV /*!< ADC flag ADC multimode slave gro
668:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_MST ADC_CSR_JEOS_MST /*!< ADC flag ADC multimode master gr
669:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_SLV ADC_CSR_JEOS_SLV /*!< ADC flag ADC multimode slave gro
670:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_MST ADC_CSR_JQOVF_MST /*!< ADC flag ADC multimode master gr
671:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_SLV ADC_CSR_JQOVF_SLV /*!< ADC flag ADC multimode slave gro
672:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_MST ADC_CSR_AWD1_MST /*!< ADC flag ADC multimode master an
673:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_SLV ADC_CSR_AWD1_SLV /*!< ADC flag ADC multimode slave ana
674:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_MST ADC_CSR_AWD2_MST /*!< ADC flag ADC multimode master an
675:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_SLV ADC_CSR_AWD2_SLV /*!< ADC flag ADC multimode slave ana
676:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_MST ADC_CSR_AWD3_MST /*!< ADC flag ADC multimode master an
677:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_SLV ADC_CSR_AWD3_SLV /*!< ADC flag ADC multimode slave ana
678:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
679:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
680:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
681:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
682:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
683:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
684:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
685:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
686:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /*!< ADC interruption ADC instance re
687:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_EOC ADC_IER_EOCIE /*!< ADC interruption ADC group regul
688:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_EOS ADC_IER_EOSIE /*!< ADC interruption ADC group regul
689:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_OVR ADC_IER_OVRIE /*!< ADC interruption ADC group regul
690:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC interruption ADC group regul
691:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_JEOC ADC_IER_JEOCIE /*!< ADC interruption ADC group injec
692:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_JEOS ADC_IER_JEOSIE /*!< ADC interruption ADC group injec
693:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_JQOVF ADC_IER_JQOVFIE /*!< ADC interruption ADC group injec
694:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_AWD1 ADC_IER_AWD1IE /*!< ADC interruption ADC analog watc
695:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_AWD2 ADC_IER_AWD2IE /*!< ADC interruption ADC analog watc
696:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_IT_AWD3 ADC_IER_AWD3IE /*!< ADC interruption ADC analog watc
697:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
698:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
699:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
700:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
701:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
702:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
703:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
704:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* List of ADC registers intended to be used (most commonly) with */
705:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* DMA transfer. */
706:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */
707:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA (0x00000000UL) /* ADC group regular conversion data re
708:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA_MULTI (0x00000001UL) /* ADC group regular conversion data re
709:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
710:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
711:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
712:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
713:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source
714:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
ARM GAS /tmp/ccTOAmWG.s page 14
715:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
716:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CCR_CKMODE_0) /*
717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CCR_CKMODE_1 ) /*
718:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CCR_CKMODE_1 | ADC_CCR_CKMODE_0) /*
719:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV1 (0x00000000UL) /*
720:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*
721:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /*
722:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*
723:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /*
724:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*
725:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 ) /*
726:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*
727:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*
728:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*
729:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*
730:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*
731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
732:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
735:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels
736:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
737:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
738:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Other measurement paths to internal channels may be available */
739:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (connections to other peripherals). */
740:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* If they are not listed below, they do not require any specific */
741:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* path enable. In this case, Access to measurement path is done */
742:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* only by selecting the corresponding ADC internal channel. */
743:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_NONE (0x00000000UL) /*!< ADC measurement paths all di
744:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /*!< ADC measurement path to inte
745:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSEN) /*!< ADC measurement path to inte
746:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATEN) /*!< ADC measurement path to inte
747:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
748:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
749:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
750:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
751:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_BOOST_MODE ADC instance - Boost mode
752:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
753:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
754:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_BOOST_MODE_6MHZ25 (0x00000000UL) /*!< B
755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_BOOST_MODE_12MHZ5 ( ADC_CR_BOOST_0) /*!< B
756:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_BOOST_MODE_20MHZ ( ADC_CR_BOOST_1 ) /*!< B
757:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_BOOST_MODE_25MHZ ((ADC_CR_BOOST_0 <<2) | ADC_CR_BOOST_1 ) /*!< B
758:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_BOOST_MODE_50MHZ ((ADC_CR_BOOST_0 <<2) | ADC_CR_BOOST_1 | ADC_CR_BOOST_0) /*!< B
759:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
760:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
761:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
762:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
763:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CALIBRATION_OFFSET_LINEARITY ADC instance - Calibration mode for offset an
764:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
765:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
766:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_OFFSET (ADC_CALIB_FACTOR_OFFSET_REGOFFSET)
767:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_LINEARITY (ADC_CALIB_FACTOR_LINEARITY_REGOFFSET)
768:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_OFFSET_LINEARITY (ADC_CALIB_FACTOR_LINEARITY_REGOFFSET | ADC_CR_ADCALLIN)
769:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
770:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
771:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
ARM GAS /tmp/ccTOAmWG.s page 15
772:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
773:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CALIBRATION_LINEARITY_WORD ADC instance - Calibration linearity words
774:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
775:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
776:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_LINEARITY_WORD1 (ADC_CR_LINCALRDYW1) /*!< ADC calibration linearity w
777:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_LINEARITY_WORD2 (ADC_CR_LINCALRDYW2) /*!< ADC calibration linearity w
778:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_LINEARITY_WORD3 (ADC_CR_LINCALRDYW3) /*!< ADC calibration linearity w
779:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_LINEARITY_WORD4 (ADC_CR_LINCALRDYW4) /*!< ADC calibration linearity w
780:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_LINEARITY_WORD5 (ADC_CR_LINCALRDYW5) /*!< ADC calibration linearity w
781:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CALIB_LINEARITY_WORD6 (ADC_CR_LINCALRDYW6) /*!< ADC calibration linearity w
782:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
783:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
784:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
785:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
786:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution
787:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
788:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
789:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_16B (0x00000000UL) /*!<
790:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_14B ( ADC_CFGR_RES_0) /*!<
791:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_12B ( ADC_CFGR_RES_1 ) /*!<
792:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_10B ( ADC_CFGR_RES_1 | ADC_CFGR_RES_0) /*!<
793:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
794:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined (ADC_VER_V5_X)
795:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_14B_OPT (ADC_CFGR_RES_2 | ADC_CFGR_RES_0) /*!<
796:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_12B_OPT (ADC_CFGR_RES_2 | ADC_CFGR_RES_1 ) /*!<
797:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
798:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
799:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined (ADC_VER_V5_3) || defined(ADC_VER_V5_V90)
800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_8B (ADC_CFGR_RES_2|ADC_CFGR_RES_1 | ADC_CFGR_RES_0) /*!< AD
801:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
802:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_8B (ADC_CFGR_RES_2 ) /*!< AD
803:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /*!< Th
804:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
805:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
806:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
807:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
808:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_RESOLUTION_6B (ADC3_CFGR_RES_1 | ADC3_CFGR_RES_0) /*!< ADC resolutio
809:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
810:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
811:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
812:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
813:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
814:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
815:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment
816:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
817:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
818:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_RIGHT (0x00000000UL) /*!< ADC conversion data alignmen
819:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_LEFT (ADC3_CFGR_ALIGN) /*!< ADC conversion data alignme
820:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
821:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
822:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
823:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
824:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
825:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
826:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_LEFT_BIT_SHIFT ADC left Shift
827:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
828:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
ARM GAS /tmp/ccTOAmWG.s page 16
829:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_NONE (0x00000000UL)
830:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_1 (ADC_CFGR2_LSHIFT_0)
831:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_2 (ADC_CFGR2_LSHIFT_1)
832:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_3 (ADC_CFGR2_LSHIFT_1 | ADC_CFGR2_LSHIFT_0)
833:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_4 (ADC_CFGR2_LSHIFT_2)
834:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_5 (ADC_CFGR2_LSHIFT_2 | ADC_CFGR2_LSHIFT_0)
835:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_6 (ADC_CFGR2_LSHIFT_2 | ADC_CFGR2_LSHIFT_1)
836:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_7 (ADC_CFGR2_LSHIFT_2 | ADC_CFGR2_LSHIFT_1 | ADC_CFGR2_LSHIFT_0)
837:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_8 (ADC_CFGR2_LSHIFT_3)
838:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_9 (ADC_CFGR2_LSHIFT_3 | ADC_CFGR2_LSHIFT_0)
839:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_10 (ADC_CFGR2_LSHIFT_3 | ADC_CFGR2_LSHIFT_1)
840:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_11 (ADC_CFGR2_LSHIFT_3 | ADC_CFGR2_LSHIFT_1 | ADC_CFGR2_LSHIFT_0)
841:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_12 (ADC_CFGR2_LSHIFT_3 | ADC_CFGR2_LSHIFT_2)
842:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_13 (ADC_CFGR2_LSHIFT_3 | ADC_CFGR2_LSHIFT_2 | ADC_CFGR2_LSHIFT_0)
843:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_14 (ADC_CFGR2_LSHIFT_3 | ADC_CFGR2_LSHIFT_2 | ADC_CFGR2_LSHIFT_1)
844:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LEFT_BIT_SHIFT_15 (ADC_CFGR2_LSHIFT_3 | ADC_CFGR2_LSHIFT_2 | ADC_CFGR2_LSHIFT_1 |
845:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
846:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
847:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
848:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
849:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode
850:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
851:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
852:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LP_MODE_NONE (0x00000000UL) /*!< No ADC low powe
853:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_LP_AUTOWAIT (ADC_CFGR_AUTDLY) /*!< ADC low power m
854:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
855:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
856:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
857:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
858:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_NB ADC instance - Offset number
859:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
860:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
861:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_1 ADC_OFR1_REGOFFSET /*!< ADC offset number 1: ADC channel
862:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_2 ADC_OFR2_REGOFFSET /*!< ADC offset number 2: ADC channel
863:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_3 ADC_OFR3_REGOFFSET /*!< ADC offset number 3: ADC channel
864:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_4 ADC_OFR4_REGOFFSET /*!< ADC offset number 4: ADC channel
865:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
866:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
867:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
868:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
869:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SIGNED_SATURATION ADC instance - Offset signed saturation mode
870:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
871:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE (0x00000000UL) /*!< ADC offset signed saturatio
873:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE (ADC_OFR1_SSATE) /*!< ADC offset signed saturatio
874:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
875:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
876:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
877:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
878:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_RSHIFT ADC instance - Offset right shift
879:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
880:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
881:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_RSHIFT_DISABLE (0x00000000UL) /*!< ADC offset right shift is disabled
882:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_RSHIFT_ENABLE (ADC_CFGR2_RSHIFT1) /*!< ADC offset right shift is enabled (
883:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
884:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
885:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
ARM GAS /tmp/ccTOAmWG.s page 17
886:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
887:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SATURATION ADC instance - Offset saturation mode
888:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
889:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
890:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_DISABLE (0x00000000UL) /*!< ADC offset saturation is d
891:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_ENABLE (ADC3_OFR1_SATEN) /*!< ADC offset saturation is e
892:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
893:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
894:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
895:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
896:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_STATE ADC instance - Offset state
897:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
898:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_DISABLE (0x00000000UL) /*!< ADC offset disabled (among A
900:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_ENABLE (ADC3_OFR1_OFFSET1_EN) /*!< ADC offset enabled (among A
901:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
902:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
903:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
904:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
905:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SIGN ADC instance - Offset sign
906:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
907:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
908:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_NEGATIVE (0x00000000UL) /*!< ADC offset is negative (among
909:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_POSITIVE (ADC3_OFR1_OFFSETPOS) /*!< ADC offset is positive (among
910:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
911:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
912:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
913:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
914:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
915:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
916:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
917:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups
918:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
919:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
920:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR (0x00000001UL) /*!< ADC group regular (available on all
921:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_GROUP_INJECTED (0x00000002UL) /*!< ADC group injected (not available on
922:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR_INJECTED (0x00000003UL) /*!< ADC both groups regular and injected
923:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
924:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
925:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
926:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
927:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number
928:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
929:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER | ADC_CHANNEL_0_SMP | ADC_CHANNE
931:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER | ADC_CHANNEL_1_SMP | ADC_CHANNE
932:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER | ADC_CHANNEL_2_SMP | ADC_CHANNE
933:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER | ADC_CHANNEL_3_SMP | ADC_CHANNE
934:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER | ADC_CHANNEL_4_SMP | ADC_CHANNE
935:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER | ADC_CHANNEL_5_SMP | ADC_CHANNE
936:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER | ADC_CHANNEL_6_SMP | ADC_CHANNE
937:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER | ADC_CHANNEL_7_SMP | ADC_CHANNE
938:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER | ADC_CHANNEL_8_SMP | ADC_CHANNE
939:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER | ADC_CHANNEL_9_SMP | ADC_CHANNE
940:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER | ADC_CHANNEL_10_SMP | ADC_CHANNE
941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER | ADC_CHANNEL_11_SMP | ADC_CHANNE
942:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER | ADC_CHANNEL_12_SMP | ADC_CHANNE
ARM GAS /tmp/ccTOAmWG.s page 18
943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER | ADC_CHANNEL_13_SMP | ADC_CHANNE
944:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER | ADC_CHANNEL_14_SMP | ADC_CHANNE
945:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER | ADC_CHANNEL_15_SMP | ADC_CHANNE
946:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER | ADC_CHANNEL_16_SMP | ADC_CHANNE
947:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER | ADC_CHANNEL_17_SMP | ADC_CHANNE
948:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER | ADC_CHANNEL_18_SMP | ADC_CHANNE
949:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_19 (ADC_CHANNEL_19_NUMBER | ADC_CHANNEL_19_SMP | ADC_CHANNE
950:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC3)
951:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
952:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
953:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
954:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
955:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
956:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_19 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
957:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
958:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
959:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
960:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
961:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /*!< Specific define for STM32H7A3xx and STM32HB3xx varieties of STM32H7XXX */
962:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_19 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
963:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
964:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_14 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
965:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
966:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_DAC1CH1_ADC2 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
967:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_DAC1CH2_ADC2 (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
968:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(DAC2)
969:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /*!< Specific define for STM32H7A3xx and STM32HB3xx varieties of STM32H7XXX */
970:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_CHANNEL_DAC2CH1_ADC2 (LL_ADC_CHANNEL_15 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD
971:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
972:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
973:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
974:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
975:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
976:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source
977:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
978:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
979:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_SOFTWARE (0x00000000UL)
980:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT)
981:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)
982:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)
983:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT
984:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)
985:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT
986:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT
987:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_
988:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)
989:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT
990:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT
991:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_
992:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EXT
993:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_
994:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_
995:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_
996:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 (ADC_CFGR_EXTSEL_4 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)
997:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT
998:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_LPTIM1_OUT (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT
999:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_LPTIM2_OUT (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_
ARM GAS /tmp/ccTOAmWG.s page 19
1000:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_LPTIM3_OUT (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EXT
1001:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined (TIM23)
1002:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM23_TRGO (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_
1003:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* TIM23 */
1004:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined (TIM24)
1005:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM24_TRGO (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_
1006:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* TIM24 */
1007:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1008:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1009:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1010:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1011:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge
1012:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1013:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1014:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR_EXTEN_0) /*!< ADC group r
1015:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR_EXTEN_1 ) /*!< ADC group r
1016:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR_EXTEN_1 | ADC_CFGR_EXTEN_0) /*!< ADC group r
1017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1018:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1020:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
1021:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SAMPLING_MODE ADC group regular - Sampling mode
1022:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1023:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1024:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_NORMAL (0x00000000UL) /*!< ADC conversions sa
1025:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_BULB (ADC3_CFGR2_BULB) /*!< ADC conversions sa
1026:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Note: First conver
1027:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED (ADC3_CFGR2_SMPTRIG) /*!< ADC conversions sa
1028:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Trigger rising edg
1029:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Trigger falling ed
1030:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1031:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1032:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1033:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
1034:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1035:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode
1036:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1038:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_CONV_SINGLE (0x00000000UL) /*!< ADC conversions are perform
1039:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR_CONT) /*!< ADC conversions are perform
1040:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1041:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1043:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1044:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_DATA_TRANSFER_MODE ADC group regular - Data transfer mode of ADC conve
1045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1046:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1047:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_DR_TRANSFER (0x00000000UL) /*!< ADC conversio
1048:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR_DMNGT_0) /*!< ADC conversio
1049:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR_DMNGT_1 | ADC_CFGR_DMNGT_0) /*!< ADC conversio
1050:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_DFSDM_TRANSFER (ADC_CFGR_DMNGT_1 ) /*!< ADC conversio
1051:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1052:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1053:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1054:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1055:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
1056:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data
ARM GAS /tmp/ccTOAmWG.s page 20
1057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1058:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1059:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1060:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC3_REG_DMA_TRANSFER_NONE (0x00000000UL) /*!< ADC conversi
1061:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC3_REG_DMA_TRANSFER_LIMITED ( ADC3_CFGR_DMAEN) /*!< ADC convers
1062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC3_REG_DMA_TRANSFER_UNLIMITED (ADC3_CFGR_DMACFG | ADC3_CFGR_DMAEN) /*!< ADC conver
1063:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1064:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1066:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
1067:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1068:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion d
1069:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1070:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1071:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_PRESERVED (0x00000000UL) /*!< ADC group regular behavior i
1072:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR_OVRMOD) /*!< ADC group regular behavior i
1073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1074:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1076:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1077:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_SCAN_LENGTH ADC group regular - Sequencer scan length
1078:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1079:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1080:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_DISABLE (0x00000000UL)
1081:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS ( ADC_SQR1_L
1082:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS ( ADC_SQR1_L_1
1083:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS ( ADC_SQR1_L_1 | ADC_SQR1_L
1084:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS ( ADC_SQR1_L_2
1085:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L
1086:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1
1087:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L
1088:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS (ADC_SQR1_L_3
1089:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS (ADC_SQR1_L_3 | ADC_SQR1_L
1090:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1
1091:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 | ADC_SQR1_L
1092:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2
1093:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L
1094:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1
1095:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L
1096:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1097:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1098:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1099:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1100:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode
1101:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1102:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1103:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000UL)
1104:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_1RANK (
1105:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_2RANKS ( ADC_CFGR_DISC
1106:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_3RANKS ( ADC_CFGR_DISCNUM_1
1107:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_4RANKS ( ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISC
1108:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2
1109:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISC
1110:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1
1111:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISC
1112:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1113:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
ARM GAS /tmp/ccTOAmWG.s page 21
1114:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1115:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1116:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_RANKS ADC group regular - Sequencer ranks
1117:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1118:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1119:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_1 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_1_SQRX_BITOFFSET_POS)
1120:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_2 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_2_SQRX_BITOFFSET_POS)
1121:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_3 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_3_SQRX_BITOFFSET_POS)
1122:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_4 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_4_SQRX_BITOFFSET_POS)
1123:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_5 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_5_SQRX_BITOFFSET_POS)
1124:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_6 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_6_SQRX_BITOFFSET_POS)
1125:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_7 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_7_SQRX_BITOFFSET_POS)
1126:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_8 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_8_SQRX_BITOFFSET_POS)
1127:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_9 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_9_SQRX_BITOFFSET_POS)
1128:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_10 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_10_SQRX_BITOFFSET_POS
1129:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_11 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_11_SQRX_BITOFFSET_POS
1130:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_12 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_12_SQRX_BITOFFSET_POS
1131:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_13 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_13_SQRX_BITOFFSET_POS
1132:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_14 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_14_SQRX_BITOFFSET_POS
1133:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_15 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_15_SQRX_BITOFFSET_POS
1134:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_REG_RANK_16 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_16_SQRX_BITOFFSET_POS
1135:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1136:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1137:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1138:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1139:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_SOURCE ADC group injected - Trigger source
1140:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1141:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1142:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_SOFTWARE (0x00000000UL)
1143:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO (ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
1144:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH4 (ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
1145:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO (ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
1146:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_
1147:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
1148:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_
1149:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_
1150:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT
1151:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
1152:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_
1153:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_
1154:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT
1155:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_
1156:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT
1157:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT
1158:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT
1159:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(HRTIM1)
1160:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 (ADC_JSQR_JEXTSEL_4 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
1161:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_
1162:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* HRTIM1 */
1163:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_LPTIM1_OUT (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_
1164:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_LPTIM2_OUT (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT
1165:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_LPTIM3_OUT (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_
1166:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM23_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT
1167:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM24_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT
1168:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1169:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1170:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
ARM GAS /tmp/ccTOAmWG.s page 22
1171:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1172:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_EDGE ADC group injected - Trigger edge
1173:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1174:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1175:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISING ( ADC_JSQR_JEXTEN_0) /*!< ADC group i
1176:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_FALLING (ADC_JSQR_JEXTEN_1 ) /*!< ADC group i
1177:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISINGFALLING (ADC_JSQR_JEXTEN_1 | ADC_JSQR_JEXTEN_0) /*!< ADC group i
1178:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1179:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1180:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1181:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1182:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIG_AUTO ADC group injected - Automatic trigger mode
1183:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1184:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1185:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_INDEPENDENT (0x00000000UL) /*!< ADC group injected conversio
1186:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_FROM_GRP_REGULAR (ADC_CFGR_JAUTO) /*!< ADC group injected conversio
1187:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1188:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1189:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1190:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1191:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_CONTEXT_QUEUE ADC group injected - Context queue mode
1192:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1193:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1194:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE (0x00000000UL) /* Group injected sequence co
1195:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY (ADC_CFGR_JQM) /* Group injected sequence co
1196:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_DISABLE (ADC_CFGR_JQDIS) /* Group injected sequence co
1197:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1198:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1199:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1200:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1201:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_SCAN_LENGTH ADC group injected - Sequencer scan length
1202:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1203:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1204:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_DISABLE (0x00000000UL) /*!< ADC group injected
1205:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS ( ADC_JSQR_JL_0) /*!< ADC group injected
1206:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS (ADC_JSQR_JL_1 ) /*!< ADC group injected
1207:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected
1208:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1209:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1210:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1211:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1212:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_DISCONT_MODE ADC group injected - Sequencer discontinuous mode
1213:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1214:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1215:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_DISABLE (0x00000000UL) /*!< ADC group injected sequencer
1216:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_1RANK (ADC_CFGR_JDISCEN) /*!< ADC group injected sequencer
1217:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1218:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1219:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1220:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1221:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_RANKS ADC group injected - Sequencer ranks
1222:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1223:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1224:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_RANK_1 (ADC_JDR1_REGOFFSET | ADC_INJ_RANK_1_JSQR_BITOFFSET_POS)
1225:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_RANK_2 (ADC_JDR2_REGOFFSET | ADC_INJ_RANK_2_JSQR_BITOFFSET_POS)
1226:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_RANK_3 (ADC_JDR3_REGOFFSET | ADC_INJ_RANK_3_JSQR_BITOFFSET_POS)
1227:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_INJ_RANK_4 (ADC_JDR4_REGOFFSET | ADC_INJ_RANK_4_JSQR_BITOFFSET_POS)
ARM GAS /tmp/ccTOAmWG.s page 23
1228:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1229:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1230:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1231:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time
1233:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1234:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1235:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_1CYCLE_5 (0x00000000UL)
1236:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_2CYCLES_5 ( ADC_SMPR2_SMP10
1237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_8CYCLES_5 ( ADC_SMPR2_SMP10_1
1238:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_16CYCLES_5 ( ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10
1239:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_32CYCLES_5 (ADC_SMPR2_SMP10_2
1240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_64CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10
1241:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_387CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1
1242:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_810CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10
1243:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1245:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1246:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
1247:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time
1248:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1249:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1250:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_ADC3_2CYCLES_5 (0x00000000UL)
1251:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_ADC3_6CYCLES_5 ( ADC_SMPR2_
1252:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_ADC3_12CYCLES_5 ( ADC_SMPR2_SMP10_1
1253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_ADC3_24CYCLES_5 ( ADC_SMPR2_SMP10_1 | ADC_SMPR2_
1254:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_ADC3_47CYCLES_5 (ADC_SMPR2_SMP10_2
1255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_ADC3_92CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_
1256:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_ADC3_247CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1
1257:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_ADC3_640CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1 | ADC_SMPR2_
1258:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1259:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1260:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1261:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
1262:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1263:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SINGLE_DIFF_ENDING Channel - Single or differential ending
1264:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1265:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1266:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_SINGLE_ENDED ( ADC_CALFACT_CALFACT_S) /*!< A
1267:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DIFFERENTIAL_ENDED (ADC_CR_ADCALDIF | ADC_CALFACT_CALFACT_D) /*!< A
1268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_BOTH_SINGLE_DIFF_ENDED (LL_ADC_SINGLE_ENDED | LL_ADC_DIFFERENTIAL_ENDED) /*!< A
1269:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1270:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1271:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1272:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1273:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
1274:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1275:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1276:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<
1277:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD2 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR2_REGOFFSET) /*!<
1278:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!<
1279:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1280:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1281:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1282:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1283:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels
1284:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
ARM GAS /tmp/ccTOAmWG.s page 24
1285:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1286:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_DISABLE (0x00000000UL)
1287:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG (ADC_AWD_CR23_CHANNEL_MASK
1288:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_INJ (ADC_AWD_CR23_CHANNEL_MASK | ADC_CFGR_JA
1289:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG_INJ (ADC_AWD_CR23_CHANNEL_MASK | ADC_CFGR_JA
1290:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK)
1291:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1292:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1293:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK)
1294:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1295:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1296:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK)
1297:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1298:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1299:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK)
1300:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1301:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1302:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK)
1303:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1304:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1305:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK)
1306:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1307:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1308:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK)
1309:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1310:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1311:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK)
1312:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1313:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1314:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK)
1315:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1316:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1317:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK)
1318:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1319:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1320:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK)
1321:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1322:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1323:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK)
1324:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1325:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1326:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK)
1327:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1328:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1329:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK)
1330:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1331:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1332:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK)
1333:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1334:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1335:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK)
1336:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1337:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1338:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK)
1339:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1340:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1341:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK)
ARM GAS /tmp/ccTOAmWG.s page 25
1342:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1343:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1344:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK)
1345:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1346:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1347:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_19_REG ((LL_ADC_CHANNEL_19 & ADC_CHANNEL_ID_MASK)
1348:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_19_INJ ((LL_ADC_CHANNEL_19 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1349:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_19_REG_INJ ((LL_ADC_CHANNEL_19 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA
1350:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK)
1351:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) |
1352:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) |
1353:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_REG ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK)
1354:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_INJ ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) |
1355:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) |
1356:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK)
1357:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) |
1358:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) |
1359:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_DAC1CH1_ADC2_REG ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK)
1360:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK) |
1361:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ ((LL_ADC_CHANNEL_DAC1CH1_ADC2 & ADC_CHANNEL_ID_MASK) |
1362:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_DAC1CH2_ADC2_REG ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK)
1363:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK) |
1364:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ ((LL_ADC_CHANNEL_DAC1CH2_ADC2 & ADC_CHANNEL_ID_MASK) |
1365:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1366:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1367:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1368:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1369:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds
1370:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1371:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1372:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_HIGH (0x1UL) /*!< ADC analog watchdog thr
1373:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_LOW (0x0UL) /*!< ADC analog watchdog thr
1374:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1375:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1376:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1377:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
1378:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_FILTERING_CONFIG Analog watchdog - filtering config
1379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1380:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_NONE (0x00000000UL)
1382:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_2SAMPLES ( ADC3_TR1_AWDF
1383:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_3SAMPLES ( ADC3_TR1_AWDFILT_1
1384:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_4SAMPLES ( ADC3_TR1_AWDFILT_1 | ADC3_TR1_AWDF
1385:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_5SAMPLES (ADC3_TR1_AWDFILT_2
1386:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_6SAMPLES (ADC3_TR1_AWDFILT_2 | ADC3_TR1_AWDF
1387:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_7SAMPLES (ADC3_TR1_AWDFILT_2 | ADC3_TR1_AWDFILT_1
1388:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_8SAMPLES (ADC3_TR1_AWDFILT_2 | ADC3_TR1_AWDFILT_1 | ADC3_TR1_AWDF
1389:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1390:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1391:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
1393:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1394:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope
1395:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1397:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_DISABLE (0x00000000UL) /*
1398:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_ROVSE) /*
ARM GAS /tmp/ccTOAmWG.s page 26
1399:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_RESUMED (ADC_CFGR2_ROVSM | ADC_CFGR2_ROVSE) /*
1400:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJECTED ( ADC_CFGR2_JOVSE ) /*
1401:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJ_REG_RESUMED ( ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE) /*
1402:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1403:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1404:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1405:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1406:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode
1407:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1408:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1409:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_REG_CONT (0x00000000UL) /*!< ADC oversampling discontinuo
1410:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TROVS) /*!< ADC oversampling discontinuo
1411:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1412:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1413:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1414:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
1415:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio
1416:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1417:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1418:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_2 (0x00000000UL)
1419:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_4 ( ADC3_CFGR2_OVSR
1420:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_8 ( ADC3_CFGR2_OVSR_1
1421:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_16 ( ADC3_CFGR2_OVSR_1 | ADC3_CFGR2_OVSR
1422:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_32 (ADC3_CFGR2_OVSR_2
1423:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_64 (ADC3_CFGR2_OVSR_2 | ADC3_CFGR2_OVSR
1424:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_128 (ADC3_CFGR2_OVSR_2 | ADC3_CFGR2_OVSR_1
1425:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_256 (ADC3_CFGR2_OVSR_2 | ADC3_CFGR2_OVSR_1 | ADC3_CFGR2_OVSR
1426:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1427:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1428:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1429:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
1430:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1431:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift
1432:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1433:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1434:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_NONE (0x00000000UL)
1435:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_1 (
1436:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1
1437:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1
1438:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2
1439:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2
1440:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1
1441:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1
1442:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3
1443:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_9 (ADC_CFGR2_OVSS_3
1444:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_10 (ADC_CFGR2_OVSS_3 | ADC_CFGR2_OVSS_1
1445:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_11 (ADC_CFGR2_OVSS_3 | ADC_CFGR2_OVSS_1
1446:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1447:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1448:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1449:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1450:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MODE Multimode - Mode
1451:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1452:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1453:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_INDEPENDENT (0x00000000UL)
1454:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIMULT ( ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1
1455:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INTERL ( ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 | ADC_
ARM GAS /tmp/ccTOAmWG.s page 27
1456:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_SIMULT ( ADC_CCR_DUAL_2 | ADC_
1457:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_ALTERN (ADC_CCR_DUAL_3 | ADC_
1458:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM ( ADC_
1459:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT ( ADC_CCR_DUAL_1
1460:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM ( ADC_CCR_DUAL_1 | ADC_
1461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1462:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1464:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_DMA_TRANSFER Multimode - DMA transfer
1466:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1467:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1468:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_EACH_ADC (0x00000000UL) /*!< ADC multimode
1469:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_RES_32_10B (ADC_CCR_DAMDF_1 ) /*!< ADC multimode
1470:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_RES_8B (ADC_CCR_DAMDF_1 | ADC_CCR_DAMDF_0) /*!< ADC multimode
1471:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1472:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1473:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1474:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1475:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_TWOSMP_DELAY Multimode - Delay between two sampling phases
1476:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1477:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1478:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE_5 (0x00000000UL)
1479:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES_5 (
1480:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES_5 ( ADC_CCR_D
1481:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5 ( ADC_CCR_D
1482:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5_8_BITS ( ADC_CCR_DELAY_2 | ADC_CCR_D
1483:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5 ( ADC_CCR_DELAY_2
1484:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5_10_BITS ( ADC_CCR_DELAY_2 | ADC_CCR_D
1485:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (ADC_CCR_DELAY_3
1486:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5 ( ADC_CCR_DELAY_2
1487:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5_12_BITS ( ADC_CCR_DELAY_2 | ADC_CCR_D
1488:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES_5 ( ADC_CCR_DELAY_2 | ADC_CCR_D
1489:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (ADC_CCR_DELAY_3
1490:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3
1491:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1492:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1493:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1494:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1495:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MASTER_SLAVE Multimode - ADC master or slave
1496:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1497:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1498:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER ( ADC_CDR_RDATA_MST) /*!< In multimod
1499:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_SLAVE (ADC_CDR_RDATA_SLV ) /*!< In multimod
1500:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER_SLAVE (ADC_CDR_RDATA_SLV | ADC_CDR_RDATA_MST) /*!< In multimod
1501:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1502:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1503:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1504:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1505:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1506:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1507:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays
1508:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Only ADC peripheral HW delays are defined in ADC LL driver driver,
1509:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * not timeout values.
1510:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For details on delays values, refer to descriptions in source code
1511:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * above each literal definition.
1512:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
ARM GAS /tmp/ccTOAmWG.s page 28
1513:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1514:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1515:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Only ADC peripheral HW delays are defined in ADC LL driver driver, */
1516:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* not timeout values. */
1517:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Timeout values for ADC operations are dependent to device clock */
1518:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* configuration (system clock versus ADC clock), */
1519:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* and therefore must be defined in user application. */
1520:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Indications for estimation of ADC timeout delays, for this */
1521:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* STM32 series: */
1522:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC calibration time: maximum delay is 16384/fADC. */
1523:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (refer to device datasheet, parameter "tCAL") */
1524:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC enable time: maximum delay is 1 conversion cycle. */
1525:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (refer to device datasheet, parameter "tSTAB") */
1526:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC disable time: maximum delay should be a few ADC clock cycles */
1527:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC stop conversion time: maximum delay should be a few ADC clock */
1528:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* cycles */
1529:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* - ADC conversion time: duration depending on ADC clock and ADC */
1530:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* configuration. */
1531:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (refer to device reference manual, section "Timing") */
1532:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1533:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Delay for ADC stabilization time (ADC voltage regulator start-up time) */
1534:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */
1535:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* parameter "tADCVREG_STUP"). */
1536:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Unit: us */
1537:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ( 10UL) /*!< Delay for ADC stabilization time (ADC vol
1538:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1539:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Delay for internal voltage reference stabilization time. */
1540:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */
1541:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* parameter "ts_vrefint"). */
1542:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Unit: us */
1543:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DELAY_VREFINT_STAB_US (5UL) /*!< Delay for internal voltage reference stabili
1544:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1545:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Delay for temperature sensor stabilization time. */
1546:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Literal set to maximum value (refer to device datasheet, */
1547:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* parameter "tSTART_RUN"). */
1548:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Unit: us */
1549:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DELAY_TEMPSENSOR_STAB_US ( 26UL) /*!< Delay for temperature sensor stabilization
1550:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1551:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Delay required between ADC end of calibration and ADC enable. */
1552:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: On this STM32 series, a minimum number of ADC clock cycles */
1553:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* are required between ADC end of calibration and ADC enable. */
1554:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Wait time can be computed in user application by waiting for the */
1555:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* equivalent number of CPU cycles, by taking into account */
1556:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* ratio of CPU clock versus ADC clock prescalers. */
1557:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Unit: ADC clock cycles. */
1558:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ( 4UL) /*!< Delay required between ADC end of calibr
1559:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1560:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Fixed timeout value for ADC linearity word bit set/clear delay. */
1561:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Values defined to be higher than worst cases: low clock frequency, */
1562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* maximum prescalers. */
1563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Ex of profile low frequency : f_ADC at 4,577 Khz (minimum value */
1564:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* according to Data sheet), linearity set/clear bit delay MAX = 6 / f_ADC + 3 cycles AHB */
1565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* 6 / 4577 = 1,311ms */
1566:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* At maximum CPU speed (400 MHz), this means */
1567:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* 3.58 * 400 MHz = 524400 CPU cycles */
1568:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define ADC_LINEARITY_BIT_TOGGLE_TIMEOUT (524400UL) /*!< ADC linearity set/clear bit d
1569:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
ARM GAS /tmp/ccTOAmWG.s page 29
1570:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1571:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1572:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1573:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1574:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1575:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1576:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1578:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1579:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Exported macro ------------------------------------------------------------*/
1580:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
1581:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1582:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1583:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1584:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
1585:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1586:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1587:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1588:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1589:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Write a value in ADC register
1590:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance
1591:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __REG__ Register to be written
1592:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __VALUE__ Value to be written in the register
1593:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
1594:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1595:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE
1596:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1597:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1598:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Read a value in ADC register
1599:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance
1600:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __REG__ Register to be read
1601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Register value
1602:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
1604:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1605:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
1606:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1607:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1608:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
1609:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
1610:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1611:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1612:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
1613:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1614:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to convert the resolution defines to STM32H73x/2x ADC3 registers values
1615:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * value corresponding to the ADC3 resolution according to the STM32H73x/2x RefMan.
1616:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The input can be a value from ADC3 resolution (12b, 10b, 8b,6b)
1617:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values:
1618:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
1619:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
1620:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
1621:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B
1622:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
1623:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg 0x00000000UL (value correspodning to ADC3 12 bits)
1624:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg ADC_CFGR_RES_0 = 0x00000004 (value corresponding to ADC3 10 bits)
1625:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg ADC_CFGR_RES_1 = 0x00000008 (value corresponding to ADC3 8 bits)
1626:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg 0x0000001C (value corresponding to ADC3 6 bits)
ARM GAS /tmp/ccTOAmWG.s page 30
1627:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This helper macro is applicable for STM32H73x/2x devices only
1628:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1629:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC12_RESOLUTION_TO_ADC3(__ADC_RESOLUTION__) \
1630:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ( \
1631:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__ADC_RESOLUTION__) == LL_ADC_RESOLUTION_12B) \
1632:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ?(0x00000000UL) \
1633:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** : \
1634:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__ADC_RESOLUTION__) == LL_ADC_RESOLUTION_10B) \
1635:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ?(ADC_CFGR_RES_0) \
1636:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** : \
1637:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__ADC_RESOLUTION__) == LL_ADC_RESOLUTION_8B) \
1638:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ?(ADC_CFGR_RES_1) \
1639:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** : \
1640:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__ADC_RESOLUTION__) == LL_ADC_RESOLUTION_6B) \
1641:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ?((ADC_CFGR_RES_2|ADC_CFGR_RES_1 | ADC_CFGR_RES_0)) \
1642:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** :(0x00000000UL) \
1643:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
1644:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1645:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
1646:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1647:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1648:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to get ADC channel number in decimal format
1649:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * from literals LL_ADC_CHANNEL_x.
1650:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Example:
1651:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
1652:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * will return decimal number "4".
1653:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The input can be a value from functions where a channel
1654:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * number is returned, either defined with number
1655:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or with bitfield (only one bit must be set).
1656:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values:
1657:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
1658:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
1659:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
1660:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
1661:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
1662:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
1663:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
1664:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
1665:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
1666:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
1667:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
1668:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
1669:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
1670:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
1671:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
1672:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
1673:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
1674:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
1675:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
1676:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
1677:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
1678:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
1679:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
1680:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
1681:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
1682:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
1683:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
ARM GAS /tmp/ccTOAmWG.s page 31
1684:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
1685:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
1686:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
1687:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0 and Max_Data=18
1688:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1689:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
1690:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0UL) \
1691:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ? ( \
1692:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
1693:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
1694:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** : \
1695:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ( \
1696:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (uint32_t)POSITION_VAL((__CHANNEL__)) \
1697:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
1698:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
1699:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1700:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1701:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
1702:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * from number in decimal format.
1703:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Example:
1704:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
1705:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * will return a data equivalent to "LL_ADC_CHANNEL_4".
1706:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __DECIMAL_NB__ Value between Min_Data=0 and Max_Data=18
1707:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
1708:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
1709:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
1710:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
1711:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
1712:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
1713:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
1714:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
1715:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
1716:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
1717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
1718:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
1719:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
1720:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
1721:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
1722:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
1723:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
1724:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
1725:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
1726:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
1727:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
1728:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
1729:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
1730:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
1731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
1732:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
1733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
1734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
1735:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
1736:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
1737:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).\n
1738:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1, 2) For ADC channel read back from ADC register,
1739:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * comparison with internal channel parameter to be done
1740:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
ARM GAS /tmp/ccTOAmWG.s page 32
1741:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1742:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__)
1743:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__DECIMAL_NB__) <= 9UL)
1744:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ? (
1745:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) |
1746:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) |
1747:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC_SMPR1_REGOFFSET | (((3UL * (__DECIMAL_NB__))) << ADC_CHANNEL_SMPx_BITOFFSET_POS))
1748:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
1749:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** :
1750:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (
1751:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS)
1752:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__))
1753:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC_SMPR2_REGOFFSET | (((3UL * ((__DECIMAL_NB__) - 10UL))) << ADC_CHANNEL_SMPx_BITOFFSET_PO
1754:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
1755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
1756:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1757:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1758:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to determine whether the selected channel
1759:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * corresponds to literal definitions of driver.
1760:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The different literal definitions of ADC channels are:
1761:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC internal channel:
1762:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
1763:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC external channel (channel connected to a GPIO pin):
1764:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
1765:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The channel parameter must be a value defined from literal
1766:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
1767:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...),
1768:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
1769:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * must not be a value from functions where a channel number is
1770:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * returned from ADC registers,
1771:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * because internal and external channels share the same channel
1772:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with
1773:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * parameters definitions of driver.
1774:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values:
1775:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
1776:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
1777:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
1778:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
1779:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
1780:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
1781:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
1782:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
1783:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
1784:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
1785:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
1786:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
1787:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
1788:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
1789:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
1790:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
1791:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
1792:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
1793:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
1794:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
1795:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
1796:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
1797:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
ARM GAS /tmp/ccTOAmWG.s page 33
1798:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
1799:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
1800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
1801:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
1802:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
1803:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
1804:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
1805:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channe
1806:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Value "1" if the channel corresponds to a parameter definition of a ADC internal channe
1807:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1808:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
1809:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0UL)
1810:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1811:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1812:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to convert a channel defined from parameter
1813:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
1814:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...),
1815:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * to its equivalent parameter definition of a ADC external channel
1816:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
1817:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The channel parameter can be, additionally to a value
1818:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * defined from parameter definition of a ADC internal channel
1819:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
1820:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a value defined from parameter definition of
1821:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
1822:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or a value from functions where a channel number is returned
1823:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * from ADC registers.
1824:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values:
1825:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
1826:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
1827:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
1828:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
1829:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
1830:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
1831:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
1832:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
1833:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
1834:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
1835:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
1836:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
1837:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
1838:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
1839:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
1840:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
1841:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
1842:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
1843:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
1844:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
1845:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
1846:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
1847:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
1848:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
1849:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
1850:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
1851:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
1852:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
1853:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
1854:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
ARM GAS /tmp/ccTOAmWG.s page 34
1855:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
1856:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0
1857:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1
1858:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2
1859:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3
1860:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4
1861:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5
1862:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
1863:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
1864:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
1865:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
1866:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
1867:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
1868:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
1869:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
1870:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
1871:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
1872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
1873:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
1874:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
1875:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
1876:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1877:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \
1878:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
1879:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1880:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1881:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to determine whether the internal channel
1882:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * selected is available on the ADC instance selected.
1883:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The channel parameter must be a value defined from parameter
1884:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
1885:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...),
1886:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * must not be a value defined from parameter definition of
1887:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
1888:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or a value from functions where a channel number is
1889:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * returned from ADC registers,
1890:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * because internal and external channels share the same channel
1891:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with
1892:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * parameters definitions of driver.
1893:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_INSTANCE__ ADC instance
1894:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values:
1895:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
1896:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
1897:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
1898:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
1899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
1900:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
1901:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
1902:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.
1903:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value "0" if the internal channel selected is not available on the ADC instance selecte
1904:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Value "1" if the internal channel selected is available on the ADC instance selected.
1905:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
1906:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC3)
1907:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
1908:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC2) \
1909:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** &&( \
1910:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1_ADC2) || \
1911:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2_ADC2) \
ARM GAS /tmp/ccTOAmWG.s page 35
1912:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
1913:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
1914:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** || \
1915:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \
1916:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** &&( \
1917:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) || \
1918:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \
1919:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \
1920:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
1921:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
1922:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
1923:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
1924:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
1925:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC2) \
1926:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** &&( \
1927:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH1_ADC2) || \
1928:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_DAC1CH2_ADC2) || \
1929:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) || \
1930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \
1931:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \
1932:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
1933:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
1934:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
1935:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
1936:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1937:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
1938:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to define ADC analog watchdog parameter:
1939:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * define a single channel to monitor with analog watchdog
1940:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * from sequencer channel and groups definition.
1941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1942:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example:
1943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_SetAnalogWDMonitChannels(
1944:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC1, LL_ADC_AWD1,
1945:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
1946:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values:
1947:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
1948:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
1949:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
1950:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
1951:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
1952:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
1953:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
1954:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
1955:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
1956:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
1957:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
1958:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
1959:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
1960:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
1961:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
1962:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
1963:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
1964:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
1965:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
1966:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
1967:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
1968:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
ARM GAS /tmp/ccTOAmWG.s page 36
1969:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
1970:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
1971:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
1972:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
1973:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
1974:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
1975:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
1976:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).\n
1977:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1, 2) For ADC channel read back from ADC register,
1978:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * comparison with internal channel parameter to be done
1979:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
1980:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __GROUP__ This parameter can be one of the following values:
1981:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR
1982:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_INJECTED
1983:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR_INJECTED
1984:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
1985:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE
1986:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
1987:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
1988:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
1989:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
1990:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
1991:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
1992:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
1993:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
1994:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
1995:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
1996:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
1997:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
1998:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
1999:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
2000:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
2001:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
2002:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
2003:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
2004:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
2005:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
2006:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
2007:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
2008:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
2009:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
2010:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
2011:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
2012:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
2013:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
2014:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
2015:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
2016:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
2017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
2018:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
2019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
2020:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
2021:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
2022:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
2023:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
2024:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
2025:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
ARM GAS /tmp/ccTOAmWG.s page 37
2026:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
2027:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
2028:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
2029:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
2030:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
2031:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
2032:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
2033:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
2034:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
2035:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
2036:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
2037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
2038:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
2039:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
2040:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
2041:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
2042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
2043:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
2044:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
2045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
2046:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_REG (0)
2047:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_INJ (0)
2048:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_REG_INJ
2049:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0)(1)
2050:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0)(1)
2051:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ (1)
2052:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG (0)(1)
2053:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_INJ (0)(1)
2054:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ (1)
2055:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(1)
2056:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(1)
2057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (1)
2058:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG (0)(2)
2059:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ (0)(2)
2060:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ (2)
2061:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG (0)(2)
2062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ (0)(2)
2063:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ (2)
2064:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
2065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (0) On STM32H7, parameter available only on analog watchdog number: AWD1.\n
2066:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
2067:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.
2068:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2069:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__)
2070:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__GROUP__) == LL_ADC_GROUP_REGULAR)
2071:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL)
2072:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** :
2073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__GROUP__) == LL_ADC_GROUP_INJECTED)
2074:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL)
2075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** :
2076:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD
2077:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2078:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2079:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2080:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to set the value of ADC analog watchdog threshold high
2081:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is
2082:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * different of 16 bits.
ARM GAS /tmp/ccTOAmWG.s page 38
2083:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetAnalogWDThresholds().
2084:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to set the value of
2085:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * analog watchdog threshold high (on 18 bits):
2086:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_SetAnalogWDThresholds
2087:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (< ADCx param >,
2088:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, <threshold_value_1
2089:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * );
2090:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values:
2091:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2092:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2093:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2094:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2095:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2096:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __AWD_THRESHOLD__ Value between Min_Data=0x000000 and Max_Data=0xFFFFFF
2097:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x000000 and Max_Data=0xFFFFFF
2098:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2099:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
2100:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U )))
2101:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2102:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2103:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to get the value of ADC analog watchdog threshold high
2104:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is
2105:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * different of 16 bits.
2106:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
2107:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to get the value of
2108:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * analog watchdog threshold high (on 18 bits):
2109:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * < threshold_value_18_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
2110:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (LL_ADC_RESOLUTION_8B,
2111:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_GetAnalogWDThresholds(<ADCx param>, LL_ADC_AWD_THRESHOLD_HIGH)
2112:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * );
2113:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values:
2114:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2115:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2116:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2117:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2118:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2119:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __AWD_THRESHOLD_16_BITS__ Value between Min_Data=0x000000 and Max_Data=0xFFFFFF
2120:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x000000 and Max_Data=0xFFFFFF
2121:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2122:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_16_BITS__) \
2123:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__AWD_THRESHOLD_16_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U )))
2124:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2125:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2126:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to set the ADC calibration value with both single ended
2127:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and differential modes calibration factors concatenated.
2128:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetCalibrationOffsetFactor().
2129:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example, to set calibration factors single ended to 0x55
2130:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and differential ended to 0x2A:
2131:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_SetCalibrationOffsetFactor(
2132:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC1,
2133:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(0x55, 0x2A))
2134:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __CALIB_FACTOR_SINGLE_ENDED__ Value between Min_Data=0x00 and Max_Data=0x7F
2135:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __CALIB_FACTOR_DIFFERENTIAL__ Value between Min_Data=0x00 and Max_Data=0x7F
2136:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
2137:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2138:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(__CALIB_FACTOR_SINGLE_ENDED__, __CALIB_FACTOR_DIFFERENTIA
2139:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__CALIB_FACTOR_DIFFERENTIAL__) << ADC_CALFACT_CALFACT_D_Pos) | (__CALIB_FACTOR_SINGLE_ENDED__)
ARM GAS /tmp/ccTOAmWG.s page 39
2140:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2141:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2142:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to get the ADC multimode conversion data of ADC master
2143:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or ADC slave from raw value with both ADC conversion data concatenated.
2144:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This macro is intended to be used when multimode transfer by DMA
2145:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is enabled: refer to function @ref LL_ADC_SetMultiDMATransfer().
2146:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * In this case the transferred data need to processed with this macro
2147:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * to separate the conversion data of ADC master and ADC slave.
2148:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_MULTI_MASTER_SLAVE__ This parameter can be one of the following values:
2149:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER
2150:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE
2151:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_MULTI_CONV_DATA__ Value between Min_Data=0x000 and Max_Data=0xFFF
2152:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
2153:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2154:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(__ADC_MULTI_MASTER_SLAVE__, __ADC_MULTI_CONV_DATA__)
2155:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__ADC_MULTI_CONV_DATA__) >> ((ADC_CDR_RDATA_SLV_Pos) & ~(__ADC_MULTI_MASTER_SLAVE__))) & ADC_C
2156:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2157:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2158:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to select, from a ADC instance, to which ADC instance
2159:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * it has a dependence in multimode (ADC master of the corresponding
2160:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC common instance).
2161:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of device with multimode available and a mix of
2162:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instances compliant and not compliant with multimode feature,
2163:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instances not compliant with multimode feature are
2164:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * considered as master instances (do not depend to
2165:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * any other ADC instance).
2166:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADCx__ ADC instance
2167:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval __ADCx__ ADC instance master of the corresponding ADC common instance
2168:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2169:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \
2170:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \
2171:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )? \
2172:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC1) \
2173:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** : \
2174:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (__ADCx__) \
2175:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2176:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2177:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2178:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to select the ADC common instance
2179:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * to which is belonging the selected ADC instance.
2180:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note ADC common register instance can be used for:
2181:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Set parameters common to several ADC instances
2182:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Multimode (for devices with several ADC instances)
2183:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter.
2184:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADCx__ ADC instance
2185:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval ADC common register instance
2186:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2187:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC3_COMMON)
2188:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
2189:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((((__ADCx__) == ADC1) || ((__ADCx__) == ADC2)) \
2190:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ? ( \
2191:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC12_COMMON) \
2192:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
2193:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** : \
2194:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ( \
2195:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC3_COMMON) \
2196:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
ARM GAS /tmp/ccTOAmWG.s page 40
2197:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2198:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
2199:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) (ADC12_COMMON)
2200:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
2201:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2202:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2203:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to check if all ADC instances sharing the same
2204:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC common instance are disabled.
2205:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This check is required by functions with setting conditioned to
2206:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
2207:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled.
2208:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter.
2209:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On devices with only 1 ADC common instance, parameter of this macro
2210:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is useless and can be ignored (parameter kept for compatibility
2211:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with devices featuring several ADC common instances).
2212:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADCXY_COMMON__ ADC common instance
2213:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
2214:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value "0" if all ADC instances sharing the same ADC common instance
2215:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * are disabled.
2216:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Value "1" if at least one ADC instance sharing the same ADC common instance
2217:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is enabled.
2218:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2219:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC3_COMMON)
2220:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
2221:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \
2222:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ? ( \
2223:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \
2224:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \
2225:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
2226:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** : \
2227:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ( \
2228:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3)) \
2229:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
2230:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2231:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
2232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
2233:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | LL_ADC_IsEnabled(ADC2))
2234:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
2235:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2236:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to define the ADC conversion data full-scale digital
2238:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * value corresponding to the selected ADC resolution.
2239:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note ADC conversion data full-scale corresponds to voltage range
2240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * determined by analog voltage references Vref+ and Vref-
2241:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (refer to reference manual).
2242:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values:
2243:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2245:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2246:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2247:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2248:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval ADC conversion data full-scale digital value (unit: digital value of ADC conversion dat
2249:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2250:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
2251:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (0xFFFFUL >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)))
2252:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
ARM GAS /tmp/ccTOAmWG.s page 41
2254:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to define the ADC conversion data full-scale digital
2256:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * value corresponding to the selected ADC resolution.
2257:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note ADC conversion data full-scale corresponds to voltage range
2258:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * determined by analog voltage references Vref+ and Vref-
2259:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (refer to reference manual).
2260:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values:
2261:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2262:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2263:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2264:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B
2265:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval ADC conversion data equivalent voltage value (unit: digital value of ADC conversion bit
2266:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2267:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC3_DIGITAL_SCALE(__ADC_RESOLUTION__) \
2268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (0xFFFUL >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS_ADC3 - 1UL)))
2269:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
2270:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2271:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to convert the ADC conversion data from
2272:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a resolution to another resolution.
2273:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __DATA__ ADC conversion data to be converted
2274:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION_CURRENT__ Resolution of the data to be converted
2275:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This parameter can be one of the following values:
2276:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2277:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2278:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2279:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2280:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2281:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
2282:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This parameter can be one of the following values:
2283:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2284:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2285:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2286:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2287:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2288:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval ADC conversion data to the requested resolution
2289:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2290:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_X) || defined(ADC_VER_V5_V90)
2291:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\
2292:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION_CURRENT__,\
2293:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION_TARGET__) \
2294:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ( (__ADC_RESOLUTION_CURRENT__ == LL_ADC_RESOLUTION_8B)
2295:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ?(
2296:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__DATA__)
2297:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** << (((__ADC_RESOLUTION_CURRENT__) & ~(ADC_CFGR_RES_1 | ADC_CFGR_RES_0) ) >> (ADC_CFGR_RES_BITOF
2298:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))
2299:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2300:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** :
2301:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (
2302:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (__ADC_RESOLUTION_TARGET__ == LL_ADC_RESOLUTION_8B) \
2303:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ? ( \
2304:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__DATA__)
2305:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)))
2306:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> (((__ADC_RESOLUTION_TARGET__) & ~(ADC_CFGR_RES_1 | ADC_CFGR_RES_0) ) >> (ADC_CFGR_RES
2307:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2308:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** :\
2309:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (\
2310:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__DATA__)
ARM GAS /tmp/ccTOAmWG.s page 42
2311:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)))
2312:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))
2313:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2314:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )\
2315:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2316:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2317:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2318:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else /* defined(ADC_VER_V5_3) */
2319:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\
2320:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION_CURRENT__,\
2321:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION_TARGET__) \
2322:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ( (__ADC_RESOLUTION_CURRENT__ == LL_ADC_RESOLUTION_8B)
2323:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ?(
2324:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__DATA__)
2325:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** << (((__ADC_RESOLUTION_CURRENT__) & ~(ADC_CFGR_RES_1 | ADC_CFGR_RES_0) ) >> (ADC_CFGR_RES_BITOF
2326:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))
2327:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2328:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** :
2329:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (
2330:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (__ADC_RESOLUTION_TARGET__ == LL_ADC_RESOLUTION_8B) \
2331:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ? ( \
2332:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__DATA__)
2333:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)))
2334:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> (((__ADC_RESOLUTION_TARGET__) & ~(ADC_CFGR_RES_1 | ADC_CFGR_RES_0) ) >> (ADC_CFGR_RES
2335:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2336:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** :\
2337:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (\
2338:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__DATA__)
2339:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)))
2340:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))
2341:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2342:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )\
2343:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2344:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2345:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif
2346:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2347:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
2348:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2349:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to convert the ADC conversion data from
2350:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a resolution to another resolution.
2351:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __DATA__ ADC conversion data to be converted
2352:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION_CURRENT__ Resolution of the data to be converted
2353:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This parameter can be one of the following values:
2354:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2355:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2356:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2357:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B
2358:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
2359:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This parameter can be one of the following values:
2360:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2361:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2362:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2363:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B
2364:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval ADC conversion data to the requested resolution
2365:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2366:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CONVERT_DATA_RESOLUTION_ADC3(__DATA__,\
2367:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION_CURRENT__,\
ARM GAS /tmp/ccTOAmWG.s page 43
2368:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION_TARGET__) \
2369:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((__DATA__) \
2370:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS_ADC3 - 1UL))) \
2371:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS_ADC3 - 1UL)) \
2372:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2373:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
2374:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2375:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to calculate the voltage (unit: mVolt)
2376:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * corresponding to a ADC conversion data (unit: digital value).
2377:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from
2378:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement
2379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
2380:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
2381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_DATA__ ADC conversion data (resolution 16 bits)
2382:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (unit: digital value).
2383:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values:
2384:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2385:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2386:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2387:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2388:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2389:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval ADC conversion data equivalent voltage value (unit: mVolt)
2390:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2391:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
2392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_DATA__,\
2393:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION__) \
2394:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \
2395:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
2396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2397:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2398:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2399:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to calculate analog reference voltage (Vref+)
2400:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (unit: mVolt) from ADC conversion data of internal voltage
2401:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * reference VrefInt.
2402:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Computation is using VrefInt calibration value
2403:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * stored in system memory for each device during production.
2404:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This voltage depends on user board environment: voltage level
2405:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * connected to pin Vref+.
2406:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * On devices with small package, the pin Vref+ is not present
2407:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and internally bonded to pin Vdda.
2408:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, calibration data of internal voltage reference
2409:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * VrefInt corresponds to a resolution of 16 bits,
2410:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of
2411:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal voltage reference VrefInt.
2412:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale
2413:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion data to 16 bits.
2414:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __VREFINT_ADC_DATA__ ADC conversion data (resolution 16 bits)
2415:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of internal voltage reference VrefInt (unit: digital value).
2416:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values:
2417:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2418:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2419:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2420:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2421:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2422:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Analog reference voltage (unit: mV)
2423:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2424:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
ARM GAS /tmp/ccTOAmWG.s page 44
2425:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION__) \
2426:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((uint32_t)(*VREFINT_CAL_ADDR) * VREFINT_CAL_VREF) \
2427:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** / __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \
2428:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (__ADC_RESOLUTION__), \
2429:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** LL_ADC_RESOLUTION_16B) \
2430:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2431:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2432:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2433:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius)
2434:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor.
2435:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Computation is using temperature sensor calibration values
2436:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * stored in system memory for each device during production.
2437:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Calculation formula:
2438:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Temperature = ((TS_ADC_DATA - TS_CAL1)
2439:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * * (TS_CAL2_TEMP - TS_CAL1_TEMP))
2440:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
2441:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2442:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Avg_Slope = (TS_CAL2 - TS_CAL1)
2443:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * / (TS_CAL2_TEMP - TS_CAL1_TEMP)
2444:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TS_CAL1 = equivalent TS_ADC_DATA at temperature
2445:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TEMP_DEGC_CAL1 (calibrated in factory)
2446:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TS_CAL2 = equivalent TS_ADC_DATA at temperature
2447:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TEMP_DEGC_CAL2 (calibrated in factory)
2448:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Caution: Calculation relevancy under reserve that calibration
2449:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * parameters are correct (address and data).
2450:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * To calculate temperature using temperature sensor
2451:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * datasheet typical values (generic values less, therefore
2452:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * less accurate than calibrated values),
2453:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
2454:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be
2455:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage.
2456:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from
2457:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement
2458:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
2459:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, calibration data of temperature sensor
2460:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * corresponds to a resolution of 16 bits,
2461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of
2462:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temperature sensor.
2463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale
2464:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion data to 16 bits.
2465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
2466:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
2467:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temperature sensor (unit: digital value).
2468:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature
2469:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sensor voltage has been measured.
2470:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This parameter can be one of the following values:
2471:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2472:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2473:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2474:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2475:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2476:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius)
2477:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2478:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
2479:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\
2480:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION__) \
2481:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \
ARM GAS /tmp/ccTOAmWG.s page 45
2482:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (__ADC_RESOLUTION__), \
2483:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** LL_ADC_RESOLUTION_16B) \
2484:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (__VREFANALOG_VOLTAGE__)) \
2485:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** / TEMPSENSOR_CAL_VREFANALOG) \
2486:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** - (int32_t) *TEMPSENSOR_CAL1_ADDR) \
2487:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \
2488:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) / (int32_t)((int32_t)*TEMPSENSOR_CAL2_ADDR - (int32_t)*TEMPSENSOR_CAL1_ADDR) \
2489:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) + TEMPSENSOR_CAL1_TEMP \
2490:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2491:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2492:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2493:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius)
2494:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor.
2495:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Computation is using temperature sensor typical values
2496:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (refer to device datasheet).
2497:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Calculation formula:
2498:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
2499:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * / Avg_Slope + CALx_TEMP
2500:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2501:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (unit: digital value)
2502:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Avg_Slope = temperature sensor slope
2503:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (unit: uV/Degree Celsius)
2504:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TS_TYP_CALx_VOLT = temperature sensor digital value at
2505:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temperature CALx_TEMP (unit: mV)
2506:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Caution: Calculation relevancy under reserve the temperature sensor
2507:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of the current device has characteristics in line with
2508:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * datasheet typical values.
2509:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * If temperature sensor calibration values are available on
2510:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
2511:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temperature calculation will be more accurate using
2512:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * helper macro @ref __LL_ADC_CALC_TEMPERATURE().
2513:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be
2514:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage.
2515:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from
2516:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement
2517:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
2518:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note ADC measurement data must correspond to a resolution of 16 bits
2519:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (full scale digital value 4095). If not the case, the data must be
2520:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * preliminarily rescaled to an equivalent resolution of 16 bits.
2521:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical v
2522:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * On STM32H7, refer to device datasheet parameter "Avg_Slop
2523:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical
2524:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * On STM32H7, refer to device datasheet parameter "V30" (co
2525:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature s
2526:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
2527:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit:
2528:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor volta
2529:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This parameter can be one of the following values:
2530:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2531:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2532:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2533:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2534:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2535:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius)
2536:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2537:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
2538:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __TEMPSENSOR_TYP_CALX_V__,\
ARM GAS /tmp/ccTOAmWG.s page 46
2539:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __TEMPSENSOR_CALX_TEMP__,\
2540:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __VREFANALOG_VOLTAGE__,\
2541:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\
2542:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __ADC_RESOLUTION__) \
2543:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((( ( \
2544:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \
2545:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \
2546:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 1000UL) \
2547:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** - \
2548:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \
2549:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 1000UL) \
2550:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) \
2551:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) / (int32_t)(__TEMPSENSOR_TYP_AVGSLOPE__) \
2552:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ) + (int32_t)(__TEMPSENSOR_CALX_TEMP__) \
2553:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
2554:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2555:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2556:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
2557:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2558:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2559:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2560:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
2561:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2564:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Exported functions --------------------------------------------------------*/
2565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
2566:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
2567:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2568:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2569:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
2570:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
2571:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2572:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2573:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2574:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Function to help to configure DMA transfer from ADC: retrieve the
2575:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC register address from ADC instance and a list of ADC registers
2576:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * intended to be used (most commonly) with DMA transfer.
2577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note These ADC registers are data registers:
2578:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when ADC conversion data is available in ADC data registers,
2579:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC generates a DMA transfer request.
2580:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This macro is intended to be used with LL DMA driver, refer to
2581:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * function "LL_DMA_ConfigAddresses()".
2582:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example:
2583:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_DMA_ConfigAddresses(DMA1,
2584:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_DMA_CHANNEL_1,
2585:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
2586:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (uint32_t)&< array or variable >,
2587:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
2588:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with several ADC: in multimode, some devices
2589:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use a different data register outside of ADC instance scope
2590:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (common data register). This macro manages this register difference,
2591:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * only ADC instance has to be set as parameter.
2592:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_DMA_GetRegAddr\n
2593:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CDR RDATA_MST LL_ADC_DMA_GetRegAddr\n
2594:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_DMA_GetRegAddr
2595:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
ARM GAS /tmp/ccTOAmWG.s page 47
2596:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Register This parameter can be one of the following values:
2597:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
2598:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA_MULTI (1)
2599:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
2600:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) Available on devices with several ADC instances.
2601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval ADC register address
2602:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(const ADC_TypeDef *ADCx, uint32_t Register)
2604:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2605:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t data_reg_addr;
2606:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2607:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (Register == LL_ADC_DMA_REG_REGULAR_DATA)
2608:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2609:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Retrieve address of register DR */
2610:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** data_reg_addr = (uint32_t) & (ADCx->DR);
2611:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2612:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else /* (Register == LL_ADC_DMA_REG_REGULAR_DATA_MULTI) */
2613:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2614:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Retrieve address of register CDR */
2615:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** data_reg_addr = (uint32_t) & ((__LL_ADC_COMMON_INSTANCE(ADCx))->CDR);
2616:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2617:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2618:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return data_reg_addr;
2619:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2620:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2621:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2622:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
2623:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2624:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2625:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to
2626:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
2627:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2628:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2629:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2630:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set parameter common to several ADC: Clock source and prescaler.
2631:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, if ADC group injected is used, some
2632:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * clock ratio constraints between ADC clock and AHB clock
2633:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * must be respected.
2634:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to reference manual.
2635:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
2636:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
2637:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled.
2638:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each
2639:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instance or by using helper macro helper macro
2640:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
2641:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_SetCommonClock\n
2642:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR PRESC LL_ADC_SetCommonClock
2643:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
2644:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
2645:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param CommonClock This parameter can be one of the following values:
2646:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1
2647:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
2648:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
2649:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1
2650:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2
2651:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4
2652:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6
ARM GAS /tmp/ccTOAmWG.s page 48
2653:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8
2654:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10
2655:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12
2656:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16
2657:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32
2658:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64
2659:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128
2660:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256
2661:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
2662:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2663:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
2664:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2665:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC, CommonClock);
2666:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2667:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2668:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2669:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get parameter common to several ADC: Clock source and prescaler.
2670:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_GetCommonClock\n
2671:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR PRESC LL_ADC_GetCommonClock
2672:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
2673:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
2674:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
2675:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1
2676:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
2677:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
2678:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1
2679:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2
2680:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4
2681:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6
2682:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8
2683:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10
2684:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12
2685:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16
2686:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32
2687:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64
2688:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128
2689:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256
2690:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2691:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonClock(const ADC_Common_TypeDef *ADCxy_COMMON)
2692:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2693:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC));
2694:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2695:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2696:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2697:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to internal
2698:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * channels (VrefInt, temperature sensor, ...).
2699:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note One or several values can be selected.
2700:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT |
2701:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR)
2702:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel:
2703:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion,
2704:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a delay is required for internal voltage reference and
2705:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temperature sensor stabilization time.
2706:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet.
2707:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
2708:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
2709:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note ADC internal channel sampling time constraint:
ARM GAS /tmp/ccTOAmWG.s page 49
2710:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For ADC conversion of internal channels,
2711:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a sampling time minimum value is required.
2712:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet.
2713:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
2714:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
2715:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled.
2716:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each
2717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instance or by using helper macro helper macro
2718:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
2719:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n
2720:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR TSEN LL_ADC_SetCommonPathInternalCh\n
2721:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR VBATEN LL_ADC_SetCommonPathInternalCh
2722:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
2723:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
2724:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values:
2725:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE
2726:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
2727:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
2728:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT
2729:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
2730:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Path
2732:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN, PathInternal);
2734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2735:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2736:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2737:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get parameter common to several ADC: measurement path to internal
2738:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * channels (VrefInt, temperature sensor, ...).
2739:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note One or several values can be selected.
2740:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT |
2741:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR)
2742:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n
2743:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR TSEN LL_ADC_GetCommonPathInternalCh\n
2744:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR VBATEN LL_ADC_GetCommonPathInternalCh
2745:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
2746:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
2747:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be a combination of the following values:
2748:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE
2749:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
2750:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
2751:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT
2752:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2753:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(const ADC_Common_TypeDef *ADCxy_COMMON)
2754:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN));
2756:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2757:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2758:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2759:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to
2760:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...).
2761:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Add paths to the current configuration.
2762:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note One or several values can be selected.
2763:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT |
2764:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR)
2765:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel:
2766:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion,
ARM GAS /tmp/ccTOAmWG.s page 50
2767:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a delay is required for internal voltage reference and
2768:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temperature sensor stabilization time.
2769:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet.
2770:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
2771:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
2772:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note ADC internal channel sampling time constraint:
2773:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For ADC conversion of internal channels,
2774:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a sampling time minimum value is required.
2775:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet.
2776:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChAdd\n
2777:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR TSEN LL_ADC_SetCommonPathInternalChAdd\n
2778:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR VBATEN LL_ADC_SetCommonPathInternalChAdd
2779:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
2780:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
2781:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values:
2782:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE
2783:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
2784:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
2785:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT
2786:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
2787:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2788:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChAdd(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P
2789:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2790:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** SET_BIT(ADCxy_COMMON->CCR, PathInternal);
2791:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2792:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2793:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2794:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to
2795:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...).
2796:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Remove paths to the current configuration.
2797:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note One or several values can be selected.
2798:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT |
2799:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR)
2800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChRem\n
2801:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR TSEN LL_ADC_SetCommonPathInternalChRem\n
2802:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CCR VBATEN LL_ADC_SetCommonPathInternalChRem
2803:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
2804:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
2805:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values:
2806:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE
2807:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
2808:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
2809:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT
2810:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
2811:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2812:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChRem(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P
2813:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2814:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** CLEAR_BIT(ADCxy_COMMON->CCR, PathInternal);
2815:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2816:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2817:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2818:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
2819:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2820:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2821:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC ins
2822:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
2823:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
ARM GAS /tmp/ccTOAmWG.s page 51
2824:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2825:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2826:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC calibration factor in the mode single-ended
2827:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or differential (for devices with differential mode available).
2828:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function is intended to set calibration parameters
2829:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without having to perform a new calibration using
2830:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref LL_ADC_StartCalibration().
2831:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with differential mode available:
2832:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Calibration of offset is specific to each of
2833:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * single-ended and differential modes
2834:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (calibration factor must be specified for each of these
2835:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * differential modes, if used afterwards and if the application
2836:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * requires their calibration).
2837:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Calibration of linearity is common to both
2838:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * single-ended and differential modes
2839:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (calibration factor can be specified only once).
2840:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of setting calibration factors of both modes single ended
2841:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and differential (parameter LL_ADC_BOTH_SINGLE_DIFF_ENDED):
2842:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * both calibration factors must be concatenated.
2843:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * To perform this processing, use helper macro
2844:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_CALIB_FACTOR_SINGLE_DIFF().
2845:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
2846:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
2847:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be enabled, without calibration on going, without conversion
2848:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on group regular.
2849:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_SetCalibrationOffsetFactor\n
2850:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_SetCalibrationOffsetFactor
2851:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
2852:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values:
2853:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED
2854:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED
2855:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_BOTH_SINGLE_DIFF_ENDED
2856:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F
2857:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
2858:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2859:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCalibrationOffsetFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff, uint
2860:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
29 .loc 2 2860 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 @ link register save eliminated.
2861:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
2862:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT_RES13,
2863:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK,
2864:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** CalibrationFactor << (((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) >> ADC_SINGLED
2865:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
2866:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT,
34 .loc 2 2866 3 view .LVU1
35 0000 D0F8C430 ldr r3, [r0, #196]
36 0004 21F0F82C bic ip, r1, #-134154240
37 0008 23EA0C0C bic ip, r3, ip
38 000c C1F30A03 ubfx r3, r1, #0, #11
39 0010 DB43 mvns r3, r3
40 0012 03EA1133 and r3, r3, r1, lsr #12
41 0016 03F01003 and r3, r3, #16
42 001a 9A40 lsls r2, r2, r3
ARM GAS /tmp/ccTOAmWG.s page 52
43 .LVL1:
44 .loc 2 2866 3 is_stmt 0 view .LVU2
45 001c 4CEA0202 orr r2, ip, r2
46 0020 C0F8C420 str r2, [r0, #196]
2867:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK,
2868:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** CalibrationFactor << (((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) >> ADC_SINGLED
2869:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
2870:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
47 .loc 2 2870 1 view .LVU3
48 0024 7047 bx lr
49 .cfi_endproc
50 .LFE151:
52 .section .text.LL_ADC_SetCalibrationLinearFactor,"ax",%progbits
53 .align 1
54 .syntax unified
55 .thumb
56 .thumb_func
58 LL_ADC_SetCalibrationLinearFactor:
59 .LVL2:
60 .LFB153:
2871:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2873:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC calibration factor in the mode single-ended
2874:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or differential (for devices with differential mode available).
2875:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Calibration factors are set by hardware after performing
2876:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a calibration run using function @ref LL_ADC_StartCalibration().
2877:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with differential mode available:
2878:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Calibration of offset is specific to each of
2879:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * single-ended and differential modes
2880:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Calibration of linearity is common to both
2881:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * single-ended and differential modes
2882:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_GetCalibrationOffsetFactor\n
2883:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_GetCalibrationOffsetFactor
2884:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
2885:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values:
2886:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED
2887:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED
2888:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x7F
2889:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2890:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCalibrationOffsetFactor(const ADC_TypeDef *ADCx, uint32_t Single
2891:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2892:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Retrieve bits with position in register depending on parameter */
2893:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* "SingleDiff". */
2894:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */
2895:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* containing other bits reserved for other purpose. */
2896:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
2897:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CALFACT_RES13, (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK))
2898:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
2899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CALFACT, (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((S
2900:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
2901:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2902:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2903:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2904:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC Linear calibration factor in the mode single-ended.
2905:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function is intended to set linear calibration parameters
2906:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without having to perform a new calibration using
2907:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref LL_ADC_StartCalibration().
ARM GAS /tmp/ccTOAmWG.s page 53
2908:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
2909:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
2910:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be enabled, without calibration on going, without conversion
2911:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on group regular.
2912:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CALFACT2 LINCALFACT LL_ADC_SetCalibrationLinearFactor\n
2913:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CALFACT2 LINCALFACT LL_ADC_SetCalibrationLinearFactor
2914:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
2915:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param LinearityWord This parameter can be one of the following values:
2916:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD1
2917:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD2
2918:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD3
2919:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD4
2920:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD5
2921:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD6
2922:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x3FFFFFFF
2923:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
2924:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2925:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCalibrationLinearFactor(ADC_TypeDef *ADCx, uint32_t LinearityWord, u
2926:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
61 .loc 2 2926 1 is_stmt 1 view -0
62 .cfi_startproc
63 @ args = 0, pretend = 0, frame = 0
64 @ frame_needed = 0, uses_anonymous_args = 0
65 @ link register save eliminated.
2927:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
2928:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx != ADC3)
2929:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t timeout_cpu_cycles = ADC_LINEARITY_BIT_TOGGLE_TIMEOUT;
2931:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT2_RES14, ADC_CALFACT2_LINCALFACT, CalibrationFactor);
2932:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR, ADC_CR_ADCALLIN, LinearityWord);
2933:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** while ((READ_BIT(ADCx->CR, LinearityWord) == 0UL) && (timeout_cpu_cycles > 0UL))
2934:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2935:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** timeout_cpu_cycles--;
2936:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2937:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2938:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
2939:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t timeout_cpu_cycles = ADC_LINEARITY_BIT_TOGGLE_TIMEOUT;
66 .loc 2 2939 3 view .LVU5
2940:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT2, ADC_CALFACT2_LINCALFACT, CalibrationFactor);
67 .loc 2 2940 3 view .LVU6
68 0000 D0F8C830 ldr r3, [r0, #200]
69 0004 03F04043 and r3, r3, #-1073741824
70 0008 1343 orrs r3, r3, r2
71 000a C0F8C830 str r3, [r0, #200]
2941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR, ADC_CR_ADCALLIN, LinearityWord);
72 .loc 2 2941 3 view .LVU7
73 000e 8368 ldr r3, [r0, #8]
74 0010 23F48033 bic r3, r3, #65536
75 0014 0B43 orrs r3, r3, r1
76 0016 8360 str r3, [r0, #8]
2942:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** while ((READ_BIT(ADCx->CR, LinearityWord) == 0UL) && (timeout_cpu_cycles > 0UL))
77 .loc 2 2942 3 view .LVU8
2939:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT2, ADC_CALFACT2_LINCALFACT, CalibrationFactor);
78 .loc 2 2939 12 is_stmt 0 view .LVU9
79 0018 034B ldr r3, .L6
80 .LVL3:
81 .L3:
ARM GAS /tmp/ccTOAmWG.s page 54
82 .loc 2 2942 53 is_stmt 1 view .LVU10
83 .loc 2 2942 11 is_stmt 0 view .LVU11
84 001a 8268 ldr r2, [r0, #8]
85 .loc 2 2942 53 view .LVU12
86 001c 0A42 tst r2, r1
87 001e 02D1 bne .L2
88 .loc 2 2942 53 discriminator 1 view .LVU13
89 0020 0BB1 cbz r3, .L2
2943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2944:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** timeout_cpu_cycles--;
90 .loc 2 2944 5 is_stmt 1 view .LVU14
91 .loc 2 2944 23 is_stmt 0 view .LVU15
92 0022 013B subs r3, r3, #1
93 .LVL4:
94 .loc 2 2944 23 view .LVU16
95 0024 F9E7 b .L3
96 .LVL5:
97 .L2:
2945:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2946:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
2947:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
98 .loc 2 2947 1 view .LVU17
99 0026 7047 bx lr
100 .L7:
101 .align 2
102 .L6:
103 0028 70000800 .word 524400
104 .cfi_endproc
105 .LFE153:
107 .section .text.LL_ADC_GetCalibrationLinearFactor,"ax",%progbits
108 .align 1
109 .syntax unified
110 .thumb
111 .thumb_func
113 LL_ADC_GetCalibrationLinearFactor:
114 .LVL6:
115 .LFB154:
2948:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2949:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2950:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC Linear calibration factor in the mode single-ended.
2951:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Calibration factors are set by hardware after performing
2952:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a calibration run using function @ref LL_ADC_StartCalibration().
2953:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CALFACT2 LINCALFACT LL_ADC_GetCalibrationLinearFactor\n
2954:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CALFACT2 LINCALFACT LL_ADC_GetCalibrationLinearFactor
2955:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
2956:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param LinearityWord This parameter can be one of the following values:
2957:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD1
2958:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD2
2959:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD3
2960:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD4
2961:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD5
2962:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_LINEARITY_WORD6
2963:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x3FFFFFFF
2964:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2965:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCalibrationLinearFactor(ADC_TypeDef *ADCx, uint32_t LinearityWor
2966:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
116 .loc 2 2966 1 is_stmt 1 view -0
ARM GAS /tmp/ccTOAmWG.s page 55
117 .cfi_startproc
118 @ args = 0, pretend = 0, frame = 0
119 @ frame_needed = 0, uses_anonymous_args = 0
120 @ link register save eliminated.
2967:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t timeout_cpu_cycles = ADC_LINEARITY_BIT_TOGGLE_TIMEOUT;
121 .loc 2 2967 3 view .LVU19
2968:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, LinearityWord);
122 .loc 2 2968 3 view .LVU20
123 0000 8368 ldr r3, [r0, #8]
124 0002 23EA0103 bic r3, r3, r1
125 0006 8360 str r3, [r0, #8]
2969:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** while ((READ_BIT(ADCx->CR, LinearityWord) != 0UL) && (timeout_cpu_cycles > 0UL))
126 .loc 2 2969 3 view .LVU21
2967:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t timeout_cpu_cycles = ADC_LINEARITY_BIT_TOGGLE_TIMEOUT;
127 .loc 2 2967 12 is_stmt 0 view .LVU22
128 0008 054B ldr r3, .L12
129 .LVL7:
130 .L9:
131 .loc 2 2969 53 is_stmt 1 view .LVU23
132 .loc 2 2969 11 is_stmt 0 view .LVU24
133 000a 8268 ldr r2, [r0, #8]
134 .loc 2 2969 53 view .LVU25
135 000c 0A42 tst r2, r1
136 000e 02D0 beq .L10
137 .loc 2 2969 53 discriminator 1 view .LVU26
138 0010 0BB1 cbz r3, .L10
2970:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2971:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** timeout_cpu_cycles--;
139 .loc 2 2971 5 is_stmt 1 view .LVU27
140 .loc 2 2971 23 is_stmt 0 view .LVU28
141 0012 013B subs r3, r3, #1
142 .LVL8:
143 .loc 2 2971 23 view .LVU29
144 0014 F9E7 b .L9
145 .LVL9:
146 .L10:
2972:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2973:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
2974:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CALFACT2_RES14, ADC_CALFACT2_LINCALFACT));
2975:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
2976:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CALFACT2, ADC_CALFACT2_LINCALFACT));
147 .loc 2 2976 3 is_stmt 1 view .LVU30
148 .loc 2 2976 21 is_stmt 0 view .LVU31
149 0016 D0F8C800 ldr r0, [r0, #200]
150 .LVL10:
2977:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
2978:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
151 .loc 2 2978 1 view .LVU32
152 001a 20F04040 bic r0, r0, #-1073741824
153 001e 7047 bx lr
154 .L13:
155 .align 2
156 .L12:
157 0020 70000800 .word 524400
158 .cfi_endproc
159 .LFE154:
161 .section .text.LL_ADC_SetChannelSamplingTime,"ax",%progbits
ARM GAS /tmp/ccTOAmWG.s page 56
162 .align 1
163 .syntax unified
164 .thumb
165 .thumb_func
167 LL_ADC_SetChannelSamplingTime:
168 .LVL11:
169 .LFB201:
2979:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
2980:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC resolution.
2981:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to reference manual for alignments formats
2982:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * dependencies to ADC resolutions.
2983:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
2984:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
2985:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
2986:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
2987:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_SetResolution
2988:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
2989:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Resolution This parameter can be one of the following values:
2990:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B
2991:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
2992:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
2993:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
2994:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
2995:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
2996:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
2997:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
2998:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2999:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_3)
3000:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3001:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution);
3002:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3003:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #elif defined(ADC_VER_V5_V90)
3004:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3005:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3006:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC3_CFGR_RES, ((__LL_ADC12_RESOLUTION_TO_ADC3(Resolution) & (ADC_CFGR_
3007:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3008:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3009:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3010:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((DBGMCU->IDCODE & 0x30000000UL) == 0x10000000UL) /* Rev.Y */
3011:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3012:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution);
3013:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3014:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else /* Rev.V */
3015:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3016:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (LL_ADC_RESOLUTION_8B == Resolution)
3017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3018:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution | 0x0000000CUL);
3019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3020:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3021:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3022:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution);
3023:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3024:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3025:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3026:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else /* ADC_VER_V5_V90 */
3027:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((DBGMCU->IDCODE & 0x30000000UL) == 0x10000000UL) /* Rev.Y */
3028:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
ARM GAS /tmp/ccTOAmWG.s page 57
3029:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution);
3030:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3031:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else /* Rev.V */
3032:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3033:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (LL_ADC_RESOLUTION_8B == Resolution)
3034:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3035:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution | 0x0000000CUL);
3036:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3038:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3039:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution);
3040:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3041:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3043:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_X*/
3044:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3046:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3047:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC resolution.
3048:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to reference manual for alignments formats
3049:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * dependencies to ADC resolutions.
3050:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_GetResolution
3051:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3052:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3053:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_16B (1)
3054:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_14B
3055:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B
3056:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B
3057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B
3058:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B (2)
3059:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1): Specific to ADC instance: ADC1, ADC2
3060:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2): Specific to ADC instance: ADC3
3061:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetResolution(const ADC_TypeDef *ADCx)
3063:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3064:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined (ADC_VER_V5_3)
3065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3066:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES));
3067:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3068:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #elif defined(ADC_VER_V5_V90)
3069:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3070:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3071:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC3_CFGR_RES));
3072:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3074:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES)) == 0x0000001CUL)
3076:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3077:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (LL_ADC_RESOLUTION_8B);
3078:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3079:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3080:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3081:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES));
3082:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3083:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3084:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3085:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else /* ADC_VER_V5_V90 */
ARM GAS /tmp/ccTOAmWG.s page 58
3086:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((DBGMCU->IDCODE & 0x30000000UL) == 0x10000000UL) /* Rev.Y */
3087:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3088:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES));
3089:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3090:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else /* Rev.V */
3091:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3092:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES)) == 0x0000001CUL)
3093:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3094:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (LL_ADC_RESOLUTION_8B);
3095:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3096:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3097:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3098:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES));
3099:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3100:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3101:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3102:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_X */
3103:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3104:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3105:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3106:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC low power mode.
3107:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Description of ADC low power modes:
3108:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode,
3109:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary
3110:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * in order to reduce power consumption.
3111:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * New ADC conversion starts only when the previous
3112:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * unitary conversion data (for ADC group regular)
3113:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected)
3114:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * has been retrieved by user software.
3115:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any
3116:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * other conversion.
3117:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions
3118:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * triggers to the speed of the software that reads the data.
3119:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency
3120:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * applications.
3121:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * How to use this low power mode:
3122:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA
3123:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag
3124:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA).
3125:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding
3126:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU
3127:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait).
3128:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Do use with polling: 1. Start conversion,
3129:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of
3130:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * conversion to ensure that conversion is completed and
3131:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another
3132:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion start.
3133:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC low power mode "auto power-off" (feature available on
3134:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * this device if parameter LL_ADC_LP_AUTOPOWEROFF is available):
3135:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the ADC automatically powers-off after a conversion and
3136:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * automatically wakes up when a new conversion is triggered
3137:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (with startup time between trigger and start of sampling).
3138:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This feature can be combined with low power mode "auto wait".
3139:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read
3140:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently
3141:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of delay during which ADC was idle.
3142:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not
ARM GAS /tmp/ccTOAmWG.s page 59
3143:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * correspond to the current voltage level on the selected
3144:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC channel.
3145:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
3146:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
3147:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
3148:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
3149:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_SetLowPowerMode
3150:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3151:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param LowPowerMode This parameter can be one of the following values:
3152:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE
3153:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT
3154:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3155:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3156:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
3157:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3158:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_AUTDLY, LowPowerMode);
3159:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3160:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3161:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3162:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC low power mode:
3163:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Description of ADC low power modes:
3164:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode,
3165:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary
3166:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * in order to reduce power consumption.
3167:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * New ADC conversion starts only when the previous
3168:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * unitary conversion data (for ADC group regular)
3169:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected)
3170:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * has been retrieved by user software.
3171:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any
3172:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * other conversion.
3173:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions
3174:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * triggers to the speed of the software that reads the data.
3175:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency
3176:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * applications.
3177:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * How to use this low power mode:
3178:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA
3179:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag
3180:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA).
3181:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding
3182:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU
3183:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait).
3184:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Do use with polling: 1. Start conversion,
3185:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of
3186:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * conversion to ensure that conversion is completed and
3187:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another
3188:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion start.
3189:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC low power mode "auto power-off" (feature available on
3190:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * this device if parameter LL_ADC_LP_AUTOPOWEROFF is available):
3191:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the ADC automatically powers-off after a conversion and
3192:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * automatically wakes up when a new conversion is triggered
3193:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (with startup time between trigger and start of sampling).
3194:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This feature can be combined with low power mode "auto wait".
3195:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read
3196:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently
3197:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of delay during which ADC was idle.
3198:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not
3199:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * correspond to the current voltage level on the selected
ARM GAS /tmp/ccTOAmWG.s page 60
3200:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC channel.
3201:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_GetLowPowerMode
3202:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3203:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3204:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE
3205:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT
3206:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3207:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(const ADC_TypeDef *ADCx)
3208:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3209:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_AUTDLY));
3210:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3211:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3212:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3213:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC selected Channel.
3214:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function set the pre-selection of channel configuration.
3215:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Caution: Channel selections is dependent to ADC instance and IP version:
3216:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For STM32H72x/3x This is applicable only for ADC1/ADC2
3217:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For Rest of STM32H7xxx This is applicable only all the ADCs instances.
3218:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
3219:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3220:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be one of the following values:
3221:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0
3222:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1
3223:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2
3224:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3
3225:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4
3226:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5
3227:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
3228:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
3229:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
3230:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
3231:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
3232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
3233:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
3234:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
3235:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
3236:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
3237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
3238:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
3239:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
3240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
3241:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3242:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3243:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelPreselection(ADC_TypeDef *ADCx, uint32_t Channel)
3244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3245:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
3246:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx != ADC3)
3247:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3248:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* ADC channels preselection */
3249:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADCx->PCSEL_RES0 |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(Channel) & 0x1FUL));
3250:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3251:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
3252:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* ADC channels preselection */
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADCx->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(Channel) & 0x1FUL));
3254:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
3255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3256:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
ARM GAS /tmp/ccTOAmWG.s page 61
3257:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3258:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Gets ADC pre-selected Channel.
3259:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function gets the pre-selected ADC channel.
3260:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Caution: Channel selections is dependent to ADC instance and IP version:
3261:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For STM32H72x/3x This is applicable only for ADC1/ADC2
3262:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For Rest of STM32H7xxx This is applicable on all the ADCs instances.
3263:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
3264:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3265:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be one of the following values:
3266:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0
3267:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1
3268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2
3269:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3
3270:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4
3271:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5
3272:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
3273:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
3274:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
3275:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
3276:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
3277:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
3278:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
3279:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
3280:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
3281:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
3282:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
3283:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
3284:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
3285:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
3286:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval the preselection state of Channel (!= 0 : pre-selected, == 0 : not pre-selected)
3287:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3288:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelPreselection(const ADC_TypeDef *ADCx, uint32_t Channel)
3289:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3290:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
3291:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx != ADC3)
3292:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3293:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Gets preselected ADC channel */
3294:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->PCSEL_RES0, 1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(Channel) &
3295:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3296:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3297:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3298:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return 0UL;
3299:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3300:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
3301:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Gets preselected ADC channel */
3302:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->PCSEL, 1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(Channel) & 0x1FU
3303:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
3304:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3305:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3306:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3307:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC selected offset number 1, 2, 3 or 4.
3308:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function set the 2 items of offset configuration:
3309:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC channel to which the offset programmed will be applied
3310:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (independently of channel mapped on ADC group regular
3311:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or group injected)
3312:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Offset level (offset to be subtracted from the raw
3313:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * converted data).
ARM GAS /tmp/ccTOAmWG.s page 62
3314:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution:
3315:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * offset has to be left-aligned on bit 15 (handling maximum ADC resolution 16 bit),
3316:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the LSB (right bits) are set to 0.
3317:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function enables the offset, by default. It can be forced
3318:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * to disable state using function LL_ADC_SetOffsetState().
3319:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If a channel is mapped on several offsets numbers, only the offset
3320:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with the lowest value is considered for the subtraction.
3321:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
3322:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
3323:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
3324:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
3325:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On STM32H7, some fast channels are available: fast analog inputs
3326:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * coming from GPIO pads (ADC_IN0..5).
3327:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_SetOffset\n
3328:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR1 OFFSET1 LL_ADC_SetOffset\n
3329:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR1 OFFSET1_EN LL_ADC_SetOffset\n
3330:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_SetOffset\n
3331:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_SetOffset\n
3332:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffset\n
3333:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_SetOffset\n
3334:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_SetOffset\n
3335:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffset\n
3336:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_SetOffset\n
3337:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_SetOffset\n
3338:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffset
3339:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3340:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3341:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3342:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3343:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3344:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3345:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be one of the following values:
3346:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
3347:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
3348:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
3349:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
3350:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
3351:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
3352:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
3353:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
3354:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
3355:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
3356:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
3357:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
3358:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
3359:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
3360:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
3361:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
3362:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
3363:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
3364:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
3365:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
3366:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
3367:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
3368:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
3369:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
3370:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
ARM GAS /tmp/ccTOAmWG.s page 63
3371:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
3372:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
3373:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
3374:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
3375:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
3376:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0x3FFFFFF
3377:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3378:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32
3380:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3382:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
3383:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3384:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3385:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
3386:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC3_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
3387:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC3_OFR1_OFFSET1_EN | (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel);
3388:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3389:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3390:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
3391:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
3393:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
3394:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel);
3395:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3397:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3398:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3399:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4:
3400:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Channel to which the offset programmed will be applied
3401:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (independently of channel mapped on ADC group regular
3402:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or group injected)
3403:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Usage of the returned channel number:
3404:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx:
3405:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the returned channel number is only partly formatted on definition
3406:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
3407:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using
3408:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
3409:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used
3410:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * as parameter for another function.
3411:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - To get the channel number in decimal format:
3412:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * process the returned value with the helper macro
3413:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
3414:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On STM32H7, some fast channels are available: fast analog inputs
3415:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * coming from GPIO pads (ADC_IN0..5).
3416:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_GetOffsetChannel\n
3417:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_GetOffsetChannel\n
3418:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_GetOffsetChannel\n
3419:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_GetOffsetChannel
3420:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3421:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3422:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3423:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3424:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3425:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3426:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3427:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
ARM GAS /tmp/ccTOAmWG.s page 64
3428:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
3429:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
3430:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
3431:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
3432:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
3433:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
3434:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
3435:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
3436:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
3437:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
3438:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
3439:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
3440:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
3441:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
3442:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
3443:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
3444:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
3445:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
3446:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
3447:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
3448:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
3449:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
3450:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
3451:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
3452:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
3453:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
3454:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
3455:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
3456:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).\n
3457:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1, 2) For ADC channel read back from ADC register,
3458:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * comparison with internal channel parameter to be done
3459:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
3460:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetChannel(const ADC_TypeDef *ADCx, uint32_t Offsety)
3462:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3464:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_CH);
3466:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3467:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3468:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3469:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4:
3470:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Offset level (offset to be subtracted from the raw
3471:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * converted data).
3472:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution:
3473:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * offset has to be left-aligned on bit 15 (handling maximum ADC resolution 16 bit),
3474:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the LSB (right bits) are set to 0.
3475:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1 LL_ADC_GetOffsetLevel\n
3476:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_GetOffsetLevel\n
3477:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_GetOffsetLevel\n
3478:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_GetOffsetLevel
3479:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3480:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3481:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3482:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3483:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3484:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
ARM GAS /tmp/ccTOAmWG.s page 65
3485:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0x3FFFFFF
3486:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3487:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetLevel(const ADC_TypeDef *ADCx, uint32_t Offsety)
3488:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3489:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3490:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3491:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1);
3492:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3493:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3494:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3495:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3496:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set data right shift for the ADC selected offset number 1, 2, 3 or 4:
3497:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * signed offset saturation if enabled or disabled.
3498:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 RSHIFT LL_ADC_SetDataRightShift\n
3499:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3500:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3501:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3502:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3503:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3504:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3505:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param RigthShift This parameter can be one of the following values:
3506:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_RSHIFT_ENABLE
3507:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_RSHIFT_DISABLE
3508:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned None
3509:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3510:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetDataRightShift(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t RigthSh
3511:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3512:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_RSHIFT1 | ADC_CFGR2_RSHIFT2 | ADC_CFGR2_RSHIFT3 | ADC_CFGR2_RS
3513:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3514:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3515:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3516:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get data right shift for the ADC selected offset number 1, 2, 3 or 4:
3517:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * signed offset saturation if enabled or disabled.
3518:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 RSHIFT LL_ADC_GetDataRightShift\n
3519:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3520:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3521:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3522:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3523:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3524:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3525:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3526:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_RSHIFT_ENABLE
3527:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_RSHIFT_DISABLE
3528:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3529:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetDataRightShift(const ADC_TypeDef *ADCx, uint32_t Offsety)
3530:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3531:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)((READ_BIT(ADCx->CFGR2, (ADC_CFGR2_RSHIFT1 << (Offsety & 0x1FUL)))) >> (Offsety
3532:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3533:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3534:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3535:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set signed saturation for the ADC selected offset number 1, 2, 3 or 4:
3536:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * signed offset saturation if enabled or disabled.
3537:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 SSATE LL_ADC_SetOffsetSignedSaturation\n
3538:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 SSATE LL_ADC_SetOffsetSignedSaturation\n
3539:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 SSATE LL_ADC_SetOffsetSignedSaturation\n
3540:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 SSATE LL_ADC_SetOffsetSignedSaturation
3541:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
ARM GAS /tmp/ccTOAmWG.s page 66
3542:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3543:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3544:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3545:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3546:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3547:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param OffsetSignedSaturation This parameter can be one of the following values:
3548:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE
3549:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE
3550:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned None
3551:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3552:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSignedSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t
3553:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3554:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
3555:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3556:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3557:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Function not available on this instance */
3558:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3559:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3560:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
3561:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg, ADC_OFR1_SSATE, OffsetSignedSaturation);
3564:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3566:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3567:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3568:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get signed saturation for the ADC selected offset number 1, 2, 3 or 4:
3569:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * signed offset saturation if enabled or disabled.
3570:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 SSATE LL_ADC_GetOffsetSignedSaturation\n
3571:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 SSATE LL_ADC_GetOffsetSignedSaturation\n
3572:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 SSATE LL_ADC_GetOffsetSignedSaturation\n
3573:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 SSATE LL_ADC_GetOffsetSignedSaturation
3574:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3575:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3576:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3578:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3579:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3580:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3581:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE
3582:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE
3583:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3584:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSignedSaturation(const ADC_TypeDef *ADCx, uint32_t Offsety
3585:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3586:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
3587:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3588:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3589:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Function not available on this instance */
3590:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return 0UL;
3591:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3592:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3593:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
3594:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3595:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3596:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_SSATE);
3597:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3598:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 67
3599:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3600:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
3601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3602:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4:
3603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * choose offset saturation mode.
3604:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
3605:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
3606:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
3607:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
3608:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_SetOffsetSaturation\n
3609:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 SATEN LL_ADC_SetOffsetSaturation\n
3610:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 SATEN LL_ADC_SetOffsetSaturation\n
3611:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 SATEN LL_ADC_SetOffsetSaturation
3612:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3613:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3614:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3615:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3616:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3617:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3618:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param OffsetSaturation This parameter can be one of the following values:
3619:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE
3620:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE
3621:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3622:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3623:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Offse
3624:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3625:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3626:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3627:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3628:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3629:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
3630:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC3_OFR1_SATEN,
3631:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** OffsetSaturation);
3632:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3633:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3634:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3635:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3636:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4:
3637:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * offset saturation if enabled or disabled.
3638:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_GetOffsetSaturation\n
3639:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 SATEN LL_ADC_GetOffsetSaturation\n
3640:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 SATEN LL_ADC_GetOffsetSaturation\n
3641:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 SATEN LL_ADC_GetOffsetSaturation
3642:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3643:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3644:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3645:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3646:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3647:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3648:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3649:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE
3650:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE
3651:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3652:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSaturation(const ADC_TypeDef *ADCx, uint32_t Offsety)
3653:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3654:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3655:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
ARM GAS /tmp/ccTOAmWG.s page 68
3656:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3657:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3658:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC3_OFR1_SATEN);
3659:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }else
3660:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3661:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return 0UL;
3662:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3663:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3664:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3665:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3666:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4:
3667:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * choose offset sign.
3668:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
3669:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
3670:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
3671:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
3672:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_SetOffsetSign\n
3673:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_SetOffsetSign\n
3674:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_SetOffsetSign\n
3675:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_SetOffsetSign
3676:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3677:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3678:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3679:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3680:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3681:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3682:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param OffsetSign This parameter can be one of the following values:
3683:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE
3684:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE
3685:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3686:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3687:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSign(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetSign)
3688:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3689:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3690:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3691:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3692:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3693:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
3694:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC3_OFR1_OFFSETPOS,
3695:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** OffsetSign);
3696:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3697:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3698:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3699:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3700:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4:
3701:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * offset sign if positive or negative.
3702:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_GetOffsetSign\n
3703:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_GetOffsetSign\n
3704:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_GetOffsetSign\n
3705:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_GetOffsetSign
3706:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3707:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3708:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3709:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3710:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3711:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3712:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
ARM GAS /tmp/ccTOAmWG.s page 69
3713:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE
3714:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE
3715:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3716:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSign(const ADC_TypeDef *ADCx, uint32_t Offsety)
3717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3718:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3719:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3720:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3721:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3722:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC3_OFR1_OFFSETPOS);
3723:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3724:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3725:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3726:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return 0UL;
3727:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3728:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3729:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3730:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4:
3732:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * force offset state disable or enable
3733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without modifying offset channel or offset value.
3734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function should be needed only in case of offset to be
3735:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * enabled-disabled dynamically, and should not be needed in other cases:
3736:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * function LL_ADC_SetOffset() automatically enables the offset.
3737:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
3738:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
3739:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
3740:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
3741:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_SetOffsetState\n
3742:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffsetState\n
3743:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffsetState\n
3744:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffsetState
3745:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3746:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3747:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3748:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3749:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3750:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3751:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param OffsetState This parameter can be one of the following values:
3752:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE
3753:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE
3754:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3756:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetStat
3757:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3758:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3759:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3760:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3761:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
3762:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC3_OFR1_OFFSET1_EN,
3763:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** OffsetState);
3764:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3765:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3766:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3767:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
3768:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_SSATE,
3769:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** OffsetState);
ARM GAS /tmp/ccTOAmWG.s page 70
3770:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3771:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3772:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3773:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3774:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4:
3775:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * offset state disabled or enabled.
3776:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_GetOffsetState\n
3777:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_GetOffsetState\n
3778:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_GetOffsetState\n
3779:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_GetOffsetState
3780:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3781:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values:
3782:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1
3783:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2
3784:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3
3785:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4
3786:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3787:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE
3788:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE
3789:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3790:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetState(const ADC_TypeDef *ADCx, uint32_t Offsety)
3791:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3792:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety);
3793:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
3794:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3795:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC3_OFR1_OFFSET1_EN);
3796:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3797:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3798:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3799:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_SSATE);
3800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3801:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3802:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3803:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
3804:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3805:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3806:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
3807:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3808:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3809:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: gr
3810:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
3811:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3812:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3813:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3814:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger source:
3815:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event,
3816:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * external interrupt line).
3817:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger
3818:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * also set trigger polarity to rising edge
3819:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (default setting for compatibility with some ADC on other
3820:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * STM32 families having this setting set by HW default value).
3821:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * In case of need to modify trigger edge, use
3822:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * function @ref LL_ADC_REG_SetTriggerEdge().
3823:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer
3824:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * depends on timers availability on the selected device.
3825:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
3826:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
ARM GAS /tmp/ccTOAmWG.s page 71
3827:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
3828:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
3829:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_SetTriggerSource\n
3830:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_SetTriggerSource
3831:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3832:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values:
3833:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE
3834:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1
3835:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2
3836:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3
3837:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2
3838:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
3839:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4
3840:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
3841:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO
3842:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2
3843:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO
3844:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2
3845:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
3846:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO
3847:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
3848:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO
3849:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4
3850:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1
3851:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3
3852:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM1_OUT
3853:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM2_OUT
3854:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM3_OUT
3855:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3856:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3857:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
3858:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3859:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource);
3860:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3861:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3862:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3863:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source:
3864:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event,
3865:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * external interrupt line).
3866:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note To determine whether group regular trigger source is
3867:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal (SW start) or external, without detail
3868:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of which peripheral is selected as external trigger,
3869:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (equivalent to
3870:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
3871:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
3872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer
3873:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * depends on timers availability on the selected device.
3874:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_GetTriggerSource\n
3875:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_GetTriggerSource
3876:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3877:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3878:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE
3879:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1
3880:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2
3881:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3
3882:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2
3883:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
ARM GAS /tmp/ccTOAmWG.s page 72
3884:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4
3885:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
3886:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO
3887:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2
3888:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO
3889:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2
3890:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
3891:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO
3892:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
3893:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO
3894:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4
3895:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1
3896:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3
3897:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM1_OUT
3898:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM2_OUT
3899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM3_OUT
3900:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3901:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(const ADC_TypeDef *ADCx)
3902:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3903:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN);
3904:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3905:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
3906:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* corresponding to ADC_CFGR_EXTEN {0; 1; 2; 3}. */
3907:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U
3908:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3909:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bitfield corresponding to ADC_CFGR_EXTEN and ADC_CFGR_EXTSEL */
3910:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to match with triggers literals definition. */
3911:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((TriggerSource
3912:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** & (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR_EXTSEL)
3913:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN)
3914:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
3915:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3916:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3917:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3918:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source internal (SW start)
3919:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or external.
3920:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of group regular trigger source set to external trigger,
3921:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * to determine which peripheral is selected as external trigger,
3922:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use function @ref LL_ADC_REG_GetTriggerSource().
3923:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_IsTriggerSourceSWStart
3924:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3925:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger
3926:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Value "1" if trigger source SW start.
3927:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3928:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(const ADC_TypeDef *ADCx)
3929:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1
3931:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3932:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3933:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3934:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger polarity.
3935:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger.
3936:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
3937:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
3938:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
3939:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
3940:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_SetTriggerEdge
ARM GAS /tmp/ccTOAmWG.s page 73
3941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3942:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values:
3943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING
3944:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
3945:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
3946:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3947:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3948:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
3949:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3950:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge);
3951:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3952:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3953:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3954:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger polarity.
3955:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger.
3956:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_GetTriggerEdge
3957:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3958:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
3959:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING
3960:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
3961:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
3962:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3963:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(const ADC_TypeDef *ADCx)
3964:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3965:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN));
3966:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3967:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
3968:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
3969:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
3970:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC sampling mode.
3971:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function set the ADC conversion sampling mode
3972:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This mode applies to regular group only.
3973:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Set sampling mode is applied to all conversion of regular group.
3974:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
3975:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
3976:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
3977:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
3978:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_SetSamplingMode\n
3979:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_SetSamplingMode
3980:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
3981:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SamplingMode This parameter can be one of the following values:
3982:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL
3983:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB
3984:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED
3985:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
3986:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
3987:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSamplingMode(ADC_TypeDef *ADCx, uint32_t SamplingMode)
3988:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3989:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx != ADC3)
3990:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3991:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Function not available on this instance */
3992:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3993:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
3994:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3995:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC3_CFGR2_BULB | ADC3_CFGR2_SMPTRIG, SamplingMode);
3996:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3997:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 74
3998:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
3999:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4000:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4001:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group regular sequencer length and scan direction.
4002:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Description of ADC group regular sequencer features:
4003:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - For devices with sequencer fully configurable
4004:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available):
4005:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequencer length and each rank affectation to a channel
4006:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * are configurable.
4007:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This function performs configuration of:
4008:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence.
4009:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer
4010:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n).
4011:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Sequencer ranks are selected using
4012:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()".
4013:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - For devices with sequencer not fully configurable
4014:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available):
4015:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequencer length and each rank affectation to a channel
4016:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * are defined by channel number.
4017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This function performs configuration of:
4018:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is
4019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * defined by number of channels set in the sequence,
4020:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * rank of each channel is fixed by channel HW number.
4021:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
4022:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer
4023:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * scan direction is forward (from lowest channel number to
4024:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * highest channel number).
4025:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Sequencer ranks are selected using
4026:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()".
4027:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank:
4028:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion on only 1 channel.
4029:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4030:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4031:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
4032:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
4033:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_SetSequencerLength
4034:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4035:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values:
4036:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE
4037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS
4038:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS
4039:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS
4040:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS
4041:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS
4042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS
4043:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS
4044:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS
4045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS
4046:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS
4047:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS
4048:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS
4049:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS
4050:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS
4051:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS
4052:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4053:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4054:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks)
ARM GAS /tmp/ccTOAmWG.s page 75
4055:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4056:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->SQR1, ADC_SQR1_L, SequencerNbRanks);
4057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4058:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4059:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4060:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular sequencer length and scan direction.
4061:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Description of ADC group regular sequencer features:
4062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - For devices with sequencer fully configurable
4063:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available):
4064:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequencer length and each rank affectation to a channel
4065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * are configurable.
4066:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This function retrieves:
4067:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence.
4068:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer
4069:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n).
4070:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Sequencer ranks are selected using
4071:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()".
4072:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - For devices with sequencer not fully configurable
4073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available):
4074:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequencer length and each rank affectation to a channel
4075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * are defined by channel number.
4076:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This function retrieves:
4077:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is
4078:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * defined by number of channels set in the sequence,
4079:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * rank of each channel is fixed by channel HW number.
4080:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
4081:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer
4082:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * scan direction is forward (from lowest channel number to
4083:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * highest channel number).
4084:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Sequencer ranks are selected using
4085:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()".
4086:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank:
4087:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion on only 1 channel.
4088:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_GetSequencerLength
4089:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4090:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4091:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE
4092:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS
4093:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS
4094:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS
4095:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS
4096:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS
4097:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS
4098:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS
4099:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS
4100:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS
4101:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS
4102:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS
4103:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS
4104:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS
4105:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS
4106:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS
4107:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4108:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerLength(const ADC_TypeDef *ADCx)
4109:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4110:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SQR1, ADC_SQR1_L));
4111:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 76
4112:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4113:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4114:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group regular sequencer discontinuous mode:
4115:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected
4116:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * number of ranks.
4117:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular
4118:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode.
4119:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note It is not possible to enable both ADC auto-injected mode
4120:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and ADC group regular sequencer discontinuous mode.
4121:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4122:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4123:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
4124:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
4125:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_SetSequencerDiscont\n
4126:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_SetSequencerDiscont
4127:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4128:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values:
4129:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
4130:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
4131:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS
4132:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS
4133:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS
4134:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS
4135:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS
4136:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS
4137:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS
4138:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4139:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4140:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
4141:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4142:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM, SeqDiscont);
4143:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4144:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4145:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4146:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular sequencer discontinuous mode:
4147:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected
4148:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * number of ranks.
4149:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_GetSequencerDiscont\n
4150:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_GetSequencerDiscont
4151:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4152:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4153:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
4154:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
4155:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS
4156:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS
4157:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS
4158:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS
4159:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS
4160:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS
4161:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS
4162:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4163:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(const ADC_TypeDef *ADCx)
4164:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4165:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM));
4166:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4167:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4168:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
ARM GAS /tmp/ccTOAmWG.s page 77
4169:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group regular sequence: channel on the selected
4170:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * scan sequence rank.
4171:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function performs configuration of:
4172:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Channels ordering into each rank of scan sequence:
4173:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * whatever channel can be placed into whatever rank.
4174:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is
4175:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * fully configurable: sequencer length and each rank
4176:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * affectation to a channel are configurable.
4177:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength().
4178:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available.
4179:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet for channels availability.
4180:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt,
4181:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be
4182:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * enabled separately.
4183:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
4184:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4185:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4186:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
4187:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
4188:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_SetSequencerRanks\n
4189:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_SetSequencerRanks\n
4190:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_SetSequencerRanks\n
4191:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_SetSequencerRanks\n
4192:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_SetSequencerRanks\n
4193:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_SetSequencerRanks\n
4194:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_SetSequencerRanks\n
4195:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_SetSequencerRanks\n
4196:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_SetSequencerRanks\n
4197:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_SetSequencerRanks\n
4198:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_SetSequencerRanks\n
4199:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_SetSequencerRanks\n
4200:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_SetSequencerRanks\n
4201:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_SetSequencerRanks\n
4202:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_SetSequencerRanks\n
4203:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_SetSequencerRanks
4204:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4205:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Rank This parameter can be one of the following values:
4206:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1
4207:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2
4208:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3
4209:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4
4210:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5
4211:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6
4212:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7
4213:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8
4214:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9
4215:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10
4216:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11
4217:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12
4218:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13
4219:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14
4220:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15
4221:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16
4222:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be one of the following values:
4223:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
4224:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
4225:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
ARM GAS /tmp/ccTOAmWG.s page 78
4226:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
4227:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
4228:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
4229:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
4230:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
4231:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
4232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
4233:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
4234:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
4235:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
4236:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
4237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
4238:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
4239:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
4240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
4241:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
4242:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
4243:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
4244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
4245:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
4246:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
4247:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
4248:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
4249:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
4250:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
4251:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
4252:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
4253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4254:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe
4256:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4257:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */
4258:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* in register and register position depending on parameter "Rank". */
4259:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */
4260:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* other bits reserved for other purpose. */
4261:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> A
4262:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4263:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
4264:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK),
4265:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Ra
4266:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4267:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4269:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular sequence: channel on the selected
4270:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * scan sequence rank.
4271:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is
4272:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * fully configurable: sequencer length and each rank
4273:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * affectation to a channel are configurable.
4274:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength().
4275:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available.
4276:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet for channels availability.
4277:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Usage of the returned channel number:
4278:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx:
4279:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the returned channel number is only partly formatted on definition
4280:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
4281:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using
4282:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
ARM GAS /tmp/ccTOAmWG.s page 79
4283:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used
4284:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * as parameter for another function.
4285:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - To get the channel number in decimal format:
4286:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * process the returned value with the helper macro
4287:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
4288:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_GetSequencerRanks\n
4289:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_GetSequencerRanks\n
4290:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_GetSequencerRanks\n
4291:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_GetSequencerRanks\n
4292:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_GetSequencerRanks\n
4293:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_GetSequencerRanks\n
4294:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_GetSequencerRanks\n
4295:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_GetSequencerRanks\n
4296:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_GetSequencerRanks\n
4297:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_GetSequencerRanks\n
4298:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_GetSequencerRanks\n
4299:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_GetSequencerRanks\n
4300:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_GetSequencerRanks\n
4301:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_GetSequencerRanks\n
4302:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_GetSequencerRanks\n
4303:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_GetSequencerRanks
4304:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4305:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Rank This parameter can be one of the following values:
4306:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1
4307:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2
4308:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3
4309:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4
4310:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5
4311:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6
4312:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7
4313:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8
4314:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9
4315:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10
4316:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11
4317:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12
4318:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13
4319:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14
4320:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15
4321:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16
4322:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4323:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
4324:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
4325:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
4326:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
4327:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
4328:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
4329:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
4330:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
4331:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
4332:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
4333:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
4334:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
4335:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
4336:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
4337:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
4338:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
4339:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
ARM GAS /tmp/ccTOAmWG.s page 80
4340:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
4341:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
4342:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
4343:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
4344:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
4345:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
4346:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
4347:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
4348:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
4349:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
4350:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
4351:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
4352:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).\n
4353:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1, 2) For ADC channel read back from ADC register,
4354:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * comparison with internal channel parameter to be done
4355:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
4356:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4357:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerRanks(const ADC_TypeDef *ADCx, uint32_t Rank)
4358:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4359:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK
4360:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4361:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)((READ_BIT(*preg,
4362:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MA
4363:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> (Rank & ADC_REG_RANK_ID_SQRX_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS
4364:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
4365:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4366:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4367:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4368:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC continuous conversion mode on ADC group regular.
4369:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Description of ADC continuous conversion mode:
4370:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - single mode: one conversion per trigger
4371:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - continuous mode: after the first trigger, following
4372:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * conversions launched successively automatically.
4373:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular
4374:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode.
4375:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4376:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4377:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
4378:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
4379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_SetContinuousMode
4380:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Continuous This parameter can be one of the following values:
4382:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE
4383:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS
4384:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4385:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4386:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
4387:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4388:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_CONT, Continuous);
4389:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4390:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4391:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC continuous conversion mode on ADC group regular.
4393:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Description of ADC continuous conversion mode:
4394:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - single mode: one conversion per trigger
4395:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - continuous mode: after the first trigger, following
4396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * conversions launched successively automatically.
ARM GAS /tmp/ccTOAmWG.s page 81
4397:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_GetContinuousMode
4398:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4399:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4400:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE
4401:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS
4402:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4403:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(const ADC_TypeDef *ADCx)
4404:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4405:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_CONT));
4406:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4407:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4408:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC data transfer mode
4409:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Conversion data can be either:
4410:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Available in Data Register
4411:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Transferred by DMA in one shot mode
4412:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Transferred by DMA in circular mode
4413:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Transferred to DFSDM data register
4414:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR DMNGT LL_ADC_REG_SetDataTransferMode
4415:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4416:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param DataTransferMode Select Data Management configuration
4417:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4418:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4419:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetDataTransferMode(ADC_TypeDef *ADCx, uint32_t DataTransferMode)
4420:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4421:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DMNGT, DataTransferMode);
4422:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4423:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4424:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
4425:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4426:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Enable DMA requests for ADC3.
4427:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_SetDMATransfer\n
4428:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4429:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4430:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4431:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableDMAReq (ADC_TypeDef *ADCx)
4432:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4433:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** SET_BIT(ADCx->CFGR, ADC3_CFGR_DMAEN);
4434:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4435:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4436:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableDMAReq(ADC_TypeDef *ADCx)
4437:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4438:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** CLEAR_BIT (ADCx->CFGR, ADC3_CFGR_DMAEN);
4439:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4440:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4441:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsEnabledDMAReq (const ADC_TypeDef *ADCx)
4442:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4443:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR, ADC3_CFGR_DMAEN) == (ADC3_CFGR_DMAEN)) ? 1UL : 0UL);
4444:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4445:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4446:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group regular conversion data transfer: no transfer or
4447:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * transfer by DMA, and DMA requests mode.
4448:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests
4449:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * mode:
4450:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped
4451:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when number of DMA data transfers (number of
4452:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions) is reached.
4453:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular.
ARM GAS /tmp/ccTOAmWG.s page 82
4454:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited,
4455:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * whatever number of DMA data transfers (number of
4456:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions).
4457:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular.
4458:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to
4459:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * mode non-circular:
4460:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of
4461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error
4462:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (overrun flag and interruption if enabled).
4463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA
4464:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * settings are available using function @ref LL_ADC_SetMultiDMATransfer().
4465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note To configure DMA source address (peripheral address),
4466:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr().
4467:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4468:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4469:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
4470:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
4471:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_SetDMATransferMode\n
4472:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_SetDMATransferMode
4473:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4474:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param DMATransfer This parameter can be one of the following values:
4475:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC3_REG_DMA_TRANSFER_NONE
4476:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC3_REG_DMA_TRANSFER_LIMITED
4477:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC3_REG_DMA_TRANSFER_UNLIMITED
4478:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4479:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4480:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetDMATransferMode(ADC_TypeDef *ADCx, uint32_t DMATransfer)
4481:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4482:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
4483:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4484:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC3_CFGR_DMAEN | ADC3_CFGR_DMACFG, DMATransfer);
4485:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4486:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4487:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4488:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4489:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion data transfer: no transfer or
4490:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * transfer by DMA, and DMA requests mode.
4491:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests
4492:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * mode:
4493:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped
4494:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when number of DMA data transfers (number of
4495:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions) is reached.
4496:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular.
4497:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited,
4498:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * whatever number of DMA data transfers (number of
4499:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions).
4500:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular.
4501:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to
4502:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * mode non-circular:
4503:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of
4504:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error
4505:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (overrun flag and interruption if enabled).
4506:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA
4507:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * settings are available using function @ref LL_ADC_GetMultiDMATransfer().
4508:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note To configure DMA source address (peripheral address),
4509:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr().
4510:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_GetDMATransfer\n
ARM GAS /tmp/ccTOAmWG.s page 83
4511:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_GetDMATransfer
4512:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4513:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4514:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC3_REG_DMA_TRANSFER_NONE
4515:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC3_REG_DMA_TRANSFER_LIMITED
4516:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC3_REG_DMA_TRANSFER_UNLIMITED
4517:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4518:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransferMode(const ADC_TypeDef *ADCx)
4519:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4520:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
4521:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4522:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC3_CFGR_DMAEN | ADC3_CFGR_DMACFG));
4523:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4524:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
4525:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4526:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return 0UL;
4527:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4528:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4529:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4530:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
4531:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4532:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4533:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC data transfer mode
4534:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Conversion data can be either:
4535:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Available in Data Register
4536:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Transferred by DMA in one shot mode
4537:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Transferred by DMA in circular mode
4538:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Transferred to DFSDM data register
4539:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR DMNGT LL_ADC_REG_GetDataTransferMode
4540:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4541:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4542:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DR_TRANSFER
4543:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
4544:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
4545:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DFSDM_TRANSFER
4546:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4547:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetDataTransferMode(const ADC_TypeDef *ADCx)
4548:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4549:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DMNGT));
4550:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4551:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4552:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4553:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4554:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group regular behavior in case of overrun:
4555:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * data preserved or overwritten.
4556:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Compatibility with devices without feature overrun:
4557:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * other devices without this feature have a behavior
4558:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * equivalent to data overwritten.
4559:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * The default setting of overrun is data preserved.
4560:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Therefore, for compatibility with all devices, parameter
4561:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * overrun should be set to data overwritten.
4562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4564:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
4565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
4566:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_SetOverrun
4567:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
ARM GAS /tmp/ccTOAmWG.s page 84
4568:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Overrun This parameter can be one of the following values:
4569:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
4570:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
4571:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4572:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4573:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
4574:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4575:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_OVRMOD, Overrun);
4576:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4578:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4579:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular behavior in case of overrun:
4580:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * data preserved or overwritten.
4581:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_GetOverrun
4582:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4583:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4584:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
4585:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
4586:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4587:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(const ADC_TypeDef *ADCx)
4588:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4589:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_OVRMOD));
4590:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4591:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4592:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4593:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
4594:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4595:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4596:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Injected Configuration of ADC hierarchical scope: g
4597:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
4598:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4599:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4600:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger source:
4602:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event,
4603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * external interrupt line).
4604:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger
4605:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * also set trigger polarity to rising edge
4606:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (default setting for compatibility with some ADC on other
4607:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * STM32 families having this setting set by HW default value).
4608:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * In case of need to modify trigger edge, use
4609:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * function @ref LL_ADC_INJ_SetTriggerEdge().
4610:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer
4611:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * depends on timers availability on the selected device.
4612:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4613:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4614:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion
4615:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on either groups regular or injected.
4616:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_SetTriggerSource\n
4617:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_SetTriggerSource
4618:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4619:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values:
4620:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
4621:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
4622:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
4623:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
4624:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
ARM GAS /tmp/ccTOAmWG.s page 85
4625:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
4626:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
4627:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
4628:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
4629:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
4630:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
4631:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
4632:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
4633:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
4634:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
4635:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
4636:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
4637:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2
4638:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4
4639:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM1_OUT
4640:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM2_OUT
4641:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM3_OUT
4642:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4643:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4644:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
4645:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4646:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN, TriggerSource);
4647:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4648:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4649:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4650:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source:
4651:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event,
4652:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * external interrupt line).
4653:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note To determine whether group injected trigger source is
4654:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal (SW start) or external, without detail
4655:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of which peripheral is selected as external trigger,
4656:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (equivalent to
4657:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * "if(LL_ADC_INJ_GetTriggerSource(ADC1) == LL_ADC_INJ_TRIG_SOFTWARE)")
4658:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use function @ref LL_ADC_INJ_IsTriggerSourceSWStart.
4659:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer
4660:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * depends on timers availability on the selected device.
4661:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_GetTriggerSource\n
4662:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_GetTriggerSource
4663:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4664:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4665:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
4666:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
4667:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
4668:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
4669:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
4670:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
4671:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
4672:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
4673:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
4674:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
4675:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
4676:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
4677:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
4678:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
4679:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
4680:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
4681:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
ARM GAS /tmp/ccTOAmWG.s page 86
4682:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2
4683:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4
4684:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM1_OUT
4685:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM2_OUT
4686:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM3_OUT
4687:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4688:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerSource(const ADC_TypeDef *ADCx)
4689:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4690:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t TriggerSource = READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN);
4691:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4692:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
4693:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* corresponding to ADC_JSQR_JEXTEN {0; 1; 2; 3}. */
4694:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t ShiftJexten = ((TriggerSource & ADC_JSQR_JEXTEN) >> (ADC_INJ_TRIG_EXTEN_BITOFFSET_POS -
4695:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4696:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bitfield corresponding to ADC_JSQR_JEXTEN and ADC_JSQR_JEXTSEL */
4697:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to match with triggers literals definition. */
4698:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((TriggerSource
4699:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** & (ADC_INJ_TRIG_SOURCE_MASK >> ShiftJexten) & ADC_JSQR_JEXTSEL)
4700:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** | ((ADC_INJ_TRIG_EDGE_MASK >> ShiftJexten) & ADC_JSQR_JEXTEN)
4701:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
4702:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4703:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4704:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4705:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source internal (SW start)
4706:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** or external
4707:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of group injected trigger source set to external trigger,
4708:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * to determine which peripheral is selected as external trigger,
4709:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use function @ref LL_ADC_INJ_GetTriggerSource.
4710:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_IsTriggerSourceSWStart
4711:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4712:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger
4713:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Value "1" if trigger source SW start.
4714:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4715:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsTriggerSourceSWStart(const ADC_TypeDef *ADCx)
4716:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN) == (LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN)) ?
4718:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4719:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4720:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4721:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger polarity.
4722:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Applicable only for trigger source set to external trigger.
4723:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4724:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4725:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion
4726:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on either groups regular or injected.
4727:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_SetTriggerEdge
4728:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4729:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values:
4730:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
4731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
4732:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
4733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4735:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
4736:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4737:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTEN, ExternalTriggerEdge);
4738:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 87
4739:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4740:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4741:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger polarity.
4742:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Applicable only for trigger source set to external trigger.
4743:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_GetTriggerEdge
4744:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4745:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4746:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
4747:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
4748:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
4749:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4750:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerEdge(const ADC_TypeDef *ADCx)
4751:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4752:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN));
4753:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4754:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4756:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group injected sequencer length and scan direction.
4757:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function performs configuration of:
4758:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence.
4759:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer
4760:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n).
4761:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank:
4762:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion on only 1 channel.
4763:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4764:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4765:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion
4766:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on either groups regular or injected.
4767:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_SetSequencerLength
4768:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4769:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values:
4770:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
4771:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
4772:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
4773:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
4774:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4775:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4776:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks)
4777:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4778:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JL, SequencerNbRanks);
4779:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4780:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4781:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4782:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected sequencer length and scan direction.
4783:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function retrieves:
4784:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence.
4785:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer
4786:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n).
4787:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank:
4788:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion on only 1 channel.
4789:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_GetSequencerLength
4790:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4791:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4792:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
4793:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
4794:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
4795:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
ARM GAS /tmp/ccTOAmWG.s page 88
4796:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4797:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerLength(const ADC_TypeDef *ADCx)
4798:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4799:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JL));
4800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4801:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4802:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4803:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group injected sequencer discontinuous mode:
4804:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected
4805:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * number of ranks.
4806:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected
4807:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode.
4808:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_SetSequencerDiscont
4809:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4810:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values:
4811:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE
4812:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK
4813:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4814:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4815:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
4816:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4817:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JDISCEN, SeqDiscont);
4818:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4819:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4820:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4821:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected sequencer discontinuous mode:
4822:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected
4823:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * number of ranks.
4824:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_GetSequencerDiscont
4825:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4826:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4827:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE
4828:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK
4829:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4830:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerDiscont(const ADC_TypeDef *ADCx)
4831:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4832:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JDISCEN));
4833:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4834:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4835:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4836:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group injected sequence: channel on the selected
4837:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequence rank.
4838:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available.
4839:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet for channels availability.
4840:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt,
4841:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be
4842:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * enabled separately.
4843:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
4844:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On STM32H7, some fast channels are available: fast analog inputs
4845:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * coming from GPIO pads (ADC_IN0..5).
4846:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4847:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4848:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion
4849:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on either groups regular or injected.
4850:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_SetSequencerRanks\n
4851:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_SetSequencerRanks\n
4852:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_SetSequencerRanks\n
ARM GAS /tmp/ccTOAmWG.s page 89
4853:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_SetSequencerRanks
4854:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4855:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Rank This parameter can be one of the following values:
4856:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1
4857:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2
4858:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3
4859:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4
4860:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be one of the following values:
4861:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
4862:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
4863:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
4864:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
4865:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
4866:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
4867:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
4868:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
4869:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
4870:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
4871:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
4872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
4873:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
4874:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
4875:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
4876:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
4877:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
4878:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
4879:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
4880:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
4881:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
4882:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
4883:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
4884:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
4885:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
4886:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
4887:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
4888:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
4889:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
4890:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
4891:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
4892:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4893:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe
4894:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4895:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */
4896:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* in register depending on parameter "Rank". */
4897:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */
4898:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* other bits reserved for other purpose. */
4899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR,
4900:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ
4901:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Ra
4902:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4903:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4904:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4905:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected sequence: channel on the selected
4906:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequence rank.
4907:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available.
4908:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet for channels availability.
4909:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Usage of the returned channel number:
ARM GAS /tmp/ccTOAmWG.s page 90
4910:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx:
4911:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the returned channel number is only partly formatted on definition
4912:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
4913:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using
4914:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
4915:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used
4916:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * as parameter for another function.
4917:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - To get the channel number in decimal format:
4918:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * process the returned value with the helper macro
4919:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
4920:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_GetSequencerRanks\n
4921:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_GetSequencerRanks\n
4922:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_GetSequencerRanks\n
4923:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_GetSequencerRanks
4924:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4925:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Rank This parameter can be one of the following values:
4926:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1
4927:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2
4928:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3
4929:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4
4930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
4931:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
4932:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
4933:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
4934:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
4935:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
4936:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
4937:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
4938:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
4939:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
4940:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
4941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
4942:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
4943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
4944:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
4945:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
4946:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
4947:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
4948:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
4949:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
4950:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
4951:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
4952:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
4953:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
4954:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
4955:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
4956:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
4957:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
4958:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
4959:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
4960:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).\n
4961:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1, 2) For ADC channel read back from ADC register,
4962:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * comparison with internal channel parameter to be done
4963:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
4964:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
4965:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerRanks(const ADC_TypeDef *ADCx, uint32_t Rank)
4966:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
ARM GAS /tmp/ccTOAmWG.s page 91
4967:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)((READ_BIT(ADCx->JSQR,
4968:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) <<
4969:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS
4970:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
4971:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4972:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4973:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
4974:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger:
4975:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * independent or from ADC group regular.
4976:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This mode can be used to extend number of data registers
4977:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * updated after one ADC conversion trigger and with data
4978:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * permanently kept (not erased by successive conversions of scan of
4979:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC sequencer ranks), up to 5 data registers:
4980:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 1 data register on ADC group regular, 4 data registers
4981:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on ADC group injected.
4982:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If ADC group injected injected trigger source is set to an
4983:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * external trigger, this feature must be must be set to
4984:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * independent trigger.
4985:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC group injected automatic trigger is compliant only with
4986:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * group injected trigger source set to SW start, without any
4987:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * further action on ADC group injected conversion start or stop:
4988:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * in this case, ADC group injected is controlled only
4989:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * from ADC group regular.
4990:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected
4991:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode.
4992:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
4993:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
4994:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
4995:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
4996:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_SetTrigAuto
4997:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
4998:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param TrigAuto This parameter can be one of the following values:
4999:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT
5000:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR
5001:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
5002:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5003:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTrigAuto(ADC_TypeDef *ADCx, uint32_t TrigAuto)
5004:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5005:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JAUTO, TrigAuto);
5006:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5007:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5008:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5009:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger:
5010:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * independent or from ADC group regular.
5011:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_GetTrigAuto
5012:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5013:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
5014:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT
5015:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR
5016:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTrigAuto(const ADC_TypeDef *ADCx)
5018:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JAUTO));
5020:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5021:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5022:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5023:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC group injected contexts queue mode.
ARM GAS /tmp/ccTOAmWG.s page 92
5024:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note A context is a setting of group injected sequencer:
5025:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - group injected trigger
5026:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - sequencer length
5027:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - sequencer ranks
5028:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * If contexts queue is disabled:
5029:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - only 1 sequence can be configured
5030:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and is active perpetually.
5031:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * If contexts queue is enabled:
5032:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - up to 2 contexts can be queued
5033:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * and are checked in and out as a FIFO stack (first-in, first-out).
5034:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - If a new context is set when queues is full, error is triggered
5035:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * by interruption "Injected Queue Overflow".
5036:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Two behaviors are possible when all contexts have been processed:
5037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the contexts queue can maintain the last context active perpetually
5038:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or can be empty and injected group triggers are disabled.
5039:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Triggers can be only external (not internal SW start)
5040:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Caution: The sequence must be fully configured in one time
5041:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (one write of register JSQR makes a check-in of a new context
5042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * into the queue).
5043:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Therefore functions to set separately injected trigger and
5044:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sequencer channels cannot be used, register JSQR must be set
5045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * using function @ref LL_ADC_INJ_ConfigQueueContext().
5046:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This parameter can be modified only when no conversion is on going
5047:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
5048:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note A modification of the context mode (bit JQDIS) causes the contexts
5049:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * queue to be flushed and the register JSQR is cleared.
5050:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
5051:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
5052:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
5053:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
5054:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_SetQueueMode\n
5055:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_SetQueueMode
5056:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param QueueMode This parameter can be one of the following values:
5058:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE
5059:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE
5060:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY
5061:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
5062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5063:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetQueueMode(ADC_TypeDef *ADCx, uint32_t QueueMode)
5064:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS, QueueMode);
5066:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5067:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5068:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5069:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected context queue mode.
5070:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_GetQueueMode\n
5071:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_GetQueueMode
5072:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
5074:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE
5075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE
5076:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY
5077:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5078:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetQueueMode(const ADC_TypeDef *ADCx)
5079:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5080:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS));
ARM GAS /tmp/ccTOAmWG.s page 93
5081:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5082:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5083:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5084:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set one context on ADC group injected that will be checked in
5085:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * contexts queue.
5086:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note A context is a setting of group injected sequencer:
5087:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - group injected trigger
5088:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - sequencer length
5089:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - sequencer ranks
5090:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This function is intended to be used when contexts queue is enabled,
5091:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * because the sequence must be fully configured in one time
5092:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (functions to set separately injected trigger and sequencer channels
5093:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * cannot be used):
5094:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to function @ref LL_ADC_INJ_SetQueueMode().
5095:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In the contexts queue, only the active context can be read.
5096:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * The parameters of this function can be read using functions:
5097:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerSource()
5098:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerEdge()
5099:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetSequencerRanks()
5100:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt,
5101:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be
5102:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * enabled separately.
5103:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
5104:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On STM32H7, some fast channels are available: fast analog inputs
5105:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * coming from GPIO pads (ADC_IN0..5).
5106:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
5107:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
5108:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion
5109:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on either groups regular or injected.
5110:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_ConfigQueueContext\n
5111:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_ConfigQueueContext\n
5112:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JL LL_ADC_INJ_ConfigQueueContext\n
5113:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ1 LL_ADC_INJ_ConfigQueueContext\n
5114:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_ConfigQueueContext\n
5115:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_ConfigQueueContext\n
5116:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_ConfigQueueContext
5117:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5118:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values:
5119:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE
5120:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO
5121:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4
5122:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO
5123:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1
5124:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4
5125:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO
5126:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15
5127:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4
5128:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2
5129:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO
5130:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2
5131:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3
5132:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO
5133:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1
5134:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO
5135:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO
5136:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2
5137:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4
ARM GAS /tmp/ccTOAmWG.s page 94
5138:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM1_OUT
5139:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM2_OUT
5140:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM3_OUT
5141:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values:
5142:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING
5143:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING
5144:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING
5145:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5146:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Note: This parameter is discarded in case of SW start:
5147:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * parameter "TriggerSource" set to "LL_ADC_INJ_TRIG_SOFTWARE".
5148:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values:
5149:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE
5150:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS
5151:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS
5152:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS
5153:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Rank1_Channel This parameter can be one of the following values:
5154:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
5155:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
5156:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
5157:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
5158:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
5159:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
5160:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
5161:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
5162:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
5163:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
5164:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
5165:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
5166:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
5167:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
5168:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
5169:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
5170:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
5171:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
5172:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
5173:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
5174:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
5175:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
5176:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
5177:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
5178:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
5179:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5180:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
5181:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
5182:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
5183:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
5184:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Rank2_Channel This parameter can be one of the following values:
5185:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
5186:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
5187:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
5188:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
5189:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
5190:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
5191:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
5192:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
5193:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
5194:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
ARM GAS /tmp/ccTOAmWG.s page 95
5195:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
5196:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
5197:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
5198:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
5199:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
5200:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
5201:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
5202:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
5203:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
5204:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
5205:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
5206:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
5207:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
5208:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
5209:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
5210:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5211:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
5212:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
5213:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
5214:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
5215:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Rank3_Channel This parameter can be one of the following values:
5216:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
5217:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
5218:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
5219:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
5220:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
5221:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
5222:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
5223:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
5224:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
5225:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
5226:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
5227:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
5228:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
5229:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
5230:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
5231:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
5232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
5233:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
5234:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
5235:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
5236:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
5237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
5238:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
5239:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
5240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
5241:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5242:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
5243:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
5244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
5245:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
5246:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Rank4_Channel This parameter can be one of the following values:
5247:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
5248:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
5249:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
5250:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
5251:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
ARM GAS /tmp/ccTOAmWG.s page 96
5252:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
5253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
5254:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
5255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
5256:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
5257:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
5258:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
5259:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
5260:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
5261:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
5262:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
5263:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
5264:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
5265:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
5266:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
5267:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
5268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
5269:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
5270:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
5271:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
5272:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5273:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
5274:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
5275:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
5276:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
5277:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
5278:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5279:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_ConfigQueueContext(ADC_TypeDef *ADCx,
5280:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t TriggerSource,
5281:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t ExternalTriggerEdge,
5282:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t SequencerNbRanks,
5283:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t Rank1_Channel,
5284:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t Rank2_Channel,
5285:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t Rank3_Channel,
5286:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t Rank4_Channel)
5287:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5288:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "Rankx_Channel" with bits position */
5289:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* in register depending on literal "LL_ADC_INJ_RANK_x". */
5290:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */
5291:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* because containing other bits reserved for other purpose. */
5292:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* If parameter "TriggerSource" is set to SW start, then parameter */
5293:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* "ExternalTriggerEdge" is discarded. */
5294:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t is_trigger_not_sw = (uint32_t)((TriggerSource != LL_ADC_INJ_TRIG_SOFTWARE) ? 1UL : 0UL);
5295:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR,
5296:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_JSQR_JEXTSEL |
5297:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_JSQR_JEXTEN |
5298:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_JSQR_JSQ4 |
5299:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_JSQR_JSQ3 |
5300:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_JSQR_JSQ2 |
5301:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_JSQR_JSQ1 |
5302:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_JSQR_JL,
5303:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (TriggerSource & ADC_JSQR_JEXTSEL) |
5304:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ExternalTriggerEdge * (is_trigger_not_sw)) |
5305:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((Rank4_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS)
5306:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((Rank3_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS)
5307:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((Rank2_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS)
5308:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (((Rank1_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS)
ARM GAS /tmp/ccTOAmWG.s page 97
5309:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** SequencerNbRanks
5310:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
5311:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5312:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5313:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5314:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
5315:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5316:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5317:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_Channels Configuration of ADC hierarchical scope: channels
5318:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
5319:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5320:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5321:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5322:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set sampling time of the selected ADC channel
5323:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Unit: ADC clock cycles.
5324:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently
5325:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of channel mapped on ADC group regular or injected.
5326:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of internal channel (VrefInt, TempSensor, ...) to be
5327:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * converted:
5328:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * sampling time constraints must be respected (sampling time can be
5329:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * adjusted in function of ADC clock frequency and sampling time
5330:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * setting).
5331:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet for timings values (parameters TS_vrefint,
5332:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TS_temp, ...).
5333:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time.
5334:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * On this STM32 series, ADC processing time is:
5335:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits
5336:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits
5337:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits
5338:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits
5339:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of ADC conversion of internal channel (VrefInt,
5340:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temperature sensor, ...), a sampling time minimum value
5341:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is required.
5342:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet.
5343:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
5344:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
5345:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
5346:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
5347:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_SetChannelSamplingTime\n
5348:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_SetChannelSamplingTime\n
5349:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_SetChannelSamplingTime\n
5350:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_SetChannelSamplingTime\n
5351:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_SetChannelSamplingTime\n
5352:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_SetChannelSamplingTime\n
5353:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_SetChannelSamplingTime\n
5354:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_SetChannelSamplingTime\n
5355:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_SetChannelSamplingTime\n
5356:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_SetChannelSamplingTime\n
5357:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_SetChannelSamplingTime\n
5358:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_SetChannelSamplingTime\n
5359:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_SetChannelSamplingTime\n
5360:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_SetChannelSamplingTime\n
5361:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_SetChannelSamplingTime\n
5362:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_SetChannelSamplingTime\n
5363:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_SetChannelSamplingTime\n
5364:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_SetChannelSamplingTime\n
5365:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_SetChannelSamplingTime
ARM GAS /tmp/ccTOAmWG.s page 98
5366:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5367:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be one of the following values:
5368:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
5369:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
5370:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
5371:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
5372:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
5373:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
5374:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
5375:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
5376:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
5377:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
5378:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
5379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
5380:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
5381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
5382:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
5383:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
5384:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
5385:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
5386:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
5387:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
5388:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
5389:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
5390:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
5391:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
5392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
5393:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5394:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
5395:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
5396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
5397:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
5398:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SamplingTime This parameter can be one of the following values:
5399:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
5400:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5
5401:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_8CYCLES_5
5402:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_16CYCLES_5
5403:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_32CYCLES_5
5404:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_64CYCLES_5
5405:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_387CYCLES_5
5406:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_810CYCLES_5
5407:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
5408:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5409:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sa
5410:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
170 .loc 2 5410 1 is_stmt 1 view -0
171 .cfi_startproc
172 @ args = 0, pretend = 0, frame = 0
173 @ frame_needed = 0, uses_anonymous_args = 0
174 @ link register save eliminated.
175 .loc 2 5410 1 is_stmt 0 view .LVU34
176 0000 10B4 push {r4}
177 .cfi_def_cfa_offset 4
178 .cfi_offset 4, -4
5411:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "SamplingTime" with bits position */
5412:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* in register and register position depending on parameter "Channel". */
5413:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameter "Channel" is used with masks because containing */
ARM GAS /tmp/ccTOAmWG.s page 99
5414:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* other bits reserved for other purpose. */
5415:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_M
179 .loc 2 5415 3 is_stmt 1 view .LVU35
180 .loc 2 5415 25 is_stmt 0 view .LVU36
181 0002 1430 adds r0, r0, #20
182 .LVL12:
183 .loc 2 5415 25 view .LVU37
184 0004 4B0E lsrs r3, r1, #25
185 0006 9B00 lsls r3, r3, #2
186 0008 03F00403 and r3, r3, #4
187 .LVL13:
5416:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5417:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
188 .loc 2 5417 3 is_stmt 1 view .LVU38
189 000c C458 ldr r4, [r0, r3]
190 000e C1F30451 ubfx r1, r1, #20, #5
191 .LVL14:
192 .loc 2 5417 3 is_stmt 0 view .LVU39
193 0012 4FF0070C mov ip, #7
194 0016 0CFA01FC lsl ip, ip, r1
195 001a 24EA0C0C bic ip, r4, ip
196 001e 8A40 lsls r2, r2, r1
197 .LVL15:
198 .loc 2 5417 3 view .LVU40
199 0020 4CEA0202 orr r2, ip, r2
200 0024 C250 str r2, [r0, r3]
5418:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT
5419:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT
5420:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
201 .loc 2 5420 1 view .LVU41
202 0026 5DF8044B ldr r4, [sp], #4
203 .cfi_restore 4
204 .cfi_def_cfa_offset 0
205 002a 7047 bx lr
206 .cfi_endproc
207 .LFE201:
209 .section .text.LL_ADC_SetChannelPreselection,"ax",%progbits
210 .align 1
211 .syntax unified
212 .thumb
213 .thumb_func
215 LL_ADC_SetChannelPreselection:
216 .LVL16:
217 .LFB159:
3244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
218 .loc 2 3244 1 is_stmt 1 view -0
219 .cfi_startproc
220 @ args = 0, pretend = 0, frame = 0
221 @ frame_needed = 0, uses_anonymous_args = 0
222 @ link register save eliminated.
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
223 .loc 2 3253 5 view .LVU43
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
224 .loc 2 3253 29 is_stmt 0 view .LVU44
225 0000 C1F31303 ubfx r3, r1, #0, #20
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
226 .loc 2 3253 25 view .LVU45
ARM GAS /tmp/ccTOAmWG.s page 100
227 0004 3BB9 cbnz r3, .L17
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
228 .loc 2 3253 29 discriminator 1 view .LVU46
229 0006 C1F38461 ubfx r1, r1, #26, #5
230 .LVL17:
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
231 .loc 2 3253 25 discriminator 1 view .LVU47
232 000a 0122 movs r2, #1
233 000c 8A40 lsls r2, r2, r1
234 .L18:
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
235 .loc 2 3253 9 discriminator 4 view .LVU48
236 000e C369 ldr r3, [r0, #28]
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
237 .loc 2 3253 17 discriminator 4 view .LVU49
238 0010 1343 orrs r3, r3, r2
239 0012 C361 str r3, [r0, #28]
3255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
240 .loc 2 3255 1 view .LVU50
241 0014 7047 bx lr
242 .LVL18:
243 .L17:
244 .LBB255:
245 .LBI255:
246 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
ARM GAS /tmp/ccTOAmWG.s page 101
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
ARM GAS /tmp/ccTOAmWG.s page 102
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER
117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
119:Drivers/CMSIS/Include/cmsis_gcc.h ****
120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */
121:Drivers/CMSIS/Include/cmsis_gcc.h ****
122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss
127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly
128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script.
129:Drivers/CMSIS/Include/cmsis_gcc.h ****
130:Drivers/CMSIS/Include/cmsis_gcc.h **** */
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN;
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src;
137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t;
140:Drivers/CMSIS/Include/cmsis_gcc.h ****
141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t;
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__;
ARM GAS /tmp/ccTOAmWG.s page 103
147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__;
148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__;
149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__;
150:Drivers/CMSIS/Include/cmsis_gcc.h ****
151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i];
154:Drivers/CMSIS/Include/cmsis_gcc.h **** }
155:Drivers/CMSIS/Include/cmsis_gcc.h **** }
156:Drivers/CMSIS/Include/cmsis_gcc.h ****
157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u;
160:Drivers/CMSIS/Include/cmsis_gcc.h **** }
161:Drivers/CMSIS/Include/cmsis_gcc.h **** }
162:Drivers/CMSIS/Include/cmsis_gcc.h ****
163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start();
164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
165:Drivers/CMSIS/Include/cmsis_gcc.h ****
166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start
167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
168:Drivers/CMSIS/Include/cmsis_gcc.h ****
169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop
171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
172:Drivers/CMSIS/Include/cmsis_gcc.h ****
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit
175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
176:Drivers/CMSIS/Include/cmsis_gcc.h ****
177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors
179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
180:Drivers/CMSIS/Include/cmsis_gcc.h ****
181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
184:Drivers/CMSIS/Include/cmsis_gcc.h ****
185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
189:Drivers/CMSIS/Include/cmsis_gcc.h **** */
190:Drivers/CMSIS/Include/cmsis_gcc.h ****
191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
195:Drivers/CMSIS/Include/cmsis_gcc.h **** */
196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
200:Drivers/CMSIS/Include/cmsis_gcc.h ****
201:Drivers/CMSIS/Include/cmsis_gcc.h ****
202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
ARM GAS /tmp/ccTOAmWG.s page 104
204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
206:Drivers/CMSIS/Include/cmsis_gcc.h **** */
207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
210:Drivers/CMSIS/Include/cmsis_gcc.h **** }
211:Drivers/CMSIS/Include/cmsis_gcc.h ****
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
213:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
217:Drivers/CMSIS/Include/cmsis_gcc.h **** */
218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
219:Drivers/CMSIS/Include/cmsis_gcc.h **** {
220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
221:Drivers/CMSIS/Include/cmsis_gcc.h ****
222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
224:Drivers/CMSIS/Include/cmsis_gcc.h **** }
225:Drivers/CMSIS/Include/cmsis_gcc.h ****
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
242:Drivers/CMSIS/Include/cmsis_gcc.h ****
243:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
247:Drivers/CMSIS/Include/cmsis_gcc.h **** */
248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
249:Drivers/CMSIS/Include/cmsis_gcc.h **** {
250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
251:Drivers/CMSIS/Include/cmsis_gcc.h **** }
252:Drivers/CMSIS/Include/cmsis_gcc.h ****
253:Drivers/CMSIS/Include/cmsis_gcc.h ****
254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
255:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
259:Drivers/CMSIS/Include/cmsis_gcc.h **** */
260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
ARM GAS /tmp/ccTOAmWG.s page 105
261:Drivers/CMSIS/Include/cmsis_gcc.h **** {
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
263:Drivers/CMSIS/Include/cmsis_gcc.h **** }
264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
266:Drivers/CMSIS/Include/cmsis_gcc.h ****
267:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
271:Drivers/CMSIS/Include/cmsis_gcc.h **** */
272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
273:Drivers/CMSIS/Include/cmsis_gcc.h **** {
274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
275:Drivers/CMSIS/Include/cmsis_gcc.h ****
276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
278:Drivers/CMSIS/Include/cmsis_gcc.h **** }
279:Drivers/CMSIS/Include/cmsis_gcc.h ****
280:Drivers/CMSIS/Include/cmsis_gcc.h ****
281:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
285:Drivers/CMSIS/Include/cmsis_gcc.h **** */
286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
287:Drivers/CMSIS/Include/cmsis_gcc.h **** {
288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
289:Drivers/CMSIS/Include/cmsis_gcc.h ****
290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
293:Drivers/CMSIS/Include/cmsis_gcc.h ****
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
295:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
299:Drivers/CMSIS/Include/cmsis_gcc.h **** */
300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
301:Drivers/CMSIS/Include/cmsis_gcc.h **** {
302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
303:Drivers/CMSIS/Include/cmsis_gcc.h ****
304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
306:Drivers/CMSIS/Include/cmsis_gcc.h **** }
307:Drivers/CMSIS/Include/cmsis_gcc.h ****
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
309:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
313:Drivers/CMSIS/Include/cmsis_gcc.h **** */
314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
315:Drivers/CMSIS/Include/cmsis_gcc.h **** {
316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
317:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccTOAmWG.s page 106
318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
320:Drivers/CMSIS/Include/cmsis_gcc.h **** }
321:Drivers/CMSIS/Include/cmsis_gcc.h ****
322:Drivers/CMSIS/Include/cmsis_gcc.h ****
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
324:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
328:Drivers/CMSIS/Include/cmsis_gcc.h **** */
329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
330:Drivers/CMSIS/Include/cmsis_gcc.h **** {
331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
332:Drivers/CMSIS/Include/cmsis_gcc.h ****
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
335:Drivers/CMSIS/Include/cmsis_gcc.h **** }
336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
337:Drivers/CMSIS/Include/cmsis_gcc.h ****
338:Drivers/CMSIS/Include/cmsis_gcc.h ****
339:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
343:Drivers/CMSIS/Include/cmsis_gcc.h **** */
344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
345:Drivers/CMSIS/Include/cmsis_gcc.h **** {
346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
347:Drivers/CMSIS/Include/cmsis_gcc.h **** }
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
359:Drivers/CMSIS/Include/cmsis_gcc.h **** }
360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
361:Drivers/CMSIS/Include/cmsis_gcc.h ****
362:Drivers/CMSIS/Include/cmsis_gcc.h ****
363:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
367:Drivers/CMSIS/Include/cmsis_gcc.h **** */
368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
369:Drivers/CMSIS/Include/cmsis_gcc.h **** {
370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
371:Drivers/CMSIS/Include/cmsis_gcc.h ****
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
374:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 107
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
378:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
382:Drivers/CMSIS/Include/cmsis_gcc.h **** */
383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
384:Drivers/CMSIS/Include/cmsis_gcc.h **** {
385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
386:Drivers/CMSIS/Include/cmsis_gcc.h ****
387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
389:Drivers/CMSIS/Include/cmsis_gcc.h **** }
390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
391:Drivers/CMSIS/Include/cmsis_gcc.h ****
392:Drivers/CMSIS/Include/cmsis_gcc.h ****
393:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
397:Drivers/CMSIS/Include/cmsis_gcc.h **** */
398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
399:Drivers/CMSIS/Include/cmsis_gcc.h **** {
400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
401:Drivers/CMSIS/Include/cmsis_gcc.h **** }
402:Drivers/CMSIS/Include/cmsis_gcc.h ****
403:Drivers/CMSIS/Include/cmsis_gcc.h ****
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
405:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
409:Drivers/CMSIS/Include/cmsis_gcc.h **** */
410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
411:Drivers/CMSIS/Include/cmsis_gcc.h **** {
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
413:Drivers/CMSIS/Include/cmsis_gcc.h **** }
414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
415:Drivers/CMSIS/Include/cmsis_gcc.h ****
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
418:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
422:Drivers/CMSIS/Include/cmsis_gcc.h **** */
423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
424:Drivers/CMSIS/Include/cmsis_gcc.h **** {
425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
426:Drivers/CMSIS/Include/cmsis_gcc.h ****
427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
429:Drivers/CMSIS/Include/cmsis_gcc.h **** }
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
431:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccTOAmWG.s page 108
432:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
436:Drivers/CMSIS/Include/cmsis_gcc.h **** */
437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
438:Drivers/CMSIS/Include/cmsis_gcc.h **** {
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
440:Drivers/CMSIS/Include/cmsis_gcc.h **** }
441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
442:Drivers/CMSIS/Include/cmsis_gcc.h ****
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
444:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
448:Drivers/CMSIS/Include/cmsis_gcc.h **** */
449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
450:Drivers/CMSIS/Include/cmsis_gcc.h **** {
451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
452:Drivers/CMSIS/Include/cmsis_gcc.h ****
453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
455:Drivers/CMSIS/Include/cmsis_gcc.h **** }
456:Drivers/CMSIS/Include/cmsis_gcc.h ****
457:Drivers/CMSIS/Include/cmsis_gcc.h ****
458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
459:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
463:Drivers/CMSIS/Include/cmsis_gcc.h **** */
464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
465:Drivers/CMSIS/Include/cmsis_gcc.h **** {
466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
467:Drivers/CMSIS/Include/cmsis_gcc.h ****
468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
470:Drivers/CMSIS/Include/cmsis_gcc.h **** }
471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
472:Drivers/CMSIS/Include/cmsis_gcc.h ****
473:Drivers/CMSIS/Include/cmsis_gcc.h ****
474:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
478:Drivers/CMSIS/Include/cmsis_gcc.h **** */
479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
480:Drivers/CMSIS/Include/cmsis_gcc.h **** {
481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
483:Drivers/CMSIS/Include/cmsis_gcc.h ****
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
ARM GAS /tmp/ccTOAmWG.s page 109
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
497:Drivers/CMSIS/Include/cmsis_gcc.h ****
498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
501:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
505:Drivers/CMSIS/Include/cmsis_gcc.h **** */
506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
507:Drivers/CMSIS/Include/cmsis_gcc.h **** {
508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
509:Drivers/CMSIS/Include/cmsis_gcc.h **** }
510:Drivers/CMSIS/Include/cmsis_gcc.h ****
511:Drivers/CMSIS/Include/cmsis_gcc.h ****
512:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
516:Drivers/CMSIS/Include/cmsis_gcc.h **** */
517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
518:Drivers/CMSIS/Include/cmsis_gcc.h **** {
519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
520:Drivers/CMSIS/Include/cmsis_gcc.h **** }
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
522:Drivers/CMSIS/Include/cmsis_gcc.h ****
523:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
527:Drivers/CMSIS/Include/cmsis_gcc.h **** */
528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
529:Drivers/CMSIS/Include/cmsis_gcc.h **** {
530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
531:Drivers/CMSIS/Include/cmsis_gcc.h ****
532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
534:Drivers/CMSIS/Include/cmsis_gcc.h **** }
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
536:Drivers/CMSIS/Include/cmsis_gcc.h ****
537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
538:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
542:Drivers/CMSIS/Include/cmsis_gcc.h **** */
543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
544:Drivers/CMSIS/Include/cmsis_gcc.h **** {
545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
ARM GAS /tmp/ccTOAmWG.s page 110
546:Drivers/CMSIS/Include/cmsis_gcc.h ****
547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
549:Drivers/CMSIS/Include/cmsis_gcc.h **** }
550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
552:Drivers/CMSIS/Include/cmsis_gcc.h ****
553:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
557:Drivers/CMSIS/Include/cmsis_gcc.h **** */
558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
559:Drivers/CMSIS/Include/cmsis_gcc.h **** {
560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
561:Drivers/CMSIS/Include/cmsis_gcc.h **** }
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
563:Drivers/CMSIS/Include/cmsis_gcc.h ****
564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
565:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
569:Drivers/CMSIS/Include/cmsis_gcc.h **** */
570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
571:Drivers/CMSIS/Include/cmsis_gcc.h **** {
572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
573:Drivers/CMSIS/Include/cmsis_gcc.h **** }
574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
575:Drivers/CMSIS/Include/cmsis_gcc.h ****
576:Drivers/CMSIS/Include/cmsis_gcc.h ****
577:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
582:Drivers/CMSIS/Include/cmsis_gcc.h **** */
583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
584:Drivers/CMSIS/Include/cmsis_gcc.h **** {
585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
586:Drivers/CMSIS/Include/cmsis_gcc.h **** }
587:Drivers/CMSIS/Include/cmsis_gcc.h ****
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
589:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
593:Drivers/CMSIS/Include/cmsis_gcc.h **** */
594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
595:Drivers/CMSIS/Include/cmsis_gcc.h **** {
596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
597:Drivers/CMSIS/Include/cmsis_gcc.h ****
598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
600:Drivers/CMSIS/Include/cmsis_gcc.h **** }
601:Drivers/CMSIS/Include/cmsis_gcc.h ****
602:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccTOAmWG.s page 111
603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
604:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
608:Drivers/CMSIS/Include/cmsis_gcc.h **** */
609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
610:Drivers/CMSIS/Include/cmsis_gcc.h **** {
611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
612:Drivers/CMSIS/Include/cmsis_gcc.h ****
613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
615:Drivers/CMSIS/Include/cmsis_gcc.h **** }
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
617:Drivers/CMSIS/Include/cmsis_gcc.h ****
618:Drivers/CMSIS/Include/cmsis_gcc.h ****
619:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
623:Drivers/CMSIS/Include/cmsis_gcc.h **** */
624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
625:Drivers/CMSIS/Include/cmsis_gcc.h **** {
626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
627:Drivers/CMSIS/Include/cmsis_gcc.h **** }
628:Drivers/CMSIS/Include/cmsis_gcc.h ****
629:Drivers/CMSIS/Include/cmsis_gcc.h ****
630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
631:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
635:Drivers/CMSIS/Include/cmsis_gcc.h **** */
636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
637:Drivers/CMSIS/Include/cmsis_gcc.h **** {
638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
639:Drivers/CMSIS/Include/cmsis_gcc.h **** }
640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
641:Drivers/CMSIS/Include/cmsis_gcc.h ****
642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
645:Drivers/CMSIS/Include/cmsis_gcc.h ****
646:Drivers/CMSIS/Include/cmsis_gcc.h ****
647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
649:Drivers/CMSIS/Include/cmsis_gcc.h ****
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
655:Drivers/CMSIS/Include/cmsis_gcc.h ****
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
658:Drivers/CMSIS/Include/cmsis_gcc.h **** */
659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
ARM GAS /tmp/ccTOAmWG.s page 112
660:Drivers/CMSIS/Include/cmsis_gcc.h **** {
661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
670:Drivers/CMSIS/Include/cmsis_gcc.h **** }
671:Drivers/CMSIS/Include/cmsis_gcc.h ****
672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
673:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
677:Drivers/CMSIS/Include/cmsis_gcc.h ****
678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
680:Drivers/CMSIS/Include/cmsis_gcc.h **** */
681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
682:Drivers/CMSIS/Include/cmsis_gcc.h **** {
683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
691:Drivers/CMSIS/Include/cmsis_gcc.h **** }
692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
693:Drivers/CMSIS/Include/cmsis_gcc.h ****
694:Drivers/CMSIS/Include/cmsis_gcc.h ****
695:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
700:Drivers/CMSIS/Include/cmsis_gcc.h ****
701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
703:Drivers/CMSIS/Include/cmsis_gcc.h **** */
704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
705:Drivers/CMSIS/Include/cmsis_gcc.h **** {
706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
713:Drivers/CMSIS/Include/cmsis_gcc.h **** }
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
ARM GAS /tmp/ccTOAmWG.s page 113
717:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
733:Drivers/CMSIS/Include/cmsis_gcc.h **** }
734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
737:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
757:Drivers/CMSIS/Include/cmsis_gcc.h **** }
758:Drivers/CMSIS/Include/cmsis_gcc.h ****
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
765:Drivers/CMSIS/Include/cmsis_gcc.h ****
766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
768:Drivers/CMSIS/Include/cmsis_gcc.h **** */
769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
770:Drivers/CMSIS/Include/cmsis_gcc.h **** {
771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
ARM GAS /tmp/ccTOAmWG.s page 114
774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
779:Drivers/CMSIS/Include/cmsis_gcc.h **** }
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
781:Drivers/CMSIS/Include/cmsis_gcc.h ****
782:Drivers/CMSIS/Include/cmsis_gcc.h ****
783:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
788:Drivers/CMSIS/Include/cmsis_gcc.h ****
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
801:Drivers/CMSIS/Include/cmsis_gcc.h **** }
802:Drivers/CMSIS/Include/cmsis_gcc.h ****
803:Drivers/CMSIS/Include/cmsis_gcc.h ****
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
805:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
812:Drivers/CMSIS/Include/cmsis_gcc.h **** */
813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
814:Drivers/CMSIS/Include/cmsis_gcc.h **** {
815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
821:Drivers/CMSIS/Include/cmsis_gcc.h **** }
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
823:Drivers/CMSIS/Include/cmsis_gcc.h ****
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
826:Drivers/CMSIS/Include/cmsis_gcc.h ****
827:Drivers/CMSIS/Include/cmsis_gcc.h ****
828:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
ARM GAS /tmp/ccTOAmWG.s page 115
831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
832:Drivers/CMSIS/Include/cmsis_gcc.h **** */
833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
834:Drivers/CMSIS/Include/cmsis_gcc.h **** {
835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
851:Drivers/CMSIS/Include/cmsis_gcc.h **** }
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
853:Drivers/CMSIS/Include/cmsis_gcc.h ****
854:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
858:Drivers/CMSIS/Include/cmsis_gcc.h **** */
859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
860:Drivers/CMSIS/Include/cmsis_gcc.h **** {
861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
874:Drivers/CMSIS/Include/cmsis_gcc.h **** }
875:Drivers/CMSIS/Include/cmsis_gcc.h ****
876:Drivers/CMSIS/Include/cmsis_gcc.h ****
877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
878:Drivers/CMSIS/Include/cmsis_gcc.h ****
879:Drivers/CMSIS/Include/cmsis_gcc.h ****
880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
884:Drivers/CMSIS/Include/cmsis_gcc.h **** */
885:Drivers/CMSIS/Include/cmsis_gcc.h ****
886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
ARM GAS /tmp/ccTOAmWG.s page 116
888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
898:Drivers/CMSIS/Include/cmsis_gcc.h ****
899:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
902:Drivers/CMSIS/Include/cmsis_gcc.h **** */
903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
904:Drivers/CMSIS/Include/cmsis_gcc.h ****
905:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
908:Drivers/CMSIS/Include/cmsis_gcc.h **** */
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
910:Drivers/CMSIS/Include/cmsis_gcc.h ****
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
912:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
916:Drivers/CMSIS/Include/cmsis_gcc.h **** */
917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
918:Drivers/CMSIS/Include/cmsis_gcc.h ****
919:Drivers/CMSIS/Include/cmsis_gcc.h ****
920:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
923:Drivers/CMSIS/Include/cmsis_gcc.h **** */
924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
925:Drivers/CMSIS/Include/cmsis_gcc.h ****
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
927:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
932:Drivers/CMSIS/Include/cmsis_gcc.h **** */
933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
934:Drivers/CMSIS/Include/cmsis_gcc.h **** {
935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
936:Drivers/CMSIS/Include/cmsis_gcc.h **** }
937:Drivers/CMSIS/Include/cmsis_gcc.h ****
938:Drivers/CMSIS/Include/cmsis_gcc.h ****
939:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
943:Drivers/CMSIS/Include/cmsis_gcc.h **** */
944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
ARM GAS /tmp/ccTOAmWG.s page 117
945:Drivers/CMSIS/Include/cmsis_gcc.h **** {
946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
947:Drivers/CMSIS/Include/cmsis_gcc.h **** }
948:Drivers/CMSIS/Include/cmsis_gcc.h ****
949:Drivers/CMSIS/Include/cmsis_gcc.h ****
950:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
954:Drivers/CMSIS/Include/cmsis_gcc.h **** */
955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
956:Drivers/CMSIS/Include/cmsis_gcc.h **** {
957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
958:Drivers/CMSIS/Include/cmsis_gcc.h **** }
959:Drivers/CMSIS/Include/cmsis_gcc.h ****
960:Drivers/CMSIS/Include/cmsis_gcc.h ****
961:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
966:Drivers/CMSIS/Include/cmsis_gcc.h **** */
967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
968:Drivers/CMSIS/Include/cmsis_gcc.h **** {
969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
977:Drivers/CMSIS/Include/cmsis_gcc.h **** }
978:Drivers/CMSIS/Include/cmsis_gcc.h ****
979:Drivers/CMSIS/Include/cmsis_gcc.h ****
980:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
985:Drivers/CMSIS/Include/cmsis_gcc.h **** */
986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
987:Drivers/CMSIS/Include/cmsis_gcc.h **** {
988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
989:Drivers/CMSIS/Include/cmsis_gcc.h ****
990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
992:Drivers/CMSIS/Include/cmsis_gcc.h **** }
993:Drivers/CMSIS/Include/cmsis_gcc.h ****
994:Drivers/CMSIS/Include/cmsis_gcc.h ****
995:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
ARM GAS /tmp/ccTOAmWG.s page 118
1002:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
1007:Drivers/CMSIS/Include/cmsis_gcc.h ****
1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1011:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1012:Drivers/CMSIS/Include/cmsis_gcc.h ****
1013:Drivers/CMSIS/Include/cmsis_gcc.h ****
1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
1022:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
1025:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
1027:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
1029:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1030:Drivers/CMSIS/Include/cmsis_gcc.h ****
1031:Drivers/CMSIS/Include/cmsis_gcc.h ****
1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
1040:Drivers/CMSIS/Include/cmsis_gcc.h ****
1041:Drivers/CMSIS/Include/cmsis_gcc.h ****
1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
247 .loc 3 1048 31 is_stmt 1 view .LVU51
248 .LBB256:
1049:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
249 .loc 3 1050 3 view .LVU52
1051:Drivers/CMSIS/Include/cmsis_gcc.h ****
1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
ARM GAS /tmp/ccTOAmWG.s page 119
250 .loc 3 1055 4 view .LVU53
251 .syntax unified
252 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
253 0016 91FAA1F1 rbit r1, r1
254 @ 0 "" 2
255 .LVL19:
1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
1058:Drivers/CMSIS/Include/cmsis_gcc.h ****
1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
1061:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
1065:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
256 .loc 3 1068 3 view .LVU54
257 .loc 3 1068 3 is_stmt 0 view .LVU55
258 .thumb
259 .syntax unified
260 .LBE256:
261 .LBE255:
262 .LBB257:
263 .LBI257:
1069:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
1071:Drivers/CMSIS/Include/cmsis_gcc.h ****
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros
1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value.
1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros
1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value
1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
264 .loc 3 1078 30 is_stmt 1 view .LVU56
265 .LBB258:
1079:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially.
1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM
1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any
1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it
1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero".
1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction.
1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U)
266 .loc 3 1089 3 view .LVU57
267 .loc 3 1089 6 is_stmt 0 view .LVU58
268 001a 31B1 cbz r1, .L20
1090:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U;
1092:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value);
ARM GAS /tmp/ccTOAmWG.s page 120
269 .loc 3 1093 3 is_stmt 1 view .LVU59
270 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU60
271 001c B1FA81F1 clz r1, r1
272 .LVL20:
273 .L19:
274 .loc 3 1093 10 discriminator 1 view .LVU61
275 .LBE258:
276 .LBE257:
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
277 .loc 2 3253 69 discriminator 2 view .LVU62
278 0020 01F01F01 and r1, r1, #31
3253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
279 .loc 2 3253 25 discriminator 2 view .LVU63
280 0024 0122 movs r2, #1
281 0026 8A40 lsls r2, r2, r1
282 0028 F1E7 b .L18
283 .LVL21:
284 .L20:
285 .LBB260:
286 .LBB259:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
287 .loc 3 1091 12 view .LVU64
288 002a 2021 movs r1, #32
289 .LVL22:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
290 .loc 3 1091 12 view .LVU65
291 002c F8E7 b .L19
292 .LBE259:
293 .LBE260:
294 .cfi_endproc
295 .LFE159:
297 .section .text.HAL_ADCEx_Calibration_Start,"ax",%progbits
298 .align 1
299 .global HAL_ADCEx_Calibration_Start
300 .syntax unified
301 .thumb
302 .thumb_func
304 HAL_ADCEx_Calibration_Start:
305 .LVL23:
306 .LFB335:
1:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
2:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ******************************************************************************
3:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @file stm32h7xx_hal_adc_ex.c
4:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @author MCD Application Team
5:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief This file provides firmware functions to manage the following
6:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * functionalities of the Analog to Digital Converter (ADC)
7:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * peripheral:
8:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * + Peripheral Control functions
9:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Other functions (generic functions) are available in file
10:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * "stm32h7xx_hal_adc.c".
11:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** *
12:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ******************************************************************************
13:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @attention
14:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** *
15:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Copyright (c) 2017 STMicroelectronics.
16:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * All rights reserved.
17:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** *
ARM GAS /tmp/ccTOAmWG.s page 121
18:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file
19:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * in the root directory of this software component.
20:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
21:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** *
22:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ******************************************************************************
23:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** @verbatim
24:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** [..]
25:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (@) Sections "ADC peripheral features" and "How to use this driver" are
26:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** available in file of generic functions "stm32h7xx_hal_adc.c".
27:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** [..]
28:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** @endverbatim
29:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ******************************************************************************
30:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
31:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
32:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/
33:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #include "stm32h7xx_hal.h"
34:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
35:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /** @addtogroup STM32H7xx_HAL_Driver
36:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @{
37:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
38:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
39:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /** @defgroup ADCEx ADCEx
40:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief ADC Extended HAL module driver
41:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @{
42:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
43:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
44:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #ifdef HAL_ADC_MODULE_ENABLED
45:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
46:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Private typedef -----------------------------------------------------------*/
47:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Private define ------------------------------------------------------------*/
48:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
49:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
50:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @{
51:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
52:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
53:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\
54:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\
55:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters tha
56:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** once the ADC is enabled */
57:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
58:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Fixed timeout value for ADC calibration. */
59:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Fixed timeout value for ADC calibration. */
60:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Values defined to be higher than worst cases: low clock frequency, */
61:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* maximum prescalers. */
62:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Ex of profile low frequency : f_ADC at 0.125 Mhz (minimum value */
63:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* according to Data sheet), calibration_time MAX = 165010 / f_ADC */
64:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 165010 / 125000 = 1.32s */
65:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* At maximum CPU speed (480 MHz), this means */
66:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1.32 * 480 MHz = 633600000 CPU cycles */
67:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #define ADC_CALIBRATION_TIMEOUT (633600000U) /*!< ADC calibration time-out value */
68:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
69:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
70:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
71:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @}
72:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
73:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
74:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Private macro -------------------------------------------------------------*/
ARM GAS /tmp/ccTOAmWG.s page 122
75:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Private variables ---------------------------------------------------------*/
76:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Private function prototypes -----------------------------------------------*/
77:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Exported functions --------------------------------------------------------*/
78:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
79:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
80:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @{
81:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
82:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
83:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
84:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Extended IO operation functions
85:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** *
86:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** @verbatim
87:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ===============================================================================
88:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ##### IO operation functions #####
89:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ===============================================================================
90:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** [..] This section provides functions allowing to:
91:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
92:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Perform the ADC self-calibration for single or differential ending.
93:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Get calibration factors for single or differential ending.
94:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Set calibration factors for single or differential ending.
95:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
96:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Start conversion of ADC group injected.
97:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Stop conversion of ADC group injected.
98:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Poll for conversion complete on ADC group injected.
99:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Get result of ADC group injected channel conversion.
100:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Start conversion of ADC group injected and enable interruptions.
101:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Stop conversion of ADC group injected and disable interruptions.
102:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
103:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) When multimode feature is available, start multimode and enable DMA transfer.
104:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Stop multimode and disable ADC DMA transfer.
105:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Get result of multimode conversion.
106:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
107:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** @endverbatim
108:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @{
109:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
111:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
112:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Perform an ADC automatic self-calibration
113:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Calibration prerequisite: ADC must be disabled (execute this
114:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
115:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
116:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param CalibrationMode Selection of calibration offset or
117:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * linear calibration offset.
118:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg ADC_CALIB_OFFSET Channel in mode calibration offset
119:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg ADC_CALIB_OFFSET_LINEARITY Channel in mode linear calibration offset
120:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param SingleDiff Selection of single-ended or differential input
121:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * This parameter can be one of the following values:
122:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
123:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
124:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
125:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
126:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t CalibrationMode, ui
127:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
307 .loc 1 127 1 is_stmt 1 view -0
308 .cfi_startproc
309 @ args = 0, pretend = 0, frame = 8
310 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/ccTOAmWG.s page 123
311 .loc 1 127 1 is_stmt 0 view .LVU67
312 0000 70B5 push {r4, r5, r6, lr}
313 .cfi_def_cfa_offset 16
314 .cfi_offset 4, -16
315 .cfi_offset 5, -12
316 .cfi_offset 6, -8
317 .cfi_offset 14, -4
318 0002 82B0 sub sp, sp, #8
319 .cfi_def_cfa_offset 24
128:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
320 .loc 1 128 3 is_stmt 1 view .LVU68
129:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0UL;
321 .loc 1 129 3 view .LVU69
322 .loc 1 129 17 is_stmt 0 view .LVU70
323 0004 0023 movs r3, #0
324 0006 0193 str r3, [sp, #4]
130:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
131:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
132:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
325 .loc 1 132 3 is_stmt 1 view .LVU71
133:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
326 .loc 1 133 3 view .LVU72
134:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
135:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
136:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
327 .loc 1 136 3 view .LVU73
328 .loc 1 136 3 view .LVU74
329 0008 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
330 000c 012B cmp r3, #1
331 000e 43D0 beq .L28
332 0010 0446 mov r4, r0
333 0012 0D46 mov r5, r1
334 0014 1646 mov r6, r2
335 .loc 1 136 3 discriminator 2 view .LVU75
336 0016 0123 movs r3, #1
337 0018 80F85030 strb r3, [r0, #80]
338 .loc 1 136 3 view .LVU76
137:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
138:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Calibration prerequisite: ADC must be disabled. */
139:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
140:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable the ADC (if not already disabled) */
141:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc);
339 .loc 1 141 3 view .LVU77
340 .loc 1 141 20 is_stmt 0 view .LVU78
341 001c FFF7FEFF bl ADC_Disable
342 .LVL24:
142:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
143:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */
144:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
343 .loc 1 144 3 is_stmt 1 view .LVU79
344 .loc 1 144 6 is_stmt 0 view .LVU80
345 0020 0028 cmp r0, #0
346 0022 30D1 bne .L23
145:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
146:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
147:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
347 .loc 1 147 5 is_stmt 1 view .LVU81
ARM GAS /tmp/ccTOAmWG.s page 124
348 0024 626D ldr r2, [r4, #84]
349 0026 1D4B ldr r3, .L31
350 0028 1340 ands r3, r3, r2
351 002a 43F00203 orr r3, r3, #2
352 002e 6365 str r3, [r4, #84]
148:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
149:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL);
150:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
151:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Start ADC calibration in mode single-ended or differential */
152:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_StartCalibration(hadc->Instance, CalibrationMode, SingleDiff);
353 .loc 1 152 5 view .LVU82
354 0030 2168 ldr r1, [r4]
355 .LVL25:
356 .LBB261:
357 .LBI261:
5421:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5422:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5423:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get sampling time of the selected ADC channel
5424:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Unit: ADC clock cycles.
5425:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently
5426:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of channel mapped on ADC group regular or injected.
5427:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time.
5428:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * On this STM32 series, ADC processing time is:
5429:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits
5430:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits
5431:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits
5432:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits
5433:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_GetChannelSamplingTime\n
5434:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_GetChannelSamplingTime\n
5435:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_GetChannelSamplingTime\n
5436:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_GetChannelSamplingTime\n
5437:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_GetChannelSamplingTime\n
5438:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_GetChannelSamplingTime\n
5439:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_GetChannelSamplingTime\n
5440:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_GetChannelSamplingTime\n
5441:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_GetChannelSamplingTime\n
5442:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_GetChannelSamplingTime\n
5443:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_GetChannelSamplingTime\n
5444:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_GetChannelSamplingTime\n
5445:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_GetChannelSamplingTime\n
5446:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_GetChannelSamplingTime\n
5447:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_GetChannelSamplingTime\n
5448:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_GetChannelSamplingTime\n
5449:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_GetChannelSamplingTime\n
5450:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_GetChannelSamplingTime\n
5451:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_GetChannelSamplingTime
5452:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5453:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be one of the following values:
5454:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 (3)
5455:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (3)
5456:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (3)
5457:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (3)
5458:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (3)
5459:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (3)
5460:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6
5461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7
5462:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8
ARM GAS /tmp/ccTOAmWG.s page 125
5463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9
5464:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
5465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
5466:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
5467:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
5468:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
5469:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
5470:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
5471:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
5472:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
5473:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
5474:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (1)
5475:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (1)
5476:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (1)
5477:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH1_ADC2 (2)
5478:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_DAC1CH2_ADC2 (2)
5479:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5480:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
5481:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.\n
5482:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to
5483:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Other channels are slow channels (conversion rate: refer to reference manual).
5484:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
5485:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
5486:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5
5487:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_8CYCLES_5
5488:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_16CYCLES_5
5489:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_32CYCLES_5
5490:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_64CYCLES_5
5491:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_387CYCLES_5
5492:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_810CYCLES_5
5493:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5494:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSamplingTime(const ADC_TypeDef *ADCx, uint32_t Channel)
5495:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5496:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOF
5497:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5498:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg,
5499:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_
5500:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_P
5501:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
5502:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5503:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5504:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5505:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set mode single-ended or differential input of the selected
5506:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC channel.
5507:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Channel ending is on channel scope: independently of channel mapped
5508:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on ADC group regular or injected.
5509:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * In differential mode: Differential measurement is carried out
5510:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * between the selected channel 'i' (positive input) and
5511:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * channel 'i+1' (negative input). Only channel 'i' has to be
5512:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * configured, channel 'i+1' is configured automatically.
5513:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is
5514:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * available in differential mode.
5515:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are
5516:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * not available in differential mode.
5517:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode,
5518:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the channel 'i+1' is not usable separately.
5519:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On STM32H7, some channels are internally fixed to single-ended inputs
ARM GAS /tmp/ccTOAmWG.s page 126
5520:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * configuration:
5521:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC1: Channels 0, 6, 7, 8, 9, 13, 14, 15, 17, and 19
5522:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC2: Channels 0, 6, 7, 8, 9, 13, 14, 15 and 19
5523:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC3: Channels 0, 6, 7, 8, 9, 12, 16, 17, and 19
5524:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For ADC channels configured in differential mode, both inputs
5525:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * should be biased at (Vref+)/2 +/-200mV.
5526:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (Vref+ is the analog voltage reference)
5527:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
5528:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
5529:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be ADC disabled.
5530:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note One or several values can be selected.
5531:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
5532:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_SetChannelSingleDiff
5533:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5534:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be one of the following values:
5535:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1
5536:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2
5537:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3
5538:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4
5539:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5
5540:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
5541:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
5542:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
5543:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
5544:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
5545:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
5546:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
5547:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
5548:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
5549:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
5550:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SingleDiff This parameter can be a combination of the following values:
5551:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED
5552:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED
5553:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
5554:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5555:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sing
5556:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5557:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
5558:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Bits of channels in single or differential mode are set only for */
5559:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* differential mode (for single mode, mask of bits allowed to be set is */
5560:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* shifted out of range of bits of channels in single or differential mode. */
5561:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
5562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->LTR2_DIFSEL,
5564:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
5565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SI
5566:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5567:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
5568:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5569:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->DIFSEL_RES12,
5570:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
5571:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SI
5572:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5573:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else /* ADC_VER_V5_V90 */
5574:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Bits of channels in single or differential mode are set only for */
5575:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* differential mode (for single mode, mask of bits allowed to be set is */
5576:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* shifted out of range of bits of channels in single or differential mode. */
ARM GAS /tmp/ccTOAmWG.s page 127
5577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->DIFSEL,
5578:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
5579:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SING
5580:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
5581:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5582:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5583:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5584:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get mode single-ended or differential input of the selected
5585:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC channel.
5586:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode,
5587:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the channel 'i+1' is not usable separately.
5588:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Therefore, to ensure a channel is configured in single-ended mode,
5589:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the configuration of channel itself and the channel 'i-1' must be
5590:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * read back (to ensure that the selected channel channel has not been
5591:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * configured in differential mode by the previous channel).
5592:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is
5593:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * available in differential mode.
5594:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are
5595:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * not available in differential mode.
5596:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode,
5597:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the channel 'i+1' is not usable separately.
5598:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On STM32H7, some channels are internally fixed to single-ended inputs
5599:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * configuration:
5600:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC1: Channels 0, 6, 7, 8, 9, 13, 14, 15, 17, and 19
5601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC2: Channels 0, 6, 7, 8, 9, 13, 14, 15 and 19
5602:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC3: Channels 0, 6, 7, 8, 9, 12, 16, 17, and 19
5603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note One or several values can be selected. In this case, the value
5604:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * returned is null if all channels are in single ended-mode.
5605:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
5606:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_GetChannelSingleDiff
5607:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5608:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Channel This parameter can be a combination of the following values:
5609:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1
5610:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2
5611:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3
5612:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4
5613:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5
5614:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10
5615:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11
5616:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12
5617:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13
5618:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14
5619:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15
5620:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16
5621:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17
5622:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18
5623:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_19
5624:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: channel in single-ended mode, else: channel in differential mode
5625:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5626:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSingleDiff(const ADC_TypeDef *ADCx, uint32_t Channel)
5627:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5628:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
5629:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DIFSEL_RES12, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK)));
5630:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
5631:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DIFSEL, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK)));
5632:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
5633:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 128
5634:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5635:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5636:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
5637:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5638:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5639:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: an
5640:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
5641:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5642:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5643:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5644:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC analog watchdog monitored channels:
5645:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a single channel, multiple channels or all channels,
5646:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on ADC groups regular and-or injected.
5647:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Once monitored channels are selected, analog watchdog
5648:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is enabled.
5649:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of need to define a single channel to monitor
5650:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with analog watchdog from sequencer channel definition,
5651:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
5652:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog
5653:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * instance:
5654:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - AWD standard (instance AWD1):
5655:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels.
5656:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected.
5657:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to
5658:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution configured).
5659:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3):
5660:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is
5661:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * channel wise, from from 1 to all channels.
5662:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can
5663:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * be selected. For example:
5664:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...)
5665:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both
5666:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * groups regular and injected).
5667:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected:
5668:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
5669:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
5670:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is
5671:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
5672:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the 2 LSB are ignored.
5673:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
5674:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
5675:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
5676:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
5677:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_SetAnalogWDMonitChannels\n
5678:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_SetAnalogWDMonitChannels\n
5679:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_SetAnalogWDMonitChannels\n
5680:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_SetAnalogWDMonitChannels\n
5681:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_SetAnalogWDMonitChannels\n
5682:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_SetAnalogWDMonitChannels
5683:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5684:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values:
5685:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1
5686:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2
5687:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3
5688:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDChannelGroup This parameter can be one of the following values:
5689:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE
5690:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
ARM GAS /tmp/ccTOAmWG.s page 129
5691:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
5692:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
5693:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
5694:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
5695:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
5696:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
5697:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
5698:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
5699:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
5700:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
5701:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
5702:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
5703:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
5704:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
5705:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
5706:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
5707:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
5708:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
5709:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
5710:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
5711:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
5712:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
5713:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
5714:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
5715:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
5716:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
5717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
5718:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
5719:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
5720:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
5721:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
5722:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
5723:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
5724:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
5725:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
5726:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
5727:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
5728:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
5729:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
5730:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
5731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
5732:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
5733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
5734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
5735:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
5736:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
5737:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
5738:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
5739:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
5740:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
5741:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
5742:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
5743:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
5744:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
5745:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
5746:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
5747:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
ARM GAS /tmp/ccTOAmWG.s page 130
5748:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
5749:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
5750:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_REG (0)
5751:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_INJ (0)
5752:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_REG_INJ
5753:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0)(1)
5754:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0)(1)
5755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ (1)
5756:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG (0)(1)
5757:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_INJ (0)(1)
5758:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG_INJ (1)
5759:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(1)
5760:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(1)
5761:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (1)
5762:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG (0)(2)
5763:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_INJ (0)(2)
5764:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH1_ADC2_REG_INJ (2)
5765:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG (0)(2)
5766:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_INJ (0)(2)
5767:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_DAC1CH2_ADC2_REG_INJ (2)
5768:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5769:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (0) On STM32H7, parameter available only on analog watchdog number: AWD1.\n
5770:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On STM32H7, parameter available only on ADC instance: ADC3.\n
5771:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) On STM32H7, parameter available only on ADC instance: ADC2.
5772:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
5773:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5774:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD
5775:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5776:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "AWDChannelGroup" with bits position */
5777:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* in register and register position depending on parameter "AWDy". */
5778:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */
5779:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* containing other bits reserved for other purpose. */
5780:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> AD
5781:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) *
5782:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5783:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
5784:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK),
5785:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** AWDChannelGroup & AWDy);
5786:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5787:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5788:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5789:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC analog watchdog monitored channel.
5790:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Usage of the returned channel number:
5791:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx:
5792:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the returned channel number is only partly formatted on definition
5793:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
5794:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using
5795:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
5796:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used
5797:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * as parameter for another function.
5798:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - To get the channel number in decimal format:
5799:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * process the returned value with the helper macro
5800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
5801:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Applicable only when the analog watchdog is set to monitor
5802:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * one channel.
5803:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog
5804:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * instance:
ARM GAS /tmp/ccTOAmWG.s page 131
5805:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - AWD standard (instance AWD1):
5806:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels.
5807:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected.
5808:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to
5809:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution configured).
5810:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3):
5811:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is
5812:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * channel wise, from from 1 to all channels.
5813:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can
5814:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * be selected. For example:
5815:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...)
5816:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both
5817:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * groups regular and injected).
5818:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected:
5819:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
5820:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
5821:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is
5822:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
5823:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the 2 LSB are ignored.
5824:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
5825:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
5826:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
5827:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
5828:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_GetAnalogWDMonitChannels\n
5829:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_GetAnalogWDMonitChannels\n
5830:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_GetAnalogWDMonitChannels\n
5831:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_GetAnalogWDMonitChannels\n
5832:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_GetAnalogWDMonitChannels\n
5833:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_GetAnalogWDMonitChannels
5834:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
5835:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values:
5836:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1
5837:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 (1)
5838:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 (1)
5839:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5840:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) On this AWD number, monitored channel can be retrieved
5841:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * if only 1 channel is programmed (or none or all channels).
5842:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This function cannot retrieve monitored channel if
5843:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * multiple channels are programmed simultaneously
5844:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * by bitfield.
5845:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
5846:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE
5847:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0)
5848:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0)
5849:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ
5850:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0)
5851:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0)
5852:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ
5853:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0)
5854:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0)
5855:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ
5856:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0)
5857:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0)
5858:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ
5859:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0)
5860:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0)
5861:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ
ARM GAS /tmp/ccTOAmWG.s page 132
5862:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0)
5863:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0)
5864:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ
5865:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0)
5866:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0)
5867:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ
5868:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0)
5869:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0)
5870:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ
5871:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0)
5872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0)
5873:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ
5874:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0)
5875:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0)
5876:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ
5877:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0)
5878:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0)
5879:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ
5880:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0)
5881:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0)
5882:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ
5883:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0)
5884:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0)
5885:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ
5886:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0)
5887:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0)
5888:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ
5889:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0)
5890:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0)
5891:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ
5892:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0)
5893:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0)
5894:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ
5895:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0)
5896:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0)
5897:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ
5898:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0)
5899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0)
5900:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ
5901:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0)
5902:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0)
5903:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ
5904:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0)
5905:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0)
5906:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ
5907:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_REG (0)
5908:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_INJ (0)
5909:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_19_REG_INJ
5910:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
5911:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (0) On STM32H7, parameter available only on analog watchdog number: AWD1.
5912:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
5913:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(const ADC_TypeDef *ADCx, uint32_t AWDy)
5914:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5915:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK)
5916:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MA
5917:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5918:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** uint32_t AnalogWDMonitChannels = (READ_BIT(*preg, AWDy) & AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK);
ARM GAS /tmp/ccTOAmWG.s page 133
5919:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5920:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* If "AnalogWDMonitChannels" == 0, then the selected AWD is disabled */
5921:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* (parameter value LL_ADC_AWD_DISABLE). */
5922:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Else, the selected AWD is enabled and is monitoring a group of channels */
5923:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* or a single channel. */
5924:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (AnalogWDMonitChannels != 0UL)
5925:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5926:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (AWDy == LL_ADC_AWD1)
5927:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5928:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((AnalogWDMonitChannels & ADC_CFGR_AWD1SGL) == 0UL)
5929:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* AWD monitoring a group of channels */
5931:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** AnalogWDMonitChannels = ((AnalogWDMonitChannels
5932:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** | (ADC_AWD_CR23_CHANNEL_MASK)
5933:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** )
5934:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** & (~(ADC_CFGR_AWD1CH))
5935:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
5936:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5937:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
5938:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5939:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* AWD monitoring a single channel */
5940:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** AnalogWDMonitChannels = (AnalogWDMonitChannels
5941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** | (ADC_AWD2CR_AWD2CH_0 << (AnalogWDMonitChannels >> ADC_CFGR_AWD1C
5942:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
5943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5944:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5945:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
5946:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5947:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((AnalogWDMonitChannels & ADC_AWD_CR23_CHANNEL_MASK) == ADC_AWD_CR23_CHANNEL_MASK)
5948:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5949:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* AWD monitoring a group of channels */
5950:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** AnalogWDMonitChannels = (ADC_AWD_CR23_CHANNEL_MASK
5951:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** | ((ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN))
5952:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
5953:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5954:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
5955:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5956:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* AWD monitoring a single channel */
5957:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* AWD monitoring a group of channels */
5958:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** AnalogWDMonitChannels = (AnalogWDMonitChannels
5959:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** | (ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL)
5960:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** | (__LL_ADC_CHANNEL_TO_DECIMAL_NB(AnalogWDMonitChannels) << ADC_CF
5961:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
5962:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5963:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5964:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5965:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5966:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return AnalogWDMonitChannels;
5967:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5968:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5969:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
5970:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC analog watchdog threshold value of threshold
5971:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * high or low.
5972:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits,
5973:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift.
5974:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
5975:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog
ARM GAS /tmp/ccTOAmWG.s page 134
5976:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * instance:
5977:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - AWD standard (instance AWD1):
5978:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels.
5979:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected.
5980:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to
5981:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution configured).
5982:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3):
5983:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is
5984:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * channel wise, from from 1 to all channels.
5985:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can
5986:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * be selected. For example:
5987:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...)
5988:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both
5989:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * groups regular and injected).
5990:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected:
5991:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
5992:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
5993:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is
5994:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
5995:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the 2 LSB are ignored.
5996:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are
5997:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done
5998:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on oversampling intermediate computation (after ratio, before shift
5999:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * application): intermediate register bitfield [32:7]
6000:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (26 most significant bits).
6001:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6002:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6003:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
6004:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either ADC groups regular or injected.
6005:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_SetAnalogWDThresholds\n
6006:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR2 HT2 LL_ADC_SetAnalogWDThresholds\n
6007:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR3 HT3 LL_ADC_SetAnalogWDThresholds\n
6008:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR1 LT1 LL_ADC_SetAnalogWDThresholds\n
6009:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR2 LT2 LL_ADC_SetAnalogWDThresholds\n
6010:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR3 LT3 LL_ADC_SetAnalogWDThresholds
6011:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6012:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values:
6013:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1
6014:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2
6015:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3
6016:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values:
6017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
6018:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW
6019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDThresholdValue Value between Min_Data=0x000 and Max_Data=0xFFF
6020:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6021:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6022:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThr
6023:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6024:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
6025:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
6026:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6027:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdValue" with bits */
6028:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* position in register and register position depending on parameters */
6029:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* "AWDThresholdsHighLow" and "AWDy". */
6030:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */
6031:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* containing other bits reserved for other purpose. */
6032:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->LTR1_TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK)
ARM GAS /tmp/ccTOAmWG.s page 135
6033:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6034:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
6035:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC3_TR1_LT1 << (AWDThresholdsHighLow * ADC3_TR1_HT1_Pos)),
6036:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** AWDThresholdValue << (((AWDThresholdsHighLow * ADC3_TR1_HT1) & ADC_AWD_TRX_BIT_HIGH_
6037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6038:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
6039:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6040:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdValue" with bits */
6041:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* position in register and register position depending on parameters */
6042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* "AWDThresholdsHighLow" and "AWDy". */
6043:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */
6044:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* containing other bits reserved for other purpose. */
6045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->LTR1_TR1, (((AWDy & ADC_AWD_TRX_REGOFFSET_MASK
6046:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + ((AWDy & ADC_AWD_TR12_REGOFFSETGAP_MASK)
6047:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + (AWDThresholdsHighLow));
6048:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6049:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg, ADC_LTR_LT, AWDThresholdValue);
6050:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6051:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
6052:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdValue" with bits */
6053:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* position in register and register position depending on parameters */
6054:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* "AWDThresholdsHighLow" and "AWDy". */
6055:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */
6056:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* containing other bits reserved for other purpose. */
6057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->LTR1, (((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> A
6058:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + ((AWDy & ADC_AWD_TR12_REGOFFSETGAP_MASK) *
6059:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + (AWDThresholdsHighLow));
6060:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6061:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg, ADC_LTR_LT, AWDThresholdValue);
6062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
6063:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6064:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6066:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC analog watchdog threshold value of threshold high,
6067:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * threshold low or raw data with ADC thresholds high and low
6068:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * concatenated.
6069:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits,
6070:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift.
6071:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
6072:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_GetAnalogWDThresholds\n
6073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR2 HT2 LL_ADC_GetAnalogWDThresholds\n
6074:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR3 HT3 LL_ADC_GetAnalogWDThresholds\n
6075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR1 LT1 LL_ADC_GetAnalogWDThresholds\n
6076:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR2 LT2 LL_ADC_GetAnalogWDThresholds\n
6077:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR3 LT3 LL_ADC_GetAnalogWDThresholds
6078:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6079:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values:
6080:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1
6081:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2
6082:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3
6083:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values:
6084:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
6085:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW
6086:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0x3FFFFFF
6087:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6088:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(const ADC_TypeDef *ADCx, uint32_t AWDy, uint3
6089:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
ARM GAS /tmp/ccTOAmWG.s page 136
6090:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
6091:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
6092:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6093:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->LTR1_TR1,
6094:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AW
6095:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6096:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg,
6097:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (ADC3_TR1_LT1 << (AWDThresholdsHighLow * ADC3_TR1_HT1_Pos)))
6098:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> (((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_BIT_HI
6099:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** & ~(AWDThresholdsHighLow & ADC3_TR1_LT1)));
6100:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6101:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
6102:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6103:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->LTR1_TR1, (((AWDy & ADC_AWD_TRX_REGOFFSE
6104:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + ((AWDy & ADC_AWD_TR12_REGOFFSE
6105:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + (AWDThresholdsHighLow));
6106:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6107:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, ADC_LTR_LT));
6108:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6109:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
6110:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->LTR1, (((AWDy & ADC_AWD_TRX_REGOFFSET_MAS
6111:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + ((AWDy & ADC_AWD_TR12_REGOFFSE
6112:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + (AWDThresholdsHighLow));
6113:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6114:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, ADC_LTR_LT));
6115:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
6116:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6117:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6118:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
6119:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6120:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6121:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC analog watchdog thresholds value of both thresholds
6122:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * high and low. Applicable for devices STM32H72xx and STM32H73xx.
6123:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If value of only one threshold high or low must be set,
6124:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * use function @ref LL_ADC_SetAnalogWDThresholds().
6125:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits,
6126:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift.
6127:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
6128:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog
6129:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * instance:
6130:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - AWD standard (instance AWD1):
6131:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels.
6132:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected.
6133:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to
6134:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution configured).
6135:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3):
6136:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is
6137:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * channel wise, from from 1 to all channels.
6138:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can
6139:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * be selected. For example:
6140:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...)
6141:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both
6142:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * groups regular and injected).
6143:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected:
6144:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters
6145:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ)
6146:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is
ARM GAS /tmp/ccTOAmWG.s page 137
6147:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits
6148:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the 2 LSB are ignored.
6149:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_ConfigAnalogWDThresholds\n
6150:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR2 HT2 LL_ADC_ConfigAnalogWDThresholds\n
6151:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR3 HT3 LL_ADC_ConfigAnalogWDThresholds\n
6152:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR1 LT1 LL_ADC_ConfigAnalogWDThresholds\n
6153:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR2 LT2 LL_ADC_ConfigAnalogWDThresholds\n
6154:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * TR3 LT3 LL_ADC_ConfigAnalogWDThresholds
6155:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6156:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values:
6157:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1
6158:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2
6159:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3
6160:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
6161:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
6162:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6163:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6164:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD
6165:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6166:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */
6167:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* position in register and register position depending on parameter */
6168:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* "AWDy". */
6169:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */
6170:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* containing other bits reserved for other purpose. */
6171:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
6172:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6173:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->LTR1_TR1,
6174:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_
6175:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6176:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg,
6177:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC3_TR1_HT1 | ADC3_TR1_LT1,
6178:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (AWDThresholdHighValue << ADC3_TR1_HT1_Pos) | AWDThresholdLowValue);
6179:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6180:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
6181:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6182:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->LTR1_TR1, (((AWDy & ADC_AWD_TRX_REGOFFSET_MASK
6183:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + ((AWDy & ADC_AWD_TR12_REGOFFSETGAP_MASK)
6184:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + (LL_ADC_AWD_THRESHOLD_LOW));
6185:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __IO uint32_t *preg2 = __ADC_PTR_REG_OFFSET(ADCx->LTR1_TR1, (((AWDy & ADC_AWD_TRX_REGOFFSET_MAS
6186:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + ((AWDy & ADC_AWD_TR12_REGOFFSETGAP_MASK)
6187:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** + (LL_ADC_AWD_THRESHOLD_HIGH));
6188:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6189:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg, ADC_LTR_LT, AWDThresholdLowValue);
6190:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg2, ADC_HTR_HT, AWDThresholdHighValue);
6191:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6192:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6193:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6194:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6195:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6196:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC analog watchdog filtering configuration
6197:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6198:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6199:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
6200:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
6201:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Applicable on ADC3 of devices STM32H72xx and STM32H73xx.
6202:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first
6203:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * analog watchdog (AWD1)
ARM GAS /tmp/ccTOAmWG.s page 138
6204:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_SetAWDFilteringConfiguration
6205:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6206:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values:
6207:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1
6208:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param FilteringConfig This parameter can be one of the following values:
6209:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE
6210:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES
6211:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES
6212:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES
6213:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES
6214:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES
6215:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES
6216:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES
6217:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6218:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6219:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAWDFilteringConfiguration(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t
6220:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6221:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
6222:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6223:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */
6224:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (void)(AWDy);
6225:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->LTR1_TR1, ADC3_TR1_AWDFILT, FilteringConfig);
6226:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6227:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6228:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6229:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6230:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC analog watchdog filtering configuration
6231:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first
6232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * analog watchdog (AWD1)
6233:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Applicable on ADC3 of devices STM32H72xx and STM32H73xx.
6234:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_GetAWDFilteringConfiguration
6235:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6236:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values:
6237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1
6238:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be:
6239:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE
6240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES
6241:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES
6242:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES
6243:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES
6244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES
6245:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES
6246:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES
6247:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6248:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAWDFilteringConfiguration(const ADC_TypeDef *ADCx, uint32_t AWDy
6249:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6250:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx == ADC3)
6251:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6252:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */
6253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** (void)(AWDy);
6254:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->LTR1_TR1, ADC3_TR1_AWDFILT));
6255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6256:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
6257:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6258:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Function not available on this instance, return 0 */
6259:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return 0UL;
6260:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 139
6261:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6262:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
6263:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6264:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
6265:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6266:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6267:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: over
6268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
6269:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6270:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6271:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6272:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC oversampling scope: ADC groups regular and-or injected
6273:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 families).
6274:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If both groups regular and injected are selected,
6275:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * specify behavior of ADC group injected interrupting
6276:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * group regular: when ADC group injected is triggered,
6277:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the oversampling on ADC group regular is either
6278:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temporary stopped and continued, or resumed from start
6279:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (oversampler buffer reset).
6280:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6281:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6282:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
6283:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
6284:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_SetOverSamplingScope\n
6285:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_SetOverSamplingScope\n
6286:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_SetOverSamplingScope
6287:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6288:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param OvsScope This parameter can be one of the following values:
6289:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE
6290:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
6291:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED
6292:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED
6293:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED
6294:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6295:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6296:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
6297:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6298:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM, OvsScope);
6299:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6300:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6301:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6302:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC oversampling scope: ADC groups regular and-or injected
6303:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 families).
6304:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If both groups regular and injected are selected,
6305:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * specify behavior of ADC group injected interrupting
6306:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * group regular: when ADC group injected is triggered,
6307:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * the oversampling on ADC group regular is either
6308:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * temporary stopped and continued, or resumed from start
6309:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (oversampler buffer reset).
6310:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_GetOverSamplingScope\n
6311:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_GetOverSamplingScope\n
6312:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_GetOverSamplingScope
6313:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6314:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
6315:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE
6316:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
6317:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED
ARM GAS /tmp/ccTOAmWG.s page 140
6318:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED
6319:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED
6320:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6321:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(const ADC_TypeDef *ADCx)
6322:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6323:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM));
6324:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6325:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6326:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6327:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC oversampling discontinuous mode (triggered mode)
6328:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on the selected ADC group.
6329:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Number of oversampled conversions are done either in:
6330:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio
6331:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * are done from 1 trigger)
6332:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio
6333:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * needs a trigger)
6334:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6335:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6336:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
6337:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on group regular.
6338:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, oversampling discontinuous mode
6339:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (triggered mode) can be used only when oversampling is
6340:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * set on group regular only and in resumed mode.
6341:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_SetOverSamplingDiscont
6342:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6343:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param OverSamplingDiscont This parameter can be one of the following values:
6344:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT
6345:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT
6346:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6347:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6348:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
6349:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6350:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TROVS, OverSamplingDiscont);
6351:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6352:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6353:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6354:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC oversampling discontinuous mode (triggered mode)
6355:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on the selected ADC group.
6356:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Number of oversampled conversions are done either in:
6357:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio
6358:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * are done from 1 trigger)
6359:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio
6360:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * needs a trigger)
6361:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_GetOverSamplingDiscont
6362:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6363:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
6364:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT
6365:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT
6366:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6367:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(const ADC_TypeDef *ADCx)
6368:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6369:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TROVS));
6370:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6371:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6372:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6373:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC oversampling
6374:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (impacting both ADC groups regular and injected)
ARM GAS /tmp/ccTOAmWG.s page 141
6375:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note This function set the 2 items of oversampling configuration:
6376:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ratio
6377:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - shift
6378:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6380:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going
6381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
6382:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n
6383:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift
6384:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6385:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Ratio This parameter can be in the range from 1 to 1024.
6386:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * In the case of ADC3 can be one of the following values:
6387:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2
6388:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4
6389:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8
6390:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16
6391:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32
6392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64
6393:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128
6394:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256
6395:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Shift This parameter can be one of the following values:
6396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE
6397:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
6398:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
6399:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
6400:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
6401:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
6402:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
6403:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
6404:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
6405:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_9
6406:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_10
6407:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_11
6408:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6409:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6410:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_
6411:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6412:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
6413:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if(ADCx==ADC3)
6414:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6415:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC3_CFGR2_OVSR), (Shift | Ratio));
6416:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6417:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
6418:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6419:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | (((Ratio - 1UL) << ADC_CFGR
6420:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6421:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
6422:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6423:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | (((Ratio - 1UL) << ADC_CFGR2_
6424:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6425:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
6426:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6427:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6428:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6429:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC oversampling ratio
6430:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (impacting both ADC groups regular and injected)
6431:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio
ARM GAS /tmp/ccTOAmWG.s page 142
6432:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6433:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Ratio This parameter can be in the from 1 to 1024.
6434:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * In the case of ADC3 can be one of the following values:
6435:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2
6436:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4
6437:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8
6438:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16
6439:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32
6440:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64
6441:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128
6442:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256
6443:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6444:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(const ADC_TypeDef *ADCx)
6445:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6446:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
6447:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if(ADCx==ADC3)
6448:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6449:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC3_CFGR2_OVSR));
6450:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6451:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else
6452:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6453:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (((uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR)) + (1UL << ADC_CFGR2_OVSR_Pos)) >> AD
6454:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6455:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else
6456:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6457:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (((uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR)) + (1UL << ADC_CFGR2_OVSR_Pos)) >> ADC_
6458:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6459:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
6460:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6462:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC oversampling shift
6464:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (impacting both ADC groups regular and injected)
6465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift
6466:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6467:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Shift This parameter can be one of the following values:
6468:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE
6469:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
6470:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
6471:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
6472:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
6473:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
6474:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
6475:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
6476:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
6477:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_9
6478:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_10
6479:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_11
6480:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6481:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(const ADC_TypeDef *ADCx)
6482:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6483:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS));
6484:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6485:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6486:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6487:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
6488:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
ARM GAS /tmp/ccTOAmWG.s page 143
6489:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6490:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Multimode Configuration of ADC hierarchical scope: multim
6491:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
6492:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6493:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6494:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC boost mode.
6495:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6496:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6497:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC boost must be configured, without calibration on going, without conversion
6498:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on group regular.
6499:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR BOOST LL_ADC_SetBoostMode
6500:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6501:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param BoostMode This parameter can be one of the following values:
6502:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_BOOST_MODE_6MHZ25
6503:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_BOOST_MODE_12MHZ5
6504:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_BOOST_MODE_20MHZ
6505:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_BOOST_MODE_25MHZ
6506:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_BOOST_MODE_50MHZ
6507:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6508:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6509:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetBoostMode(ADC_TypeDef *ADCx, uint32_t BoostMode)
6510:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6511:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
6512:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if (ADCx != ADC3)
6513:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6514:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR, ADC_CR_BOOST, (BoostMode & ADC_CR_BOOST));
6515:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6516:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #else /* ADC_VER_V5_V90 */
6517:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((DBGMCU->IDCODE & 0x30000000UL) == 0x10000000UL) /* Cut 1.x */
6518:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6519:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR, ADC_CR_BOOST_0, (BoostMode >> 2UL));
6520:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6521:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else /* Cut 2.x */
6522:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6523:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR, ADC_CR_BOOST, (BoostMode & ADC_CR_BOOST));
6524:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6525:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
6526:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6527:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6528:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6529:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6530:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC boost mode.
6531:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6532:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6533:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC boost must be configured, without calibration on going, without conversion
6534:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on going on group regular.
6535:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR BOOST LL_ADC_GetBoostMode
6536:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6537:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: Boost disabled 1: Boost enabled
6538:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6539:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetBoostMode(const ADC_TypeDef *ADCx)
6540:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6541:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** if ((DBGMCU->IDCODE & 0x30000000UL) == 0x10000000UL) /* Cut 1.x */
6542:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6543:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)READ_BIT(ADCx->CR, ADC_CR_BOOST_0);
6544:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6545:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** else /* Cut 2.x */
ARM GAS /tmp/ccTOAmWG.s page 144
6546:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6547:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_BOOST) == (ADC_CR_BOOST)) ? 1UL : 0UL);
6548:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6549:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6550:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6551:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6552:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC multimode configuration to operate in independent mode
6553:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or multimode (for devices with several ADC instances).
6554:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is
6555:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * either master or slave depending on hardware.
6556:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to reference manual.
6557:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6558:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6559:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled.
6560:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each
6561:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instance or by using helper macro
6562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
6563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_SetMultimode
6564:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
6565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
6566:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param Multimode This parameter can be one of the following values:
6567:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT
6568:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT
6569:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL
6570:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT
6571:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN
6572:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM
6573:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT
6574:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM
6575:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6576:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultimode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Multimode)
6578:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6579:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DUAL, Multimode);
6580:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6581:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6582:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6583:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC multimode configuration to operate in independent mode
6584:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or multimode (for devices with several ADC instances).
6585:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is
6586:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * either master or slave depending on hardware.
6587:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to reference manual.
6588:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_GetMultimode
6589:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
6590:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
6591:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
6592:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT
6593:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT
6594:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL
6595:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT
6596:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN
6597:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM
6598:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT
6599:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM
6600:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultimode(const ADC_Common_TypeDef *ADCxy_COMMON)
6602:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
ARM GAS /tmp/ccTOAmWG.s page 145
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL));
6604:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6605:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6606:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6607:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC multimode conversion data transfer: no transfer
6608:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or transfer by DMA.
6609:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected:
6610:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual
6611:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * DMA transfer settings.
6612:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected:
6613:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master)
6614:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Specifies the DMA requests mode:
6615:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped
6616:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when number of DMA data transfers (number of
6617:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions) is reached.
6618:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular.
6619:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited,
6620:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * whatever number of DMA data transfers (number of
6621:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions).
6622:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular.
6623:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to
6624:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * mode non-circular:
6625:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of
6626:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error
6627:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (overrun flag and interruption if enabled).
6628:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note How to retrieve multimode conversion data:
6629:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function
6630:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32().
6631:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data
6632:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated.
6633:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * A macro is available to get the conversion data of
6634:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC master or ADC slave: see helper macro
6635:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
6636:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6637:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6638:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled
6639:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or enabled without conversion on going on group regular.
6640:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR DAMDF LL_ADC_GetMultiDMATransfer\n
6641:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
6642:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
6643:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param MultiDMATransfer This parameter can be one of the following values:
6644:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC
6645:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_RES_32_10B
6646:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_RES_8B
6647:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6648:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6649:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiDMA
6650:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6651:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DAMDF, MultiDMATransfer);
6652:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6653:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6654:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6655:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC multimode conversion data transfer: no transfer
6656:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or transfer by DMA.
6657:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected:
6658:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual
6659:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * DMA transfer settings.
ARM GAS /tmp/ccTOAmWG.s page 146
6660:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected:
6661:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master)
6662:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Specifies the DMA requests mode:
6663:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped
6664:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when number of DMA data transfers (number of
6665:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions) is reached.
6666:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular.
6667:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited,
6668:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * whatever number of DMA data transfers (number of
6669:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions).
6670:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular.
6671:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to
6672:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * mode non-circular:
6673:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of
6674:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error
6675:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (overrun flag and interruption if enabled).
6676:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note How to retrieve multimode conversion data:
6677:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function
6678:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32().
6679:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data
6680:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated.
6681:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * A macro is available to get the conversion data of
6682:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC master or ADC slave: see helper macro
6683:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
6684:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR DAMDF LL_ADC_GetMultiDMATransfer\n
6685:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
6686:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
6687:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
6688:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC
6689:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_RES_32_10B
6690:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_RES_8B
6691:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6692:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(const ADC_Common_TypeDef *ADCxy_COMMON)
6693:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6694:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DAMDF));
6695:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6696:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6697:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6698:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Set ADC multimode delay between 2 sampling phases.
6699:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note The sampling delay range depends on ADC resolution:
6700:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC resolution 12 bits can have maximum delay of 12 cycles.
6701:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC resolution 10 bits can have maximum delay of 10 cycles.
6702:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC resolution 8 bits can have maximum delay of 8 cycles.
6703:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - ADC resolution 6 bits can have maximum delay of 6 cycles.
6704:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6705:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6706:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled.
6707:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each
6708:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC instance or by using helper macro helper macro
6709:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
6710:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_SetMultiTwoSamplingDelay
6711:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
6712:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
6713:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param MultiTwoSamplingDelay This parameter can be one of the following values:
6714:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE_5
6715:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES_5
6716:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES_5
ARM GAS /tmp/ccTOAmWG.s page 147
6717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5 (1)
6718:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5_8_BITS
6719:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5 (2)
6720:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5_10_BITS
6721:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (3)
6722:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5 (4)
6723:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5_12_BITS
6724:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES_5 (5)
6725:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (6)
6726:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (7)
6727:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
6728:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 16, 14, 12 or 10 bits.
6729:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 16, 14 or 12 bits.
6730:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 10 or 8 bits.
6731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (4) Parameter available only if ADC resolution is 16 or 14 bits.
6732:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (5) Parameter available only if ADC resolution is 16 bits.
6733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (6) Parameter available only if ADC resolution is 12 bits.
6734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (7) Parameter available only if ADC resolution is 16 or 14 bits.
6735:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6736:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6737:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Mul
6738:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6739:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DELAY, MultiTwoSamplingDelay);
6740:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6741:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6742:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6743:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC multimode delay between 2 sampling phases.
6744:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_GetMultiTwoSamplingDelay
6745:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
6746:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
6747:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Returned value can be one of the following values:
6748:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE_5
6749:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES_5
6750:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES_5
6751:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5 (1)
6752:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5_8_BITS
6753:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5 (2)
6754:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5_10_BITS
6755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (3)
6756:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5 (4)
6757:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5_12_BITS
6758:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES_5 (5)
6759:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (6)
6760:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (7)
6761:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** *
6762:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 16, 14, 12 or 10 bits.
6763:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 16, 14 or 12 bits.
6764:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 10 or 8 bits.
6765:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (4) Parameter available only if ADC resolution is 16 or 14 bits.
6766:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (5) Parameter available only if ADC resolution is 16 bits.
6767:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (6) Parameter available only if ADC resolution is 12 bits.
6768:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (7) Parameter available only if ADC resolution is 16 or 14 bits.
6769:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6770:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiTwoSamplingDelay(const ADC_Common_TypeDef *ADCxy_COMMON)
6771:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6772:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DELAY));
6773:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 148
6774:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6775:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6776:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
6777:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6778:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
6779:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
6780:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6781:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6782:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6783:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Put ADC instance in deep power down state.
6784:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down
6785:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from
6786:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor
6787:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register.
6788:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6789:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6790:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be ADC disabled.
6791:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_EnableDeepPowerDown
6792:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6793:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6794:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6795:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableDeepPowerDown(ADC_TypeDef *ADCx)
6796:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6797:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
6798:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
6799:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
6800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
6801:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
6802:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_DEEPPWD);
6803:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6804:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6805:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6806:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Disable ADC deep power down mode.
6807:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down
6808:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from
6809:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor
6810:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register.
6811:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6812:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6813:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be ADC disabled.
6814:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown
6815:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6816:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6817:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6818:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx)
6819:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6820:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
6821:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
6822:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
6823:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD | ADC_CR_BITS_PROPERTY_RS));
6824:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6825:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6826:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6827:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get the selected ADC instance deep power down state.
6828:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled
6829:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6830:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: deep power down is disabled, 1: deep power down is enabled.
ARM GAS /tmp/ccTOAmWG.s page 149
6831:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6832:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(const ADC_TypeDef *ADCx)
6833:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6834:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD)) ? 1UL : 0UL);
6835:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6836:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6837:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6838:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Enable ADC instance internal voltage regulator.
6839:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, after ADC internal voltage regulator enable,
6840:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a delay for ADC internal voltage regulator stabilization
6841:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is required before performing a ADC calibration or ADC enable.
6842:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet, parameter tADCVREG_STUP.
6843:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US.
6844:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6845:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6846:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be ADC disabled.
6847:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator
6848:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6849:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6850:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6851:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
6852:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6853:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
6854:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
6855:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
6856:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
6857:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
6858:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_ADVREGEN);
6859:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6860:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6861:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6862:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Disable ADC internal voltage regulator.
6863:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6864:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6865:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be ADC disabled.
6866:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator
6867:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6868:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6869:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6870:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
6871:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN | ADC_CR_BITS_PROPERTY_RS));
6873:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6874:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6875:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6876:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get the selected ADC instance internal voltage regulator state.
6877:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled
6878:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6879:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
6880:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6881:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(const ADC_TypeDef *ADCx)
6882:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6883:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL);
6884:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6885:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6886:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6887:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Enable the selected ADC instance.
ARM GAS /tmp/ccTOAmWG.s page 150
6888:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, after ADC enable, a delay for
6889:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC internal analog stabilization is required before performing a
6890:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC conversion start.
6891:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to device datasheet, parameter tSTAB.
6892:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC
6893:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is enabled and when conversion clock is active.
6894:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain)
6895:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6896:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6897:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be ADC disabled and ADC internal voltage regulator enabled.
6898:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_Enable
6899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6900:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6901:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6902:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
6903:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6904:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
6905:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
6906:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
6907:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
6908:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
6909:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_ADEN);
6910:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6911:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6912:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6913:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Disable the selected ADC instance.
6914:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6915:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6916:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be not disabled. Must be enabled without conversion on going
6917:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * on either groups regular or injected.
6918:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_Disable
6919:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6920:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6921:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6922:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
6923:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6924:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
6925:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
6926:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
6927:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
6928:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
6929:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_ADDIS);
6930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6931:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6932:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6933:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get the selected ADC instance enable state.
6934:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC
6935:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * is enabled and when conversion clock is active.
6936:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain)
6937:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_IsEnabled
6938:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6939:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: ADC is disabled, 1: ADC is enabled.
6940:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsEnabled(const ADC_TypeDef *ADCx)
6942:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL);
6944:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 151
6945:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6946:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6947:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get the selected ADC instance disable state.
6948:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing
6949:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6950:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: no ADC disable command on going.
6951:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6952:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(const ADC_TypeDef *ADCx)
6953:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6954:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL);
6955:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6956:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
6957:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
6958:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Start ADC calibration in the mode single-ended
6959:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or differential (for devices with differential mode available).
6960:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, a minimum number of ADC clock cycles
6961:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * are required between ADC end of calibration and ADC enable.
6962:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
6963:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note Calibration duration:
6964:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Calibration of offset: 520 ADC clock cycles
6965:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - Calibration of linearity: 131072 ADC clock cycles
6966:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with differential mode available:
6967:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Calibration of offset is specific to each of
6968:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * single-ended and differential modes
6969:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (calibration run must be performed for each of these
6970:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * differential modes, if used afterwards and if the application
6971:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * requires their calibration).
6972:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * Calibration of linearity is common to both
6973:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * single-ended and differential modes
6974:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (calibration run can be performed only once).
6975:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
6976:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
6977:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be ADC disabled.
6978:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_StartCalibration\n
6979:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CR ADCALDIF LL_ADC_StartCalibration\n
6980:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CR ADCALLIN LL_ADC_StartCalibration
6981:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
6982:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param CalibrationMode This parameter can be one of the following values:
6983:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_OFFSET
6984:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_CALIB_OFFSET_LINEARITY
6985:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values:
6986:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED
6987:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED
6988:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
6989:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
6990:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx, uint32_t CalibrationMode, uint32_t
358 .loc 2 6990 22 view .LVU83
359 .LBB262:
6991:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6992:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
6993:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
6994:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
6995:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
360 .loc 2 6995 3 view .LVU84
361 0032 8A68 ldr r2, [r1, #8]
362 0034 1A4B ldr r3, .L31+4
363 0036 1340 ands r3, r3, r2
ARM GAS /tmp/ccTOAmWG.s page 152
364 0038 05F48035 and r5, r5, #65536
365 .LVL26:
366 .loc 2 6995 3 is_stmt 0 view .LVU85
367 003c 06F08046 and r6, r6, #1073741824
368 .LVL27:
369 .loc 2 6995 3 view .LVU86
370 0040 45EA0602 orr r2, r5, r6
371 0044 1343 orrs r3, r3, r2
372 0046 43F00043 orr r3, r3, #-2147483648
373 004a 8B60 str r3, [r1, #8]
374 .LVL28:
375 .loc 2 6995 3 view .LVU87
376 .LBE262:
377 .LBE261:
153:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
154:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Wait for calibration completion */
155:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
378 .loc 1 155 5 is_stmt 1 view .LVU88
379 .L24:
380 .loc 1 155 56 view .LVU89
381 .loc 1 155 44 is_stmt 0 view .LVU90
382 004c 2368 ldr r3, [r4]
383 .LVL29:
384 .LBB263:
385 .LBI263:
6996:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_ADCALLIN | ADC_CR_ADCALDIF | ADC_CR_BITS_PROPERTY_RS,
6997:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_ADCAL | (CalibrationMode & ADC_CALIB_MODE_MASK) | (SingleDiff & ADC_SINGLEDIFF_
6998:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6999:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7000:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7001:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC calibration state.
7002:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing
7003:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7004:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: calibration complete, 1: calibration in progress.
7005:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7006:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(const ADC_TypeDef *ADCx)
386 .loc 2 7006 26 is_stmt 1 view .LVU91
387 .LBB264:
7007:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7008:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL)) ? 1UL : 0UL);
388 .loc 2 7008 3 view .LVU92
389 .loc 2 7008 12 is_stmt 0 view .LVU93
390 004e 9B68 ldr r3, [r3, #8]
391 .LVL30:
392 .loc 2 7008 70 view .LVU94
393 0050 002B cmp r3, #0
394 0052 06DB blt .L30
395 .LVL31:
396 .loc 2 7008 70 view .LVU95
397 .LBE264:
398 .LBE263:
156:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
157:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** wait_loop_index++;
158:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
159:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
160:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
161:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
ARM GAS /tmp/ccTOAmWG.s page 153
162:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL,
163:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_ERROR_INTERNAL);
164:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
165:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
166:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
167:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
168:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
169:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
170:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
171:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
172:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
173:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
399 .loc 1 173 5 is_stmt 1 view .LVU96
400 0054 636D ldr r3, [r4, #84]
401 0056 23F00303 bic r3, r3, #3
402 005a 43F00103 orr r3, r3, #1
403 005e 6365 str r3, [r4, #84]
404 0060 15E0 b .L27
405 .LVL32:
406 .L30:
157:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
407 .loc 1 157 7 view .LVU97
157:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
408 .loc 1 157 22 is_stmt 0 view .LVU98
409 0062 019B ldr r3, [sp, #4]
410 0064 0133 adds r3, r3, #1
411 0066 0193 str r3, [sp, #4]
158:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
412 .loc 1 158 7 is_stmt 1 view .LVU99
158:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
413 .loc 1 158 27 is_stmt 0 view .LVU100
414 0068 019A ldr r2, [sp, #4]
158:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
415 .loc 1 158 10 view .LVU101
416 006a 0E4B ldr r3, .L31+8
417 006c 9A42 cmp r2, r3
418 006e EDD3 bcc .L24
161:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL,
419 .loc 1 161 9 is_stmt 1 view .LVU102
420 0070 636D ldr r3, [r4, #84]
421 0072 23F01203 bic r3, r3, #18
422 0076 43F01003 orr r3, r3, #16
423 007a 6365 str r3, [r4, #84]
166:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
424 .loc 1 166 9 view .LVU103
166:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
425 .loc 1 166 9 view .LVU104
426 007c 0023 movs r3, #0
427 007e 84F85030 strb r3, [r4, #80]
166:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
428 .loc 1 166 9 view .LVU105
168:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
429 .loc 1 168 9 view .LVU106
168:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
430 .loc 1 168 16 is_stmt 0 view .LVU107
431 0082 0120 movs r0, #1
432 .LVL33:
ARM GAS /tmp/ccTOAmWG.s page 154
168:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
433 .loc 1 168 16 view .LVU108
434 0084 06E0 b .L22
435 .LVL34:
436 .L23:
174:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL,
175:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY);
176:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
177:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
178:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
179:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
437 .loc 1 179 5 is_stmt 1 view .LVU109
438 0086 636D ldr r3, [r4, #84]
439 0088 43F01003 orr r3, r3, #16
440 008c 6365 str r3, [r4, #84]
441 .LVL35:
442 .L27:
180:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
181:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: No need to update variable "tmp_hal_status" here: already set */
182:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* to state "HAL_ERROR" by function disabling the ADC. */
183:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
184:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
185:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
186:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
443 .loc 1 186 3 view .LVU110
444 .loc 1 186 3 view .LVU111
445 008e 0023 movs r3, #0
446 0090 84F85030 strb r3, [r4, #80]
447 .loc 1 186 3 view .LVU112
187:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
188:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
189:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
448 .loc 1 189 3 view .LVU113
449 .LVL36:
450 .L22:
190:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
451 .loc 1 190 1 is_stmt 0 view .LVU114
452 0094 02B0 add sp, sp, #8
453 .cfi_remember_state
454 .cfi_def_cfa_offset 16
455 @ sp needed
456 0096 70BD pop {r4, r5, r6, pc}
457 .LVL37:
458 .L28:
459 .cfi_restore_state
136:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
460 .loc 1 136 3 discriminator 1 view .LVU115
461 0098 0220 movs r0, #2
462 .LVL38:
136:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
463 .loc 1 136 3 discriminator 1 view .LVU116
464 009a FBE7 b .L22
465 .L32:
466 .align 2
467 .L31:
468 009c FDEEFFFF .word -4355
469 00a0 C0FFFE3F .word 1073676224
ARM GAS /tmp/ccTOAmWG.s page 155
470 00a4 00F8C325 .word 633600000
471 .cfi_endproc
472 .LFE335:
474 .section .text.HAL_ADCEx_Calibration_GetValue,"ax",%progbits
475 .align 1
476 .global HAL_ADCEx_Calibration_GetValue
477 .syntax unified
478 .thumb
479 .thumb_func
481 HAL_ADCEx_Calibration_GetValue:
482 .LVL39:
483 .LFB336:
191:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
192:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
193:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Get the calibration factor.
194:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle.
195:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param SingleDiff This parameter can be only:
196:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
197:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
198:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval Calibration value.
199:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
200:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_Calibration_GetValue(const ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
201:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
484 .loc 1 201 1 is_stmt 1 view -0
485 .cfi_startproc
486 @ args = 0, pretend = 0, frame = 0
487 @ frame_needed = 0, uses_anonymous_args = 0
488 @ link register save eliminated.
202:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
203:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
489 .loc 1 203 3 view .LVU118
204:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
490 .loc 1 204 3 view .LVU119
205:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
206:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return the selected ADC calibration value */
207:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return LL_ADC_GetCalibrationOffsetFactor(hadc->Instance, SingleDiff);
491 .loc 1 207 3 view .LVU120
492 .loc 1 207 48 is_stmt 0 view .LVU121
493 0000 0368 ldr r3, [r0]
494 .LVL40:
495 .LBB265:
496 .LBI265:
2890:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
497 .loc 2 2890 26 is_stmt 1 view .LVU122
498 .LBB266:
2899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
499 .loc 2 2899 3 view .LVU123
2899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
500 .loc 2 2899 21 is_stmt 0 view .LVU124
501 0002 D3F8C400 ldr r0, [r3, #196]
502 .LVL41:
2899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
503 .loc 2 2899 21 view .LVU125
504 0006 0840 ands r0, r0, r1
505 0008 20F0F820 bic r0, r0, #-134154240
2899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
506 .loc 2 2899 147 view .LVU126
ARM GAS /tmp/ccTOAmWG.s page 156
507 000c 090B lsrs r1, r1, #12
508 .LVL42:
2899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
509 .loc 2 2899 147 view .LVU127
510 000e 01F01001 and r1, r1, #16
511 .LVL43:
2899:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #endif /* ADC_VER_V5_V90 */
512 .loc 2 2899 147 view .LVU128
513 .LBE266:
514 .LBE265:
208:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
515 .loc 1 208 1 view .LVU129
516 0012 C840 lsrs r0, r0, r1
517 0014 7047 bx lr
518 .cfi_endproc
519 .LFE336:
521 .section .text.HAL_ADCEx_LinearCalibration_GetValue,"ax",%progbits
522 .align 1
523 .global HAL_ADCEx_LinearCalibration_GetValue
524 .syntax unified
525 .thumb
526 .thumb_func
528 HAL_ADCEx_LinearCalibration_GetValue:
529 .LVL44:
530 .LFB337:
209:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
210:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
211:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Get the calibration factor from automatic conversion result
212:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
213:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param LinearCalib_Buffer: Linear calibration factor
214:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL state
215:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
216:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t *LinearCal
217:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
531 .loc 1 217 1 is_stmt 1 view -0
532 .cfi_startproc
533 @ args = 0, pretend = 0, frame = 0
534 @ frame_needed = 0, uses_anonymous_args = 0
535 .loc 1 217 1 is_stmt 0 view .LVU131
536 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr}
537 .cfi_def_cfa_offset 32
538 .cfi_offset 3, -32
539 .cfi_offset 4, -28
540 .cfi_offset 5, -24
541 .cfi_offset 6, -20
542 .cfi_offset 7, -16
543 .cfi_offset 8, -12
544 .cfi_offset 9, -8
545 .cfi_offset 14, -4
546 0004 0646 mov r6, r0
547 0006 0F46 mov r7, r1
218:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t cnt;
548 .loc 1 218 3 is_stmt 1 view .LVU132
219:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
549 .loc 1 219 3 view .LVU133
550 .LVL45:
220:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t temp_REG_IsConversionOngoing = 0UL;
ARM GAS /tmp/ccTOAmWG.s page 157
551 .loc 1 220 3 view .LVU134
221:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
222:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
223:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
552 .loc 1 223 3 view .LVU135
224:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
225:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable the ADC ADEN = 1 to be able to read the linear calibration factor */
226:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
553 .loc 1 226 3 view .LVU136
554 .loc 1 226 28 is_stmt 0 view .LVU137
555 0008 0368 ldr r3, [r0]
556 .LVL46:
557 .LBB267:
558 .LBI267:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
559 .loc 2 6941 26 is_stmt 1 view .LVU138
560 .LBB268:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
561 .loc 2 6943 3 view .LVU139
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
562 .loc 2 6943 12 is_stmt 0 view .LVU140
563 000a 9B68 ldr r3, [r3, #8]
564 .LVL47:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
565 .loc 2 6943 68 view .LVU141
566 000c 13F0010F tst r3, #1
567 0010 14D1 bne .L40
568 .LVL48:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
569 .loc 2 6943 68 view .LVU142
570 .LBE268:
571 .LBE267:
227:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
228:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc);
572 .loc 1 228 5 is_stmt 1 view .LVU143
573 .loc 1 228 22 is_stmt 0 view .LVU144
574 0012 FFF7FEFF bl ADC_Enable
575 .LVL49:
576 .loc 1 228 22 view .LVU145
577 0016 8046 mov r8, r0
578 .LVL50:
579 .L35:
229:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
230:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
231:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
580 .loc 1 231 3 is_stmt 1 view .LVU146
581 .loc 1 231 6 is_stmt 0 view .LVU147
582 0018 B8F1000F cmp r8, #0
583 001c 2BD1 bne .L36
232:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
233:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
584 .loc 1 233 5 is_stmt 1 view .LVU148
585 .loc 1 233 44 is_stmt 0 view .LVU149
586 001e 3368 ldr r3, [r6]
587 .LVL51:
588 .LBB269:
589 .LBI269:
ARM GAS /tmp/ccTOAmWG.s page 158
7009:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7010:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7011:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7012:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
7013:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7014:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7015:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regu
7016:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
7017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7018:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7020:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Start ADC group regular conversion.
7021:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both
7022:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal trigger (SW start) and external trigger:
7023:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion
7024:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * starts immediately.
7025:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion
7026:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge)
7027:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * following the ADC start conversion command.
7028:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
7029:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
7030:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular,
7031:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without conversion stop command on going on group regular,
7032:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without ADC disable command on going.
7033:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_StartConversion
7034:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7035:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
7036:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
7038:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7039:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
7040:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
7041:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
7042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
7043:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
7044:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_ADSTART);
7045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7046:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7047:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7048:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Stop ADC group regular conversion.
7049:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
7050:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
7051:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be enabled with conversion on going on group regular,
7052:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without ADC disable command on going.
7053:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_StopConversion
7054:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7055:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
7056:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
7058:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7059:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
7060:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
7061:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
7062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
7063:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
7064:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_ADSTP);
7065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 159
7066:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7067:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7068:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion state.
7069:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing
7070:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7071:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group regular.
7072:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(const ADC_TypeDef *ADCx)
590 .loc 2 7073 26 is_stmt 1 view .LVU150
591 .LBB270:
7074:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL);
592 .loc 2 7075 3 view .LVU151
593 .loc 2 7075 12 is_stmt 0 view .LVU152
594 0020 9A68 ldr r2, [r3, #8]
595 .loc 2 7075 74 view .LVU153
596 0022 12F00409 ands r9, r2, #4
597 0026 07D0 beq .L37
598 .LVL52:
599 .loc 2 7075 74 view .LVU154
600 .LBE270:
601 .LBE269:
234:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
235:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_REG_StopConversion(hadc->Instance);
602 .loc 1 235 7 is_stmt 1 view .LVU155
603 .LBB271:
604 .LBI271:
7057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
605 .loc 2 7057 22 view .LVU156
606 .LBB272:
7062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
607 .loc 2 7062 3 view .LVU157
608 0028 9968 ldr r1, [r3, #8]
609 002a 144A ldr r2, .L42
610 002c 0A40 ands r2, r2, r1
611 002e 42F01002 orr r2, r2, #16
612 0032 9A60 str r2, [r3, #8]
613 .LVL53:
7062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
614 .loc 2 7062 3 is_stmt 0 view .LVU158
615 .LBE272:
616 .LBE271:
236:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** temp_REG_IsConversionOngoing = 1UL;
617 .loc 1 236 7 is_stmt 1 view .LVU159
618 .loc 1 236 36 is_stmt 0 view .LVU160
619 0034 4FF00109 mov r9, #1
620 .LVL54:
621 .L37:
237:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
238:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** for (cnt = ADC_LINEAR_CALIB_REG_COUNT; cnt > 0UL; cnt--)
622 .loc 1 238 5 is_stmt 1 view .LVU161
623 .loc 1 238 14 is_stmt 0 view .LVU162
624 0038 0624 movs r4, #6
625 .loc 1 238 5 view .LVU163
626 003a 10E0 b .L38
627 .LVL55:
628 .L40:
ARM GAS /tmp/ccTOAmWG.s page 160
219:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t temp_REG_IsConversionOngoing = 0UL;
629 .loc 1 219 21 view .LVU164
630 003c 4FF00008 mov r8, #0
631 0040 EAE7 b .L35
632 .LVL56:
633 .L39:
239:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
240:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LinearCalib_Buffer[cnt - 1U] = LL_ADC_GetCalibrationLinearFactor(hadc->Instance, ADC_CR_LINCA
634 .loc 1 240 7 is_stmt 1 view .LVU165
635 .loc 1 240 138 is_stmt 0 view .LVU166
636 0042 C4F10603 rsb r3, r4, #6
637 .loc 1 240 25 view .LVU167
638 0046 6FF04045 mvn r5, #-1073741824
639 004a 2544 add r5, r5, r4
640 .loc 1 240 38 view .LVU168
641 004c 4FF00061 mov r1, #134217728
642 0050 D940 lsrs r1, r1, r3
643 0052 3068 ldr r0, [r6]
644 0054 FFF7FEFF bl LL_ADC_GetCalibrationLinearFactor
645 .LVL57:
646 .loc 1 240 36 discriminator 1 view .LVU169
647 0058 47F82500 str r0, [r7, r5, lsl #2]
238:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
648 .loc 1 238 58 is_stmt 1 discriminator 3 view .LVU170
649 005c 013C subs r4, r4, #1
650 .LVL58:
651 .L38:
238:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
652 .loc 1 238 48 discriminator 1 view .LVU171
653 005e 002C cmp r4, #0
654 0060 EFD1 bne .L39
241:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
242:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (temp_REG_IsConversionOngoing != 0UL)
655 .loc 1 242 5 view .LVU172
656 .loc 1 242 8 is_stmt 0 view .LVU173
657 0062 B9F1000F cmp r9, #0
658 0066 06D0 beq .L36
243:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
244:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_REG_StartConversion(hadc->Instance);
659 .loc 1 244 7 is_stmt 1 view .LVU174
660 0068 3268 ldr r2, [r6]
661 .LVL59:
662 .LBB273:
663 .LBI273:
7037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
664 .loc 2 7037 22 view .LVU175
665 .LBB274:
7042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
666 .loc 2 7042 3 view .LVU176
667 006a 9168 ldr r1, [r2, #8]
668 006c 034B ldr r3, .L42
669 006e 0B40 ands r3, r3, r1
670 0070 43F00403 orr r3, r3, #4
671 0074 9360 str r3, [r2, #8]
672 .LVL60:
673 .L36:
7042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
ARM GAS /tmp/ccTOAmWG.s page 161
674 .loc 2 7042 3 is_stmt 0 view .LVU177
675 .LBE274:
676 .LBE273:
245:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
246:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
247:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
248:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
677 .loc 1 248 3 is_stmt 1 view .LVU178
249:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
678 .loc 1 249 1 is_stmt 0 view .LVU179
679 0076 4046 mov r0, r8
680 0078 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc}
681 .LVL61:
682 .L43:
683 .loc 1 249 1 view .LVU180
684 .align 2
685 .L42:
686 007c C0FFFF7F .word 2147483584
687 .cfi_endproc
688 .LFE337:
690 .section .text.HAL_ADCEx_Calibration_SetValue,"ax",%progbits
691 .align 1
692 .global HAL_ADCEx_Calibration_SetValue
693 .syntax unified
694 .thumb
695 .thumb_func
697 HAL_ADCEx_Calibration_SetValue:
698 .LVL62:
699 .LFB338:
250:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
251:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
252:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Set the calibration factor to overwrite automatic conversion result.
253:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * ADC must be enabled and no conversion is ongoing.
254:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
255:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param SingleDiff This parameter can be only:
256:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
257:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
258:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param CalibrationFactor Calibration factor On devices STM32H72xx and STM32H73xx this parameter
259:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * maximum for ADC1/2 and on 7 bits for ADC3.
260:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * On devices STM32H74xx and STM32H75xx this parameter
261:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL state
262:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
263:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, uint
264:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
700 .loc 1 264 1 is_stmt 1 view -0
701 .cfi_startproc
702 @ args = 0, pretend = 0, frame = 0
703 @ frame_needed = 0, uses_anonymous_args = 0
704 .loc 1 264 1 is_stmt 0 view .LVU182
705 0000 38B5 push {r3, r4, r5, lr}
706 .cfi_def_cfa_offset 16
707 .cfi_offset 3, -16
708 .cfi_offset 4, -12
709 .cfi_offset 5, -8
710 .cfi_offset 14, -4
265:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
711 .loc 1 265 3 is_stmt 1 view .LVU183
ARM GAS /tmp/ccTOAmWG.s page 162
712 .LVL63:
266:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular;
713 .loc 1 266 3 view .LVU184
267:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected;
714 .loc 1 267 3 view .LVU185
268:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
269:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
270:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
715 .loc 1 270 3 view .LVU186
271:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
716 .loc 1 271 3 view .LVU187
272:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
273:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
274:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC3)
275:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
276:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_CALFACT_ADC3(CalibrationFactor));
277:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
278:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
279:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
280:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_CALFACT(CalibrationFactor));
281:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
282:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #else
283:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_CALFACT(CalibrationFactor));
717 .loc 1 283 3 view .LVU188
284:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif
285:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
286:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
287:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
718 .loc 1 287 3 view .LVU189
719 .loc 1 287 3 view .LVU190
720 0002 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
721 0006 012B cmp r3, #1
722 0008 27D0 beq .L50
723 000a 0446 mov r4, r0
724 .loc 1 287 3 discriminator 2 view .LVU191
725 000c 0123 movs r3, #1
726 000e 80F85030 strb r3, [r0, #80]
727 .loc 1 287 3 view .LVU192
288:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
289:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Verification of hardware constraints before modifying the calibration */
290:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* factors register: ADC must be enabled, no conversion on going. */
291:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
728 .loc 1 291 3 view .LVU193
729 .loc 1 291 79 is_stmt 0 view .LVU194
730 0012 0068 ldr r0, [r0]
731 .LVL64:
732 .LBB275:
733 .LBI275:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
734 .loc 2 7073 26 is_stmt 1 view .LVU195
735 .LBB276:
736 .loc 2 7075 3 view .LVU196
737 .loc 2 7075 12 is_stmt 0 view .LVU197
738 0014 8368 ldr r3, [r0, #8]
739 .loc 2 7075 74 view .LVU198
740 0016 13F0040C ands ip, r3, #4
741 001a 01D0 beq .L46
ARM GAS /tmp/ccTOAmWG.s page 163
742 .loc 2 7075 74 discriminator 1 view .LVU199
743 001c 4FF0010C mov ip, #1
744 .L46:
745 .LVL65:
746 .loc 2 7075 74 discriminator 1 view .LVU200
747 .LBE276:
748 .LBE275:
292:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
749 .loc 1 292 3 is_stmt 1 view .LVU201
750 .LBB277:
751 .LBI277:
7076:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7077:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7078:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7079:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular command of conversion stop state
7080:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing
7081:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7082:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: no command of conversion stop is on going on ADC group regular.
7083:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7084:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(const ADC_TypeDef *ADCx)
7085:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7086:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP)) ? 1UL : 0UL);
7087:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7088:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7089:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7090:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for
7091:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * all ADC configurations: all ADC resolutions and
7092:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * all oversampling increased data width (for devices
7093:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * with feature oversampling).
7094:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData32
7095:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7096:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
7097:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7098:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(const ADC_TypeDef *ADCx)
7099:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7100:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
7101:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7102:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7103:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7104:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for
7105:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution 16 bits.
7106:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling
7107:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * can increase data width, function for extended range
7108:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32.
7109:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData16
7110:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7111:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFFFF
7112:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7113:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData16(const ADC_TypeDef *ADCx)
7114:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7115:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
7116:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7117:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7118:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7119:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for
7120:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution 14 bits.
7121:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling
ARM GAS /tmp/ccTOAmWG.s page 164
7122:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * can increase data width, function for extended range
7123:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32.
7124:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData14
7125:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7126:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x3FF
7127:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7128:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData14(const ADC_TypeDef *ADCx)
7129:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7130:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
7131:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7132:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7133:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7134:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for
7135:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution 12 bits.
7136:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling
7137:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * can increase data width, function for extended range
7138:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32.
7139:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData12
7140:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7141:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
7142:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7143:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(const ADC_TypeDef *ADCx)
7144:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7145:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
7146:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7147:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7148:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7149:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for
7150:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution 10 bits.
7151:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling
7152:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * can increase data width, function for extended range
7153:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32.
7154:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData10
7155:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7156:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0x3FF
7157:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7158:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(const ADC_TypeDef *ADCx)
7159:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7160:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
7161:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7162:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7163:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7164:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for
7165:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC resolution 8 bits.
7166:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling
7167:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * can increase data width, function for extended range
7168:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32.
7169:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData8
7170:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7171:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF
7172:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7173:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(const ADC_TypeDef *ADCx)
7174:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7175:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA));
7176:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7177:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7178:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC multimode conversion data of ADC master, ADC slave
ARM GAS /tmp/ccTOAmWG.s page 165
7179:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * or raw data with ADC master and slave concatenated.
7180:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note If raw data with ADC master and slave concatenated is retrieved,
7181:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * a macro is available to get the conversion data of
7182:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC master or ADC slave: see helper macro
7183:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE().
7184:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (however this macro is mainly intended for multimode
7185:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * transfer by DMA, because this function can do the same
7186:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * by getting multimode conversion data of ADC master or ADC slave
7187:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * separately).
7188:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CDR RDATA_MST LL_ADC_REG_ReadMultiConversionData32\n
7189:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_REG_ReadMultiConversionData32
7190:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance
7191:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
7192:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ConversionData This parameter can be one of the following values:
7193:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER
7194:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE
7195:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER_SLAVE
7196:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
7197:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7198:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadMultiConversionData32(const ADC_Common_TypeDef *ADCxy_COMMO
7199:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7200:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CDR,
7201:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ConversionData)
7202:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** >> (POSITION_VAL(ConversionData) & 0x1FUL)
7203:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** );
7204:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7205:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7206:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7207:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @}
7208:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7209:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7210:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Injected Operation on ADC hierarchical scope: group inj
7211:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @{
7212:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7213:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7214:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7215:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Start ADC group injected conversion.
7216:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both
7217:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * internal trigger (SW start) and external trigger:
7218:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion
7219:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * starts immediately.
7220:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion
7221:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge)
7222:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * following the ADC start conversion command.
7223:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
7224:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
7225:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be enabled without conversion on going on group injected,
7226:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without conversion stop command on going on group injected,
7227:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without ADC disable command on going.
7228:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_StartConversion
7229:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7230:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
7231:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StartConversion(ADC_TypeDef *ADCx)
7233:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7234:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
7235:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
ARM GAS /tmp/ccTOAmWG.s page 166
7236:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
7237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
7238:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
7239:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_JADSTART);
7240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7241:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7242:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7243:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Stop ADC group injected conversion.
7244:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to
7245:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC state:
7246:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * ADC must be enabled with conversion on going on group injected,
7247:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * without ADC disable command on going.
7248:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR JADSTP LL_ADC_INJ_StopConversion
7249:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7250:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval None
7251:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7252:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx)
7253:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7254:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */
7255:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */
7256:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */
7257:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(ADCx->CR,
7258:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
7259:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_JADSTP);
7260:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
7261:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
7262:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** /**
7263:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @brief Get ADC group injected conversion state.
7264:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing
7265:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @param ADCx ADC instance
7266:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group injected.
7267:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** */
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(const ADC_TypeDef *ADCx)
752 .loc 2 7268 26 view .LVU202
753 .LBB278:
7269:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
7270:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART)) ? 1UL : 0UL);
754 .loc 2 7270 3 view .LVU203
755 .loc 2 7270 12 is_stmt 0 view .LVU204
756 0020 8368 ldr r3, [r0, #8]
757 .loc 2 7270 76 view .LVU205
758 0022 13F00803 ands r3, r3, #8
759 0026 00D0 beq .L47
760 .loc 2 7270 76 discriminator 1 view .LVU206
761 0028 0123 movs r3, #1
762 .L47:
763 .LVL66:
764 .loc 2 7270 76 discriminator 1 view .LVU207
765 .LBE278:
766 .LBE277:
293:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
294:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL)
767 .loc 1 294 3 is_stmt 1 view .LVU208
768 .LBB279:
769 .LBI279:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
770 .loc 2 6941 26 view .LVU209
ARM GAS /tmp/ccTOAmWG.s page 167
771 .LBB280:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
772 .loc 2 6943 3 view .LVU210
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
773 .loc 2 6943 12 is_stmt 0 view .LVU211
774 002a 8568 ldr r5, [r0, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
775 .loc 2 6943 68 view .LVU212
776 002c 15F0010F tst r5, #1
777 0030 02D0 beq .L48
778 .LVL67:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
779 .loc 2 6943 68 view .LVU213
780 .LBE280:
781 .LBE279:
295:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_regular == 0UL)
296:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL)
782 .loc 1 296 7 view .LVU214
783 0032 53EA0C03 orrs r3, r3, ip
784 .LVL68:
785 .loc 1 296 7 view .LVU215
786 0036 0CD0 beq .L52
787 .L48:
297:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
298:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
299:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set the selected ADC calibration value */
300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetCalibrationOffsetFactor(hadc->Instance, SingleDiff, CalibrationFactor);
301:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
302:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
303:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
304:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine */
305:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
788 .loc 1 305 5 is_stmt 1 view .LVU216
789 0038 636D ldr r3, [r4, #84]
790 003a 43F02003 orr r3, r3, #32
791 003e 6365 str r3, [r4, #84]
306:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC error code */
307:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
792 .loc 1 307 5 view .LVU217
793 0040 A36D ldr r3, [r4, #88]
794 0042 43F00103 orr r3, r3, #1
795 0046 A365 str r3, [r4, #88]
308:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
309:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
310:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
796 .loc 1 310 5 view .LVU218
797 .LVL69:
798 .loc 1 310 20 is_stmt 0 view .LVU219
799 0048 0120 movs r0, #1
800 .LVL70:
801 .L49:
311:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
312:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
313:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
314:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
802 .loc 1 314 3 is_stmt 1 view .LVU220
803 .loc 1 314 3 view .LVU221
ARM GAS /tmp/ccTOAmWG.s page 168
804 004a 0023 movs r3, #0
805 004c 84F85030 strb r3, [r4, #80]
806 .loc 1 314 3 view .LVU222
315:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
316:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
317:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
807 .loc 1 317 3 view .LVU223
808 .LVL71:
809 .L45:
318:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
810 .loc 1 318 1 is_stmt 0 view .LVU224
811 0050 38BD pop {r3, r4, r5, pc}
812 .LVL72:
813 .L52:
300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
814 .loc 1 300 5 is_stmt 1 view .LVU225
815 0052 FFF7FEFF bl LL_ADC_SetCalibrationOffsetFactor
816 .LVL73:
265:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular;
817 .loc 1 265 21 is_stmt 0 view .LVU226
818 0056 0020 movs r0, #0
300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
819 .loc 1 300 5 view .LVU227
820 0058 F7E7 b .L49
821 .LVL74:
822 .L50:
287:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
823 .loc 1 287 3 discriminator 1 view .LVU228
824 005a 0220 movs r0, #2
825 .LVL75:
287:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
826 .loc 1 287 3 discriminator 1 view .LVU229
827 005c F8E7 b .L45
828 .cfi_endproc
829 .LFE338:
831 .section .text.HAL_ADCEx_LinearCalibration_SetValue,"ax",%progbits
832 .align 1
833 .global HAL_ADCEx_LinearCalibration_SetValue
834 .syntax unified
835 .thumb
836 .thumb_func
838 HAL_ADCEx_LinearCalibration_SetValue:
839 .LVL76:
840 .LFB339:
319:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
320:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
321:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Set the linear calibration factor
322:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
323:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param LinearCalib_Buffer: Linear calibration factor
324:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL state
325:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
326:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t *LinearCal
327:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
841 .loc 1 327 1 is_stmt 1 view -0
842 .cfi_startproc
843 @ args = 0, pretend = 0, frame = 8
844 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/ccTOAmWG.s page 169
845 .loc 1 327 1 is_stmt 0 view .LVU231
846 0000 F0B5 push {r4, r5, r6, r7, lr}
847 .cfi_def_cfa_offset 20
848 .cfi_offset 4, -20
849 .cfi_offset 5, -16
850 .cfi_offset 6, -12
851 .cfi_offset 7, -8
852 .cfi_offset 14, -4
853 0002 83B0 sub sp, sp, #12
854 .cfi_def_cfa_offset 32
855 0004 0446 mov r4, r0
856 0006 0E46 mov r6, r1
328:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t cnt;
857 .loc 1 328 3 is_stmt 1 view .LVU232
329:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0;
858 .loc 1 329 3 view .LVU233
859 .loc 1 329 17 is_stmt 0 view .LVU234
860 0008 0023 movs r3, #0
861 000a 0193 str r3, [sp, #4]
330:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t temp_REG_IsConversionOngoing = 0UL;
862 .loc 1 330 3 is_stmt 1 view .LVU235
863 .LVL77:
331:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
332:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
333:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
864 .loc 1 333 3 view .LVU236
334:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
335:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Exit from deep-power-down mode and ADC voltage regulator enable */
336:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Exit deep power down mode if still in that state */
337:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_DEEPPWD))
865 .loc 1 337 3 view .LVU237
866 .loc 1 337 7 is_stmt 0 view .LVU238
867 000c 0368 ldr r3, [r0]
868 000e 9A68 ldr r2, [r3, #8]
869 .loc 1 337 6 view .LVU239
870 0010 12F0005F tst r2, #536870912
871 0014 03D0 beq .L54
338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
339:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Exit deep power down mode */
340:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD);
872 .loc 1 340 5 is_stmt 1 view .LVU240
873 0016 9A68 ldr r2, [r3, #8]
874 0018 22F00052 bic r2, r2, #536870912
875 001c 9A60 str r2, [r3, #8]
876 .L54:
341:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
342:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* System was in deep power down mode, calibration must
343:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** be relaunched or a previously saved calibration factor
344:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** re-applied once the ADC voltage regulator is enabled */
345:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
346:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
347:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
348:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
877 .loc 1 348 3 view .LVU241
878 .loc 1 348 7 is_stmt 0 view .LVU242
879 001e 2368 ldr r3, [r4]
880 0020 9A68 ldr r2, [r3, #8]
ARM GAS /tmp/ccTOAmWG.s page 170
881 .loc 1 348 6 view .LVU243
882 0022 12F0805F tst r2, #268435456
883 0026 13D1 bne .L55
349:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
350:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable ADC internal voltage regulator */
351:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN);
884 .loc 1 351 5 is_stmt 1 view .LVU244
885 0028 9A68 ldr r2, [r3, #8]
886 002a 42F08052 orr r2, r2, #268435456
887 002e 9A60 str r2, [r3, #8]
352:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Delay for ADC stabilization time */
353:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Wait loop initialization and execution */
354:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: Variable divided by 2 to compensate partially */
355:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* CPU processing cycles. */
356:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** wait_loop_index = ((ADC_STAB_DELAY_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
888 .loc 1 356 5 view .LVU245
889 .loc 1 356 71 is_stmt 0 view .LVU246
890 0030 374B ldr r3, .L71
891 0032 1B68 ldr r3, [r3]
892 0034 9B09 lsrs r3, r3, #6
893 0036 374A ldr r2, .L71+4
894 0038 A2FB0323 umull r2, r3, r2, r3
895 003c 9B09 lsrs r3, r3, #6
896 .loc 1 356 51 view .LVU247
897 003e 0133 adds r3, r3, #1
898 .loc 1 356 21 view .LVU248
899 0040 0193 str r3, [sp, #4]
357:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (wait_loop_index != 0UL)
900 .loc 1 357 5 is_stmt 1 view .LVU249
901 .loc 1 357 11 is_stmt 0 view .LVU250
902 0042 02E0 b .L56
903 .L57:
358:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
359:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** wait_loop_index--;
904 .loc 1 359 7 is_stmt 1 view .LVU251
905 .loc 1 359 22 is_stmt 0 view .LVU252
906 0044 019B ldr r3, [sp, #4]
907 0046 013B subs r3, r3, #1
908 0048 0193 str r3, [sp, #4]
909 .L56:
357:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (wait_loop_index != 0UL)
910 .loc 1 357 28 is_stmt 1 view .LVU253
911 004a 019B ldr r3, [sp, #4]
912 004c 002B cmp r3, #0
913 004e F9D1 bne .L57
914 .L55:
360:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
361:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
362:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
363:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
364:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Verification that ADC voltage regulator is correctly enabled, whether */
365:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* or not ADC is coming from state reset (if any potential problem of */
366:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* clocking, voltage regulator would not be enabled). */
367:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
915 .loc 1 367 3 view .LVU254
916 .loc 1 367 7 is_stmt 0 view .LVU255
917 0050 2368 ldr r3, [r4]
ARM GAS /tmp/ccTOAmWG.s page 171
918 0052 9A68 ldr r2, [r3, #8]
919 .loc 1 367 6 view .LVU256
920 0054 12F0805F tst r2, #268435456
921 0058 09D0 beq .L70
368:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
369:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
370:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
371:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
372:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC error code to ADC peripheral internal error */
373:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
374:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
375:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
376:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
377:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable the ADC peripheral */
378:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) /* Enable the ADC if it is disabled */
922 .loc 1 378 3 is_stmt 1 view .LVU257
923 .LVL78:
924 .LBB281:
925 .LBI281:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
926 .loc 2 6941 26 view .LVU258
927 .LBB282:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
928 .loc 2 6943 3 view .LVU259
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
929 .loc 2 6943 12 is_stmt 0 view .LVU260
930 005a 9A68 ldr r2, [r3, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
931 .loc 2 6943 68 view .LVU261
932 005c 12F0010F tst r2, #1
933 0060 11D0 beq .L60
934 .LVL79:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
935 .loc 2 6943 68 view .LVU262
936 .LBE282:
937 .LBE281:
379:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
380:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (ADC_Enable(hadc) != HAL_OK)
381:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
382:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
383:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
384:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
385:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
386:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** for (cnt = ADC_LINEAR_CALIB_REG_COUNT; cnt > 0UL ; cnt--)
387:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
388:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetCalibrationLinearFactor(hadc->Instance, ADC_CR_LINCALRDYW6 >> (ADC_LINEAR_CALIB_R
389:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
390:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (void)ADC_Disable(hadc);
391:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
392:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
393:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else /* ADC is already enabled, so no need to enable it but need to stop conversion */
394:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
395:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
938 .loc 1 395 5 is_stmt 1 view .LVU263
939 .LBB283:
940 .LBI283:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
ARM GAS /tmp/ccTOAmWG.s page 172
941 .loc 2 7073 26 view .LVU264
942 .LBB284:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
943 .loc 2 7075 3 view .LVU265
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
944 .loc 2 7075 12 is_stmt 0 view .LVU266
945 0062 9F68 ldr r7, [r3, #8]
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
946 .loc 2 7075 74 view .LVU267
947 0064 17F00407 ands r7, r7, #4
948 0068 2AD1 bne .L61
949 .LVL80:
950 .L62:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
951 .loc 2 7075 74 view .LVU268
952 .LBE284:
953 .LBE283:
396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
397:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_REG_StopConversion(hadc->Instance);
398:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** temp_REG_IsConversionOngoing = 1UL;
399:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
400:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** for (cnt = ADC_LINEAR_CALIB_REG_COUNT; cnt > 0UL ; cnt--)
954 .loc 1 400 5 is_stmt 1 view .LVU269
955 .loc 1 400 14 is_stmt 0 view .LVU270
956 006a 0625 movs r5, #6
957 .loc 1 400 5 view .LVU271
958 006c 3FE0 b .L65
959 .LVL81:
960 .L70:
370:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
961 .loc 1 370 5 is_stmt 1 view .LVU272
962 006e 636D ldr r3, [r4, #84]
963 0070 43F01003 orr r3, r3, #16
964 0074 6365 str r3, [r4, #84]
373:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
965 .loc 1 373 5 view .LVU273
966 0076 A36D ldr r3, [r4, #88]
967 0078 43F00103 orr r3, r3, #1
968 007c A365 str r3, [r4, #88]
375:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
969 .loc 1 375 5 view .LVU274
375:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
970 .loc 1 375 13 is_stmt 0 view .LVU275
971 007e 0127 movs r7, #1
972 .LVL82:
973 .L59:
401:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
402:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetCalibrationLinearFactor(hadc->Instance, ADC_CR_LINCALRDYW6 >> (ADC_LINEAR_CALIB_REG
403:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
404:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (temp_REG_IsConversionOngoing != 0UL)
405:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
406:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_REG_StartConversion(hadc->Instance);
407:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
408:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
409:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_OK;
410:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
974 .loc 1 410 1 view .LVU276
ARM GAS /tmp/ccTOAmWG.s page 173
975 0080 3846 mov r0, r7
976 0082 03B0 add sp, sp, #12
977 .cfi_remember_state
978 .cfi_def_cfa_offset 20
979 @ sp needed
980 0084 F0BD pop {r4, r5, r6, r7, pc}
981 .LVL83:
982 .L60:
983 .cfi_restore_state
380:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
984 .loc 1 380 5 is_stmt 1 view .LVU277
380:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
985 .loc 1 380 9 is_stmt 0 view .LVU278
986 0086 2046 mov r0, r4
987 .LVL84:
380:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
988 .loc 1 380 9 view .LVU279
989 0088 FFF7FEFF bl ADC_Enable
990 .LVL85:
380:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
991 .loc 1 380 8 discriminator 1 view .LVU280
992 008c 0746 mov r7, r0
993 008e 0028 cmp r0, #0
994 0090 39D1 bne .L67
386:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
995 .loc 1 386 16 view .LVU281
996 0092 0625 movs r5, #6
997 0094 0EE0 b .L63
998 .LVL86:
999 .L64:
388:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1000 .loc 1 388 9 is_stmt 1 view .LVU282
388:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1001 .loc 1 388 109 is_stmt 0 view .LVU283
1002 0096 C5F10601 rsb r1, r5, #6
388:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1003 .loc 1 388 135 view .LVU284
1004 009a 6FF04043 mvn r3, #-1073741824
1005 009e 2B44 add r3, r3, r5
388:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1006 .loc 1 388 9 view .LVU285
1007 00a0 56F82320 ldr r2, [r6, r3, lsl #2]
1008 00a4 4FF00063 mov r3, #134217728
1009 00a8 23FA01F1 lsr r1, r3, r1
1010 00ac 2068 ldr r0, [r4]
1011 00ae FFF7FEFF bl LL_ADC_SetCalibrationLinearFactor
1012 .LVL87:
386:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1013 .loc 1 386 61 is_stmt 1 discriminator 3 view .LVU286
1014 00b2 013D subs r5, r5, #1
1015 .LVL88:
1016 .L63:
386:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1017 .loc 1 386 50 discriminator 1 view .LVU287
1018 00b4 002D cmp r5, #0
1019 00b6 EED1 bne .L64
390:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 174
1020 .loc 1 390 7 view .LVU288
390:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1021 .loc 1 390 13 is_stmt 0 view .LVU289
1022 00b8 2046 mov r0, r4
1023 00ba FFF7FEFF bl ADC_Disable
1024 .LVL89:
1025 00be DFE7 b .L59
1026 .LVL90:
1027 .L61:
397:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** temp_REG_IsConversionOngoing = 1UL;
1028 .loc 1 397 7 is_stmt 1 view .LVU290
1029 .LBB285:
1030 .LBI285:
7057:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1031 .loc 2 7057 22 view .LVU291
1032 .LBB286:
7062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
1033 .loc 2 7062 3 view .LVU292
1034 00c0 9968 ldr r1, [r3, #8]
1035 .LVL91:
7062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
1036 .loc 2 7062 3 is_stmt 0 view .LVU293
1037 00c2 154A ldr r2, .L71+8
1038 00c4 0A40 ands r2, r2, r1
1039 00c6 42F01002 orr r2, r2, #16
1040 00ca 9A60 str r2, [r3, #8]
1041 .LVL92:
7062:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
1042 .loc 2 7062 3 view .LVU294
1043 .LBE286:
1044 .LBE285:
398:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1045 .loc 1 398 7 is_stmt 1 view .LVU295
398:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1046 .loc 1 398 36 is_stmt 0 view .LVU296
1047 00cc 0127 movs r7, #1
1048 00ce CCE7 b .L62
1049 .LVL93:
1050 .L66:
402:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1051 .loc 1 402 7 is_stmt 1 view .LVU297
402:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1052 .loc 1 402 107 is_stmt 0 view .LVU298
1053 00d0 C5F10601 rsb r1, r5, #6
402:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1054 .loc 1 402 133 view .LVU299
1055 00d4 6FF04043 mvn r3, #-1073741824
1056 00d8 2B44 add r3, r3, r5
402:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1057 .loc 1 402 7 view .LVU300
1058 00da 56F82320 ldr r2, [r6, r3, lsl #2]
1059 00de 4FF00063 mov r3, #134217728
1060 00e2 23FA01F1 lsr r1, r3, r1
1061 00e6 2068 ldr r0, [r4]
1062 00e8 FFF7FEFF bl LL_ADC_SetCalibrationLinearFactor
1063 .LVL94:
400:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
ARM GAS /tmp/ccTOAmWG.s page 175
1064 .loc 1 400 59 is_stmt 1 discriminator 3 view .LVU301
1065 00ec 013D subs r5, r5, #1
1066 .LVL95:
1067 .L65:
400:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1068 .loc 1 400 48 discriminator 1 view .LVU302
1069 00ee 002D cmp r5, #0
1070 00f0 EED1 bne .L66
404:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1071 .loc 1 404 5 view .LVU303
404:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1072 .loc 1 404 8 is_stmt 0 view .LVU304
1073 00f2 57B1 cbz r7, .L68
406:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1074 .loc 1 406 7 is_stmt 1 view .LVU305
1075 00f4 2268 ldr r2, [r4]
1076 .LVL96:
1077 .LBB287:
1078 .LBI287:
7037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1079 .loc 2 7037 22 view .LVU306
1080 .LBB288:
7042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
1081 .loc 2 7042 3 view .LVU307
1082 00f6 9168 ldr r1, [r2, #8]
1083 00f8 074B ldr r3, .L71+8
1084 00fa 0B40 ands r3, r3, r1
1085 00fc 43F00403 orr r3, r3, #4
1086 0100 9360 str r3, [r2, #8]
1087 .LVL97:
7042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
1088 .loc 2 7042 3 is_stmt 0 view .LVU308
1089 .LBE288:
1090 .LBE287:
409:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1091 .loc 1 409 10 view .LVU309
1092 0102 0027 movs r7, #0
1093 .LVL98:
1094 .LBB290:
1095 .LBB289:
7045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1096 .loc 2 7045 1 view .LVU310
1097 0104 BCE7 b .L59
1098 .LVL99:
1099 .L67:
7045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1100 .loc 2 7045 1 view .LVU311
1101 .LBE289:
1102 .LBE290:
382:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1103 .loc 1 382 15 view .LVU312
1104 0106 0127 movs r7, #1
1105 0108 BAE7 b .L59
1106 .LVL100:
1107 .L68:
409:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1108 .loc 1 409 10 view .LVU313
ARM GAS /tmp/ccTOAmWG.s page 176
1109 010a 0027 movs r7, #0
1110 .LVL101:
409:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1111 .loc 1 409 10 view .LVU314
1112 010c B8E7 b .L59
1113 .L72:
1114 010e 00BF .align 2
1115 .L71:
1116 0110 00000000 .word SystemCoreClock
1117 0114 632D3E05 .word 87960931
1118 0118 C0FFFF7F .word 2147483584
1119 .cfi_endproc
1120 .LFE339:
1122 .section .text.HAL_ADCEx_LinearCalibration_FactorLoad,"ax",%progbits
1123 .align 1
1124 .global HAL_ADCEx_LinearCalibration_FactorLoad
1125 .syntax unified
1126 .thumb
1127 .thumb_func
1129 HAL_ADCEx_LinearCalibration_FactorLoad:
1130 .LVL102:
1131 .LFB340:
411:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
412:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
413:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Load the calibration factor from engi bytes
414:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
415:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL state
416:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
417:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_FactorLoad(ADC_HandleTypeDef *hadc)
418:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1132 .loc 1 418 1 is_stmt 1 view -0
1133 .cfi_startproc
1134 @ args = 0, pretend = 0, frame = 24
1135 @ frame_needed = 0, uses_anonymous_args = 0
1136 .loc 1 418 1 is_stmt 0 view .LVU316
1137 0000 00B5 push {lr}
1138 .cfi_def_cfa_offset 4
1139 .cfi_offset 14, -4
1140 0002 87B0 sub sp, sp, #28
1141 .cfi_def_cfa_offset 32
419:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1142 .loc 1 419 3 is_stmt 1 view .LVU317
1143 .LVL103:
420:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t cnt, FactorOffset;
1144 .loc 1 420 3 view .LVU318
421:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t LinearCalib_Buffer[ADC_LINEAR_CALIB_REG_COUNT];
1145 .loc 1 421 3 view .LVU319
422:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
423:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Linearity calibration is retrieved from engi bytes
424:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** read values from registers and put them to the CALFACT2 register */
425:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If needed linearity calibration can be done in runtime using
426:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_GetCalibrationLinearFactor() */
427:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC1)
1146 .loc 1 427 3 view .LVU320
1147 .loc 1 427 11 is_stmt 0 view .LVU321
1148 0004 0368 ldr r3, [r0]
1149 .loc 1 427 6 view .LVU322
ARM GAS /tmp/ccTOAmWG.s page 177
1150 0006 134A ldr r2, .L83
1151 0008 9342 cmp r3, r2
1152 000a 0AD0 beq .L78
428:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
429:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** FactorOffset = 0UL;
430:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
431:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else if (hadc->Instance == ADC2)
1153 .loc 1 431 8 is_stmt 1 view .LVU323
1154 .loc 1 431 11 is_stmt 0 view .LVU324
1155 000c 02F58072 add r2, r2, #256
1156 0010 9342 cmp r3, r2
1157 0012 03D0 beq .L82
432:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
433:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** FactorOffset = 8UL;
434:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
435:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else /*Case ADC3*/
436:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
437:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** FactorOffset = 16UL;
1158 .loc 1 437 18 view .LVU325
1159 0014 4FF0100C mov ip, #16
1160 .L74:
1161 .LVL104:
438:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
439:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
440:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** for (cnt = 0UL; cnt < ADC_LINEAR_CALIB_REG_COUNT; cnt++)
1162 .loc 1 440 3 is_stmt 1 view .LVU326
1163 .loc 1 440 12 is_stmt 0 view .LVU327
1164 0018 0023 movs r3, #0
1165 .loc 1 440 3 view .LVU328
1166 001a 10E0 b .L75
1167 .LVL105:
1168 .L82:
433:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1169 .loc 1 433 18 view .LVU329
1170 001c 4FF0080C mov ip, #8
1171 0020 FAE7 b .L74
1172 .L78:
429:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1173 .loc 1 429 18 view .LVU330
1174 0022 4FF0000C mov ip, #0
1175 0026 F7E7 b .L74
1176 .LVL106:
1177 .L76:
441:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
442:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LinearCalib_Buffer[cnt] = *(uint32_t *)(ADC_LINEAR_CALIB_REG_1_ADDR + FactorOffset + cnt);
1178 .loc 1 442 5 is_stmt 1 view .LVU331
1179 .loc 1 442 88 is_stmt 0 view .LVU332
1180 0028 03EB0C01 add r1, r3, ip
1181 .loc 1 442 32 view .LVU333
1182 002c 0A4A ldr r2, .L83+4
1183 .loc 1 442 31 view .LVU334
1184 002e 52F82110 ldr r1, [r2, r1, lsl #2]
1185 .loc 1 442 29 view .LVU335
1186 0032 06AA add r2, sp, #24
1187 0034 02EB8302 add r2, r2, r3, lsl #2
1188 0038 42F8181C str r1, [r2, #-24]
440:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
ARM GAS /tmp/ccTOAmWG.s page 178
1189 .loc 1 440 56 is_stmt 1 discriminator 3 view .LVU336
1190 003c 0133 adds r3, r3, #1
1191 .LVL107:
1192 .L75:
440:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1193 .loc 1 440 23 discriminator 1 view .LVU337
1194 003e 052B cmp r3, #5
1195 0040 F2D9 bls .L76
443:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
444:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (HAL_ADCEx_LinearCalibration_SetValue(hadc, (uint32_t *)LinearCalib_Buffer) != HAL_OK)
1196 .loc 1 444 3 view .LVU338
1197 .loc 1 444 7 is_stmt 0 view .LVU339
1198 0042 6946 mov r1, sp
1199 0044 FFF7FEFF bl HAL_ADCEx_LinearCalibration_SetValue
1200 .LVL108:
1201 .loc 1 444 6 discriminator 1 view .LVU340
1202 0048 00B1 cbz r0, .L77
445:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
446:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
1203 .loc 1 446 20 view .LVU341
1204 004a 0120 movs r0, #1
1205 .L77:
1206 .LVL109:
447:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
448:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
449:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
1207 .loc 1 449 3 is_stmt 1 view .LVU342
450:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1208 .loc 1 450 1 is_stmt 0 view .LVU343
1209 004c 07B0 add sp, sp, #28
1210 .cfi_def_cfa_offset 4
1211 @ sp needed
1212 004e 5DF804FB ldr pc, [sp], #4
1213 .L84:
1214 0052 00BF .align 2
1215 .L83:
1216 0054 00200240 .word 1073881088
1217 0058 00ECF11F .word 535948288
1218 .cfi_endproc
1219 .LFE340:
1221 .section .text.HAL_ADCEx_InjectedStart,"ax",%progbits
1222 .align 1
1223 .global HAL_ADCEx_InjectedStart
1224 .syntax unified
1225 .thumb
1226 .thumb_func
1228 HAL_ADCEx_InjectedStart:
1229 .LVL110:
1230 .LFB341:
451:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
452:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
453:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Enable ADC, start conversion of injected group.
454:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Interruptions enabled in this function: None.
455:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Case of multimode enabled when multimode feature is available:
456:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
457:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * then for ADC master.
458:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For ADC slave, ADC is enabled only (conversion is not started).
ARM GAS /tmp/ccTOAmWG.s page 179
459:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For ADC master, ADC is enabled and multimode conversion is started.
460:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle.
461:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
462:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
463:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc)
464:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1231 .loc 1 464 1 is_stmt 1 view -0
1232 .cfi_startproc
1233 @ args = 0, pretend = 0, frame = 0
1234 @ frame_needed = 0, uses_anonymous_args = 0
1235 .loc 1 464 1 is_stmt 0 view .LVU345
1236 0000 38B5 push {r3, r4, r5, lr}
1237 .cfi_def_cfa_offset 16
1238 .cfi_offset 3, -16
1239 .cfi_offset 4, -12
1240 .cfi_offset 5, -8
1241 .cfi_offset 14, -4
465:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
1242 .loc 1 465 3 is_stmt 1 view .LVU346
466:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_config_injected_queue;
1243 .loc 1 466 3 view .LVU347
467:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
1244 .loc 1 467 3 view .LVU348
1245 .LVL111:
1246 .LBB291:
1247 .LBI291:
6601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1248 .loc 2 6601 26 view .LVU349
1249 .LBB292:
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1250 .loc 2 6603 3 view .LVU350
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1251 .loc 2 6603 21 is_stmt 0 view .LVU351
1252 0002 394B ldr r3, .L106
1253 0004 9D68 ldr r5, [r3, #8]
1254 .LVL112:
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1255 .loc 2 6603 21 view .LVU352
1256 .LBE292:
1257 .LBE291:
468:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
469:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
470:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1258 .loc 1 470 3 is_stmt 1 view .LVU353
471:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
472:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
1259 .loc 1 472 3 view .LVU354
1260 .loc 1 472 42 is_stmt 0 view .LVU355
1261 0006 0368 ldr r3, [r0]
1262 .LVL113:
1263 .LBB293:
1264 .LBI293:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1265 .loc 2 7268 26 is_stmt 1 view .LVU356
1266 .LBB294:
1267 .loc 2 7270 3 view .LVU357
1268 .loc 2 7270 12 is_stmt 0 view .LVU358
ARM GAS /tmp/ccTOAmWG.s page 180
1269 0008 9A68 ldr r2, [r3, #8]
1270 .loc 2 7270 76 view .LVU359
1271 000a 12F0080F tst r2, #8
1272 000e 66D1 bne .L98
1273 0010 0446 mov r4, r0
1274 0012 05F01F05 and r5, r5, #31
1275 .LVL114:
1276 .loc 2 7270 76 view .LVU360
1277 .LBE294:
1278 .LBE293:
473:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
474:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_BUSY;
475:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
476:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
477:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
478:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* In case of software trigger detection enabled, JQDIS must be set
479:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (which can be done only if ADSTART and JADSTART are both cleared).
480:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** If JQDIS is not set at that point, returns an error
481:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** - since software trigger detection is disabled. User needs to
482:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
483:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
484:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** the queue is empty */
485:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
1279 .loc 1 485 5 is_stmt 1 view .LVU361
1280 .loc 1 485 33 is_stmt 0 view .LVU362
1281 0016 DA68 ldr r2, [r3, #12]
1282 .LVL115:
486:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
487:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
1283 .loc 1 487 5 is_stmt 1 view .LVU363
1284 .loc 1 487 10 is_stmt 0 view .LVU364
1285 0018 DB6C ldr r3, [r3, #76]
1286 .loc 1 487 8 view .LVU365
1287 001a 13F4C07F tst r3, #384
1288 001e 01D1 bne .L87
488:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** && (tmp_config_injected_queue == 0UL)
1289 .loc 1 488 9 view .LVU366
1290 0020 002A cmp r2, #0
1291 0022 3EDA bge .L103
1292 .L87:
489:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
490:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
491:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
492:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
493:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
494:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
495:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
496:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
1293 .loc 1 496 5 is_stmt 1 view .LVU367
1294 .loc 1 496 5 view .LVU368
1295 0024 94F85030 ldrb r3, [r4, #80] @ zero_extendqisi2
1296 0028 012B cmp r3, #1
1297 002a 5AD0 beq .L99
1298 .loc 1 496 5 discriminator 2 view .LVU369
1299 002c 0123 movs r3, #1
1300 002e 84F85030 strb r3, [r4, #80]
1301 .loc 1 496 5 view .LVU370
ARM GAS /tmp/ccTOAmWG.s page 181
497:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
498:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable the ADC peripheral */
499:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc);
1302 .loc 1 499 5 view .LVU371
1303 .loc 1 499 22 is_stmt 0 view .LVU372
1304 0032 2046 mov r0, r4
1305 .LVL116:
1306 .loc 1 499 22 view .LVU373
1307 0034 FFF7FEFF bl ADC_Enable
1308 .LVL117:
500:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
501:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Start conversion if ADC is effectively enabled */
502:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
1309 .loc 1 502 5 is_stmt 1 view .LVU374
1310 .loc 1 502 8 is_stmt 0 view .LVU375
1311 0038 0028 cmp r0, #0
1312 003a 4CD1 bne .L88
503:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
504:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if a regular conversion is ongoing */
505:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
1313 .loc 1 505 7 is_stmt 1 view .LVU376
1314 .loc 1 505 16 is_stmt 0 view .LVU377
1315 003c 636D ldr r3, [r4, #84]
1316 .loc 1 505 10 view .LVU378
1317 003e 13F4807F tst r3, #256
1318 0042 34D0 beq .L89
506:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
507:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Reset ADC error code field related to injected conversions only */
508:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
1319 .loc 1 508 9 is_stmt 1 view .LVU379
1320 0044 A36D ldr r3, [r4, #88]
1321 0046 23F00803 bic r3, r3, #8
1322 004a A365 str r3, [r4, #88]
1323 .L90:
509:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
510:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
511:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
512:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC error code to none */
513:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc);
514:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
515:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
516:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
517:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Clear state bitfield related to injected group conversion results */
518:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Set state bitfield related to injected operation */
519:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
1324 .loc 1 519 7 view .LVU380
1325 004c 626D ldr r2, [r4, #84]
1326 004e 274B ldr r3, .L106+4
1327 0050 1340 ands r3, r3, r2
1328 0052 43F48053 orr r3, r3, #4096
1329 0056 6365 str r3, [r4, #84]
520:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
521:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY);
522:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
523:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
524:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** - if ADC instance is master or if multimode feature is not available
525:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */
ARM GAS /tmp/ccTOAmWG.s page 182
526:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
1330 .loc 1 526 7 view .LVU381
1331 .loc 1 526 12 is_stmt 0 view .LVU382
1332 0058 2368 ldr r3, [r4]
1333 005a 254A ldr r2, .L106+8
1334 005c 9342 cmp r3, r2
1335 005e 29D0 beq .L104
1336 .loc 1 526 12 discriminator 1 view .LVU383
1337 0060 1A46 mov r2, r3
1338 .L91:
1339 .loc 1 526 10 discriminator 4 view .LVU384
1340 0062 9342 cmp r3, r2
1341 0064 00D0 beq .L92
527:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
1342 .loc 1 527 11 view .LVU385
1343 0066 1DB9 cbnz r5, .L93
1344 .L92:
528:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
529:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
530:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1345 .loc 1 530 9 is_stmt 1 view .LVU386
1346 0068 626D ldr r2, [r4, #84]
1347 006a 22F48012 bic r2, r2, #1048576
1348 006e 6265 str r2, [r4, #84]
1349 .L93:
531:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
532:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
533:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear ADC group injected group conversion flag */
534:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */
535:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
1350 .loc 1 535 7 view .LVU387
1351 0070 6022 movs r2, #96
1352 0072 1A60 str r2, [r3]
536:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
537:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
538:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */
539:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */
540:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1353 .loc 1 540 7 view .LVU388
1354 .loc 1 540 7 view .LVU389
1355 0074 0023 movs r3, #0
1356 0076 84F85030 strb r3, [r4, #80]
1357 .loc 1 540 7 view .LVU390
541:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
542:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable conversion of injected group, if automatic injected conversion */
543:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* is disabled. */
544:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */
545:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */
546:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* trigger event. */
547:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Case of multimode enabled (when multimode feature is available): */
548:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* if ADC is slave, */
549:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - ADC is enabled only (conversion is not started), */
550:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - if multimode only concerns regular conversion, ADC is enabled */
551:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* and conversion is started. */
552:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If ADC is master or independent, */
553:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - ADC is enabled and conversion is started. */
554:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
ARM GAS /tmp/ccTOAmWG.s page 183
1358 .loc 1 554 7 view .LVU391
1359 .loc 1 554 12 is_stmt 0 view .LVU392
1360 007a 2368 ldr r3, [r4]
1361 007c 1C4A ldr r2, .L106+8
1362 007e 9342 cmp r3, r2
1363 0080 1BD0 beq .L105
1364 .loc 1 554 12 discriminator 1 view .LVU393
1365 0082 1A46 mov r2, r3
1366 .L94:
1367 .loc 1 554 10 discriminator 4 view .LVU394
1368 0084 9342 cmp r3, r2
1369 0086 1BD0 beq .L95
555:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
556:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
1370 .loc 1 556 36 view .LVU395
1371 0088 062D cmp r5, #6
1372 008a 14BF ite ne
1373 008c 0022 movne r2, #0
1374 008e 0122 moveq r2, #1
1375 .loc 1 556 11 view .LVU396
1376 0090 B5B1 cbz r5, .L95
1377 0092 AAB9 cbnz r2, .L95
557:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
1378 .loc 1 557 11 view .LVU397
1379 0094 072D cmp r5, #7
1380 0096 13D0 beq .L95
558:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
559:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
560:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl
561:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
562:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
563:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance);
564:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
565:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
566:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
567:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
568:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl
569:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1381 .loc 1 569 9 is_stmt 1 view .LVU398
1382 0098 636D ldr r3, [r4, #84]
1383 009a 43F48013 orr r3, r3, #1048576
1384 009e 6365 str r3, [r4, #84]
1385 00a0 1EE0 b .L86
1386 .LVL118:
1387 .L103:
491:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
1388 .loc 1 491 7 view .LVU399
1389 00a2 436D ldr r3, [r0, #84]
1390 00a4 43F02003 orr r3, r3, #32
1391 00a8 4365 str r3, [r0, #84]
492:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1392 .loc 1 492 7 view .LVU400
492:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1393 .loc 1 492 14 is_stmt 0 view .LVU401
1394 00aa 0120 movs r0, #1
1395 .LVL119:
492:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 184
1396 .loc 1 492 14 view .LVU402
1397 00ac 18E0 b .L86
1398 .LVL120:
1399 .L89:
513:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1400 .loc 1 513 9 is_stmt 1 view .LVU403
1401 00ae 0023 movs r3, #0
1402 00b0 A365 str r3, [r4, #88]
1403 00b2 CBE7 b .L90
1404 .L104:
526:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
1405 .loc 1 526 12 is_stmt 0 discriminator 2 view .LVU404
1406 00b4 A2F58072 sub r2, r2, #256
1407 00b8 D3E7 b .L91
1408 .L105:
554:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
1409 .loc 1 554 12 discriminator 2 view .LVU405
1410 00ba A2F58072 sub r2, r2, #256
1411 00be E1E7 b .L94
1412 .L95:
561:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1413 .loc 1 561 9 is_stmt 1 view .LVU406
1414 .LVL121:
1415 .LBB295:
1416 .LBI295:
5017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1417 .loc 2 5017 26 view .LVU407
1418 .LBB296:
5019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1419 .loc 2 5019 3 view .LVU408
5019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1420 .loc 2 5019 21 is_stmt 0 view .LVU409
1421 00c0 DA68 ldr r2, [r3, #12]
1422 .LVL122:
5019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1423 .loc 2 5019 21 view .LVU410
1424 .LBE296:
1425 .LBE295:
561:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1426 .loc 1 561 12 discriminator 1 view .LVU411
1427 00c2 12F0007F tst r2, #33554432
1428 00c6 0BD1 bne .L86
563:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1429 .loc 1 563 11 is_stmt 1 view .LVU412
1430 .LVL123:
1431 .LBB297:
1432 .LBI297:
7232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1433 .loc 2 7232 22 view .LVU413
1434 .LBB298:
7237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
1435 .loc 2 7237 3 view .LVU414
1436 00c8 9968 ldr r1, [r3, #8]
1437 00ca 0A4A ldr r2, .L106+12
1438 00cc 0A40 ands r2, r2, r1
1439 00ce 42F00802 orr r2, r2, #8
1440 00d2 9A60 str r2, [r3, #8]
ARM GAS /tmp/ccTOAmWG.s page 185
1441 .LVL124:
7240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1442 .loc 2 7240 1 is_stmt 0 view .LVU415
1443 00d4 04E0 b .L86
1444 .L88:
7240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
1445 .loc 2 7240 1 view .LVU416
1446 .LBE298:
1447 .LBE297:
570:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
571:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
572:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
573:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
574:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
575:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
576:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1448 .loc 1 576 7 is_stmt 1 view .LVU417
1449 .loc 1 576 7 view .LVU418
1450 00d6 0023 movs r3, #0
1451 00d8 84F85030 strb r3, [r4, #80]
1452 .loc 1 576 7 discriminator 1 view .LVU419
577:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
578:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
579:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
580:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
1453 .loc 1 580 5 view .LVU420
1454 .loc 1 580 12 is_stmt 0 view .LVU421
1455 00dc 00E0 b .L86
1456 .LVL125:
1457 .L98:
474:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1458 .loc 1 474 12 view .LVU422
1459 00de 0220 movs r0, #2
1460 .LVL126:
1461 .L86:
581:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
582:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1462 .loc 1 582 1 view .LVU423
1463 00e0 38BD pop {r3, r4, r5, pc}
1464 .LVL127:
1465 .L99:
496:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1466 .loc 1 496 5 discriminator 1 view .LVU424
1467 00e2 0220 movs r0, #2
1468 .LVL128:
496:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1469 .loc 1 496 5 discriminator 1 view .LVU425
1470 00e4 FCE7 b .L86
1471 .L107:
1472 00e6 00BF .align 2
1473 .L106:
1474 00e8 00230240 .word 1073881856
1475 00ec FECFFFFF .word -12290
1476 00f0 00210240 .word 1073881344
1477 00f4 C0FFFF7F .word 2147483584
1478 .cfi_endproc
1479 .LFE341:
ARM GAS /tmp/ccTOAmWG.s page 186
1481 .section .text.HAL_ADCEx_InjectedStop,"ax",%progbits
1482 .align 1
1483 .global HAL_ADCEx_InjectedStop
1484 .syntax unified
1485 .thumb
1486 .thumb_func
1488 HAL_ADCEx_InjectedStop:
1489 .LVL129:
1490 .LFB342:
583:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
584:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
585:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Stop conversion of injected channels. Disable ADC peripheral if
586:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * no regular conversion is on going.
587:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note If ADC must be disabled and if conversion is on going on
588:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * regular group, function HAL_ADC_Stop must be used to stop both
589:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * injected and regular groups, and disable the ADC.
590:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note If injected group mode auto-injection is enabled,
591:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * function HAL_ADC_Stop must be used.
592:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note In case of multimode enabled (when multimode feature is available),
593:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
594:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For ADC master, conversion is stopped and ADC is disabled.
595:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For ADC slave, ADC is disabled only (conversion stop of ADC master
596:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * has already stopped conversion of ADC slave).
597:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle.
598:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
599:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
600:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc)
601:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1491 .loc 1 601 1 is_stmt 1 view -0
1492 .cfi_startproc
1493 @ args = 0, pretend = 0, frame = 0
1494 @ frame_needed = 0, uses_anonymous_args = 0
602:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
1495 .loc 1 602 3 view .LVU427
603:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
604:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
605:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1496 .loc 1 605 3 view .LVU428
606:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
607:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
608:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
1497 .loc 1 608 3 view .LVU429
1498 .loc 1 608 3 view .LVU430
1499 0000 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
1500 0004 012B cmp r3, #1
1501 0006 21D0 beq .L112
601:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
1502 .loc 1 601 1 is_stmt 0 view .LVU431
1503 0008 10B5 push {r4, lr}
1504 .cfi_def_cfa_offset 8
1505 .cfi_offset 4, -8
1506 .cfi_offset 14, -4
1507 000a 0446 mov r4, r0
1508 .loc 1 608 3 is_stmt 1 discriminator 2 view .LVU432
1509 000c 0123 movs r3, #1
1510 000e 80F85030 strb r3, [r0, #80]
1511 .loc 1 608 3 view .LVU433
ARM GAS /tmp/ccTOAmWG.s page 187
609:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
610:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Stop potential conversion on going on injected group only. */
611:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
1512 .loc 1 611 3 view .LVU434
1513 .loc 1 611 20 is_stmt 0 view .LVU435
1514 0012 0221 movs r1, #2
1515 0014 FFF7FEFF bl ADC_ConversionStop
1516 .LVL130:
612:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
613:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC peripheral if injected conversions are effectively stopped */
614:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* and if no conversion on regular group is on-going */
615:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
1517 .loc 1 615 3 is_stmt 1 view .LVU436
1518 .loc 1 615 6 is_stmt 0 view .LVU437
1519 0018 40B9 cbnz r0, .L110
616:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
617:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
1520 .loc 1 617 5 is_stmt 1 view .LVU438
1521 .loc 1 617 44 is_stmt 0 view .LVU439
1522 001a 2368 ldr r3, [r4]
1523 .LVL131:
1524 .LBB299:
1525 .LBI299:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1526 .loc 2 7073 26 is_stmt 1 view .LVU440
1527 .LBB300:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1528 .loc 2 7075 3 view .LVU441
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1529 .loc 2 7075 12 is_stmt 0 view .LVU442
1530 001c 9B68 ldr r3, [r3, #8]
1531 .LVL132:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1532 .loc 2 7075 74 view .LVU443
1533 001e 13F0040F tst r3, #4
1534 0022 07D0 beq .L111
1535 .LVL133:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1536 .loc 2 7075 74 view .LVU444
1537 .LBE300:
1538 .LBE299:
618:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
619:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */
620:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc);
621:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
622:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */
623:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
624:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
625:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
626:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
627:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
628:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY);
629:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
630:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
631:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */
632:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* conversion on regular group is still running. */
633:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
ARM GAS /tmp/ccTOAmWG.s page 188
634:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
635:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
636:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1539 .loc 1 636 7 is_stmt 1 view .LVU445
1540 0024 636D ldr r3, [r4, #84]
1541 0026 23F48053 bic r3, r3, #4096
1542 002a 6365 str r3, [r4, #84]
1543 .L110:
637:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
638:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
639:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
640:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
641:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1544 .loc 1 641 3 view .LVU446
1545 .loc 1 641 3 view .LVU447
1546 002c 0023 movs r3, #0
1547 002e 84F85030 strb r3, [r4, #80]
1548 .loc 1 641 3 view .LVU448
642:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
643:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
644:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
1549 .loc 1 644 3 view .LVU449
645:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1550 .loc 1 645 1 is_stmt 0 view .LVU450
1551 0032 10BD pop {r4, pc}
1552 .LVL134:
1553 .L111:
620:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1554 .loc 1 620 7 is_stmt 1 view .LVU451
620:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1555 .loc 1 620 24 is_stmt 0 view .LVU452
1556 0034 2046 mov r0, r4
1557 .LVL135:
620:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1558 .loc 1 620 24 view .LVU453
1559 0036 FFF7FEFF bl ADC_Disable
1560 .LVL136:
623:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1561 .loc 1 623 7 is_stmt 1 view .LVU454
623:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1562 .loc 1 623 10 is_stmt 0 view .LVU455
1563 003a 0028 cmp r0, #0
1564 003c F6D1 bne .L110
626:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1565 .loc 1 626 9 is_stmt 1 view .LVU456
1566 003e 626D ldr r2, [r4, #84]
1567 0040 034B ldr r3, .L117
1568 0042 1340 ands r3, r3, r2
1569 0044 43F00103 orr r3, r3, #1
1570 0048 6365 str r3, [r4, #84]
1571 004a EFE7 b .L110
1572 .LVL137:
1573 .L112:
1574 .cfi_def_cfa_offset 0
1575 .cfi_restore 4
1576 .cfi_restore 14
608:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 189
1577 .loc 1 608 3 is_stmt 0 discriminator 1 view .LVU457
1578 004c 0220 movs r0, #2
1579 .LVL138:
1580 .loc 1 645 1 view .LVU458
1581 004e 7047 bx lr
1582 .L118:
1583 .align 2
1584 .L117:
1585 0050 FEEEFFFF .word -4354
1586 .cfi_endproc
1587 .LFE342:
1589 .section .text.HAL_ADCEx_InjectedPollForConversion,"ax",%progbits
1590 .align 1
1591 .global HAL_ADCEx_InjectedPollForConversion
1592 .syntax unified
1593 .thumb
1594 .thumb_func
1596 HAL_ADCEx_InjectedPollForConversion:
1597 .LVL139:
1598 .LFB343:
646:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
647:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
648:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Wait for injected group conversion to be completed.
649:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
650:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param Timeout Timeout value in millisecond.
651:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
652:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * checked and cleared depending on AUTDLY bit status.
653:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
654:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
655:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
656:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1599 .loc 1 656 1 is_stmt 1 view -0
1600 .cfi_startproc
1601 @ args = 0, pretend = 0, frame = 0
1602 @ frame_needed = 0, uses_anonymous_args = 0
1603 .loc 1 656 1 is_stmt 0 view .LVU460
1604 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
1605 .cfi_def_cfa_offset 24
1606 .cfi_offset 4, -24
1607 .cfi_offset 5, -20
1608 .cfi_offset 6, -16
1609 .cfi_offset 7, -12
1610 .cfi_offset 8, -8
1611 .cfi_offset 14, -4
1612 0004 0446 mov r4, r0
1613 0006 0D46 mov r5, r1
657:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tickstart;
1614 .loc 1 657 3 is_stmt 1 view .LVU461
658:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_Flag_End;
1615 .loc 1 658 3 view .LVU462
659:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_inj_is_trigger_source_sw_start;
1616 .loc 1 659 3 view .LVU463
660:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_reg_is_trigger_source_sw_start;
1617 .loc 1 660 3 view .LVU464
661:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_cfgr;
1618 .loc 1 661 3 view .LVU465
662:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** const ADC_TypeDef *tmpADC_Master;
ARM GAS /tmp/ccTOAmWG.s page 190
1619 .loc 1 662 3 view .LVU466
663:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
1620 .loc 1 663 3 view .LVU467
1621 .LVL140:
1622 .LBB301:
1623 .LBI301:
6601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1624 .loc 2 6601 26 view .LVU468
1625 .LBB302:
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1626 .loc 2 6603 3 view .LVU469
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1627 .loc 2 6603 21 is_stmt 0 view .LVU470
1628 0008 3C4B ldr r3, .L145
1629 000a 9F68 ldr r7, [r3, #8]
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1630 .loc 2 6603 10 view .LVU471
1631 000c 07F01F07 and r7, r7, #31
1632 .LVL141:
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1633 .loc 2 6603 10 view .LVU472
1634 .LBE302:
1635 .LBE301:
664:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
665:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
666:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1636 .loc 1 666 3 is_stmt 1 view .LVU473
667:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
668:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If end of sequence selected */
669:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
1637 .loc 1 669 3 view .LVU474
1638 .loc 1 669 17 is_stmt 0 view .LVU475
1639 0010 0369 ldr r3, [r0, #16]
1640 .loc 1 669 6 view .LVU476
1641 0012 082B cmp r3, #8
1642 0014 1FD0 beq .L141
670:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
671:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_Flag_End = ADC_FLAG_JEOS;
672:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
673:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else /* end of conversion selected */
674:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
675:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_Flag_End = ADC_FLAG_JEOC;
1643 .loc 1 675 18 view .LVU477
1644 0016 2026 movs r6, #32
1645 .L120:
1646 .LVL142:
676:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
677:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
678:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Get timeout */
679:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tickstart = HAL_GetTick();
1647 .loc 1 679 3 is_stmt 1 view .LVU478
1648 .loc 1 679 15 is_stmt 0 view .LVU479
1649 0018 FFF7FEFF bl HAL_GetTick
1650 .LVL143:
1651 .loc 1 679 15 view .LVU480
1652 001c 8046 mov r8, r0
1653 .LVL144:
ARM GAS /tmp/ccTOAmWG.s page 191
680:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
681:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Wait until End of Conversion or Sequence flag is raised */
682:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL)
1654 .loc 1 682 3 is_stmt 1 view .LVU481
1655 .L122:
1656 .loc 1 682 47 view .LVU482
1657 .loc 1 682 15 is_stmt 0 view .LVU483
1658 001e 2368 ldr r3, [r4]
1659 .loc 1 682 25 view .LVU484
1660 0020 1A68 ldr r2, [r3]
1661 .loc 1 682 47 view .LVU485
1662 0022 3242 tst r2, r6
1663 0024 19D1 bne .L142
683:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
684:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if timeout is disabled (set to infinite wait) */
685:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (Timeout != HAL_MAX_DELAY)
1664 .loc 1 685 5 is_stmt 1 view .LVU486
1665 .loc 1 685 8 is_stmt 0 view .LVU487
1666 0026 B5F1FF3F cmp r5, #-1
1667 002a F8D0 beq .L122
686:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
687:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
1668 .loc 1 687 7 is_stmt 1 view .LVU488
1669 .loc 1 687 13 is_stmt 0 view .LVU489
1670 002c FFF7FEFF bl HAL_GetTick
1671 .LVL145:
1672 .loc 1 687 27 discriminator 1 view .LVU490
1673 0030 A0EB0800 sub r0, r0, r8
1674 .loc 1 687 10 discriminator 1 view .LVU491
1675 0034 A842 cmp r0, r5
1676 0036 01D8 bhi .L123
1677 .loc 1 687 51 discriminator 1 view .LVU492
1678 0038 002D cmp r5, #0
1679 003a F0D1 bne .L122
1680 .L123:
688:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
689:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if((hadc->Instance->ISR & tmp_Flag_End) == 0UL)
1681 .loc 1 689 9 is_stmt 1 view .LVU493
1682 .loc 1 689 17 is_stmt 0 view .LVU494
1683 003c 2368 ldr r3, [r4]
1684 .loc 1 689 27 view .LVU495
1685 003e 1B68 ldr r3, [r3]
1686 .loc 1 689 11 view .LVU496
1687 0040 3342 tst r3, r6
1688 0042 ECD1 bne .L122
690:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
691:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to timeout */
692:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1689 .loc 1 692 11 is_stmt 1 view .LVU497
1690 0044 636D ldr r3, [r4, #84]
1691 0046 43F00403 orr r3, r3, #4
1692 004a 6365 str r3, [r4, #84]
693:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
694:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
695:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1693 .loc 1 695 11 view .LVU498
1694 .loc 1 695 11 view .LVU499
ARM GAS /tmp/ccTOAmWG.s page 192
1695 004c 0023 movs r3, #0
1696 004e 84F85030 strb r3, [r4, #80]
1697 .loc 1 695 11 view .LVU500
696:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
697:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_TIMEOUT;
1698 .loc 1 697 11 view .LVU501
1699 .loc 1 697 18 is_stmt 0 view .LVU502
1700 0052 0320 movs r0, #3
1701 0054 47E0 b .L124
1702 .LVL146:
1703 .L141:
671:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1704 .loc 1 671 18 view .LVU503
1705 0056 4026 movs r6, #64
1706 0058 DEE7 b .L120
1707 .LVL147:
1708 .L142:
698:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
699:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
700:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
701:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
702:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
703:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Retrieve ADC configuration */
704:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance);
1709 .loc 1 704 3 is_stmt 1 view .LVU504
1710 .LBB303:
1711 .LBI303:
4715:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1712 .loc 2 4715 26 view .LVU505
1713 .LBB304:
4717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1714 .loc 2 4717 3 view .LVU506
4717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1715 .loc 2 4717 12 is_stmt 0 view .LVU507
1716 005a DA6C ldr r2, [r3, #76]
4717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1717 .loc 2 4717 105 view .LVU508
1718 005c 12F4C07F tst r2, #384
1719 0060 15D1 bne .L136
4717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1720 .loc 2 4717 105 discriminator 1 view .LVU509
1721 0062 0120 movs r0, #1
1722 .L126:
1723 .LVL148:
4717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1724 .loc 2 4717 105 discriminator 1 view .LVU510
1725 .LBE304:
1726 .LBE303:
705:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance);
1727 .loc 1 705 3 is_stmt 1 view .LVU511
1728 .LBB306:
1729 .LBI306:
3928:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1730 .loc 2 3928 26 view .LVU512
1731 .LBB307:
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1732 .loc 2 3930 3 view .LVU513
ARM GAS /tmp/ccTOAmWG.s page 193
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1733 .loc 2 3930 12 is_stmt 0 view .LVU514
1734 0064 DA68 ldr r2, [r3, #12]
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1735 .loc 2 3930 103 view .LVU515
1736 0066 12F4406F tst r2, #3072
1737 006a 12D1 bne .L137
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1738 .loc 2 3930 103 discriminator 1 view .LVU516
1739 006c 0125 movs r5, #1
1740 .LVL149:
1741 .L127:
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1742 .loc 2 3930 103 discriminator 1 view .LVU517
1743 .LBE307:
1744 .LBE306:
706:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Get relevant register CFGR in ADC instance of ADC master or slave */
707:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* in function of multimode state (for devices with multimode */
708:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* available). */
709:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
1745 .loc 1 709 3 is_stmt 1 view .LVU518
1746 .loc 1 709 8 is_stmt 0 view .LVU519
1747 006e 244A ldr r2, .L145+4
1748 0070 9342 cmp r3, r2
1749 0072 10D0 beq .L143
1750 .loc 1 709 8 discriminator 1 view .LVU520
1751 0074 1A46 mov r2, r3
1752 .L128:
1753 .loc 1 709 6 discriminator 4 view .LVU521
1754 0076 9342 cmp r3, r2
1755 0078 10D0 beq .L129
710:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
711:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
1756 .loc 1 711 32 view .LVU522
1757 007a 062F cmp r7, #6
1758 007c 14BF ite ne
1759 007e 0021 movne r1, #0
1760 0080 0121 moveq r1, #1
1761 .loc 1 711 7 view .LVU523
1762 0082 5FB1 cbz r7, .L129
1763 0084 51B9 cbnz r1, .L129
712:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
1764 .loc 1 712 7 view .LVU524
1765 0086 072F cmp r7, #7
1766 0088 08D0 beq .L129
713:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
714:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
715:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR);
716:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
717:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
718:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
719:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance);
1767 .loc 1 719 5 is_stmt 1 view .LVU525
1768 .LVL150:
720:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(tmpADC_Master->CFGR);
1769 .loc 1 720 5 view .LVU526
1770 .loc 1 720 14 is_stmt 0 view .LVU527
ARM GAS /tmp/ccTOAmWG.s page 194
1771 008a D168 ldr r1, [r2, #12]
1772 008c 07E0 b .L131
1773 .LVL151:
1774 .L136:
1775 .LBB309:
1776 .LBB305:
4717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1777 .loc 2 4717 105 discriminator 2 view .LVU528
1778 008e 0020 movs r0, #0
1779 0090 E8E7 b .L126
1780 .LVL152:
1781 .L137:
4717:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1782 .loc 2 4717 105 discriminator 2 view .LVU529
1783 .LBE305:
1784 .LBE309:
1785 .LBB310:
1786 .LBB308:
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1787 .loc 2 3930 103 discriminator 2 view .LVU530
1788 0092 0025 movs r5, #0
1789 .LVL153:
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1790 .loc 2 3930 103 discriminator 2 view .LVU531
1791 0094 EBE7 b .L127
1792 .LVL154:
1793 .L143:
3930:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1794 .loc 2 3930 103 discriminator 2 view .LVU532
1795 .LBE308:
1796 .LBE310:
709:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
1797 .loc 1 709 8 discriminator 2 view .LVU533
1798 0096 A2F58072 sub r2, r2, #256
1799 009a ECE7 b .L128
1800 .L129:
715:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1801 .loc 1 715 5 is_stmt 1 view .LVU534
715:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1802 .loc 1 715 14 is_stmt 0 view .LVU535
1803 009c D968 ldr r1, [r3, #12]
1804 .LVL155:
1805 .L131:
721:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
722:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
723:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine */
724:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
1806 .loc 1 724 3 is_stmt 1 view .LVU536
1807 009e 626D ldr r2, [r4, #84]
1808 00a0 42F40052 orr r2, r2, #8192
1809 00a4 6265 str r2, [r4, #84]
725:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
726:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Determine whether any further conversion upcoming on group injected */
727:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* by external trigger or by automatic injected conversion */
728:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* from group regular. */
729:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) ||
1810 .loc 1 729 3 view .LVU537
ARM GAS /tmp/ccTOAmWG.s page 195
1811 .loc 1 729 6 is_stmt 0 view .LVU538
1812 00a6 30B9 cbnz r0, .L132
1813 .loc 1 729 66 discriminator 1 view .LVU539
1814 00a8 11F0007F tst r1, #33554432
1815 00ac 16D1 bne .L133
730:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) &&
1816 .loc 1 730 57 view .LVU540
1817 00ae ADB1 cbz r5, .L133
731:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) &&
1818 .loc 1 731 58 view .LVU541
1819 00b0 11F4005F tst r1, #8192
1820 00b4 12D1 bne .L133
1821 .L132:
732:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL))))
733:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
734:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check whether end of sequence is reached */
735:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS))
1822 .loc 1 735 5 is_stmt 1 view .LVU542
1823 .loc 1 735 9 is_stmt 0 view .LVU543
1824 00b6 1A68 ldr r2, [r3]
1825 .loc 1 735 8 view .LVU544
1826 00b8 12F0400F tst r2, #64
1827 00bc 0ED0 beq .L133
736:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
737:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Particular case if injected contexts queue is enabled: */
738:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* when the last context has been fully processed, JSQR is reset */
739:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* by the hardware. Even if no injected conversion is planned to come */
740:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* (queue empty, triggers are ignored), it can start again */
741:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* immediately after setting a new context (JADSTART is still set). */
742:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Therefore, state of HAL ADC injected group is kept to busy. */
743:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL)
1828 .loc 1 743 7 is_stmt 1 view .LVU545
1829 .loc 1 743 10 is_stmt 0 view .LVU546
1830 00be 11F4001F tst r1, #2097152
1831 00c2 0BD1 bne .L133
744:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
745:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
746:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1832 .loc 1 746 9 is_stmt 1 view .LVU547
1833 00c4 626D ldr r2, [r4, #84]
1834 00c6 22F48052 bic r2, r2, #4096
1835 00ca 6265 str r2, [r4, #84]
747:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
748:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL)
1836 .loc 1 748 9 view .LVU548
1837 .loc 1 748 18 is_stmt 0 view .LVU549
1838 00cc 626D ldr r2, [r4, #84]
1839 .loc 1 748 12 view .LVU550
1840 00ce 12F4807F tst r2, #256
1841 00d2 03D1 bne .L133
749:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
750:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1842 .loc 1 750 11 is_stmt 1 view .LVU551
1843 00d4 626D ldr r2, [r4, #84]
1844 00d6 42F00102 orr r2, r2, #1
1845 00da 6265 str r2, [r4, #84]
1846 .L133:
ARM GAS /tmp/ccTOAmWG.s page 196
751:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
752:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
753:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
754:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
755:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
756:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear polled flag */
757:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_Flag_End == ADC_FLAG_JEOS)
1847 .loc 1 757 3 view .LVU552
1848 .loc 1 757 6 is_stmt 0 view .LVU553
1849 00dc 402E cmp r6, #64
1850 00de 04D0 beq .L144
758:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
759:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear end of sequence JEOS flag of injected group if low power feature */
760:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
761:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* For injected groups, no new conversion will start before JEOS is */
762:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* cleared. */
763:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL)
764:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
765:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
766:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
767:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
768:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
769:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
770:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
1851 .loc 1 770 5 is_stmt 1 view .LVU554
1852 00e0 2022 movs r2, #32
1853 00e2 1A60 str r2, [r3]
771:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
772:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
773:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return API HAL status */
774:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_OK;
1854 .loc 1 774 10 is_stmt 0 view .LVU555
1855 00e4 0020 movs r0, #0
1856 .LVL156:
1857 .L124:
775:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1858 .loc 1 775 1 view .LVU556
1859 00e6 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
1860 .LVL157:
1861 .L144:
763:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1862 .loc 1 763 5 is_stmt 1 view .LVU557
763:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1863 .loc 1 763 8 is_stmt 0 view .LVU558
1864 00ea 11F4804F tst r1, #16384
1865 00ee 03D1 bne .L139
765:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1866 .loc 1 765 7 is_stmt 1 view .LVU559
1867 00f0 6022 movs r2, #96
1868 00f2 1A60 str r2, [r3]
774:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1869 .loc 1 774 10 is_stmt 0 view .LVU560
1870 00f4 0020 movs r0, #0
1871 .LVL158:
774:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1872 .loc 1 774 10 view .LVU561
1873 00f6 F6E7 b .L124
ARM GAS /tmp/ccTOAmWG.s page 197
1874 .LVL159:
1875 .L139:
774:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1876 .loc 1 774 10 view .LVU562
1877 00f8 0020 movs r0, #0
1878 .LVL160:
774:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1879 .loc 1 774 10 view .LVU563
1880 00fa F4E7 b .L124
1881 .L146:
1882 .align 2
1883 .L145:
1884 00fc 00230240 .word 1073881856
1885 0100 00210240 .word 1073881344
1886 .cfi_endproc
1887 .LFE343:
1889 .section .text.HAL_ADCEx_InjectedStart_IT,"ax",%progbits
1890 .align 1
1891 .global HAL_ADCEx_InjectedStart_IT
1892 .syntax unified
1893 .thumb
1894 .thumb_func
1896 HAL_ADCEx_InjectedStart_IT:
1897 .LVL161:
1898 .LFB344:
776:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
777:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
778:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Enable ADC, start conversion of injected group with interruption.
779:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Interruptions enabled in this function according to initialization
780:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * setting : JEOC (end of conversion) or JEOS (end of sequence)
781:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Case of multimode enabled (when multimode feature is enabled):
782:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
783:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * then for ADC master.
784:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For ADC slave, ADC is enabled only (conversion is not started).
785:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For ADC master, ADC is enabled and multimode conversion is started.
786:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle.
787:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status.
788:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
789:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc)
790:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1899 .loc 1 790 1 is_stmt 1 view -0
1900 .cfi_startproc
1901 @ args = 0, pretend = 0, frame = 0
1902 @ frame_needed = 0, uses_anonymous_args = 0
1903 .loc 1 790 1 is_stmt 0 view .LVU565
1904 0000 38B5 push {r3, r4, r5, lr}
1905 .cfi_def_cfa_offset 16
1906 .cfi_offset 3, -16
1907 .cfi_offset 4, -12
1908 .cfi_offset 5, -8
1909 .cfi_offset 14, -4
791:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
1910 .loc 1 791 3 is_stmt 1 view .LVU566
792:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_config_injected_queue;
1911 .loc 1 792 3 view .LVU567
793:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
1912 .loc 1 793 3 view .LVU568
ARM GAS /tmp/ccTOAmWG.s page 198
1913 .LVL162:
1914 .LBB311:
1915 .LBI311:
6601:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1916 .loc 2 6601 26 view .LVU569
1917 .LBB312:
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1918 .loc 2 6603 3 view .LVU570
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1919 .loc 2 6603 21 is_stmt 0 view .LVU571
1920 0002 4A4B ldr r3, .L172
1921 0004 9D68 ldr r5, [r3, #8]
1922 .LVL163:
6603:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
1923 .loc 2 6603 21 view .LVU572
1924 .LBE312:
1925 .LBE311:
794:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
795:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
796:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1926 .loc 1 796 3 is_stmt 1 view .LVU573
797:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
798:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
1927 .loc 1 798 3 view .LVU574
1928 .loc 1 798 42 is_stmt 0 view .LVU575
1929 0006 0368 ldr r3, [r0]
1930 .LVL164:
1931 .LBB313:
1932 .LBI313:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
1933 .loc 2 7268 26 is_stmt 1 view .LVU576
1934 .LBB314:
1935 .loc 2 7270 3 view .LVU577
1936 .loc 2 7270 12 is_stmt 0 view .LVU578
1937 0008 9A68 ldr r2, [r3, #8]
1938 .loc 2 7270 76 view .LVU579
1939 000a 12F0080F tst r2, #8
1940 000e 40F08880 bne .L163
1941 0012 0446 mov r4, r0
1942 0014 05F01F05 and r5, r5, #31
1943 .LVL165:
1944 .loc 2 7270 76 view .LVU580
1945 .LBE314:
1946 .LBE313:
799:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
800:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_BUSY;
801:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
802:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
803:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
804:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* In case of software trigger detection enabled, JQDIS must be set
805:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (which can be done only if ADSTART and JADSTART are both cleared).
806:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** If JQDIS is not set at that point, returns an error
807:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** - since software trigger detection is disabled. User needs to
808:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
809:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
810:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** the queue is empty */
811:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
ARM GAS /tmp/ccTOAmWG.s page 199
1947 .loc 1 811 5 is_stmt 1 view .LVU581
1948 .loc 1 811 33 is_stmt 0 view .LVU582
1949 0018 DA68 ldr r2, [r3, #12]
1950 .LVL166:
812:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
813:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
1951 .loc 1 813 5 is_stmt 1 view .LVU583
1952 .loc 1 813 10 is_stmt 0 view .LVU584
1953 001a DB6C ldr r3, [r3, #76]
1954 .loc 1 813 8 view .LVU585
1955 001c 13F4C07F tst r3, #384
1956 0020 01D1 bne .L149
814:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** && (tmp_config_injected_queue == 0UL)
1957 .loc 1 814 9 view .LVU586
1958 0022 002A cmp r2, #0
1959 0024 54DA bge .L168
1960 .L149:
815:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
816:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
817:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
818:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
819:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
820:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
821:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
822:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
1961 .loc 1 822 5 is_stmt 1 view .LVU587
1962 .loc 1 822 5 view .LVU588
1963 0026 94F85030 ldrb r3, [r4, #80] @ zero_extendqisi2
1964 002a 012B cmp r3, #1
1965 002c 7BD0 beq .L164
1966 .loc 1 822 5 discriminator 2 view .LVU589
1967 002e 0123 movs r3, #1
1968 0030 84F85030 strb r3, [r4, #80]
1969 .loc 1 822 5 view .LVU590
823:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
824:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable the ADC peripheral */
825:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc);
1970 .loc 1 825 5 view .LVU591
1971 .loc 1 825 22 is_stmt 0 view .LVU592
1972 0034 2046 mov r0, r4
1973 .LVL167:
1974 .loc 1 825 22 view .LVU593
1975 0036 FFF7FEFF bl ADC_Enable
1976 .LVL168:
826:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
827:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Start conversion if ADC is effectively enabled */
828:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
1977 .loc 1 828 5 is_stmt 1 view .LVU594
1978 .loc 1 828 8 is_stmt 0 view .LVU595
1979 003a 0028 cmp r0, #0
1980 003c 6DD1 bne .L150
829:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
830:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if a regular conversion is ongoing */
831:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
1981 .loc 1 831 7 is_stmt 1 view .LVU596
1982 .loc 1 831 16 is_stmt 0 view .LVU597
1983 003e 636D ldr r3, [r4, #84]
ARM GAS /tmp/ccTOAmWG.s page 200
1984 .loc 1 831 10 view .LVU598
1985 0040 13F4807F tst r3, #256
1986 0044 4AD0 beq .L151
832:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
833:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Reset ADC error code field related to injected conversions only */
834:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
1987 .loc 1 834 9 is_stmt 1 view .LVU599
1988 0046 A36D ldr r3, [r4, #88]
1989 0048 23F00803 bic r3, r3, #8
1990 004c A365 str r3, [r4, #88]
1991 .L152:
835:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
836:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
837:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
838:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC error code to none */
839:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc);
840:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
841:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
842:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
843:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Clear state bitfield related to injected group conversion results */
844:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Set state bitfield related to injected operation */
845:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
1992 .loc 1 845 7 view .LVU600
1993 004e 626D ldr r2, [r4, #84]
1994 0050 374B ldr r3, .L172+4
1995 0052 1340 ands r3, r3, r2
1996 0054 43F48053 orr r3, r3, #4096
1997 0058 6365 str r3, [r4, #84]
846:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
847:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY);
848:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
849:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
850:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** - if ADC instance is master or if multimode feature is not available
851:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */
852:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
1998 .loc 1 852 7 view .LVU601
1999 .loc 1 852 12 is_stmt 0 view .LVU602
2000 005a 2368 ldr r3, [r4]
2001 005c 354A ldr r2, .L172+8
2002 005e 9342 cmp r3, r2
2003 0060 3FD0 beq .L169
2004 .loc 1 852 12 discriminator 1 view .LVU603
2005 0062 1A46 mov r2, r3
2006 .L153:
2007 .loc 1 852 10 discriminator 4 view .LVU604
2008 0064 9342 cmp r3, r2
2009 0066 00D0 beq .L154
853:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
2010 .loc 1 853 11 view .LVU605
2011 0068 1DB9 cbnz r5, .L155
2012 .L154:
854:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
855:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
856:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
2013 .loc 1 856 9 is_stmt 1 view .LVU606
2014 006a 626D ldr r2, [r4, #84]
2015 006c 22F48012 bic r2, r2, #1048576
ARM GAS /tmp/ccTOAmWG.s page 201
2016 0070 6265 str r2, [r4, #84]
2017 .L155:
857:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
858:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
859:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear ADC group injected group conversion flag */
860:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */
861:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
2018 .loc 1 861 7 view .LVU607
2019 0072 6022 movs r2, #96
2020 0074 1A60 str r2, [r3]
862:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
863:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
864:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */
865:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */
866:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
2021 .loc 1 866 7 view .LVU608
2022 .loc 1 866 7 view .LVU609
2023 0076 0023 movs r3, #0
2024 0078 84F85030 strb r3, [r4, #80]
2025 .loc 1 866 7 view .LVU610
867:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
868:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable ADC Injected context queue overflow interrupt if this feature */
869:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* is enabled. */
870:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL)
2026 .loc 1 870 7 view .LVU611
2027 .loc 1 870 16 is_stmt 0 view .LVU612
2028 007c 2368 ldr r3, [r4]
2029 .loc 1 870 26 view .LVU613
2030 007e DA68 ldr r2, [r3, #12]
2031 .loc 1 870 10 view .LVU614
2032 0080 12F4001F tst r2, #2097152
2033 0084 03D0 beq .L156
871:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
872:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
2034 .loc 1 872 9 is_stmt 1 view .LVU615
2035 0086 5A68 ldr r2, [r3, #4]
2036 0088 42F48062 orr r2, r2, #1024
2037 008c 5A60 str r2, [r3, #4]
2038 .L156:
873:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
874:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
875:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable ADC end of conversion interrupt */
876:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** switch (hadc->Init.EOCSelection)
2039 .loc 1 876 7 view .LVU616
2040 .loc 1 876 25 is_stmt 0 view .LVU617
2041 008e 2369 ldr r3, [r4, #16]
2042 .loc 1 876 7 view .LVU618
2043 0090 082B cmp r3, #8
2044 0092 29D0 beq .L170
877:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
878:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** case ADC_EOC_SEQ_CONV:
879:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
880:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
881:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
882:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* case ADC_EOC_SINGLE_CONV */
883:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** default:
884:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
ARM GAS /tmp/ccTOAmWG.s page 202
2045 .loc 1 884 11 is_stmt 1 view .LVU619
2046 0094 2268 ldr r2, [r4]
2047 0096 5368 ldr r3, [r2, #4]
2048 0098 23F04003 bic r3, r3, #64
2049 009c 5360 str r3, [r2, #4]
885:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
2050 .loc 1 885 11 view .LVU620
2051 009e 2268 ldr r2, [r4]
2052 00a0 5368 ldr r3, [r2, #4]
2053 00a2 43F02003 orr r3, r3, #32
2054 00a6 5360 str r3, [r2, #4]
886:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
2055 .loc 1 886 11 view .LVU621
2056 .L158:
887:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
888:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
889:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable conversion of injected group, if automatic injected conversion */
890:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* is disabled. */
891:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */
892:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */
893:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* trigger event. */
894:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Case of multimode enabled (when multimode feature is available): */
895:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* if ADC is slave, */
896:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - ADC is enabled only (conversion is not started), */
897:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - if multimode only concerns regular conversion, ADC is enabled */
898:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* and conversion is started. */
899:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If ADC is master or independent, */
900:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - ADC is enabled and conversion is started. */
901:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
2057 .loc 1 901 7 view .LVU622
2058 .loc 1 901 12 is_stmt 0 view .LVU623
2059 00a8 2368 ldr r3, [r4]
2060 00aa 224A ldr r2, .L172+8
2061 00ac 9342 cmp r3, r2
2062 00ae 26D0 beq .L171
2063 .loc 1 901 12 discriminator 1 view .LVU624
2064 00b0 1A46 mov r2, r3
2065 .L159:
2066 .loc 1 901 10 discriminator 4 view .LVU625
2067 00b2 9342 cmp r3, r2
2068 00b4 26D0 beq .L160
902:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
903:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
2069 .loc 1 903 36 view .LVU626
2070 00b6 062D cmp r5, #6
2071 00b8 14BF ite ne
2072 00ba 0022 movne r2, #0
2073 00bc 0122 moveq r2, #1
2074 .loc 1 903 11 view .LVU627
2075 00be 0DB3 cbz r5, .L160
2076 00c0 02BB cbnz r2, .L160
904:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
2077 .loc 1 904 11 view .LVU628
2078 00c2 072D cmp r5, #7
2079 00c4 1ED0 beq .L160
905:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
906:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
ARM GAS /tmp/ccTOAmWG.s page 203
907:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl
908:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
909:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
910:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance);
911:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
912:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
913:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
914:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
915:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl
916:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
2080 .loc 1 916 9 is_stmt 1 view .LVU629
2081 00c6 636D ldr r3, [r4, #84]
2082 00c8 43F48013 orr r3, r3, #1048576
2083 00cc 6365 str r3, [r4, #84]
2084 00ce 29E0 b .L148
2085 .LVL169:
2086 .L168:
817:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
2087 .loc 1 817 7 view .LVU630
2088 00d0 436D ldr r3, [r0, #84]
2089 00d2 43F02003 orr r3, r3, #32
2090 00d6 4365 str r3, [r0, #84]
818:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2091 .loc 1 818 7 view .LVU631
818:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2092 .loc 1 818 14 is_stmt 0 view .LVU632
2093 00d8 0120 movs r0, #1
2094 .LVL170:
818:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2095 .loc 1 818 14 view .LVU633
2096 00da 23E0 b .L148
2097 .LVL171:
2098 .L151:
839:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2099 .loc 1 839 9 is_stmt 1 view .LVU634
2100 00dc 0023 movs r3, #0
2101 00de A365 str r3, [r4, #88]
2102 00e0 B5E7 b .L152
2103 .L169:
852:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
2104 .loc 1 852 12 is_stmt 0 discriminator 2 view .LVU635
2105 00e2 A2F58072 sub r2, r2, #256
2106 00e6 BDE7 b .L153
2107 .L170:
879:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
2108 .loc 1 879 11 is_stmt 1 view .LVU636
2109 00e8 2268 ldr r2, [r4]
2110 00ea 5368 ldr r3, [r2, #4]
2111 00ec 23F02003 bic r3, r3, #32
2112 00f0 5360 str r3, [r2, #4]
880:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
2113 .loc 1 880 11 view .LVU637
2114 00f2 2268 ldr r2, [r4]
2115 00f4 5368 ldr r3, [r2, #4]
2116 00f6 43F04003 orr r3, r3, #64
2117 00fa 5360 str r3, [r2, #4]
881:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* case ADC_EOC_SINGLE_CONV */
ARM GAS /tmp/ccTOAmWG.s page 204
2118 .loc 1 881 11 view .LVU638
2119 00fc D4E7 b .L158
2120 .L171:
901:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
2121 .loc 1 901 12 is_stmt 0 discriminator 2 view .LVU639
2122 00fe A2F58072 sub r2, r2, #256
2123 0102 D6E7 b .L159
2124 .L160:
908:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2125 .loc 1 908 9 is_stmt 1 view .LVU640
2126 .LVL172:
2127 .LBB315:
2128 .LBI315:
5017:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2129 .loc 2 5017 26 view .LVU641
2130 .LBB316:
5019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2131 .loc 2 5019 3 view .LVU642
5019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2132 .loc 2 5019 21 is_stmt 0 view .LVU643
2133 0104 DA68 ldr r2, [r3, #12]
2134 .LVL173:
5019:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2135 .loc 2 5019 21 view .LVU644
2136 .LBE316:
2137 .LBE315:
908:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2138 .loc 1 908 12 discriminator 1 view .LVU645
2139 0106 12F0007F tst r2, #33554432
2140 010a 0BD1 bne .L148
910:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2141 .loc 1 910 11 is_stmt 1 view .LVU646
2142 .LVL174:
2143 .LBB317:
2144 .LBI317:
7232:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2145 .loc 2 7232 22 view .LVU647
2146 .LBB318:
7237:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
2147 .loc 2 7237 3 view .LVU648
2148 010c 9968 ldr r1, [r3, #8]
2149 010e 0A4A ldr r2, .L172+12
2150 0110 0A40 ands r2, r2, r1
2151 0112 42F00802 orr r2, r2, #8
2152 0116 9A60 str r2, [r3, #8]
2153 .LVL175:
7240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2154 .loc 2 7240 1 is_stmt 0 view .LVU649
2155 0118 04E0 b .L148
2156 .L150:
7240:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2157 .loc 2 7240 1 view .LVU650
2158 .LBE318:
2159 .LBE317:
917:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
918:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
919:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 205
920:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
921:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
922:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
923:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
2160 .loc 1 923 7 is_stmt 1 view .LVU651
2161 .loc 1 923 7 view .LVU652
2162 011a 0023 movs r3, #0
2163 011c 84F85030 strb r3, [r4, #80]
2164 .loc 1 923 7 discriminator 1 view .LVU653
924:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
925:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
926:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
927:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
2165 .loc 1 927 5 view .LVU654
2166 .loc 1 927 12 is_stmt 0 view .LVU655
2167 0120 00E0 b .L148
2168 .LVL176:
2169 .L163:
800:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2170 .loc 1 800 12 view .LVU656
2171 0122 0220 movs r0, #2
2172 .LVL177:
2173 .L148:
928:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
929:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2174 .loc 1 929 1 view .LVU657
2175 0124 38BD pop {r3, r4, r5, pc}
2176 .LVL178:
2177 .L164:
822:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2178 .loc 1 822 5 discriminator 1 view .LVU658
2179 0126 0220 movs r0, #2
2180 .LVL179:
822:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2181 .loc 1 822 5 discriminator 1 view .LVU659
2182 0128 FCE7 b .L148
2183 .L173:
2184 012a 00BF .align 2
2185 .L172:
2186 012c 00230240 .word 1073881856
2187 0130 FECFFFFF .word -12290
2188 0134 00210240 .word 1073881344
2189 0138 C0FFFF7F .word 2147483584
2190 .cfi_endproc
2191 .LFE344:
2193 .section .text.HAL_ADCEx_InjectedStop_IT,"ax",%progbits
2194 .align 1
2195 .global HAL_ADCEx_InjectedStop_IT
2196 .syntax unified
2197 .thumb
2198 .thumb_func
2200 HAL_ADCEx_InjectedStop_IT:
2201 .LVL180:
2202 .LFB345:
930:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
931:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
932:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Stop conversion of injected channels, disable interruption of
ARM GAS /tmp/ccTOAmWG.s page 206
933:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * end-of-conversion. Disable ADC peripheral if no regular conversion
934:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * is on going.
935:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note If ADC must be disabled and if conversion is on going on
936:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * regular group, function HAL_ADC_Stop must be used to stop both
937:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * injected and regular groups, and disable the ADC.
938:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note If injected group mode auto-injection is enabled,
939:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * function HAL_ADC_Stop must be used.
940:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Case of multimode enabled (when multimode feature is available):
941:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
942:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * then for ADC slave.
943:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For ADC master, conversion is stopped and ADC is disabled.
944:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For ADC slave, ADC is disabled only (conversion stop of ADC master
945:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * has already stopped conversion of ADC slave).
946:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
947:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
948:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
949:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
950:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc)
951:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2203 .loc 1 951 1 is_stmt 1 view -0
2204 .cfi_startproc
2205 @ args = 0, pretend = 0, frame = 0
2206 @ frame_needed = 0, uses_anonymous_args = 0
952:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
2207 .loc 1 952 3 view .LVU661
953:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
954:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
955:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2208 .loc 1 955 3 view .LVU662
956:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
957:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
958:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
2209 .loc 1 958 3 view .LVU663
2210 .loc 1 958 3 view .LVU664
2211 0000 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
2212 0004 012B cmp r3, #1
2213 0006 26D0 beq .L178
951:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
2214 .loc 1 951 1 is_stmt 0 view .LVU665
2215 0008 10B5 push {r4, lr}
2216 .cfi_def_cfa_offset 8
2217 .cfi_offset 4, -8
2218 .cfi_offset 14, -4
2219 000a 0446 mov r4, r0
2220 .loc 1 958 3 is_stmt 1 discriminator 2 view .LVU666
2221 000c 0123 movs r3, #1
2222 000e 80F85030 strb r3, [r0, #80]
2223 .loc 1 958 3 view .LVU667
959:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
960:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Stop potential conversion on going on injected group only. */
961:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
2224 .loc 1 961 3 view .LVU668
2225 .loc 1 961 20 is_stmt 0 view .LVU669
2226 0012 0221 movs r1, #2
2227 0014 FFF7FEFF bl ADC_ConversionStop
2228 .LVL181:
962:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 207
963:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC peripheral if injected conversions are effectively stopped */
964:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* and if no conversion on the other group (regular group) is intended to */
965:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* continue. */
966:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
2229 .loc 1 966 3 is_stmt 1 view .LVU670
2230 .loc 1 966 6 is_stmt 0 view .LVU671
2231 0018 68B9 cbnz r0, .L176
967:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
968:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC end of conversion interrupt for injected channels */
969:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF));
2232 .loc 1 969 5 is_stmt 1 view .LVU672
2233 001a 2268 ldr r2, [r4]
2234 001c 5368 ldr r3, [r2, #4]
2235 001e 23F48C63 bic r3, r3, #1120
2236 0022 5360 str r3, [r2, #4]
970:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
971:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
2237 .loc 1 971 5 view .LVU673
2238 .loc 1 971 44 is_stmt 0 view .LVU674
2239 0024 2368 ldr r3, [r4]
2240 .LVL182:
2241 .LBB319:
2242 .LBI319:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2243 .loc 2 7073 26 is_stmt 1 view .LVU675
2244 .LBB320:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2245 .loc 2 7075 3 view .LVU676
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2246 .loc 2 7075 12 is_stmt 0 view .LVU677
2247 0026 9B68 ldr r3, [r3, #8]
2248 .LVL183:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2249 .loc 2 7075 74 view .LVU678
2250 0028 13F0040F tst r3, #4
2251 002c 07D0 beq .L177
2252 .LVL184:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2253 .loc 2 7075 74 view .LVU679
2254 .LBE320:
2255 .LBE319:
972:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
973:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */
974:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc);
975:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
976:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */
977:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
978:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
979:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
980:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
981:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
982:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY);
983:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
984:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
985:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */
986:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* conversion on regular group is still running. */
987:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
ARM GAS /tmp/ccTOAmWG.s page 208
988:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
989:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
990:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
2256 .loc 1 990 7 is_stmt 1 view .LVU680
2257 002e 636D ldr r3, [r4, #84]
2258 0030 23F48053 bic r3, r3, #4096
2259 0034 6365 str r3, [r4, #84]
2260 .L176:
991:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
992:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
993:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
994:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
995:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
2261 .loc 1 995 3 view .LVU681
2262 .loc 1 995 3 view .LVU682
2263 0036 0023 movs r3, #0
2264 0038 84F85030 strb r3, [r4, #80]
2265 .loc 1 995 3 view .LVU683
996:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
997:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
998:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
2266 .loc 1 998 3 view .LVU684
999:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2267 .loc 1 999 1 is_stmt 0 view .LVU685
2268 003c 10BD pop {r4, pc}
2269 .LVL185:
2270 .L177:
974:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2271 .loc 1 974 7 is_stmt 1 view .LVU686
974:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2272 .loc 1 974 24 is_stmt 0 view .LVU687
2273 003e 2046 mov r0, r4
2274 .LVL186:
974:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2275 .loc 1 974 24 view .LVU688
2276 0040 FFF7FEFF bl ADC_Disable
2277 .LVL187:
977:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2278 .loc 1 977 7 is_stmt 1 view .LVU689
977:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2279 .loc 1 977 10 is_stmt 0 view .LVU690
2280 0044 0028 cmp r0, #0
2281 0046 F6D1 bne .L176
980:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
2282 .loc 1 980 9 is_stmt 1 view .LVU691
2283 0048 626D ldr r2, [r4, #84]
2284 004a 044B ldr r3, .L183
2285 004c 1340 ands r3, r3, r2
2286 004e 43F00103 orr r3, r3, #1
2287 0052 6365 str r3, [r4, #84]
2288 0054 EFE7 b .L176
2289 .LVL188:
2290 .L178:
2291 .cfi_def_cfa_offset 0
2292 .cfi_restore 4
2293 .cfi_restore 14
958:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 209
2294 .loc 1 958 3 is_stmt 0 discriminator 1 view .LVU692
2295 0056 0220 movs r0, #2
2296 .LVL189:
2297 .loc 1 999 1 view .LVU693
2298 0058 7047 bx lr
2299 .L184:
2300 005a 00BF .align 2
2301 .L183:
2302 005c FEEEFFFF .word -4354
2303 .cfi_endproc
2304 .LFE345:
2306 .section .text.HAL_ADCEx_MultiModeStart_DMA,"ax",%progbits
2307 .align 1
2308 .global HAL_ADCEx_MultiModeStart_DMA
2309 .syntax unified
2310 .thumb
2311 .thumb_func
2313 HAL_ADCEx_MultiModeStart_DMA:
2314 .LVL190:
2315 .LFB346:
1000:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1001:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1002:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
1003:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Multimode must have been previously configured using
1004:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_MultiModeConfigChannel() function.
1005:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Interruptions enabled in this function:
1006:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * overrun, DMA half transfer, DMA transfer complete.
1007:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Each of these interruptions has its dedicated callback function.
1008:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Case of ADC slave using its own DMA channel (typical case being both ADC instances usin
1009:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * of ADC master with data concatenated): multimode must be configured without data packin
1010:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * this function must be called first with handle of ADC slave, then with handle of ADC ma
1011:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note State field of Slave ADC handle is not updated in this configuration:
1012:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * user should not rely on it for information related to Slave regular
1013:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * conversions.
1014:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1015:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param pData Destination Buffer address.
1016:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
1017:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
1018:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1019:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, const uint32_t *pData, uint
1020:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2316 .loc 1 1020 1 is_stmt 1 view -0
2317 .cfi_startproc
2318 @ args = 0, pretend = 0, frame = 104
2319 @ frame_needed = 0, uses_anonymous_args = 0
2320 .loc 1 1020 1 is_stmt 0 view .LVU695
2321 0000 70B5 push {r4, r5, r6, lr}
2322 .cfi_def_cfa_offset 16
2323 .cfi_offset 4, -16
2324 .cfi_offset 5, -12
2325 .cfi_offset 6, -8
2326 .cfi_offset 14, -4
2327 0002 9AB0 sub sp, sp, #104
2328 .cfi_def_cfa_offset 120
2329 0004 0446 mov r4, r0
2330 0006 0D46 mov r5, r1
1021:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
ARM GAS /tmp/ccTOAmWG.s page 210
2331 .loc 1 1021 3 is_stmt 1 view .LVU696
1022:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave;
2332 .loc 1 1022 3 view .LVU697
1023:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common;
2333 .loc 1 1023 3 view .LVU698
1024:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1025:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1026:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2334 .loc 1 1026 3 view .LVU699
1027:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
2335 .loc 1 1027 3 view .LVU700
1028:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
2336 .loc 1 1028 3 view .LVU701
1029:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1030:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
2337 .loc 1 1030 3 view .LVU702
2338 .loc 1 1030 42 is_stmt 0 view .LVU703
2339 0008 0068 ldr r0, [r0]
2340 .LVL191:
2341 .LBB321:
2342 .LBI321:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2343 .loc 2 7073 26 is_stmt 1 view .LVU704
2344 .LBB322:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2345 .loc 2 7075 3 view .LVU705
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2346 .loc 2 7075 12 is_stmt 0 view .LVU706
2347 000a 8168 ldr r1, [r0, #8]
2348 .LVL192:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2349 .loc 2 7075 74 view .LVU707
2350 000c 11F0040F tst r1, #4
2351 0010 75D1 bne .L197
2352 0012 1646 mov r6, r2
2353 .LVL193:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2354 .loc 2 7075 74 view .LVU708
2355 .LBE322:
2356 .LBE321:
1031:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1032:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_BUSY;
1033:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1034:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1035:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1036:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
1037:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
2357 .loc 1 1037 5 is_stmt 1 view .LVU709
2358 .loc 1 1037 5 view .LVU710
2359 0014 94F85030 ldrb r3, [r4, #80] @ zero_extendqisi2
2360 0018 012B cmp r3, #1
2361 001a 73D0 beq .L198
2362 .loc 1 1037 5 discriminator 2 view .LVU711
2363 001c 0123 movs r3, #1
2364 001e 84F85030 strb r3, [r4, #80]
2365 .loc 1 1037 5 view .LVU712
1038:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 211
1039:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Case of ADC slave using its own DMA channel: check whether handle selected
1040:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** corresponds to ADC master or slave instance */
1041:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) != hadc->Instance)
2366 .loc 1 1041 5 view .LVU713
2367 .loc 1 1041 9 is_stmt 0 view .LVU714
2368 0022 394B ldr r3, .L208
2369 0024 9842 cmp r0, r3
2370 0026 17D0 beq .L202
2371 .loc 1 1041 9 discriminator 1 view .LVU715
2372 0028 0346 mov r3, r0
2373 .L187:
2374 .loc 1 1041 8 discriminator 4 view .LVU716
2375 002a 9842 cmp r0, r3
2376 002c 17D1 bne .L203
1042:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1043:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Case of ADC slave selected: enable ADC instance */
1044:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc);
1045:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1046:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1047:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1048:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave.State = HAL_ADC_STATE_RESET;
2377 .loc 1 1048 7 is_stmt 1 view .LVU717
2378 .loc 1 1048 26 is_stmt 0 view .LVU718
2379 002e 0023 movs r3, #0
2380 0030 1693 str r3, [sp, #88]
1049:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave.ErrorCode = HAL_ADC_ERROR_NONE;
2381 .loc 1 1049 7 is_stmt 1 view .LVU719
2382 .loc 1 1049 30 is_stmt 0 view .LVU720
2383 0032 1793 str r3, [sp, #92]
1050:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */
1051:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
2384 .loc 1 1051 7 is_stmt 1 view .LVU721
2385 0034 2268 ldr r2, [r4]
2386 .LVL194:
2387 .loc 1 1051 7 is_stmt 0 view .LVU722
2388 0036 354B ldr r3, .L208+4
2389 0038 9A42 cmp r2, r3
2390 003a 3ED0 beq .L204
2391 .loc 1 1051 7 discriminator 2 view .LVU723
2392 003c 0023 movs r3, #0
2393 003e 0193 str r3, [sp, #4]
2394 .L191:
1052:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1053:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL)
2395 .loc 1 1053 7 is_stmt 1 view .LVU724
2396 .loc 1 1053 23 is_stmt 0 view .LVU725
2397 0040 019B ldr r3, [sp, #4]
2398 .loc 1 1053 10 view .LVU726
2399 0042 002B cmp r3, #0
2400 0044 3DD0 beq .L205
1054:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1055:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
1056:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1057:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1058:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1059:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1060:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 212
1061:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
1062:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1063:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1064:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable the ADC peripherals: master and slave (in case if not already */
1065:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* enabled previously) */
1066:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc);
2401 .loc 1 1066 7 is_stmt 1 view .LVU727
2402 .loc 1 1066 24 is_stmt 0 view .LVU728
2403 0046 2046 mov r0, r4
2404 0048 FFF7FEFF bl ADC_Enable
2405 .LVL195:
1067:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
2406 .loc 1 1067 7 is_stmt 1 view .LVU729
2407 .loc 1 1067 10 is_stmt 0 view .LVU730
2408 004c 0028 cmp r0, #0
2409 004e 41D0 beq .L206
2410 .L193:
2411 .LVL196:
1068:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1069:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(&tmphadcSlave);
1070:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1071:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1072:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1073:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Start multimode conversion of ADCs pair */
1074:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
1075:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1076:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
1077:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
1078:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_
1079:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY);
1080:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1081:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC error code to none */
1082:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc);
1083:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1084:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set the DMA transfer complete callback */
1085:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1086:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1087:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set the DMA half transfer complete callback */
1088:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1089:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1090:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set the DMA error callback */
1091:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
1092:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1093:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
1094:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* start (in case of SW start): */
1095:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1096:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear regular group conversion flag and overrun flag */
1097:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */
1098:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1099:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1100:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1101:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */
1102:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */
1103:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1104:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1105:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable ADC overrun interrupt */
1106:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
ARM GAS /tmp/ccTOAmWG.s page 213
1107:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1108:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Case of ADC slave using its own DMA channel: check whether handle selected
1109:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** corresponds to ADC master or slave instance */
1110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) != hadc->Instance)
1111:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1112:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Case of ADC slave selected: Start the DMA channel. */
1113:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: Data transfer will start upon next call of this function using handle of ADC maste
1114:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_
1115:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1116:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1117:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1118:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Pointer to the common control register */
1119:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1120:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1121:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Start the DMA channel */
1122:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_
1123:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1124:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable conversion of regular group. */
1125:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */
1126:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */
1127:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* trigger event. */
1128:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Start ADC group regular conversion */
1129:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_REG_StartConversion(hadc->Instance);
1130:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1131:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1132:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1133:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1134:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1135:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
2412 .loc 1 1135 7 is_stmt 1 view .LVU731
2413 .loc 1 1135 7 view .LVU732
2414 0050 0023 movs r3, #0
2415 0052 84F85030 strb r3, [r4, #80]
2416 .LVL197:
2417 .loc 1 1135 7 discriminator 1 view .LVU733
1136:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1137:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1138:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
1139:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
2418 .loc 1 1139 5 view .LVU734
2419 .loc 1 1139 12 is_stmt 0 view .LVU735
2420 0056 53E0 b .L186
2421 .LVL198:
2422 .L202:
1041:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2423 .loc 1 1041 9 discriminator 2 view .LVU736
2424 0058 A3F58073 sub r3, r3, #256
2425 005c E5E7 b .L187
2426 .L203:
1044:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2427 .loc 1 1044 7 is_stmt 1 view .LVU737
1044:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2428 .loc 1 1044 24 is_stmt 0 view .LVU738
2429 005e 2046 mov r0, r4
2430 0060 FFF7FEFF bl ADC_Enable
2431 .LVL199:
2432 .L189:
ARM GAS /tmp/ccTOAmWG.s page 214
1074:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2433 .loc 1 1074 5 is_stmt 1 view .LVU739
1074:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2434 .loc 1 1074 8 is_stmt 0 view .LVU740
2435 0064 0028 cmp r0, #0
2436 0066 F3D1 bne .L193
1077:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_
2437 .loc 1 1077 7 is_stmt 1 view .LVU741
2438 0068 626D ldr r2, [r4, #84]
2439 006a 294B ldr r3, .L208+8
2440 006c 1340 ands r3, r3, r2
2441 006e 43F48073 orr r3, r3, #256
2442 0072 6365 str r3, [r4, #84]
1082:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2443 .loc 1 1082 7 view .LVU742
2444 0074 0023 movs r3, #0
2445 0076 A365 str r3, [r4, #88]
1085:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2446 .loc 1 1085 7 view .LVU743
1085:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2447 .loc 1 1085 11 is_stmt 0 view .LVU744
2448 0078 E26C ldr r2, [r4, #76]
1085:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2449 .loc 1 1085 42 view .LVU745
2450 007a 2649 ldr r1, .L208+12
2451 007c D163 str r1, [r2, #60]
1088:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2452 .loc 1 1088 7 is_stmt 1 view .LVU746
1088:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2453 .loc 1 1088 11 is_stmt 0 view .LVU747
2454 007e E26C ldr r2, [r4, #76]
1088:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2455 .loc 1 1088 46 view .LVU748
2456 0080 2549 ldr r1, .L208+16
2457 0082 1164 str r1, [r2, #64]
1091:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2458 .loc 1 1091 7 is_stmt 1 view .LVU749
1091:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2459 .loc 1 1091 11 is_stmt 0 view .LVU750
2460 0084 E26C ldr r2, [r4, #76]
1091:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2461 .loc 1 1091 43 view .LVU751
2462 0086 2549 ldr r1, .L208+20
2463 0088 D164 str r1, [r2, #76]
1098:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2464 .loc 1 1098 7 is_stmt 1 view .LVU752
2465 008a 2268 ldr r2, [r4]
2466 008c 1C21 movs r1, #28
2467 008e 1160 str r1, [r2]
1103:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2468 .loc 1 1103 7 view .LVU753
1103:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2469 .loc 1 1103 7 view .LVU754
2470 0090 84F85030 strb r3, [r4, #80]
1103:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2471 .loc 1 1103 7 view .LVU755
1106:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 215
2472 .loc 1 1106 7 view .LVU756
2473 0094 2268 ldr r2, [r4]
2474 0096 5368 ldr r3, [r2, #4]
2475 0098 43F01003 orr r3, r3, #16
2476 009c 5360 str r3, [r2, #4]
1110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2477 .loc 1 1110 7 view .LVU757
1110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2478 .loc 1 1110 11 is_stmt 0 view .LVU758
2479 009e 2168 ldr r1, [r4]
2480 00a0 194B ldr r3, .L208
2481 00a2 9942 cmp r1, r3
2482 00a4 1AD0 beq .L207
1110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2483 .loc 1 1110 11 discriminator 1 view .LVU759
2484 00a6 0B46 mov r3, r1
2485 .L194:
1110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2486 .loc 1 1110 10 discriminator 4 view .LVU760
2487 00a8 9942 cmp r1, r3
2488 00aa 1AD0 beq .L195
1114:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2489 .loc 1 1114 9 is_stmt 1 view .LVU761
1114:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2490 .loc 1 1114 26 is_stmt 0 view .LVU762
2491 00ac 3346 mov r3, r6
2492 00ae 2A46 mov r2, r5
2493 00b0 4031 adds r1, r1, #64
2494 00b2 E06C ldr r0, [r4, #76]
2495 .LVL200:
1114:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2496 .loc 1 1114 26 view .LVU763
2497 00b4 FFF7FEFF bl HAL_DMA_Start_IT
2498 .LVL201:
1114:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2499 .loc 1 1114 26 view .LVU764
2500 00b8 22E0 b .L186
2501 .LVL202:
2502 .L204:
1051:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2503 .loc 1 1051 7 discriminator 1 view .LVU765
2504 00ba 03F58073 add r3, r3, #256
2505 00be 0193 str r3, [sp, #4]
2506 00c0 BEE7 b .L191
2507 .L205:
1056:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2508 .loc 1 1056 9 is_stmt 1 view .LVU766
2509 00c2 636D ldr r3, [r4, #84]
2510 00c4 43F02003 orr r3, r3, #32
2511 00c8 6365 str r3, [r4, #84]
1059:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2512 .loc 1 1059 9 view .LVU767
1059:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2513 .loc 1 1059 9 view .LVU768
2514 00ca 0023 movs r3, #0
2515 00cc 84F85030 strb r3, [r4, #80]
1059:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 216
2516 .loc 1 1059 9 view .LVU769
1061:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2517 .loc 1 1061 9 view .LVU770
1061:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2518 .loc 1 1061 16 is_stmt 0 view .LVU771
2519 00d0 0120 movs r0, #1
2520 00d2 15E0 b .L186
2521 .LVL203:
2522 .L206:
1069:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2523 .loc 1 1069 9 is_stmt 1 view .LVU772
1069:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2524 .loc 1 1069 26 is_stmt 0 view .LVU773
2525 00d4 01A8 add r0, sp, #4
2526 .LVL204:
1069:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2527 .loc 1 1069 26 view .LVU774
2528 00d6 FFF7FEFF bl ADC_Enable
2529 .LVL205:
2530 00da C3E7 b .L189
2531 .LVL206:
2532 .L207:
1110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2533 .loc 1 1110 11 discriminator 2 view .LVU775
2534 00dc A3F58073 sub r3, r3, #256
2535 00e0 E2E7 b .L194
2536 .L195:
1119:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2537 .loc 1 1119 9 is_stmt 1 view .LVU776
2538 .LVL207:
1122:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2539 .loc 1 1122 9 view .LVU777
1122:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2540 .loc 1 1122 26 is_stmt 0 view .LVU778
2541 00e2 3346 mov r3, r6
2542 00e4 2A46 mov r2, r5
2543 00e6 0E49 ldr r1, .L208+24
2544 00e8 E06C ldr r0, [r4, #76]
2545 .LVL208:
1122:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2546 .loc 1 1122 26 view .LVU779
2547 00ea FFF7FEFF bl HAL_DMA_Start_IT
2548 .LVL209:
1129:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2549 .loc 1 1129 9 is_stmt 1 view .LVU780
2550 00ee 2268 ldr r2, [r4]
2551 .LVL210:
2552 .LBB323:
2553 .LBI323:
7037:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2554 .loc 2 7037 22 view .LVU781
2555 .LBB324:
7042:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
2556 .loc 2 7042 3 view .LVU782
2557 00f0 9168 ldr r1, [r2, #8]
2558 00f2 0C4B ldr r3, .L208+28
2559 00f4 0B40 ands r3, r3, r1
ARM GAS /tmp/ccTOAmWG.s page 217
2560 00f6 43F00403 orr r3, r3, #4
2561 00fa 9360 str r3, [r2, #8]
2562 .LVL211:
7045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2563 .loc 2 7045 1 is_stmt 0 view .LVU783
2564 00fc 00E0 b .L186
2565 .LVL212:
2566 .L197:
7045:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
2567 .loc 2 7045 1 view .LVU784
2568 .LBE324:
2569 .LBE323:
1032:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2570 .loc 1 1032 12 view .LVU785
2571 00fe 0220 movs r0, #2
2572 .LVL213:
2573 .L186:
1140:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1141:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2574 .loc 1 1141 1 view .LVU786
2575 0100 1AB0 add sp, sp, #104
2576 .cfi_remember_state
2577 .cfi_def_cfa_offset 16
2578 @ sp needed
2579 0102 70BD pop {r4, r5, r6, pc}
2580 .LVL214:
2581 .L198:
2582 .cfi_restore_state
1037:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2583 .loc 1 1037 5 discriminator 1 view .LVU787
2584 0104 0220 movs r0, #2
2585 0106 FBE7 b .L186
2586 .L209:
2587 .align 2
2588 .L208:
2589 0108 00210240 .word 1073881344
2590 010c 00200240 .word 1073881088
2591 0110 FEF0FFFF .word -3842
2592 0114 00000000 .word ADC_DMAConvCplt
2593 0118 00000000 .word ADC_DMAHalfConvCplt
2594 011c 00000000 .word ADC_DMAError
2595 0120 0C230240 .word 1073881868
2596 0124 C0FFFF7F .word 2147483584
2597 .cfi_endproc
2598 .LFE346:
2600 .section .text.HAL_ADCEx_MultiModeStop_DMA,"ax",%progbits
2601 .align 1
2602 .global HAL_ADCEx_MultiModeStop_DMA
2603 .syntax unified
2604 .thumb
2605 .thumb_func
2607 HAL_ADCEx_MultiModeStop_DMA:
2608 .LVL215:
2609 .LFB347:
1142:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1143:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1144:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
ARM GAS /tmp/ccTOAmWG.s page 218
1145:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Multimode is kept enabled after this function. MultiMode DMA bits
1146:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1147:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1148:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1149:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * resort to HAL_ADCEx_DisableMultiMode() API.
1150:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note In case of DMA configured in circular mode, function
1151:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADC_Stop_DMA() must be called after this function with handle of
1152:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * ADC slave, to properly disable the DMA channel.
1153:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1154:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
1155:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1156:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1157:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2610 .loc 1 1157 1 is_stmt 1 view -0
2611 .cfi_startproc
2612 @ args = 0, pretend = 0, frame = 104
2613 @ frame_needed = 0, uses_anonymous_args = 0
2614 .loc 1 1157 1 is_stmt 0 view .LVU789
2615 0000 30B5 push {r4, r5, lr}
2616 .cfi_def_cfa_offset 12
2617 .cfi_offset 4, -12
2618 .cfi_offset 5, -8
2619 .cfi_offset 14, -4
2620 0002 9BB0 sub sp, sp, #108
2621 .cfi_def_cfa_offset 120
1158:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
2622 .loc 1 1158 3 is_stmt 1 view .LVU790
1159:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tickstart;
2623 .loc 1 1159 3 view .LVU791
1160:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave;
2624 .loc 1 1160 3 view .LVU792
1161:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going;
2625 .loc 1 1161 3 view .LVU793
1162:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmphadcSlave_disable_status;
2626 .loc 1 1162 3 view .LVU794
1163:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1164:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1165:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2627 .loc 1 1165 3 view .LVU795
1166:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1167:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
1168:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
2628 .loc 1 1168 3 view .LVU796
2629 .loc 1 1168 3 view .LVU797
2630 0004 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
2631 0008 012B cmp r3, #1
2632 000a 7ED0 beq .L228
2633 000c 0446 mov r4, r0
2634 .loc 1 1168 3 discriminator 2 view .LVU798
2635 000e 0123 movs r3, #1
2636 0010 80F85030 strb r3, [r0, #80]
2637 .loc 1 1168 3 view .LVU799
1169:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1170:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1171:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Stop potential multimode conversion on going, on regular and injected groups */
1172:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
2638 .loc 1 1172 3 view .LVU800
ARM GAS /tmp/ccTOAmWG.s page 219
2639 .loc 1 1172 20 is_stmt 0 view .LVU801
2640 0014 0321 movs r1, #3
2641 0016 FFF7FEFF bl ADC_ConversionStop
2642 .LVL216:
1173:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1174:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped */
1175:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
2643 .loc 1 1175 3 is_stmt 1 view .LVU802
2644 .loc 1 1175 6 is_stmt 0 view .LVU803
2645 001a 0546 mov r5, r0
2646 001c 0028 cmp r0, #0
2647 001e 62D1 bne .L212
1176:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1177:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave.State = HAL_ADC_STATE_RESET;
2648 .loc 1 1177 5 is_stmt 1 view .LVU804
2649 .loc 1 1177 24 is_stmt 0 view .LVU805
2650 0020 0023 movs r3, #0
2651 0022 1693 str r3, [sp, #88]
1178:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave.ErrorCode = HAL_ADC_ERROR_NONE;
2652 .loc 1 1178 5 is_stmt 1 view .LVU806
2653 .loc 1 1178 28 is_stmt 0 view .LVU807
2654 0024 1793 str r3, [sp, #92]
1179:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1180:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */
1181:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
2655 .loc 1 1181 5 is_stmt 1 view .LVU808
2656 0026 2268 ldr r2, [r4]
2657 0028 394B ldr r3, .L234
2658 002a 9A42 cmp r2, r3
2659 002c 0DD0 beq .L230
2660 .loc 1 1181 5 is_stmt 0 discriminator 2 view .LVU809
2661 002e 0023 movs r3, #0
2662 0030 0193 str r3, [sp, #4]
2663 .L214:
1182:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1183:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL)
2664 .loc 1 1183 5 is_stmt 1 view .LVU810
2665 .loc 1 1183 21 is_stmt 0 view .LVU811
2666 0032 019B ldr r3, [sp, #4]
2667 .loc 1 1183 8 view .LVU812
2668 0034 6BB1 cbz r3, .L231
1184:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1185:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
1186:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1187:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1188:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1189:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1190:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1191:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
1192:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1193:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1194:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Procedure to disable the ADC peripheral: wait for conversions */
1195:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* effectively stopped (ADC master and ADC slave), then disable ADC */
1196:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1197:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1198:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tickstart = HAL_GetTick();
2669 .loc 1 1198 5 is_stmt 1 view .LVU813
ARM GAS /tmp/ccTOAmWG.s page 220
2670 .loc 1 1198 17 is_stmt 0 view .LVU814
2671 0036 FFF7FEFF bl HAL_GetTick
2672 .LVL217:
2673 .loc 1 1198 17 view .LVU815
2674 003a 0546 mov r5, r0
2675 .LVL218:
1199:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1200:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
2676 .loc 1 1200 5 is_stmt 1 view .LVU816
2677 .loc 1 1200 86 is_stmt 0 view .LVU817
2678 003c 019B ldr r3, [sp, #4]
2679 .LVL219:
2680 .LBB325:
2681 .LBI325:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2682 .loc 2 7073 26 is_stmt 1 view .LVU818
2683 .LBB326:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2684 .loc 2 7075 3 view .LVU819
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2685 .loc 2 7075 12 is_stmt 0 view .LVU820
2686 003e 9B68 ldr r3, [r3, #8]
2687 .LVL220:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2688 .loc 2 7075 74 view .LVU821
2689 0040 13F00403 ands r3, r3, #4
2690 0044 13D0 beq .L223
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2691 .loc 2 7075 74 discriminator 1 view .LVU822
2692 0046 0123 movs r3, #1
2693 0048 11E0 b .L223
2694 .LVL221:
2695 .L230:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2696 .loc 2 7075 74 discriminator 1 view .LVU823
2697 .LBE326:
2698 .LBE325:
1181:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2699 .loc 1 1181 5 discriminator 1 view .LVU824
2700 004a 03F58073 add r3, r3, #256
2701 004e 0193 str r3, [sp, #4]
2702 0050 EFE7 b .L214
2703 .L231:
1186:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2704 .loc 1 1186 7 is_stmt 1 view .LVU825
2705 0052 636D ldr r3, [r4, #84]
2706 0054 43F02003 orr r3, r3, #32
2707 0058 6365 str r3, [r4, #84]
1189:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2708 .loc 1 1189 7 view .LVU826
1189:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2709 .loc 1 1189 7 view .LVU827
2710 005a 0023 movs r3, #0
2711 005c 84F85030 strb r3, [r4, #80]
1189:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2712 .loc 1 1189 7 view .LVU828
1191:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 221
2713 .loc 1 1191 7 view .LVU829
1191:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2714 .loc 1 1191 14 is_stmt 0 view .LVU830
2715 0060 0125 movs r5, #1
2716 0062 43E0 b .L211
2717 .LVL222:
2718 .L218:
1201:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1202:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
1203:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
1204:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1205:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1206:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1207:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */
1208:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance
1209:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1210:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1211:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
1212:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
1213:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1214:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
1215:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1216:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1217:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1218:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1219:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1220:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
1221:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1222:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1223:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1224:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
2719 .loc 1 1224 7 is_stmt 1 view .LVU831
2720 .loc 1 1224 88 is_stmt 0 view .LVU832
2721 0064 019B ldr r3, [sp, #4]
2722 .LVL223:
2723 .LBB327:
2724 .LBI327:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2725 .loc 2 7073 26 is_stmt 1 view .LVU833
2726 .LBB328:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2727 .loc 2 7075 3 view .LVU834
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2728 .loc 2 7075 12 is_stmt 0 view .LVU835
2729 0066 9B68 ldr r3, [r3, #8]
2730 .LVL224:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2731 .loc 2 7075 74 view .LVU836
2732 0068 13F00403 ands r3, r3, #4
2733 006c 21D1 bne .L221
2734 .LVL225:
2735 .L223:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2736 .loc 2 7075 74 view .LVU837
2737 .LBE328:
2738 .LBE327:
1202:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
ARM GAS /tmp/ccTOAmWG.s page 222
2739 .loc 1 1202 12 is_stmt 1 view .LVU838
1201:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
2740 .loc 1 1201 48 is_stmt 0 view .LVU839
2741 006e 2268 ldr r2, [r4]
2742 .LVL226:
2743 .LBB330:
2744 .LBI330:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2745 .loc 2 7073 26 is_stmt 1 view .LVU840
2746 .LBB331:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2747 .loc 2 7075 3 view .LVU841
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2748 .loc 2 7075 12 is_stmt 0 view .LVU842
2749 0070 9268 ldr r2, [r2, #8]
2750 .LVL227:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2751 .loc 2 7075 74 view .LVU843
2752 0072 12F0040F tst r2, #4
2753 0076 01D1 bne .L224
2754 .LVL228:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2755 .loc 2 7075 74 view .LVU844
2756 .LBE331:
2757 .LBE330:
1202:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
2758 .loc 1 1202 12 discriminator 1 view .LVU845
2759 0078 012B cmp r3, #1
2760 007a 1CD1 bne .L232
2761 .L224:
1205:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2762 .loc 1 1205 7 is_stmt 1 view .LVU846
1205:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2763 .loc 1 1205 12 is_stmt 0 view .LVU847
2764 007c FFF7FEFF bl HAL_GetTick
2765 .LVL229:
1205:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2766 .loc 1 1205 26 discriminator 1 view .LVU848
2767 0080 431B subs r3, r0, r5
1205:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2768 .loc 1 1205 10 discriminator 1 view .LVU849
2769 0082 052B cmp r3, #5
2770 0084 EED9 bls .L218
1208:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2771 .loc 1 1208 9 is_stmt 1 view .LVU850
1208:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2772 .loc 1 1208 90 is_stmt 0 view .LVU851
2773 0086 019B ldr r3, [sp, #4]
2774 .LVL230:
2775 .LBB332:
2776 .LBI332:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2777 .loc 2 7073 26 is_stmt 1 view .LVU852
2778 .LBB333:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2779 .loc 2 7075 3 view .LVU853
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 223
2780 .loc 2 7075 12 is_stmt 0 view .LVU854
2781 0088 9B68 ldr r3, [r3, #8]
2782 .LVL231:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2783 .loc 2 7075 74 view .LVU855
2784 008a 13F00403 ands r3, r3, #4
2785 008e 00D0 beq .L219
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2786 .loc 2 7075 74 discriminator 1 view .LVU856
2787 0090 0123 movs r3, #1
2788 .L219:
2789 .LVL232:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2790 .loc 2 7075 74 discriminator 1 view .LVU857
2791 .LBE333:
2792 .LBE332:
1210:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
2793 .loc 1 1210 9 is_stmt 1 view .LVU858
1210:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
2794 .loc 1 1210 48 is_stmt 0 view .LVU859
2795 0092 2268 ldr r2, [r4]
2796 .LVL233:
2797 .LBB334:
2798 .LBI334:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
2799 .loc 2 7073 26 is_stmt 1 view .LVU860
2800 .LBB335:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2801 .loc 2 7075 3 view .LVU861
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2802 .loc 2 7075 12 is_stmt 0 view .LVU862
2803 0094 9268 ldr r2, [r2, #8]
2804 .LVL234:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2805 .loc 2 7075 74 view .LVU863
2806 0096 12F0040F tst r2, #4
2807 009a 01D1 bne .L220
2808 .LVL235:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2809 .loc 2 7075 74 view .LVU864
2810 .LBE335:
2811 .LBE334:
1211:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
2812 .loc 1 1211 12 view .LVU865
2813 009c 012B cmp r3, #1
2814 009e E1D1 bne .L218
2815 .L220:
1215:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2816 .loc 1 1215 11 is_stmt 1 view .LVU866
2817 00a0 636D ldr r3, [r4, #84]
2818 .LVL236:
1215:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2819 .loc 1 1215 11 is_stmt 0 view .LVU867
2820 00a2 43F01003 orr r3, r3, #16
2821 00a6 6365 str r3, [r4, #84]
1218:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2822 .loc 1 1218 11 is_stmt 1 view .LVU868
ARM GAS /tmp/ccTOAmWG.s page 224
1218:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2823 .loc 1 1218 11 view .LVU869
2824 00a8 0023 movs r3, #0
2825 00aa 84F85030 strb r3, [r4, #80]
1218:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2826 .loc 1 1218 11 view .LVU870
1220:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2827 .loc 1 1220 11 view .LVU871
1220:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2828 .loc 1 1220 18 is_stmt 0 view .LVU872
2829 00ae 0125 movs r5, #1
2830 .LVL237:
1220:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2831 .loc 1 1220 18 view .LVU873
2832 00b0 1CE0 b .L211
2833 .LVL238:
2834 .L221:
2835 .LBB336:
2836 .LBB329:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2837 .loc 2 7075 74 discriminator 1 view .LVU874
2838 00b2 0123 movs r3, #1
2839 00b4 DBE7 b .L223
2840 .LVL239:
2841 .L232:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
2842 .loc 2 7075 74 discriminator 1 view .LVU875
2843 .LBE329:
2844 .LBE336:
1225:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1226:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1227:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */
1228:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* while DMA transfer is on going) */
1229:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: DMA channel of ADC slave should be stopped after this function */
1230:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* with HAL_ADC_Stop_DMA() API. */
1231:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
2845 .loc 1 1231 5 is_stmt 1 view .LVU876
2846 .loc 1 1231 22 is_stmt 0 view .LVU877
2847 00b6 E06C ldr r0, [r4, #76]
2848 00b8 FFF7FEFF bl HAL_DMA_Abort
2849 .LVL240:
2850 .loc 1 1231 22 view .LVU878
2851 00bc 0546 mov r5, r0
2852 .LVL241:
1232:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1233:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */
1234:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_ERROR)
2853 .loc 1 1234 5 is_stmt 1 view .LVU879
2854 .loc 1 1234 8 is_stmt 0 view .LVU880
2855 00be 0128 cmp r0, #1
2856 00c0 17D0 beq .L233
2857 .L225:
1235:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1236:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
1237:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1238:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1239:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 225
1240:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */
1241:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
2858 .loc 1 1241 5 is_stmt 1 view .LVU881
2859 00c2 2268 ldr r2, [r4]
2860 00c4 5368 ldr r3, [r2, #4]
2861 00c6 23F01003 bic r3, r3, #16
2862 00ca 5360 str r3, [r2, #4]
1242:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1243:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 2. Disable the ADC peripherals: master and slave */
1244:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1245:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* memory a potential failing status. */
1246:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
2863 .loc 1 1246 5 view .LVU882
2864 .loc 1 1246 8 is_stmt 0 view .LVU883
2865 00cc B5B9 cbnz r5, .L226
1247:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1248:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave_disable_status = ADC_Disable(&tmphadcSlave);
2866 .loc 1 1248 7 is_stmt 1 view .LVU884
2867 .loc 1 1248 37 is_stmt 0 view .LVU885
2868 00ce 01A8 add r0, sp, #4
2869 .LVL242:
2870 .loc 1 1248 37 view .LVU886
2871 00d0 FFF7FEFF bl ADC_Disable
2872 .LVL243:
1249:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((ADC_Disable(hadc) == HAL_OK) &&
2873 .loc 1 1249 7 is_stmt 1 view .LVU887
2874 .loc 1 1249 12 is_stmt 0 view .LVU888
2875 00d4 2046 mov r0, r4
2876 00d6 FFF7FEFF bl ADC_Disable
2877 .LVL244:
1250:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (tmphadcSlave_disable_status == HAL_OK))
1251:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1252:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK;
2878 .loc 1 1252 9 is_stmt 1 view .LVU889
2879 .L227:
1253:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1254:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1255:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1256:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1257:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* In case of error, attempt to disable ADC master and slave without status assert */
1258:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (void) ADC_Disable(hadc);
1259:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (void) ADC_Disable(&tmphadcSlave);
1260:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1261:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1262:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state (ADC master) */
1263:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
2880 .loc 1 1263 5 view .LVU890
2881 00da 626D ldr r2, [r4, #84]
2882 00dc 0D4B ldr r3, .L234+4
2883 00de 1340 ands r3, r3, r2
2884 00e0 43F00103 orr r3, r3, #1
2885 00e4 6365 str r3, [r4, #84]
2886 .LVL245:
2887 .L212:
1264:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1265:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY);
1266:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 226
1267:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1268:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1269:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
2888 .loc 1 1269 3 view .LVU891
2889 .loc 1 1269 3 view .LVU892
2890 00e6 0023 movs r3, #0
2891 00e8 84F85030 strb r3, [r4, #80]
2892 .loc 1 1269 3 view .LVU893
1270:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1271:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
1272:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
2893 .loc 1 1272 3 view .LVU894
2894 .LVL246:
2895 .L211:
1273:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2896 .loc 1 1273 1 is_stmt 0 view .LVU895
2897 00ec 2846 mov r0, r5
2898 00ee 1BB0 add sp, sp, #108
2899 .cfi_remember_state
2900 .cfi_def_cfa_offset 12
2901 @ sp needed
2902 00f0 30BD pop {r4, r5, pc}
2903 .LVL247:
2904 .L233:
2905 .cfi_restore_state
1237:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2906 .loc 1 1237 7 is_stmt 1 view .LVU896
2907 00f2 636D ldr r3, [r4, #84]
2908 00f4 43F04003 orr r3, r3, #64
2909 00f8 6365 str r3, [r4, #84]
2910 00fa E2E7 b .L225
2911 .L226:
1258:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (void) ADC_Disable(&tmphadcSlave);
2912 .loc 1 1258 7 view .LVU897
1258:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (void) ADC_Disable(&tmphadcSlave);
2913 .loc 1 1258 14 is_stmt 0 view .LVU898
2914 00fc 2046 mov r0, r4
2915 .LVL248:
1258:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (void) ADC_Disable(&tmphadcSlave);
2916 .loc 1 1258 14 view .LVU899
2917 00fe FFF7FEFF bl ADC_Disable
2918 .LVL249:
1259:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2919 .loc 1 1259 7 is_stmt 1 view .LVU900
1259:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2920 .loc 1 1259 14 is_stmt 0 view .LVU901
2921 0102 01A8 add r0, sp, #4
2922 0104 FFF7FEFF bl ADC_Disable
2923 .LVL250:
2924 0108 E7E7 b .L227
2925 .LVL251:
2926 .L228:
1168:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2927 .loc 1 1168 3 discriminator 1 view .LVU902
2928 010a 0225 movs r5, #2
2929 010c EEE7 b .L211
2930 .L235:
ARM GAS /tmp/ccTOAmWG.s page 227
2931 010e 00BF .align 2
2932 .L234:
2933 0110 00200240 .word 1073881088
2934 0114 FEEEFFFF .word -4354
2935 .cfi_endproc
2936 .LFE347:
2938 .section .text.HAL_ADCEx_MultiModeGetValue,"ax",%progbits
2939 .align 1
2940 .global HAL_ADCEx_MultiModeGetValue
2941 .syntax unified
2942 .thumb
2943 .thumb_func
2945 HAL_ADCEx_MultiModeGetValue:
2946 .LVL252:
2947 .LFB348:
1274:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1275:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1276:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Return the last ADC Master and Slave regular conversions results when in multimode conf
1277:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
1278:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval The converted data values.
1279:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1280:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_MultiModeGetValue(const ADC_HandleTypeDef *hadc)
1281:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2948 .loc 1 1281 1 is_stmt 1 view -0
2949 .cfi_startproc
2950 @ args = 0, pretend = 0, frame = 0
2951 @ frame_needed = 0, uses_anonymous_args = 0
2952 @ link register save eliminated.
1282:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** const ADC_Common_TypeDef *tmpADC_Common;
2953 .loc 1 1282 3 view .LVU904
1283:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1284:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1285:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2954 .loc 1 1285 3 view .LVU905
1286:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1287:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning if no assert_param check */
1288:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */
1289:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** UNUSED(hadc);
2955 .loc 1 1289 3 view .LVU906
1290:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1291:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Pointer to the common control register */
1292:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
2956 .loc 1 1292 3 view .LVU907
1293:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1294:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return the multi mode conversion value */
1295:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmpADC_Common->CDR;
2957 .loc 1 1295 3 view .LVU908
2958 .loc 1 1295 23 is_stmt 0 view .LVU909
2959 0000 014B ldr r3, .L237
2960 0002 D868 ldr r0, [r3, #12]
2961 .LVL253:
1296:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2962 .loc 1 1296 1 view .LVU910
2963 0004 7047 bx lr
2964 .L238:
2965 0006 00BF .align 2
2966 .L237:
ARM GAS /tmp/ccTOAmWG.s page 228
2967 0008 00230240 .word 1073881856
2968 .cfi_endproc
2969 .LFE348:
2971 .section .text.HAL_ADCEx_InjectedGetValue,"ax",%progbits
2972 .align 1
2973 .global HAL_ADCEx_InjectedGetValue
2974 .syntax unified
2975 .thumb
2976 .thumb_func
2978 HAL_ADCEx_InjectedGetValue:
2979 .LVL254:
2980 .LFB349:
1297:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1298:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1299:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Get ADC injected group conversion result.
1300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Reading register JDRx automatically clears ADC flag JEOC
1301:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * (ADC group injected end of unitary conversion).
1302:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note This function does not clear ADC flag JEOS
1303:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * (ADC group injected end of sequence conversion)
1304:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Occurrence of flag JEOS rising:
1305:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * - If sequencer is composed of 1 rank, flag JEOS is equivalent
1306:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * to flag JEOC.
1307:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * - If sequencer is composed of several ranks, during the scan
1308:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * sequence flag JEOC only is raised, at the end of the scan sequence
1309:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * both flags JEOC and EOS are raised.
1310:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Flag JEOS must not be cleared by this function because
1311:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * it would not be compliant with low power features
1312:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * (feature low power auto-wait, not available on all STM32 families).
1313:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * To clear this flag, either use function:
1314:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1315:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
1316:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
1317:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1318:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param InjectedRank the converted ADC injected rank.
1319:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * This parameter can be one of the following values:
1320:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1
1321:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2
1322:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3
1323:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4
1324:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval ADC group injected conversion data
1325:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1326:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_InjectedGetValue(const ADC_HandleTypeDef *hadc, uint32_t InjectedRank)
1327:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2981 .loc 1 1327 1 is_stmt 1 view -0
2982 .cfi_startproc
2983 @ args = 0, pretend = 0, frame = 0
2984 @ frame_needed = 0, uses_anonymous_args = 0
2985 @ link register save eliminated.
1328:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_jdr;
2986 .loc 1 1328 3 view .LVU912
1329:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1330:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1331:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2987 .loc 1 1331 3 view .LVU913
1332:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
2988 .loc 1 1332 3 view .LVU914
1333:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 229
1334:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Get ADC converted value */
1335:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** switch (InjectedRank)
2989 .loc 1 1335 3 view .LVU915
2990 0000 40F21523 movw r3, #533
2991 0004 9942 cmp r1, r3
2992 0006 0FD0 beq .L240
2993 0008 40F21B33 movw r3, #795
2994 000c 9942 cmp r1, r3
2995 000e 07D0 beq .L241
2996 0010 40F20F13 movw r3, #271
2997 0014 9942 cmp r1, r3
2998 0016 0BD0 beq .L242
1336:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1337:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_4:
1338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR4;
1339:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
1340:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_3:
1341:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR3;
1342:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
1343:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_2:
1344:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR2;
1345:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
1346:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_1:
1347:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** default:
1348:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR1;
2999 .loc 1 1348 7 view .LVU916
3000 .loc 1 1348 21 is_stmt 0 view .LVU917
3001 0018 0368 ldr r3, [r0]
3002 .loc 1 1348 15 view .LVU918
3003 001a D3F88000 ldr r0, [r3, #128]
3004 .LVL255:
1349:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3005 .loc 1 1349 7 is_stmt 1 view .LVU919
1350:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1351:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1352:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return ADC converted value */
1353:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_jdr;
3006 .loc 1 1353 3 view .LVU920
1354:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3007 .loc 1 1354 1 is_stmt 0 view .LVU921
3008 001e 7047 bx lr
3009 .LVL256:
3010 .L241:
1338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3011 .loc 1 1338 7 is_stmt 1 view .LVU922
1338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3012 .loc 1 1338 21 is_stmt 0 view .LVU923
3013 0020 0368 ldr r3, [r0]
1338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3014 .loc 1 1338 15 view .LVU924
3015 0022 D3F88C00 ldr r0, [r3, #140]
3016 .LVL257:
1339:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_3:
3017 .loc 1 1339 7 is_stmt 1 view .LVU925
3018 0026 7047 bx lr
3019 .LVL258:
3020 .L240:
ARM GAS /tmp/ccTOAmWG.s page 230
1341:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3021 .loc 1 1341 7 view .LVU926
1341:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3022 .loc 1 1341 21 is_stmt 0 view .LVU927
3023 0028 0368 ldr r3, [r0]
1341:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3024 .loc 1 1341 15 view .LVU928
3025 002a D3F88800 ldr r0, [r3, #136]
3026 .LVL259:
1342:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_2:
3027 .loc 1 1342 7 is_stmt 1 view .LVU929
3028 002e 7047 bx lr
3029 .LVL260:
3030 .L242:
1344:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3031 .loc 1 1344 7 view .LVU930
1344:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3032 .loc 1 1344 21 is_stmt 0 view .LVU931
3033 0030 0368 ldr r3, [r0]
1344:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** break;
3034 .loc 1 1344 15 view .LVU932
3035 0032 D3F88400 ldr r0, [r3, #132]
3036 .LVL261:
1345:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_1:
3037 .loc 1 1345 7 is_stmt 1 view .LVU933
3038 0036 7047 bx lr
3039 .cfi_endproc
3040 .LFE349:
3042 .section .text.HAL_ADCEx_InjectedConvCpltCallback,"ax",%progbits
3043 .align 1
3044 .weak HAL_ADCEx_InjectedConvCpltCallback
3045 .syntax unified
3046 .thumb
3047 .thumb_func
3049 HAL_ADCEx_InjectedConvCpltCallback:
3050 .LVL262:
3051 .LFB350:
1355:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1356:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1357:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Injected conversion complete callback in non-blocking mode.
1358:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1359:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval None
1360:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1361:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc)
1362:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3052 .loc 1 1362 1 view -0
3053 .cfi_startproc
3054 @ args = 0, pretend = 0, frame = 0
3055 @ frame_needed = 0, uses_anonymous_args = 0
3056 @ link register save eliminated.
1363:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */
1364:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** UNUSED(hadc);
3057 .loc 1 1364 3 view .LVU935
1365:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1366:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed,
1367:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
1368:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
ARM GAS /tmp/ccTOAmWG.s page 231
1369:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3058 .loc 1 1369 1 is_stmt 0 view .LVU936
3059 0000 7047 bx lr
3060 .cfi_endproc
3061 .LFE350:
3063 .section .text.HAL_ADCEx_InjectedQueueOverflowCallback,"ax",%progbits
3064 .align 1
3065 .weak HAL_ADCEx_InjectedQueueOverflowCallback
3066 .syntax unified
3067 .thumb
3068 .thumb_func
3070 HAL_ADCEx_InjectedQueueOverflowCallback:
3071 .LVL263:
3072 .LFB351:
1370:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1371:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1372:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Injected context queue overflow callback.
1373:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note This callback is called if injected context queue is enabled
1374:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (parameter "QueueInjectedContext" in injected channel configuration)
1375:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** and if a new injected context is set when queue is full (maximum 2
1376:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** contexts).
1377:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1378:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval None
1379:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1380:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc)
1381:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3073 .loc 1 1381 1 is_stmt 1 view -0
3074 .cfi_startproc
3075 @ args = 0, pretend = 0, frame = 0
3076 @ frame_needed = 0, uses_anonymous_args = 0
3077 @ link register save eliminated.
1382:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */
1383:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** UNUSED(hadc);
3078 .loc 1 1383 3 view .LVU938
1384:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1385:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed,
1386:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
1387:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1388:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3079 .loc 1 1388 1 is_stmt 0 view .LVU939
3080 0000 7047 bx lr
3081 .cfi_endproc
3082 .LFE351:
3084 .section .text.HAL_ADCEx_LevelOutOfWindow2Callback,"ax",%progbits
3085 .align 1
3086 .weak HAL_ADCEx_LevelOutOfWindow2Callback
3087 .syntax unified
3088 .thumb
3089 .thumb_func
3091 HAL_ADCEx_LevelOutOfWindow2Callback:
3092 .LVL264:
3093 .LFB352:
1389:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1390:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1391:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Analog watchdog 2 callback in non-blocking mode.
1392:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1393:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval None
ARM GAS /tmp/ccTOAmWG.s page 232
1394:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1395:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc)
1396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3094 .loc 1 1396 1 is_stmt 1 view -0
3095 .cfi_startproc
3096 @ args = 0, pretend = 0, frame = 0
3097 @ frame_needed = 0, uses_anonymous_args = 0
3098 @ link register save eliminated.
1397:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */
1398:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** UNUSED(hadc);
3099 .loc 1 1398 3 view .LVU941
1399:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1400:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed,
1401:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
1402:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1403:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3100 .loc 1 1403 1 is_stmt 0 view .LVU942
3101 0000 7047 bx lr
3102 .cfi_endproc
3103 .LFE352:
3105 .section .text.HAL_ADCEx_LevelOutOfWindow3Callback,"ax",%progbits
3106 .align 1
3107 .weak HAL_ADCEx_LevelOutOfWindow3Callback
3108 .syntax unified
3109 .thumb
3110 .thumb_func
3112 HAL_ADCEx_LevelOutOfWindow3Callback:
3113 .LVL265:
3114 .LFB353:
1404:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1405:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1406:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Analog watchdog 3 callback in non-blocking mode.
1407:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1408:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval None
1409:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1410:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc)
1411:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3115 .loc 1 1411 1 is_stmt 1 view -0
3116 .cfi_startproc
3117 @ args = 0, pretend = 0, frame = 0
3118 @ frame_needed = 0, uses_anonymous_args = 0
3119 @ link register save eliminated.
1412:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */
1413:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** UNUSED(hadc);
3120 .loc 1 1413 3 view .LVU944
1414:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1415:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed,
1416:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
1417:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1418:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3121 .loc 1 1418 1 is_stmt 0 view .LVU945
3122 0000 7047 bx lr
3123 .cfi_endproc
3124 .LFE353:
3126 .section .text.HAL_ADCEx_EndOfSamplingCallback,"ax",%progbits
3127 .align 1
3128 .weak HAL_ADCEx_EndOfSamplingCallback
ARM GAS /tmp/ccTOAmWG.s page 233
3129 .syntax unified
3130 .thumb
3131 .thumb_func
3133 HAL_ADCEx_EndOfSamplingCallback:
3134 .LVL266:
3135 .LFB354:
1419:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1420:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1421:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1422:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief End Of Sampling callback in non-blocking mode.
1423:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1424:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval None
1425:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1426:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc)
1427:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3136 .loc 1 1427 1 is_stmt 1 view -0
3137 .cfi_startproc
3138 @ args = 0, pretend = 0, frame = 0
3139 @ frame_needed = 0, uses_anonymous_args = 0
3140 @ link register save eliminated.
1428:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */
1429:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** UNUSED(hadc);
3141 .loc 1 1429 3 view .LVU947
1430:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1431:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed,
1432:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
1433:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1434:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3142 .loc 1 1434 1 is_stmt 0 view .LVU948
3143 0000 7047 bx lr
3144 .cfi_endproc
3145 .LFE354:
3147 .section .text.HAL_ADCEx_RegularStop,"ax",%progbits
3148 .align 1
3149 .global HAL_ADCEx_RegularStop
3150 .syntax unified
3151 .thumb
3152 .thumb_func
3154 HAL_ADCEx_RegularStop:
3155 .LVL267:
3156 .LFB355:
1435:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1436:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1437:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Stop ADC conversion of regular group (and injected channels in
1438:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * case of auto_injection mode), disable ADC peripheral if no
1439:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * conversion is on going on injected group.
1440:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1441:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status.
1442:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1443:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc)
1444:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3157 .loc 1 1444 1 is_stmt 1 view -0
3158 .cfi_startproc
3159 @ args = 0, pretend = 0, frame = 0
3160 @ frame_needed = 0, uses_anonymous_args = 0
1445:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
3161 .loc 1 1445 3 view .LVU950
ARM GAS /tmp/ccTOAmWG.s page 234
1446:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1447:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1448:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
3162 .loc 1 1448 3 view .LVU951
1449:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1450:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
1451:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
3163 .loc 1 1451 3 view .LVU952
3164 .loc 1 1451 3 view .LVU953
3165 0000 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
3166 0004 012B cmp r3, #1
3167 0006 24D0 beq .L255
1444:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
3168 .loc 1 1444 1 is_stmt 0 view .LVU954
3169 0008 10B5 push {r4, lr}
3170 .cfi_def_cfa_offset 8
3171 .cfi_offset 4, -8
3172 .cfi_offset 14, -4
3173 000a 0446 mov r4, r0
3174 .loc 1 1451 3 is_stmt 1 discriminator 2 view .LVU955
3175 000c 0121 movs r1, #1
3176 000e 80F85010 strb r1, [r0, #80]
3177 .loc 1 1451 3 view .LVU956
1452:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1453:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */
1454:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
3178 .loc 1 1454 3 view .LVU957
3179 .loc 1 1454 20 is_stmt 0 view .LVU958
3180 0012 FFF7FEFF bl ADC_ConversionStop
3181 .LVL268:
1455:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1456:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC peripheral if regular conversions are effectively stopped
1457:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** and if no injected conversions are on-going */
1458:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
3182 .loc 1 1458 3 is_stmt 1 view .LVU959
3183 .loc 1 1458 6 is_stmt 0 view .LVU960
3184 0016 60B9 cbnz r0, .L253
1459:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1460:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */
1461:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
3185 .loc 1 1461 5 is_stmt 1 view .LVU961
3186 0018 636D ldr r3, [r4, #84]
3187 001a 23F48073 bic r3, r3, #256
3188 001e 6365 str r3, [r4, #84]
1462:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1463:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
3189 .loc 1 1463 5 view .LVU962
3190 .loc 1 1463 44 is_stmt 0 view .LVU963
3191 0020 2368 ldr r3, [r4]
3192 .LVL269:
3193 .LBB337:
3194 .LBI337:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3195 .loc 2 7268 26 is_stmt 1 view .LVU964
3196 .LBB338:
3197 .loc 2 7270 3 view .LVU965
3198 .loc 2 7270 12 is_stmt 0 view .LVU966
ARM GAS /tmp/ccTOAmWG.s page 235
3199 0022 9B68 ldr r3, [r3, #8]
3200 .LVL270:
3201 .loc 2 7270 76 view .LVU967
3202 0024 13F0080F tst r3, #8
3203 0028 07D0 beq .L254
3204 .LVL271:
3205 .loc 2 7270 76 view .LVU968
3206 .LBE338:
3207 .LBE337:
1464:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1465:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */
1466:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc);
1467:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1468:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */
1469:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
1470:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1471:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
1472:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
1473:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY,
1474:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY);
1475:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1476:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1477:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */
1478:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* conversion on regular group is still running. */
1479:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1480:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1481:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
3208 .loc 1 1481 7 is_stmt 1 view .LVU969
3209 002a 636D ldr r3, [r4, #84]
3210 002c 43F48053 orr r3, r3, #4096
3211 0030 6365 str r3, [r4, #84]
3212 .L253:
1482:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1483:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1484:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1485:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1486:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
3213 .loc 1 1486 3 view .LVU970
3214 .loc 1 1486 3 view .LVU971
3215 0032 0023 movs r3, #0
3216 0034 84F85030 strb r3, [r4, #80]
3217 .loc 1 1486 3 view .LVU972
1487:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1488:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
1489:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
3218 .loc 1 1489 3 view .LVU973
1490:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3219 .loc 1 1490 1 is_stmt 0 view .LVU974
3220 0038 10BD pop {r4, pc}
3221 .LVL272:
3222 .L254:
1466:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3223 .loc 1 1466 7 is_stmt 1 view .LVU975
1466:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3224 .loc 1 1466 24 is_stmt 0 view .LVU976
3225 003a 2046 mov r0, r4
3226 .LVL273:
ARM GAS /tmp/ccTOAmWG.s page 236
1466:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3227 .loc 1 1466 24 view .LVU977
3228 003c FFF7FEFF bl ADC_Disable
3229 .LVL274:
1469:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3230 .loc 1 1469 7 is_stmt 1 view .LVU978
1469:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3231 .loc 1 1469 10 is_stmt 0 view .LVU979
3232 0040 0028 cmp r0, #0
3233 0042 F6D1 bne .L253
1472:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY,
3234 .loc 1 1472 9 is_stmt 1 view .LVU980
3235 0044 626D ldr r2, [r4, #84]
3236 0046 044B ldr r3, .L260
3237 0048 1340 ands r3, r3, r2
3238 004a 43F00103 orr r3, r3, #1
3239 004e 6365 str r3, [r4, #84]
3240 0050 EFE7 b .L253
3241 .LVL275:
3242 .L255:
3243 .cfi_def_cfa_offset 0
3244 .cfi_restore 4
3245 .cfi_restore 14
1451:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3246 .loc 1 1451 3 is_stmt 0 discriminator 1 view .LVU981
3247 0052 0220 movs r0, #2
3248 .LVL276:
3249 .loc 1 1490 1 view .LVU982
3250 0054 7047 bx lr
3251 .L261:
3252 0056 00BF .align 2
3253 .L260:
3254 0058 FEEFFFFF .word -4098
3255 .cfi_endproc
3256 .LFE355:
3258 .section .text.HAL_ADCEx_RegularStop_IT,"ax",%progbits
3259 .align 1
3260 .global HAL_ADCEx_RegularStop_IT
3261 .syntax unified
3262 .thumb
3263 .thumb_func
3265 HAL_ADCEx_RegularStop_IT:
3266 .LVL277:
3267 .LFB356:
1491:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1492:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1493:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1494:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Stop ADC conversion of ADC groups regular and injected,
1495:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * disable interrution of end-of-conversion,
1496:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * disable ADC peripheral if no conversion is on going
1497:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * on injected group.
1498:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1499:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status.
1500:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1501:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc)
1502:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3268 .loc 1 1502 1 is_stmt 1 view -0
ARM GAS /tmp/ccTOAmWG.s page 237
3269 .cfi_startproc
3270 @ args = 0, pretend = 0, frame = 0
3271 @ frame_needed = 0, uses_anonymous_args = 0
1503:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
3272 .loc 1 1503 3 view .LVU984
1504:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1505:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1506:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
3273 .loc 1 1506 3 view .LVU985
1507:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1508:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
1509:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
3274 .loc 1 1509 3 view .LVU986
3275 .loc 1 1509 3 view .LVU987
3276 0000 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
3277 0004 012B cmp r3, #1
3278 0006 29D0 beq .L266
1502:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
3279 .loc 1 1502 1 is_stmt 0 view .LVU988
3280 0008 10B5 push {r4, lr}
3281 .cfi_def_cfa_offset 8
3282 .cfi_offset 4, -8
3283 .cfi_offset 14, -4
3284 000a 0446 mov r4, r0
3285 .loc 1 1509 3 is_stmt 1 discriminator 2 view .LVU989
3286 000c 0121 movs r1, #1
3287 000e 80F85010 strb r1, [r0, #80]
3288 .loc 1 1509 3 view .LVU990
1510:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1511:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */
1512:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
3289 .loc 1 1512 3 view .LVU991
3290 .loc 1 1512 20 is_stmt 0 view .LVU992
3291 0012 FFF7FEFF bl ADC_ConversionStop
3292 .LVL278:
1513:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1514:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped
1515:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** and if no injected conversion is on-going */
1516:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
3293 .loc 1 1516 3 is_stmt 1 view .LVU993
3294 .loc 1 1516 6 is_stmt 0 view .LVU994
3295 0016 88B9 cbnz r0, .L264
1517:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1518:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */
1519:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
3296 .loc 1 1519 5 is_stmt 1 view .LVU995
3297 0018 636D ldr r3, [r4, #84]
3298 001a 23F48073 bic r3, r3, #256
3299 001e 6365 str r3, [r4, #84]
1520:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1521:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable all regular-related interrupts */
1522:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
3300 .loc 1 1522 5 view .LVU996
3301 0020 2268 ldr r2, [r4]
3302 0022 5368 ldr r3, [r2, #4]
3303 0024 23F01C03 bic r3, r3, #28
3304 0028 5360 str r3, [r2, #4]
ARM GAS /tmp/ccTOAmWG.s page 238
1523:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1524:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 2. Disable ADC peripheral if no injected conversions are on-going */
1525:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
3305 .loc 1 1525 5 view .LVU997
3306 .loc 1 1525 44 is_stmt 0 view .LVU998
3307 002a 2368 ldr r3, [r4]
3308 .LVL279:
3309 .LBB339:
3310 .LBI339:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3311 .loc 2 7268 26 is_stmt 1 view .LVU999
3312 .LBB340:
3313 .loc 2 7270 3 view .LVU1000
3314 .loc 2 7270 12 is_stmt 0 view .LVU1001
3315 002c 9B68 ldr r3, [r3, #8]
3316 .LVL280:
3317 .loc 2 7270 76 view .LVU1002
3318 002e 13F0080F tst r3, #8
3319 0032 07D0 beq .L265
3320 .LVL281:
3321 .loc 2 7270 76 view .LVU1003
3322 .LBE340:
3323 .LBE339:
1526:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1527:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc);
1528:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* if no issue reported */
1529:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
1530:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1531:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
1532:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
1533:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY,
1534:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY);
1535:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1536:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1537:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1538:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1539:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
3324 .loc 1 1539 7 is_stmt 1 view .LVU1004
3325 0034 636D ldr r3, [r4, #84]
3326 0036 43F48053 orr r3, r3, #4096
3327 003a 6365 str r3, [r4, #84]
3328 .L264:
1540:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1541:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1542:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1543:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1544:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
3329 .loc 1 1544 3 view .LVU1005
3330 .loc 1 1544 3 view .LVU1006
3331 003c 0023 movs r3, #0
3332 003e 84F85030 strb r3, [r4, #80]
3333 .loc 1 1544 3 view .LVU1007
1545:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1546:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
1547:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
3334 .loc 1 1547 3 view .LVU1008
1548:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 239
3335 .loc 1 1548 1 is_stmt 0 view .LVU1009
3336 0042 10BD pop {r4, pc}
3337 .LVL282:
3338 .L265:
1527:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* if no issue reported */
3339 .loc 1 1527 7 is_stmt 1 view .LVU1010
1527:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* if no issue reported */
3340 .loc 1 1527 24 is_stmt 0 view .LVU1011
3341 0044 2046 mov r0, r4
3342 .LVL283:
1527:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* if no issue reported */
3343 .loc 1 1527 24 view .LVU1012
3344 0046 FFF7FEFF bl ADC_Disable
3345 .LVL284:
1529:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3346 .loc 1 1529 7 is_stmt 1 view .LVU1013
1529:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3347 .loc 1 1529 10 is_stmt 0 view .LVU1014
3348 004a 0028 cmp r0, #0
3349 004c F6D1 bne .L264
1532:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY,
3350 .loc 1 1532 9 is_stmt 1 view .LVU1015
3351 004e 626D ldr r2, [r4, #84]
3352 0050 034B ldr r3, .L271
3353 0052 1340 ands r3, r3, r2
3354 0054 43F00103 orr r3, r3, #1
3355 0058 6365 str r3, [r4, #84]
3356 005a EFE7 b .L264
3357 .LVL285:
3358 .L266:
3359 .cfi_def_cfa_offset 0
3360 .cfi_restore 4
3361 .cfi_restore 14
1509:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3362 .loc 1 1509 3 is_stmt 0 discriminator 1 view .LVU1016
3363 005c 0220 movs r0, #2
3364 .LVL286:
3365 .loc 1 1548 1 view .LVU1017
3366 005e 7047 bx lr
3367 .L272:
3368 .align 2
3369 .L271:
3370 0060 FEEFFFFF .word -4098
3371 .cfi_endproc
3372 .LFE356:
3374 .section .text.HAL_ADCEx_RegularStop_DMA,"ax",%progbits
3375 .align 1
3376 .global HAL_ADCEx_RegularStop_DMA
3377 .syntax unified
3378 .thumb
3379 .thumb_func
3381 HAL_ADCEx_RegularStop_DMA:
3382 .LVL287:
3383 .LFB357:
1549:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1550:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1551:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Stop ADC conversion of regular group (and injected group in
ARM GAS /tmp/ccTOAmWG.s page 240
1552:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * case of auto_injection mode), disable ADC DMA transfer, disable
1553:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * ADC peripheral if no conversion is on going
1554:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * on injected group.
1555:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
1556:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For multimode (when multimode feature is available),
1557:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
1558:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1559:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status.
1560:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1561:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc)
1562:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3384 .loc 1 1562 1 is_stmt 1 view -0
3385 .cfi_startproc
3386 @ args = 0, pretend = 0, frame = 0
3387 @ frame_needed = 0, uses_anonymous_args = 0
3388 .loc 1 1562 1 is_stmt 0 view .LVU1019
3389 0000 38B5 push {r3, r4, r5, lr}
3390 .cfi_def_cfa_offset 16
3391 .cfi_offset 3, -16
3392 .cfi_offset 4, -12
3393 .cfi_offset 5, -8
3394 .cfi_offset 14, -4
1563:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
3395 .loc 1 1563 3 is_stmt 1 view .LVU1020
1564:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1565:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1566:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
3396 .loc 1 1566 3 view .LVU1021
1567:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1568:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
1569:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
3397 .loc 1 1569 3 view .LVU1022
3398 .loc 1 1569 3 view .LVU1023
3399 0002 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
3400 0006 012B cmp r3, #1
3401 0008 3FD0 beq .L280
3402 000a 0446 mov r4, r0
3403 .loc 1 1569 3 discriminator 2 view .LVU1024
3404 000c 0121 movs r1, #1
3405 000e 80F85010 strb r1, [r0, #80]
3406 .loc 1 1569 3 view .LVU1025
1570:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1571:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */
1572:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
3407 .loc 1 1572 3 view .LVU1026
3408 .loc 1 1572 20 is_stmt 0 view .LVU1027
3409 0012 FFF7FEFF bl ADC_ConversionStop
3410 .LVL288:
1573:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1574:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped
1575:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** and if no injected conversion is on-going */
1576:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
3411 .loc 1 1576 3 is_stmt 1 view .LVU1028
3412 .loc 1 1576 6 is_stmt 0 view .LVU1029
3413 0016 0546 mov r5, r0
3414 0018 20B1 cbz r0, .L282
3415 .LVL289:
ARM GAS /tmp/ccTOAmWG.s page 241
3416 .L275:
1577:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1578:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */
1579:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1580:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1581:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1582:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_DMNGT_0 | ADC_CFGR_DMNGT_1, 0UL);
1583:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1584:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1585:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* while DMA transfer is on going) */
1586:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1587:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1588:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */
1589:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status != HAL_OK)
1590:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1591:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
1592:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1593:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1594:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1595:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */
1596:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1597:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1598:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */
1599:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, */
1600:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* to keep in memory a potential failing status. */
1601:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1602:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1603:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
1604:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1605:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc);
1606:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1607:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1608:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1609:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (void)ADC_Disable(hadc);
1610:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1611:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1612:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */
1613:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
1614:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1615:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC state */
1616:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State,
1617:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY,
1618:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_READY);
1619:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1620:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1621:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1622:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1623:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1624:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1625:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1626:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1627:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1628:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
3417 .loc 1 1628 3 is_stmt 1 view .LVU1030
3418 .loc 1 1628 3 view .LVU1031
3419 001a 0023 movs r3, #0
3420 001c 84F85030 strb r3, [r4, #80]
ARM GAS /tmp/ccTOAmWG.s page 242
3421 .loc 1 1628 3 view .LVU1032
1629:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1630:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
1631:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
3422 .loc 1 1631 3 view .LVU1033
3423 .LVL290:
3424 .L274:
1632:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3425 .loc 1 1632 1 is_stmt 0 view .LVU1034
3426 0020 2846 mov r0, r5
3427 0022 38BD pop {r3, r4, r5, pc}
3428 .LVL291:
3429 .L282:
1579:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3430 .loc 1 1579 5 is_stmt 1 view .LVU1035
3431 0024 636D ldr r3, [r4, #84]
3432 0026 23F48073 bic r3, r3, #256
3433 002a 6365 str r3, [r4, #84]
1582:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3434 .loc 1 1582 5 view .LVU1036
3435 002c 2268 ldr r2, [r4]
3436 002e D368 ldr r3, [r2, #12]
3437 0030 23F00303 bic r3, r3, #3
3438 0034 D360 str r3, [r2, #12]
1586:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3439 .loc 1 1586 5 view .LVU1037
1586:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3440 .loc 1 1586 22 is_stmt 0 view .LVU1038
3441 0036 E06C ldr r0, [r4, #76]
3442 .LVL292:
1586:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3443 .loc 1 1586 22 view .LVU1039
3444 0038 FFF7FEFF bl HAL_DMA_Abort
3445 .LVL293:
1589:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3446 .loc 1 1589 5 is_stmt 1 view .LVU1040
1589:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3447 .loc 1 1589 8 is_stmt 0 view .LVU1041
3448 003c 0546 mov r5, r0
3449 003e 18B1 cbz r0, .L276
1592:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3450 .loc 1 1592 7 is_stmt 1 view .LVU1042
3451 0040 636D ldr r3, [r4, #84]
3452 0042 43F04003 orr r3, r3, #64
3453 0046 6365 str r3, [r4, #84]
3454 .L276:
1596:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3455 .loc 1 1596 5 view .LVU1043
3456 0048 2268 ldr r2, [r4]
3457 004a 5368 ldr r3, [r2, #4]
3458 004c 23F01003 bic r3, r3, #16
3459 0050 5360 str r3, [r2, #4]
1601:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3460 .loc 1 1601 5 view .LVU1044
1601:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3461 .loc 1 1601 44 is_stmt 0 view .LVU1045
3462 0052 2368 ldr r3, [r4]
ARM GAS /tmp/ccTOAmWG.s page 243
3463 .LVL294:
3464 .LBB341:
3465 .LBI341:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3466 .loc 2 7268 26 is_stmt 1 view .LVU1046
3467 .LBB342:
3468 .loc 2 7270 3 view .LVU1047
3469 .loc 2 7270 12 is_stmt 0 view .LVU1048
3470 0054 9B68 ldr r3, [r3, #8]
3471 .LVL295:
3472 .loc 2 7270 76 view .LVU1049
3473 0056 13F0080F tst r3, #8
3474 005a 04D0 beq .L277
3475 .LVL296:
3476 .loc 2 7270 76 view .LVU1050
3477 .LBE342:
3478 .LBE341:
1623:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3479 .loc 1 1623 7 is_stmt 1 view .LVU1051
3480 005c 636D ldr r3, [r4, #84]
3481 005e 43F48053 orr r3, r3, #4096
3482 0062 6365 str r3, [r4, #84]
3483 0064 D9E7 b .L275
3484 .LVL297:
3485 .L277:
1603:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3486 .loc 1 1603 7 view .LVU1052
1603:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3487 .loc 1 1603 10 is_stmt 0 view .LVU1053
3488 0066 65B9 cbnz r5, .L278
1605:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3489 .loc 1 1605 9 is_stmt 1 view .LVU1054
1605:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3490 .loc 1 1605 26 is_stmt 0 view .LVU1055
3491 0068 2046 mov r0, r4
3492 .LVL298:
1605:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3493 .loc 1 1605 26 view .LVU1056
3494 006a FFF7FEFF bl ADC_Disable
3495 .LVL299:
3496 006e 0546 mov r5, r0
3497 .LVL300:
3498 .L279:
1613:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3499 .loc 1 1613 7 is_stmt 1 view .LVU1057
1613:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3500 .loc 1 1613 10 is_stmt 0 view .LVU1058
3501 0070 002D cmp r5, #0
3502 0072 D2D1 bne .L275
1616:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY,
3503 .loc 1 1616 9 is_stmt 1 view .LVU1059
3504 0074 626D ldr r2, [r4, #84]
3505 0076 064B ldr r3, .L283
3506 0078 1340 ands r3, r3, r2
3507 007a 43F00103 orr r3, r3, #1
3508 007e 6365 str r3, [r4, #84]
3509 0080 CBE7 b .L275
ARM GAS /tmp/ccTOAmWG.s page 244
3510 .LVL301:
3511 .L278:
1609:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3512 .loc 1 1609 9 view .LVU1060
1609:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3513 .loc 1 1609 15 is_stmt 0 view .LVU1061
3514 0082 2046 mov r0, r4
3515 .LVL302:
1609:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3516 .loc 1 1609 15 view .LVU1062
3517 0084 FFF7FEFF bl ADC_Disable
3518 .LVL303:
3519 0088 F2E7 b .L279
3520 .LVL304:
3521 .L280:
1569:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3522 .loc 1 1569 3 discriminator 1 view .LVU1063
3523 008a 0225 movs r5, #2
3524 008c C8E7 b .L274
3525 .L284:
3526 008e 00BF .align 2
3527 .L283:
3528 0090 FEEFFFFF .word -4098
3529 .cfi_endproc
3530 .LFE357:
3532 .section .text.HAL_ADCEx_RegularMultiModeStop_DMA,"ax",%progbits
3533 .align 1
3534 .global HAL_ADCEx_RegularMultiModeStop_DMA
3535 .syntax unified
3536 .thumb
3537 .thumb_func
3539 HAL_ADCEx_RegularMultiModeStop_DMA:
3540 .LVL305:
3541 .LFB358:
1633:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1634:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1635:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripher
1636:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Multimode is kept enabled after this function. Multimode DMA bits
1637:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1638:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1639:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1640:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * resort to HAL_ADCEx_DisableMultiMode() API.
1641:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note In case of DMA configured in circular mode, function
1642:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
1643:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * ADC slave, to properly disable the DMA channel.
1644:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1645:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
1646:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1647:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1648:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3542 .loc 1 1648 1 is_stmt 1 view -0
3543 .cfi_startproc
3544 @ args = 0, pretend = 0, frame = 104
3545 @ frame_needed = 0, uses_anonymous_args = 0
1649:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
3546 .loc 1 1649 3 view .LVU1065
1650:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tickstart;
ARM GAS /tmp/ccTOAmWG.s page 245
3547 .loc 1 1650 3 view .LVU1066
1651:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave;
3548 .loc 1 1651 3 view .LVU1067
1652:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going;
3549 .loc 1 1652 3 view .LVU1068
1653:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1654:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1655:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
3550 .loc 1 1655 3 view .LVU1069
1656:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1657:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
1658:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
3551 .loc 1 1658 3 view .LVU1070
3552 .loc 1 1658 3 view .LVU1071
3553 0000 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
3554 0004 012B cmp r3, #1
3555 0006 00F08480 beq .L302
1648:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
3556 .loc 1 1648 1 is_stmt 0 view .LVU1072
3557 000a 30B5 push {r4, r5, lr}
3558 .cfi_def_cfa_offset 12
3559 .cfi_offset 4, -12
3560 .cfi_offset 5, -8
3561 .cfi_offset 14, -4
3562 000c 9BB0 sub sp, sp, #108
3563 .cfi_def_cfa_offset 120
3564 000e 0446 mov r4, r0
3565 .loc 1 1658 3 is_stmt 1 discriminator 2 view .LVU1073
3566 0010 0121 movs r1, #1
3567 0012 80F85010 strb r1, [r0, #80]
3568 .loc 1 1658 3 view .LVU1074
1659:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1660:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1661:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Stop potential multimode conversion on going, on regular groups */
1662:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
3569 .loc 1 1662 3 view .LVU1075
3570 .loc 1 1662 20 is_stmt 0 view .LVU1076
3571 0016 FFF7FEFF bl ADC_ConversionStop
3572 .LVL306:
1663:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1664:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped */
1665:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
3573 .loc 1 1665 3 is_stmt 1 view .LVU1077
3574 .loc 1 1665 6 is_stmt 0 view .LVU1078
3575 001a 0028 cmp r0, #0
3576 001c 74D1 bne .L287
1666:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1667:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */
1668:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
3577 .loc 1 1668 5 is_stmt 1 view .LVU1079
3578 001e 636D ldr r3, [r4, #84]
3579 0020 23F48073 bic r3, r3, #256
3580 0024 6365 str r3, [r4, #84]
1669:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1670:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave.State = HAL_ADC_STATE_RESET;
3581 .loc 1 1670 5 view .LVU1080
3582 .loc 1 1670 24 is_stmt 0 view .LVU1081
ARM GAS /tmp/ccTOAmWG.s page 246
3583 0026 0023 movs r3, #0
3584 0028 1693 str r3, [sp, #88]
1671:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave.ErrorCode = HAL_ADC_ERROR_NONE;
3585 .loc 1 1671 5 is_stmt 1 view .LVU1082
3586 .loc 1 1671 28 is_stmt 0 view .LVU1083
3587 002a 1793 str r3, [sp, #92]
1672:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1673:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */
1674:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
3588 .loc 1 1674 5 is_stmt 1 view .LVU1084
3589 002c 2268 ldr r2, [r4]
3590 002e 3A4B ldr r3, .L310
3591 0030 9A42 cmp r2, r3
3592 0032 0DD0 beq .L307
3593 .loc 1 1674 5 is_stmt 0 discriminator 2 view .LVU1085
3594 0034 0023 movs r3, #0
3595 0036 0193 str r3, [sp, #4]
3596 .L289:
1675:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1676:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL)
3597 .loc 1 1676 5 is_stmt 1 view .LVU1086
3598 .loc 1 1676 21 is_stmt 0 view .LVU1087
3599 0038 019B ldr r3, [sp, #4]
3600 .loc 1 1676 8 view .LVU1088
3601 003a 6BB1 cbz r3, .L308
1677:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1678:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
1679:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1680:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1681:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1682:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1683:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1684:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
1685:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1686:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1687:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Procedure to disable the ADC peripheral: wait for conversions */
1688:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* effectively stopped (ADC master and ADC slave), then disable ADC */
1689:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1690:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1691:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tickstart = HAL_GetTick();
3602 .loc 1 1691 5 is_stmt 1 view .LVU1089
3603 .loc 1 1691 17 is_stmt 0 view .LVU1090
3604 003c FFF7FEFF bl HAL_GetTick
3605 .LVL307:
3606 .loc 1 1691 17 view .LVU1091
3607 0040 0546 mov r5, r0
3608 .LVL308:
1692:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1693:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
3609 .loc 1 1693 5 is_stmt 1 view .LVU1092
3610 .loc 1 1693 86 is_stmt 0 view .LVU1093
3611 0042 019B ldr r3, [sp, #4]
3612 .LVL309:
3613 .LBB343:
3614 .LBI343:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3615 .loc 2 7073 26 is_stmt 1 view .LVU1094
ARM GAS /tmp/ccTOAmWG.s page 247
3616 .LBB344:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3617 .loc 2 7075 3 view .LVU1095
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3618 .loc 2 7075 12 is_stmt 0 view .LVU1096
3619 0044 9B68 ldr r3, [r3, #8]
3620 .LVL310:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3621 .loc 2 7075 74 view .LVU1097
3622 0046 13F00403 ands r3, r3, #4
3623 004a 13D0 beq .L298
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3624 .loc 2 7075 74 discriminator 1 view .LVU1098
3625 004c 0123 movs r3, #1
3626 004e 11E0 b .L298
3627 .LVL311:
3628 .L307:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3629 .loc 2 7075 74 discriminator 1 view .LVU1099
3630 .LBE344:
3631 .LBE343:
1674:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3632 .loc 1 1674 5 discriminator 1 view .LVU1100
3633 0050 03F58073 add r3, r3, #256
3634 0054 0193 str r3, [sp, #4]
3635 0056 EFE7 b .L289
3636 .L308:
1679:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3637 .loc 1 1679 7 is_stmt 1 view .LVU1101
3638 0058 636D ldr r3, [r4, #84]
3639 005a 43F02003 orr r3, r3, #32
3640 005e 6365 str r3, [r4, #84]
1682:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3641 .loc 1 1682 7 view .LVU1102
1682:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3642 .loc 1 1682 7 view .LVU1103
3643 0060 0023 movs r3, #0
3644 0062 84F85030 strb r3, [r4, #80]
1682:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3645 .loc 1 1682 7 view .LVU1104
1684:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3646 .loc 1 1684 7 view .LVU1105
1684:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3647 .loc 1 1684 14 is_stmt 0 view .LVU1106
3648 0066 0120 movs r0, #1
3649 .LVL312:
1684:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3650 .loc 1 1684 14 view .LVU1107
3651 0068 51E0 b .L286
3652 .LVL313:
3653 .L293:
1694:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1695:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
1696:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
1697:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1698:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1699:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
ARM GAS /tmp/ccTOAmWG.s page 248
1700:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */
1701:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance
1702:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1703:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1704:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
1705:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
1706:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1707:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
1708:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1709:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1710:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1711:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
1712:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1713:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
1714:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1715:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1716:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1717:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
3654 .loc 1 1717 7 is_stmt 1 view .LVU1108
3655 .loc 1 1717 88 is_stmt 0 view .LVU1109
3656 006a 019B ldr r3, [sp, #4]
3657 .LVL314:
3658 .LBB345:
3659 .LBI345:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3660 .loc 2 7073 26 is_stmt 1 view .LVU1110
3661 .LBB346:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3662 .loc 2 7075 3 view .LVU1111
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3663 .loc 2 7075 12 is_stmt 0 view .LVU1112
3664 006c 9B68 ldr r3, [r3, #8]
3665 .LVL315:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3666 .loc 2 7075 74 view .LVU1113
3667 006e 13F00403 ands r3, r3, #4
3668 0072 21D1 bne .L296
3669 .LVL316:
3670 .L298:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3671 .loc 2 7075 74 view .LVU1114
3672 .LBE346:
3673 .LBE345:
1695:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
3674 .loc 1 1695 12 is_stmt 1 view .LVU1115
1694:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
3675 .loc 1 1694 48 is_stmt 0 view .LVU1116
3676 0074 2268 ldr r2, [r4]
3677 .LVL317:
3678 .LBB348:
3679 .LBI348:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3680 .loc 2 7073 26 is_stmt 1 view .LVU1117
3681 .LBB349:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3682 .loc 2 7075 3 view .LVU1118
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 249
3683 .loc 2 7075 12 is_stmt 0 view .LVU1119
3684 0076 9268 ldr r2, [r2, #8]
3685 .LVL318:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3686 .loc 2 7075 74 view .LVU1120
3687 0078 12F0040F tst r2, #4
3688 007c 01D1 bne .L299
3689 .LVL319:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3690 .loc 2 7075 74 view .LVU1121
3691 .LBE349:
3692 .LBE348:
1695:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
3693 .loc 1 1695 12 discriminator 1 view .LVU1122
3694 007e 012B cmp r3, #1
3695 0080 1CD1 bne .L309
3696 .L299:
1698:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3697 .loc 1 1698 7 is_stmt 1 view .LVU1123
1698:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3698 .loc 1 1698 12 is_stmt 0 view .LVU1124
3699 0082 FFF7FEFF bl HAL_GetTick
3700 .LVL320:
1698:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3701 .loc 1 1698 26 discriminator 1 view .LVU1125
3702 0086 431B subs r3, r0, r5
1698:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3703 .loc 1 1698 10 discriminator 1 view .LVU1126
3704 0088 052B cmp r3, #5
3705 008a EED9 bls .L293
1701:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3706 .loc 1 1701 9 is_stmt 1 view .LVU1127
1701:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3707 .loc 1 1701 90 is_stmt 0 view .LVU1128
3708 008c 019B ldr r3, [sp, #4]
3709 .LVL321:
3710 .LBB350:
3711 .LBI350:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3712 .loc 2 7073 26 is_stmt 1 view .LVU1129
3713 .LBB351:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3714 .loc 2 7075 3 view .LVU1130
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3715 .loc 2 7075 12 is_stmt 0 view .LVU1131
3716 008e 9B68 ldr r3, [r3, #8]
3717 .LVL322:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3718 .loc 2 7075 74 view .LVU1132
3719 0090 13F00403 ands r3, r3, #4
3720 0094 00D0 beq .L294
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3721 .loc 2 7075 74 discriminator 1 view .LVU1133
3722 0096 0123 movs r3, #1
3723 .L294:
3724 .LVL323:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 250
3725 .loc 2 7075 74 discriminator 1 view .LVU1134
3726 .LBE351:
3727 .LBE350:
1703:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
3728 .loc 1 1703 9 is_stmt 1 view .LVU1135
1703:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL)
3729 .loc 1 1703 48 is_stmt 0 view .LVU1136
3730 0098 2268 ldr r2, [r4]
3731 .LVL324:
3732 .LBB352:
3733 .LBI352:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3734 .loc 2 7073 26 is_stmt 1 view .LVU1137
3735 .LBB353:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3736 .loc 2 7075 3 view .LVU1138
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3737 .loc 2 7075 12 is_stmt 0 view .LVU1139
3738 009a 9268 ldr r2, [r2, #8]
3739 .LVL325:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3740 .loc 2 7075 74 view .LVU1140
3741 009c 12F0040F tst r2, #4
3742 00a0 01D1 bne .L295
3743 .LVL326:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3744 .loc 2 7075 74 view .LVU1141
3745 .LBE353:
3746 .LBE352:
1704:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
3747 .loc 1 1704 12 view .LVU1142
3748 00a2 012B cmp r3, #1
3749 00a4 E1D1 bne .L293
3750 .L295:
1708:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3751 .loc 1 1708 11 is_stmt 1 view .LVU1143
3752 00a6 636D ldr r3, [r4, #84]
3753 .LVL327:
1708:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3754 .loc 1 1708 11 is_stmt 0 view .LVU1144
3755 00a8 43F01003 orr r3, r3, #16
3756 00ac 6365 str r3, [r4, #84]
1711:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3757 .loc 1 1711 11 is_stmt 1 view .LVU1145
1711:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3758 .loc 1 1711 11 view .LVU1146
3759 00ae 0023 movs r3, #0
3760 00b0 84F85030 strb r3, [r4, #80]
1711:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3761 .loc 1 1711 11 view .LVU1147
1713:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3762 .loc 1 1713 11 view .LVU1148
1713:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3763 .loc 1 1713 18 is_stmt 0 view .LVU1149
3764 00b4 0120 movs r0, #1
3765 00b6 2AE0 b .L286
3766 .LVL328:
ARM GAS /tmp/ccTOAmWG.s page 251
3767 .L296:
3768 .LBB354:
3769 .LBB347:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3770 .loc 2 7075 74 discriminator 1 view .LVU1150
3771 00b8 0123 movs r3, #1
3772 00ba DBE7 b .L298
3773 .LVL329:
3774 .L309:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
3775 .loc 2 7075 74 discriminator 1 view .LVU1151
3776 .LBE347:
3777 .LBE354:
1718:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1719:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1720:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */
1721:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* while DMA transfer is on going) */
1722:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: DMA channel of ADC slave should be stopped after this function */
1723:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* with HAL_ADCEx_RegularStop_DMA() API. */
1724:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
3778 .loc 1 1724 5 is_stmt 1 view .LVU1152
3779 .loc 1 1724 22 is_stmt 0 view .LVU1153
3780 00bc E06C ldr r0, [r4, #76]
3781 00be FFF7FEFF bl HAL_DMA_Abort
3782 .LVL330:
1725:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1726:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */
1727:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status != HAL_OK)
3783 .loc 1 1727 5 is_stmt 1 view .LVU1154
3784 .loc 1 1727 8 is_stmt 0 view .LVU1155
3785 00c2 18B1 cbz r0, .L300
1728:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1729:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
1730:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
3786 .loc 1 1730 7 is_stmt 1 view .LVU1156
3787 00c4 636D ldr r3, [r4, #84]
3788 00c6 43F04003 orr r3, r3, #64
3789 00ca 6365 str r3, [r4, #84]
3790 .L300:
1731:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1732:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1733:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */
1734:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
3791 .loc 1 1734 5 view .LVU1157
3792 00cc 2268 ldr r2, [r4]
3793 00ce 5368 ldr r3, [r2, #4]
3794 00d0 23F01003 bic r3, r3, #16
3795 00d4 5360 str r3, [r2, #4]
1735:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1736:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 2. Disable the ADC peripherals: master and slave if no injected */
1737:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* conversion is on-going. */
1738:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1739:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* memory a potential failing status. */
1740:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
3796 .loc 1 1740 5 view .LVU1158
3797 .loc 1 1740 8 is_stmt 0 view .LVU1159
3798 00d6 B8B9 cbnz r0, .L287
ARM GAS /tmp/ccTOAmWG.s page 252
1741:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1742:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
3799 .loc 1 1742 7 is_stmt 1 view .LVU1160
3800 .loc 1 1742 46 is_stmt 0 view .LVU1161
3801 00d8 2368 ldr r3, [r4]
3802 .LVL331:
3803 .LBB355:
3804 .LBI355:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3805 .loc 2 7268 26 is_stmt 1 view .LVU1162
3806 .LBB356:
3807 .loc 2 7270 3 view .LVU1163
3808 .loc 2 7270 12 is_stmt 0 view .LVU1164
3809 00da 9B68 ldr r3, [r3, #8]
3810 .LVL332:
3811 .loc 2 7270 76 view .LVU1165
3812 00dc 13F0080F tst r3, #8
3813 00e0 0BD1 bne .L301
3814 .LVL333:
3815 .loc 2 7270 76 view .LVU1166
3816 .LBE356:
3817 .LBE355:
1743:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1744:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc);
3818 .loc 1 1744 9 is_stmt 1 view .LVU1167
3819 .loc 1 1744 27 is_stmt 0 view .LVU1168
3820 00e2 2046 mov r0, r4
3821 .LVL334:
3822 .loc 1 1744 27 view .LVU1169
3823 00e4 FFF7FEFF bl ADC_Disable
3824 .LVL335:
1745:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
3825 .loc 1 1745 9 is_stmt 1 view .LVU1170
3826 .loc 1 1745 12 is_stmt 0 view .LVU1171
3827 00e8 70B9 cbnz r0, .L287
1746:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1747:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing((&tmphadcSlave)->Instance) == 0UL)
3828 .loc 1 1747 11 is_stmt 1 view .LVU1172
3829 .loc 1 1747 61 is_stmt 0 view .LVU1173
3830 00ea 019B ldr r3, [sp, #4]
3831 .LVL336:
3832 .LBB357:
3833 .LBI357:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
3834 .loc 2 7268 26 is_stmt 1 view .LVU1174
3835 .LBB358:
3836 .loc 2 7270 3 view .LVU1175
3837 .loc 2 7270 12 is_stmt 0 view .LVU1176
3838 00ec 9B68 ldr r3, [r3, #8]
3839 .LVL337:
3840 .loc 2 7270 76 view .LVU1177
3841 00ee 13F0080F tst r3, #8
3842 00f2 02D1 bne .L301
3843 .LVL338:
3844 .loc 2 7270 76 view .LVU1178
3845 .LBE358:
3846 .LBE357:
ARM GAS /tmp/ccTOAmWG.s page 253
1748:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1749:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(&tmphadcSlave);
3847 .loc 1 1749 13 is_stmt 1 view .LVU1179
3848 .loc 1 1749 31 is_stmt 0 view .LVU1180
3849 00f4 01A8 add r0, sp, #4
3850 .LVL339:
3851 .loc 1 1749 31 view .LVU1181
3852 00f6 FFF7FEFF bl ADC_Disable
3853 .LVL340:
3854 .L301:
1750:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1751:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1752:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1753:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1754:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK)
3855 .loc 1 1754 7 is_stmt 1 view .LVU1182
3856 .loc 1 1754 10 is_stmt 0 view .LVU1183
3857 00fa 28B9 cbnz r0, .L287
1755:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1756:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Both Master and Slave ADC's could be disabled. Update Master State */
1757:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
1758:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
3858 .loc 1 1758 9 is_stmt 1 view .LVU1184
3859 00fc 626D ldr r2, [r4, #84]
3860 00fe 074B ldr r3, .L310+4
3861 0100 1340 ands r3, r3, r2
3862 0102 43F00103 orr r3, r3, #1
3863 0106 6365 str r3, [r4, #84]
3864 .LVL341:
3865 .L287:
1759:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1760:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1761:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1762:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* injected (Master or Slave) conversions are still on-going,
1763:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** no Master State change */
1764:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3866 .loc 1 1764 7 view .LVU1185
1765:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1766:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1767:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1768:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
1769:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
3867 .loc 1 1769 3 view .LVU1186
3868 .loc 1 1769 3 view .LVU1187
3869 0108 0023 movs r3, #0
3870 010a 84F85030 strb r3, [r4, #80]
3871 .loc 1 1769 3 view .LVU1188
1770:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1771:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
1772:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
3872 .loc 1 1772 3 view .LVU1189
3873 .LVL342:
3874 .L286:
1773:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
3875 .loc 1 1773 1 is_stmt 0 view .LVU1190
3876 010e 1BB0 add sp, sp, #108
3877 .cfi_def_cfa_offset 12
ARM GAS /tmp/ccTOAmWG.s page 254
3878 @ sp needed
3879 0110 30BD pop {r4, r5, pc}
3880 .LVL343:
3881 .L302:
3882 .cfi_def_cfa_offset 0
3883 .cfi_restore 4
3884 .cfi_restore 5
3885 .cfi_restore 14
1658:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
3886 .loc 1 1658 3 discriminator 1 view .LVU1191
3887 0112 0220 movs r0, #2
3888 .LVL344:
3889 .loc 1 1773 1 view .LVU1192
3890 0114 7047 bx lr
3891 .L311:
3892 0116 00BF .align 2
3893 .L310:
3894 0118 00200240 .word 1073881088
3895 011c FEEFFFFF .word -4098
3896 .cfi_endproc
3897 .LFE358:
3899 .section .text.HAL_ADCEx_InjectedConfigChannel,"ax",%progbits
3900 .align 1
3901 .global HAL_ADCEx_InjectedConfigChannel
3902 .syntax unified
3903 .thumb
3904 .thumb_func
3906 HAL_ADCEx_InjectedConfigChannel:
3907 .LVL345:
3908 .LFB359:
1774:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1775:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1776:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @}
1777:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1778:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1779:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
1780:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief ADC Extended Peripheral Control functions
1781:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** *
1782:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** @verbatim
1783:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ===============================================================================
1784:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ##### Peripheral Control functions #####
1785:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ===============================================================================
1786:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** [..] This section provides functions allowing to:
1787:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Configure channels on injected group
1788:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Configure multimode when multimode feature is available
1789:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Enable or Disable Injected Queue
1790:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Disable ADC voltage regulator
1791:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (+) Enter ADC deep-power-down mode
1792:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1793:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** @endverbatim
1794:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @{
1795:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1796:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1797:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
1798:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Configure a channel to be assigned to ADC group injected.
1799:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Possibility to update parameters on the fly:
1800:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * This function initializes injected group, following calls to this
ARM GAS /tmp/ccTOAmWG.s page 255
1801:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * function can be used to reconfigure some parameters of structure
1802:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
1803:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * The setting of these parameters is conditioned to ADC state:
1804:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Refer to comments of structure "ADC_InjectionConfTypeDef".
1805:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note In case of usage of internal measurement channels:
1806:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Vbat/VrefInt/TempSensor.
1807:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * These internal paths can be disabled using function
1808:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADC_DeInit().
1809:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Caution: For Injected Context Queue use, a context must be fully
1810:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * defined before start of injected conversion. All channels are configured
1811:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * consecutively for the same ADC instance. Therefore, the number of calls to
1812:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
1813:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * InjectedNbrOfConversion for each context.
1814:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * - Example 1: If 1 context is intended to be used (or if there is no use of the
1815:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Injected Queue Context feature) and if the context contains 3 injected ranks
1816:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
1817:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * called once for each channel (i.e. 3 times) before starting a conversion.
1818:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * This function must not be called to configure a 4th injected channel:
1819:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * it would start a new context into context queue.
1820:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * - Example 2: If 2 contexts are intended to be used and each of them contains
1821:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * 3 injected ranks (InjectedNbrOfConversion = 3),
1822:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
1823:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * for each context (3 channels x 2 contexts = 6 calls). Conversion can
1824:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * start once the 1st context is set, that is after the first three
1825:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
1826:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
1827:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param sConfigInjected Structure of ADC injected group and ADC channel for
1828:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * injected group.
1829:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
1830:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
1831:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef
1832:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
3909 .loc 1 1832 1 is_stmt 1 view -0
3910 .cfi_startproc
3911 @ args = 0, pretend = 0, frame = 8
3912 @ frame_needed = 0, uses_anonymous_args = 0
3913 .loc 1 1832 1 is_stmt 0 view .LVU1194
3914 0000 F0B5 push {r4, r5, r6, r7, lr}
3915 .cfi_def_cfa_offset 20
3916 .cfi_offset 4, -20
3917 .cfi_offset 5, -16
3918 .cfi_offset 6, -12
3919 .cfi_offset 7, -8
3920 .cfi_offset 14, -4
3921 0002 83B0 sub sp, sp, #12
3922 .cfi_def_cfa_offset 32
1833:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
3923 .loc 1 1833 3 is_stmt 1 view .LVU1195
3924 .LVL346:
1834:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted;
3925 .loc 1 1834 3 view .LVU1196
1835:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_config_internal_channel;
3926 .loc 1 1835 3 view .LVU1197
1836:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular;
3927 .loc 1 1836 3 view .LVU1198
1837:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected;
3928 .loc 1 1837 3 view .LVU1199
ARM GAS /tmp/ccTOAmWG.s page 256
1838:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0;
3929 .loc 1 1838 3 view .LVU1200
3930 .loc 1 1838 17 is_stmt 0 view .LVU1201
3931 0004 0023 movs r3, #0
3932 0006 0193 str r3, [sp, #4]
1839:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1840:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0U;
3933 .loc 1 1840 3 is_stmt 1 view .LVU1202
3934 .LVL347:
1841:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1842:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
1843:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
3935 .loc 1 1843 3 view .LVU1203
1844:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
3936 .loc 1 1844 3 view .LVU1204
1845:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
3937 .loc 1 1845 3 view .LVU1205
1846:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
3938 .loc 1 1846 3 view .LVU1206
1847:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
3939 .loc 1 1847 3 view .LVU1207
1848:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
3940 .loc 1 1848 3 view .LVU1208
1849:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
3941 .loc 1 1849 3 view .LVU1209
1850:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
3942 .loc 1 1850 3 view .LVU1210
1851:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode));
3943 .loc 1 1851 3 view .LVU1211
1852:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
1853:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedOffsetSaturation));
1854:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC3)
1855:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1856:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC3_OFFSET_SIGN(sConfigInjected->InjectedOffsetSign));
1857:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC3_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
1858:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1859:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1860:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif /* ADC_VER_V5_V90 */
1861:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1862:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
3944 .loc 1 1862 5 view .LVU1212
1863:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1864:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1865:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
3945 .loc 1 1865 3 view .LVU1213
1866:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1867:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
3946 .loc 1 1867 5 view .LVU1214
1868:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
3947 .loc 1 1868 5 view .LVU1215
1869:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
3948 .loc 1 1869 5 view .LVU1216
1870:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1871:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1872:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check offset range according to oversampling setting */
1873:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Init.OversamplingMode == ENABLE)
3949 .loc 1 1873 3 view .LVU1217
ARM GAS /tmp/ccTOAmWG.s page 257
1874:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1875:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset / (hadc->In
3950 .loc 1 1875 5 view .LVU1218
1876:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1877:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1878:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1879:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
3951 .loc 1 1879 5 view .LVU1219
1880:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1881:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
1882:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
1883:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ignored (considered as reset) */
1884:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC3)
1885:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1886:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->
1887:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1888:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif /* ADC_VER_V5_V90 */
1889:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* JDISCEN and JAUTO bits can't be set at the same time */
1890:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->Au
3952 .loc 1 1890 3 view .LVU1220
1891:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1892:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* DISCEN and JAUTO bits can't be set at the same time */
1893:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv
3953 .loc 1 1893 3 view .LVU1221
1894:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1895:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Verification of channel number */
1896:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
3954 .loc 1 1896 3 view .LVU1222
1897:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1898:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
1899:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1900:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1901:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1902:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC1)
3955 .loc 1 1902 5 view .LVU1223
1903:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1904:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC1_DIFF_CHANNEL(sConfigInjected->InjectedChannel));
3956 .loc 1 1904 7 view .LVU1224
1905:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1906:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC2)
3957 .loc 1 1906 5 view .LVU1225
1907:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1908:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC2_DIFF_CHANNEL(sConfigInjected->InjectedChannel));
3958 .loc 1 1908 7 view .LVU1226
1909:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1910:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined (ADC3)
1911:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC3)
1912:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1913:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC3_DIFF_CHANNEL(sConfigInjected->InjectedChannel));
1914:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1915:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif
1916:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1917:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1918:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
1919:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
3959 .loc 1 1919 3 view .LVU1227
3960 .loc 1 1919 3 view .LVU1228
ARM GAS /tmp/ccTOAmWG.s page 258
3961 0008 90F85030 ldrb r3, [r0, #80] @ zero_extendqisi2
3962 000c 012B cmp r3, #1
3963 000e 00F0D382 beq .L365
3964 0012 0446 mov r4, r0
3965 0014 0D46 mov r5, r1
3966 .loc 1 1919 3 discriminator 2 view .LVU1229
3967 0016 0123 movs r3, #1
3968 0018 80F85030 strb r3, [r0, #80]
3969 .loc 1 1919 3 view .LVU1230
1920:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1921:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Configuration of injected group sequencer: */
1922:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Hardware constraint: Must fully define injected context register JSQR */
1923:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* before make it entering into injected sequencer queue. */
1924:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* */
1925:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - if scan mode is disabled: */
1926:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* * Injected channels sequence length is set to 0x00: 1 channel */
1927:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* converted (channel on injected rank 1) */
1928:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameter "InjectedNbrOfConversion" is discarded. */
1929:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* * Injected context register JSQR setting is simple: register is fully */
1930:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* defined on one call of this function (for injected rank 1) and can */
1931:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* be entered into queue directly. */
1932:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - if scan mode is enabled: */
1933:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* * Injected channels sequence length is set to parameter */
1934:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* "InjectedNbrOfConversion". */
1935:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* * Injected context register JSQR setting more complex: register is */
1936:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* fully defined over successive calls of this function, for each */
1937:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* injected channel rank. It is entered into queue only when all */
1938:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* injected ranks have been set. */
1939:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: Scan mode is not present by hardware on this device, but used */
1940:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* by software for alignment over all STM32 devices. */
1941:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1942:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) ||
3970 .loc 1 1942 3 view .LVU1231
3971 .loc 1 1942 18 is_stmt 0 view .LVU1232
3972 001c C368 ldr r3, [r0, #12]
3973 .loc 1 1942 6 view .LVU1233
3974 001e ABB1 cbz r3, .L314
1943:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (sConfigInjected->InjectedNbrOfConversion == 1U))
3975 .loc 1 1943 23 view .LVU1234
3976 0020 0B6A ldr r3, [r1, #32]
1942:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (sConfigInjected->InjectedNbrOfConversion == 1U))
3977 .loc 1 1942 54 discriminator 1 view .LVU1235
3978 0022 012B cmp r3, #1
3979 0024 12D0 beq .L314
1944:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1945:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Configuration of context register JSQR: */
1946:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - number of ranks in injected group sequencer: fixed to 1st rank */
1947:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* (scan mode disabled, only rank 1 used) */
1948:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - external trigger to start conversion */
1949:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - external trigger polarity */
1950:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
1951:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1952:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
1953:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1954:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable external trigger if trigger selection is different of */
1955:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* software start. */
1956:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: This configuration keeps the hardware feature of parameter */
ARM GAS /tmp/ccTOAmWG.s page 259
1957:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1958:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* software start. */
1959:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1960:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1961:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECT
1962:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX
1963:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge
1964:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** );
1965:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1966:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1967:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1968:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECT
1969:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1970:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1971:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt);
1972:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */
1973:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt;
1974:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1975:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1976:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
1977:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
1978:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1979:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Case of scan mode enabled, several channels to set into injected group */
1980:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* sequencer. */
1981:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* */
1982:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Procedure to define injected context register JSQR over successive */
1983:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* calls of this function, for each injected channel rank: */
1984:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 1. Start new context and set parameters related to all injected */
1985:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* channels: injected sequence length and trigger. */
1986:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1987:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
1988:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* call of the context under setting */
1989:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->InjectionConfig.ChannelCount == 0U)
3980 .loc 1 1989 5 is_stmt 1 view .LVU1236
3981 .loc 1 1989 30 is_stmt 0 view .LVU1237
3982 0026 026E ldr r2, [r0, #96]
3983 .loc 1 1989 8 view .LVU1238
3984 0028 002A cmp r2, #0
3985 002a 40F0B580 bne .L366
1990:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
1991:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Initialize number of channels that will be configured on the context */
1992:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* being built */
1993:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion;
3986 .loc 1 1993 7 is_stmt 1 view .LVU1239
3987 .loc 1 1993 42 is_stmt 0 view .LVU1240
3988 002e 0366 str r3, [r0, #96]
1994:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
1995:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** call, this context will be written in JSQR register at the last call.
1996:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** At this point, the context is merely reset */
1997:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue = 0x00000000U;
3989 .loc 1 1997 7 is_stmt 1 view .LVU1241
3990 .loc 1 1997 42 is_stmt 0 view .LVU1242
3991 0030 0023 movs r3, #0
3992 0032 C365 str r3, [r0, #92]
1998:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
1999:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Configuration of context register JSQR: */
2000:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - number of ranks in injected group sequencer */
ARM GAS /tmp/ccTOAmWG.s page 260
2001:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - external trigger to start conversion */
2002:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - external trigger polarity */
2003:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2004:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable external trigger if trigger selection is different of */
2005:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* software start. */
2006:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: This configuration keeps the hardware feature of parameter */
2007:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
2008:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* software start. */
2009:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
3993 .loc 1 2009 7 is_stmt 1 view .LVU1243
3994 .loc 1 2009 26 is_stmt 0 view .LVU1244
3995 0034 8B6A ldr r3, [r1, #40]
3996 .loc 1 2009 10 view .LVU1245
3997 0036 002B cmp r3, #0
3998 0038 00F0AB80 beq .L320
2010:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2011:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U)
3999 .loc 1 2011 9 is_stmt 1 view .LVU1246
4000 .loc 1 2011 60 is_stmt 0 view .LVU1247
4001 003c 0A6A ldr r2, [r1, #32]
4002 .loc 1 2011 86 view .LVU1248
4003 003e 013A subs r2, r2, #1
2012:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX
4004 .loc 1 2012 86 view .LVU1249
4005 0040 03F07C03 and r3, r3, #124
4006 .loc 1 2012 44 view .LVU1250
4007 0044 1A43 orrs r2, r2, r3
2013:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge
4008 .loc 1 2013 61 view .LVU1251
4009 0046 CB6A ldr r3, [r1, #44]
2011:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX
4010 .loc 1 2011 41 view .LVU1252
4011 0048 1A43 orrs r2, r2, r3
4012 .LVL348:
2011:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX
4013 .loc 1 2011 41 view .LVU1253
4014 004a A6E0 b .L319
4015 .LVL349:
4016 .L314:
1952:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4017 .loc 1 1952 5 is_stmt 1 view .LVU1254
1952:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4018 .loc 1 1952 24 is_stmt 0 view .LVU1255
4019 004c 6B68 ldr r3, [r5, #4]
1952:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4020 .loc 1 1952 8 view .LVU1256
4021 004e 092B cmp r3, #9
4022 0050 7FD0 beq .L392
4023 .LVL350:
4024 .L316:
2014:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** );
2015:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2016:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2017:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2018:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U));
2019:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2020:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
ARM GAS /tmp/ccTOAmWG.s page 261
2021:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2022:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2023:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 2. Continue setting of context under definition with parameter */
2024:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* related to each channel: channel rank sequence */
2025:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Clear the old JSQx bits for the selected rank */
2026:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
2027:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2028:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set the JSQx bits for the selected rank */
2029:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjecte
2030:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2031:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Decrease channel count */
2032:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->InjectionConfig.ChannelCount--;
2033:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2034:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel()
2035:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** call, aggregate the setting to those already built during the previous
2036:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
2037:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt;
2038:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2039:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* 4. End of context setting: if this is the last channel set, then write context
2040:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** into register JSQR and make it enter into queue */
2041:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->InjectionConfig.ChannelCount == 0U)
2042:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2043:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
2044:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2045:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2046:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2047:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */
2048:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */
2049:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* conversion on going on injected group: */
2050:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Injected context queue: Queue disable (active context is kept) or */
2051:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* enable (context decremented, up to 2 contexts queued) */
2052:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Injected discontinuous mode: can be enabled only if auto-injected */
2053:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* mode is disabled. */
2054:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
4025 .loc 1 2054 3 is_stmt 1 view .LVU1257
4026 .loc 1 2054 42 is_stmt 0 view .LVU1258
4027 0052 2268 ldr r2, [r4]
4028 .LVL351:
4029 .LBB359:
4030 .LBI359:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4031 .loc 2 7268 26 is_stmt 1 view .LVU1259
4032 .LBB360:
4033 .loc 2 7270 3 view .LVU1260
4034 .loc 2 7270 12 is_stmt 0 view .LVU1261
4035 0054 9368 ldr r3, [r2, #8]
4036 .loc 2 7270 76 view .LVU1262
4037 0056 13F0080F tst r3, #8
4038 005a 20D1 bne .L321
4039 .LVL352:
4040 .loc 2 7270 76 view .LVU1263
4041 .LBE360:
4042 .LBE359:
2055:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2056:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (!(__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel)))
4043 .loc 1 2056 5 is_stmt 1 view .LVU1264
4044 .loc 1 2056 11 is_stmt 0 view .LVU1265
ARM GAS /tmp/ccTOAmWG.s page 262
4045 005c 2B68 ldr r3, [r5]
4046 .loc 1 2056 8 view .LVU1266
4047 005e 002B cmp r3, #0
4048 0060 0BDB blt .L322
2057:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2058:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
2059:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance != ADC3)
2060:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2061:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* ADC channels preselection */
2062:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->Instance->PCSEL_RES0 |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->Inje
2063:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2064:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #else
2065:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* ADC channels preselection */
2066:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** hadc->Instance->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedCha
4049 .loc 1 2066 7 is_stmt 1 view .LVU1267
4050 .loc 1 2066 41 is_stmt 0 view .LVU1268
4051 0062 C3F31301 ubfx r1, r3, #0, #20
4052 .loc 1 2066 37 view .LVU1269
4053 0066 0029 cmp r1, #0
4054 0068 40F0B580 bne .L323
4055 .loc 1 2066 41 discriminator 1 view .LVU1270
4056 006c C3F38463 ubfx r3, r3, #26, #5
4057 .loc 1 2066 37 discriminator 1 view .LVU1271
4058 0070 0121 movs r1, #1
4059 0072 9940 lsls r1, r1, r3
4060 .L324:
4061 .loc 1 2066 21 discriminator 4 view .LVU1272
4062 0074 D369 ldr r3, [r2, #28]
4063 .loc 1 2066 29 discriminator 4 view .LVU1273
4064 0076 0B43 orrs r3, r3, r1
4065 0078 D361 str r3, [r2, #28]
4066 .L322:
2067:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif /* ADC_VER_V5_V90 */
2068:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2069:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2070:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If auto-injected mode is disabled: no constraint */
2071:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == DISABLE)
4067 .loc 1 2071 5 is_stmt 1 view .LVU1274
4068 .loc 1 2071 24 is_stmt 0 view .LVU1275
4069 007a 95F82530 ldrb r3, [r5, #37] @ zero_extendqisi2
4070 .loc 1 2071 8 view .LVU1276
4071 007e 002B cmp r3, #0
4072 0080 40F0B580 bne .L326
2072:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2073:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR,
4073 .loc 1 2073 7 is_stmt 1 view .LVU1277
4074 0084 2168 ldr r1, [r4]
4075 0086 CB68 ldr r3, [r1, #12]
4076 0088 23F44013 bic r3, r3, #3145728
4077 008c 95F82600 ldrb r0, [r5, #38] @ zero_extendqisi2
4078 .LVL353:
4079 .loc 1 2073 7 is_stmt 0 view .LVU1278
4080 0090 95F82420 ldrb r2, [r5, #36] @ zero_extendqisi2
4081 0094 1205 lsls r2, r2, #20
4082 0096 42EA4052 orr r2, r2, r0, lsl #21
4083 009a 1343 orrs r3, r3, r2
4084 009c CB60 str r3, [r1, #12]
ARM GAS /tmp/ccTOAmWG.s page 263
4085 .L321:
2074:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
2075:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext)
2076:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)sConfigInjected->InjectedDiscontinuousCon
2077:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2078:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If auto-injected mode is enabled: Injected discontinuous setting is */
2079:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* discarded. */
2080:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2081:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2082:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR,
2083:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
2084:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext));
2085:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2086:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2087:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2088:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2089:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */
2090:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */
2091:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* conversion on going on regular and injected groups: */
2092:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Automatic injected conversion: can be enabled if injected group */
2093:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* external triggers are disabled. */
2094:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Channel sampling time */
2095:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Channel offset */
2096:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
4086 .loc 1 2096 3 is_stmt 1 view .LVU1279
4087 .loc 1 2096 79 is_stmt 0 view .LVU1280
4088 009e 2368 ldr r3, [r4]
4089 .LVL354:
4090 .LBB361:
4091 .LBI361:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4092 .loc 2 7073 26 is_stmt 1 view .LVU1281
4093 .LBB362:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4094 .loc 2 7075 3 view .LVU1282
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4095 .loc 2 7075 12 is_stmt 0 view .LVU1283
4096 00a0 9F68 ldr r7, [r3, #8]
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4097 .loc 2 7075 74 view .LVU1284
4098 00a2 17F00407 ands r7, r7, #4
4099 00a6 00D0 beq .L327
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4100 .loc 2 7075 74 discriminator 1 view .LVU1285
4101 00a8 0127 movs r7, #1
4102 .L327:
4103 .LVL355:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4104 .loc 2 7075 74 discriminator 1 view .LVU1286
4105 .LBE362:
4106 .LBE361:
2097:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
4107 .loc 1 2097 3 is_stmt 1 view .LVU1287
4108 .LBB363:
4109 .LBI363:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4110 .loc 2 7268 26 view .LVU1288
ARM GAS /tmp/ccTOAmWG.s page 264
4111 .LBB364:
4112 .loc 2 7270 3 view .LVU1289
4113 .loc 2 7270 12 is_stmt 0 view .LVU1290
4114 00aa 9A68 ldr r2, [r3, #8]
4115 .loc 2 7270 76 view .LVU1291
4116 00ac 12F0080F tst r2, #8
4117 00b0 40F04E81 bne .L368
4118 .LVL356:
4119 .loc 2 7270 76 view .LVU1292
4120 .LBE364:
4121 .LBE363:
2098:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2099:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL)
4122 .loc 1 2099 3 is_stmt 1 view .LVU1293
4123 .loc 1 2099 6 is_stmt 0 view .LVU1294
4124 00b4 002F cmp r7, #0
4125 00b6 40F07281 bne .L369
2100:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL)
2101:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
2102:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2103:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If injected group external triggers are disabled (set to injected */
2104:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* software start): no constraint */
2105:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
4126 .loc 1 2105 5 is_stmt 1 view .LVU1295
4127 .loc 1 2105 25 is_stmt 0 view .LVU1296
4128 00ba AA6A ldr r2, [r5, #40]
4129 .loc 1 2105 8 view .LVU1297
4130 00bc 1AB1 cbz r2, .L329
2106:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
4131 .loc 1 2106 28 view .LVU1298
4132 00be EA6A ldr r2, [r5, #44]
4133 .loc 1 2106 9 view .LVU1299
4134 00c0 002A cmp r2, #0
4135 00c2 40F0A480 bne .L330
4136 .L329:
2107:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2108:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == ENABLE)
4137 .loc 1 2108 7 is_stmt 1 view .LVU1300
4138 .loc 1 2108 26 is_stmt 0 view .LVU1301
4139 00c6 95F82520 ldrb r2, [r5, #37] @ zero_extendqisi2
4140 .loc 1 2108 10 view .LVU1302
4141 00ca 012A cmp r2, #1
4142 00cc 00F09980 beq .L393
2109:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
2111:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2112:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2113:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2114:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
4143 .loc 1 2114 9 is_stmt 1 view .LVU1303
4144 00d0 DA68 ldr r2, [r3, #12]
4145 00d2 22F00072 bic r2, r2, #33554432
4146 00d6 DA60 str r2, [r3, #12]
1833:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted;
4147 .loc 1 1833 21 is_stmt 0 view .LVU1304
4148 00d8 0026 movs r6, #0
4149 .LVL357:
ARM GAS /tmp/ccTOAmWG.s page 265
4150 .L332:
2115:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2116:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2117:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If Automatic injected conversion was intended to be set and could not */
2118:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* due to injected group external triggers enabled, error is reported. */
2119:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2120:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2121:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == ENABLE)
2122:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2123:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
2124:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2125:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2126:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
2127:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2128:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2129:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2130:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
2131:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2132:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2133:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2134:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->InjecOversamplingMode == ENABLE)
4151 .loc 1 2134 5 is_stmt 1 view .LVU1305
4152 .loc 1 2134 24 is_stmt 0 view .LVU1306
4153 00da 95F83030 ldrb r3, [r5, #48] @ zero_extendqisi2
4154 .loc 1 2134 8 view .LVU1307
4155 00de 012B cmp r3, #1
4156 00e0 00F0A480 beq .L394
2135:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2136:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
2137:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC3)
2138:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2139:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_OVERSAMPLING_RATIO_ADC3(sConfigInjected->InjecOversampling.Ratio));
2140:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2141:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2142:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2143:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio));
2144:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2145:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #else
2146:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio));
2147:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif
2148:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift));
2149:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2150:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* JOVSE must be reset in case of triggered regular mode */
2151:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS) == (ADC_CFG
2152:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2153:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Configuration of Injected Oversampler: */
2154:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Oversampling Ratio */
2155:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Right bit shift */
2156:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2157:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Enable OverSampling mode */
2158:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
2159:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance != ADC3)
2160:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2161:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR2,
2162:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE |
2163:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_OVSR |
2164:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_OVSS,
ARM GAS /tmp/ccTOAmWG.s page 266
2165:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE |
2166:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ((sConfigInjected->InjecOversampling.Ratio - 1UL) << ADC_CFGR2_OVSR_Pos) |
2167:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** sConfigInjected->InjecOversampling.RightBitShift
2168:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** );
2169:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2170:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2171:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2172:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR2,
2173:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE |
2174:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC3_CFGR2_OVSR |
2175:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_OVSS,
2176:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE |
2177:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** (sConfigInjected->InjecOversampling.Ratio) |
2178:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** sConfigInjected->InjecOversampling.RightBitShift
2179:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** );
2180:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2181:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #else
2182:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR2,
2183:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE |
2184:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_OVSR |
2185:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_OVSS,
2186:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE |
2187:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ((sConfigInjected->InjecOversampling.Ratio - 1UL) << ADC_CFGR2_OVSR_Pos) |
2188:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** sConfigInjected->InjecOversampling.RightBitShift
2189:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** );
2190:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif
2191:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2192:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2193:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2194:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Disable Regular OverSampling */
2195:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
4157 .loc 1 2195 7 is_stmt 1 view .LVU1308
4158 00e4 2268 ldr r2, [r4]
4159 00e6 1369 ldr r3, [r2, #16]
4160 00e8 23F00203 bic r3, r3, #2
4161 00ec 1361 str r3, [r2, #16]
4162 .L335:
2196:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2197:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2198:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */
2199:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected
4163 .loc 1 2199 5 view .LVU1309
4164 00ee AA68 ldr r2, [r5, #8]
4165 00f0 2968 ldr r1, [r5]
4166 00f2 2068 ldr r0, [r4]
4167 00f4 FFF7FEFF bl LL_ADC_SetChannelSamplingTime
4168 .LVL358:
2200:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2201:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Configure the offset: offset enable/disable, channel, offset value */
2202:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2203:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Shift the offset with respect to the selected ADC resolution. */
2204:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
2205:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
2206:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC3)
2207:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2208:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmpOffsetShifted = ADC3_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
2209:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 267
2210:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2211:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif /* ADC_VER_V5_V90 */
2212:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2213:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
4169 .loc 1 2213 7 view .LVU1310
4170 .loc 1 2213 26 is_stmt 0 view .LVU1311
4171 00f8 2368 ldr r3, [r4]
4172 00fa DA68 ldr r2, [r3, #12]
4173 00fc 12F0100F tst r2, #16
4174 0100 40F0A280 bne .L336
4175 .loc 1 2213 26 discriminator 1 view .LVU1312
4176 0104 6A69 ldr r2, [r5, #20]
4177 0106 D968 ldr r1, [r3, #12]
4178 0108 C1F38201 ubfx r1, r1, #2, #3
4179 010c 4900 lsls r1, r1, #1
4180 010e 8A40 lsls r2, r2, r1
4181 .L337:
4182 .LVL359:
2214:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2215:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2216:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
4183 .loc 1 2216 5 is_stmt 1 view .LVU1313
4184 .loc 1 2216 24 is_stmt 0 view .LVU1314
4185 0110 D5F810C0 ldr ip, [r5, #16]
4186 .loc 1 2216 8 view .LVU1315
4187 0114 BCF1040F cmp ip, #4
4188 0118 00F0A180 beq .L338
2217:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2218:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC selected offset number */
2219:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffset(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected->Inje
4189 .loc 1 2219 7 is_stmt 1 view .LVU1316
4190 011c 2868 ldr r0, [r5]
4191 .LVL360:
4192 .LBB365:
4193 .LBI365:
3379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4194 .loc 2 3379 22 view .LVU1317
4195 .LBB366:
3381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
4196 .loc 2 3381 3 view .LVU1318
3381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
4197 .loc 2 3381 25 is_stmt 0 view .LVU1319
4198 011e 6033 adds r3, r3, #96
4199 .LVL361:
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4200 .loc 2 3392 5 is_stmt 1 view .LVU1320
4201 0120 53F82C10 ldr r1, [r3, ip, lsl #2]
4202 0124 01F00041 and r1, r1, #-2147483648
4203 0128 00F0F840 and r0, r0, #2080374784
4204 .LVL362:
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4205 .loc 2 3392 5 is_stmt 0 view .LVU1321
4206 012c 0243 orrs r2, r2, r0
4207 .LVL363:
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4208 .loc 2 3392 5 view .LVU1322
4209 012e 0A43 orrs r2, r2, r1
ARM GAS /tmp/ccTOAmWG.s page 268
4210 0130 43F82C20 str r2, [r3, ip, lsl #2]
4211 .LVL364:
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4212 .loc 2 3392 5 view .LVU1323
4213 .LBE366:
4214 .LBE365:
2220:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2221:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
2222:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC3)
2223:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2224:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC selected offset sign & saturation */
2225:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffsetSign(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected
2226:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffsetSaturation(hadc->Instance, sConfigInjected->InjectedOffsetNumber, (sConfigI
2227:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2228:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2229:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif /* ADC_VER_V5_V90 */
2230:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2231:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC selected offset signed saturation */
2232:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffsetSignedSaturation(hadc->Instance, sConfigInjected->InjectedOffsetNumber, (sC
4215 .loc 1 2232 9 is_stmt 1 view .LVU1324
4216 0134 2368 ldr r3, [r4]
4217 0136 2969 ldr r1, [r5, #16]
4218 .loc 1 2232 113 is_stmt 0 view .LVU1325
4219 0138 2A7F ldrb r2, [r5, #28] @ zero_extendqisi2
4220 .loc 1 2232 9 view .LVU1326
4221 013a 012A cmp r2, #1
4222 013c 00F08C80 beq .L395
4223 .LVL365:
4224 .L339:
4225 .LBB367:
4226 .LBI367:
3552:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4227 .loc 2 3552 22 is_stmt 1 view .LVU1327
4228 .LBB368:
4229 .LBB369:
3562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg, ADC_OFR1_SSATE, OffsetSignedSaturation);
4230 .loc 2 3562 5 view .LVU1328
3562:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** MODIFY_REG(*preg, ADC_OFR1_SSATE, OffsetSignedSaturation);
4231 .loc 2 3562 27 is_stmt 0 view .LVU1329
4232 0140 6033 adds r3, r3, #96
4233 .LVL366:
3563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4234 .loc 2 3563 5 is_stmt 1 view .LVU1330
4235 0142 53F82120 ldr r2, [r3, r1, lsl #2]
4236 0146 22F00042 bic r2, r2, #-2147483648
4237 014a 3A43 orrs r2, r2, r7
4238 014c 43F82120 str r2, [r3, r1, lsl #2]
4239 .LVL367:
3563:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4240 .loc 2 3563 5 is_stmt 0 view .LVU1331
4241 .LBE369:
3565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4242 .loc 2 3565 1 view .LVU1332
4243 0150 FFE0 b .L328
4244 .LVL368:
4245 .L392:
3565:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
ARM GAS /tmp/ccTOAmWG.s page 269
4246 .loc 2 3565 1 view .LVU1333
4247 .LBE368:
4248 .LBE367:
1959:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4249 .loc 1 1959 7 is_stmt 1 view .LVU1334
1959:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4250 .loc 1 1959 26 is_stmt 0 view .LVU1335
4251 0152 AA6A ldr r2, [r5, #40]
1959:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4252 .loc 1 1959 10 view .LVU1336
4253 0154 BAB1 cbz r2, .L317
1961:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX
4254 .loc 1 1961 9 is_stmt 1 view .LVU1337
1961:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX
4255 .loc 1 1961 44 is_stmt 0 view .LVU1338
4256 0156 2B68 ldr r3, [r5]
4257 0158 9B0E lsrs r3, r3, #26
4258 015a 5B02 lsls r3, r3, #9
4259 015c 03F47853 and r3, r3, #15872
1962:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge
4260 .loc 1 1962 86 view .LVU1339
4261 0160 02F07C02 and r2, r2, #124
1962:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge
4262 .loc 1 1962 44 view .LVU1340
4263 0164 1343 orrs r3, r3, r2
1963:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** );
4264 .loc 1 1963 61 view .LVU1341
4265 0166 EA6A ldr r2, [r5, #44]
1961:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX
4266 .loc 1 1961 41 view .LVU1342
4267 0168 1343 orrs r3, r3, r2
4268 .LVL369:
4269 .L318:
1971:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */
4270 .loc 1 1971 7 is_stmt 1 view .LVU1343
4271 016a 2168 ldr r1, [r4]
4272 .LVL370:
1971:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */
4273 .loc 1 1971 7 is_stmt 0 view .LVU1344
4274 016c CA6C ldr r2, [r1, #76]
4275 016e 22F07B42 bic r2, r2, #-83886080
4276 0172 22F46F02 bic r2, r2, #15663104
4277 0176 22F43F42 bic r2, r2, #48896
4278 017a 22F0FF02 bic r2, r2, #255
4279 017e 1A43 orrs r2, r2, r3
4280 0180 CA64 str r2, [r1, #76]
1973:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4281 .loc 1 1973 7 is_stmt 1 view .LVU1345
1973:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4282 .loc 1 1973 42 is_stmt 0 view .LVU1346
4283 0182 E365 str r3, [r4, #92]
4284 0184 65E7 b .L316
4285 .LVL371:
4286 .L317:
1968:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4287 .loc 1 1968 9 is_stmt 1 view .LVU1347
1968:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 270
4288 .loc 1 1968 44 is_stmt 0 view .LVU1348
4289 0186 2B68 ldr r3, [r5]
4290 0188 9B0E lsrs r3, r3, #26
4291 018a 5B02 lsls r3, r3, #9
1968:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4292 .loc 1 1968 41 view .LVU1349
4293 018c 03F47853 and r3, r3, #15872
4294 0190 EBE7 b .L318
4295 .L320:
2018:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4296 .loc 1 2018 9 is_stmt 1 view .LVU1350
2018:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4297 .loc 1 2018 60 is_stmt 0 view .LVU1351
4298 0192 0A6A ldr r2, [r1, #32]
2018:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4299 .loc 1 2018 41 view .LVU1352
4300 0194 013A subs r2, r2, #1
4301 .LVL372:
2018:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4302 .loc 1 2018 41 view .LVU1353
4303 0196 00E0 b .L319
4304 .LVL373:
4305 .L366:
1840:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4306 .loc 1 1840 12 view .LVU1354
4307 0198 0022 movs r2, #0
4308 .LVL374:
4309 .L319:
2026:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4310 .loc 1 2026 5 is_stmt 1 view .LVU1355
2029:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4311 .loc 1 2029 5 view .LVU1356
2029:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4312 .loc 1 2029 40 is_stmt 0 view .LVU1357
4313 019a 2B68 ldr r3, [r5]
4314 019c C3F38463 ubfx r3, r3, #26, #5
4315 01a0 6968 ldr r1, [r5, #4]
4316 .LVL375:
2029:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4317 .loc 1 2029 40 view .LVU1358
4318 01a2 01F01F01 and r1, r1, #31
4319 01a6 8B40 lsls r3, r3, r1
2029:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4320 .loc 1 2029 37 view .LVU1359
4321 01a8 1343 orrs r3, r3, r2
4322 .LVL376:
2032:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4323 .loc 1 2032 5 is_stmt 1 view .LVU1360
2032:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4324 .loc 1 2032 26 is_stmt 0 view .LVU1361
4325 01aa 216E ldr r1, [r4, #96]
2032:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4326 .loc 1 2032 39 view .LVU1362
4327 01ac 0139 subs r1, r1, #1
4328 01ae 2166 str r1, [r4, #96]
2037:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4329 .loc 1 2037 5 is_stmt 1 view .LVU1363
ARM GAS /tmp/ccTOAmWG.s page 271
2037:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4330 .loc 1 2037 26 is_stmt 0 view .LVU1364
4331 01b0 E26D ldr r2, [r4, #92]
2037:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4332 .loc 1 2037 40 view .LVU1365
4333 01b2 1343 orrs r3, r3, r2
4334 .LVL377:
2037:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4335 .loc 1 2037 40 view .LVU1366
4336 01b4 E365 str r3, [r4, #92]
2041:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4337 .loc 1 2041 5 is_stmt 1 view .LVU1367
2041:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4338 .loc 1 2041 8 is_stmt 0 view .LVU1368
4339 01b6 0029 cmp r1, #0
4340 01b8 7FF44BAF bne .L316
2043:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4341 .loc 1 2043 7 is_stmt 1 view .LVU1369
4342 01bc 2168 ldr r1, [r4]
4343 01be CA6C ldr r2, [r1, #76]
4344 01c0 22F07B42 bic r2, r2, #-83886080
4345 01c4 22F46F02 bic r2, r2, #15663104
4346 01c8 22F43F42 bic r2, r2, #48896
4347 01cc 22F0FF02 bic r2, r2, #255
4348 01d0 1343 orrs r3, r3, r2
4349 01d2 CB64 str r3, [r1, #76]
4350 01d4 3DE7 b .L316
4351 .LVL378:
4352 .L323:
4353 .LBB370:
4354 .LBI370:
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4355 .loc 3 1048 31 view .LVU1370
4356 .LBB371:
1050:Drivers/CMSIS/Include/cmsis_gcc.h ****
4357 .loc 3 1050 3 view .LVU1371
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
4358 .loc 3 1055 4 view .LVU1372
4359 .syntax unified
4360 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
4361 01d6 93FAA3F3 rbit r3, r3
4362 @ 0 "" 2
4363 .LVL379:
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4364 .loc 3 1068 3 view .LVU1373
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4365 .loc 3 1068 3 is_stmt 0 view .LVU1374
4366 .thumb
4367 .syntax unified
4368 .LBE371:
4369 .LBE370:
4370 .LBB372:
4371 .LBI372:
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4372 .loc 3 1078 30 is_stmt 1 view .LVU1375
4373 .LBB373:
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccTOAmWG.s page 272
4374 .loc 3 1089 3 view .LVU1376
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4375 .loc 3 1089 6 is_stmt 0 view .LVU1377
4376 01da 33B1 cbz r3, .L367
4377 .loc 3 1093 3 is_stmt 1 view .LVU1378
4378 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1379
4379 01dc B3FA83F3 clz r3, r3
4380 .LVL380:
4381 .L325:
4382 .loc 3 1093 10 discriminator 1 view .LVU1380
4383 .LBE373:
4384 .LBE372:
2066:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif /* ADC_VER_V5_V90 */
4385 .loc 1 2066 106 discriminator 2 view .LVU1381
4386 01e0 03F01F03 and r3, r3, #31
2066:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif /* ADC_VER_V5_V90 */
4387 .loc 1 2066 37 discriminator 2 view .LVU1382
4388 01e4 0121 movs r1, #1
4389 01e6 9940 lsls r1, r1, r3
4390 01e8 44E7 b .L324
4391 .LVL381:
4392 .L367:
4393 .LBB375:
4394 .LBB374:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4395 .loc 3 1091 12 view .LVU1383
4396 01ea 2023 movs r3, #32
4397 .LVL382:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4398 .loc 3 1091 12 view .LVU1384
4399 01ec F8E7 b .L325
4400 .LVL383:
4401 .L326:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4402 .loc 3 1091 12 view .LVU1385
4403 .LBE374:
4404 .LBE375:
2082:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
4405 .loc 1 2082 7 is_stmt 1 view .LVU1386
4406 01ee 2268 ldr r2, [r4]
4407 01f0 D368 ldr r3, [r2, #12]
4408 01f2 23F44013 bic r3, r3, #3145728
4409 01f6 95F82610 ldrb r1, [r5, #38] @ zero_extendqisi2
4410 01fa 43EA4153 orr r3, r3, r1, lsl #21
4411 01fe D360 str r3, [r2, #12]
4412 0200 4DE7 b .L321
4413 .LVL384:
4414 .L393:
2110:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4415 .loc 1 2110 9 view .LVU1387
4416 0202 DA68 ldr r2, [r3, #12]
4417 0204 42F00072 orr r2, r2, #33554432
4418 0208 DA60 str r2, [r3, #12]
1833:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted;
4419 .loc 1 1833 21 is_stmt 0 view .LVU1388
4420 020a 0026 movs r6, #0
4421 020c 65E7 b .L332
ARM GAS /tmp/ccTOAmWG.s page 273
4422 .L330:
2121:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4423 .loc 1 2121 7 is_stmt 1 view .LVU1389
2121:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4424 .loc 1 2121 26 is_stmt 0 view .LVU1390
4425 020e 95F82560 ldrb r6, [r5, #37] @ zero_extendqisi2
2121:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
4426 .loc 1 2121 10 view .LVU1391
4427 0212 012E cmp r6, #1
4428 0214 05D0 beq .L396
2130:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4429 .loc 1 2130 9 is_stmt 1 view .LVU1392
4430 0216 DA68 ldr r2, [r3, #12]
4431 0218 22F00072 bic r2, r2, #33554432
4432 021c DA60 str r2, [r3, #12]
1833:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted;
4433 .loc 1 1833 21 is_stmt 0 view .LVU1393
4434 021e 0026 movs r6, #0
4435 0220 5BE7 b .L332
4436 .L396:
2124:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4437 .loc 1 2124 9 is_stmt 1 view .LVU1394
4438 0222 636D ldr r3, [r4, #84]
4439 0224 43F02003 orr r3, r3, #32
4440 0228 6365 str r3, [r4, #84]
2126:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4441 .loc 1 2126 9 view .LVU1395
4442 .LVL385:
2126:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4443 .loc 1 2126 9 is_stmt 0 view .LVU1396
4444 022a 56E7 b .L332
4445 .LVL386:
4446 .L394:
2146:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif
4447 .loc 1 2146 7 is_stmt 1 view .LVU1397
2148:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4448 .loc 1 2148 7 view .LVU1398
2151:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
4449 .loc 1 2151 7 view .LVU1399
2182:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE |
4450 .loc 1 2182 7 view .LVU1400
4451 022c 2068 ldr r0, [r4]
4452 022e 0269 ldr r2, [r0, #16]
4453 0230 994B ldr r3, .L406
4454 0232 1340 ands r3, r3, r2
4455 0234 6A6B ldr r2, [r5, #52]
4456 0236 511E subs r1, r2, #1
4457 0238 AA6B ldr r2, [r5, #56]
4458 023a 42EA0142 orr r2, r2, r1, lsl #16
4459 023e 1343 orrs r3, r3, r2
4460 0240 43F00203 orr r3, r3, #2
4461 0244 0361 str r3, [r0, #16]
4462 0246 52E7 b .L335
4463 .L336:
2213:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4464 .loc 1 2213 26 is_stmt 0 discriminator 2 view .LVU1401
4465 0248 6A69 ldr r2, [r5, #20]
ARM GAS /tmp/ccTOAmWG.s page 274
4466 024a D968 ldr r1, [r3, #12]
4467 024c 8908 lsrs r1, r1, #2
4468 024e 01F00401 and r1, r1, #4
4469 0252 4900 lsls r1, r1, #1
4470 0254 8A40 lsls r2, r2, r1
4471 0256 5BE7 b .L337
4472 .LVL387:
4473 .L395:
4474 .loc 1 2232 9 discriminator 1 view .LVU1402
4475 0258 4FF00047 mov r7, #-2147483648
4476 .LVL388:
4477 .loc 1 2232 9 discriminator 1 view .LVU1403
4478 025c 70E7 b .L339
4479 .LVL389:
4480 .L338:
2233:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2234:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2235:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2236:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2237:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2238:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #if defined(ADC_VER_V5_V90)
2239:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (hadc->Instance == ADC3)
2240:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2241:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Scan each offset register to check if the selected channel is targeted. */
2242:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If this is the case, the corresponding offset number is disabled. */
2243:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1)
2244:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2245:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE);
2246:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2247:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2)
2248:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2249:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE);
2250:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2251:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3)
2252:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2253:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE);
2254:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2255:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4)
2256:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2257:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE);
2258:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2259:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2260:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2261:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** #endif /* ADC_VER_V5_V90 */
2262:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2263:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Scan each offset register to check if the selected channel is targeted. */
2264:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If this is the case, the corresponding offset number is disabled. */
2265:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1)
4481 .loc 1 2265 9 is_stmt 1 view .LVU1404
4482 .LBB376:
4483 .LBI376:
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4484 .loc 2 3461 26 view .LVU1405
4485 .LBB377:
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4486 .loc 2 3463 3 view .LVU1406
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
ARM GAS /tmp/ccTOAmWG.s page 275
4487 .loc 2 3465 3 view .LVU1407
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4488 .loc 2 3465 10 is_stmt 0 view .LVU1408
4489 025e 1A6E ldr r2, [r3, #96]
4490 .LVL390:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4491 .loc 2 3465 10 view .LVU1409
4492 .LBE377:
4493 .LBE376:
4494 .LBB378:
4495 .LBI378:
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4496 .loc 2 3461 26 is_stmt 1 view .LVU1410
4497 .LBB379:
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4498 .loc 2 3463 3 view .LVU1411
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4499 .loc 2 3465 3 view .LVU1412
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4500 .loc 2 3465 10 is_stmt 0 view .LVU1413
4501 0260 186E ldr r0, [r3, #96]
4502 .LVL391:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4503 .loc 2 3465 10 view .LVU1414
4504 .LBE379:
4505 .LBE378:
4506 .loc 1 2265 13 discriminator 1 view .LVU1415
4507 0262 C0F38460 ubfx r0, r0, #26, #5
4508 .loc 1 2265 105 discriminator 4 view .LVU1416
4509 0266 2968 ldr r1, [r5]
4510 0268 C1F31302 ubfx r2, r1, #0, #20
4511 026c 002A cmp r2, #0
4512 026e 37D1 bne .L340
4513 .loc 1 2265 105 discriminator 5 view .LVU1417
4514 0270 C1F38462 ubfx r2, r1, #26, #5
4515 .L341:
4516 .loc 1 2265 12 discriminator 8 view .LVU1418
4517 0274 9042 cmp r0, r2
4518 0276 3BD0 beq .L397
4519 .L343:
2266:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2267:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_1, sConfigInjected->InjectedChannel, LL_AD
2268:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2269:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2)
4520 .loc 1 2269 9 is_stmt 1 view .LVU1419
4521 .loc 1 2269 13 is_stmt 0 view .LVU1420
4522 0278 2068 ldr r0, [r4]
4523 .LVL392:
4524 .LBB380:
4525 .LBI380:
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4526 .loc 2 3461 26 is_stmt 1 view .LVU1421
4527 .LBB381:
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4528 .loc 2 3463 3 view .LVU1422
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4529 .loc 2 3465 3 view .LVU1423
ARM GAS /tmp/ccTOAmWG.s page 276
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4530 .loc 2 3465 10 is_stmt 0 view .LVU1424
4531 027a 436E ldr r3, [r0, #100]
4532 .LVL393:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4533 .loc 2 3465 10 view .LVU1425
4534 .LBE381:
4535 .LBE380:
4536 .LBB382:
4537 .LBI382:
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4538 .loc 2 3461 26 is_stmt 1 view .LVU1426
4539 .LBB383:
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4540 .loc 2 3463 3 view .LVU1427
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4541 .loc 2 3465 3 view .LVU1428
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4542 .loc 2 3465 10 is_stmt 0 view .LVU1429
4543 027c 416E ldr r1, [r0, #100]
4544 .LVL394:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4545 .loc 2 3465 10 view .LVU1430
4546 .LBE383:
4547 .LBE382:
4548 .loc 1 2269 13 discriminator 1 view .LVU1431
4549 027e C1F38461 ubfx r1, r1, #26, #5
4550 .loc 1 2269 105 discriminator 4 view .LVU1432
4551 0282 2A68 ldr r2, [r5]
4552 0284 C2F31303 ubfx r3, r2, #0, #20
4553 0288 002B cmp r3, #0
4554 028a 39D1 bne .L344
4555 .loc 1 2269 105 discriminator 5 view .LVU1433
4556 028c C2F38463 ubfx r3, r2, #26, #5
4557 .L345:
4558 .loc 1 2269 12 discriminator 8 view .LVU1434
4559 0290 9942 cmp r1, r3
4560 0292 3DD0 beq .L398
4561 .L347:
2270:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2271:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_2, sConfigInjected->InjectedChannel, LL_AD
2272:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2273:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3)
4562 .loc 1 2273 9 is_stmt 1 view .LVU1435
4563 .loc 1 2273 13 is_stmt 0 view .LVU1436
4564 0294 2368 ldr r3, [r4]
4565 .LVL395:
4566 .LBB384:
4567 .LBI384:
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4568 .loc 2 3461 26 is_stmt 1 view .LVU1437
4569 .LBB385:
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4570 .loc 2 3463 3 view .LVU1438
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4571 .loc 2 3463 31 is_stmt 0 view .LVU1439
4572 0296 03F16000 add r0, r3, #96
ARM GAS /tmp/ccTOAmWG.s page 277
4573 .LVL396:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4574 .loc 2 3465 3 is_stmt 1 view .LVU1440
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4575 .loc 2 3465 10 is_stmt 0 view .LVU1441
4576 029a 9A6E ldr r2, [r3, #104]
4577 .LVL397:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4578 .loc 2 3465 10 view .LVU1442
4579 .LBE385:
4580 .LBE384:
4581 .LBB386:
4582 .LBI386:
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4583 .loc 2 3461 26 is_stmt 1 view .LVU1443
4584 .LBB387:
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4585 .loc 2 3463 3 view .LVU1444
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4586 .loc 2 3465 3 view .LVU1445
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4587 .loc 2 3465 10 is_stmt 0 view .LVU1446
4588 029c 996E ldr r1, [r3, #104]
4589 .LVL398:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4590 .loc 2 3465 10 view .LVU1447
4591 .LBE387:
4592 .LBE386:
4593 .loc 1 2273 13 discriminator 1 view .LVU1448
4594 029e C1F38461 ubfx r1, r1, #26, #5
4595 .loc 1 2273 105 discriminator 4 view .LVU1449
4596 02a2 2A68 ldr r2, [r5]
4597 02a4 C2F31303 ubfx r3, r2, #0, #20
4598 02a8 002B cmp r3, #0
4599 02aa 39D1 bne .L348
4600 .loc 1 2273 105 discriminator 5 view .LVU1450
4601 02ac C2F38463 ubfx r3, r2, #26, #5
4602 .L349:
4603 .loc 1 2273 12 discriminator 8 view .LVU1451
4604 02b0 9942 cmp r1, r3
4605 02b2 3DD0 beq .L399
4606 .L351:
2274:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2275:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_4, sConfigInjected->InjectedChannel, LL_AD
2276:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2277:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4)
4607 .loc 1 2277 9 is_stmt 1 view .LVU1452
4608 .loc 1 2277 13 is_stmt 0 view .LVU1453
4609 02b4 2068 ldr r0, [r4]
4610 .LVL399:
4611 .LBB388:
4612 .LBI388:
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4613 .loc 2 3461 26 is_stmt 1 view .LVU1454
4614 .LBB389:
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4615 .loc 2 3463 3 view .LVU1455
ARM GAS /tmp/ccTOAmWG.s page 278
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4616 .loc 2 3465 3 view .LVU1456
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4617 .loc 2 3465 10 is_stmt 0 view .LVU1457
4618 02b6 C36E ldr r3, [r0, #108]
4619 .LVL400:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4620 .loc 2 3465 10 view .LVU1458
4621 .LBE389:
4622 .LBE388:
4623 .LBB390:
4624 .LBI390:
3461:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4625 .loc 2 3461 26 is_stmt 1 view .LVU1459
4626 .LBB391:
3463:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4627 .loc 2 3463 3 view .LVU1460
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4628 .loc 2 3465 3 view .LVU1461
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4629 .loc 2 3465 10 is_stmt 0 view .LVU1462
4630 02b8 C16E ldr r1, [r0, #108]
4631 .LVL401:
3465:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4632 .loc 2 3465 10 view .LVU1463
4633 .LBE391:
4634 .LBE390:
4635 .loc 1 2277 13 discriminator 1 view .LVU1464
4636 02ba C1F38461 ubfx r1, r1, #26, #5
4637 .loc 1 2277 105 discriminator 4 view .LVU1465
4638 02be 2A68 ldr r2, [r5]
4639 02c0 C2F31303 ubfx r3, r2, #0, #20
4640 02c4 002B cmp r3, #0
4641 02c6 3BD1 bne .L352
4642 .loc 1 2277 105 discriminator 5 view .LVU1466
4643 02c8 C2F38463 ubfx r3, r2, #26, #5
4644 .L353:
4645 .loc 1 2277 12 discriminator 8 view .LVU1467
4646 02cc 9942 cmp r1, r3
4647 02ce 40D1 bne .L328
2278:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2279:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_4, sConfigInjected->InjectedChannel, LL_AD
4648 .loc 1 2279 11 is_stmt 1 view .LVU1468
4649 .LVL402:
4650 .LBB392:
4651 .LBI392:
3379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4652 .loc 2 3379 22 view .LVU1469
4653 .LBB393:
3381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
4654 .loc 2 3381 3 view .LVU1470
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4655 .loc 2 3392 5 view .LVU1471
4656 02d0 C36E ldr r3, [r0, #108]
4657 02d2 03F00043 and r3, r3, #-2147483648
4658 02d6 02F0F842 and r2, r2, #2080374784
4659 .LVL403:
ARM GAS /tmp/ccTOAmWG.s page 279
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4660 .loc 2 3392 5 is_stmt 0 view .LVU1472
4661 02da 1343 orrs r3, r3, r2
4662 02dc C366 str r3, [r0, #108]
4663 .LVL404:
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4664 .loc 2 3396 1 view .LVU1473
4665 02de 38E0 b .L328
4666 .L340:
4667 .LVL405:
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4668 .loc 2 3396 1 view .LVU1474
4669 .LBE393:
4670 .LBE392:
4671 .LBB394:
4672 .LBI394:
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4673 .loc 3 1048 31 is_stmt 1 view .LVU1475
4674 .LBB395:
1050:Drivers/CMSIS/Include/cmsis_gcc.h ****
4675 .loc 3 1050 3 view .LVU1476
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
4676 .loc 3 1055 4 view .LVU1477
4677 .syntax unified
4678 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
4679 02e0 91FAA1F2 rbit r2, r1
4680 @ 0 "" 2
4681 .LVL406:
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4682 .loc 3 1068 3 view .LVU1478
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4683 .loc 3 1068 3 is_stmt 0 view .LVU1479
4684 .thumb
4685 .syntax unified
4686 .LBE395:
4687 .LBE394:
4688 .LBB396:
4689 .LBI396:
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4690 .loc 3 1078 30 is_stmt 1 view .LVU1480
4691 .LBB397:
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4692 .loc 3 1089 3 view .LVU1481
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4693 .loc 3 1089 6 is_stmt 0 view .LVU1482
4694 02e4 12B1 cbz r2, .L370
4695 .loc 3 1093 3 is_stmt 1 view .LVU1483
4696 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1484
4697 02e6 B2FA82F2 clz r2, r2
4698 .LVL407:
4699 .loc 3 1093 10 view .LVU1485
4700 02ea C3E7 b .L341
4701 .LVL408:
4702 .L370:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4703 .loc 3 1091 12 view .LVU1486
4704 02ec 2022 movs r2, #32
ARM GAS /tmp/ccTOAmWG.s page 280
4705 .LVL409:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4706 .loc 3 1091 12 view .LVU1487
4707 02ee C1E7 b .L341
4708 .L397:
4709 .LBE397:
4710 .LBE396:
2267:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4711 .loc 1 2267 11 is_stmt 1 view .LVU1488
4712 .LVL410:
4713 .LBB398:
4714 .LBI398:
3379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4715 .loc 2 3379 22 view .LVU1489
4716 .LBB399:
3381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
4717 .loc 2 3381 3 view .LVU1490
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4718 .loc 2 3392 5 view .LVU1491
4719 02f0 1A6E ldr r2, [r3, #96]
4720 02f2 02F00042 and r2, r2, #-2147483648
4721 02f6 01F0F841 and r1, r1, #2080374784
4722 .LVL411:
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4723 .loc 2 3392 5 is_stmt 0 view .LVU1492
4724 02fa 0A43 orrs r2, r2, r1
4725 02fc 1A66 str r2, [r3, #96]
4726 .LVL412:
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4727 .loc 2 3396 1 view .LVU1493
4728 02fe BBE7 b .L343
4729 .L344:
4730 .LVL413:
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4731 .loc 2 3396 1 view .LVU1494
4732 .LBE399:
4733 .LBE398:
4734 .LBB400:
4735 .LBI400:
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4736 .loc 3 1048 31 is_stmt 1 view .LVU1495
4737 .LBB401:
1050:Drivers/CMSIS/Include/cmsis_gcc.h ****
4738 .loc 3 1050 3 view .LVU1496
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
4739 .loc 3 1055 4 view .LVU1497
4740 .syntax unified
4741 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
4742 0300 92FAA2F3 rbit r3, r2
4743 @ 0 "" 2
4744 .LVL414:
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4745 .loc 3 1068 3 view .LVU1498
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4746 .loc 3 1068 3 is_stmt 0 view .LVU1499
4747 .thumb
4748 .syntax unified
ARM GAS /tmp/ccTOAmWG.s page 281
4749 .LBE401:
4750 .LBE400:
4751 .LBB402:
4752 .LBI402:
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4753 .loc 3 1078 30 is_stmt 1 view .LVU1500
4754 .LBB403:
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4755 .loc 3 1089 3 view .LVU1501
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4756 .loc 3 1089 6 is_stmt 0 view .LVU1502
4757 0304 13B1 cbz r3, .L371
4758 .loc 3 1093 3 is_stmt 1 view .LVU1503
4759 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1504
4760 0306 B3FA83F3 clz r3, r3
4761 .LVL415:
4762 .loc 3 1093 10 view .LVU1505
4763 030a C1E7 b .L345
4764 .LVL416:
4765 .L371:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4766 .loc 3 1091 12 view .LVU1506
4767 030c 2023 movs r3, #32
4768 .LVL417:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4769 .loc 3 1091 12 view .LVU1507
4770 030e BFE7 b .L345
4771 .L398:
4772 .LBE403:
4773 .LBE402:
2271:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4774 .loc 1 2271 11 is_stmt 1 view .LVU1508
4775 .LVL418:
4776 .LBB404:
4777 .LBI404:
3379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4778 .loc 2 3379 22 view .LVU1509
4779 .LBB405:
3381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
4780 .loc 2 3381 3 view .LVU1510
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4781 .loc 2 3392 5 view .LVU1511
4782 0310 436E ldr r3, [r0, #100]
4783 0312 03F00043 and r3, r3, #-2147483648
4784 0316 02F0F842 and r2, r2, #2080374784
4785 .LVL419:
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4786 .loc 2 3392 5 is_stmt 0 view .LVU1512
4787 031a 1343 orrs r3, r3, r2
4788 031c 4366 str r3, [r0, #100]
4789 .LVL420:
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4790 .loc 2 3396 1 view .LVU1513
4791 031e B9E7 b .L347
4792 .L348:
4793 .LVL421:
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
ARM GAS /tmp/ccTOAmWG.s page 282
4794 .loc 2 3396 1 view .LVU1514
4795 .LBE405:
4796 .LBE404:
4797 .LBB406:
4798 .LBI406:
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4799 .loc 3 1048 31 is_stmt 1 view .LVU1515
4800 .LBB407:
1050:Drivers/CMSIS/Include/cmsis_gcc.h ****
4801 .loc 3 1050 3 view .LVU1516
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
4802 .loc 3 1055 4 view .LVU1517
4803 .syntax unified
4804 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
4805 0320 92FAA2F3 rbit r3, r2
4806 @ 0 "" 2
4807 .LVL422:
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4808 .loc 3 1068 3 view .LVU1518
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4809 .loc 3 1068 3 is_stmt 0 view .LVU1519
4810 .thumb
4811 .syntax unified
4812 .LBE407:
4813 .LBE406:
4814 .LBB408:
4815 .LBI408:
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4816 .loc 3 1078 30 is_stmt 1 view .LVU1520
4817 .LBB409:
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4818 .loc 3 1089 3 view .LVU1521
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4819 .loc 3 1089 6 is_stmt 0 view .LVU1522
4820 0324 13B1 cbz r3, .L372
4821 .loc 3 1093 3 is_stmt 1 view .LVU1523
4822 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1524
4823 0326 B3FA83F3 clz r3, r3
4824 .LVL423:
4825 .loc 3 1093 10 view .LVU1525
4826 032a C1E7 b .L349
4827 .LVL424:
4828 .L372:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4829 .loc 3 1091 12 view .LVU1526
4830 032c 2023 movs r3, #32
4831 .LVL425:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4832 .loc 3 1091 12 view .LVU1527
4833 032e BFE7 b .L349
4834 .L399:
4835 .LBE409:
4836 .LBE408:
2275:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4837 .loc 1 2275 11 is_stmt 1 view .LVU1528
4838 .LVL426:
4839 .LBB410:
ARM GAS /tmp/ccTOAmWG.s page 283
4840 .LBI410:
3379:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4841 .loc 2 3379 22 view .LVU1529
4842 .LBB411:
3381:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** #if defined(ADC_VER_V5_V90)
4843 .loc 2 3381 3 view .LVU1530
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4844 .loc 2 3392 5 view .LVU1531
4845 0330 C368 ldr r3, [r0, #12]
4846 0332 03F00043 and r3, r3, #-2147483648
4847 0336 02F0F842 and r2, r2, #2080374784
4848 .LVL427:
3392:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1,
4849 .loc 2 3392 5 is_stmt 0 view .LVU1532
4850 033a 1343 orrs r3, r3, r2
4851 033c C360 str r3, [r0, #12]
4852 .LVL428:
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4853 .loc 2 3396 1 view .LVU1533
4854 033e B9E7 b .L351
4855 .L352:
4856 .LVL429:
3396:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
4857 .loc 2 3396 1 view .LVU1534
4858 .LBE411:
4859 .LBE410:
4860 .LBB412:
4861 .LBI412:
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4862 .loc 3 1048 31 is_stmt 1 view .LVU1535
4863 .LBB413:
1050:Drivers/CMSIS/Include/cmsis_gcc.h ****
4864 .loc 3 1050 3 view .LVU1536
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
4865 .loc 3 1055 4 view .LVU1537
4866 .syntax unified
4867 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
4868 0340 92FAA2F3 rbit r3, r2
4869 @ 0 "" 2
4870 .LVL430:
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4871 .loc 3 1068 3 view .LVU1538
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4872 .loc 3 1068 3 is_stmt 0 view .LVU1539
4873 .thumb
4874 .syntax unified
4875 .LBE413:
4876 .LBE412:
4877 .LBB414:
4878 .LBI414:
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4879 .loc 3 1078 30 is_stmt 1 view .LVU1540
4880 .LBB415:
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4881 .loc 3 1089 3 view .LVU1541
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
4882 .loc 3 1089 6 is_stmt 0 view .LVU1542
ARM GAS /tmp/ccTOAmWG.s page 284
4883 0344 13B1 cbz r3, .L373
4884 .loc 3 1093 3 is_stmt 1 view .LVU1543
4885 .loc 3 1093 10 is_stmt 0 discriminator 1 view .LVU1544
4886 0346 B3FA83F3 clz r3, r3
4887 .LVL431:
4888 .loc 3 1093 10 view .LVU1545
4889 034a BFE7 b .L353
4890 .LVL432:
4891 .L373:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4892 .loc 3 1091 12 view .LVU1546
4893 034c 2023 movs r3, #32
4894 .LVL433:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4895 .loc 3 1091 12 view .LVU1547
4896 034e BDE7 b .L353
4897 .LVL434:
4898 .L368:
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4899 .loc 3 1091 12 view .LVU1548
4900 .LBE415:
4901 .LBE414:
1833:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted;
4902 .loc 1 1833 21 view .LVU1549
4903 0350 0026 movs r6, #0
4904 .LVL435:
4905 .L328:
2280:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2281:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2282:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2283:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2284:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2285:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2286:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */
2287:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */
2288:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Single or differential mode */
2289:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Internal measurement channels: Vbat/VrefInt/TempSensor */
2290:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
4906 .loc 1 2290 3 is_stmt 1 view .LVU1550
4907 .loc 1 2290 28 is_stmt 0 view .LVU1551
4908 0352 2768 ldr r7, [r4]
4909 .LVL436:
4910 .LBB416:
4911 .LBI416:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4912 .loc 2 6941 26 is_stmt 1 view .LVU1552
4913 .LBB417:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4914 .loc 2 6943 3 view .LVU1553
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4915 .loc 2 6943 12 is_stmt 0 view .LVU1554
4916 0354 B968 ldr r1, [r7, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4917 .loc 2 6943 68 view .LVU1555
4918 0356 11F00101 ands r1, r1, #1
4919 035a 1AD1 bne .L355
4920 .LVL437:
ARM GAS /tmp/ccTOAmWG.s page 285
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
4921 .loc 2 6943 68 view .LVU1556
4922 .LBE417:
4923 .LBE416:
2291:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2292:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set mode single-ended or differential input of the selected ADC channel */
2293:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->
4924 .loc 1 2293 5 is_stmt 1 view .LVU1557
4925 035c 2B68 ldr r3, [r5]
4926 035e E868 ldr r0, [r5, #12]
4927 .LVL438:
4928 .LBB418:
4929 .LBI418:
5555:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
4930 .loc 2 5555 22 view .LVU1558
4931 .LBB419:
5577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
4932 .loc 2 5577 3 view .LVU1559
4933 0360 D7F8C020 ldr r2, [r7, #192]
4934 0364 C3F3130C ubfx ip, r3, #0, #20
4935 0368 22EA0C02 bic r2, r2, ip
4936 036c 00F0180C and ip, r0, #24
4937 0370 4A48 ldr r0, .L406+4
4938 .LVL439:
5577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
4939 .loc 2 5577 3 is_stmt 0 view .LVU1560
4940 0372 20FA0CF0 lsr r0, r0, ip
4941 0376 0340 ands r3, r3, r0
4942 .LVL440:
5577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
4943 .loc 2 5577 3 view .LVU1561
4944 0378 C3F31303 ubfx r3, r3, #0, #20
4945 037c 1343 orrs r3, r3, r2
4946 037e C7F8C030 str r3, [r7, #192]
4947 .LVL441:
5577:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
4948 .loc 2 5577 3 view .LVU1562
4949 .LBE419:
4950 .LBE418:
2294:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2295:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Configuration of differential mode */
2296:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range
2297:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (sConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED)
4951 .loc 1 2297 5 is_stmt 1 view .LVU1563
4952 .loc 1 2297 24 is_stmt 0 view .LVU1564
4953 0382 EA68 ldr r2, [r5, #12]
4954 .loc 1 2297 8 view .LVU1565
4955 0384 464B ldr r3, .L406+8
4956 0386 9A42 cmp r2, r3
4957 0388 0BD0 beq .L400
4958 .L356:
2298:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2299:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Set ADC channel preselection of corresponding negative channel */
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetChannelPreselection(hadc->Instance, ADC_CHANNEL_DIFF_NEG_INPUT(hadc, sConfigInjecte
2301:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2302:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2303:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
ARM GAS /tmp/ccTOAmWG.s page 286
2304:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* internal measurement paths enable: If internal channel selected, */
2305:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* enable dedicated internal buffers and path. */
2306:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: these internal measurement paths can be disabled using */
2307:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* HAL_ADC_DeInit(). */
2308:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2309:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel))
4959 .loc 1 2309 5 is_stmt 1 view .LVU1566
4960 .loc 1 2309 9 is_stmt 0 view .LVU1567
4961 038a 2B68 ldr r3, [r5]
4962 .loc 1 2309 8 view .LVU1568
4963 038c 002B cmp r3, #0
4964 038e C0F2AD80 blt .L401
4965 .LVL442:
4966 .L355:
2310:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2311:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Configuration of common ADC parameters (continuation) */
2312:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Software is allowed to change common parameters only when all ADCs */
2313:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* of the common group are disabled. */
2314:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2315:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2316:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc-
2317:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2318:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If the requested internal measurement path has already been enabled, */
2319:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* bypass the configuration processing. */
2320:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) && ((tmp_config_internal_c
2321:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2322:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
2323:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2324:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_IN
2325:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2326:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Delay for temperature sensor stabilization time */
2327:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Wait loop initialization and execution */
2328:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: Variable divided by 2 to compensate partially */
2329:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* CPU processing cycles, scaling in us split to not */
2330:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* exceed 32 bits register capacity and handle low frequency. */
2331:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * ((SystemCoreClock / (1000
2332:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (wait_loop_index != 0UL)
2333:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2334:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** wait_loop_index--;
2335:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2336:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2337:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) && ((tmp_config_internal_ch
2339:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2340:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
2341:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2342:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_IN
2343:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2344:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2345:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) && ((tmp_config_internal
2346:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2347:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (ADC_VREFINT_INSTANCE(hadc))
2348:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2349:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_IN
2350:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2351:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2352:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
ARM GAS /tmp/ccTOAmWG.s page 287
2353:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2354:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* nothing to do */
2355:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2356:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2357:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If the requested internal measurement path has already been enabled */
2358:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* and other ADC of the common group are enabled, internal */
2359:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* measurement paths cannot be enabled. */
2360:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2361:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2362:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
2363:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2364:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2365:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
2366:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2367:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2368:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2369:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2370:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2371:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
2372:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
4967 .loc 1 2372 3 is_stmt 1 view .LVU1569
4968 .loc 1 2372 3 view .LVU1570
4969 0392 0023 movs r3, #0
4970 0394 84F85030 strb r3, [r4, #80]
4971 .loc 1 2372 3 view .LVU1571
2373:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2374:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
2375:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
4972 .loc 1 2375 3 view .LVU1572
4973 .LVL443:
4974 .L313:
2376:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4975 .loc 1 2376 1 is_stmt 0 view .LVU1573
4976 0398 3046 mov r0, r6
4977 039a 03B0 add sp, sp, #12
4978 .cfi_remember_state
4979 .cfi_def_cfa_offset 20
4980 @ sp needed
4981 039c F0BD pop {r4, r5, r6, r7, pc}
4982 .LVL444:
4983 .L369:
4984 .cfi_restore_state
1833:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted;
4985 .loc 1 1833 21 view .LVU1574
4986 039e 0026 movs r6, #0
4987 03a0 D7E7 b .L328
4988 .LVL445:
4989 .L400:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4990 .loc 1 2300 7 is_stmt 1 view .LVU1575
4991 03a2 2068 ldr r0, [r4]
4992 03a4 3F4B ldr r3, .L406+12
4993 03a6 9842 cmp r0, r3
4994 03a8 05D0 beq .L402
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
4995 .loc 1 2300 53 is_stmt 0 discriminator 2 view .LVU1576
4996 03aa 3F4B ldr r3, .L406+16
ARM GAS /tmp/ccTOAmWG.s page 288
4997 03ac 9842 cmp r0, r3
4998 03ae 2BD0 beq .L403
4999 .L358:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5000 .loc 1 2300 7 discriminator 84 view .LVU1577
5001 03b0 FFF7FEFF bl LL_ADC_SetChannelPreselection
5002 .LVL446:
5003 03b4 E9E7 b .L356
5004 .L402:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5005 .loc 1 2300 53 discriminator 1 view .LVU1578
5006 03b6 2B68 ldr r3, [r5]
5007 03b8 3C4A ldr r2, .L406+20
5008 03ba 9342 cmp r3, r2
5009 03bc 4AD0 beq .L374
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5010 .loc 1 2300 53 discriminator 3 view .LVU1579
5011 03be 3C4A ldr r2, .L406+24
5012 03c0 9342 cmp r3, r2
5013 03c2 49D0 beq .L375
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5014 .loc 1 2300 53 discriminator 5 view .LVU1580
5015 03c4 3B4A ldr r2, .L406+28
5016 03c6 9342 cmp r3, r2
5017 03c8 48D0 beq .L376
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5018 .loc 1 2300 53 discriminator 7 view .LVU1581
5019 03ca 3B4A ldr r2, .L406+32
5020 03cc 9342 cmp r3, r2
5021 03ce 47D0 beq .L377
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5022 .loc 1 2300 53 discriminator 9 view .LVU1582
5023 03d0 02F18662 add r2, r2, #70254592
5024 03d4 1032 adds r2, r2, #16
5025 03d6 9342 cmp r3, r2
5026 03d8 44D0 beq .L378
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5027 .loc 1 2300 53 discriminator 11 view .LVU1583
5028 03da 384A ldr r2, .L406+36
5029 03dc 9342 cmp r3, r2
5030 03de 43D0 beq .L379
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5031 .loc 1 2300 53 discriminator 13 view .LVU1584
5032 03e0 02F10422 add r2, r2, #67109888
5033 03e4 02F54012 add r2, r2, #3145728
5034 03e8 9342 cmp r3, r2
5035 03ea 3FD0 beq .L380
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5036 .loc 1 2300 53 discriminator 15 view .LVU1585
5037 03ec 02F18662 add r2, r2, #70254592
5038 03f0 02F50062 add r2, r2, #2048
5039 03f4 9342 cmp r3, r2
5040 03f6 3BD0 beq .L381
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5041 .loc 1 2300 53 discriminator 17 view .LVU1586
5042 03f8 314A ldr r2, .L406+40
5043 03fa 9342 cmp r3, r2
ARM GAS /tmp/ccTOAmWG.s page 289
5044 03fc 3AD0 beq .L382
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5045 .loc 1 2300 53 discriminator 19 view .LVU1587
5046 03fe 314A ldr r2, .L406+44
5047 0400 9342 cmp r3, r2
5048 0402 D5D1 bne .L358
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5049 .loc 1 2300 53 discriminator 21 view .LVU1588
5050 0404 3049 ldr r1, .L406+48
5051 0406 D3E7 b .L358
5052 .L403:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5053 .loc 1 2300 53 discriminator 44 view .LVU1589
5054 0408 2B68 ldr r3, [r5]
5055 040a 284A ldr r2, .L406+20
5056 040c 9342 cmp r3, r2
5057 040e 33D0 beq .L383
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5058 .loc 1 2300 53 discriminator 46 view .LVU1590
5059 0410 274A ldr r2, .L406+24
5060 0412 9342 cmp r3, r2
5061 0414 32D0 beq .L384
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5062 .loc 1 2300 53 discriminator 48 view .LVU1591
5063 0416 274A ldr r2, .L406+28
5064 0418 9342 cmp r3, r2
5065 041a 31D0 beq .L385
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5066 .loc 1 2300 53 discriminator 50 view .LVU1592
5067 041c 264A ldr r2, .L406+32
5068 041e 9342 cmp r3, r2
5069 0420 30D0 beq .L386
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5070 .loc 1 2300 53 discriminator 52 view .LVU1593
5071 0422 02F18662 add r2, r2, #70254592
5072 0426 1032 adds r2, r2, #16
5073 0428 9342 cmp r3, r2
5074 042a 2DD0 beq .L387
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5075 .loc 1 2300 53 discriminator 54 view .LVU1594
5076 042c 234A ldr r2, .L406+36
5077 042e 9342 cmp r3, r2
5078 0430 2CD0 beq .L388
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5079 .loc 1 2300 53 discriminator 56 view .LVU1595
5080 0432 02F10422 add r2, r2, #67109888
5081 0436 02F54012 add r2, r2, #3145728
5082 043a 9342 cmp r3, r2
5083 043c 28D0 beq .L389
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5084 .loc 1 2300 53 discriminator 58 view .LVU1596
5085 043e 02F18662 add r2, r2, #70254592
5086 0442 02F50062 add r2, r2, #2048
5087 0446 9342 cmp r3, r2
5088 0448 24D0 beq .L390
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5089 .loc 1 2300 53 discriminator 60 view .LVU1597
ARM GAS /tmp/ccTOAmWG.s page 290
5090 044a 1E4A ldr r2, .L406+44
5091 044c 9342 cmp r3, r2
5092 044e AFD1 bne .L358
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5093 .loc 1 2300 53 discriminator 62 view .LVU1598
5094 0450 1D49 ldr r1, .L406+48
5095 0452 ADE7 b .L358
5096 .L374:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5097 .loc 1 2300 53 discriminator 4 view .LVU1599
5098 0454 0121 movs r1, #1
5099 0456 ABE7 b .L358
5100 .L375:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5101 .loc 1 2300 53 discriminator 6 view .LVU1600
5102 0458 1C49 ldr r1, .L406+52
5103 045a A9E7 b .L358
5104 .L376:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5105 .loc 1 2300 53 discriminator 8 view .LVU1601
5106 045c 1C49 ldr r1, .L406+56
5107 045e A7E7 b .L358
5108 .L377:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5109 .loc 1 2300 53 discriminator 10 view .LVU1602
5110 0460 1C49 ldr r1, .L406+60
5111 0462 A5E7 b .L358
5112 .L378:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5113 .loc 1 2300 53 discriminator 12 view .LVU1603
5114 0464 1C49 ldr r1, .L406+64
5115 0466 A3E7 b .L358
5116 .L379:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5117 .loc 1 2300 53 discriminator 14 view .LVU1604
5118 0468 1C49 ldr r1, .L406+68
5119 046a A1E7 b .L358
5120 .L380:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5121 .loc 1 2300 53 discriminator 16 view .LVU1605
5122 046c 1C49 ldr r1, .L406+72
5123 046e 9FE7 b .L358
5124 .L381:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5125 .loc 1 2300 53 discriminator 18 view .LVU1606
5126 0470 1C49 ldr r1, .L406+76
5127 0472 9DE7 b .L358
5128 .L382:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5129 .loc 1 2300 53 discriminator 20 view .LVU1607
5130 0474 1C49 ldr r1, .L406+80
5131 0476 9BE7 b .L358
5132 .L383:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5133 .loc 1 2300 53 discriminator 47 view .LVU1608
5134 0478 0121 movs r1, #1
5135 047a 99E7 b .L358
ARM GAS /tmp/ccTOAmWG.s page 291
5136 .L384:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5137 .loc 1 2300 53 discriminator 49 view .LVU1609
5138 047c 1349 ldr r1, .L406+52
5139 047e 97E7 b .L358
5140 .L385:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5141 .loc 1 2300 53 discriminator 51 view .LVU1610
5142 0480 1349 ldr r1, .L406+56
5143 0482 95E7 b .L358
5144 .L386:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5145 .loc 1 2300 53 discriminator 53 view .LVU1611
5146 0484 1349 ldr r1, .L406+60
5147 0486 93E7 b .L358
5148 .L387:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5149 .loc 1 2300 53 discriminator 55 view .LVU1612
5150 0488 1349 ldr r1, .L406+64
5151 048a 91E7 b .L358
5152 .L388:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5153 .loc 1 2300 53 discriminator 57 view .LVU1613
5154 048c 1349 ldr r1, .L406+68
5155 048e 8FE7 b .L358
5156 .L389:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5157 .loc 1 2300 53 discriminator 59 view .LVU1614
5158 0490 1349 ldr r1, .L406+72
5159 0492 8DE7 b .L358
5160 .L390:
2300:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5161 .loc 1 2300 53 discriminator 61 view .LVU1615
5162 0494 1349 ldr r1, .L406+76
5163 0496 8BE7 b .L358
5164 .L407:
5165 .align 2
5166 .L406:
5167 0498 1DFE00FC .word -67043811
5168 049c FFFF0F00 .word 1048575
5169 04a0 0000FF47 .word 1207894016
5170 04a4 00200240 .word 1073881088
5171 04a8 00210240 .word 1073881344
5172 04ac 02003004 .word 70254594
5173 04b0 04006008 .word 140509188
5174 04b4 0800900C .word 210763784
5175 04b8 1000C010 .word 281018384
5176 04bc 0004002A .word 704644096
5177 04c0 00002143 .word 1126236160
5178 04c4 0000844B .word 1266941952
5179 04c8 0000B84F .word 1337458688
5180 04cc 40002019 .word 421527616
5181 04d0 8000501D .word 491782272
5182 04d4 00018021 .word 562036992
5183 04d8 0002B025 .word 632291840
5184 04dc 0008302E .word 774899712
5185 04e0 00106032 .word 845156352
ARM GAS /tmp/ccTOAmWG.s page 292
5186 04e4 00209036 .word 915415040
5187 04e8 00005247 .word 1196556288
5188 .L401:
2314:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5189 .loc 1 2314 7 is_stmt 1 view .LVU1616
5190 .LVL447:
5191 .LBB420:
5192 .LBI420:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5193 .loc 2 6941 26 view .LVU1617
5194 .LBB421:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5195 .loc 2 6943 3 view .LVU1618
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5196 .loc 2 6943 12 is_stmt 0 view .LVU1619
5197 04ec 334A ldr r2, .L408
5198 04ee 9268 ldr r2, [r2, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5199 .loc 2 6943 68 view .LVU1620
5200 04f0 12F00102 ands r2, r2, #1
5201 04f4 00D0 beq .L359
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5202 .loc 2 6943 68 discriminator 1 view .LVU1621
5203 04f6 0122 movs r2, #1
5204 .L359:
5205 .LVL448:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5206 .loc 2 6943 68 discriminator 1 view .LVU1622
5207 .LBE421:
5208 .LBE420:
5209 .LBB422:
5210 .LBI422:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5211 .loc 2 6941 26 is_stmt 1 view .LVU1623
5212 .LBB423:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5213 .loc 2 6943 3 view .LVU1624
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5214 .loc 2 6943 12 is_stmt 0 view .LVU1625
5215 04f8 3149 ldr r1, .L408+4
5216 04fa 8968 ldr r1, [r1, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5217 .loc 2 6943 68 view .LVU1626
5218 04fc 11F0010F tst r1, #1
5219 0500 54D1 bne .L360
5220 .LVL449:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5221 .loc 2 6943 68 view .LVU1627
5222 .LBE423:
5223 .LBE422:
2314:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5224 .loc 1 2314 10 discriminator 2 view .LVU1628
5225 0502 002A cmp r2, #0
5226 0504 52D1 bne .L360
2316:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5227 .loc 1 2316 9 is_stmt 1 view .LVU1629
5228 .LVL450:
ARM GAS /tmp/ccTOAmWG.s page 293
5229 .LBB424:
5230 .LBI424:
2753:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5231 .loc 2 2753 26 view .LVU1630
5232 .LBB425:
2755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5233 .loc 2 2755 3 view .LVU1631
2755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5234 .loc 2 2755 21 is_stmt 0 view .LVU1632
5235 0506 2F4A ldr r2, .L408+8
5236 0508 9268 ldr r2, [r2, #8]
2755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5237 .loc 2 2755 10 view .LVU1633
5238 050a 02F0E070 and r0, r2, #29360128
5239 .LVL451:
2755:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5240 .loc 2 2755 10 view .LVU1634
5241 .LBE425:
5242 .LBE424:
2320:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5243 .loc 1 2320 9 is_stmt 1 view .LVU1635
2320:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5244 .loc 1 2320 12 is_stmt 0 view .LVU1636
5245 050e 2E49 ldr r1, .L408+12
5246 0510 8B42 cmp r3, r1
5247 0512 18D0 beq .L404
5248 .L361:
2338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5249 .loc 1 2338 14 is_stmt 1 view .LVU1637
2338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5250 .loc 1 2338 17 is_stmt 0 view .LVU1638
5251 0514 2D49 ldr r1, .L408+16
5252 0516 8B42 cmp r3, r1
5253 0518 37D0 beq .L405
5254 .L364:
2345:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5255 .loc 1 2345 14 is_stmt 1 view .LVU1639
2345:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5256 .loc 1 2345 17 is_stmt 0 view .LVU1640
5257 051a 2D49 ldr r1, .L408+20
5258 051c 8B42 cmp r3, r1
5259 051e 7FF438AF bne .L355
2345:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5260 .loc 1 2345 76 discriminator 1 view .LVU1641
5261 0522 12F4800F tst r2, #4194304
5262 0526 7FF434AF bne .L355
2347:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5263 .loc 1 2347 11 is_stmt 1 view .LVU1642
2347:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5264 .loc 1 2347 15 is_stmt 0 view .LVU1643
5265 052a 2268 ldr r2, [r4]
2347:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5266 .loc 1 2347 14 view .LVU1644
5267 052c 244B ldr r3, .L408+4
5268 052e 9A42 cmp r2, r3
5269 0530 7FF42FAF bne .L355
2349:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
ARM GAS /tmp/ccTOAmWG.s page 294
5270 .loc 1 2349 13 is_stmt 1 view .LVU1645
5271 0534 40F48003 orr r3, r0, #4194304
5272 .LVL452:
5273 .LBB426:
5274 .LBI426:
2731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5275 .loc 2 2731 22 view .LVU1646
5276 .LBB427:
2733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5277 .loc 2 2733 3 view .LVU1647
5278 0538 2249 ldr r1, .L408+8
5279 053a 8A68 ldr r2, [r1, #8]
5280 053c 22F0E072 bic r2, r2, #29360128
5281 0540 1343 orrs r3, r3, r2
5282 .LVL453:
2733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5283 .loc 2 2733 3 is_stmt 0 view .LVU1648
5284 0542 8B60 str r3, [r1, #8]
5285 .LVL454:
2734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5286 .loc 2 2734 1 view .LVU1649
5287 0544 25E7 b .L355
5288 .L404:
2734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5289 .loc 2 2734 1 view .LVU1650
5290 .LBE427:
5291 .LBE426:
2320:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5292 .loc 1 2320 74 discriminator 1 view .LVU1651
5293 0546 12F4000F tst r2, #8388608
5294 054a E3D1 bne .L361
2322:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5295 .loc 1 2322 11 is_stmt 1 view .LVU1652
2322:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5296 .loc 1 2322 15 is_stmt 0 view .LVU1653
5297 054c 2268 ldr r2, [r4]
2322:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5298 .loc 1 2322 14 view .LVU1654
5299 054e 1C4B ldr r3, .L408+4
5300 0550 9A42 cmp r2, r3
5301 0552 7FF41EAF bne .L355
2324:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5302 .loc 1 2324 13 is_stmt 1 view .LVU1655
5303 0556 40F40003 orr r3, r0, #8388608
5304 .LVL455:
5305 .LBB428:
5306 .LBI428:
2731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5307 .loc 2 2731 22 view .LVU1656
5308 .LBB429:
2733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5309 .loc 2 2733 3 view .LVU1657
5310 055a 1A49 ldr r1, .L408+8
5311 055c 8A68 ldr r2, [r1, #8]
5312 055e 22F0E072 bic r2, r2, #29360128
5313 0562 1343 orrs r3, r3, r2
5314 .LVL456:
ARM GAS /tmp/ccTOAmWG.s page 295
2733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5315 .loc 2 2733 3 is_stmt 0 view .LVU1658
5316 0564 8B60 str r3, [r1, #8]
5317 .LVL457:
2733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5318 .loc 2 2733 3 view .LVU1659
5319 .LBE429:
5320 .LBE428:
2331:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (wait_loop_index != 0UL)
5321 .loc 1 2331 13 is_stmt 1 view .LVU1660
2331:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (wait_loop_index != 0UL)
5322 .loc 1 2331 93 is_stmt 0 view .LVU1661
5323 0566 1B4B ldr r3, .L408+24
5324 0568 1B68 ldr r3, [r3]
5325 056a 9B09 lsrs r3, r3, #6
5326 056c 1A4A ldr r2, .L408+28
5327 056e A2FB0323 umull r2, r3, r2, r3
5328 0572 9B09 lsrs r3, r3, #6
2331:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (wait_loop_index != 0UL)
5329 .loc 1 2331 113 view .LVU1662
5330 0574 0133 adds r3, r3, #1
2331:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (wait_loop_index != 0UL)
5331 .loc 1 2331 73 view .LVU1663
5332 0576 5B00 lsls r3, r3, #1
2331:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** while (wait_loop_index != 0UL)
5333 .loc 1 2331 29 view .LVU1664
5334 0578 0193 str r3, [sp, #4]
2332:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5335 .loc 1 2332 13 is_stmt 1 view .LVU1665
2332:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5336 .loc 1 2332 19 is_stmt 0 view .LVU1666
5337 057a 02E0 b .L362
5338 .L363:
2334:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5339 .loc 1 2334 15 is_stmt 1 view .LVU1667
2334:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5340 .loc 1 2334 30 is_stmt 0 view .LVU1668
5341 057c 019B ldr r3, [sp, #4]
5342 057e 013B subs r3, r3, #1
5343 0580 0193 str r3, [sp, #4]
5344 .L362:
2332:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5345 .loc 1 2332 36 is_stmt 1 view .LVU1669
5346 0582 019B ldr r3, [sp, #4]
5347 0584 002B cmp r3, #0
5348 0586 F9D1 bne .L363
5349 0588 03E7 b .L355
5350 .L405:
2338:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5351 .loc 1 2338 73 is_stmt 0 discriminator 1 view .LVU1670
5352 058a 12F0807F tst r2, #16777216
5353 058e C4D1 bne .L364
2340:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5354 .loc 1 2340 11 is_stmt 1 view .LVU1671
2340:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5355 .loc 1 2340 15 is_stmt 0 view .LVU1672
5356 0590 2268 ldr r2, [r4]
ARM GAS /tmp/ccTOAmWG.s page 296
2340:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5357 .loc 1 2340 14 view .LVU1673
5358 0592 0B4B ldr r3, .L408+4
5359 0594 9A42 cmp r2, r3
5360 0596 7FF4FCAE bne .L355
2342:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5361 .loc 1 2342 13 is_stmt 1 view .LVU1674
5362 059a 40F08073 orr r3, r0, #16777216
5363 .LVL458:
5364 .LBB430:
5365 .LBI430:
2731:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5366 .loc 2 2731 22 view .LVU1675
5367 .LBB431:
2733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5368 .loc 2 2733 3 view .LVU1676
5369 059e 0949 ldr r1, .L408+8
5370 05a0 8A68 ldr r2, [r1, #8]
5371 05a2 22F0E072 bic r2, r2, #29360128
5372 05a6 1343 orrs r3, r3, r2
5373 .LVL459:
2733:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5374 .loc 2 2733 3 is_stmt 0 view .LVU1677
5375 05a8 8B60 str r3, [r1, #8]
5376 .LVL460:
2734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5377 .loc 2 2734 1 view .LVU1678
5378 05aa F2E6 b .L355
5379 .LVL461:
5380 .L360:
2734:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h ****
5381 .loc 2 2734 1 view .LVU1679
5382 .LBE431:
5383 .LBE430:
2363:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5384 .loc 1 2363 9 is_stmt 1 view .LVU1680
5385 05ac 636D ldr r3, [r4, #84]
5386 05ae 43F02003 orr r3, r3, #32
5387 05b2 6365 str r3, [r4, #84]
2365:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5388 .loc 1 2365 9 view .LVU1681
5389 .LVL462:
2365:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5390 .loc 1 2365 24 is_stmt 0 view .LVU1682
5391 05b4 0126 movs r6, #1
5392 05b6 ECE6 b .L355
5393 .LVL463:
5394 .L365:
1919:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5395 .loc 1 1919 3 discriminator 1 view .LVU1683
5396 05b8 0226 movs r6, #2
5397 05ba EDE6 b .L313
5398 .L409:
5399 .align 2
5400 .L408:
5401 05bc 00200240 .word 1073881088
5402 05c0 00210240 .word 1073881344
ARM GAS /tmp/ccTOAmWG.s page 297
5403 05c4 00230240 .word 1073881856
5404 05c8 000084CB .word -880541696
5405 05cc 0040C0BA .word -1161805824
5406 05d0 0000B8CF .word -810024960
5407 05d4 00000000 .word SystemCoreClock
5408 05d8 632D3E05 .word 87960931
5409 .cfi_endproc
5410 .LFE359:
5412 .section .text.HAL_ADCEx_MultiModeConfigChannel,"ax",%progbits
5413 .align 1
5414 .global HAL_ADCEx_MultiModeConfigChannel
5415 .syntax unified
5416 .thumb
5417 .thumb_func
5419 HAL_ADCEx_MultiModeConfigChannel:
5420 .LVL464:
5421 .LFB360:
2377:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2378:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
2379:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Enable ADC multimode and configure multimode parameters
2380:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Possibility to update parameters on the fly:
2381:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * This function initializes multimode parameters, following
2382:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * calls to this function can be used to reconfigure some parameters
2383:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * of structure "ADC_MultiModeTypeDef" on the fly, without resetting
2384:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * the ADCs.
2385:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * The setting of these parameters is conditioned to ADC state.
2386:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * For parameters constraints, see comments of structure
2387:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * "ADC_MultiModeTypeDef".
2388:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note To move back configuration from multimode to single mode, ADC must
2389:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * be reset (using function HAL_ADC_Init() ).
2390:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc Master ADC handle
2391:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param multimode Structure of ADC multimode configuration
2392:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
2393:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
2394:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *m
2395:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5422 .loc 1 2395 1 is_stmt 1 view -0
5423 .cfi_startproc
5424 @ args = 0, pretend = 0, frame = 104
5425 @ frame_needed = 0, uses_anonymous_args = 0
5426 @ link register save eliminated.
2396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
5427 .loc 1 2396 3 view .LVU1685
2397:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common;
5428 .loc 1 2397 3 view .LVU1686
2398:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave;
5429 .loc 1 2398 3 view .LVU1687
2399:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going;
5430 .loc 1 2399 3 view .LVU1688
2400:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2401:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
2402:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
5431 .loc 1 2402 3 view .LVU1689
2403:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE(multimode->Mode));
5432 .loc 1 2403 3 view .LVU1690
2404:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (multimode->Mode != ADC_MODE_INDEPENDENT)
5433 .loc 1 2404 3 view .LVU1691
ARM GAS /tmp/ccTOAmWG.s page 298
2405:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2406:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_DUAL_DATA_MODE(multimode->DualModeData));
5434 .loc 1 2406 5 view .LVU1692
2407:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
5435 .loc 1 2407 5 view .LVU1693
2408:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2409:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2410:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process locked */
2411:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
5436 .loc 1 2411 3 view .LVU1694
5437 .loc 1 2411 3 view .LVU1695
5438 0000 90F85020 ldrb r2, [r0, #80] @ zero_extendqisi2
5439 0004 012A cmp r2, #1
5440 0006 78D0 beq .L421
2395:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
5441 .loc 1 2395 1 is_stmt 0 view .LVU1696
5442 0008 10B4 push {r4}
5443 .cfi_def_cfa_offset 4
5444 .cfi_offset 4, -4
5445 000a 9BB0 sub sp, sp, #108
5446 .cfi_def_cfa_offset 112
5447 000c 0346 mov r3, r0
5448 .loc 1 2411 3 is_stmt 1 discriminator 2 view .LVU1697
5449 000e 0122 movs r2, #1
5450 0010 80F85020 strb r2, [r0, #80]
5451 .loc 1 2411 3 view .LVU1698
2412:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2413:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave.State = HAL_ADC_STATE_RESET;
5452 .loc 1 2413 3 view .LVU1699
5453 .loc 1 2413 22 is_stmt 0 view .LVU1700
5454 0014 0022 movs r2, #0
5455 0016 1692 str r2, [sp, #88]
2414:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave.ErrorCode = HAL_ADC_ERROR_NONE;
5456 .loc 1 2414 3 is_stmt 1 view .LVU1701
5457 .loc 1 2414 26 is_stmt 0 view .LVU1702
5458 0018 1792 str r2, [sp, #92]
2415:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2416:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
5459 .loc 1 2416 3 is_stmt 1 view .LVU1703
5460 001a 0068 ldr r0, [r0]
5461 .LVL465:
5462 .loc 1 2416 3 is_stmt 0 view .LVU1704
5463 001c 384A ldr r2, .L432
5464 001e 9042 cmp r0, r2
5465 0020 31D0 beq .L430
5466 .loc 1 2416 3 discriminator 2 view .LVU1705
5467 0022 0022 movs r2, #0
5468 0024 0192 str r2, [sp, #4]
5469 .L413:
2417:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2418:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL)
5470 .loc 1 2418 3 is_stmt 1 view .LVU1706
5471 .loc 1 2418 19 is_stmt 0 view .LVU1707
5472 0026 019A ldr r2, [sp, #4]
5473 .loc 1 2418 6 view .LVU1708
5474 0028 002A cmp r2, #0
5475 002a 30D0 beq .L431
ARM GAS /tmp/ccTOAmWG.s page 299
2419:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2420:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
2421:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2422:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2423:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
2424:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
2425:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2426:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return HAL_ERROR;
2427:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2428:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2429:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */
2430:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */
2431:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* conversion on going on regular group: */
2432:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Multimode DATA Format configuration */
2433:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
5476 .loc 1 2433 3 is_stmt 1 view .LVU1709
5477 .LVL466:
5478 .LBB432:
5479 .LBI432:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5480 .loc 2 7073 26 view .LVU1710
5481 .LBB433:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5482 .loc 2 7075 3 view .LVU1711
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5483 .loc 2 7075 12 is_stmt 0 view .LVU1712
5484 002c 9268 ldr r2, [r2, #8]
5485 .LVL467:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5486 .loc 2 7075 74 view .LVU1713
5487 002e 12F00402 ands r2, r2, #4
5488 0032 00D0 beq .L415
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5489 .loc 2 7075 74 discriminator 1 view .LVU1714
5490 0034 0122 movs r2, #1
5491 .L415:
5492 .LVL468:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5493 .loc 2 7075 74 discriminator 1 view .LVU1715
5494 .LBE433:
5495 .LBE432:
2434:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
5496 .loc 1 2434 3 is_stmt 1 view .LVU1716
5497 .LBB434:
5498 .LBI434:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5499 .loc 2 7073 26 view .LVU1717
5500 .LBB435:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5501 .loc 2 7075 3 view .LVU1718
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5502 .loc 2 7075 12 is_stmt 0 view .LVU1719
5503 0036 8068 ldr r0, [r0, #8]
5504 .LVL469:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5505 .loc 2 7075 74 view .LVU1720
5506 0038 10F0040F tst r0, #4
ARM GAS /tmp/ccTOAmWG.s page 300
5507 003c 49D1 bne .L416
5508 .LVL470:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5509 .loc 2 7075 74 view .LVU1721
5510 .LBE435:
5511 .LBE434:
2435:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** && (tmphadcSlave_conversion_on_going == 0UL))
5512 .loc 1 2435 7 view .LVU1722
5513 003e 002A cmp r2, #0
5514 0040 47D1 bne .L416
2436:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2437:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Pointer to the common control register */
2438:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
5515 .loc 1 2438 5 is_stmt 1 view .LVU1723
5516 .LVL471:
2439:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2440:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If multimode is selected, configure all multimode parameters. */
2441:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Otherwise, reset multimode parameters (can be used in case of */
2442:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* transition from multimode to independent mode). */
2443:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (multimode->Mode != ADC_MODE_INDEPENDENT)
5517 .loc 1 2443 5 view .LVU1724
5518 .loc 1 2443 18 is_stmt 0 view .LVU1725
5519 0042 0A68 ldr r2, [r1]
5520 .LVL472:
5521 .loc 1 2443 8 view .LVU1726
5522 0044 62B3 cbz r2, .L417
2444:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2445:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_DAMDF, multimode->DualModeData);
5523 .loc 1 2445 7 is_stmt 1 view .LVU1727
5524 0046 2F48 ldr r0, .L432+4
5525 0048 8268 ldr r2, [r0, #8]
5526 004a 22F44042 bic r2, r2, #49152
5527 004e 4C68 ldr r4, [r1, #4]
5528 0050 2243 orrs r2, r2, r4
5529 0052 8260 str r2, [r0, #8]
2446:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2447:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */
2448:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Multimode mode selection */
2449:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Multimode delay */
2450:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Note: Delay range depends on selected resolution: */
2451:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* from 1 to 9 clock cycles for 16 bits */
2452:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* from 1 to 9 clock cycles for 14 bits, */
2453:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* from 1 to 8 clock cycles for 12 bits */
2454:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* from 1 to 6 clock cycles for 10 and 8 bits */
2455:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If a higher delay is selected, it will be clipped to maximum delay */
2456:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* range */
2457:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2458:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
5530 .loc 1 2458 7 view .LVU1728
5531 .LVL473:
5532 .LBB436:
5533 .LBI436:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5534 .loc 2 6941 26 view .LVU1729
5535 .LBB437:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5536 .loc 2 6943 3 view .LVU1730
ARM GAS /tmp/ccTOAmWG.s page 301
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5537 .loc 2 6943 12 is_stmt 0 view .LVU1731
5538 0054 2A4A ldr r2, .L432
5539 0056 9268 ldr r2, [r2, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5540 .loc 2 6943 68 view .LVU1732
5541 0058 12F00102 ands r2, r2, #1
5542 005c 00D0 beq .L418
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5543 .loc 2 6943 68 discriminator 1 view .LVU1733
5544 005e 0122 movs r2, #1
5545 .L418:
5546 .LVL474:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5547 .loc 2 6943 68 discriminator 1 view .LVU1734
5548 .LBE437:
5549 .LBE436:
5550 .LBB438:
5551 .LBI438:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5552 .loc 2 6941 26 is_stmt 1 view .LVU1735
5553 .LBB439:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5554 .loc 2 6943 3 view .LVU1736
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5555 .loc 2 6943 12 is_stmt 0 view .LVU1737
5556 0060 2948 ldr r0, .L432+8
5557 0062 8068 ldr r0, [r0, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5558 .loc 2 6943 68 view .LVU1738
5559 0064 10F0010F tst r0, #1
5560 0068 3FD1 bne .L422
5561 .LVL475:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5562 .loc 2 6943 68 view .LVU1739
5563 .LBE439:
5564 .LBE438:
5565 .loc 1 2458 10 discriminator 2 view .LVU1740
5566 006a 002A cmp r2, #0
5567 006c 3FD1 bne .L423
2459:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2460:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** MODIFY_REG(tmpADC_Common->CCR,
5568 .loc 1 2460 9 is_stmt 1 view .LVU1741
5569 006e 254C ldr r4, .L432+4
5570 0070 A068 ldr r0, [r4, #8]
5571 0072 A2F57262 sub r2, r2, #3872
5572 0076 0240 ands r2, r2, r0
5573 0078 0868 ldr r0, [r1]
5574 007a 8968 ldr r1, [r1, #8]
5575 .LVL476:
5576 .loc 1 2460 9 is_stmt 0 view .LVU1742
5577 007c 0143 orrs r1, r1, r0
5578 007e 0A43 orrs r2, r2, r1
5579 0080 A260 str r2, [r4, #8]
2396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common;
5580 .loc 1 2396 21 view .LVU1743
5581 0082 0020 movs r0, #0
ARM GAS /tmp/ccTOAmWG.s page 302
5582 0084 2AE0 b .L419
5583 .LVL477:
5584 .L430:
2416:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5585 .loc 1 2416 3 discriminator 1 view .LVU1744
5586 0086 02F58072 add r2, r2, #256
5587 008a 0192 str r2, [sp, #4]
5588 008c CBE7 b .L413
5589 .L431:
2421:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5590 .loc 1 2421 5 is_stmt 1 view .LVU1745
5591 008e 5A6D ldr r2, [r3, #84]
5592 0090 42F02002 orr r2, r2, #32
5593 0094 5A65 str r2, [r3, #84]
2424:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5594 .loc 1 2424 5 view .LVU1746
2424:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5595 .loc 1 2424 5 view .LVU1747
5596 0096 0022 movs r2, #0
5597 0098 83F85020 strb r2, [r3, #80]
2424:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5598 .loc 1 2424 5 view .LVU1748
2426:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5599 .loc 1 2426 5 view .LVU1749
2426:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5600 .loc 1 2426 12 is_stmt 0 view .LVU1750
5601 009c 0120 movs r0, #1
5602 009e 20E0 b .L411
5603 .LVL478:
5604 .L417:
2461:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CCR_DUAL |
2462:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_CCR_DELAY,
2463:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** multimode->Mode |
2464:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** multimode->TwoSamplingDelay
2465:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** );
2466:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2467:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2468:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else /* ADC_MODE_INDEPENDENT */
2469:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2470:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DAMDF);
5605 .loc 1 2470 7 is_stmt 1 view .LVU1751
5606 00a0 1849 ldr r1, .L432+4
5607 .LVL479:
5608 .loc 1 2470 7 is_stmt 0 view .LVU1752
5609 00a2 8A68 ldr r2, [r1, #8]
5610 00a4 22F44042 bic r2, r2, #49152
5611 00a8 8A60 str r2, [r1, #8]
2471:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2472:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */
2473:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Multimode mode selection */
2474:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* - Multimode delay */
2475:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
5612 .loc 1 2475 7 is_stmt 1 view .LVU1753
5613 .LVL480:
5614 .LBB440:
5615 .LBI440:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
ARM GAS /tmp/ccTOAmWG.s page 303
5616 .loc 2 6941 26 view .LVU1754
5617 .LBB441:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5618 .loc 2 6943 3 view .LVU1755
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5619 .loc 2 6943 12 is_stmt 0 view .LVU1756
5620 00aa 154A ldr r2, .L432
5621 00ac 9268 ldr r2, [r2, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5622 .loc 2 6943 68 view .LVU1757
5623 00ae 12F00102 ands r2, r2, #1
5624 00b2 00D0 beq .L420
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5625 .loc 2 6943 68 discriminator 1 view .LVU1758
5626 00b4 0122 movs r2, #1
5627 .L420:
5628 .LVL481:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5629 .loc 2 6943 68 discriminator 1 view .LVU1759
5630 .LBE441:
5631 .LBE440:
5632 .LBB442:
5633 .LBI442:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5634 .loc 2 6941 26 is_stmt 1 view .LVU1760
5635 .LBB443:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5636 .loc 2 6943 3 view .LVU1761
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5637 .loc 2 6943 12 is_stmt 0 view .LVU1762
5638 00b6 1449 ldr r1, .L432+8
5639 00b8 8968 ldr r1, [r1, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5640 .loc 2 6943 68 view .LVU1763
5641 00ba 11F0010F tst r1, #1
5642 00be 18D1 bne .L424
5643 .LVL482:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5644 .loc 2 6943 68 view .LVU1764
5645 .LBE443:
5646 .LBE442:
5647 .loc 1 2475 10 discriminator 2 view .LVU1765
5648 00c0 CAB9 cbnz r2, .L425
2476:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2477:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
5649 .loc 1 2477 9 is_stmt 1 view .LVU1766
5650 00c2 1049 ldr r1, .L432+4
5651 00c4 8868 ldr r0, [r1, #8]
5652 00c6 A2F57262 sub r2, r2, #3872
5653 00ca 0240 ands r2, r2, r0
5654 00cc 8A60 str r2, [r1, #8]
2396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common;
5655 .loc 1 2396 21 is_stmt 0 view .LVU1767
5656 00ce 0020 movs r0, #0
5657 00d0 04E0 b .L419
5658 .LVL483:
5659 .L416:
ARM GAS /tmp/ccTOAmWG.s page 304
2478:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2479:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2480:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2481:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* If one of the ADC sharing the same common group is enabled, no update */
2482:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* could be done on neither of the multimode structure parameters. */
2483:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2484:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2485:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update ADC state machine to error */
2486:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
5660 .loc 1 2486 5 is_stmt 1 view .LVU1768
5661 00d2 5A6D ldr r2, [r3, #84]
5662 .LVL484:
5663 .loc 1 2486 5 is_stmt 0 view .LVU1769
5664 00d4 42F02002 orr r2, r2, #32
5665 00d8 5A65 str r2, [r3, #84]
2487:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2488:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
5666 .loc 1 2488 5 is_stmt 1 view .LVU1770
5667 .LVL485:
5668 .loc 1 2488 20 is_stmt 0 view .LVU1771
5669 00da 0120 movs r0, #1
5670 .LVL486:
5671 .L419:
2489:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2490:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2491:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Process unlocked */
2492:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc);
5672 .loc 1 2492 3 is_stmt 1 view .LVU1772
5673 .loc 1 2492 3 view .LVU1773
5674 00dc 0022 movs r2, #0
5675 00de 83F85020 strb r2, [r3, #80]
5676 .loc 1 2492 3 view .LVU1774
2493:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2494:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Return function status */
2495:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
5677 .loc 1 2495 3 view .LVU1775
5678 .LVL487:
5679 .L411:
2496:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5680 .loc 1 2496 1 is_stmt 0 view .LVU1776
5681 00e2 1BB0 add sp, sp, #108
5682 .cfi_remember_state
5683 .cfi_def_cfa_offset 4
5684 @ sp needed
5685 00e4 5DF8044B ldr r4, [sp], #4
5686 .cfi_restore 4
5687 .cfi_def_cfa_offset 0
5688 00e8 7047 bx lr
5689 .LVL488:
5690 .L422:
5691 .cfi_restore_state
2396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common;
5692 .loc 1 2396 21 view .LVU1777
5693 00ea 0020 movs r0, #0
5694 00ec F6E7 b .L419
5695 .LVL489:
5696 .L423:
ARM GAS /tmp/ccTOAmWG.s page 305
2396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common;
5697 .loc 1 2396 21 view .LVU1778
5698 00ee 0020 movs r0, #0
5699 00f0 F4E7 b .L419
5700 .LVL490:
5701 .L424:
2396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common;
5702 .loc 1 2396 21 view .LVU1779
5703 00f2 0020 movs r0, #0
5704 00f4 F2E7 b .L419
5705 .LVL491:
5706 .L425:
2396:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common;
5707 .loc 1 2396 21 view .LVU1780
5708 00f6 0020 movs r0, #0
5709 00f8 F0E7 b .L419
5710 .LVL492:
5711 .L421:
5712 .cfi_def_cfa_offset 0
5713 .cfi_restore 4
2411:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
5714 .loc 1 2411 3 discriminator 1 view .LVU1781
5715 00fa 0220 movs r0, #2
5716 .LVL493:
5717 .loc 1 2496 1 view .LVU1782
5718 00fc 7047 bx lr
5719 .L433:
5720 00fe 00BF .align 2
5721 .L432:
5722 0100 00200240 .word 1073881088
5723 0104 00230240 .word 1073881856
5724 0108 00210240 .word 1073881344
5725 .cfi_endproc
5726 .LFE360:
5728 .section .text.HAL_ADCEx_EnableInjectedQueue,"ax",%progbits
5729 .align 1
5730 .global HAL_ADCEx_EnableInjectedQueue
5731 .syntax unified
5732 .thumb
5733 .thumb_func
5735 HAL_ADCEx_EnableInjectedQueue:
5736 .LVL494:
5737 .LFB361:
2497:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2498:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
2499:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Enable Injected Queue
2500:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note This function resets CFGR register JQDIS bit in order to enable the
2501:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2502:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * are both equal to 0 to ensure that no regular nor injected
2503:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * conversion is ongoing.
2504:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
2505:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
2506:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
2507:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef *hadc)
2508:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5738 .loc 1 2508 1 is_stmt 1 view -0
5739 .cfi_startproc
ARM GAS /tmp/ccTOAmWG.s page 306
5740 @ args = 0, pretend = 0, frame = 0
5741 @ frame_needed = 0, uses_anonymous_args = 0
5742 @ link register save eliminated.
2509:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
5743 .loc 1 2509 3 view .LVU1784
2510:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular;
5744 .loc 1 2510 3 view .LVU1785
2511:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected;
5745 .loc 1 2511 3 view .LVU1786
2512:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2513:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
2514:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
5746 .loc 1 2514 3 view .LVU1787
2515:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2516:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
5747 .loc 1 2516 3 view .LVU1788
5748 .loc 1 2516 79 is_stmt 0 view .LVU1789
5749 0000 0268 ldr r2, [r0]
5750 .LVL495:
5751 .LBB444:
5752 .LBI444:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5753 .loc 2 7073 26 is_stmt 1 view .LVU1790
5754 .LBB445:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5755 .loc 2 7075 3 view .LVU1791
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5756 .loc 2 7075 12 is_stmt 0 view .LVU1792
5757 0002 9368 ldr r3, [r2, #8]
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5758 .loc 2 7075 74 view .LVU1793
5759 0004 13F00403 ands r3, r3, #4
5760 0008 00D0 beq .L435
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5761 .loc 2 7075 74 discriminator 1 view .LVU1794
5762 000a 0123 movs r3, #1
5763 .L435:
5764 .LVL496:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5765 .loc 2 7075 74 discriminator 1 view .LVU1795
5766 .LBE445:
5767 .LBE444:
2517:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
5768 .loc 1 2517 3 is_stmt 1 view .LVU1796
5769 .LBB446:
5770 .LBI446:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5771 .loc 2 7268 26 view .LVU1797
5772 .LBB447:
5773 .loc 2 7270 3 view .LVU1798
5774 .loc 2 7270 12 is_stmt 0 view .LVU1799
5775 000c 9168 ldr r1, [r2, #8]
5776 .loc 2 7270 76 view .LVU1800
5777 000e 11F0080F tst r1, #8
5778 0012 0AD1 bne .L437
5779 .LVL497:
5780 .loc 2 7270 76 view .LVU1801
ARM GAS /tmp/ccTOAmWG.s page 307
5781 .LBE447:
5782 .LBE446:
2518:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2519:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameter can be set only if no conversion is on-going */
2520:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL)
5783 .loc 1 2520 3 is_stmt 1 view .LVU1802
5784 .loc 1 2520 6 is_stmt 0 view .LVU1803
5785 0014 5BB9 cbnz r3, .L438
2521:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL)
2522:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
2523:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2524:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
5786 .loc 1 2524 5 is_stmt 1 view .LVU1804
5787 0016 D368 ldr r3, [r2, #12]
5788 .LVL498:
5789 .loc 1 2524 5 is_stmt 0 view .LVU1805
5790 0018 23F00043 bic r3, r3, #-2147483648
5791 001c D360 str r3, [r2, #12]
2525:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2526:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Update state, clear previous result related to injected queue overflow */
2527:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF);
5792 .loc 1 2527 5 is_stmt 1 view .LVU1806
5793 001e 436D ldr r3, [r0, #84]
5794 0020 23F48043 bic r3, r3, #16384
5795 0024 4365 str r3, [r0, #84]
2528:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2529:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK;
5796 .loc 1 2529 5 view .LVU1807
5797 .LVL499:
5798 .loc 1 2529 20 is_stmt 0 view .LVU1808
5799 0026 0020 movs r0, #0
5800 .LVL500:
5801 .loc 1 2529 20 view .LVU1809
5802 0028 7047 bx lr
5803 .LVL501:
5804 .L437:
2530:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2531:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2532:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2533:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
5805 .loc 1 2533 20 view .LVU1810
5806 002a 0120 movs r0, #1
5807 .LVL502:
5808 .loc 1 2533 20 view .LVU1811
5809 002c 7047 bx lr
5810 .LVL503:
5811 .L438:
5812 .loc 1 2533 20 view .LVU1812
5813 002e 0120 movs r0, #1
5814 .LVL504:
2534:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2535:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2536:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
5815 .loc 1 2536 3 is_stmt 1 view .LVU1813
2537:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5816 .loc 1 2537 1 is_stmt 0 view .LVU1814
5817 0030 7047 bx lr
ARM GAS /tmp/ccTOAmWG.s page 308
5818 .cfi_endproc
5819 .LFE361:
5821 .section .text.HAL_ADCEx_DisableInjectedQueue,"ax",%progbits
5822 .align 1
5823 .global HAL_ADCEx_DisableInjectedQueue
5824 .syntax unified
5825 .thumb
5826 .thumb_func
5828 HAL_ADCEx_DisableInjectedQueue:
5829 .LVL505:
5830 .LFB362:
2538:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2539:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
2540:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Disable Injected Queue
2541:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note This function sets CFGR register JQDIS bit in order to disable the
2542:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2543:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * are both equal to 0 to ensure that no regular nor injected
2544:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * conversion is ongoing.
2545:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
2546:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
2547:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
2548:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef *hadc)
2549:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5831 .loc 1 2549 1 is_stmt 1 view -0
5832 .cfi_startproc
5833 @ args = 0, pretend = 0, frame = 0
5834 @ frame_needed = 0, uses_anonymous_args = 0
5835 @ link register save eliminated.
2550:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
5836 .loc 1 2550 3 view .LVU1816
2551:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular;
5837 .loc 1 2551 3 view .LVU1817
2552:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected;
5838 .loc 1 2552 3 view .LVU1818
2553:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2554:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
2555:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
5839 .loc 1 2555 3 view .LVU1819
2556:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2557:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
5840 .loc 1 2557 3 view .LVU1820
5841 .loc 1 2557 79 is_stmt 0 view .LVU1821
5842 0000 0268 ldr r2, [r0]
5843 .LVL506:
5844 .LBB448:
5845 .LBI448:
7073:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5846 .loc 2 7073 26 is_stmt 1 view .LVU1822
5847 .LBB449:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5848 .loc 2 7075 3 view .LVU1823
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5849 .loc 2 7075 12 is_stmt 0 view .LVU1824
5850 0002 9368 ldr r3, [r2, #8]
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5851 .loc 2 7075 74 view .LVU1825
5852 0004 13F00403 ands r3, r3, #4
ARM GAS /tmp/ccTOAmWG.s page 309
5853 0008 00D0 beq .L440
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5854 .loc 2 7075 74 discriminator 1 view .LVU1826
5855 000a 0123 movs r3, #1
5856 .L440:
5857 .LVL507:
7075:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5858 .loc 2 7075 74 discriminator 1 view .LVU1827
5859 .LBE449:
5860 .LBE448:
2558:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
5861 .loc 1 2558 3 is_stmt 1 view .LVU1828
5862 .LBB450:
5863 .LBI450:
7268:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5864 .loc 2 7268 26 view .LVU1829
5865 .LBB451:
5866 .loc 2 7270 3 view .LVU1830
5867 .loc 2 7270 12 is_stmt 0 view .LVU1831
5868 000c 9168 ldr r1, [r2, #8]
5869 .loc 2 7270 76 view .LVU1832
5870 000e 11F0080F tst r1, #8
5871 0012 08D1 bne .L442
5872 .LVL508:
5873 .loc 2 7270 76 view .LVU1833
5874 .LBE451:
5875 .LBE450:
2559:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2560:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Parameter can be set only if no conversion is on-going */
2561:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL)
5876 .loc 1 2561 3 is_stmt 1 view .LVU1834
5877 .loc 1 2561 6 is_stmt 0 view .LVU1835
5878 0014 4BB9 cbnz r3, .L443
2562:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL)
2563:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** )
2564:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2565:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE);
5879 .loc 1 2565 5 is_stmt 1 view .LVU1836
5880 .LVL509:
5881 .LBB452:
5882 .LBI452:
5063:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5883 .loc 2 5063 22 view .LVU1837
5884 .LBB453:
5065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5885 .loc 2 5065 3 view .LVU1838
5886 0016 D168 ldr r1, [r2, #12]
5887 0018 054B ldr r3, .L444
5888 .LVL510:
5065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5889 .loc 2 5065 3 is_stmt 0 view .LVU1839
5890 001a 0B40 ands r3, r3, r1
5891 001c 43F00043 orr r3, r3, #-2147483648
5892 0020 D360 str r3, [r2, #12]
5893 .LVL511:
5065:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5894 .loc 2 5065 3 view .LVU1840
ARM GAS /tmp/ccTOAmWG.s page 310
5895 .LBE453:
5896 .LBE452:
2566:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK;
5897 .loc 1 2566 5 is_stmt 1 view .LVU1841
5898 .loc 1 2566 20 is_stmt 0 view .LVU1842
5899 0022 0020 movs r0, #0
5900 .LVL512:
5901 .loc 1 2566 20 view .LVU1843
5902 0024 7047 bx lr
5903 .LVL513:
5904 .L442:
2567:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2568:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2569:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2570:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
5905 .loc 1 2570 20 view .LVU1844
5906 0026 0120 movs r0, #1
5907 .LVL514:
5908 .loc 1 2570 20 view .LVU1845
5909 0028 7047 bx lr
5910 .LVL515:
5911 .L443:
5912 .loc 1 2570 20 view .LVU1846
5913 002a 0120 movs r0, #1
5914 .LVL516:
2571:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2572:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2573:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
5915 .loc 1 2573 3 is_stmt 1 view .LVU1847
2574:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5916 .loc 1 2574 1 is_stmt 0 view .LVU1848
5917 002c 7047 bx lr
5918 .L445:
5919 002e 00BF .align 2
5920 .L444:
5921 0030 FFFFDF7F .word 2145386495
5922 .cfi_endproc
5923 .LFE362:
5925 .section .text.HAL_ADCEx_DisableVoltageRegulator,"ax",%progbits
5926 .align 1
5927 .global HAL_ADCEx_DisableVoltageRegulator
5928 .syntax unified
5929 .thumb
5930 .thumb_func
5932 HAL_ADCEx_DisableVoltageRegulator:
5933 .LVL517:
5934 .LFB363:
2575:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2576:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
2577:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Disable ADC voltage regulator.
2578:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Disabling voltage regulator allows to save power. This operation can
2579:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * be carried out only when ADC is disabled.
2580:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note To enable again the voltage regulator, the user is expected to
2581:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * resort to HAL_ADC_Init() API.
2582:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
2583:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
2584:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
ARM GAS /tmp/ccTOAmWG.s page 311
2585:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc)
2586:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
5935 .loc 1 2586 1 is_stmt 1 view -0
5936 .cfi_startproc
5937 @ args = 0, pretend = 0, frame = 0
5938 @ frame_needed = 0, uses_anonymous_args = 0
5939 @ link register save eliminated.
2587:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
5940 .loc 1 2587 3 view .LVU1850
2588:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2589:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
2590:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
5941 .loc 1 2590 3 view .LVU1851
2591:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2592:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2593:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
5942 .loc 1 2593 3 view .LVU1852
5943 .loc 1 2593 28 is_stmt 0 view .LVU1853
5944 0000 0368 ldr r3, [r0]
5945 .LVL518:
5946 .LBB454:
5947 .LBI454:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5948 .loc 2 6941 26 is_stmt 1 view .LVU1854
5949 .LBB455:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5950 .loc 2 6943 3 view .LVU1855
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5951 .loc 2 6943 12 is_stmt 0 view .LVU1856
5952 0002 9A68 ldr r2, [r3, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5953 .loc 2 6943 68 view .LVU1857
5954 0004 12F0010F tst r2, #1
5955 0008 05D1 bne .L448
5956 .LVL519:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5957 .loc 2 6943 68 view .LVU1858
5958 .LBE455:
5959 .LBE454:
2594:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2595:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_DisableInternalRegulator(hadc->Instance);
5960 .loc 1 2595 5 is_stmt 1 view .LVU1859
5961 .LBB456:
5962 .LBI456:
6870:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
5963 .loc 2 6870 22 view .LVU1860
5964 .LBB457:
6872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5965 .loc 2 6872 3 view .LVU1861
5966 000a 9968 ldr r1, [r3, #8]
5967 000c 034A ldr r2, .L449
5968 000e 0A40 ands r2, r2, r1
5969 0010 9A60 str r2, [r3, #8]
5970 .LVL520:
6872:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
5971 .loc 2 6872 3 is_stmt 0 view .LVU1862
5972 .LBE457:
ARM GAS /tmp/ccTOAmWG.s page 312
5973 .LBE456:
2596:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK;
5974 .loc 1 2596 5 is_stmt 1 view .LVU1863
5975 .loc 1 2596 20 is_stmt 0 view .LVU1864
5976 0012 0020 movs r0, #0
5977 .LVL521:
5978 .loc 1 2596 20 view .LVU1865
5979 0014 7047 bx lr
5980 .LVL522:
5981 .L448:
2597:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2598:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2599:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2600:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
5982 .loc 1 2600 20 view .LVU1866
5983 0016 0120 movs r0, #1
5984 .LVL523:
2601:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2602:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2603:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
5985 .loc 1 2603 3 is_stmt 1 view .LVU1867
2604:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
5986 .loc 1 2604 1 is_stmt 0 view .LVU1868
5987 0018 7047 bx lr
5988 .L450:
5989 001a 00BF .align 2
5990 .L449:
5991 001c C0FFFF6F .word 1879048128
5992 .cfi_endproc
5993 .LFE363:
5995 .section .text.HAL_ADCEx_EnterADCDeepPowerDownMode,"ax",%progbits
5996 .align 1
5997 .global HAL_ADCEx_EnterADCDeepPowerDownMode
5998 .syntax unified
5999 .thumb
6000 .thumb_func
6002 HAL_ADCEx_EnterADCDeepPowerDownMode:
6003 .LVL524:
6004 .LFB364:
2605:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2606:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /**
2607:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @brief Enter ADC deep-power-down mode
2608:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note This mode is achieved in setting DEEPPWD bit and allows to save power
2609:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * in reducing leakage currents. It is particularly interesting before
2610:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * entering stop modes.
2611:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
2612:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * ADC voltage regulator. This means that this API encompasses
2613:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
2614:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * calibration is lost.
2615:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @note To exit the ADC deep-power-down mode, the user is expected to
2616:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * resort to HAL_ADC_Init() API as well as to relaunch a calibration
2617:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
2618:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * saved calibration factor.
2619:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @param hadc ADC handle
2620:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** * @retval HAL status
2621:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** */
2622:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc)
ARM GAS /tmp/ccTOAmWG.s page 313
2623:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
6005 .loc 1 2623 1 is_stmt 1 view -0
6006 .cfi_startproc
6007 @ args = 0, pretend = 0, frame = 0
6008 @ frame_needed = 0, uses_anonymous_args = 0
6009 @ link register save eliminated.
2624:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status;
6010 .loc 1 2624 3 view .LVU1870
2625:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2626:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Check the parameters */
2627:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
6011 .loc 1 2627 3 view .LVU1871
2628:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2629:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2630:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
6012 .loc 1 2630 3 view .LVU1872
6013 .loc 1 2630 28 is_stmt 0 view .LVU1873
6014 0000 0368 ldr r3, [r0]
6015 .LVL525:
6016 .LBB458:
6017 .LBI458:
6941:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6018 .loc 2 6941 26 is_stmt 1 view .LVU1874
6019 .LBB459:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6020 .loc 2 6943 3 view .LVU1875
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6021 .loc 2 6943 12 is_stmt 0 view .LVU1876
6022 0002 9A68 ldr r2, [r3, #8]
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6023 .loc 2 6943 68 view .LVU1877
6024 0004 12F0010F tst r2, #1
6025 0008 07D1 bne .L453
6026 .LVL526:
6943:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** }
6027 .loc 2 6943 68 view .LVU1878
6028 .LBE459:
6029 .LBE458:
2631:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2632:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** LL_ADC_EnableDeepPowerDown(hadc->Instance);
6030 .loc 1 2632 5 is_stmt 1 view .LVU1879
6031 .LBB460:
6032 .LBI460:
6795:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** {
6033 .loc 2 6795 22 view .LVU1880
6034 .LBB461:
6800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
6035 .loc 2 6800 3 view .LVU1881
6036 000a 9968 ldr r1, [r3, #8]
6037 000c 044A ldr r2, .L454
6038 000e 0A40 ands r2, r2, r1
6039 0010 42F00052 orr r2, r2, #536870912
6040 0014 9A60 str r2, [r3, #8]
6041 .LVL527:
6800:Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS,
6042 .loc 2 6800 3 is_stmt 0 view .LVU1882
6043 .LBE461:
ARM GAS /tmp/ccTOAmWG.s page 314
6044 .LBE460:
2633:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK;
6045 .loc 1 2633 5 is_stmt 1 view .LVU1883
6046 .loc 1 2633 20 is_stmt 0 view .LVU1884
6047 0016 0020 movs r0, #0
6048 .LVL528:
6049 .loc 1 2633 20 view .LVU1885
6050 0018 7047 bx lr
6051 .LVL529:
6052 .L453:
2634:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2635:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** else
2636:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** {
2637:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR;
6053 .loc 1 2637 20 view .LVU1886
6054 001a 0120 movs r0, #1
6055 .LVL530:
2638:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
2639:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c ****
2640:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** return tmp_hal_status;
6056 .loc 1 2640 3 is_stmt 1 view .LVU1887
2641:Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c **** }
6057 .loc 1 2641 1 is_stmt 0 view .LVU1888
6058 001c 7047 bx lr
6059 .L455:
6060 001e 00BF .align 2
6061 .L454:
6062 0020 C0FFFF5F .word 1610612672
6063 .cfi_endproc
6064 .LFE364:
6066 .text
6067 .Letext0:
6068 .file 4 "/home/k/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-ea
6069 .file 5 "/home/k/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-ea
6070 .file 6 "Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7a3xx.h"
6071 .file 7 "Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h"
6072 .file 8 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h"
6073 .file 9 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h"
6074 .file 10 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_adc.h"
6075 .file 11 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_adc_ex.h"
6076 .file 12 "Drivers/CMSIS/Device/ST/STM32H7xx/Include/system_stm32h7xx.h"
6077 .file 13 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h"
ARM GAS /tmp/ccTOAmWG.s page 315
DEFINED SYMBOLS
*ABS*:00000000 stm32h7xx_hal_adc_ex.c
/tmp/ccTOAmWG.s:20 .text.LL_ADC_SetCalibrationOffsetFactor:00000000 $t
/tmp/ccTOAmWG.s:25 .text.LL_ADC_SetCalibrationOffsetFactor:00000000 LL_ADC_SetCalibrationOffsetFactor
/tmp/ccTOAmWG.s:53 .text.LL_ADC_SetCalibrationLinearFactor:00000000 $t
/tmp/ccTOAmWG.s:58 .text.LL_ADC_SetCalibrationLinearFactor:00000000 LL_ADC_SetCalibrationLinearFactor
/tmp/ccTOAmWG.s:103 .text.LL_ADC_SetCalibrationLinearFactor:00000028 $d
/tmp/ccTOAmWG.s:108 .text.LL_ADC_GetCalibrationLinearFactor:00000000 $t
/tmp/ccTOAmWG.s:113 .text.LL_ADC_GetCalibrationLinearFactor:00000000 LL_ADC_GetCalibrationLinearFactor
/tmp/ccTOAmWG.s:157 .text.LL_ADC_GetCalibrationLinearFactor:00000020 $d
/tmp/ccTOAmWG.s:162 .text.LL_ADC_SetChannelSamplingTime:00000000 $t
/tmp/ccTOAmWG.s:167 .text.LL_ADC_SetChannelSamplingTime:00000000 LL_ADC_SetChannelSamplingTime
/tmp/ccTOAmWG.s:210 .text.LL_ADC_SetChannelPreselection:00000000 $t
/tmp/ccTOAmWG.s:215 .text.LL_ADC_SetChannelPreselection:00000000 LL_ADC_SetChannelPreselection
/tmp/ccTOAmWG.s:298 .text.HAL_ADCEx_Calibration_Start:00000000 $t
/tmp/ccTOAmWG.s:304 .text.HAL_ADCEx_Calibration_Start:00000000 HAL_ADCEx_Calibration_Start
/tmp/ccTOAmWG.s:468 .text.HAL_ADCEx_Calibration_Start:0000009c $d
/tmp/ccTOAmWG.s:475 .text.HAL_ADCEx_Calibration_GetValue:00000000 $t
/tmp/ccTOAmWG.s:481 .text.HAL_ADCEx_Calibration_GetValue:00000000 HAL_ADCEx_Calibration_GetValue
/tmp/ccTOAmWG.s:522 .text.HAL_ADCEx_LinearCalibration_GetValue:00000000 $t
/tmp/ccTOAmWG.s:528 .text.HAL_ADCEx_LinearCalibration_GetValue:00000000 HAL_ADCEx_LinearCalibration_GetValue
/tmp/ccTOAmWG.s:686 .text.HAL_ADCEx_LinearCalibration_GetValue:0000007c $d
/tmp/ccTOAmWG.s:691 .text.HAL_ADCEx_Calibration_SetValue:00000000 $t
/tmp/ccTOAmWG.s:697 .text.HAL_ADCEx_Calibration_SetValue:00000000 HAL_ADCEx_Calibration_SetValue
/tmp/ccTOAmWG.s:832 .text.HAL_ADCEx_LinearCalibration_SetValue:00000000 $t
/tmp/ccTOAmWG.s:838 .text.HAL_ADCEx_LinearCalibration_SetValue:00000000 HAL_ADCEx_LinearCalibration_SetValue
/tmp/ccTOAmWG.s:1116 .text.HAL_ADCEx_LinearCalibration_SetValue:00000110 $d
/tmp/ccTOAmWG.s:1123 .text.HAL_ADCEx_LinearCalibration_FactorLoad:00000000 $t
/tmp/ccTOAmWG.s:1129 .text.HAL_ADCEx_LinearCalibration_FactorLoad:00000000 HAL_ADCEx_LinearCalibration_FactorLoad
/tmp/ccTOAmWG.s:1216 .text.HAL_ADCEx_LinearCalibration_FactorLoad:00000054 $d
/tmp/ccTOAmWG.s:1222 .text.HAL_ADCEx_InjectedStart:00000000 $t
/tmp/ccTOAmWG.s:1228 .text.HAL_ADCEx_InjectedStart:00000000 HAL_ADCEx_InjectedStart
/tmp/ccTOAmWG.s:1474 .text.HAL_ADCEx_InjectedStart:000000e8 $d
/tmp/ccTOAmWG.s:1482 .text.HAL_ADCEx_InjectedStop:00000000 $t
/tmp/ccTOAmWG.s:1488 .text.HAL_ADCEx_InjectedStop:00000000 HAL_ADCEx_InjectedStop
/tmp/ccTOAmWG.s:1585 .text.HAL_ADCEx_InjectedStop:00000050 $d
/tmp/ccTOAmWG.s:1590 .text.HAL_ADCEx_InjectedPollForConversion:00000000 $t
/tmp/ccTOAmWG.s:1596 .text.HAL_ADCEx_InjectedPollForConversion:00000000 HAL_ADCEx_InjectedPollForConversion
/tmp/ccTOAmWG.s:1884 .text.HAL_ADCEx_InjectedPollForConversion:000000fc $d
/tmp/ccTOAmWG.s:1890 .text.HAL_ADCEx_InjectedStart_IT:00000000 $t
/tmp/ccTOAmWG.s:1896 .text.HAL_ADCEx_InjectedStart_IT:00000000 HAL_ADCEx_InjectedStart_IT
/tmp/ccTOAmWG.s:2186 .text.HAL_ADCEx_InjectedStart_IT:0000012c $d
/tmp/ccTOAmWG.s:2194 .text.HAL_ADCEx_InjectedStop_IT:00000000 $t
/tmp/ccTOAmWG.s:2200 .text.HAL_ADCEx_InjectedStop_IT:00000000 HAL_ADCEx_InjectedStop_IT
/tmp/ccTOAmWG.s:2302 .text.HAL_ADCEx_InjectedStop_IT:0000005c $d
/tmp/ccTOAmWG.s:2307 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 $t
/tmp/ccTOAmWG.s:2313 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 HAL_ADCEx_MultiModeStart_DMA
/tmp/ccTOAmWG.s:2589 .text.HAL_ADCEx_MultiModeStart_DMA:00000108 $d
/tmp/ccTOAmWG.s:2601 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 $t
/tmp/ccTOAmWG.s:2607 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 HAL_ADCEx_MultiModeStop_DMA
/tmp/ccTOAmWG.s:2933 .text.HAL_ADCEx_MultiModeStop_DMA:00000110 $d
/tmp/ccTOAmWG.s:2939 .text.HAL_ADCEx_MultiModeGetValue:00000000 $t
/tmp/ccTOAmWG.s:2945 .text.HAL_ADCEx_MultiModeGetValue:00000000 HAL_ADCEx_MultiModeGetValue
/tmp/ccTOAmWG.s:2967 .text.HAL_ADCEx_MultiModeGetValue:00000008 $d
/tmp/ccTOAmWG.s:2972 .text.HAL_ADCEx_InjectedGetValue:00000000 $t
/tmp/ccTOAmWG.s:2978 .text.HAL_ADCEx_InjectedGetValue:00000000 HAL_ADCEx_InjectedGetValue
/tmp/ccTOAmWG.s:3043 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 $t
ARM GAS /tmp/ccTOAmWG.s page 316
/tmp/ccTOAmWG.s:3049 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 HAL_ADCEx_InjectedConvCpltCallback
/tmp/ccTOAmWG.s:3064 .text.HAL_ADCEx_InjectedQueueOverflowCallback:00000000 $t
/tmp/ccTOAmWG.s:3070 .text.HAL_ADCEx_InjectedQueueOverflowCallback:00000000 HAL_ADCEx_InjectedQueueOverflowCallback
/tmp/ccTOAmWG.s:3085 .text.HAL_ADCEx_LevelOutOfWindow2Callback:00000000 $t
/tmp/ccTOAmWG.s:3091 .text.HAL_ADCEx_LevelOutOfWindow2Callback:00000000 HAL_ADCEx_LevelOutOfWindow2Callback
/tmp/ccTOAmWG.s:3106 .text.HAL_ADCEx_LevelOutOfWindow3Callback:00000000 $t
/tmp/ccTOAmWG.s:3112 .text.HAL_ADCEx_LevelOutOfWindow3Callback:00000000 HAL_ADCEx_LevelOutOfWindow3Callback
/tmp/ccTOAmWG.s:3127 .text.HAL_ADCEx_EndOfSamplingCallback:00000000 $t
/tmp/ccTOAmWG.s:3133 .text.HAL_ADCEx_EndOfSamplingCallback:00000000 HAL_ADCEx_EndOfSamplingCallback
/tmp/ccTOAmWG.s:3148 .text.HAL_ADCEx_RegularStop:00000000 $t
/tmp/ccTOAmWG.s:3154 .text.HAL_ADCEx_RegularStop:00000000 HAL_ADCEx_RegularStop
/tmp/ccTOAmWG.s:3254 .text.HAL_ADCEx_RegularStop:00000058 $d
/tmp/ccTOAmWG.s:3259 .text.HAL_ADCEx_RegularStop_IT:00000000 $t
/tmp/ccTOAmWG.s:3265 .text.HAL_ADCEx_RegularStop_IT:00000000 HAL_ADCEx_RegularStop_IT
/tmp/ccTOAmWG.s:3370 .text.HAL_ADCEx_RegularStop_IT:00000060 $d
/tmp/ccTOAmWG.s:3375 .text.HAL_ADCEx_RegularStop_DMA:00000000 $t
/tmp/ccTOAmWG.s:3381 .text.HAL_ADCEx_RegularStop_DMA:00000000 HAL_ADCEx_RegularStop_DMA
/tmp/ccTOAmWG.s:3528 .text.HAL_ADCEx_RegularStop_DMA:00000090 $d
/tmp/ccTOAmWG.s:3533 .text.HAL_ADCEx_RegularMultiModeStop_DMA:00000000 $t
/tmp/ccTOAmWG.s:3539 .text.HAL_ADCEx_RegularMultiModeStop_DMA:00000000 HAL_ADCEx_RegularMultiModeStop_DMA
/tmp/ccTOAmWG.s:3894 .text.HAL_ADCEx_RegularMultiModeStop_DMA:00000118 $d
/tmp/ccTOAmWG.s:3900 .text.HAL_ADCEx_InjectedConfigChannel:00000000 $t
/tmp/ccTOAmWG.s:3906 .text.HAL_ADCEx_InjectedConfigChannel:00000000 HAL_ADCEx_InjectedConfigChannel
/tmp/ccTOAmWG.s:5167 .text.HAL_ADCEx_InjectedConfigChannel:00000498 $d
/tmp/ccTOAmWG.s:5197 .text.HAL_ADCEx_InjectedConfigChannel:000004ec $t
/tmp/ccTOAmWG.s:5401 .text.HAL_ADCEx_InjectedConfigChannel:000005bc $d
/tmp/ccTOAmWG.s:5413 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 $t
/tmp/ccTOAmWG.s:5419 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 HAL_ADCEx_MultiModeConfigChannel
/tmp/ccTOAmWG.s:5722 .text.HAL_ADCEx_MultiModeConfigChannel:00000100 $d
/tmp/ccTOAmWG.s:5729 .text.HAL_ADCEx_EnableInjectedQueue:00000000 $t
/tmp/ccTOAmWG.s:5735 .text.HAL_ADCEx_EnableInjectedQueue:00000000 HAL_ADCEx_EnableInjectedQueue
/tmp/ccTOAmWG.s:5822 .text.HAL_ADCEx_DisableInjectedQueue:00000000 $t
/tmp/ccTOAmWG.s:5828 .text.HAL_ADCEx_DisableInjectedQueue:00000000 HAL_ADCEx_DisableInjectedQueue
/tmp/ccTOAmWG.s:5921 .text.HAL_ADCEx_DisableInjectedQueue:00000030 $d
/tmp/ccTOAmWG.s:5926 .text.HAL_ADCEx_DisableVoltageRegulator:00000000 $t
/tmp/ccTOAmWG.s:5932 .text.HAL_ADCEx_DisableVoltageRegulator:00000000 HAL_ADCEx_DisableVoltageRegulator
/tmp/ccTOAmWG.s:5991 .text.HAL_ADCEx_DisableVoltageRegulator:0000001c $d
/tmp/ccTOAmWG.s:5996 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:00000000 $t
/tmp/ccTOAmWG.s:6002 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:00000000 HAL_ADCEx_EnterADCDeepPowerDownMode
/tmp/ccTOAmWG.s:6062 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:00000020 $d
UNDEFINED SYMBOLS
ADC_Disable
ADC_Enable
SystemCoreClock
ADC_ConversionStop
HAL_GetTick
HAL_DMA_Start_IT
ADC_DMAConvCplt
ADC_DMAHalfConvCplt
ADC_DMAError
HAL_DMA_Abort
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