CAN bus bringup (everything works except PWM output)

Add PWM control functionality
Add CAN send logic and DIO mapping
2025-04-24 20:38:24 +02:00 · 2025-04-20 17:30:52 +02:00 · 2025-03-30 11:14:16 +02:00 · 2025-03-29 15:45:20 +01:00 · 2025-03-29 12:57:28 +01:00 · 2025-03-29 12:56:06 +01:00
10 changed files with 488 additions and 118 deletions
--- a/Software/.mxproject
+++ b/Software/.mxproject
--- a/Software/Core/Inc/adc.h
+++ b/Software/Core/Inc/adc.h
@ -35,7 +35,7 @@ extern "C" {
 extern ADC_HandleTypeDef hadc1;

 /* USER CODE BEGIN Private defines */
-
+#define NUM_ADC_PINS 16
 /* USER CODE END Private defines */

 void MX_ADC1_Init(void);
--- a/Software/Core/Inc/main.h
+++ b/Software/Core/Inc/main.h
@ -127,10 +127,10 @@ void Error_Handler(void);
 #define D6_GPIO_Port GPIOB
 #define PWM2_1_Pin GPIO_PIN_5
 #define PWM2_1_GPIO_Port GPIOB
-#define PWM3_2_Pin GPIO_PIN_6
+#define PWM3_1_Pin GPIO_PIN_6
+#define PWM3_1_GPIO_Port GPIOB
+#define PWM3_2_Pin GPIO_PIN_7
 #define PWM3_2_GPIO_Port GPIOB
-#define PWM3_2B7_Pin GPIO_PIN_7
-#define PWM3_2B7_GPIO_Port GPIOB

 /* USER CODE BEGIN Private defines */

--- a/Software/Core/Inc/mappings.h
+++ b/Software/Core/Inc/mappings.h
@ -1,95 +1,205 @@
 #ifndef MAPPINGS_H
 #define MAPPINGS_H

-#define CURRENT_NODE FRONT_NODE
+// CHOOSE ONE, comment the other or comment both and use -D SN_FRONT
+//#define SN_FRONT
+#define SN_REAR

-#define IGRID_L1      1
-#define IGRID_L2      2
-#define IGRID_L3      3
-#define IGRID_L4      4
-#define IGRID_L5      5
-#define IGRID_L6      6
-#define IGRID_L7      7
-#define IGRID_L8      8
-#define IGRID_L9      9
-#define IGRID_L10     10
-#define IGRID_L11     11
-#define IGRID_L12     12
-#define IGRID_L13     13
-#define IGRID_L14     14
-#define IGRID_L15     15
-#define IGRID_L16     16
+#include <stdint.h>
+#include "main.h"

-#define IGRID_R1      17
-#define IGRID_R2      18
-#define IGRID_R3      19
-#define IGRID_R4      20
-#define IGRID_R5      21
-#define IGRID_R6      22
-#define IGRID_R7      23
-#define IGRID_R8      24
-#define IGRID_R9      25
-#define IGRID_R10     26
-#define IGRID_R11     27
-#define IGRID_R12     28
-#define IGRID_R13     29
-#define IGRID_R14     30
-#define IGRID_R15     31
-#define IGRID_R16     32
+#define NUM_DIO_PINS 6

-//
-// Node agnostic mappings:
-//
+static struct {
+  GPIO_TypeDef* port;
+  uint16_t pin;
+} DIO_PIN_MAP[NUM_DIO_PINS] = {
+/* 0 */ { .port = D1_IC_GPIO_Port,  .pin = D1_IC_Pin},
+/* 1 */ { .port = D2_GPIO_Port,     .pin = D2_Pin},
+/* 2 */ { .port = D3_GPIO_Port,     .pin = D3_Pin},
+/* 3 */ { .port = D4_IC_GPIO_Port,  .pin = D4_IC_Pin},
+/* 4 */ { .port = D5_GPIO_Port,     .pin = D5_Pin},
+/* 5 */ { .port = D6_GPIO_Port,     .pin = D6_Pin},
+};

-// NUR BEISPIEL!!!!
-#define GET_GPIO_FROM_IGRID(igrid) \
-    ((igrid) == IGRID_L1 ? A16_Pin : \
-     (igrid) == IGRID_L2 ? A15_Pin : \
-     (igrid) == IGRID_L3 ? A14_Pin : \
-     (igrid) == IGRID_L4 ? A13_Pin : \
-     (igrid) == IGRID_L5 ? A12_Pin : \
-     (igrid) == IGRID_L6 ? A11_Pin : \
-    )
+typedef enum {
+    L1 = 0,
+    L2 = 1,
+    L3 = 2,
+    L4 = 3,
+    L5 = 4,
+    L6 = 5,
+    L7 = 6,
+    L8 = 7,
+    R9 = 8,
+    RA = 9,
+    RB = 10,
+    RC = 11,
+    RD = 12,
+    RE = 13,
+    RF = 14,
+    R0 = 15,
+} analog_pin_t;

-// AUCH NUR BEISPIEL!!
-#define GET_ADC_CHANNEL_FROM_GPIO(gpio) \
-    ((gpio) == A16_Pin ? ADC_CHANNEL_9  : \
-     (gpio) == A15_Pin ? ADC_CHANNEL_3  : \
-     (gpio) == A14_Pin ? ADC_CHANNEL_7  : \
-     (gpio) == A13_Pin ? ADC_CHANNEL_4  : \
-     (gpio) == A12_Pin ? ADC_CHANNEL_10 : \
-     (gpio) == A11_Pin ? ADC_CHANNEL_11 : \
-     (gpio) == A10_Pin ? ADC_CHANNEL_12 : \
-    )
+typedef enum {
+    L9 = 0,
+    LA = 1,
+    LC = 2,
+    R5 = 3,
+    R6 = 4,
+    R7 = 5,
+} digital_pin_t;

-// ADC1 GPIO to ADC_Channel macro
-#define GET_ADC_CHANNEL_FROM_IGRID(igrid) \
-    GET_ADC_CHANNEL_FROM_GPIO(GET_GPIO_FROM_IGRID(igrid))
+typedef enum {
+    LB = 0,
+    R8 = 1,
+} freq_pin_t;

-// Node specific mappings:
-#if CURRENT_NODE == FRONT_NODE
+typedef enum {
+    NONE = 0,   // Not used
+    AIN  = 1,   // Analog in
+    DIN  = 2,   // Digital in
+    FIN  = 3,   // Frequency in
+    DOUT = 4,   // Digital out
+    POUT = 5,   // PWM out
+} signal_type_t;

-    // Useful during development / for verification?
-    #define GET_NAME_FROM_IGRID(igrid) \
-        ((igrid) == IGRID_L1 ? "WTPS1" : \
-         (igrid) == IGRID_L2 ? "STS FL" : \
-        )
+typedef struct {
+    signal_type_t type;

-    // @Oskar nicht sicher wie man das am bestem macht, da ja nicht jeder pin ein input is der auf CAN kommt, also wonach man das ordnen will
-    #define CAN_START_BIT_FROM_IGRID(igrid) \
-        ((igrid) == IGRID_L1 ? 0 : \
-         (igrid) == IGRID_L2 ? 1 : \
-        )
+    // PERIPHERY INFO
+    uint8_t channel;    // ADC or PWM or Freq channel

-    // Hier würde ich dann weitere Defines machen für alles was dann das CAN frame bildet,
-    // Start Bit, Bit count, etc, conversion factor (also von physischer größe die wir im
-    // code bestimmen zu bits), quasi ne DBC mit defines. Abrufen macht man das dann mit macros
+    // CAN INFO
+    uint8_t start;      // start bit
+    uint8_t length;     // in bits

-#elif CURRENT_NODE == REAR_NODE
+    // METADATA
+    float factor; // (phys_range/can_scale)/adc_quants
+    char name[16];
+} can_signal_t;
+
+typedef struct {
+    uint16_t can_id;
+    uint8_t dlc;
+    int8_t num_signals;     // -1 => packet disabled
+    uint16_t period;        // ms
+    can_signal_t signals[9];
+} can_pkt_t;
+
+#define NUM_TX_PKT 4
+#define ADQ (1<<12)
+
+#ifdef SN_FRONT
+
+static can_pkt_t CAN_SIGNAL_MAP[NUM_TX_PKT] = {
+    {
+        .can_id = 0x0D1, .dlc = 3, .num_signals = 7, .period = 100,  .signals = {
+            { .type = DIN, .channel = R5, .start =  0, .length =  1, .factor = 1., .name = "LS L" },
+            { .type = DIN, .channel = L9, .start =  1, .length =  1, .factor = 1., .name = "LS R" },
+            { .type = DIN, .channel = LA, .start =  2, .length =  1, .factor = 1., .name = "SDC M pre BOTS" },
+            { .type = DIN, .channel = LC, .start =  3, .length =  1, .factor = 1., .name = "SDC M post INS" },
+            { .type = DIN, .channel = R7, .start =  4, .length =  1, .factor = 1., .name = "SDC M post BSPD" },
+
+            { .type = AIN, .channel = R0, .start =  8, .length =  8, .factor = ((512./2)/ADQ), .name = "BDTS FL" },
+            { .type = AIN, .channel = L8, .start = 16, .length =  8, .factor = ((512./2)/ADQ), .name = "BDTS FR" },
+        }
+    },
+    {
+        .can_id = 0x0D3, .dlc = 7, .num_signals = 6, .period = 10, .signals = {
+            { .type = AIN, .channel = L1, .start =  0, .length =  8, .factor = (256./ADQ), .name = "APPS 1" },
+            { .type = AIN, .channel = L2, .start =  8, .length =  8, .factor = (256./ADQ), .name = "APPS 2" },
+            { .type = AIN, .channel = RA, .start = 16, .length =  8, .factor = ((512./2)/ADQ), .name = "BP F" },
+            { .type = AIN, .channel = R9, .start = 24, .length = 12, .factor = 1., .name = "SAS" },
+            { .type = FIN, .channel = R8, .start = 40, .length =  8, .factor = 1., .name = "WSS FL" },
+            { .type = FIN, .channel = LB, .start = 48, .length =  8, .factor = 1., .name = "WSS FR" },
+        }
+    },
+    {
+        .can_id = 0x0D5, .dlc = 3, .num_signals = 2, .period = 10, .signals = {
+            { .type = AIN, .channel = RC, .start =  0, .length = 12, .factor = 1., .name = "DS FL" },
+            { .type = AIN, .channel = L4, .start = 12, .length = 12, .factor = 1., .name = "DS FR" },
+        }
+    },
+    {
+        .can_id = 0x0D7, .dlc = 3, .num_signals = 2, .period = 1, .signals = {
+            { .type = AIN, .channel = RE, .start =  0, .length = 12, .factor = 1., .name = "SLS FL" },
+            { .type = AIN, .channel = L6, .start = 12, .length = 12, .factor = 1., .name = "SLS FR" },
+        }
+    }
+};

 #endif

-#define FRONT_NODE  0
-#define REAR_NODE   1
+#ifdef SN_REAR
+
+static can_pkt_t CAN_SIGNAL_MAP[NUM_TX_PKT] = {
+    {
+        .can_id = 0x0D2, .dlc = 7, .num_signals = 9, .period = 100,  .signals = {
+            { .type = DIN, .channel = L9, .start =  0, .length =  1, .factor = 1., .name = "ExtTSOn" },
+            { .type = DIN, .channel = LA, .start =  1, .length =  1, .factor = 1., .name = "SDC M pre TSMS" },
+            { .type = DIN, .channel = LC, .start =  2, .length =  1, .factor = 1., .name = "SDC M post TSMS" },
+
+            { .type = AIN, .channel = R0, .start =  8, .length =  8, .factor = ((512./2)/ADQ), .name = "BDTS RL" },
+            { .type = AIN, .channel = L8, .start = 16, .length =  8, .factor = ((512./2)/ADQ), .name = "BDTS RR" },
+
+            { .type = AIN, .channel = R9, .start = 24, .length =  8, .factor = (256./ADQ), .name = "WT BAT" },
+            { .type = AIN, .channel = RB, .start = 32, .length =  8, .factor = (256./ADQ), .name = "WT DT" },
+            { .type = AIN, .channel = RD, .start = 40, .length =  8, .factor = (256./ADQ), .name = "WP BAT" },
+            { .type = AIN, .channel = RF, .start = 48, .length =  8, .factor = (256./ADQ), .name = "WP DT" },
+        }
+    },
+    {
+        .can_id = 0x0D4, .dlc = 8, .num_signals = 7, .period = 10, .signals = {
+            { .type = AIN, .channel = L1, .start =  0, .length =  8, .factor = ((25.6/.1)/ADQ), .name = "EBS APS 1" },
+            { .type = AIN, .channel = L2, .start =  8, .length =  8, .factor = ((25.6/.1)/ADQ), .name = "EBS APS 2" },
+            { .type = AIN, .channel = RA, .start = 16, .length =  8, .factor = ((512./2)/ADQ), .name = "BP F" },
+            { .type = FIN, .channel = R8, .start = 24, .length =  8, .factor = 1., .name = "WSS RL" },
+            { .type = FIN, .channel = LB, .start = 32, .length =  8, .factor = 1., .name = "WSS RR" },
+            { .type = AIN, .channel = RC, .start = 40, .length = 12, .factor = 1., .name = "DS RL" },
+            { .type = AIN, .channel = L4, .start = 52, .length = 12, .factor = 1., .name = "DS RR" },
+        }
+    },
+    {
+        .can_id = 0x0D6, .dlc = 0, .num_signals = -1, .period = 10, .signals = {}
+    },
+    {
+        .can_id = 0x0D8, .dlc = 3, .num_signals = 2, .period = 1, .signals = {
+            { .type = AIN, .channel = RE, .start =  0, .length = 12, .factor = 1., .name = "SLS RL" },
+            { .type = AIN, .channel = L6, .start = 12, .length = 12, .factor = 1., .name = "SLS RR" },
+        }
+    }
+};
+
+#define CAN_PWM_DC_ID 0x0DC
+#define CAN_PWM_CONF_ID 0x0DD

 #endif
+
+/* user needs
+TIM_HandleTypeDef* PWM_TIM_MAP[3] = {&htim1, &htim4, &htim3};
+*/
+
+typedef enum {
+    PWM1 = 0, // TIM1
+    PWM3 = 1, // TIM4
+    PWM2 = 2, // TIM3
+} pwm_tim_t; // Used as index for PWM_TIM_MAP
+
+typedef struct {
+    uint8_t tim;
+    uint8_t ch;
+} pwm_ch_t;
+
+static pwm_ch_t PWM_CH_MAP[8] = {
+    { .tim = PWM1, .ch = 0 }, // TIM1_CH1
+    { .tim = PWM1, .ch = 1 }, // TIM1_CH2
+    { .tim = PWM1, .ch = 2 }, // TIM1_CH3
+    { .tim = PWM1, .ch = 3 }, // TIM1_CH4
+    { .tim = PWM3, .ch = 0 }, // TIM4_CH1
+    { .tim = PWM3, .ch = 1 }, // TIM4_CH2
+    { .tim = PWM2, .ch = 1 }, // TIM3_CH2
+    { .tim = PWM2, .ch = 3 }  // TIM3_CH4
+};
+
+#endif
--- a/Software/Core/Inc/stm32h7xx_it.h
+++ b/Software/Core/Inc/stm32h7xx_it.h
@ -57,6 +57,10 @@ void PendSV_Handler(void);
 void SysTick_Handler(void);
 void DMA1_Stream0_IRQHandler(void);
 void ADC_IRQHandler(void);
+void FDCAN1_IT0_IRQHandler(void);
+void FDCAN2_IT0_IRQHandler(void);
+void FDCAN1_IT1_IRQHandler(void);
+void FDCAN2_IT1_IRQHandler(void);
 /* USER CODE BEGIN EFP */

 /* USER CODE END EFP */
--- a/Software/Core/Src/fdcan.c
+++ b/Software/Core/Src/fdcan.c
@ -53,9 +53,9 @@ void MX_FDCAN1_Init(void)
  hfdcan1.Init.DataTimeSeg1 = 1;
  hfdcan1.Init.DataTimeSeg2 = 1;
  hfdcan1.Init.MessageRAMOffset = 0;
-  hfdcan1.Init.StdFiltersNbr = 0;
+  hfdcan1.Init.StdFiltersNbr = 1;
  hfdcan1.Init.ExtFiltersNbr = 0;
-  hfdcan1.Init.RxFifo0ElmtsNbr = 0;
+  hfdcan1.Init.RxFifo0ElmtsNbr = 16;
  hfdcan1.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
  hfdcan1.Init.RxFifo1ElmtsNbr = 0;
  hfdcan1.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
@ -63,7 +63,7 @@ void MX_FDCAN1_Init(void)
  hfdcan1.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
  hfdcan1.Init.TxEventsNbr = 0;
  hfdcan1.Init.TxBuffersNbr = 0;
-  hfdcan1.Init.TxFifoQueueElmtsNbr = 0;
+  hfdcan1.Init.TxFifoQueueElmtsNbr = 4;
  hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
  hfdcan1.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
  if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK)
@ -101,9 +101,9 @@ void MX_FDCAN2_Init(void)
  hfdcan2.Init.DataTimeSeg1 = 1;
  hfdcan2.Init.DataTimeSeg2 = 1;
  hfdcan2.Init.MessageRAMOffset = 0;
-  hfdcan2.Init.StdFiltersNbr = 0;
+  hfdcan2.Init.StdFiltersNbr = 1;
  hfdcan2.Init.ExtFiltersNbr = 0;
-  hfdcan2.Init.RxFifo0ElmtsNbr = 0;
+  hfdcan2.Init.RxFifo0ElmtsNbr = 16;
  hfdcan2.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
  hfdcan2.Init.RxFifo1ElmtsNbr = 0;
  hfdcan2.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
@ -111,7 +111,7 @@ void MX_FDCAN2_Init(void)
  hfdcan2.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
  hfdcan2.Init.TxEventsNbr = 0;
  hfdcan2.Init.TxBuffersNbr = 0;
-  hfdcan2.Init.TxFifoQueueElmtsNbr = 0;
+  hfdcan2.Init.TxFifoQueueElmtsNbr = 4;
  hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
  hfdcan2.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
  if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK)
@ -164,6 +164,11 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle)
    GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN1;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

+    /* FDCAN1 interrupt Init */
+    HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn);
+    HAL_NVIC_SetPriority(FDCAN1_IT1_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(FDCAN1_IT1_IRQn);
  /* USER CODE BEGIN FDCAN1_MspInit 1 */

  /* USER CODE END FDCAN1_MspInit 1 */
@ -201,6 +206,11 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle)
    GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN2;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

+    /* FDCAN2 interrupt Init */
+    HAL_NVIC_SetPriority(FDCAN2_IT0_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn);
+    HAL_NVIC_SetPriority(FDCAN2_IT1_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(FDCAN2_IT1_IRQn);
  /* USER CODE BEGIN FDCAN2_MspInit 1 */

  /* USER CODE END FDCAN2_MspInit 1 */
@ -227,6 +237,9 @@ void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* fdcanHandle)
    */
    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);

+    /* FDCAN1 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(FDCAN1_IT0_IRQn);
+    HAL_NVIC_DisableIRQ(FDCAN1_IT1_IRQn);
  /* USER CODE BEGIN FDCAN1_MspDeInit 1 */

  /* USER CODE END FDCAN1_MspDeInit 1 */
@ -248,6 +261,9 @@ void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* fdcanHandle)
    */
    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_13);

+    /* FDCAN2 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(FDCAN2_IT0_IRQn);
+    HAL_NVIC_DisableIRQ(FDCAN2_IT1_IRQn);
  /* USER CODE BEGIN FDCAN2_MspDeInit 1 */

  /* USER CODE END FDCAN2_MspDeInit 1 */
--- a/Software/Core/Src/main.c
+++ b/Software/Core/Src/main.c
@ -27,7 +27,7 @@

 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
-
+#include "mappings.h"
 /* USER CODE END Includes */

 /* Private typedef -----------------------------------------------------------*/
@ -37,7 +37,7 @@

 /* Private define ------------------------------------------------------------*/
 /* USER CODE BEGIN PD */
-
+#define TIM_BASE_FREQ 96000000UL
 /* USER CODE END PD */

 /* Private macro -------------------------------------------------------------*/
@ -49,7 +49,11 @@

 /* USER CODE BEGIN PV */
 /* Declare buffer in D1 domain SRAM */
-static uint16_t adc_values[16];
+static uint16_t adc_values[NUM_ADC_PINS];
+static uint8_t  dio_values[NUM_DIO_PINS];
+
+// See mappings.h pwm_tim_t
+TIM_HandleTypeDef* PWM_TIM_MAP[3] = {&htim1, &htim4, &htim3};
 /* USER CODE END PV */

 /* Private function prototypes -----------------------------------------------*/
@ -107,32 +111,132 @@ int main(void)
  MX_NVIC_Init();
  /* USER CODE BEGIN 2 */
  
-  if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED) != HAL_OK)
-  {
-    Error_Handler();
-  }
+  FDCAN_HandleTypeDef* hMainCAN = &hfdcan2;
+  //FDCAN_HandleTypeDef* hPeriCAN = &hfdcan1;

-  if (HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_values, 16) != HAL_OK)
-  {
+  if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED) != HAL_OK)
+    Error_Handler();
+
+  if (HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_values, NUM_ADC_PINS) != HAL_OK)
    Error_Handler();
-  }

  HAL_TIM_Base_Start(&htim6);

+  // CAN TX PREP
+
+  FDCAN_TxHeaderTypeDef txHeader;
+
+  // Prep the tx frame
+  txHeader.ErrorStateIndicator = FDCAN_ESI_PASSIVE;
+  txHeader.BitRateSwitch = FDCAN_BRS_OFF;
+  txHeader.FDFormat = FDCAN_CLASSIC_CAN;
+  txHeader.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
+  txHeader.IdType = FDCAN_STANDARD_ID;
+  txHeader.Identifier = 0x0;
+  txHeader.TxFrameType = FDCAN_DATA_FRAME;
+  txHeader.DataLength = 8;
+
+  if (HAL_FDCAN_ActivateNotification(hMainCAN, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0) != HAL_OK)
+    Error_Handler();
+
+  if (HAL_FDCAN_ConfigGlobalFilter(hMainCAN, FDCAN_REJECT, FDCAN_REJECT,
+                                    FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE) != HAL_OK)
+    Error_Handler();
+
+  FDCAN_FilterTypeDef filter;
+  filter.IdType = FDCAN_STANDARD_ID;
+  filter.FilterIndex = 0;
+  filter.FilterType = FDCAN_FILTER_MASK;
+  filter.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
+  filter.FilterID1 = 0x0DD;
+  filter.FilterID2 = 0x7FE; // Match 0x0DC and 0x0DD
+
+  if (HAL_FDCAN_ConfigFilter(hMainCAN, &filter) != HAL_OK)
+    Error_Handler();
+
+  if (HAL_FDCAN_Start(hMainCAN) != HAL_OK)
+    Error_Handler();
+
+
+  HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
+  HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2);
+  HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3);
+  HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_4);
+  HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1);
+  HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_2);
+  HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_2);
+  HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4);

  /* USER CODE END 2 */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
-  while (1)
+  for (unsigned int mscounter = 0; 1; mscounter++)
  {
    /* USER CODE END WHILE */

    /* USER CODE BEGIN 3 */
-    HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_SET);
-    HAL_Delay(500);
-    HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_RESET);
-    HAL_Delay(500);
+    for (int di = 0; di < NUM_DIO_PINS; di++) {
+      dio_values[di] = HAL_GPIO_ReadPin(
+        DIO_PIN_MAP[di].port,
+        DIO_PIN_MAP[di].pin
+      );
+    }
+
+    for (int pi = 0; pi < NUM_TX_PKT; pi++) {
+
+      can_pkt_t* pktinfo = &(CAN_SIGNAL_MAP[pi]);
+
+      if (pktinfo->num_signals < 0)
+        continue;
+
+      if (mscounter % pktinfo->period == 0) {
+
+        txHeader.Identifier = pktinfo->can_id;
+        txHeader.DataLength = pktinfo->dlc;
+        uint64_t txData = 0;
+
+        for (int si = 0; si < pktinfo->num_signals; si++) {
+
+          can_signal_t* signal = &(pktinfo->signals[si]);
+          uint16_t value = 0;
+          switch (signal->type) {
+            case DIN:
+              value = dio_values[signal->channel];
+              break;
+
+            case AIN:
+              value = signal->factor * adc_values[signal->channel];
+              break;
+
+            case FIN:
+              /* NYI */
+              break;
+
+            default:
+              break;
+          }
+
+          uint16_t mask = 0xFFFF >> (16 - signal->length);
+          txData |= ((uint64_t) (value & mask)) << (signal->start);
+
+        }
+
+        if (HAL_FDCAN_AddMessageToTxFifoQ(hMainCAN, &txHeader, (uint8_t*) &txData) != HAL_OK)
+          Error_Handler();
+
+      }
+
+      if (mscounter >= 500) {
+        mscounter = 0;
+        HAL_GPIO_TogglePin(STATUS_G_GPIO_Port, STATUS_G_Pin);
+      }
+
+    }
+
+    // TODO: Move all this into a 1kHz timer callback!
+    HAL_Delay(1);
+
  }
  /* USER CODE END 3 */
 }
@ -217,6 +321,67 @@ void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
    __asm volatile ("NOP");
  }
 }
+
+void SetCCR(TIM_TypeDef* Instance, unsigned int ch, uint8_t dc) {
+  (&(Instance->CCR1))[ch] = dc;
+}
+
+void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *handle, uint32_t RxFifo0ITs)
+{
+  FDCAN_HandleTypeDef* hMainCAN = &hfdcan2;
+  //FDCAN_HandleTypeDef* hPeriCAN = &hfdcan1;
+
+  if (handle != hMainCAN || (RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE) == RESET)
+    return; // TODO: handle Peripheral CAN
+  
+  static FDCAN_RxHeaderTypeDef header;
+  static uint8_t data[8];
+  if (HAL_FDCAN_GetRxMessage(hMainCAN, FDCAN_RX_FIFO0, &header, data) != HAL_OK)
+    return;
+
+  if (header.FDFormat != FDCAN_CLASSIC_CAN ||
+      header.RxFrameType != FDCAN_DATA_FRAME ||
+      header.IdType != FDCAN_STANDARD_ID)
+    return;
+  
+  switch (header.Identifier) {
+
+    case CAN_PWM_DC_ID:
+
+      uint8_t* dcs = data;
+      for (int i = 0; i < header.DataLength; i++) {
+
+        TIM_HandleTypeDef* htim = PWM_TIM_MAP[PWM_CH_MAP[i].tim];
+        SetCCR(htim->Instance, PWM_CH_MAP[i].ch, dcs[i]);
+        // TODO: This does not work, apparently they don't start in RESET
+        // Maybe have our own init bool array instead
+        // Manually enabling doesn't seem to work either
+        if (htim->ChannelState[PWM_CH_MAP[i].ch] == HAL_TIM_CHANNEL_STATE_RESET)
+          HAL_TIM_PWM_Start(htim, PWM_CH_MAP[i].ch << 2);
+        // MAYBE: Stop Timer when DC == 0 on all channels?
+        // HAL_TIM_PWM_Stop(htim, channel);
+
+      }
+      break;
+
+    case CAN_PWM_CONF_ID:
+
+      uint16_t* freqs = (uint16_t*) data;
+      for (int i = 0; i < (header.DataLength/2); i++) {
+
+        uint32_t prescaler = (TIM_BASE_FREQ / (255UL * freqs[i])); // cast?
+        PWM_TIM_MAP[i]->Instance->PSC = prescaler;
+
+      }
+      break;
+
+    default:
+      break;
+
+  }
+
+}
+
 /* USER CODE END 4 */

 /**
@ -229,9 +394,7 @@ void Error_Handler(void)
  /* User can add his own implementation to report the HAL error return state */
  HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET);
  __disable_irq();
-  while (1)
-  {
-  }
+  while (1);
  /* USER CODE END Error_Handler_Debug */
 }

--- a/Software/Core/Src/stm32h7xx_it.c
+++ b/Software/Core/Src/stm32h7xx_it.c
@ -57,6 +57,8 @@
 /* External variables --------------------------------------------------------*/
 extern DMA_HandleTypeDef hdma_adc1;
 extern ADC_HandleTypeDef hadc1;
+extern FDCAN_HandleTypeDef hfdcan1;
+extern FDCAN_HandleTypeDef hfdcan2;
 /* USER CODE BEGIN EV */

 /* USER CODE END EV */
@ -227,6 +229,62 @@ void ADC_IRQHandler(void)
  /* USER CODE END ADC_IRQn 1 */
 }

+/**
+  * @brief This function handles FDCAN1 interrupt 0.
+  */
+void FDCAN1_IT0_IRQHandler(void)
+{
+  /* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */
+
+  /* USER CODE END FDCAN1_IT0_IRQn 0 */
+  HAL_FDCAN_IRQHandler(&hfdcan1);
+  /* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */
+
+  /* USER CODE END FDCAN1_IT0_IRQn 1 */
+}
+
+/**
+  * @brief This function handles FDCAN2 interrupt 0.
+  */
+void FDCAN2_IT0_IRQHandler(void)
+{
+  /* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */
+
+  /* USER CODE END FDCAN2_IT0_IRQn 0 */
+  HAL_FDCAN_IRQHandler(&hfdcan2);
+  /* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */
+
+  /* USER CODE END FDCAN2_IT0_IRQn 1 */
+}
+
+/**
+  * @brief This function handles FDCAN1 interrupt 1.
+  */
+void FDCAN1_IT1_IRQHandler(void)
+{
+  /* USER CODE BEGIN FDCAN1_IT1_IRQn 0 */
+
+  /* USER CODE END FDCAN1_IT1_IRQn 0 */
+  HAL_FDCAN_IRQHandler(&hfdcan1);
+  /* USER CODE BEGIN FDCAN1_IT1_IRQn 1 */
+
+  /* USER CODE END FDCAN1_IT1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles FDCAN2 interrupt 1.
+  */
+void FDCAN2_IT1_IRQHandler(void)
+{
+  /* USER CODE BEGIN FDCAN2_IT1_IRQn 0 */
+
+  /* USER CODE END FDCAN2_IT1_IRQn 0 */
+  HAL_FDCAN_IRQHandler(&hfdcan2);
+  /* USER CODE BEGIN FDCAN2_IT1_IRQn 1 */
+
+  /* USER CODE END FDCAN2_IT1_IRQn 1 */
+}
+
 /* USER CODE BEGIN 1 */

 /* USER CODE END 1 */
--- a/Software/Core/Src/tim.c
+++ b/Software/Core/Src/tim.c
@ -46,9 +46,9 @@ void MX_TIM1_Init(void)

  /* USER CODE END TIM1_Init 1 */
  htim1.Instance = TIM1;
-  htim1.Init.Prescaler = 0;
+  htim1.Init.Prescaler = 753;
  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
-  htim1.Init.Period = 65535;
+  htim1.Init.Period = 255;
  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  htim1.Init.RepetitionCounter = 0;
  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
@ -122,9 +122,9 @@ void MX_TIM3_Init(void)

  /* USER CODE END TIM3_Init 1 */
  htim3.Instance = TIM3;
-  htim3.Init.Prescaler = 0;
+  htim3.Init.Prescaler = 1203;
  htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
-  htim3.Init.Period = 65535;
+  htim3.Init.Period = 255;
  htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
@ -170,9 +170,9 @@ void MX_TIM4_Init(void)

  /* USER CODE END TIM4_Init 1 */
  htim4.Instance = TIM4;
-  htim4.Init.Prescaler = 0;
+  htim4.Init.Prescaler = 19;
  htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
-  htim4.Init.Period = 65535;
+  htim4.Init.Period = 255;
  htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
@ -437,7 +437,7 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
    PB6     ------> TIM4_CH1
    PB7     ------> TIM4_CH2
    */
-    GPIO_InitStruct.Pin = PWM3_2_Pin|PWM3_2B7_Pin;
+    GPIO_InitStruct.Pin = PWM3_1_Pin|PWM3_2_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
--- a/Software/sensor-node.ioc
+++ b/Software/sensor-node.ioc
@ -127,17 +127,23 @@ Dma.RequestsNb=1
 FDCAN1.CalculateBaudRateNominal=500000
 FDCAN1.CalculateTimeBitNominal=2000
 FDCAN1.CalculateTimeQuantumNominal=125.0
-FDCAN1.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2
+FDCAN1.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2,RxFifo0ElmtsNbr,StdFiltersNbr,TxFifoQueueElmtsNbr
 FDCAN1.NominalPrescaler=3
 FDCAN1.NominalTimeSeg1=13
 FDCAN1.NominalTimeSeg2=2
+FDCAN1.RxFifo0ElmtsNbr=16
+FDCAN1.StdFiltersNbr=1
+FDCAN1.TxFifoQueueElmtsNbr=4
 FDCAN2.CalculateBaudRateNominal=500000
 FDCAN2.CalculateTimeBitNominal=2000
 FDCAN2.CalculateTimeQuantumNominal=125.0
-FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2
+FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2,StdFiltersNbr,RxFifo0ElmtsNbr,TxFifoQueueElmtsNbr
 FDCAN2.NominalPrescaler=3
 FDCAN2.NominalTimeSeg1=13
 FDCAN2.NominalTimeSeg2=2
+FDCAN2.RxFifo0ElmtsNbr=16
+FDCAN2.StdFiltersNbr=1
+FDCAN2.TxFifoQueueElmtsNbr=4
 File.Version=6
 GPIO.groupedBy=Group By Peripherals
 KeepUserPlacement=false
@ -258,6 +264,10 @@ NVIC.ADC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:true\:true\:1\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.FDCAN1_IT0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.FDCAN1_IT1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.FDCAN2_IT0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.FDCAN2_IT1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@ -354,7 +364,7 @@ PB5.GPIOParameters=GPIO_Label
 PB5.GPIO_Label=PWM2_1
 PB5.Signal=S_TIM3_CH2
 PB6.GPIOParameters=GPIO_Label
-PB6.GPIO_Label=PWM3_2
+PB6.GPIO_Label=PWM3_1
 PB6.Signal=S_TIM4_CH1
 PB7.GPIOParameters=GPIO_Label
 PB7.GPIO_Label=PWM3_2
@ -607,13 +617,19 @@ TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
 TIM1.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
 TIM1.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
 TIM1.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
-TIM1.IPParameters=Channel-PWM Generation4 CH4,Channel-PWM Generation3 CH3,Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2
+TIM1.IPParameters=Channel-PWM Generation4 CH4,Channel-PWM Generation3 CH3,Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Prescaler,Period
+TIM1.Period=255
+TIM1.Prescaler=753
 TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
 TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
-TIM3.IPParameters=Channel-PWM Generation2 CH2,Channel-PWM Generation4 CH4
+TIM3.IPParameters=Channel-PWM Generation4 CH4,Channel-PWM Generation2 CH2,Prescaler,Period
+TIM3.Period=255
+TIM3.Prescaler=1203
 TIM4.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
 TIM4.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
-TIM4.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2
+TIM4.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Prescaler,Period
+TIM4.Period=255
+TIM4.Prescaler=19
 TIM6.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
 TIM6.IPParameters=Prescaler,Period,TIM_MasterOutputTrigger,AutoReloadPreload
 TIM6.Period=2000-1
Author	SHA1	Message	Date
Oskar	778e0ae272	CAN bus bringup (everything works except PWM output)	2025-04-24 20:38:24 +02:00
Oskar	804bb33064	Add PWM control functionality	2025-04-20 17:30:52 +02:00
Oskar	1a517299a0	Add CAN send logic and DIO mapping	2025-03-30 11:14:16 +02:00
Oskar	eb994ad693	New pin mappings for wiring optimization	2025-03-29 15:45:20 +01:00
Oskar	8e62180537	Remove old signal mapping	2025-03-29 12:57:28 +01:00
Oskar	8f6b924865	Complete new CAN mappings	2025-03-29 12:56:06 +01:00
Oskar	298fd8709c	A few ideas for can mappings	2025-03-27 20:24:25 +01:00