adc callback reached, llm linker script changes
This commit is contained in:
parent
0eafcd109c
commit
852ce2fbae
@ -41,8 +41,7 @@ extern ADC_HandleTypeDef hadc1;
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void MX_ADC1_Init(void);
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void MX_ADC1_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE BEGIN Prototypes */
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void ADC_DMA_Callback(DMA_HandleTypeDef *hdma);
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void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
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/* USER CODE END Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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#ifdef __cplusplus
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@ -21,7 +21,7 @@
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#include "adc.h"
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#include "adc.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE BEGIN 0 */
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uint16_t adc_values[16];
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/* USER CODE END 0 */
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/* USER CODE END 0 */
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ADC_HandleTypeDef hadc1;
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ADC_HandleTypeDef hadc1;
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@ -45,7 +45,7 @@ void MX_ADC1_Init(void)
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/** Common config
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/** Common config
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*/
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*/
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hadc1.Instance = ADC1;
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hadc1.Instance = ADC1;
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hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
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hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2;
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hadc1.Init.Resolution = ADC_RESOLUTION_16B;
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hadc1.Init.Resolution = ADC_RESOLUTION_16B;
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hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
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hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
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hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
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hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
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@ -221,9 +221,7 @@ void MX_ADC1_Init(void)
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Error_Handler();
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Error_Handler();
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}
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}
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/* USER CODE BEGIN ADC1_Init 2 */
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/* USER CODE BEGIN ADC1_Init 2 */
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HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED);
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HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_values, 16);
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HAL_DMA_RegisterCallback(&hdma_adc1, HAL_DMA_XFER_CPLT_CB_ID, ADC_DMA_Callback);
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/* USER CODE END ADC1_Init 2 */
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/* USER CODE END ADC1_Init 2 */
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}
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}
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@ -244,12 +242,12 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
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PeriphClkInitStruct.PLL2.PLL2M = 2;
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PeriphClkInitStruct.PLL2.PLL2M = 2;
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PeriphClkInitStruct.PLL2.PLL2N = 20;
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PeriphClkInitStruct.PLL2.PLL2N = 20;
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PeriphClkInitStruct.PLL2.PLL2P = 12;
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PeriphClkInitStruct.PLL2.PLL2P = 10;
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PeriphClkInitStruct.PLL2.PLL2Q = 2;
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PeriphClkInitStruct.PLL2.PLL2Q = 20;
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PeriphClkInitStruct.PLL2.PLL2R = 2;
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PeriphClkInitStruct.PLL2.PLL2R = 2;
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PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
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PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
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PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
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PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
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PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
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PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
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PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
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PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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{
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{
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@ -316,6 +314,9 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
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__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
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__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
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/* ADC1 interrupt Init */
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HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(ADC_IRQn);
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/* USER CODE BEGIN ADC1_MspInit 1 */
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/* USER CODE BEGIN ADC1_MspInit 1 */
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/* USER CODE END ADC1_MspInit 1 */
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/* USER CODE END ADC1_MspInit 1 */
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@ -371,15 +372,5 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
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}
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE BEGIN 1 */
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void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
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{
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HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET);
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HAL_Delay(10000);
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}
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void ADC_DMA_Callback(DMA_HandleTypeDef *hdma)
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{
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HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET);
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HAL_Delay(10000);
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}
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/* USER CODE END 1 */
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/* USER CODE END 1 */
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@ -48,12 +48,12 @@
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/* Private variables ---------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE BEGIN PV */
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/* Declare buffer in D1 domain SRAM */
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static uint16_t adc_values[16];
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/* USER CODE END PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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void SystemClock_Config(void);
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void SystemClock_Config(void);
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static void MPU_Config(void);
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static void MX_NVIC_Init(void);
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static void MX_NVIC_Init(void);
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/* USER CODE BEGIN PFP */
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/* USER CODE BEGIN PFP */
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@ -75,9 +75,6 @@ int main(void)
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/* USER CODE END 1 */
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/* USER CODE END 1 */
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/* MPU Configuration--------------------------------------------------------*/
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MPU_Config();
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/* MCU Configuration--------------------------------------------------------*/
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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@ -110,6 +107,25 @@ int main(void)
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MX_NVIC_Init();
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MX_NVIC_Init();
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/* USER CODE BEGIN 2 */
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/* USER CODE BEGIN 2 */
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if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_values, 16) != HAL_OK)
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{
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Error_Handler();
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}
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HAL_TIM_Base_Start(&htim6);
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if (!(hadc1.Instance->CR & ADC_CR_ADSTART))
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{
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Error_Handler(); // ADC not started
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}
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/* USER CODE END 2 */
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/* USER CODE END 2 */
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/* Infinite loop */
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/* Infinite loop */
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@ -119,14 +135,16 @@ int main(void)
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/* USER CODE END WHILE */
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/* USER CODE END WHILE */
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/* USER CODE BEGIN 3 */
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/* USER CODE BEGIN 3 */
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volatile uint32_t counter = __HAL_TIM_GET_COUNTER(&htim6);
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volatile uint32_t adc_cr = (hadc1.Instance->CR);
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volatile uint32_t adc_values_adress = (uint32_t)adc_values;
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HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_SET);
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HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_SET);
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HAL_Delay(500);
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HAL_Delay(500);
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HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_RESET);
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HAL_Delay(500);
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HAL_Delay(500);
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HAL_GPIO_WritePin(STATUS_B_GPIO_Port, STATUS_B_Pin, GPIO_PIN_SET);
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HAL_Delay(500);
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HAL_GPIO_WritePin(STATUS_B_GPIO_Port, STATUS_B_Pin, GPIO_PIN_RESET);
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HAL_Delay(500);
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}
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}
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/* USER CODE END 3 */
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/* USER CODE END 3 */
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}
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}
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@ -163,8 +181,8 @@ void SystemClock_Config(void)
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RCC_OscInitStruct.PLL.PLLM = 2;
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RCC_OscInitStruct.PLL.PLLM = 2;
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RCC_OscInitStruct.PLL.PLLN = 32;
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RCC_OscInitStruct.PLL.PLLN = 32;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 3;
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RCC_OscInitStruct.PLL.PLLQ = 32;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLR = 32;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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@ -201,43 +219,14 @@ static void MX_NVIC_Init(void)
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/* DMA1_Stream0_IRQn interrupt configuration */
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/* DMA1_Stream0_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
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HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
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HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
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/* ADC_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(ADC_IRQn);
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}
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}
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/* USER CODE BEGIN 4 */
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/* USER CODE BEGIN 4 */
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void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
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/* USER CODE END 4 */
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/* MPU Configuration */
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void MPU_Config(void)
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{
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{
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MPU_Region_InitTypeDef MPU_InitStruct = {0};
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HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET);
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/* Disables the MPU */
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HAL_MPU_Disable();
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/** Initializes and configures the Region and the memory to be protected
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*/
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.Number = MPU_REGION_NUMBER0;
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MPU_InitStruct.BaseAddress = 0x0;
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MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
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MPU_InitStruct.SubRegionDisable = 0x87;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Enables the MPU */
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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}
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}
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/* USER CODE END 4 */
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/**
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/**
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* @brief This function is executed in case of error occurrence.
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* @brief This function is executed in case of error occurrence.
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@ -232,7 +232,7 @@ void MX_TIM6_Init(void)
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Error_Handler();
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Error_Handler();
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}
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}
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/* USER CODE BEGIN TIM6_Init 2 */
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/* USER CODE BEGIN TIM6_Init 2 */
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HAL_TIM_Base_Start(&htim6);
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/* USER CODE END TIM6_Init 2 */
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/* USER CODE END TIM6_Init 2 */
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}
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}
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@ -1,5 +1,5 @@
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##########################################################################################################################
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##########################################################################################################################
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# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Tue Mar 18 16:55:42 CET 2025]
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# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Mon Mar 24 15:58:35 CET 2025]
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##########################################################################################################################
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##########################################################################################################################
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# ------------------------------------------------
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# ------------------------------------------------
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@ -15,7 +15,7 @@ ADC1.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_19
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ADC1.Channel-7\#ChannelRegularConversion=ADC_CHANNEL_18
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ADC1.Channel-7\#ChannelRegularConversion=ADC_CHANNEL_18
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ADC1.Channel-8\#ChannelRegularConversion=ADC_CHANNEL_15
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ADC1.Channel-8\#ChannelRegularConversion=ADC_CHANNEL_15
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ADC1.Channel-9\#ChannelRegularConversion=ADC_CHANNEL_14
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ADC1.Channel-9\#ChannelRegularConversion=ADC_CHANNEL_14
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ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV1
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ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV2
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ADC1.ContinuousConvMode=DISABLE
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ADC1.ContinuousConvMode=DISABLE
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ADC1.ConversionDataManagement=ADC_CONVERSIONDATA_DMA_CIRCULAR
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ADC1.ConversionDataManagement=ADC_CONVERSIONDATA_DMA_CIRCULAR
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ADC1.EOCSelection=ADC_EOC_SEQ_CONV
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ADC1.EOCSelection=ADC_EOC_SEQ_CONV
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@ -95,7 +95,14 @@ ADC1.master=1
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CAD.formats=[{"id"\:42,"cad_product"\:"KiCAD v6+","cad_family"\:"KiCAD"}]
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CAD.formats=[{"id"\:42,"cad_product"\:"KiCAD v6+","cad_family"\:"KiCAD"}]
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CAD.pinconfig=Dual
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CAD.pinconfig=Dual
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CAD.provider=
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CAD.provider=
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CORTEX_M7.IPParameters=default_mode_Activation
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CORTEX_M7.AccessPermission_Spec=MPU_REGION_FULL_ACCESS
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CORTEX_M7.BaseAddress_Spec=0x30000000
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CORTEX_M7.CPU_DCache=Disabled
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CORTEX_M7.CPU_ICache=Disabled
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CORTEX_M7.Enable_Spec=MPU_REGION_ENABLE
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CORTEX_M7.IPParameters=default_mode_Activation,Enable_Spec,MPU_Control,CPU_ICache,CPU_DCache,BaseAddress_Spec,Size_Spec,AccessPermission_Spec
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CORTEX_M7.MPU_Control=__NULL
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CORTEX_M7.Size_Spec=MPU_REGION_SIZE_32B
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CORTEX_M7.default_mode_Activation=1
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CORTEX_M7.default_mode_Activation=1
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Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
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Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
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Dma.ADC1.0.EventEnable=DISABLE
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Dma.ADC1.0.EventEnable=DISABLE
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@ -247,7 +254,7 @@ Mcu.UserConstants=
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Mcu.UserName=STM32H7A3RITx
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Mcu.UserName=STM32H7A3RITx
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MxCube.Version=6.13.0
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MxCube.Version=6.13.0
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MxDb.Version=DB.6.0.130
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MxDb.Version=DB.6.0.130
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NVIC.ADC_IRQn=true\:0\:0\:false\:true\:true\:2\:true\:true\:true
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NVIC.ADC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:true\:true\:1\:false\:true\:true
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NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:true\:true\:1\:false\:true\:true
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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@ -463,7 +470,7 @@ ProjectManager.UAScriptAfterPath=
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ProjectManager.UAScriptBeforePath=
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ProjectManager.UAScriptBeforePath=
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ProjectManager.UnderRoot=false
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ProjectManager.UnderRoot=false
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ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_FDCAN1_Init-FDCAN1-false-HAL-true,6-MX_FDCAN2_Init-FDCAN2-false-HAL-true,7-MX_TIM1_Init-TIM1-false-HAL-true,8-MX_TIM3_Init-TIM3-false-HAL-true,9-MX_TIM8_Init-TIM8-false-HAL-true,10-MX_TIM6_Init-TIM6-false-HAL-true,11-MX_TIM4_Init-TIM4-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
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ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_FDCAN1_Init-FDCAN1-false-HAL-true,6-MX_FDCAN2_Init-FDCAN2-false-HAL-true,7-MX_TIM1_Init-TIM1-false-HAL-true,8-MX_TIM3_Init-TIM3-false-HAL-true,9-MX_TIM8_Init-TIM8-false-HAL-true,10-MX_TIM6_Init-TIM6-false-HAL-true,11-MX_TIM4_Init-TIM4-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
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RCC.ADCFreq_Value=20000000
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RCC.ADCFreq_Value=24000000
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RCC.AHB12Freq_Value=96000000
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RCC.AHB12Freq_Value=96000000
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RCC.AHB4Freq_Value=96000000
|
RCC.AHB4Freq_Value=96000000
|
||||||
RCC.APB1Freq_Value=96000000
|
RCC.APB1Freq_Value=96000000
|
||||||
@ -480,7 +487,7 @@ RCC.DAC1Freq_Value=32000
|
|||||||
RCC.DAC2Freq_Value=32000
|
RCC.DAC2Freq_Value=32000
|
||||||
RCC.DFSDM2ACLkFreq_Value=96000000
|
RCC.DFSDM2ACLkFreq_Value=96000000
|
||||||
RCC.DFSDM2Freq_Value=96000000
|
RCC.DFSDM2Freq_Value=96000000
|
||||||
RCC.DFSDMACLkFreq_Value=128000000
|
RCC.DFSDMACLkFreq_Value=12000000
|
||||||
RCC.DFSDMFreq_Value=96000000
|
RCC.DFSDMFreq_Value=96000000
|
||||||
RCC.DIVM1=2
|
RCC.DIVM1=2
|
||||||
RCC.DIVM2=2
|
RCC.DIVM2=2
|
||||||
@ -489,17 +496,19 @@ RCC.DIVN1=32
|
|||||||
RCC.DIVN2=20
|
RCC.DIVN2=20
|
||||||
RCC.DIVN3=8
|
RCC.DIVN3=8
|
||||||
RCC.DIVP1Freq_Value=192000000
|
RCC.DIVP1Freq_Value=192000000
|
||||||
RCC.DIVP2=12
|
RCC.DIVP2=10
|
||||||
RCC.DIVP2Freq_Value=20000000
|
RCC.DIVP2Freq_Value=24000000
|
||||||
RCC.DIVP3Freq_Value=96000000
|
RCC.DIVP3Freq_Value=96000000
|
||||||
RCC.DIVQ1=3
|
RCC.DIVQ1=32
|
||||||
RCC.DIVQ1Freq_Value=128000000
|
RCC.DIVQ1Freq_Value=12000000
|
||||||
RCC.DIVQ2Freq_Value=120000000
|
RCC.DIVQ2=20
|
||||||
|
RCC.DIVQ2Freq_Value=12000000
|
||||||
RCC.DIVQ3Freq_Value=96000000
|
RCC.DIVQ3Freq_Value=96000000
|
||||||
RCC.DIVR1Freq_Value=192000000
|
RCC.DIVR1=32
|
||||||
|
RCC.DIVR1Freq_Value=12000000
|
||||||
RCC.DIVR2Freq_Value=120000000
|
RCC.DIVR2Freq_Value=120000000
|
||||||
RCC.DIVR3=3
|
RCC.DIVR3=16
|
||||||
RCC.DIVR3Freq_Value=64000000
|
RCC.DIVR3Freq_Value=12000000
|
||||||
RCC.FDCANCLockSelection=RCC_FDCANCLKSOURCE_HSE
|
RCC.FDCANCLockSelection=RCC_FDCANCLKSOURCE_HSE
|
||||||
RCC.FDCANFreq_Value=24000000
|
RCC.FDCANFreq_Value=24000000
|
||||||
RCC.FMCFreq_Value=96000000
|
RCC.FMCFreq_Value=96000000
|
||||||
@ -510,12 +519,12 @@ RCC.HPRE=RCC_HCLK_DIV2
|
|||||||
RCC.HSE_VALUE=24000000
|
RCC.HSE_VALUE=24000000
|
||||||
RCC.I2C123Freq_Value=96000000
|
RCC.I2C123Freq_Value=96000000
|
||||||
RCC.I2C4Freq_Value=96000000
|
RCC.I2C4Freq_Value=96000000
|
||||||
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CDCPREFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,DAC1Freq_Value,DAC2Freq_Value,DFSDM2ACLkFreq_Value,DFSDM2Freq_Value,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1Freq_Value,DIVP2,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,FDCANCLockSelection,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI2AFreq_Value,SAI2BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
|
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CDCPREFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,DAC1Freq_Value,DAC2Freq_Value,DFSDM2ACLkFreq_Value,DFSDM2Freq_Value,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1Freq_Value,DIVP2,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,FDCANCLockSelection,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI2AFreq_Value,SAI2BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
|
||||||
RCC.LPTIM1Freq_Value=96000000
|
RCC.LPTIM1Freq_Value=96000000
|
||||||
RCC.LPTIM2Freq_Value=96000000
|
RCC.LPTIM2Freq_Value=96000000
|
||||||
RCC.LPTIM345Freq_Value=96000000
|
RCC.LPTIM345Freq_Value=96000000
|
||||||
RCC.LPUART1Freq_Value=96000000
|
RCC.LPUART1Freq_Value=96000000
|
||||||
RCC.LTDCFreq_Value=64000000
|
RCC.LTDCFreq_Value=12000000
|
||||||
RCC.MCO1PinFreq_Value=64000000
|
RCC.MCO1PinFreq_Value=64000000
|
||||||
RCC.MCO2PinFreq_Value=192000000
|
RCC.MCO2PinFreq_Value=192000000
|
||||||
RCC.PLL2FRACN=0
|
RCC.PLL2FRACN=0
|
||||||
@ -525,12 +534,12 @@ RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
|
|||||||
RCC.QSPIFreq_Value=96000000
|
RCC.QSPIFreq_Value=96000000
|
||||||
RCC.RNGFreq_Value=48000000
|
RCC.RNGFreq_Value=48000000
|
||||||
RCC.RTCFreq_Value=32000
|
RCC.RTCFreq_Value=32000
|
||||||
RCC.SAI1Freq_Value=128000000
|
RCC.SAI1Freq_Value=12000000
|
||||||
RCC.SAI2AFreq_Value=128000000
|
RCC.SAI2AFreq_Value=12000000
|
||||||
RCC.SAI2BFreq_Value=128000000
|
RCC.SAI2BFreq_Value=12000000
|
||||||
RCC.SDMMCFreq_Value=128000000
|
RCC.SDMMCFreq_Value=12000000
|
||||||
RCC.SPDIFRXFreq_Value=128000000
|
RCC.SPDIFRXFreq_Value=12000000
|
||||||
RCC.SPI123Freq_Value=128000000
|
RCC.SPI123Freq_Value=12000000
|
||||||
RCC.SPI45Freq_Value=96000000
|
RCC.SPI45Freq_Value=96000000
|
||||||
RCC.SPI6Freq_Value=96000000
|
RCC.SPI6Freq_Value=96000000
|
||||||
RCC.SWPMI1Freq_Value=96000000
|
RCC.SWPMI1Freq_Value=96000000
|
||||||
@ -538,10 +547,10 @@ RCC.SYSCLKFreq_VALUE=192000000
|
|||||||
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||||
RCC.Tim1OutputFreq_Value=96000000
|
RCC.Tim1OutputFreq_Value=96000000
|
||||||
RCC.Tim2OutputFreq_Value=96000000
|
RCC.Tim2OutputFreq_Value=96000000
|
||||||
RCC.TraceFreq_Value=192000000
|
RCC.TraceFreq_Value=12000000
|
||||||
RCC.USART16Freq_Value=96000000
|
RCC.USART16Freq_Value=96000000
|
||||||
RCC.USART234578Freq_Value=96000000
|
RCC.USART234578Freq_Value=96000000
|
||||||
RCC.USBFreq_Value=128000000
|
RCC.USBFreq_Value=12000000
|
||||||
RCC.VCO1OutputFreq_Value=384000000
|
RCC.VCO1OutputFreq_Value=384000000
|
||||||
RCC.VCO2OutputFreq_Value=240000000
|
RCC.VCO2OutputFreq_Value=240000000
|
||||||
RCC.VCO3OutputFreq_Value=192000000
|
RCC.VCO3OutputFreq_Value=192000000
|
||||||
|
@ -62,7 +62,9 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
|
|||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||||
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 1024K
|
RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* D1 domain AXI SRAM */
|
||||||
|
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K /* D2 domain AHB SRAM */
|
||||||
|
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K /* D3 domain AHB SRAM */
|
||||||
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
|
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
|
||||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K
|
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K
|
||||||
}
|
}
|
||||||
@ -135,36 +137,39 @@ SECTIONS
|
|||||||
/* used by the startup to initialize data */
|
/* used by the startup to initialize data */
|
||||||
_sidata = LOADADDR(.data);
|
_sidata = LOADADDR(.data);
|
||||||
|
|
||||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
/* D1 domain RAM section for DMA-accessible data */
|
||||||
|
.d1_data :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.d1_data) /* DMA-accessible data */
|
||||||
|
*(.d1_data*)
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >RAM_D1
|
||||||
|
|
||||||
|
/* Move .data and .bss to RAM_D1 instead of DTCMRAM */
|
||||||
.data :
|
.data :
|
||||||
{
|
{
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
_sdata = .; /* create a global symbol at data start */
|
_sdata = .; /* create a global symbol at data start */
|
||||||
*(.data) /* .data sections */
|
*(.data) /* .data sections */
|
||||||
*(.data*) /* .data* sections */
|
*(.data*) /* .data* sections */
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
_edata = .; /* define a global symbol at data end */
|
_edata = .; /* define a global symbol at data end */
|
||||||
} >DTCMRAM AT> FLASH
|
} >RAM_D1 AT> FLASH
|
||||||
|
|
||||||
|
|
||||||
/* Uninitialized data section */
|
|
||||||
. = ALIGN(4);
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
/* This is used by the startup in order to initialize the .bss secion */
|
_sbss = .;
|
||||||
_sbss = .; /* define a global symbol at bss start */
|
|
||||||
__bss_start__ = _sbss;
|
__bss_start__ = _sbss;
|
||||||
*(.bss)
|
*(.bss)
|
||||||
*(.bss*)
|
*(.bss*)
|
||||||
*(COMMON)
|
*(COMMON)
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
_ebss = .; /* define a global symbol at bss end */
|
_ebss = .;
|
||||||
__bss_end__ = _ebss;
|
__bss_end__ = _ebss;
|
||||||
} >DTCMRAM
|
} >RAM_D1
|
||||||
|
|
||||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
/* Keep stack in DTCMRAM for better performance */
|
||||||
._user_heap_stack :
|
._user_heap_stack :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
Loading…
x
Reference in New Issue
Block a user