From 1a517299a0deae9cf7525eb78e1277b40ce588a6 Mon Sep 17 00:00:00 2001 From: Oskar Date: Sun, 30 Mar 2025 10:47:13 +0200 Subject: [PATCH] Add CAN send logic and DIO mapping --- Software/Core/Inc/adc.h | 2 +- Software/Core/Inc/mappings.h | 233 ++++++++++++++++++++++----------- Software/Core/Inc/mappings_o.h | 160 ---------------------- Software/Core/Src/main.c | 104 ++++++++++++--- 4 files changed, 247 insertions(+), 252 deletions(-) delete mode 100644 Software/Core/Inc/mappings_o.h diff --git a/Software/Core/Inc/adc.h b/Software/Core/Inc/adc.h index 9ca60dc..3bfbcbd 100644 --- a/Software/Core/Inc/adc.h +++ b/Software/Core/Inc/adc.h @@ -35,7 +35,7 @@ extern "C" { extern ADC_HandleTypeDef hadc1; /* USER CODE BEGIN Private defines */ - +#define NUM_ADC_PINS 16 /* USER CODE END Private defines */ void MX_ADC1_Init(void); diff --git a/Software/Core/Inc/mappings.h b/Software/Core/Inc/mappings.h index cf7a2a8..6ebaea1 100644 --- a/Software/Core/Inc/mappings.h +++ b/Software/Core/Inc/mappings.h @@ -1,95 +1,176 @@ #ifndef MAPPINGS_H #define MAPPINGS_H -#define CURRENT_NODE FRONT_NODE +// CHOOSE ONE, comment the other or comment both and use -D SN_FRONT +#define SN_FRONT +//#define SN_REAR -#define IGRID_L1 1 -#define IGRID_L2 2 -#define IGRID_L3 3 -#define IGRID_L4 4 -#define IGRID_L5 5 -#define IGRID_L6 6 -#define IGRID_L7 7 -#define IGRID_L8 8 -#define IGRID_L9 9 -#define IGRID_L10 10 -#define IGRID_L11 11 -#define IGRID_L12 12 -#define IGRID_L13 13 -#define IGRID_L14 14 -#define IGRID_L15 15 -#define IGRID_L16 16 +#include +#include "main.h" -#define IGRID_R1 17 -#define IGRID_R2 18 -#define IGRID_R3 19 -#define IGRID_R4 20 -#define IGRID_R5 21 -#define IGRID_R6 22 -#define IGRID_R7 23 -#define IGRID_R8 24 -#define IGRID_R9 25 -#define IGRID_R10 26 -#define IGRID_R11 27 -#define IGRID_R12 28 -#define IGRID_R13 29 -#define IGRID_R14 30 -#define IGRID_R15 31 -#define IGRID_R16 32 +#define NUM_DIO_PINS 6 -// -// Node agnostic mappings: -// +static struct { + GPIO_TypeDef* port; + uint16_t pin; +} DIO_PIN_MAP[NUM_DIO_PINS] = { +/* 0 */ { .port = D1_IC_GPIO_Port, .pin = D1_IC_Pin}, +/* 1 */ { .port = D2_GPIO_Port, .pin = D2_Pin}, +/* 2 */ { .port = D3_GPIO_Port, .pin = D3_Pin}, +/* 3 */ { .port = D4_IC_GPIO_Port, .pin = D4_IC_Pin}, +/* 4 */ { .port = D5_GPIO_Port, .pin = D5_Pin}, +/* 5 */ { .port = D6_GPIO_Port, .pin = D6_Pin}, +}; -// NUR BEISPIEL!!!! -#define GET_GPIO_FROM_IGRID(igrid) \ - ((igrid) == IGRID_L1 ? A16_Pin : \ - (igrid) == IGRID_L2 ? A15_Pin : \ - (igrid) == IGRID_L3 ? A14_Pin : \ - (igrid) == IGRID_L4 ? A13_Pin : \ - (igrid) == IGRID_L5 ? A12_Pin : \ - (igrid) == IGRID_L6 ? A11_Pin : \ - ) +typedef enum { + L1 = 0, + L2 = 1, + L3 = 2, + L4 = 3, + L5 = 4, + L6 = 5, + L7 = 6, + L8 = 7, + R9 = 8, + RA = 9, + RB = 10, + RC = 11, + RD = 12, + RE = 13, + RF = 14, + R0 = 15, +} analog_pin_t; -// AUCH NUR BEISPIEL!! -#define GET_ADC_CHANNEL_FROM_GPIO(gpio) \ - ((gpio) == A16_Pin ? ADC_CHANNEL_9 : \ - (gpio) == A15_Pin ? ADC_CHANNEL_3 : \ - (gpio) == A14_Pin ? ADC_CHANNEL_7 : \ - (gpio) == A13_Pin ? ADC_CHANNEL_4 : \ - (gpio) == A12_Pin ? ADC_CHANNEL_10 : \ - (gpio) == A11_Pin ? ADC_CHANNEL_11 : \ - (gpio) == A10_Pin ? ADC_CHANNEL_12 : \ - ) +typedef enum { + L9 = 0, + LA = 1, + LC = 2, + R5 = 3, + R6 = 4, + R7 = 5, +} digital_pin_t; -// ADC1 GPIO to ADC_Channel macro -#define GET_ADC_CHANNEL_FROM_IGRID(igrid) \ - GET_ADC_CHANNEL_FROM_GPIO(GET_GPIO_FROM_IGRID(igrid)) +typedef enum { + LB = 0, + R8 = 1, +} freq_pin_t; -// Node specific mappings: -#if CURRENT_NODE == FRONT_NODE +typedef enum { + NONE = 0, // Not used + AIN = 1, // Analog in + DIN = 2, // Digital in + FIN = 3, // Frequency in + DOUT = 4, // Digital out + POUT = 5, // PWM out +} signal_type_t; - // Useful during development / for verification? - #define GET_NAME_FROM_IGRID(igrid) \ - ((igrid) == IGRID_L1 ? "WTPS1" : \ - (igrid) == IGRID_L2 ? "STS FL" : \ - ) +typedef struct { + signal_type_t type; - // @Oskar nicht sicher wie man das am bestem macht, da ja nicht jeder pin ein input is der auf CAN kommt, also wonach man das ordnen will - #define CAN_START_BIT_FROM_IGRID(igrid) \ - ((igrid) == IGRID_L1 ? 0 : \ - (igrid) == IGRID_L2 ? 1 : \ - ) + // PERIPHERY INFO + uint8_t channel; // ADC or PWM or Freq channel - // Hier würde ich dann weitere Defines machen für alles was dann das CAN frame bildet, - // Start Bit, Bit count, etc, conversion factor (also von physischer größe die wir im - // code bestimmen zu bits), quasi ne DBC mit defines. Abrufen macht man das dann mit macros + // CAN INFO + uint8_t start; // start bit + uint8_t length; // in bits -#elif CURRENT_NODE == REAR_NODE + // METADATA + float factor; // (phys_range/can_scale)/adc_quants + char name[16]; +} can_signal_t; + +typedef struct { + uint16_t can_id; + uint8_t dlc; + int8_t num_signals; // -1 => packet disabled + uint16_t period; // ms + can_signal_t signals[9]; +} can_pkt_t; + +#define NUM_TX_PKT 4 +#define ADQ (1<<12) + +#ifdef SN_FRONT + +static can_pkt_t CAN_SIGNAL_MAP[NUM_TX_PKT] = { + { + .can_id = 0x0D1, .dlc = 3, .num_signals = 7, .period = 100, .signals = { + { .type = DIN, .channel = R5, .start = 0, .length = 1, .factor = 1., .name = "LS L" }, + { .type = DIN, .channel = L9, .start = 1, .length = 1, .factor = 1., .name = "LS R" }, + { .type = DIN, .channel = LA, .start = 2, .length = 1, .factor = 1., .name = "SDC M pre BOTS" }, + { .type = DIN, .channel = LC, .start = 3, .length = 1, .factor = 1., .name = "SDC M post INS" }, + { .type = DIN, .channel = R7, .start = 4, .length = 1, .factor = 1., .name = "SDC M post BSPD" }, + + { .type = AIN, .channel = R0, .start = 8, .length = 8, .factor = ((512./2)/ADQ), .name = "BDTS FL" }, + { .type = AIN, .channel = L8, .start = 16, .length = 8, .factor = ((512./2)/ADQ), .name = "BDTS FR" }, + } + }, + { + .can_id = 0x0D3, .dlc = 7, .num_signals = 6, .period = 10, .signals = { + { .type = AIN, .channel = L1, .start = 0, .length = 8, .factor = (256./ADQ), .name = "APPS 1" }, + { .type = AIN, .channel = L2, .start = 8, .length = 8, .factor = (256./ADQ), .name = "APPS 2" }, + { .type = AIN, .channel = RA, .start = 16, .length = 8, .factor = ((512./2)/ADQ), .name = "BP F" }, + { .type = AIN, .channel = R9, .start = 24, .length = 12, .factor = 1., .name = "SAS" }, + { .type = FIN, .channel = R8, .start = 40, .length = 8, .factor = 1., .name = "WSS FL" }, + { .type = FIN, .channel = LB, .start = 48, .length = 8, .factor = 1., .name = "WSS FR" }, + } + }, + { + .can_id = 0x0D5, .dlc = 3, .num_signals = 2, .period = 10, .signals = { + { .type = AIN, .channel = RC, .start = 0, .length = 12, .factor = 1., .name = "DS FL" }, + { .type = AIN, .channel = L4, .start = 12, .length = 12, .factor = 1., .name = "DS FR" }, + } + }, + { + .can_id = 0x0D7, .dlc = 3, .num_signals = 2, .period = 1, .signals = { + { .type = AIN, .channel = RE, .start = 0, .length = 12, .factor = 1., .name = "SLS FL" }, + { .type = AIN, .channel = L6, .start = 12, .length = 12, .factor = 1., .name = "SLS FR" }, + } + } +}; #endif -#define FRONT_NODE 0 -#define REAR_NODE 1 +#ifdef SN_REAR + +static can_pkt_t CAN_SIGNAL_MAP[NUM_TX_PKT] = { + { + .can_id = 0x0D2, .dlc = 7, .num_signals = 9, .period = 100, .signals = { + { .type = DIN, .channel = L9, .start = 0, .length = 1, .factor = 1., .name = "ExtTSOn" }, + { .type = DIN, .channel = LA, .start = 1, .length = 1, .factor = 1., .name = "SDC M pre TSMS" }, + { .type = DIN, .channel = LC, .start = 2, .length = 1, .factor = 1., .name = "SDC M post TSMS" }, + + { .type = AIN, .channel = R0, .start = 8, .length = 8, .factor = ((512./2)/ADQ), .name = "BDTS RL" }, + { .type = AIN, .channel = L8, .start = 16, .length = 8, .factor = ((512./2)/ADQ), .name = "BDTS RR" }, + + { .type = AIN, .channel = R9, .start = 24, .length = 8, .factor = (256./ADQ), .name = "WT BAT" }, + { .type = AIN, .channel = RB, .start = 32, .length = 8, .factor = (256./ADQ), .name = "WT DT" }, + { .type = AIN, .channel = RD, .start = 40, .length = 8, .factor = (256./ADQ), .name = "WP BAT" }, + { .type = AIN, .channel = RF, .start = 48, .length = 8, .factor = (256./ADQ), .name = "WP DT" }, + } + }, + { + .can_id = 0x0D4, .dlc = 8, .num_signals = 7, .period = 10, .signals = { + { .type = AIN, .channel = L1, .start = 0, .length = 8, .factor = ((25.6/.1)/ADQ), .name = "EBS APS 1" }, + { .type = AIN, .channel = L2, .start = 8, .length = 8, .factor = ((25.6/.1)/ADQ), .name = "EBS APS 2" }, + { .type = AIN, .channel = RA, .start = 16, .length = 8, .factor = ((512./2)/ADQ), .name = "BP F" }, + { .type = FIN, .channel = R8, .start = 24, .length = 8, .factor = 1., .name = "WSS RL" }, + { .type = FIN, .channel = LB, .start = 32, .length = 8, .factor = 1., .name = "WSS RR" }, + { .type = AIN, .channel = RC, .start = 40, .length = 12, .factor = 1., .name = "DS RL" }, + { .type = AIN, .channel = L4, .start = 52, .length = 12, .factor = 1., .name = "DS RR" }, + } + }, + { + .can_id = 0x0D6, .dlc = 0, .num_signals = -1, .period = 10, .signals = {} + }, + { + .can_id = 0x0D8, .dlc = 3, .num_signals = 2, .period = 1, .signals = { + { .type = AIN, .channel = RE, .start = 0, .length = 12, .factor = 1., .name = "SLS RL" }, + { .type = AIN, .channel = L6, .start = 12, .length = 12, .factor = 1., .name = "SLS RR" }, + } + } +}; #endif + +#endif \ No newline at end of file diff --git a/Software/Core/Inc/mappings_o.h b/Software/Core/Inc/mappings_o.h deleted file mode 100644 index 4cca9db..0000000 --- a/Software/Core/Inc/mappings_o.h +++ /dev/null @@ -1,160 +0,0 @@ -#ifndef MAPPINGS_H -#define MAPPINGS_H - -// CHOOSE ONE, comment the other or comment both and use -D SN_FRONT -#define SN_FRONT -#define SN_REAR - -#include - -typedef enum { - L1 = 0, - L2 = 1, - L3 = 2, - L4 = 3, - L5 = 4, - L6 = 5, - L7 = 6, - L8 = 7, - R9 = 8, - RA = 9, - RB = 10, - RC = 11, - RD = 12, - RE = 13, - RF = 14, - R0 = 15, -} analog_pin_t; - -typedef enum { - L9 = 0, - LA = 1, - LC = 2, - R5 = 3, - R6 = 4, - R7 = 5, -} digital_pin_t; - -typedef enum { - LB = 0, - R8 = 1, -} freq_pin_t; - -typedef enum { - NONE = 0, // Not used - AIN = 1, // Analog in - DIN = 2, // Digital in - FIN = 3, // Frequency in - DOUT = 4, // Digital out - POUT = 5, // PWM out -} signal_type_t; - -typedef struct { - signal_type_t type; - - // PERIPHERY INFO - uint8_t channel; // ADC or PWM or Freq channel - - // CAN INFO - uint8_t start; // start bit - uint8_t length; // in bits - - // METADATA - float factor; // (phys_range/can_scale)/adc_quants - char name[16]; -} can_signal_t; - -typedef struct { - uint16_t can_id; - uint8_t dlc; - int8_t num_signals; // -1 => packet disabled - uint16_t period; // ms - can_signal_t signals[9]; -} can_pkt_t; - -#define ADQ (1<<12) - -#ifdef SN_FRONT - -static can_pkt_t CAN_SIGNAL_MAP[4] { - { - .can_id = 0x0D1, .dlc = 3, .num_signals = 7, .period = 100, .signals = { - { .type = DIN, .channel = R5, .start = 0, .length = 1, .factor = 1., .name = "LS L" }, - { .type = DIN, .channel = L9, .start = 1, .length = 1, .factor = 1., .name = "LS R" }, - { .type = DIN, .channel = LA, .start = 2, .length = 1, .factor = 1., .name = "SDC M pre BOTS" }, - { .type = DIN, .channel = LC, .start = 3, .length = 1, .factor = 1., .name = "SDC M post INS" }, - { .type = DIN, .channel = R7, .start = 4, .length = 1, .factor = 1., .name = "SDC M post BSPD" }, - - { .type = AIN, .channel = R0, .start = 8, .length = 8, .factor = ((512./2)/ADQ), .name = "BDTS FL" }, - { .type = AIN, .channel = L8, .start = 16, .length = 8, .factor = ((512./2)/ADQ), .name = "BDTS FR" }, - } - }, - { - .can_id = 0x0D3, .dlc = 7, .num_signals = 6, .period = 10, .signals = { - { .type = AIN, .channel = L1, .start = 0, .length = 8, .factor = (256./ADQ), .name = "APPS 1" }, - { .type = AIN, .channel = L2, .start = 8, .length = 8, .factor = (256./ADQ), .name = "APPS 2" }, - { .type = AIN, .channel = RA, .start = 16, .length = 8, .factor = ((512./2)/ADQ), .name = "BP F" }, - { .type = AIN, .channel = R9, .start = 24, .length = 12, .factor = 1., .name = "SAS" }, - { .type = FIN, .channel = R8, .start = 40, .length = 8, .factor = 1., .name = "WSS FL" }, - { .type = FIN, .channel = LB, .start = 48, .length = 8, .factor = 1., .name = "WSS FR" }, - } - }, - { - .can_id = 0x0D5, .dlc = 3, .num_signals = 2, .period = 10, .signals = { - { .type = AIN, .channel = RC, .start = 0, .length = 12, .factor = 1., .name = "DS FL" }, - { .type = AIN, .channel = L4, .start = 12, .length = 12, .factor = 1., .name = "DS FR" }, - } - }, - { - .can_id = 0x0D7, .dlc = 3, .num_signals = 2, .period = 1, .signals = { - { .type = AIN, .channel = RE, .start = 0, .length = 12, .factor = 1., .name = "SLS FL" }, - { .type = AIN, .channel = L6, .start = 12, .length = 12, .factor = 1., .name = "SLS FR" }, - } - } -}; - -#endif - -#ifdef SN_REAR - -static can_pkt_t CAN_SIGNAL_MAP[4] { - { - .can_id = 0x0D2, .dlc = 7, .num_signals = 9, .period = 100, .signals = { - { .type = DIN, .channel = L9, .start = 0, .length = 1, .factor = 1., .name = "ExtTSOn" }, - { .type = DIN, .channel = LA, .start = 1, .length = 1, .factor = 1., .name = "SDC M pre TSMS" }, - { .type = DIN, .channel = LC, .start = 2, .length = 1, .factor = 1., .name = "SDC M post TSMS" }, - - { .type = AIN, .channel = R0, .start = 8, .length = 8, .factor = ((512./2)/ADQ), .name = "BDTS RL" }, - { .type = AIN, .channel = L8, .start = 16, .length = 8, .factor = ((512./2)/ADQ), .name = "BDTS RR" }, - - { .type = AIN, .channel = R9, .start = 24, .length = 8, .factor = (256./ADQ), .name = "WT BAT" }, - { .type = AIN, .channel = RB, .start = 32, .length = 8, .factor = (256./ADQ), .name = "WT DT" }, - { .type = AIN, .channel = RD, .start = 40, .length = 8, .factor = (256./ADQ), .name = "WP BAT" }, - { .type = AIN, .channel = RF, .start = 48, .length = 8, .factor = (256./ADQ), .name = "WP DT" }, - } - }, - { - .can_id = 0x0D4, .dlc = 8, .num_signals = 7, .period = 10, .signals = { - { .type = AIN, .channel = L1, .start = 0, .length = 8, .factor = ((25.6/.1)/ADQ), .name = "EBS APS 1" }, - { .type = AIN, .channel = L2, .start = 8, .length = 8, .factor = ((25.6/.1)/ADQ), .name = "EBS APS 2" }, - { .type = AIN, .channel = RA, .start = 16, .length = 8, .factor = ((512./2)/ADQ), .name = "BP F" }, - { .type = FIN, .channel = R8, .start = 24, .length = 8, .factor = 1., .name = "WSS RL" }, - { .type = FIN, .channel = LB, .start = 32, .length = 8, .factor = 1., .name = "WSS RR" }, - { .type = AIN, .channel = RC, .start = 40, .length = 12, .factor = 1., .name = "DS RL" }, - { .type = AIN, .channel = L4, .start = 52, .length = 12, .factor = 1., .name = "DS RR" }, - } - }, - { - .can_id = 0x0D6, .dlc = 0, .num_signals = -1, .period = 10, .signals = {} - }, - { - .can_id = 0x0D8, .dlc = 3, .num_signals = 2, .period = 1, .signals = { - { .type = AIN, .channel = RE, .start = 0, .length = 12, .factor = 1., .name = "SLS RL" }, - { .type = AIN, .channel = L6, .start = 12, .length = 12, .factor = 1., .name = "SLS RR" }, - } - } -}; - -#endif - -#endif \ No newline at end of file diff --git a/Software/Core/Src/main.c b/Software/Core/Src/main.c index 124cd13..9520e2d 100644 --- a/Software/Core/Src/main.c +++ b/Software/Core/Src/main.c @@ -27,7 +27,7 @@ /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ - +#include "mappings.h" /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -49,7 +49,8 @@ /* USER CODE BEGIN PV */ /* Declare buffer in D1 domain SRAM */ -static uint16_t adc_values[16]; +static uint16_t adc_values[NUM_ADC_PINS]; +static uint8_t dio_values[NUM_DIO_PINS]; /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ @@ -108,31 +109,106 @@ int main(void) /* USER CODE BEGIN 2 */ if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED) != HAL_OK) - { Error_Handler(); - } - if (HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_values, 16) != HAL_OK) - { + if (HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_values, NUM_ADC_PINS) != HAL_OK) Error_Handler(); - } HAL_TIM_Base_Start(&htim6); + // CAN TX PREP + + FDCAN_TxHeaderTypeDef txHeader; + + // Prep the tx frame + txHeader.ErrorStateIndicator = FDCAN_ESI_PASSIVE; + txHeader.BitRateSwitch = FDCAN_BRS_OFF; + txHeader.FDFormat = FDCAN_CLASSIC_CAN; + txHeader.TxEventFifoControl = FDCAN_NO_TX_EVENTS; + txHeader.IdType = FDCAN_STANDARD_ID; + txHeader.Identifier = 0x0; + txHeader.TxFrameType = FDCAN_DATA_FRAME; + txHeader.DataLength = 8; + + if (HAL_FDCAN_ActivateNotification(&hfdcan1, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0) != HAL_OK) + Error_Handler(); + + if (HAL_FDCAN_ConfigGlobalFilter(&hfdcan1, FDCAN_REJECT, FDCAN_REJECT, + FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE) != HAL_OK) + Error_Handler(); + + // TODO: Add Filters and Rx Handler + + if (HAL_FDCAN_Start(&hfdcan1) != HAL_OK) + Error_Handler(); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ - while (1) + for (unsigned int mscounter = 0; 1; mscounter++) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ - HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_SET); - HAL_Delay(500); - HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_RESET); - HAL_Delay(500); + for (int di = 0; di < NUM_DIO_PINS; di++) { + dio_values[di] = HAL_GPIO_ReadPin( + DIO_PIN_MAP[di].port, + DIO_PIN_MAP[di].pin + ); + } + + for (int pi = 0; pi < NUM_TX_PKT; pi++) { + + can_pkt_t* pktinfo = &(CAN_SIGNAL_MAP[pi]); + + if (mscounter % pktinfo->period == 0) { + + txHeader.Identifier = pktinfo->can_id; + txHeader.DataLength = pktinfo->dlc; + uint64_t txData = 0; + + for (int si = 0; si < pktinfo->num_signals; si++) { + + can_signal_t* signal = &(pktinfo->signals[si]); + uint16_t value = 0; + switch (signal->type) { + case DIN: + value = dio_values[signal->channel]; + break; + + case AIN: + value = signal->factor * adc_values[signal->channel]; + break; + + case FIN: + /* NYI */ + break; + + default: + break; + } + + uint16_t mask = 0xFFFF >> (16 - signal->length); + txData |= ((uint64_t) (value & mask)) << (signal->start); + + } + + if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan1, &txHeader, (uint8_t*) &txData) != HAL_OK) + Error_Handler(); + + } + + if (mscounter >= 500) { + mscounter = 0; + HAL_GPIO_TogglePin(STATUS_G_GPIO_Port, STATUS_G_Pin); + } + + } + + // TODO: Move all this into a 1kHz timer callback! + HAL_Delay(1); + } /* USER CODE END 3 */ } @@ -229,9 +305,7 @@ void Error_Handler(void) /* User can add his own implementation to report the HAL error return state */ HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET); __disable_irq(); - while (1) - { - } + while (1); /* USER CODE END Error_Handler_Debug */ }