43 lines
1.6 KiB
C
43 lines
1.6 KiB
C
#include "PWM_control.h"
|
|
#include "stm32f3xx_hal_tim.h"
|
|
|
|
uint8_t powerground_status;
|
|
uint8_t battery_cooling_status;
|
|
//uint32_t powerground1_CCR, powerground2_CCR, battery_cooling_CCR;
|
|
|
|
TIM_HandleTypeDef* powerground, *battery_cooling;
|
|
|
|
/*
|
|
Pulse width modulation mode allows for generating a signal with a frequency determined by
|
|
the value of the TIMx_ARR register and a duty cycle determined by the value of the TIMx_CCRx register.
|
|
*/
|
|
|
|
void PWM_control_init(TIM_HandleTypeDef* pg1, TIM_HandleTypeDef* pg2, TIM_HandleTypeDef* bat_cool){
|
|
powerground_status = 0;
|
|
battery_cooling_status = 0;
|
|
|
|
HAL_TIM_PWM_Start(pg1, TIM_CHANNEL_1); //TIM15CH1
|
|
HAL_TIM_PWM_Start(pg2, TIM_CHANNEL_2); //TIM15CH2
|
|
HAL_TIM_PWM_Start(bat_cool, TIM_CHANNEL_3); //TIM1CH3
|
|
|
|
powerground = pg1;
|
|
battery_cooling = bat_cool;
|
|
__HAL_TIM_SET_COMPARE(powerground, TIM_CHANNEL_1, 2000);
|
|
__HAL_TIM_SET_COMPARE(powerground, TIM_CHANNEL_2, 2000);
|
|
//__HAL_TIM_SET_COMPARE(battery_cooling, TIM_CHANNEL_3, 2000);
|
|
}
|
|
|
|
/*
|
|
controls the duty cycle of the fans by setting the CCR of the channel percent/100 = x/ARR
|
|
*/
|
|
void PWM_powerground_control(uint8_t percent){
|
|
if (percent > 100) //something went wrong
|
|
return;
|
|
powerground_status = percent;
|
|
int ccr = 2000 + ((2000) * (percent/100.0));
|
|
__HAL_TIM_SET_COMPARE(powerground, TIM_CHANNEL_1, ccr);
|
|
__HAL_TIM_SET_COMPARE(powerground, TIM_CHANNEL_2, 2000 + ((2000) * (percent/100.0)));
|
|
//TIM15->CCR1 = (TIM15->ARR*POWERGROUND_MAX_DUTY_CYCLE-TIM15->ARR*POWERGROUND_MIN_DUTY_CYCLE) * (percent/100.0) + TIM15->ARR*POWERGROUND_MIN_DUTY_CYCLE;
|
|
}
|
|
|
|
void PWM_battery_cooling_control(uint8_t percent){} |