3704 lines
240 KiB
Plaintext
3704 lines
240 KiB
Plaintext
ARM GAS /tmp/cctLjoMV.s page 1
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1 .cpu cortex-m4
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2 .arch armv7e-m
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3 .fpu fpv4-sp-d16
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4 .eabi_attribute 27, 1
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5 .eabi_attribute 28, 1
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6 .eabi_attribute 20, 1
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7 .eabi_attribute 21, 1
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8 .eabi_attribute 23, 3
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9 .eabi_attribute 24, 1
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10 .eabi_attribute 25, 1
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11 .eabi_attribute 26, 1
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12 .eabi_attribute 30, 1
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13 .eabi_attribute 34, 1
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14 .eabi_attribute 18, 4
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15 .file "stm32f3xx_hal_uart_ex.c"
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16 .text
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17 .Ltext0:
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18 .cfi_sections .debug_frame
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19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c"
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20 .section .text.UARTEx_Wakeup_AddressConfig,"ax",%progbits
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21 .align 1
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22 .syntax unified
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23 .thumb
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24 .thumb_func
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26 UARTEx_Wakeup_AddressConfig:
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27 .LVL0:
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28 .LFB140:
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1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
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2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ******************************************************************************
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3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @file stm32f3xx_hal_uart_ex.c
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4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @author MCD Application Team
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5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended UART HAL module driver.
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6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This file provides firmware functions to manage the following extended
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7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
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8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + Initialization and de-initialization functions
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9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + Peripheral Control functions
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10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *
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11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *
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12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ******************************************************************************
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13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @attention
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14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *
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15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * Copyright (c) 2016 STMicroelectronics.
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16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * All rights reserved.
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17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *
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18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This software is licensed under terms that can be found in the LICENSE file
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19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * in the root directory of this software component.
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20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
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21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *
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22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ******************************************************************************
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23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim
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24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ==============================================================================
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25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### UART peripheral extended features #####
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26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ==============================================================================
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27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Declare a UART_HandleTypeDef handle structure.
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29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) For the UART RS485 Driver Enable mode, initialize the UART registers
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ARM GAS /tmp/cctLjoMV.s page 2
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31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** by calling the HAL_RS485Ex_Init() API.
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32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim
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34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ******************************************************************************
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35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
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36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Includes ------------------------------------------------------------------*/
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38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #include "stm32f3xx_hal.h"
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39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver
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41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{
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42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
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43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx UARTEx
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45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief UART Extended HAL module driver
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46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{
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47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
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48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #ifdef HAL_UART_MODULE_ENABLED
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50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private typedef -----------------------------------------------------------*/
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52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private define ------------------------------------------------------------*/
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53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private macros ------------------------------------------------------------*/
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55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private variables ---------------------------------------------------------*/
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56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private function prototypes -----------------------------------------------*/
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57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Private_Functions UARTEx Private Functions
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58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{
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59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
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60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelecti
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61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
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62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @}
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63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
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64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Exported functions --------------------------------------------------------*/
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66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions
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68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{
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69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
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70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions
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72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended Initialization and Configuration Functions
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73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *
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74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim
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75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ===============================================================================
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76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### Initialization and Configuration functions #####
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77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ===============================================================================
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78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..]
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79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
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80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** in asynchronous mode.
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81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) For the asynchronous mode the parameters below can be configured:
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82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Baud Rate
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83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Word Length
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84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Stop Bit
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85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Parity: If the parity is enabled, then the MSB bit of the data written
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86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** in the data register is transmitted but is changed by the parity bit.
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87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Hardware flow control
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ARM GAS /tmp/cctLjoMV.s page 3
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88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Receiver/transmitter modes
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89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Over Sampling Method
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90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) One-Bit Sampling Method
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91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) For the asynchronous mode, the following advanced features can be configured as well:
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92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) TX and/or RX pin level inversion
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93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) data logical level inversion
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94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX and TX pins swap
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95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX overrun detection disabling
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96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) DMA disabling on RX error
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97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) MSB first on communication line
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98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) auto Baud rate detection
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99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..]
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100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration
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101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** procedures (details for the procedures are available in reference manual).
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102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim
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104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Depending on the frame length defined by the M1 and M0 bits (7-bit,
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106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 8-bit or 9-bit), the possible UART formats are listed in the
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107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** following table.
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108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Table 1. UART frame format.
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110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** +-----------------------------------------------------------------------+
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111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | M1 bit | M0 bit | PCE bit | UART frame |
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112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------|
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113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 0 | 0 | | SB | 8 bit data | STB | |
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114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------|
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115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | |
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116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------|
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117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 1 | 0 | | SB | 9 bit data | STB | |
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118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------|
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119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | |
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120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------|
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121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 1 | 0 | 0 | | SB | 7 bit data | STB | |
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122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------|
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123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | |
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124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** +-----------------------------------------------------------------------+
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125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{
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127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
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128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
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130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Initialize the RS485 Driver enable feature according to the specified
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131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * parameters in the UART_InitTypeDef and creates the associated handle.
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132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
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133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Polarity Select the driver enable polarity.
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134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This parameter can be one of the following values:
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135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_DE_POLARITY_HIGH DE signal is active high
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136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_DE_POLARITY_LOW DE signal is active low
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137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param AssertionTime Driver Enable assertion time:
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138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 5-bit value defining the time between the activation of the DE (Driver Enable)
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139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * signal and the beginning of the start bit. It is expressed in sample time
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140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * units (1/8 or 1/16 bit time, depending on the oversampling rate)
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141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param DeassertionTime Driver Enable deassertion time:
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142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 5-bit value defining the time between the end of the last stop bit, in a
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143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * transmitted message, and the de-activation of the DE (Driver Enable) signal.
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144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the
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ARM GAS /tmp/cctLjoMV.s page 4
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145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * oversampling rate).
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146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status
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147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
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148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t Assertion
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149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t DeassertionTime)
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150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
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151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t temp;
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152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
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153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */
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154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart == NULL)
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155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
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156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR;
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157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
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158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable UART instance */
|
||
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance));
|
||
160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable polarity */
|
||
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DE_POLARITY(Polarity));
|
||
163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable assertion time */
|
||
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ASSERTIONTIME(AssertionTime));
|
||
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable deassertion time */
|
||
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime));
|
||
169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->gState == HAL_UART_STATE_RESET)
|
||
171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Allocate lock resource and initialize it */
|
||
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->Lock = HAL_UNLOCKED;
|
||
174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||
176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_InitCallbacksToDefault(huart);
|
||
177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->MspInitCallback == NULL)
|
||
179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->MspInitCallback = HAL_UART_MspInit;
|
||
181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init the low level hardware */
|
||
184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->MspInitCallback(huart);
|
||
185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #else
|
||
186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX */
|
||
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_UART_MspInit(huart);
|
||
188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
||
189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY;
|
||
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */
|
||
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart);
|
||
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the UART Communication parameters */
|
||
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (UART_SetConfig(huart) == HAL_ERROR)
|
||
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR;
|
||
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
ARM GAS /tmp/cctLjoMV.s page 5
|
||
|
||
|
||
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
|
||
203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_AdvFeatureConfig(huart);
|
||
205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */
|
||
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** SET_BIT(huart->Instance->CR3, USART_CR3_DEM);
|
||
209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the Driver Enable polarity */
|
||
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity);
|
||
212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the Driver Enable assertion and deassertion times */
|
||
214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS);
|
||
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS);
|
||
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp);
|
||
217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */
|
||
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart);
|
||
220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
|
||
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart));
|
||
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @}
|
||
227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group2 IO operation functions
|
||
230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended functions
|
||
231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *
|
||
232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim
|
||
233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ===============================================================================
|
||
234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### IO operation functions #####
|
||
235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ===============================================================================
|
||
236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** This subsection provides a set of Wakeup and FIFO mode related callback functions.
|
||
237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Wakeup from Stop mode Callback:
|
||
239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_WakeupCallback()
|
||
240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim
|
||
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{
|
||
243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief UART wakeup from Stop mode callback.
|
||
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval None
|
||
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
|
||
251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Prevent unused argument(s) compilation warning */
|
||
253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UNUSED(huart);
|
||
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
|
||
256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** the HAL_UARTEx_WakeupCallback can be implemented in the user file.
|
||
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
ARM GAS /tmp/cctLjoMV.s page 6
|
||
|
||
|
||
259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @}
|
||
263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions
|
||
266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended Peripheral Control functions
|
||
267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *
|
||
268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim
|
||
269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ===============================================================================
|
||
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### Peripheral Control functions #####
|
||
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ===============================================================================
|
||
272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] This section provides the following functions:
|
||
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address
|
||
274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** detection length to more than 4 bits for multiprocessor address mark wake up.
|
||
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode
|
||
276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** trigger: address match, Start Bit detection or RXNE bit status.
|
||
277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode
|
||
278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_DisableStopMode() API disables the above functionality
|
||
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] This subsection also provides a set of additional functions providing enhanced reception
|
||
281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** services to user. (For example, these functions allow application to handle use cases
|
||
282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** where number of data to be received is unknown).
|
||
283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Compared to standard reception services which only consider number of received
|
||
285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** data elements as reception completion criteria, these functions also consider additional ev
|
||
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** as triggers for updating reception status to caller :
|
||
287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Detection of inactivity period (RX line has not been active for a given period).
|
||
288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally
|
||
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** for 1 frame time, after last received byte.
|
||
290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX inactivity detected by RTO, i.e. line has been in idle state
|
||
291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** for a programmable time, after last received byte.
|
||
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Detection that a specific character has been received.
|
||
293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) There are two mode of transfer:
|
||
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Blocking mode: The reception is performed in polling mode, until either expected number
|
||
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** or till IDLE event occurs. Reception is handled only during function execution.
|
||
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** When function exits, no data reception could occur. HAL status and number of actually re
|
||
298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** are returned by function after finishing transfer.
|
||
299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Non-Blocking mode: The reception is performed using Interrupts or DMA.
|
||
300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** These API's return the HAL status.
|
||
301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The end of the data processing will be indicated through the
|
||
302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode.
|
||
303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_UARTEx_RxEventCallback() user callback will be executed during Receive process
|
||
304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_UART_ErrorCallback()user callback will be executed when a reception error is det
|
||
305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Blocking mode API:
|
||
307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle()
|
||
308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Non-Blocking mode API with Interrupt:
|
||
310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle_IT()
|
||
311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Non-Blocking mode API with DMA:
|
||
313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle_DMA()
|
||
314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim
|
||
ARM GAS /tmp/cctLjoMV.s page 7
|
||
|
||
|
||
316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{
|
||
317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief By default in multiprocessor mode, when the wake up method is set
|
||
321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to address mark, the UART handles only 4-bit long addresses detection;
|
||
322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * this API allows to enable longer addresses detection (6-, 7- or 8-bit
|
||
323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * long).
|
||
324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Addresses detection lengths are: 6-bit address detection in 7-bit data mode,
|
||
325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode.
|
||
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param AddressLength This parameter can be one of the following values:
|
||
328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address
|
||
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address
|
||
330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status
|
||
331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t Addres
|
||
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */
|
||
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart == NULL)
|
||
336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR;
|
||
338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the address length parameter */
|
||
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength));
|
||
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY;
|
||
344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */
|
||
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart);
|
||
347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the address length */
|
||
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength);
|
||
350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */
|
||
352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart);
|
||
353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState to Ready */
|
||
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart));
|
||
356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Set Wakeup from Stop mode interrupt flag selection.
|
||
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note It is the application responsibility to enable the interrupt used as
|
||
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * usart_wkup interrupt source before entering low-power mode.
|
||
362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param WakeUpSelection Address match, Start Bit detection or RXNE/RXFNE bit status.
|
||
364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This parameter can be one of the following values:
|
||
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_ADDRESS
|
||
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_STARTBIT
|
||
367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY
|
||
368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status
|
||
369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeD
|
||
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status = HAL_OK;
|
||
ARM GAS /tmp/cctLjoMV.s page 8
|
||
|
||
|
||
373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart;
|
||
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* check the wake-up from stop mode UART instance */
|
||
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance));
|
||
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* check the wake-up selection parameter */
|
||
378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent));
|
||
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */
|
||
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart);
|
||
382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY;
|
||
384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */
|
||
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart);
|
||
387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the wake-up selection scheme */
|
||
389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent);
|
||
390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS)
|
||
392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection);
|
||
394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */
|
||
397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart);
|
||
398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init tickstart for timeout management */
|
||
400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** tickstart = HAL_GetTick();
|
||
401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Wait until REACK flag is set */
|
||
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE)
|
||
404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_TIMEOUT;
|
||
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else
|
||
408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Initialize the UART State */
|
||
410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_READY;
|
||
411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */
|
||
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart);
|
||
415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status;
|
||
417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Enable UART Stop Mode.
|
||
421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE.
|
||
422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status
|
||
424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart)
|
||
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */
|
||
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart);
|
||
429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
ARM GAS /tmp/cctLjoMV.s page 9
|
||
|
||
|
||
430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set UESM bit */
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_UESM);
|
||
432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */
|
||
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart);
|
||
435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK;
|
||
437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Disable UART Stop Mode.
|
||
441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status
|
||
443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart)
|
||
445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */
|
||
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart);
|
||
448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Clear UESM bit */
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM);
|
||
451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */
|
||
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart);
|
||
454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK;
|
||
456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in blocking mode till either the expected number of data
|
||
460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * is received or an IDLE event occurs.
|
||
461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note HAL_OK is returned if reception is completed (expected number of data has been received)
|
||
462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * or if reception is stopped after IDLE event (less than the expected number of data has b
|
||
463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In this case, RxLen output parameter indicates number of data available in reception buf
|
||
464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M
|
||
465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the
|
||
466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData.
|
||
467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
|
||
469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received.
|
||
470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param RxLen Number of data elements finally received
|
||
471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * (could be lower than Size, in case reception ends on IDLE event)
|
||
472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Timeout Timeout duration expressed in ms (covers the whole reception sequence).
|
||
473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status
|
||
474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size
|
||
476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t Timeout)
|
||
477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint8_t *pdata8bits;
|
||
479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t *pdata16bits;
|
||
480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t uhMask;
|
||
481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart;
|
||
482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */
|
||
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY)
|
||
485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U))
|
||
ARM GAS /tmp/cctLjoMV.s page 10
|
||
|
||
|
||
487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR;
|
||
489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||
492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||
493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init tickstart for timeout management */
|
||
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** tickstart = HAL_GetTick();
|
||
498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferSize = Size;
|
||
500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount = Size;
|
||
501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Computation of UART mask to apply to RDR register */
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_MASK_COMPUTATION(huart);
|
||
504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
|
||
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
||
508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits = NULL;
|
||
510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData;
|
||
511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else
|
||
513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits = pData;
|
||
515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = NULL;
|
||
516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Initialize output number of received elements */
|
||
519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen = 0U;
|
||
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* as long as data have to be received */
|
||
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** while (huart->RxXferCount > 0U)
|
||
523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check if IDLE flag is set */
|
||
525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE))
|
||
526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Clear IDLE flag in ISR */
|
||
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
|
||
529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* If Set, but no data ever received, clear flag without exiting loop */
|
||
531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* If Set, and data has already been received, this means Idle Event is valid : End recepti
|
||
532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (*RxLen > 0U)
|
||
533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_IDLE;
|
||
535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY;
|
||
536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK;
|
||
538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check if RXNE flag is set */
|
||
542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE))
|
||
543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
ARM GAS /tmp/cctLjoMV.s page 11
|
||
|
||
|
||
544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (pdata8bits == NULL)
|
||
545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
|
||
547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++;
|
||
548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else
|
||
550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
|
||
552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++;
|
||
553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Increment number of received elements */
|
||
555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen += 1U;
|
||
556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount--;
|
||
557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check for the Timeout */
|
||
560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (Timeout != HAL_MAX_DELAY)
|
||
561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
|
||
563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY;
|
||
565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_TIMEOUT;
|
||
567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set number of received elements in output parameter : RxLen */
|
||
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen = huart->RxXferSize - huart->RxXferCount;
|
||
573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
|
||
574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY;
|
||
575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK;
|
||
577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else
|
||
579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY;
|
||
581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in interrupt mode till either the expected number of data
|
||
586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * is received or an IDLE event occurs.
|
||
587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Reception is initiated by this function call. Further progress of reception is achieved
|
||
588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to UART interrupts raised by RXNE and IDLE events. Callback is called at end of receptio
|
||
589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * number of received data elements.
|
||
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M
|
||
591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the
|
||
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData.
|
||
593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
|
||
595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received.
|
||
596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status
|
||
597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t S
|
||
599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status;
|
||
ARM GAS /tmp/cctLjoMV.s page 12
|
||
|
||
|
||
601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */
|
||
603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY)
|
||
604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U))
|
||
606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR;
|
||
608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set Reception type to reception till IDLE Event*/
|
||
611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = UART_Start_Receive_IT(huart, pData, Size);
|
||
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check Rx process has been successfully started */
|
||
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (status == HAL_OK)
|
||
618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||
620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||
623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else
|
||
625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of errors already pending when reception is started,
|
||
627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Interrupts may have already been raised and lead to reception abortion.
|
||
628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (Overrun error for instance).
|
||
629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
|
||
630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_ERROR;
|
||
631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status;
|
||
635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else
|
||
637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY;
|
||
639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in DMA mode till either the expected number
|
||
644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of data is received or an IDLE event occurs.
|
||
645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Reception is initiated by this function call. Further progress of reception is achieved
|
||
646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to DMA services, transferring automatically received data elements in user reception buf
|
||
647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * calling registered callbacks at half/end of reception. UART IDLE events are also used to
|
||
648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * reception phase as ended. In all cases, callback execution will indicate number of recei
|
||
649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When the UART parity is enabled (PCE = 1), the received data contain
|
||
650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the parity bit (MSB position).
|
||
651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M
|
||
652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the
|
||
653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData.
|
||
654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
|
||
656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received.
|
||
657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status
|
||
ARM GAS /tmp/cctLjoMV.s page 13
|
||
|
||
|
||
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t
|
||
660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status;
|
||
662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */
|
||
664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY)
|
||
665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U))
|
||
667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR;
|
||
669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set Reception type to reception till IDLE Event*/
|
||
672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||
673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = UART_Start_Receive_DMA(huart, pData, Size);
|
||
676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check Rx process has been successfully started */
|
||
678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (status == HAL_OK)
|
||
679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||
681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||
684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else
|
||
686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of errors already pending when reception is started,
|
||
688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Interrupts may have already been raised and lead to reception abortion.
|
||
689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (Overrun error for instance).
|
||
690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
|
||
691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_ERROR;
|
||
692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status;
|
||
696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else
|
||
698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY;
|
||
700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Provide Rx Event type that has lead to RxEvent callback execution.
|
||
705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When HAL_UARTEx_ReceiveToIdle_IT() or HAL_UARTEx_ReceiveToIdle_DMA() API are called, pro
|
||
706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of reception process is provided to application through calls of Rx Event callback (eith
|
||
707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * HAL_UARTEx_RxEventCallback() or user registered one). As several types of events could o
|
||
708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type
|
||
709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to Rx Event callback execution.
|
||
710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note This function is expected to be called within the user implementation of Rx Event Callba
|
||
711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * in order to provide the accurate value :
|
||
712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In Interrupt Mode :
|
||
713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has be
|
||
714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed
|
||
ARM GAS /tmp/cctLjoMV.s page 14
|
||
|
||
|
||
715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * received data is lower than expected one)
|
||
716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In DMA Mode :
|
||
717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has be
|
||
718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received
|
||
719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed
|
||
720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * received data is lower than expected one).
|
||
721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In DMA mode, RxEvent callback could be called several times;
|
||
722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * When DMA is configured in Normal Mode, HT event does not stop Reception process;
|
||
723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception proc
|
||
724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values)
|
||
726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart)
|
||
728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Return Rx Event type value, as stored in UART handle */
|
||
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (huart->RxEventType);
|
||
731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @}
|
||
735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @}
|
||
739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @addtogroup UARTEx_Private_Functions
|
||
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{
|
||
743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /**
|
||
746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detectio
|
||
747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle.
|
||
748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param WakeUpSelection UART wake up from stop mode parameters.
|
||
749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval None
|
||
750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */
|
||
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelecti
|
||
752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
29 .loc 1 752 1 view -0
|
||
30 .cfi_startproc
|
||
31 @ args = 0, pretend = 0, frame = 8
|
||
32 @ frame_needed = 0, uses_anonymous_args = 0
|
||
33 @ link register save eliminated.
|
||
34 .loc 1 752 1 is_stmt 0 view .LVU1
|
||
35 0000 82B0 sub sp, sp, #8
|
||
36 .cfi_def_cfa_offset 8
|
||
37 0002 02AB add r3, sp, #8
|
||
38 0004 03E90600 stmdb r3, {r1, r2}
|
||
753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength));
|
||
39 .loc 1 753 3 is_stmt 1 view .LVU2
|
||
754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the USART address length */
|
||
756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength);
|
||
40 .loc 1 756 3 view .LVU3
|
||
41 0008 0268 ldr r2, [r0]
|
||
42 000a 5368 ldr r3, [r2, #4]
|
||
43 000c 23F01003 bic r3, r3, #16
|
||
ARM GAS /tmp/cctLjoMV.s page 15
|
||
|
||
|
||
44 0010 BDF80410 ldrh r1, [sp, #4]
|
||
45 0014 0B43 orrs r3, r3, r1
|
||
46 0016 5360 str r3, [r2, #4]
|
||
757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the USART address node */
|
||
759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_AD
|
||
47 .loc 1 759 3 view .LVU4
|
||
48 0018 0268 ldr r2, [r0]
|
||
49 001a 5368 ldr r3, [r2, #4]
|
||
50 001c 23F07F43 bic r3, r3, #-16777216
|
||
51 0020 9DF80610 ldrb r1, [sp, #6] @ zero_extendqisi2
|
||
52 0024 43EA0163 orr r3, r3, r1, lsl #24
|
||
53 0028 5360 str r3, [r2, #4]
|
||
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
54 .loc 1 760 1 is_stmt 0 view .LVU5
|
||
55 002a 02B0 add sp, sp, #8
|
||
56 .cfi_def_cfa_offset 0
|
||
57 @ sp needed
|
||
58 002c 7047 bx lr
|
||
59 .cfi_endproc
|
||
60 .LFE140:
|
||
62 .section .text.HAL_RS485Ex_Init,"ax",%progbits
|
||
63 .align 1
|
||
64 .global HAL_RS485Ex_Init
|
||
65 .syntax unified
|
||
66 .thumb
|
||
67 .thumb_func
|
||
69 HAL_RS485Ex_Init:
|
||
70 .LVL1:
|
||
71 .LFB130:
|
||
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t temp;
|
||
72 .loc 1 150 1 is_stmt 1 view -0
|
||
73 .cfi_startproc
|
||
74 @ args = 0, pretend = 0, frame = 0
|
||
75 @ frame_needed = 0, uses_anonymous_args = 0
|
||
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
76 .loc 1 151 3 view .LVU7
|
||
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
77 .loc 1 154 3 view .LVU8
|
||
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
78 .loc 1 154 6 is_stmt 0 view .LVU9
|
||
79 0000 0028 cmp r0, #0
|
||
80 0002 3AD0 beq .L7
|
||
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t temp;
|
||
81 .loc 1 150 1 view .LVU10
|
||
82 0004 F8B5 push {r3, r4, r5, r6, r7, lr}
|
||
83 .cfi_def_cfa_offset 24
|
||
84 .cfi_offset 3, -24
|
||
85 .cfi_offset 4, -20
|
||
86 .cfi_offset 5, -16
|
||
87 .cfi_offset 6, -12
|
||
88 .cfi_offset 7, -8
|
||
89 .cfi_offset 14, -4
|
||
90 0006 0F46 mov r7, r1
|
||
91 0008 1646 mov r6, r2
|
||
92 000a 1D46 mov r5, r3
|
||
93 000c 0446 mov r4, r0
|
||
ARM GAS /tmp/cctLjoMV.s page 16
|
||
|
||
|
||
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
94 .loc 1 159 3 is_stmt 1 view .LVU11
|
||
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
95 .loc 1 162 3 view .LVU12
|
||
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
96 .loc 1 165 3 view .LVU13
|
||
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
97 .loc 1 168 3 view .LVU14
|
||
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
98 .loc 1 170 3 view .LVU15
|
||
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
99 .loc 1 170 12 is_stmt 0 view .LVU16
|
||
100 000e C36F ldr r3, [r0, #124]
|
||
101 .LVL2:
|
||
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
102 .loc 1 170 6 view .LVU17
|
||
103 0010 53B3 cbz r3, .L12
|
||
104 .LVL3:
|
||
105 .L5:
|
||
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
106 .loc 1 191 3 is_stmt 1 view .LVU18
|
||
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
107 .loc 1 191 17 is_stmt 0 view .LVU19
|
||
108 0012 2423 movs r3, #36
|
||
109 0014 E367 str r3, [r4, #124]
|
||
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
110 .loc 1 194 3 is_stmt 1 view .LVU20
|
||
111 0016 2268 ldr r2, [r4]
|
||
112 0018 1368 ldr r3, [r2]
|
||
113 001a 23F00103 bic r3, r3, #1
|
||
114 001e 1360 str r3, [r2]
|
||
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
115 .loc 1 197 3 view .LVU21
|
||
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
116 .loc 1 197 7 is_stmt 0 view .LVU22
|
||
117 0020 2046 mov r0, r4
|
||
118 0022 FFF7FEFF bl UART_SetConfig
|
||
119 .LVL4:
|
||
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
120 .loc 1 197 6 discriminator 1 view .LVU23
|
||
121 0026 0128 cmp r0, #1
|
||
122 0028 1DD0 beq .L4
|
||
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
123 .loc 1 202 3 is_stmt 1 view .LVU24
|
||
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
124 .loc 1 202 26 is_stmt 0 view .LVU25
|
||
125 002a 636A ldr r3, [r4, #36]
|
||
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
126 .loc 1 202 6 view .LVU26
|
||
127 002c 0BBB cbnz r3, .L13
|
||
128 .L6:
|
||
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
129 .loc 1 208 3 is_stmt 1 view .LVU27
|
||
130 002e 2268 ldr r2, [r4]
|
||
131 0030 9368 ldr r3, [r2, #8]
|
||
132 0032 43F48043 orr r3, r3, #16384
|
||
133 0036 9360 str r3, [r2, #8]
|
||
ARM GAS /tmp/cctLjoMV.s page 17
|
||
|
||
|
||
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
134 .loc 1 211 3 view .LVU28
|
||
135 0038 2268 ldr r2, [r4]
|
||
136 003a 9368 ldr r3, [r2, #8]
|
||
137 003c 23F40043 bic r3, r3, #32768
|
||
138 0040 3B43 orrs r3, r3, r7
|
||
139 0042 9360 str r3, [r2, #8]
|
||
214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS);
|
||
140 .loc 1 214 3 view .LVU29
|
||
141 .LVL5:
|
||
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp);
|
||
142 .loc 1 215 3 view .LVU30
|
||
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp);
|
||
143 .loc 1 215 28 is_stmt 0 view .LVU31
|
||
144 0044 2D04 lsls r5, r5, #16
|
||
145 .LVL6:
|
||
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp);
|
||
146 .loc 1 215 8 view .LVU32
|
||
147 0046 45EA4652 orr r2, r5, r6, lsl #21
|
||
148 .LVL7:
|
||
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
149 .loc 1 216 3 is_stmt 1 view .LVU33
|
||
150 004a 2168 ldr r1, [r4]
|
||
151 004c 0B68 ldr r3, [r1]
|
||
152 004e 6FF31943 bfc r3, #16, #10
|
||
153 0052 1343 orrs r3, r3, r2
|
||
154 0054 0B60 str r3, [r1]
|
||
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
155 .loc 1 219 3 view .LVU34
|
||
156 0056 2268 ldr r2, [r4]
|
||
157 .LVL8:
|
||
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
158 .loc 1 219 3 is_stmt 0 view .LVU35
|
||
159 0058 1368 ldr r3, [r2]
|
||
160 005a 43F00103 orr r3, r3, #1
|
||
161 005e 1360 str r3, [r2]
|
||
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
162 .loc 1 222 3 is_stmt 1 view .LVU36
|
||
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
163 .loc 1 222 11 is_stmt 0 view .LVU37
|
||
164 0060 2046 mov r0, r4
|
||
165 0062 FFF7FEFF bl UART_CheckIdleState
|
||
166 .LVL9:
|
||
167 .L4:
|
||
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
168 .loc 1 223 1 view .LVU38
|
||
169 0066 F8BD pop {r3, r4, r5, r6, r7, pc}
|
||
170 .LVL10:
|
||
171 .L12:
|
||
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
172 .loc 1 173 5 is_stmt 1 view .LVU39
|
||
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
173 .loc 1 173 17 is_stmt 0 view .LVU40
|
||
174 0068 80F87830 strb r3, [r0, #120]
|
||
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
||
175 .loc 1 187 5 is_stmt 1 view .LVU41
|
||
176 006c FFF7FEFF bl HAL_UART_MspInit
|
||
ARM GAS /tmp/cctLjoMV.s page 18
|
||
|
||
|
||
177 .LVL11:
|
||
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
||
178 .loc 1 187 5 is_stmt 0 view .LVU42
|
||
179 0070 CFE7 b .L5
|
||
180 .L13:
|
||
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
181 .loc 1 204 5 is_stmt 1 view .LVU43
|
||
182 0072 2046 mov r0, r4
|
||
183 0074 FFF7FEFF bl UART_AdvFeatureConfig
|
||
184 .LVL12:
|
||
185 0078 D9E7 b .L6
|
||
186 .LVL13:
|
||
187 .L7:
|
||
188 .cfi_def_cfa_offset 0
|
||
189 .cfi_restore 3
|
||
190 .cfi_restore 4
|
||
191 .cfi_restore 5
|
||
192 .cfi_restore 6
|
||
193 .cfi_restore 7
|
||
194 .cfi_restore 14
|
||
156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
195 .loc 1 156 12 is_stmt 0 view .LVU44
|
||
196 007a 0120 movs r0, #1
|
||
197 .LVL14:
|
||
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
198 .loc 1 223 1 view .LVU45
|
||
199 007c 7047 bx lr
|
||
200 .cfi_endproc
|
||
201 .LFE130:
|
||
203 .section .text.HAL_UARTEx_WakeupCallback,"ax",%progbits
|
||
204 .align 1
|
||
205 .weak HAL_UARTEx_WakeupCallback
|
||
206 .syntax unified
|
||
207 .thumb
|
||
208 .thumb_func
|
||
210 HAL_UARTEx_WakeupCallback:
|
||
211 .LVL15:
|
||
212 .LFB131:
|
||
251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Prevent unused argument(s) compilation warning */
|
||
213 .loc 1 251 1 is_stmt 1 view -0
|
||
214 .cfi_startproc
|
||
215 @ args = 0, pretend = 0, frame = 0
|
||
216 @ frame_needed = 0, uses_anonymous_args = 0
|
||
217 @ link register save eliminated.
|
||
253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
218 .loc 1 253 3 view .LVU47
|
||
258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
219 .loc 1 258 1 is_stmt 0 view .LVU48
|
||
220 0000 7047 bx lr
|
||
221 .cfi_endproc
|
||
222 .LFE131:
|
||
224 .section .text.HAL_MultiProcessorEx_AddressLength_Set,"ax",%progbits
|
||
225 .align 1
|
||
226 .global HAL_MultiProcessorEx_AddressLength_Set
|
||
227 .syntax unified
|
||
228 .thumb
|
||
229 .thumb_func
|
||
ARM GAS /tmp/cctLjoMV.s page 19
|
||
|
||
|
||
231 HAL_MultiProcessorEx_AddressLength_Set:
|
||
232 .LVL16:
|
||
233 .LFB132:
|
||
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */
|
||
234 .loc 1 333 1 is_stmt 1 view -0
|
||
235 .cfi_startproc
|
||
236 @ args = 0, pretend = 0, frame = 0
|
||
237 @ frame_needed = 0, uses_anonymous_args = 0
|
||
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
238 .loc 1 335 3 view .LVU50
|
||
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
239 .loc 1 335 6 is_stmt 0 view .LVU51
|
||
240 0000 B8B1 cbz r0, .L17
|
||
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */
|
||
241 .loc 1 333 1 view .LVU52
|
||
242 0002 08B5 push {r3, lr}
|
||
243 .cfi_def_cfa_offset 8
|
||
244 .cfi_offset 3, -8
|
||
245 .cfi_offset 14, -4
|
||
246 0004 0346 mov r3, r0
|
||
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
247 .loc 1 341 3 is_stmt 1 view .LVU53
|
||
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
248 .loc 1 343 3 view .LVU54
|
||
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
249 .loc 1 343 17 is_stmt 0 view .LVU55
|
||
250 0006 2422 movs r2, #36
|
||
251 0008 C267 str r2, [r0, #124]
|
||
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
252 .loc 1 346 3 is_stmt 1 view .LVU56
|
||
253 000a 0068 ldr r0, [r0]
|
||
254 .LVL17:
|
||
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
255 .loc 1 346 3 is_stmt 0 view .LVU57
|
||
256 000c 0268 ldr r2, [r0]
|
||
257 000e 22F00102 bic r2, r2, #1
|
||
258 0012 0260 str r2, [r0]
|
||
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
259 .loc 1 349 3 is_stmt 1 view .LVU58
|
||
260 0014 1868 ldr r0, [r3]
|
||
261 0016 4268 ldr r2, [r0, #4]
|
||
262 0018 22F01002 bic r2, r2, #16
|
||
263 001c 1143 orrs r1, r1, r2
|
||
264 .LVL18:
|
||
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
265 .loc 1 349 3 is_stmt 0 view .LVU59
|
||
266 001e 4160 str r1, [r0, #4]
|
||
352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
267 .loc 1 352 3 is_stmt 1 view .LVU60
|
||
268 0020 1968 ldr r1, [r3]
|
||
269 0022 0A68 ldr r2, [r1]
|
||
270 0024 42F00102 orr r2, r2, #1
|
||
271 0028 0A60 str r2, [r1]
|
||
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
272 .loc 1 355 3 view .LVU61
|
||
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
273 .loc 1 355 11 is_stmt 0 view .LVU62
|
||
ARM GAS /tmp/cctLjoMV.s page 20
|
||
|
||
|
||
274 002a 1846 mov r0, r3
|
||
275 002c FFF7FEFF bl UART_CheckIdleState
|
||
276 .LVL19:
|
||
356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
277 .loc 1 356 1 view .LVU63
|
||
278 0030 08BD pop {r3, pc}
|
||
279 .LVL20:
|
||
280 .L17:
|
||
281 .cfi_def_cfa_offset 0
|
||
282 .cfi_restore 3
|
||
283 .cfi_restore 14
|
||
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
284 .loc 1 337 12 view .LVU64
|
||
285 0032 0120 movs r0, #1
|
||
286 .LVL21:
|
||
356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
287 .loc 1 356 1 view .LVU65
|
||
288 0034 7047 bx lr
|
||
289 .cfi_endproc
|
||
290 .LFE132:
|
||
292 .section .text.HAL_UARTEx_StopModeWakeUpSourceConfig,"ax",%progbits
|
||
293 .align 1
|
||
294 .global HAL_UARTEx_StopModeWakeUpSourceConfig
|
||
295 .syntax unified
|
||
296 .thumb
|
||
297 .thumb_func
|
||
299 HAL_UARTEx_StopModeWakeUpSourceConfig:
|
||
300 .LVL22:
|
||
301 .LFB133:
|
||
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status = HAL_OK;
|
||
302 .loc 1 371 1 is_stmt 1 view -0
|
||
303 .cfi_startproc
|
||
304 @ args = 0, pretend = 0, frame = 8
|
||
305 @ frame_needed = 0, uses_anonymous_args = 0
|
||
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status = HAL_OK;
|
||
306 .loc 1 371 1 is_stmt 0 view .LVU67
|
||
307 0000 10B5 push {r4, lr}
|
||
308 .cfi_def_cfa_offset 8
|
||
309 .cfi_offset 4, -8
|
||
310 .cfi_offset 14, -4
|
||
311 0002 84B0 sub sp, sp, #16
|
||
312 .cfi_def_cfa_offset 24
|
||
313 0004 04AB add r3, sp, #16
|
||
314 0006 03E90600 stmdb r3, {r1, r2}
|
||
372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart;
|
||
315 .loc 1 372 3 is_stmt 1 view .LVU68
|
||
316 .LVL23:
|
||
373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
317 .loc 1 373 3 view .LVU69
|
||
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* check the wake-up selection parameter */
|
||
318 .loc 1 376 3 view .LVU70
|
||
378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
319 .loc 1 378 3 view .LVU71
|
||
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
320 .loc 1 381 3 view .LVU72
|
||
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
321 .loc 1 381 3 view .LVU73
|
||
ARM GAS /tmp/cctLjoMV.s page 21
|
||
|
||
|
||
322 000a 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2
|
||
323 000e 012B cmp r3, #1
|
||
324 0010 33D0 beq .L26
|
||
325 0012 0446 mov r4, r0
|
||
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
326 .loc 1 381 3 discriminator 2 view .LVU74
|
||
327 0014 0123 movs r3, #1
|
||
328 0016 80F87830 strb r3, [r0, #120]
|
||
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
329 .loc 1 381 3 discriminator 2 view .LVU75
|
||
383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
330 .loc 1 383 3 view .LVU76
|
||
383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
331 .loc 1 383 17 is_stmt 0 view .LVU77
|
||
332 001a 2423 movs r3, #36
|
||
333 001c C367 str r3, [r0, #124]
|
||
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
334 .loc 1 386 3 is_stmt 1 view .LVU78
|
||
335 001e 0268 ldr r2, [r0]
|
||
336 0020 1368 ldr r3, [r2]
|
||
337 0022 23F00103 bic r3, r3, #1
|
||
338 0026 1360 str r3, [r2]
|
||
389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
339 .loc 1 389 3 view .LVU79
|
||
340 0028 0168 ldr r1, [r0]
|
||
341 002a 8B68 ldr r3, [r1, #8]
|
||
342 002c 23F44013 bic r3, r3, #3145728
|
||
343 0030 029A ldr r2, [sp, #8]
|
||
344 0032 1343 orrs r3, r3, r2
|
||
345 0034 8B60 str r3, [r1, #8]
|
||
391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
346 .loc 1 391 3 view .LVU80
|
||
391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
347 .loc 1 391 6 is_stmt 0 view .LVU81
|
||
348 0036 A2B1 cbz r2, .L29
|
||
349 .LVL24:
|
||
350 .L24:
|
||
397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
351 .loc 1 397 3 is_stmt 1 view .LVU82
|
||
352 0038 2268 ldr r2, [r4]
|
||
353 003a 1368 ldr r3, [r2]
|
||
354 003c 43F00103 orr r3, r3, #1
|
||
355 0040 1360 str r3, [r2]
|
||
400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
356 .loc 1 400 3 view .LVU83
|
||
400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
357 .loc 1 400 15 is_stmt 0 view .LVU84
|
||
358 0042 FFF7FEFF bl HAL_GetTick
|
||
359 .LVL25:
|
||
360 0046 0346 mov r3, r0
|
||
361 .LVL26:
|
||
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
362 .loc 1 403 3 is_stmt 1 view .LVU85
|
||
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
363 .loc 1 403 7 is_stmt 0 view .LVU86
|
||
364 0048 6FF07E42 mvn r2, #-33554432
|
||
365 004c 0092 str r2, [sp]
|
||
ARM GAS /tmp/cctLjoMV.s page 22
|
||
|
||
|
||
366 004e 0022 movs r2, #0
|
||
367 0050 4FF48001 mov r1, #4194304
|
||
368 0054 2046 mov r0, r4
|
||
369 .LVL27:
|
||
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
370 .loc 1 403 7 view .LVU87
|
||
371 0056 FFF7FEFF bl UART_WaitOnFlagUntilTimeout
|
||
372 .LVL28:
|
||
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
373 .loc 1 403 6 discriminator 1 view .LVU88
|
||
374 005a 40B9 cbnz r0, .L27
|
||
410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
375 .loc 1 410 5 is_stmt 1 view .LVU89
|
||
410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
376 .loc 1 410 19 is_stmt 0 view .LVU90
|
||
377 005c 2023 movs r3, #32
|
||
378 005e E367 str r3, [r4, #124]
|
||
379 0060 06E0 b .L25
|
||
380 .LVL29:
|
||
381 .L29:
|
||
393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
382 .loc 1 393 5 is_stmt 1 view .LVU91
|
||
383 0062 04AB add r3, sp, #16
|
||
384 0064 13E90600 ldmdb r3, {r1, r2}
|
||
385 0068 FFF7FEFF bl UARTEx_Wakeup_AddressConfig
|
||
386 .LVL30:
|
||
393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
387 .loc 1 393 5 is_stmt 0 view .LVU92
|
||
388 006c E4E7 b .L24
|
||
389 .LVL31:
|
||
390 .L27:
|
||
405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
391 .loc 1 405 12 view .LVU93
|
||
392 006e 0320 movs r0, #3
|
||
393 .L25:
|
||
394 .LVL32:
|
||
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
395 .loc 1 414 3 is_stmt 1 view .LVU94
|
||
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
396 .loc 1 414 3 view .LVU95
|
||
397 0070 0023 movs r3, #0
|
||
398 0072 84F87830 strb r3, [r4, #120]
|
||
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
399 .loc 1 414 3 view .LVU96
|
||
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
400 .loc 1 416 3 view .LVU97
|
||
401 .LVL33:
|
||
402 .L23:
|
||
417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
403 .loc 1 417 1 is_stmt 0 view .LVU98
|
||
404 0076 04B0 add sp, sp, #16
|
||
405 .cfi_remember_state
|
||
406 .cfi_def_cfa_offset 8
|
||
407 @ sp needed
|
||
408 0078 10BD pop {r4, pc}
|
||
409 .LVL34:
|
||
410 .L26:
|
||
ARM GAS /tmp/cctLjoMV.s page 23
|
||
|
||
|
||
411 .cfi_restore_state
|
||
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
412 .loc 1 381 3 discriminator 1 view .LVU99
|
||
413 007a 0220 movs r0, #2
|
||
414 .LVL35:
|
||
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
415 .loc 1 381 3 discriminator 1 view .LVU100
|
||
416 007c FBE7 b .L23
|
||
417 .cfi_endproc
|
||
418 .LFE133:
|
||
420 .section .text.HAL_UARTEx_EnableStopMode,"ax",%progbits
|
||
421 .align 1
|
||
422 .global HAL_UARTEx_EnableStopMode
|
||
423 .syntax unified
|
||
424 .thumb
|
||
425 .thumb_func
|
||
427 HAL_UARTEx_EnableStopMode:
|
||
428 .LVL36:
|
||
429 .LFB134:
|
||
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */
|
||
430 .loc 1 426 1 is_stmt 1 view -0
|
||
431 .cfi_startproc
|
||
432 @ args = 0, pretend = 0, frame = 0
|
||
433 @ frame_needed = 0, uses_anonymous_args = 0
|
||
434 @ link register save eliminated.
|
||
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
435 .loc 1 428 3 view .LVU102
|
||
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
436 .loc 1 428 3 view .LVU103
|
||
437 0000 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2
|
||
438 0004 012B cmp r3, #1
|
||
439 0006 10D0 beq .L33
|
||
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
440 .loc 1 428 3 discriminator 2 view .LVU104
|
||
441 0008 0123 movs r3, #1
|
||
442 000a 80F87830 strb r3, [r0, #120]
|
||
443 .L32:
|
||
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
444 .loc 1 428 3 discriminator 3 view .LVU105
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
445 .loc 1 431 3 discriminator 1 view .LVU106
|
||
446 .LBB22:
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
447 .loc 1 431 3 discriminator 1 view .LVU107
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
448 .loc 1 431 3 discriminator 1 view .LVU108
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
449 .loc 1 431 3 discriminator 1 view .LVU109
|
||
450 000e 0268 ldr r2, [r0]
|
||
451 .LVL37:
|
||
452 .LBB23:
|
||
453 .LBI23:
|
||
454 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
|
||
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
|
||
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
|
||
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
|
||
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
|
||
ARM GAS /tmp/cctLjoMV.s page 24
|
||
|
||
|
||
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
|
||
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
|
||
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
|
||
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
|
||
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
||
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
|
||
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
|
||
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
|
||
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
|
||
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
|
||
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
|
||
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
|
||
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
|
||
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
|
||
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
|
||
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
|
||
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
|
||
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
|
||
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
|
||
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
|
||
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
|
||
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
|
||
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
|
||
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
|
||
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
|
||
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
|
||
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
|
||
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
|
||
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
|
||
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
|
||
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
|
||
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
|
||
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
|
||
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
|
||
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
|
||
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
|
||
ARM GAS /tmp/cctLjoMV.s page 25
|
||
|
||
|
||
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
|
||
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
|
||
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
|
||
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
|
||
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
|
||
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
|
||
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
|
||
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
|
||
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
|
||
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
|
||
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
|
||
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
|
||
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
|
||
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
|
||
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
|
||
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
|
||
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
|
||
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
|
||
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
|
||
ARM GAS /tmp/cctLjoMV.s page 26
|
||
|
||
|
||
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
|
||
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
|
||
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
|
||
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
|
||
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
|
||
130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
|
||
132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
|
||
137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
|
||
141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
|
||
143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
144:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
|
||
148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
|
||
149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
|
||
150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
|
||
152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
154:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
|
||
156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
158:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
159:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
|
||
163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
|
||
164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
|
||
165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
|
||
167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
169:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
|
||
171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
174:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
175:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
ARM GAS /tmp/cctLjoMV.s page 27
|
||
|
||
|
||
176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
|
||
178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
|
||
179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
|
||
180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
|
||
182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
|
||
184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
185:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
186:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
|
||
190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
|
||
191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
|
||
192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
|
||
194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
|
||
196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
198:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
199:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
|
||
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
|
||
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
|
||
204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
|
||
206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
208:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
|
||
210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
213:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
|
||
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
|
||
217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
|
||
218:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
|
||
220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
222:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
|
||
224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
227:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
|
||
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
|
||
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
|
||
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
ARM GAS /tmp/cctLjoMV.s page 28
|
||
|
||
|
||
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
|
||
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
|
||
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
240:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
|
||
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
|
||
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
|
||
246:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
|
||
248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
250:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
|
||
252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
254:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
255:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
|
||
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
|
||
260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
|
||
261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
|
||
263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
|
||
267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
270:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
271:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
|
||
274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
|
||
275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
|
||
276:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
|
||
278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
|
||
280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
281:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
282:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
|
||
286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
|
||
287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
|
||
288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
|
||
ARM GAS /tmp/cctLjoMV.s page 29
|
||
|
||
|
||
290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
|
||
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
295:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
|
||
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
|
||
299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
|
||
300:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
|
||
302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
304:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
|
||
306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
309:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
|
||
313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
|
||
314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
|
||
315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
|
||
317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
319:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
|
||
321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
324:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
325:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
|
||
328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
|
||
329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
|
||
330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
|
||
332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
|
||
334:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
335:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
336:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
|
||
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
|
||
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
|
||
342:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
|
||
344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
|
||
346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
ARM GAS /tmp/cctLjoMV.s page 30
|
||
|
||
|
||
347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
|
||
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
|
||
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
|
||
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
|
||
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
359:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
|
||
361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
363:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
364:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
365:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
|
||
367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
|
||
368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
|
||
369:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
|
||
371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
|
||
373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
377:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
|
||
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
|
||
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
|
||
381:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
|
||
383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
385:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
|
||
387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
388:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
389:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
390:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
|
||
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
|
||
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
|
||
396:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
|
||
398:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
400:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
|
||
402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
ARM GAS /tmp/cctLjoMV.s page 31
|
||
|
||
|
||
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
405:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
406:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
407:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
|
||
409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
|
||
410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
|
||
411:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
|
||
413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
|
||
415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
417:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
|
||
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
|
||
422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
|
||
423:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
|
||
425:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
|
||
427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
429:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||
432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
||
433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
|
||
434:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
|
||
436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
|
||
437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
438:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
|
||
440:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
|
||
442:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
444:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
445:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
|
||
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
|
||
448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
449:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
|
||
451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
|
||
453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
454:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
455:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
456:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
|
||
458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
|
||
459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
|
||
460:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
ARM GAS /tmp/cctLjoMV.s page 32
|
||
|
||
|
||
461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
|
||
462:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
464:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
|
||
466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
468:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
469:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
471:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
|
||
473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
|
||
474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
|
||
475:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
|
||
477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
479:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
|
||
481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
485:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
|
||
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
|
||
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
||
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
|
||
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
|
||
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
495:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
498:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
|
||
500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
|
||
501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
||
502:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
|
||
504:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
|
||
506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
508:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
509:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
|
||
512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
|
||
513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
|
||
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
||
515:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
|
||
517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
ARM GAS /tmp/cctLjoMV.s page 33
|
||
|
||
|
||
518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
|
||
519:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
520:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
|
||
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
|
||
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
|
||
526:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
|
||
528:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
530:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||
532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
534:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
537:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
|
||
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
|
||
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
|
||
541:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
|
||
543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
545:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
|
||
547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
548:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
550:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
552:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
|
||
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
|
||
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
|
||
556:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
|
||
558:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
|
||
560:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
561:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
|
||
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
|
||
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
|
||
568:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
|
||
570:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
|
||
572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
574:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
ARM GAS /tmp/cctLjoMV.s page 34
|
||
|
||
|
||
575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||
576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
||
577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
|
||
578:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
579:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||
581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||
582:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
|
||
585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
|
||
587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
||
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
|
||
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
|
||
591:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
|
||
593:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||
595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||
596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
||
597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
||
598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
|
||
601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
604:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
|
||
606:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
|
||
608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
|
||
610:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
|
||
612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
|
||
613:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
|
||
615:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
||
617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
||
618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
||
619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
|
||
622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
626:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
627:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
628:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
|
||
630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
|
||
ARM GAS /tmp/cctLjoMV.s page 35
|
||
|
||
|
||
632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
||
633:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
|
||
635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
|
||
636:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
|
||
638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||
640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||
641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
||
642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
|
||
643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
|
||
645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
647:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
648:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
|
||
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
|
||
654:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
|
||
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
|
||
657:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
|
||
659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
||
661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
||
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
|
||
663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
|
||
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
666:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
668:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
669:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
670:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
|
||
672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
|
||
674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
||
675:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
|
||
677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
|
||
678:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
|
||
680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||
682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||
683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
||
684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
||
685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
|
||
688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
ARM GAS /tmp/cctLjoMV.s page 36
|
||
|
||
|
||
689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
690:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
691:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
692:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
|
||
696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
|
||
698:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
|
||
700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
|
||
701:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
|
||
703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
||
705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
||
706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
||
707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
|
||
710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
|
||
718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
|
||
720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
||
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
|
||
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
|
||
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
|
||
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||
728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||
729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
||
730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
|
||
731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
|
||
733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
|
||
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
|
||
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
|
||
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
|
||
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
ARM GAS /tmp/cctLjoMV.s page 37
|
||
|
||
|
||
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
|
||
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
||
749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
||
750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
|
||
751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
|
||
753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
756:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||
758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
|
||
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
760:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
|
||
763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
|
||
764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
|
||
765:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
|
||
767:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||
769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||
770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
|
||
771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
|
||
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
|
||
773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
|
||
774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
|
||
775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
777:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
|
||
779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
|
||
783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
784:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
785:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
786:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
787:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
|
||
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
|
||
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
|
||
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
|
||
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||
796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
|
||
797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
|
||
798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
|
||
799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
|
||
800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
|
||
801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
|
||
ARM GAS /tmp/cctLjoMV.s page 38
|
||
|
||
|
||
803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
|
||
806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
808:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
|
||
811:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
812:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
|
||
814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||
815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
|
||
816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
|
||
817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
818:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
|
||
820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
|
||
821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
|
||
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
|
||
823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
|
||
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
|
||
825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
|
||
826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
|
||
828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
|
||
829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
|
||
830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
831:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
832:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
|
||
834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
|
||
835:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
|
||
837:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
838:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
|
||
840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
|
||
841:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
|
||
843:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
845:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
|
||
847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
|
||
848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
|
||
849:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
|
||
851:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
|
||
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
||
856:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
|
||
858:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
859:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
ARM GAS /tmp/cctLjoMV.s page 39
|
||
|
||
|
||
860:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
|
||
862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||
863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
|
||
864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
|
||
865:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
|
||
867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
|
||
869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
870:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
871:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
872:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
|
||
874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
|
||
875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
|
||
876:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
|
||
878:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
|
||
880:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
881:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
882:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
883:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
|
||
885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
|
||
886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
|
||
887:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
|
||
889:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
|
||
891:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
892:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
893:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
894:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
|
||
896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
|
||
897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
||
898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
||
899:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
|
||
901:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
|
||
903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
|
||
904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
906:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
||
908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
912:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
913:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
|
||
915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
|
||
916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
||
ARM GAS /tmp/cctLjoMV.s page 40
|
||
|
||
|
||
917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
||
918:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
|
||
920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
922:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
||
924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
927:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
928:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
|
||
930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
|
||
931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
||
932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
||
933:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
|
||
935:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
||
937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
|
||
938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
|
||
940:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
||
942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
945:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
946:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
947:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
|
||
949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
|
||
950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
|
||
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
|
||
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
|
||
953:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
|
||
955:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
|
||
957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
|
||
958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
|
||
960:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
|
||
962:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
963:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
964:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
965:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
|
||
967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
|
||
968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
|
||
969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
|
||
970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
|
||
971:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
|
||
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
ARM GAS /tmp/cctLjoMV.s page 41
|
||
|
||
|
||
974:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
975:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
|
||
977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
|
||
978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
||
979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
||
980:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
|
||
982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
984:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||
986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
||
987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
|
||
988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||
989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
|
||
991:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
|
||
993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
|
||
994:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
|
||
996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
|
||
997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
|
||
998:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
|
||
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
1002:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1003:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1004:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1005:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros
|
||
1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value.
|
||
1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros
|
||
1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value
|
||
1010:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1011:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CLZ (uint8_t)__builtin_clz
|
||
1012:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1013:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1014:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||
1015:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
||
1016:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||
1017:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||
1018:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit)
|
||
1020:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value.
|
||
1021:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
||
1022:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
|
||
1023:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
|
||
1025:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
1027:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1028:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
||
1029:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
|
||
1030:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
ARM GAS /tmp/cctLjoMV.s page 42
|
||
|
||
|
||
1031:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
|
||
1032:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
|
||
1033:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1034:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
|
||
1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */
|
||
1037:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1038:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1039:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1040:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1041:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit)
|
||
1042:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values.
|
||
1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
||
1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
|
||
1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
|
||
1047:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
1049:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1050:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
||
1051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
|
||
1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
1053:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
|
||
1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
|
||
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
|
||
1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */
|
||
1059:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1060:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1061:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1062:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit)
|
||
1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values.
|
||
1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
||
1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
|
||
1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
|
||
455 .loc 2 1068 31 view .LVU110
|
||
456 .LBB24:
|
||
1069:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
457 .loc 2 1070 5 view .LVU111
|
||
1071:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
||
458 .loc 2 1072 4 view .LVU112
|
||
459 .syntax unified
|
||
460 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
461 0010 52E8003F ldrex r3, [r2]
|
||
462 @ 0 "" 2
|
||
463 .LVL38:
|
||
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
464 .loc 2 1073 4 view .LVU113
|
||
465 .loc 2 1073 4 is_stmt 0 view .LVU114
|
||
466 .thumb
|
||
467 .syntax unified
|
||
468 .LBE24:
|
||
ARM GAS /tmp/cctLjoMV.s page 43
|
||
|
||
|
||
469 .LBE23:
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
470 .loc 1 431 3 discriminator 1 view .LVU115
|
||
471 0014 43F00203 orr r3, r3, #2
|
||
472 .LVL39:
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
473 .loc 1 431 3 is_stmt 1 discriminator 1 view .LVU116
|
||
474 .LBB25:
|
||
475 .LBI25:
|
||
1074:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1075:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1076:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1077:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit)
|
||
1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values.
|
||
1080:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
||
1081:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
||
1082:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
||
1083:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
||
1084:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1085:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
|
||
1086:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
1088:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
|
||
1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1092:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1093:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1094:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1095:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit)
|
||
1096:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values.
|
||
1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
||
1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
||
1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
||
1100:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
||
1101:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1102:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
|
||
1103:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1104:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
1105:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1106:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
|
||
1107:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
1108:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1109:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1110:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1111:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1112:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit)
|
||
1113:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values.
|
||
1114:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
||
1115:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
||
1116:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
||
1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
||
1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
|
||
476 .loc 2 1119 31 view .LVU117
|
||
477 .LBB26:
|
||
ARM GAS /tmp/cctLjoMV.s page 44
|
||
|
||
|
||
1120:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
478 .loc 2 1121 4 view .LVU118
|
||
1122:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
||
479 .loc 2 1123 4 view .LVU119
|
||
480 .syntax unified
|
||
481 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
482 0018 42E80031 strex r1, r3, [r2]
|
||
483 @ 0 "" 2
|
||
484 .LVL40:
|
||
1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
485 .loc 2 1124 4 view .LVU120
|
||
486 .loc 2 1124 4 is_stmt 0 view .LVU121
|
||
487 .thumb
|
||
488 .syntax unified
|
||
489 .LBE26:
|
||
490 .LBE25:
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
491 .loc 1 431 3 discriminator 1 view .LVU122
|
||
492 001c 0029 cmp r1, #0
|
||
493 001e F6D1 bne .L32
|
||
494 .LBE22:
|
||
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
495 .loc 1 431 3 is_stmt 1 discriminator 2 view .LVU123
|
||
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
496 .loc 1 434 3 view .LVU124
|
||
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
497 .loc 1 434 3 view .LVU125
|
||
498 0020 0023 movs r3, #0
|
||
499 .LVL41:
|
||
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
500 .loc 1 434 3 is_stmt 0 view .LVU126
|
||
501 0022 80F87830 strb r3, [r0, #120]
|
||
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
502 .loc 1 434 3 is_stmt 1 view .LVU127
|
||
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
503 .loc 1 436 3 view .LVU128
|
||
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
504 .loc 1 436 10 is_stmt 0 view .LVU129
|
||
505 0026 1846 mov r0, r3
|
||
506 .LVL42:
|
||
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
507 .loc 1 436 10 view .LVU130
|
||
508 0028 7047 bx lr
|
||
509 .LVL43:
|
||
510 .L33:
|
||
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
511 .loc 1 428 3 discriminator 1 view .LVU131
|
||
512 002a 0220 movs r0, #2
|
||
513 .LVL44:
|
||
437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
514 .loc 1 437 1 view .LVU132
|
||
515 002c 7047 bx lr
|
||
516 .cfi_endproc
|
||
517 .LFE134:
|
||
519 .section .text.HAL_UARTEx_DisableStopMode,"ax",%progbits
|
||
ARM GAS /tmp/cctLjoMV.s page 45
|
||
|
||
|
||
520 .align 1
|
||
521 .global HAL_UARTEx_DisableStopMode
|
||
522 .syntax unified
|
||
523 .thumb
|
||
524 .thumb_func
|
||
526 HAL_UARTEx_DisableStopMode:
|
||
527 .LVL45:
|
||
528 .LFB135:
|
||
445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */
|
||
529 .loc 1 445 1 is_stmt 1 view -0
|
||
530 .cfi_startproc
|
||
531 @ args = 0, pretend = 0, frame = 0
|
||
532 @ frame_needed = 0, uses_anonymous_args = 0
|
||
533 @ link register save eliminated.
|
||
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
534 .loc 1 447 3 view .LVU134
|
||
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
535 .loc 1 447 3 view .LVU135
|
||
536 0000 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2
|
||
537 0004 012B cmp r3, #1
|
||
538 0006 10D0 beq .L37
|
||
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
539 .loc 1 447 3 discriminator 2 view .LVU136
|
||
540 0008 0123 movs r3, #1
|
||
541 000a 80F87830 strb r3, [r0, #120]
|
||
542 .L36:
|
||
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
543 .loc 1 447 3 discriminator 3 view .LVU137
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
544 .loc 1 450 3 discriminator 1 view .LVU138
|
||
545 .LBB27:
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
546 .loc 1 450 3 discriminator 1 view .LVU139
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
547 .loc 1 450 3 discriminator 1 view .LVU140
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
548 .loc 1 450 3 discriminator 1 view .LVU141
|
||
549 000e 0268 ldr r2, [r0]
|
||
550 .LVL46:
|
||
551 .LBB28:
|
||
552 .LBI28:
|
||
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
553 .loc 2 1068 31 view .LVU142
|
||
554 .LBB29:
|
||
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
555 .loc 2 1070 5 view .LVU143
|
||
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
556 .loc 2 1072 4 view .LVU144
|
||
557 .syntax unified
|
||
558 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
559 0010 52E8003F ldrex r3, [r2]
|
||
560 @ 0 "" 2
|
||
561 .LVL47:
|
||
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
562 .loc 2 1073 4 view .LVU145
|
||
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
563 .loc 2 1073 4 is_stmt 0 view .LVU146
|
||
ARM GAS /tmp/cctLjoMV.s page 46
|
||
|
||
|
||
564 .thumb
|
||
565 .syntax unified
|
||
566 .LBE29:
|
||
567 .LBE28:
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
568 .loc 1 450 3 discriminator 1 view .LVU147
|
||
569 0014 23F00203 bic r3, r3, #2
|
||
570 .LVL48:
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
571 .loc 1 450 3 is_stmt 1 discriminator 1 view .LVU148
|
||
572 .LBB30:
|
||
573 .LBI30:
|
||
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
574 .loc 2 1119 31 view .LVU149
|
||
575 .LBB31:
|
||
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
576 .loc 2 1121 4 view .LVU150
|
||
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
577 .loc 2 1123 4 view .LVU151
|
||
578 .syntax unified
|
||
579 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
580 0018 42E80031 strex r1, r3, [r2]
|
||
581 @ 0 "" 2
|
||
582 .LVL49:
|
||
583 .loc 2 1124 4 view .LVU152
|
||
584 .loc 2 1124 4 is_stmt 0 view .LVU153
|
||
585 .thumb
|
||
586 .syntax unified
|
||
587 .LBE31:
|
||
588 .LBE30:
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
589 .loc 1 450 3 discriminator 1 view .LVU154
|
||
590 001c 0029 cmp r1, #0
|
||
591 001e F6D1 bne .L36
|
||
592 .LBE27:
|
||
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
593 .loc 1 450 3 is_stmt 1 discriminator 2 view .LVU155
|
||
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
594 .loc 1 453 3 view .LVU156
|
||
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
595 .loc 1 453 3 view .LVU157
|
||
596 0020 0023 movs r3, #0
|
||
597 .LVL50:
|
||
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
598 .loc 1 453 3 is_stmt 0 view .LVU158
|
||
599 0022 80F87830 strb r3, [r0, #120]
|
||
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
600 .loc 1 453 3 is_stmt 1 view .LVU159
|
||
455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
601 .loc 1 455 3 view .LVU160
|
||
455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
602 .loc 1 455 10 is_stmt 0 view .LVU161
|
||
603 0026 1846 mov r0, r3
|
||
604 .LVL51:
|
||
455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
605 .loc 1 455 10 view .LVU162
|
||
606 0028 7047 bx lr
|
||
ARM GAS /tmp/cctLjoMV.s page 47
|
||
|
||
|
||
607 .LVL52:
|
||
608 .L37:
|
||
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
609 .loc 1 447 3 discriminator 1 view .LVU163
|
||
610 002a 0220 movs r0, #2
|
||
611 .LVL53:
|
||
456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
612 .loc 1 456 1 view .LVU164
|
||
613 002c 7047 bx lr
|
||
614 .cfi_endproc
|
||
615 .LFE135:
|
||
617 .section .text.HAL_UARTEx_ReceiveToIdle,"ax",%progbits
|
||
618 .align 1
|
||
619 .global HAL_UARTEx_ReceiveToIdle
|
||
620 .syntax unified
|
||
621 .thumb
|
||
622 .thumb_func
|
||
624 HAL_UARTEx_ReceiveToIdle:
|
||
625 .LVL54:
|
||
626 .LFB136:
|
||
477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint8_t *pdata8bits;
|
||
627 .loc 1 477 1 is_stmt 1 view -0
|
||
628 .cfi_startproc
|
||
629 @ args = 4, pretend = 0, frame = 0
|
||
630 @ frame_needed = 0, uses_anonymous_args = 0
|
||
477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint8_t *pdata8bits;
|
||
631 .loc 1 477 1 is_stmt 0 view .LVU166
|
||
632 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr}
|
||
633 .cfi_def_cfa_offset 32
|
||
634 .cfi_offset 4, -32
|
||
635 .cfi_offset 5, -28
|
||
636 .cfi_offset 6, -24
|
||
637 .cfi_offset 7, -20
|
||
638 .cfi_offset 8, -16
|
||
639 .cfi_offset 9, -12
|
||
640 .cfi_offset 10, -8
|
||
641 .cfi_offset 14, -4
|
||
642 0004 1D46 mov r5, r3
|
||
643 0006 089E ldr r6, [sp, #32]
|
||
478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t *pdata16bits;
|
||
644 .loc 1 478 3 is_stmt 1 view .LVU167
|
||
479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t uhMask;
|
||
645 .loc 1 479 3 view .LVU168
|
||
480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart;
|
||
646 .loc 1 480 3 view .LVU169
|
||
481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
647 .loc 1 481 3 view .LVU170
|
||
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
648 .loc 1 484 3 view .LVU171
|
||
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
649 .loc 1 484 12 is_stmt 0 view .LVU172
|
||
650 0008 D0F88030 ldr r3, [r0, #128]
|
||
651 .LVL55:
|
||
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
652 .loc 1 484 6 view .LVU173
|
||
653 000c 202B cmp r3, #32
|
||
654 000e 40F09680 bne .L54
|
||
ARM GAS /tmp/cctLjoMV.s page 48
|
||
|
||
|
||
655 0012 0446 mov r4, r0
|
||
656 0014 0F46 mov r7, r1
|
||
657 0016 9146 mov r9, r2
|
||
486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
658 .loc 1 486 5 is_stmt 1 view .LVU174
|
||
486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
659 .loc 1 486 8 is_stmt 0 view .LVU175
|
||
660 0018 0029 cmp r1, #0
|
||
661 001a 00F09380 beq .L55
|
||
486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
662 .loc 1 486 25 discriminator 1 view .LVU176
|
||
663 001e 0AB9 cbnz r2, .L60
|
||
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
664 .loc 1 488 15 view .LVU177
|
||
665 0020 0120 movs r0, #1
|
||
666 .LVL56:
|
||
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
667 .loc 1 488 15 view .LVU178
|
||
668 0022 8DE0 b .L39
|
||
669 .LVL57:
|
||
670 .L60:
|
||
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||
671 .loc 1 491 5 is_stmt 1 view .LVU179
|
||
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||
672 .loc 1 491 22 is_stmt 0 view .LVU180
|
||
673 0024 0023 movs r3, #0
|
||
674 0026 C0F88430 str r3, [r0, #132]
|
||
492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||
675 .loc 1 492 5 is_stmt 1 view .LVU181
|
||
492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||
676 .loc 1 492 20 is_stmt 0 view .LVU182
|
||
677 002a 2222 movs r2, #34
|
||
678 .LVL58:
|
||
492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||
679 .loc 1 492 20 view .LVU183
|
||
680 002c C0F88020 str r2, [r0, #128]
|
||
493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
681 .loc 1 493 5 is_stmt 1 view .LVU184
|
||
493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
682 .loc 1 493 26 is_stmt 0 view .LVU185
|
||
683 0030 0122 movs r2, #1
|
||
684 0032 0266 str r2, [r0, #96]
|
||
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
685 .loc 1 494 5 is_stmt 1 view .LVU186
|
||
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
686 .loc 1 494 24 is_stmt 0 view .LVU187
|
||
687 0034 4366 str r3, [r0, #100]
|
||
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
688 .loc 1 497 5 is_stmt 1 view .LVU188
|
||
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
689 .loc 1 497 17 is_stmt 0 view .LVU189
|
||
690 0036 FFF7FEFF bl HAL_GetTick
|
||
691 .LVL59:
|
||
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
692 .loc 1 497 17 view .LVU190
|
||
693 003a 8046 mov r8, r0
|
||
694 .LVL60:
|
||
ARM GAS /tmp/cctLjoMV.s page 49
|
||
|
||
|
||
499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount = Size;
|
||
695 .loc 1 499 5 is_stmt 1 view .LVU191
|
||
499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount = Size;
|
||
696 .loc 1 499 24 is_stmt 0 view .LVU192
|
||
697 003c A4F85890 strh r9, [r4, #88] @ movhi
|
||
500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
698 .loc 1 500 5 is_stmt 1 view .LVU193
|
||
500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
699 .loc 1 500 24 is_stmt 0 view .LVU194
|
||
700 0040 A4F85A90 strh r9, [r4, #90] @ movhi
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
701 .loc 1 503 5 is_stmt 1 view .LVU195
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
702 .loc 1 503 5 view .LVU196
|
||
703 0044 A368 ldr r3, [r4, #8]
|
||
704 0046 B3F5805F cmp r3, #4096
|
||
705 004a 06D0 beq .L61
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
706 .loc 1 503 5 discriminator 2 view .LVU197
|
||
707 004c A3B9 cbnz r3, .L43
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
708 .loc 1 503 5 discriminator 5 view .LVU198
|
||
709 004e 2269 ldr r2, [r4, #16]
|
||
710 0050 72B9 cbnz r2, .L44
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
711 .loc 1 503 5 discriminator 7 view .LVU199
|
||
712 0052 FF22 movs r2, #255
|
||
713 0054 A4F85C20 strh r2, [r4, #92] @ movhi
|
||
714 0058 11E0 b .L42
|
||
715 .L61:
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
716 .loc 1 503 5 discriminator 1 view .LVU200
|
||
717 005a 2269 ldr r2, [r4, #16]
|
||
718 005c 22B9 cbnz r2, .L41
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
719 .loc 1 503 5 discriminator 3 view .LVU201
|
||
720 005e 40F2FF12 movw r2, #511
|
||
721 0062 A4F85C20 strh r2, [r4, #92] @ movhi
|
||
722 0066 0AE0 b .L42
|
||
723 .L41:
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
724 .loc 1 503 5 discriminator 4 view .LVU202
|
||
725 0068 FF22 movs r2, #255
|
||
726 006a A4F85C20 strh r2, [r4, #92] @ movhi
|
||
727 006e 06E0 b .L42
|
||
728 .L44:
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
729 .loc 1 503 5 discriminator 8 view .LVU203
|
||
730 0070 7F22 movs r2, #127
|
||
731 0072 A4F85C20 strh r2, [r4, #92] @ movhi
|
||
732 0076 02E0 b .L42
|
||
733 .L43:
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
734 .loc 1 503 5 discriminator 6 view .LVU204
|
||
735 0078 0022 movs r2, #0
|
||
736 007a A4F85C20 strh r2, [r4, #92] @ movhi
|
||
737 .L42:
|
||
ARM GAS /tmp/cctLjoMV.s page 50
|
||
|
||
|
||
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask;
|
||
738 .loc 1 503 5 discriminator 9 view .LVU205
|
||
504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
739 .loc 1 504 5 view .LVU206
|
||
504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
740 .loc 1 504 12 is_stmt 0 view .LVU207
|
||
741 007e B4F85C90 ldrh r9, [r4, #92]
|
||
742 .LVL61:
|
||
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
743 .loc 1 507 5 is_stmt 1 view .LVU208
|
||
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
744 .loc 1 507 8 is_stmt 0 view .LVU209
|
||
745 0082 B3F5805F cmp r3, #4096
|
||
746 0086 04D0 beq .L62
|
||
515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
747 .loc 1 515 19 view .LVU210
|
||
748 0088 4FF0000A mov r10, #0
|
||
749 .LVL62:
|
||
750 .L45:
|
||
519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
751 .loc 1 519 5 is_stmt 1 view .LVU211
|
||
519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
752 .loc 1 519 12 is_stmt 0 view .LVU212
|
||
753 008c 0023 movs r3, #0
|
||
754 008e 2B80 strh r3, [r5] @ movhi
|
||
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
755 .loc 1 522 5 is_stmt 1 view .LVU213
|
||
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
756 .loc 1 522 11 is_stmt 0 view .LVU214
|
||
757 0090 20E0 b .L46
|
||
758 .LVL63:
|
||
759 .L62:
|
||
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
760 .loc 1 507 71 discriminator 1 view .LVU215
|
||
761 0092 2369 ldr r3, [r4, #16]
|
||
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
762 .loc 1 507 56 discriminator 1 view .LVU216
|
||
763 0094 13B1 cbz r3, .L58
|
||
515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
764 .loc 1 515 19 view .LVU217
|
||
765 0096 4FF0000A mov r10, #0
|
||
766 009a F7E7 b .L45
|
||
767 .L58:
|
||
510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
768 .loc 1 510 19 view .LVU218
|
||
769 009c BA46 mov r10, r7
|
||
509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData;
|
||
770 .loc 1 509 19 view .LVU219
|
||
771 009e 0027 movs r7, #0
|
||
772 .LVL64:
|
||
509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData;
|
||
773 .loc 1 509 19 view .LVU220
|
||
774 00a0 F4E7 b .L45
|
||
775 .LVL65:
|
||
776 .L65:
|
||
534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY;
|
||
777 .loc 1 534 11 is_stmt 1 view .LVU221
|
||
ARM GAS /tmp/cctLjoMV.s page 51
|
||
|
||
|
||
534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY;
|
||
778 .loc 1 534 30 is_stmt 0 view .LVU222
|
||
779 00a2 0223 movs r3, #2
|
||
780 00a4 6366 str r3, [r4, #100]
|
||
535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
781 .loc 1 535 11 is_stmt 1 view .LVU223
|
||
535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
782 .loc 1 535 26 is_stmt 0 view .LVU224
|
||
783 00a6 2023 movs r3, #32
|
||
784 00a8 C4F88030 str r3, [r4, #128]
|
||
537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
785 .loc 1 537 11 is_stmt 1 view .LVU225
|
||
537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
786 .loc 1 537 18 is_stmt 0 view .LVU226
|
||
787 00ac 0020 movs r0, #0
|
||
788 00ae 47E0 b .L39
|
||
789 .L66:
|
||
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++;
|
||
790 .loc 1 546 11 is_stmt 1 view .LVU227
|
||
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++;
|
||
791 .loc 1 546 52 is_stmt 0 view .LVU228
|
||
792 00b0 9B8C ldrh r3, [r3, #36]
|
||
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++;
|
||
793 .loc 1 546 26 view .LVU229
|
||
794 00b2 09EA0303 and r3, r9, r3
|
||
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++;
|
||
795 .loc 1 546 24 view .LVU230
|
||
796 00b6 2AF8023B strh r3, [r10], #2 @ movhi
|
||
797 .LVL66:
|
||
547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
798 .loc 1 547 11 is_stmt 1 view .LVU231
|
||
799 .L50:
|
||
555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount--;
|
||
800 .loc 1 555 9 view .LVU232
|
||
801 00ba 2B88 ldrh r3, [r5]
|
||
555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount--;
|
||
802 .loc 1 555 16 is_stmt 0 view .LVU233
|
||
803 00bc 0133 adds r3, r3, #1
|
||
804 00be 2B80 strh r3, [r5] @ movhi
|
||
556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
805 .loc 1 556 9 is_stmt 1 view .LVU234
|
||
556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
806 .loc 1 556 14 is_stmt 0 view .LVU235
|
||
807 00c0 B4F85A30 ldrh r3, [r4, #90]
|
||
808 00c4 9BB2 uxth r3, r3
|
||
556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
809 .loc 1 556 27 view .LVU236
|
||
810 00c6 013B subs r3, r3, #1
|
||
811 00c8 9BB2 uxth r3, r3
|
||
812 00ca A4F85A30 strh r3, [r4, #90] @ movhi
|
||
813 .L48:
|
||
560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
814 .loc 1 560 7 is_stmt 1 view .LVU237
|
||
560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
815 .loc 1 560 10 is_stmt 0 view .LVU238
|
||
816 00ce B6F1FF3F cmp r6, #-1
|
||
817 00d2 1BD1 bne .L63
|
||
ARM GAS /tmp/cctLjoMV.s page 52
|
||
|
||
|
||
818 .L46:
|
||
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
819 .loc 1 522 31 is_stmt 1 view .LVU239
|
||
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
820 .loc 1 522 17 is_stmt 0 view .LVU240
|
||
821 00d4 B4F85A20 ldrh r2, [r4, #90]
|
||
822 00d8 92B2 uxth r2, r2
|
||
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
823 .loc 1 522 31 view .LVU241
|
||
824 00da 22B3 cbz r2, .L64
|
||
525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
825 .loc 1 525 7 is_stmt 1 view .LVU242
|
||
525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
826 .loc 1 525 11 is_stmt 0 view .LVU243
|
||
827 00dc 2368 ldr r3, [r4]
|
||
828 00de DA69 ldr r2, [r3, #28]
|
||
525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
829 .loc 1 525 10 view .LVU244
|
||
830 00e0 12F0100F tst r2, #16
|
||
831 00e4 04D0 beq .L47
|
||
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
832 .loc 1 528 9 is_stmt 1 view .LVU245
|
||
833 00e6 1022 movs r2, #16
|
||
834 00e8 1A62 str r2, [r3, #32]
|
||
532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
835 .loc 1 532 9 view .LVU246
|
||
532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
836 .loc 1 532 13 is_stmt 0 view .LVU247
|
||
837 00ea 2B88 ldrh r3, [r5]
|
||
532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
838 .loc 1 532 12 view .LVU248
|
||
839 00ec 002B cmp r3, #0
|
||
840 00ee D8D1 bne .L65
|
||
841 .L47:
|
||
542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
842 .loc 1 542 7 is_stmt 1 view .LVU249
|
||
542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
843 .loc 1 542 11 is_stmt 0 view .LVU250
|
||
844 00f0 2368 ldr r3, [r4]
|
||
845 00f2 DA69 ldr r2, [r3, #28]
|
||
542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
846 .loc 1 542 10 view .LVU251
|
||
847 00f4 12F0200F tst r2, #32
|
||
848 00f8 E9D0 beq .L48
|
||
544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
849 .loc 1 544 9 is_stmt 1 view .LVU252
|
||
544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
850 .loc 1 544 12 is_stmt 0 view .LVU253
|
||
851 00fa 002F cmp r7, #0
|
||
852 00fc D8D0 beq .L66
|
||
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++;
|
||
853 .loc 1 551 11 is_stmt 1 view .LVU254
|
||
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++;
|
||
854 .loc 1 551 50 is_stmt 0 view .LVU255
|
||
855 00fe 9A8C ldrh r2, [r3, #36]
|
||
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++;
|
||
856 .loc 1 551 58 view .LVU256
|
||
ARM GAS /tmp/cctLjoMV.s page 53
|
||
|
||
|
||
857 0100 5FFA89F3 uxtb r3, r9
|
||
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++;
|
||
858 .loc 1 551 25 view .LVU257
|
||
859 0104 1340 ands r3, r3, r2
|
||
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++;
|
||
860 .loc 1 551 23 view .LVU258
|
||
861 0106 07F8013B strb r3, [r7], #1
|
||
862 .LVL67:
|
||
552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
863 .loc 1 552 11 is_stmt 1 view .LVU259
|
||
552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
864 .loc 1 552 11 is_stmt 0 view .LVU260
|
||
865 010a D6E7 b .L50
|
||
866 .L63:
|
||
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
867 .loc 1 562 9 is_stmt 1 view .LVU261
|
||
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
868 .loc 1 562 15 is_stmt 0 view .LVU262
|
||
869 010c FFF7FEFF bl HAL_GetTick
|
||
870 .LVL68:
|
||
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
871 .loc 1 562 29 discriminator 1 view .LVU263
|
||
872 0110 A0EB0800 sub r0, r0, r8
|
||
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
873 .loc 1 562 12 discriminator 1 view .LVU264
|
||
874 0114 B042 cmp r0, r6
|
||
875 0116 01D8 bhi .L52
|
||
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
876 .loc 1 562 53 discriminator 1 view .LVU265
|
||
877 0118 002E cmp r6, #0
|
||
878 011a DBD1 bne .L46
|
||
879 .L52:
|
||
564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
880 .loc 1 564 11 is_stmt 1 view .LVU266
|
||
564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
881 .loc 1 564 26 is_stmt 0 view .LVU267
|
||
882 011c 2023 movs r3, #32
|
||
883 011e C4F88030 str r3, [r4, #128]
|
||
566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
884 .loc 1 566 11 is_stmt 1 view .LVU268
|
||
566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
885 .loc 1 566 18 is_stmt 0 view .LVU269
|
||
886 0122 0320 movs r0, #3
|
||
887 0124 0CE0 b .L39
|
||
888 .L64:
|
||
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
|
||
889 .loc 1 572 5 is_stmt 1 view .LVU270
|
||
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
|
||
890 .loc 1 572 19 is_stmt 0 view .LVU271
|
||
891 0126 B4F85830 ldrh r3, [r4, #88]
|
||
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
|
||
892 .loc 1 572 39 view .LVU272
|
||
893 012a B4F85A20 ldrh r2, [r4, #90]
|
||
894 012e 92B2 uxth r2, r2
|
||
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
|
||
895 .loc 1 572 32 view .LVU273
|
||
896 0130 9B1A subs r3, r3, r2
|
||
ARM GAS /tmp/cctLjoMV.s page 54
|
||
|
||
|
||
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
|
||
897 .loc 1 572 12 view .LVU274
|
||
898 0132 2B80 strh r3, [r5] @ movhi
|
||
574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
899 .loc 1 574 5 is_stmt 1 view .LVU275
|
||
574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
900 .loc 1 574 20 is_stmt 0 view .LVU276
|
||
901 0134 2023 movs r3, #32
|
||
902 0136 C4F88030 str r3, [r4, #128]
|
||
576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
903 .loc 1 576 5 is_stmt 1 view .LVU277
|
||
576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
904 .loc 1 576 12 is_stmt 0 view .LVU278
|
||
905 013a 0020 movs r0, #0
|
||
906 013c 00E0 b .L39
|
||
907 .LVL69:
|
||
908 .L54:
|
||
580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
909 .loc 1 580 12 view .LVU279
|
||
910 013e 0220 movs r0, #2
|
||
911 .LVL70:
|
||
912 .L39:
|
||
582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
913 .loc 1 582 1 view .LVU280
|
||
914 0140 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc}
|
||
915 .LVL71:
|
||
916 .L55:
|
||
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
917 .loc 1 488 15 view .LVU281
|
||
918 0144 0120 movs r0, #1
|
||
919 .LVL72:
|
||
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
920 .loc 1 488 15 view .LVU282
|
||
921 0146 FBE7 b .L39
|
||
922 .cfi_endproc
|
||
923 .LFE136:
|
||
925 .section .text.HAL_UARTEx_ReceiveToIdle_IT,"ax",%progbits
|
||
926 .align 1
|
||
927 .global HAL_UARTEx_ReceiveToIdle_IT
|
||
928 .syntax unified
|
||
929 .thumb
|
||
930 .thumb_func
|
||
932 HAL_UARTEx_ReceiveToIdle_IT:
|
||
933 .LVL73:
|
||
934 .LFB137:
|
||
599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status;
|
||
935 .loc 1 599 1 is_stmt 1 view -0
|
||
936 .cfi_startproc
|
||
937 @ args = 0, pretend = 0, frame = 0
|
||
938 @ frame_needed = 0, uses_anonymous_args = 0
|
||
600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
939 .loc 1 600 3 view .LVU284
|
||
603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
940 .loc 1 603 3 view .LVU285
|
||
603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
941 .loc 1 603 12 is_stmt 0 view .LVU286
|
||
942 0000 D0F88030 ldr r3, [r0, #128]
|
||
ARM GAS /tmp/cctLjoMV.s page 55
|
||
|
||
|
||
603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
943 .loc 1 603 6 view .LVU287
|
||
944 0004 202B cmp r3, #32
|
||
945 0006 1FD1 bne .L71
|
||
599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status;
|
||
946 .loc 1 599 1 view .LVU288
|
||
947 0008 10B5 push {r4, lr}
|
||
948 .cfi_def_cfa_offset 8
|
||
949 .cfi_offset 4, -8
|
||
950 .cfi_offset 14, -4
|
||
951 000a 0446 mov r4, r0
|
||
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
952 .loc 1 605 5 is_stmt 1 view .LVU289
|
||
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
953 .loc 1 605 8 is_stmt 0 view .LVU290
|
||
954 000c F1B1 cbz r1, .L72
|
||
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
955 .loc 1 605 25 discriminator 1 view .LVU291
|
||
956 000e 0AB9 cbnz r2, .L79
|
||
607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
957 .loc 1 607 14 view .LVU292
|
||
958 0010 0120 movs r0, #1
|
||
959 .LVL74:
|
||
960 .L68:
|
||
640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
961 .loc 1 640 1 view .LVU293
|
||
962 0012 10BD pop {r4, pc}
|
||
963 .LVL75:
|
||
964 .L79:
|
||
611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
965 .loc 1 611 5 is_stmt 1 view .LVU294
|
||
611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
966 .loc 1 611 26 is_stmt 0 view .LVU295
|
||
967 0014 0123 movs r3, #1
|
||
968 0016 0366 str r3, [r0, #96]
|
||
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
969 .loc 1 612 5 is_stmt 1 view .LVU296
|
||
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
970 .loc 1 612 24 is_stmt 0 view .LVU297
|
||
971 0018 0023 movs r3, #0
|
||
972 001a 4366 str r3, [r0, #100]
|
||
614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
973 .loc 1 614 5 is_stmt 1 view .LVU298
|
||
614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
974 .loc 1 614 15 is_stmt 0 view .LVU299
|
||
975 001c FFF7FEFF bl UART_Start_Receive_IT
|
||
976 .LVL76:
|
||
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
977 .loc 1 617 5 is_stmt 1 view .LVU300
|
||
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
978 .loc 1 617 8 is_stmt 0 view .LVU301
|
||
979 0020 0028 cmp r0, #0
|
||
980 0022 F6D1 bne .L68
|
||
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
981 .loc 1 619 7 is_stmt 1 view .LVU302
|
||
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
982 .loc 1 619 16 is_stmt 0 view .LVU303
|
||
ARM GAS /tmp/cctLjoMV.s page 56
|
||
|
||
|
||
983 0024 236E ldr r3, [r4, #96]
|
||
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
984 .loc 1 619 10 view .LVU304
|
||
985 0026 012B cmp r3, #1
|
||
986 0028 01D0 beq .L80
|
||
630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
987 .loc 1 630 16 view .LVU305
|
||
988 002a 0120 movs r0, #1
|
||
989 .LVL77:
|
||
634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
990 .loc 1 634 5 is_stmt 1 view .LVU306
|
||
634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
991 .loc 1 634 12 is_stmt 0 view .LVU307
|
||
992 002c F1E7 b .L68
|
||
993 .LVL78:
|
||
994 .L80:
|
||
621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||
995 .loc 1 621 9 is_stmt 1 view .LVU308
|
||
996 002e 2368 ldr r3, [r4]
|
||
997 0030 1022 movs r2, #16
|
||
998 0032 1A62 str r2, [r3, #32]
|
||
999 .L70:
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1000 .loc 1 622 9 discriminator 1 view .LVU309
|
||
1001 .LBB32:
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1002 .loc 1 622 9 discriminator 1 view .LVU310
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1003 .loc 1 622 9 discriminator 1 view .LVU311
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1004 .loc 1 622 9 discriminator 1 view .LVU312
|
||
1005 0034 2268 ldr r2, [r4]
|
||
1006 .LVL79:
|
||
1007 .LBB33:
|
||
1008 .LBI33:
|
||
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1009 .loc 2 1068 31 view .LVU313
|
||
1010 .LBB34:
|
||
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1011 .loc 2 1070 5 view .LVU314
|
||
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
1012 .loc 2 1072 4 view .LVU315
|
||
1013 .syntax unified
|
||
1014 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1015 0036 52E8003F ldrex r3, [r2]
|
||
1016 @ 0 "" 2
|
||
1017 .LVL80:
|
||
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1018 .loc 2 1073 4 view .LVU316
|
||
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1019 .loc 2 1073 4 is_stmt 0 view .LVU317
|
||
1020 .thumb
|
||
1021 .syntax unified
|
||
1022 .LBE34:
|
||
1023 .LBE33:
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1024 .loc 1 622 9 discriminator 1 view .LVU318
|
||
ARM GAS /tmp/cctLjoMV.s page 57
|
||
|
||
|
||
1025 003a 43F01003 orr r3, r3, #16
|
||
1026 .LVL81:
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1027 .loc 1 622 9 is_stmt 1 discriminator 1 view .LVU319
|
||
1028 .LBB35:
|
||
1029 .LBI35:
|
||
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1030 .loc 2 1119 31 view .LVU320
|
||
1031 .LBB36:
|
||
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1032 .loc 2 1121 4 view .LVU321
|
||
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
1033 .loc 2 1123 4 view .LVU322
|
||
1034 .syntax unified
|
||
1035 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1036 003e 42E80031 strex r1, r3, [r2]
|
||
1037 @ 0 "" 2
|
||
1038 .LVL82:
|
||
1039 .loc 2 1124 4 view .LVU323
|
||
1040 .loc 2 1124 4 is_stmt 0 view .LVU324
|
||
1041 .thumb
|
||
1042 .syntax unified
|
||
1043 .LBE36:
|
||
1044 .LBE35:
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1045 .loc 1 622 9 discriminator 1 view .LVU325
|
||
1046 0042 0029 cmp r1, #0
|
||
1047 0044 F6D1 bne .L70
|
||
1048 0046 E4E7 b .L68
|
||
1049 .LVL83:
|
||
1050 .L71:
|
||
1051 .cfi_def_cfa_offset 0
|
||
1052 .cfi_restore 4
|
||
1053 .cfi_restore 14
|
||
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1054 .loc 1 622 9 discriminator 1 view .LVU326
|
||
1055 .LBE32:
|
||
638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1056 .loc 1 638 12 view .LVU327
|
||
1057 0048 0220 movs r0, #2
|
||
1058 .LVL84:
|
||
640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1059 .loc 1 640 1 view .LVU328
|
||
1060 004a 7047 bx lr
|
||
1061 .LVL85:
|
||
1062 .L72:
|
||
1063 .cfi_def_cfa_offset 8
|
||
1064 .cfi_offset 4, -8
|
||
1065 .cfi_offset 14, -4
|
||
607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1066 .loc 1 607 14 view .LVU329
|
||
1067 004c 0120 movs r0, #1
|
||
1068 .LVL86:
|
||
607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1069 .loc 1 607 14 view .LVU330
|
||
1070 004e E0E7 b .L68
|
||
1071 .cfi_endproc
|
||
ARM GAS /tmp/cctLjoMV.s page 58
|
||
|
||
|
||
1072 .LFE137:
|
||
1074 .section .text.HAL_UARTEx_ReceiveToIdle_DMA,"ax",%progbits
|
||
1075 .align 1
|
||
1076 .global HAL_UARTEx_ReceiveToIdle_DMA
|
||
1077 .syntax unified
|
||
1078 .thumb
|
||
1079 .thumb_func
|
||
1081 HAL_UARTEx_ReceiveToIdle_DMA:
|
||
1082 .LVL87:
|
||
1083 .LFB138:
|
||
660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status;
|
||
1084 .loc 1 660 1 is_stmt 1 view -0
|
||
1085 .cfi_startproc
|
||
1086 @ args = 0, pretend = 0, frame = 0
|
||
1087 @ frame_needed = 0, uses_anonymous_args = 0
|
||
661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1088 .loc 1 661 3 view .LVU332
|
||
664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1089 .loc 1 664 3 view .LVU333
|
||
664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1090 .loc 1 664 12 is_stmt 0 view .LVU334
|
||
1091 0000 D0F88030 ldr r3, [r0, #128]
|
||
664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1092 .loc 1 664 6 view .LVU335
|
||
1093 0004 202B cmp r3, #32
|
||
1094 0006 1FD1 bne .L85
|
||
660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status;
|
||
1095 .loc 1 660 1 view .LVU336
|
||
1096 0008 10B5 push {r4, lr}
|
||
1097 .cfi_def_cfa_offset 8
|
||
1098 .cfi_offset 4, -8
|
||
1099 .cfi_offset 14, -4
|
||
1100 000a 0446 mov r4, r0
|
||
666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1101 .loc 1 666 5 is_stmt 1 view .LVU337
|
||
666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1102 .loc 1 666 8 is_stmt 0 view .LVU338
|
||
1103 000c F1B1 cbz r1, .L86
|
||
666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1104 .loc 1 666 25 discriminator 1 view .LVU339
|
||
1105 000e 0AB9 cbnz r2, .L93
|
||
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1106 .loc 1 668 14 view .LVU340
|
||
1107 0010 0120 movs r0, #1
|
||
1108 .LVL88:
|
||
1109 .L82:
|
||
701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1110 .loc 1 701 1 view .LVU341
|
||
1111 0012 10BD pop {r4, pc}
|
||
1112 .LVL89:
|
||
1113 .L93:
|
||
672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
1114 .loc 1 672 5 is_stmt 1 view .LVU342
|
||
672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||
1115 .loc 1 672 26 is_stmt 0 view .LVU343
|
||
1116 0014 0123 movs r3, #1
|
||
1117 0016 0366 str r3, [r0, #96]
|
||
ARM GAS /tmp/cctLjoMV.s page 59
|
||
|
||
|
||
673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1118 .loc 1 673 5 is_stmt 1 view .LVU344
|
||
673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1119 .loc 1 673 24 is_stmt 0 view .LVU345
|
||
1120 0018 0023 movs r3, #0
|
||
1121 001a 4366 str r3, [r0, #100]
|
||
675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1122 .loc 1 675 5 is_stmt 1 view .LVU346
|
||
675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1123 .loc 1 675 15 is_stmt 0 view .LVU347
|
||
1124 001c FFF7FEFF bl UART_Start_Receive_DMA
|
||
1125 .LVL90:
|
||
678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1126 .loc 1 678 5 is_stmt 1 view .LVU348
|
||
678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1127 .loc 1 678 8 is_stmt 0 view .LVU349
|
||
1128 0020 0028 cmp r0, #0
|
||
1129 0022 F6D1 bne .L82
|
||
680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1130 .loc 1 680 7 is_stmt 1 view .LVU350
|
||
680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1131 .loc 1 680 16 is_stmt 0 view .LVU351
|
||
1132 0024 236E ldr r3, [r4, #96]
|
||
680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** {
|
||
1133 .loc 1 680 10 view .LVU352
|
||
1134 0026 012B cmp r3, #1
|
||
1135 0028 01D0 beq .L94
|
||
691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1136 .loc 1 691 16 view .LVU353
|
||
1137 002a 0120 movs r0, #1
|
||
1138 .LVL91:
|
||
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1139 .loc 1 695 5 is_stmt 1 view .LVU354
|
||
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1140 .loc 1 695 12 is_stmt 0 view .LVU355
|
||
1141 002c F1E7 b .L82
|
||
1142 .LVL92:
|
||
1143 .L94:
|
||
682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||
1144 .loc 1 682 9 is_stmt 1 view .LVU356
|
||
1145 002e 2368 ldr r3, [r4]
|
||
1146 0030 1022 movs r2, #16
|
||
1147 0032 1A62 str r2, [r3, #32]
|
||
1148 .L84:
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1149 .loc 1 683 9 discriminator 1 view .LVU357
|
||
1150 .LBB37:
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1151 .loc 1 683 9 discriminator 1 view .LVU358
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1152 .loc 1 683 9 discriminator 1 view .LVU359
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1153 .loc 1 683 9 discriminator 1 view .LVU360
|
||
1154 0034 2268 ldr r2, [r4]
|
||
1155 .LVL93:
|
||
1156 .LBB38:
|
||
1157 .LBI38:
|
||
ARM GAS /tmp/cctLjoMV.s page 60
|
||
|
||
|
||
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1158 .loc 2 1068 31 view .LVU361
|
||
1159 .LBB39:
|
||
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1160 .loc 2 1070 5 view .LVU362
|
||
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
1161 .loc 2 1072 4 view .LVU363
|
||
1162 .syntax unified
|
||
1163 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1164 0036 52E8003F ldrex r3, [r2]
|
||
1165 @ 0 "" 2
|
||
1166 .LVL94:
|
||
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1167 .loc 2 1073 4 view .LVU364
|
||
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1168 .loc 2 1073 4 is_stmt 0 view .LVU365
|
||
1169 .thumb
|
||
1170 .syntax unified
|
||
1171 .LBE39:
|
||
1172 .LBE38:
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1173 .loc 1 683 9 discriminator 1 view .LVU366
|
||
1174 003a 43F01003 orr r3, r3, #16
|
||
1175 .LVL95:
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1176 .loc 1 683 9 is_stmt 1 discriminator 1 view .LVU367
|
||
1177 .LBB40:
|
||
1178 .LBI40:
|
||
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1179 .loc 2 1119 31 view .LVU368
|
||
1180 .LBB41:
|
||
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1181 .loc 2 1121 4 view .LVU369
|
||
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
1182 .loc 2 1123 4 view .LVU370
|
||
1183 .syntax unified
|
||
1184 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
1185 003e 42E80031 strex r1, r3, [r2]
|
||
1186 @ 0 "" 2
|
||
1187 .LVL96:
|
||
1188 .loc 2 1124 4 view .LVU371
|
||
1189 .loc 2 1124 4 is_stmt 0 view .LVU372
|
||
1190 .thumb
|
||
1191 .syntax unified
|
||
1192 .LBE41:
|
||
1193 .LBE40:
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1194 .loc 1 683 9 discriminator 1 view .LVU373
|
||
1195 0042 0029 cmp r1, #0
|
||
1196 0044 F6D1 bne .L84
|
||
1197 0046 E4E7 b .L82
|
||
1198 .LVL97:
|
||
1199 .L85:
|
||
1200 .cfi_def_cfa_offset 0
|
||
1201 .cfi_restore 4
|
||
1202 .cfi_restore 14
|
||
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
ARM GAS /tmp/cctLjoMV.s page 61
|
||
|
||
|
||
1203 .loc 1 683 9 discriminator 1 view .LVU374
|
||
1204 .LBE37:
|
||
699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1205 .loc 1 699 12 view .LVU375
|
||
1206 0048 0220 movs r0, #2
|
||
1207 .LVL98:
|
||
701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1208 .loc 1 701 1 view .LVU376
|
||
1209 004a 7047 bx lr
|
||
1210 .LVL99:
|
||
1211 .L86:
|
||
1212 .cfi_def_cfa_offset 8
|
||
1213 .cfi_offset 4, -8
|
||
1214 .cfi_offset 14, -4
|
||
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1215 .loc 1 668 14 view .LVU377
|
||
1216 004c 0120 movs r0, #1
|
||
1217 .LVL100:
|
||
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1218 .loc 1 668 14 view .LVU378
|
||
1219 004e E0E7 b .L82
|
||
1220 .cfi_endproc
|
||
1221 .LFE138:
|
||
1223 .section .text.HAL_UARTEx_GetRxEventType,"ax",%progbits
|
||
1224 .align 1
|
||
1225 .global HAL_UARTEx_GetRxEventType
|
||
1226 .syntax unified
|
||
1227 .thumb
|
||
1228 .thumb_func
|
||
1230 HAL_UARTEx_GetRxEventType:
|
||
1231 .LVL101:
|
||
1232 .LFB139:
|
||
728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Return Rx Event type value, as stored in UART handle */
|
||
1233 .loc 1 728 1 is_stmt 1 view -0
|
||
1234 .cfi_startproc
|
||
1235 @ args = 0, pretend = 0, frame = 0
|
||
1236 @ frame_needed = 0, uses_anonymous_args = 0
|
||
1237 @ link register save eliminated.
|
||
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1238 .loc 1 730 3 view .LVU380
|
||
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** }
|
||
1239 .loc 1 730 16 is_stmt 0 view .LVU381
|
||
1240 0000 406E ldr r0, [r0, #100]
|
||
1241 .LVL102:
|
||
731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c ****
|
||
1242 .loc 1 731 1 view .LVU382
|
||
1243 0002 7047 bx lr
|
||
1244 .cfi_endproc
|
||
1245 .LFE139:
|
||
1247 .text
|
||
1248 .Letext0:
|
||
1249 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod
|
||
1250 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod
|
||
1251 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
|
||
1252 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
|
||
1253 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
|
||
1254 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
|
||
ARM GAS /tmp/cctLjoMV.s page 62
|
||
|
||
|
||
1255 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h"
|
||
1256 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h"
|
||
1257 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
|
||
ARM GAS /tmp/cctLjoMV.s page 63
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:00000000 stm32f3xx_hal_uart_ex.c
|
||
/tmp/cctLjoMV.s:21 .text.UARTEx_Wakeup_AddressConfig:00000000 $t
|
||
/tmp/cctLjoMV.s:26 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig
|
||
/tmp/cctLjoMV.s:63 .text.HAL_RS485Ex_Init:00000000 $t
|
||
/tmp/cctLjoMV.s:69 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init
|
||
/tmp/cctLjoMV.s:204 .text.HAL_UARTEx_WakeupCallback:00000000 $t
|
||
/tmp/cctLjoMV.s:210 .text.HAL_UARTEx_WakeupCallback:00000000 HAL_UARTEx_WakeupCallback
|
||
/tmp/cctLjoMV.s:225 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t
|
||
/tmp/cctLjoMV.s:231 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set
|
||
/tmp/cctLjoMV.s:293 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t
|
||
/tmp/cctLjoMV.s:299 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig
|
||
/tmp/cctLjoMV.s:421 .text.HAL_UARTEx_EnableStopMode:00000000 $t
|
||
/tmp/cctLjoMV.s:427 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode
|
||
/tmp/cctLjoMV.s:520 .text.HAL_UARTEx_DisableStopMode:00000000 $t
|
||
/tmp/cctLjoMV.s:526 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode
|
||
/tmp/cctLjoMV.s:618 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t
|
||
/tmp/cctLjoMV.s:624 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle
|
||
/tmp/cctLjoMV.s:926 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t
|
||
/tmp/cctLjoMV.s:932 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT
|
||
/tmp/cctLjoMV.s:1075 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t
|
||
/tmp/cctLjoMV.s:1081 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA
|
||
/tmp/cctLjoMV.s:1224 .text.HAL_UARTEx_GetRxEventType:00000000 $t
|
||
/tmp/cctLjoMV.s:1230 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType
|
||
|
||
UNDEFINED SYMBOLS
|
||
UART_SetConfig
|
||
UART_CheckIdleState
|
||
HAL_UART_MspInit
|
||
UART_AdvFeatureConfig
|
||
HAL_GetTick
|
||
UART_WaitOnFlagUntilTimeout
|
||
UART_Start_Receive_IT
|
||
UART_Start_Receive_DMA
|