mv-bms/Software/build/stm32f3xx_hal_rcc_ex.lst

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ARM GAS /tmp/ccwmaYtI.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 6
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_rcc_ex.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c"
20 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits
21 .align 1
22 .global HAL_RCCEx_PeriphCLKConfig
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_RCCEx_PeriphCLKConfig:
28 .LFB130:
1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /**
2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ******************************************************************************
3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @file stm32f3xx_hal_rcc_ex.c
4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @author MCD Application Team
5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver.
6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral:
8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions
9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** *
10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ******************************************************************************
11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @attention
12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** *
13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * Copyright (c) 2016 STMicroelectronics.
14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * All rights reserved.
15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** *
16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in
17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the root directory of this software component.
18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ******************************************************************************
20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/
23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #include "stm32f3xx_hal.h"
24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver
26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{
27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED
30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
ARM GAS /tmp/ccwmaYtI.s page 2
31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx
32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver.
33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{
34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/
37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/
38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/
39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros
40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{
41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /**
43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @}
44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/
47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/
48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/
49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) || de
50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM1SW) || defined(RCC_CFGR3_TIM2SW) || defined(RCC_CFGR3_TIM8SW) || defined(
51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM16SW) || defined(RCC_CFGR3_TIM17SW) || defined(RCC_CFGR3_TIM20SW) || defin
52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_HRTIM1SW)
53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Functions RCCEx Private Functions
54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{
55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static uint32_t RCC_GetPLLCLKFreq(void);
57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /**
59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @}
60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR2_ADCPRExx || RCC_CFGR3_TIMxSW || RCC_CFGR3_HRTIM1SW || RCC
62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{
65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions
69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** *
70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @verbatim
71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ===============================================================================
72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions #####
73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ===============================================================================
74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** [..]
75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks
76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequencies.
77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** [..]
78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including
81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** the backup registers) are set to their reset values.
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endverbatim
84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{
85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /**
ARM GAS /tmp/ccwmaYtI.s page 3
88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified
89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef.
90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks
92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * (ADC, CEC, I2C, I2S, SDADC, HRTIM, TIM, USART, RTC and USB).
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** *
94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the RTC clock source; in this case the Backup domain will be reset in
96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * order to modify the RTC Clock source, as consequence RTC registers (including
97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the backup registers) and RCC_BDCR register are set to their reset values.
98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** *
99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note When the TIMx clock source is APB clock, so the TIMx clock is APB clock or
100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * APB clock x 2 depending on the APB prescaler.
101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * When the TIMx clock source is PLL clock, so the TIMx clock is PLL clock x 2.
102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** *
103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval HAL status
104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
29 .loc 1 106 1
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 72
32 @ frame_needed = 1, uses_anonymous_args = 0
33 0000 80B5 push {r7, lr}
34 .cfi_def_cfa_offset 8
35 .cfi_offset 7, -8
36 .cfi_offset 14, -4
37 0002 92B0 sub sp, sp, #72
38 .cfi_def_cfa_offset 80
39 0004 00AF add r7, sp, #0
40 .cfi_def_cfa_register 7
41 0006 7860 str r0, [r7, #4]
107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t tickstart = 0U;
42 .loc 1 107 12
43 0008 0023 movs r3, #0
44 000a 3B64 str r3, [r7, #64]
108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U;
45 .loc 1 108 12
46 000c 0023 movs r3, #0
47 000e FB63 str r3, [r7, #60]
109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET;
48 .loc 1 109 20
49 0010 0023 movs r3, #0
50 0012 87F84730 strb r3, [r7, #71]
110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*---------------------------- RTC configuration -------------------------------*/
115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
51 .loc 1 115 21
52 0016 7B68 ldr r3, [r7, #4]
53 0018 1B68 ldr r3, [r3]
54 .loc 1 115 45
55 001a 03F48033 and r3, r3, #65536
56 .loc 1 115 5
57 001e 002B cmp r3, #0
ARM GAS /tmp/ccwmaYtI.s page 4
58 0020 00F0D280 beq .L2
116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */
118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the
122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** power domain is done. */
123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */
124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
59 .loc 1 124 8
60 0024 4D4B ldr r3, .L30
61 0026 DB69 ldr r3, [r3, #28]
62 0028 03F08053 and r3, r3, #268435456
63 .loc 1 124 7
64 002c 002B cmp r3, #0
65 002e 0ED1 bne .L3
66 .LBB17:
125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
67 .loc 1 126 7
68 0030 4A4B ldr r3, .L30
69 0032 DB69 ldr r3, [r3, #28]
70 0034 494A ldr r2, .L30
71 0036 43F08053 orr r3, r3, #268435456
72 003a D361 str r3, [r2, #28]
73 003c 474B ldr r3, .L30
74 003e DB69 ldr r3, [r3, #28]
75 0040 03F08053 and r3, r3, #268435456
76 0044 BB60 str r3, [r7, #8]
77 0046 BB68 ldr r3, [r7, #8]
78 .LBE17:
127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET;
79 .loc 1 127 21
80 0048 0123 movs r3, #1
81 004a 87F84730 strb r3, [r7, #71]
82 .L3:
128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
83 .loc 1 130 8
84 004e 444B ldr r3, .L30+4
85 0050 1B68 ldr r3, [r3]
86 0052 03F48073 and r3, r3, #256
87 .loc 1 130 7
88 0056 002B cmp r3, #0
89 0058 18D1 bne .L4
131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */
133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP);
90 .loc 1 133 7
91 005a 414B ldr r3, .L30+4
92 005c 1B68 ldr r3, [r3]
93 005e 404A ldr r2, .L30+4
94 0060 43F48073 orr r3, r3, #256
95 0064 1360 str r3, [r2]
134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
ARM GAS /tmp/ccwmaYtI.s page 5
135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */
136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
96 .loc 1 136 19
97 0066 FFF7FEFF bl HAL_GetTick
98 006a 3864 str r0, [r7, #64]
137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
99 .loc 1 138 12
100 006c 08E0 b .L5
101 .L7:
139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
102 .loc 1 140 15
103 006e FFF7FEFF bl HAL_GetTick
104 0072 0246 mov r2, r0
105 .loc 1 140 29 discriminator 1
106 0074 3B6C ldr r3, [r7, #64]
107 0076 D31A subs r3, r2, r3
108 .loc 1 140 13 discriminator 1
109 0078 642B cmp r3, #100
110 007a 01D9 bls .L5
141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_TIMEOUT;
111 .loc 1 142 18
112 007c 0323 movs r3, #3
113 007e 49E1 b .L6
114 .L5:
138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
115 .loc 1 138 13
116 0080 374B ldr r3, .L30+4
117 0082 1B68 ldr r3, [r3]
118 0084 03F48073 and r3, r3, #256
119 0088 002B cmp r3, #0
120 008a F0D0 beq .L7
121 .L4:
143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value
148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
122 .loc 1 148 20
123 008c 334B ldr r3, .L30
124 008e 1B6A ldr r3, [r3, #32]
125 .loc 1 148 14
126 0090 03F44073 and r3, r3, #768
127 0094 FB63 str r3, [r7, #60]
149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE
128 .loc 1 149 7
129 0096 FB6B ldr r3, [r7, #60]
130 0098 002B cmp r3, #0
131 009a 00F08280 beq .L8
132 .loc 1 149 64 discriminator 1
133 009e 7B68 ldr r3, [r7, #4]
134 00a0 5B68 ldr r3, [r3, #4]
135 .loc 1 149 84 discriminator 1
136 00a2 03F44073 and r3, r3, #768
ARM GAS /tmp/ccwmaYtI.s page 6
137 .loc 1 149 34 discriminator 1
138 00a6 FA6B ldr r2, [r7, #60]
139 00a8 9A42 cmp r2, r3
140 00aa 7AD0 beq .L8
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */
152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
141 .loc 1 152 22
142 00ac 2B4B ldr r3, .L30
143 00ae 1B6A ldr r3, [r3, #32]
144 .loc 1 152 16
145 00b0 23F44073 bic r3, r3, #768
146 00b4 FB63 str r3, [r7, #60]
147 00b6 4FF48033 mov r3, #65536
148 00ba 3B63 str r3, [r7, #48]
149 .LBB18:
150 .LBB19:
151 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
ARM GAS /tmp/ccwmaYtI.s page 7
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
ARM GAS /tmp/ccwmaYtI.s page 8
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
144:Drivers/CMSIS/Include/cmsis_gcc.h ****
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
ARM GAS /tmp/ccwmaYtI.s page 9
154:Drivers/CMSIS/Include/cmsis_gcc.h ****
155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
158:Drivers/CMSIS/Include/cmsis_gcc.h ****
159:Drivers/CMSIS/Include/cmsis_gcc.h ****
160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
169:Drivers/CMSIS/Include/cmsis_gcc.h ****
170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
174:Drivers/CMSIS/Include/cmsis_gcc.h ****
175:Drivers/CMSIS/Include/cmsis_gcc.h ****
176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
185:Drivers/CMSIS/Include/cmsis_gcc.h ****
186:Drivers/CMSIS/Include/cmsis_gcc.h ****
187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
198:Drivers/CMSIS/Include/cmsis_gcc.h ****
199:Drivers/CMSIS/Include/cmsis_gcc.h ****
200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
208:Drivers/CMSIS/Include/cmsis_gcc.h ****
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
ARM GAS /tmp/ccwmaYtI.s page 10
211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
213:Drivers/CMSIS/Include/cmsis_gcc.h ****
214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
218:Drivers/CMSIS/Include/cmsis_gcc.h **** */
219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
222:Drivers/CMSIS/Include/cmsis_gcc.h ****
223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
227:Drivers/CMSIS/Include/cmsis_gcc.h ****
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
240:Drivers/CMSIS/Include/cmsis_gcc.h ****
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
246:Drivers/CMSIS/Include/cmsis_gcc.h **** */
247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
250:Drivers/CMSIS/Include/cmsis_gcc.h ****
251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
254:Drivers/CMSIS/Include/cmsis_gcc.h ****
255:Drivers/CMSIS/Include/cmsis_gcc.h ****
256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
ARM GAS /tmp/ccwmaYtI.s page 11
268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
270:Drivers/CMSIS/Include/cmsis_gcc.h ****
271:Drivers/CMSIS/Include/cmsis_gcc.h ****
272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
276:Drivers/CMSIS/Include/cmsis_gcc.h **** */
277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
281:Drivers/CMSIS/Include/cmsis_gcc.h ****
282:Drivers/CMSIS/Include/cmsis_gcc.h ****
283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
295:Drivers/CMSIS/Include/cmsis_gcc.h ****
296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
300:Drivers/CMSIS/Include/cmsis_gcc.h **** */
301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
304:Drivers/CMSIS/Include/cmsis_gcc.h ****
305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
309:Drivers/CMSIS/Include/cmsis_gcc.h ****
310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
319:Drivers/CMSIS/Include/cmsis_gcc.h ****
320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
324:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccwmaYtI.s page 12
325:Drivers/CMSIS/Include/cmsis_gcc.h ****
326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
334:Drivers/CMSIS/Include/cmsis_gcc.h **** }
335:Drivers/CMSIS/Include/cmsis_gcc.h ****
336:Drivers/CMSIS/Include/cmsis_gcc.h ****
337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
342:Drivers/CMSIS/Include/cmsis_gcc.h **** */
343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
359:Drivers/CMSIS/Include/cmsis_gcc.h ****
360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
363:Drivers/CMSIS/Include/cmsis_gcc.h ****
364:Drivers/CMSIS/Include/cmsis_gcc.h ****
365:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
369:Drivers/CMSIS/Include/cmsis_gcc.h **** */
370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
377:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
381:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccwmaYtI.s page 13
382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
385:Drivers/CMSIS/Include/cmsis_gcc.h ****
386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
388:Drivers/CMSIS/Include/cmsis_gcc.h **** }
389:Drivers/CMSIS/Include/cmsis_gcc.h ****
390:Drivers/CMSIS/Include/cmsis_gcc.h ****
391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
396:Drivers/CMSIS/Include/cmsis_gcc.h **** */
397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
398:Drivers/CMSIS/Include/cmsis_gcc.h **** {
399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
400:Drivers/CMSIS/Include/cmsis_gcc.h ****
401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
405:Drivers/CMSIS/Include/cmsis_gcc.h ****
406:Drivers/CMSIS/Include/cmsis_gcc.h ****
407:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
411:Drivers/CMSIS/Include/cmsis_gcc.h **** */
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
417:Drivers/CMSIS/Include/cmsis_gcc.h ****
418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
423:Drivers/CMSIS/Include/cmsis_gcc.h **** */
424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
425:Drivers/CMSIS/Include/cmsis_gcc.h **** {
426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
429:Drivers/CMSIS/Include/cmsis_gcc.h ****
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
434:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
438:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccwmaYtI.s page 14
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
440:Drivers/CMSIS/Include/cmsis_gcc.h **** {
441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
442:Drivers/CMSIS/Include/cmsis_gcc.h **** }
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
444:Drivers/CMSIS/Include/cmsis_gcc.h ****
445:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
449:Drivers/CMSIS/Include/cmsis_gcc.h **** */
450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
454:Drivers/CMSIS/Include/cmsis_gcc.h ****
455:Drivers/CMSIS/Include/cmsis_gcc.h ****
456:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
460:Drivers/CMSIS/Include/cmsis_gcc.h **** */
461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
462:Drivers/CMSIS/Include/cmsis_gcc.h **** {
463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
464:Drivers/CMSIS/Include/cmsis_gcc.h ****
465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
468:Drivers/CMSIS/Include/cmsis_gcc.h ****
469:Drivers/CMSIS/Include/cmsis_gcc.h ****
470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
471:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
475:Drivers/CMSIS/Include/cmsis_gcc.h **** */
476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
479:Drivers/CMSIS/Include/cmsis_gcc.h ****
480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
485:Drivers/CMSIS/Include/cmsis_gcc.h ****
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
495:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccwmaYtI.s page 15
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
498:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
502:Drivers/CMSIS/Include/cmsis_gcc.h **** */
503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
504:Drivers/CMSIS/Include/cmsis_gcc.h **** {
505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
508:Drivers/CMSIS/Include/cmsis_gcc.h ****
509:Drivers/CMSIS/Include/cmsis_gcc.h ****
510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
515:Drivers/CMSIS/Include/cmsis_gcc.h **** */
516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
519:Drivers/CMSIS/Include/cmsis_gcc.h **** }
520:Drivers/CMSIS/Include/cmsis_gcc.h ****
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
526:Drivers/CMSIS/Include/cmsis_gcc.h **** */
527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
528:Drivers/CMSIS/Include/cmsis_gcc.h **** {
529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
530:Drivers/CMSIS/Include/cmsis_gcc.h ****
531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
534:Drivers/CMSIS/Include/cmsis_gcc.h ****
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
537:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
541:Drivers/CMSIS/Include/cmsis_gcc.h **** */
542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
545:Drivers/CMSIS/Include/cmsis_gcc.h ****
546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
548:Drivers/CMSIS/Include/cmsis_gcc.h **** }
549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
550:Drivers/CMSIS/Include/cmsis_gcc.h ****
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
552:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS /tmp/ccwmaYtI.s page 16
553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
556:Drivers/CMSIS/Include/cmsis_gcc.h **** */
557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
558:Drivers/CMSIS/Include/cmsis_gcc.h **** {
559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
560:Drivers/CMSIS/Include/cmsis_gcc.h **** }
561:Drivers/CMSIS/Include/cmsis_gcc.h ****
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
568:Drivers/CMSIS/Include/cmsis_gcc.h **** */
569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
570:Drivers/CMSIS/Include/cmsis_gcc.h **** {
571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
574:Drivers/CMSIS/Include/cmsis_gcc.h ****
575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
578:Drivers/CMSIS/Include/cmsis_gcc.h ****
579:Drivers/CMSIS/Include/cmsis_gcc.h ****
580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
582:Drivers/CMSIS/Include/cmsis_gcc.h ****
583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
591:Drivers/CMSIS/Include/cmsis_gcc.h **** */
592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
593:Drivers/CMSIS/Include/cmsis_gcc.h **** {
594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
604:Drivers/CMSIS/Include/cmsis_gcc.h ****
605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
606:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
ARM GAS /tmp/ccwmaYtI.s page 17
610:Drivers/CMSIS/Include/cmsis_gcc.h ****
611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
613:Drivers/CMSIS/Include/cmsis_gcc.h **** */
614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
615:Drivers/CMSIS/Include/cmsis_gcc.h **** {
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
626:Drivers/CMSIS/Include/cmsis_gcc.h ****
627:Drivers/CMSIS/Include/cmsis_gcc.h ****
628:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
633:Drivers/CMSIS/Include/cmsis_gcc.h ****
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
636:Drivers/CMSIS/Include/cmsis_gcc.h **** */
637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
647:Drivers/CMSIS/Include/cmsis_gcc.h ****
648:Drivers/CMSIS/Include/cmsis_gcc.h ****
649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
654:Drivers/CMSIS/Include/cmsis_gcc.h ****
655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
657:Drivers/CMSIS/Include/cmsis_gcc.h **** */
658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
666:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS /tmp/ccwmaYtI.s page 18
667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
668:Drivers/CMSIS/Include/cmsis_gcc.h ****
669:Drivers/CMSIS/Include/cmsis_gcc.h ****
670:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
675:Drivers/CMSIS/Include/cmsis_gcc.h ****
676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
678:Drivers/CMSIS/Include/cmsis_gcc.h **** */
679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
690:Drivers/CMSIS/Include/cmsis_gcc.h **** }
691:Drivers/CMSIS/Include/cmsis_gcc.h ****
692:Drivers/CMSIS/Include/cmsis_gcc.h ****
693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
698:Drivers/CMSIS/Include/cmsis_gcc.h ****
699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
701:Drivers/CMSIS/Include/cmsis_gcc.h **** */
702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
ARM GAS /tmp/ccwmaYtI.s page 19
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
756:Drivers/CMSIS/Include/cmsis_gcc.h ****
757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
760:Drivers/CMSIS/Include/cmsis_gcc.h ****
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
765:Drivers/CMSIS/Include/cmsis_gcc.h **** */
766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
767:Drivers/CMSIS/Include/cmsis_gcc.h **** {
768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
777:Drivers/CMSIS/Include/cmsis_gcc.h ****
778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS /tmp/ccwmaYtI.s page 20
781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
784:Drivers/CMSIS/Include/cmsis_gcc.h **** }
785:Drivers/CMSIS/Include/cmsis_gcc.h ****
786:Drivers/CMSIS/Include/cmsis_gcc.h ****
787:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
808:Drivers/CMSIS/Include/cmsis_gcc.h ****
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
811:Drivers/CMSIS/Include/cmsis_gcc.h ****
812:Drivers/CMSIS/Include/cmsis_gcc.h ****
813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
818:Drivers/CMSIS/Include/cmsis_gcc.h ****
819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
831:Drivers/CMSIS/Include/cmsis_gcc.h ****
832:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
835:Drivers/CMSIS/Include/cmsis_gcc.h **** */
836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
837:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccwmaYtI.s page 21
838:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
841:Drivers/CMSIS/Include/cmsis_gcc.h **** */
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
843:Drivers/CMSIS/Include/cmsis_gcc.h ****
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
845:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
849:Drivers/CMSIS/Include/cmsis_gcc.h **** */
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
851:Drivers/CMSIS/Include/cmsis_gcc.h ****
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
856:Drivers/CMSIS/Include/cmsis_gcc.h **** */
857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
858:Drivers/CMSIS/Include/cmsis_gcc.h ****
859:Drivers/CMSIS/Include/cmsis_gcc.h ****
860:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
865:Drivers/CMSIS/Include/cmsis_gcc.h **** */
866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
870:Drivers/CMSIS/Include/cmsis_gcc.h ****
871:Drivers/CMSIS/Include/cmsis_gcc.h ****
872:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
876:Drivers/CMSIS/Include/cmsis_gcc.h **** */
877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
878:Drivers/CMSIS/Include/cmsis_gcc.h **** {
879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
880:Drivers/CMSIS/Include/cmsis_gcc.h **** }
881:Drivers/CMSIS/Include/cmsis_gcc.h ****
882:Drivers/CMSIS/Include/cmsis_gcc.h ****
883:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
887:Drivers/CMSIS/Include/cmsis_gcc.h **** */
888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
889:Drivers/CMSIS/Include/cmsis_gcc.h **** {
890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
891:Drivers/CMSIS/Include/cmsis_gcc.h **** }
892:Drivers/CMSIS/Include/cmsis_gcc.h ****
893:Drivers/CMSIS/Include/cmsis_gcc.h ****
894:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS /tmp/ccwmaYtI.s page 22
895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
899:Drivers/CMSIS/Include/cmsis_gcc.h **** */
900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
901:Drivers/CMSIS/Include/cmsis_gcc.h **** {
902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
906:Drivers/CMSIS/Include/cmsis_gcc.h ****
907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
912:Drivers/CMSIS/Include/cmsis_gcc.h ****
913:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
918:Drivers/CMSIS/Include/cmsis_gcc.h **** */
919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
922:Drivers/CMSIS/Include/cmsis_gcc.h ****
923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
927:Drivers/CMSIS/Include/cmsis_gcc.h ****
928:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
933:Drivers/CMSIS/Include/cmsis_gcc.h **** */
934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
935:Drivers/CMSIS/Include/cmsis_gcc.h **** {
936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
940:Drivers/CMSIS/Include/cmsis_gcc.h ****
941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
945:Drivers/CMSIS/Include/cmsis_gcc.h ****
946:Drivers/CMSIS/Include/cmsis_gcc.h ****
947:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
ARM GAS /tmp/ccwmaYtI.s page 23
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
953:Drivers/CMSIS/Include/cmsis_gcc.h **** */
954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
955:Drivers/CMSIS/Include/cmsis_gcc.h **** {
956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
960:Drivers/CMSIS/Include/cmsis_gcc.h **** }
961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
962:Drivers/CMSIS/Include/cmsis_gcc.h **** }
963:Drivers/CMSIS/Include/cmsis_gcc.h ****
964:Drivers/CMSIS/Include/cmsis_gcc.h ****
965:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
971:Drivers/CMSIS/Include/cmsis_gcc.h **** */
972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
974:Drivers/CMSIS/Include/cmsis_gcc.h ****
975:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
980:Drivers/CMSIS/Include/cmsis_gcc.h **** */
981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
984:Drivers/CMSIS/Include/cmsis_gcc.h ****
985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
152 .loc 2 988 4
153 00bc 3B6B ldr r3, [r7, #48]
154 .syntax unified
155 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
156 00be 93FAA3F3 rbit r3, r3
157 @ 0 "" 2
158 .thumb
159 .syntax unified
160 00c2 FB62 str r3, [r7, #44]
989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
991:Drivers/CMSIS/Include/cmsis_gcc.h ****
992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
994:Drivers/CMSIS/Include/cmsis_gcc.h **** {
995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
998:Drivers/CMSIS/Include/cmsis_gcc.h **** }
999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
ARM GAS /tmp/ccwmaYtI.s page 24
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
161 .loc 2 1001 10
162 00c4 FB6A ldr r3, [r7, #44]
163 .LBE19:
164 .LBE18:
153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE();
165 .loc 1 154 7 discriminator 1
166 00c6 B3FA83F3 clz r3, r3
167 .loc 1 154 7 is_stmt 0 discriminator 2
168 00ca DBB2 uxtb r3, r3
169 00cc 1A46 mov r2, r3
170 00ce 254B ldr r3, .L30+8
171 00d0 1344 add r3, r3, r2
172 00d2 9B00 lsls r3, r3, #2
173 00d4 1A46 mov r2, r3
174 00d6 0123 movs r3, #1
175 00d8 1360 str r3, [r2]
176 00da 4FF48033 mov r3, #65536
177 00de BB63 str r3, [r7, #56]
178 .LBB20:
179 .LBB21:
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
180 .loc 2 988 4 is_stmt 1
181 00e0 BB6B ldr r3, [r7, #56]
182 .syntax unified
183 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
184 00e2 93FAA3F3 rbit r3, r3
185 @ 0 "" 2
186 .thumb
187 .syntax unified
188 00e6 7B63 str r3, [r7, #52]
189 .loc 2 1001 10
190 00e8 7B6B ldr r3, [r7, #52]
191 .LBE21:
192 .LBE20:
155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE();
193 .loc 1 155 7 discriminator 1
194 00ea B3FA83F3 clz r3, r3
195 .loc 1 155 7 is_stmt 0 discriminator 2
196 00ee DBB2 uxtb r3, r3
197 00f0 1A46 mov r2, r3
198 00f2 1C4B ldr r3, .L30+8
199 00f4 1344 add r3, r3, r2
200 00f6 9B00 lsls r3, r3, #2
201 00f8 1A46 mov r2, r3
202 00fa 0023 movs r3, #0
203 00fc 1360 str r3, [r2]
156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */
157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC->BDCR = temp_reg;
204 .loc 1 157 10 is_stmt 1
205 00fe 174A ldr r2, .L30
206 .loc 1 157 17
207 0100 FB6B ldr r3, [r7, #60]
208 0102 1362 str r3, [r2, #32]
158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
ARM GAS /tmp/ccwmaYtI.s page 25
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */
160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
209 .loc 1 160 11
210 0104 FB6B ldr r3, [r7, #60]
211 0106 03F00103 and r3, r3, #1
212 .loc 1 160 10
213 010a 002B cmp r3, #0
214 010c 49D0 beq .L8
161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get Start Tick */
163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
215 .loc 1 163 21
216 010e FFF7FEFF bl HAL_GetTick
217 0112 3864 str r0, [r7, #64]
164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait till LSE is ready */
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
218 .loc 1 166 14
219 0114 0AE0 b .L11
220 .L18:
167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
221 .loc 1 168 17
222 0116 FFF7FEFF bl HAL_GetTick
223 011a 0246 mov r2, r0
224 .loc 1 168 31 discriminator 1
225 011c 3B6C ldr r3, [r7, #64]
226 011e D31A subs r3, r2, r3
227 .loc 1 168 15 discriminator 1
228 0120 41F28832 movw r2, #5000
229 0124 9342 cmp r3, r2
230 0126 01D9 bls .L11
169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_TIMEOUT;
231 .loc 1 170 20
232 0128 0323 movs r3, #3
233 012a F3E0 b .L6
234 .L11:
235 012c 0223 movs r3, #2
236 012e BB62 str r3, [r7, #40]
237 .LBB22:
238 .LBB23:
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
239 .loc 2 988 4
240 0130 BB6A ldr r3, [r7, #40]
241 .syntax unified
242 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
243 0132 93FAA3F3 rbit r3, r3
244 @ 0 "" 2
245 .thumb
246 .syntax unified
247 0136 7B62 str r3, [r7, #36]
248 0138 0223 movs r3, #2
249 013a 3B62 str r3, [r7, #32]
250 .LBE23:
251 .LBE22:
252 .LBB24:
ARM GAS /tmp/ccwmaYtI.s page 26
253 .LBB25:
254 013c 3B6A ldr r3, [r7, #32]
255 .syntax unified
256 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
257 013e 93FAA3F3 rbit r3, r3
258 @ 0 "" 2
259 .thumb
260 .syntax unified
261 0142 FB61 str r3, [r7, #28]
262 .loc 2 1001 10
263 0144 FB69 ldr r3, [r7, #28]
264 .LBE25:
265 .LBE24:
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
266 .loc 1 166 15 discriminator 1
267 0146 B3FA83F3 clz r3, r3
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
268 .loc 1 166 15 is_stmt 0 discriminator 2
269 014a DBB2 uxtb r3, r3
270 014c 23F05F03 bic r3, r3, #95
271 0150 DBB2 uxtb r3, r3
272 0152 002B cmp r3, #0
273 0154 08D1 bne .L14
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
274 .loc 1 166 15 discriminator 4
275 0156 014B ldr r3, .L30
276 0158 1B6A ldr r3, [r3, #32]
277 015a 0DE0 b .L15
278 .L31:
279 .align 2
280 .L30:
281 015c 00100240 .word 1073876992
282 0160 00700040 .word 1073770496
283 0164 00819010 .word 277905664
284 .L14:
285 0168 0223 movs r3, #2
286 016a BB61 str r3, [r7, #24]
287 .LBB26:
288 .LBB27:
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
289 .loc 2 988 4 is_stmt 1
290 016c BB69 ldr r3, [r7, #24]
291 .syntax unified
292 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
293 016e 93FAA3F3 rbit r3, r3
294 @ 0 "" 2
295 .thumb
296 .syntax unified
297 0172 7B61 str r3, [r7, #20]
298 .LBE27:
299 .LBE26:
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
300 .loc 1 166 15 discriminator 8
301 0174 694B ldr r3, .L32
302 0176 5B6A ldr r3, [r3, #36]
303 .L15:
304 0178 0222 movs r2, #2
ARM GAS /tmp/ccwmaYtI.s page 27
305 017a 3A61 str r2, [r7, #16]
306 .LBB28:
307 .LBB29:
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
308 .loc 2 988 4
309 017c 3A69 ldr r2, [r7, #16]
310 .syntax unified
311 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
312 017e 92FAA2F2 rbit r2, r2
313 @ 0 "" 2
314 .thumb
315 .syntax unified
316 0182 FA60 str r2, [r7, #12]
317 .loc 2 1001 10
318 0184 FA68 ldr r2, [r7, #12]
319 .LBE29:
320 .LBE28:
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
321 .loc 1 166 15 discriminator 1
322 0186 B2FA82F2 clz r2, r2
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
323 .loc 1 166 15 is_stmt 0 discriminator 2
324 018a D2B2 uxtb r2, r2
325 018c 42F04002 orr r2, r2, #64
326 0190 D2B2 uxtb r2, r2
327 0192 02F01F02 and r2, r2, #31
328 0196 0121 movs r1, #1
329 0198 01FA02F2 lsl r2, r1, r2
330 019c 1340 ands r3, r3, r2
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
331 .loc 1 166 51 is_stmt 1 discriminator 2
332 019e 002B cmp r3, #0
333 01a0 B9D0 beq .L18
334 .L8:
171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
335 .loc 1 175 5
336 01a2 5E4B ldr r3, .L32
337 01a4 1B6A ldr r3, [r3, #32]
338 01a6 23F44072 bic r2, r3, #768
339 01aa 7B68 ldr r3, [r7, #4]
340 01ac 5B68 ldr r3, [r3, #4]
341 01ae 5B49 ldr r1, .L32
342 01b0 1343 orrs r3, r3, r2
343 01b2 0B62 str r3, [r1, #32]
176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */
178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(pwrclkchanged == SET)
344 .loc 1 178 7
345 01b4 97F84730 ldrb r3, [r7, #71] @ zero_extendqisi2
346 01b8 012B cmp r3, #1
347 01ba 05D1 bne .L2
179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE();
ARM GAS /tmp/ccwmaYtI.s page 28
348 .loc 1 180 7
349 01bc 574B ldr r3, .L32
350 01be DB69 ldr r3, [r3, #28]
351 01c0 564A ldr r2, .L32
352 01c2 23F08053 bic r3, r3, #268435456
353 01c6 D361 str r3, [r2, #28]
354 .L2:
181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------- USART1 Configuration ------------------------*/
185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
355 .loc 1 185 21
356 01c8 7B68 ldr r3, [r7, #4]
357 01ca 1B68 ldr r3, [r3]
358 .loc 1 185 45
359 01cc 03F00103 and r3, r3, #1
360 .loc 1 185 5
361 01d0 002B cmp r3, #0
362 01d2 08D0 beq .L19
186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
363 .loc 1 191 5
364 01d4 514B ldr r3, .L32
365 01d6 1B6B ldr r3, [r3, #48]
366 01d8 23F00302 bic r2, r3, #3
367 01dc 7B68 ldr r3, [r7, #4]
368 01de 9B68 ldr r3, [r3, #8]
369 01e0 4E49 ldr r1, .L32
370 01e2 1343 orrs r3, r3, r2
371 01e4 0B63 str r3, [r1, #48]
372 .L19:
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW)
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*----------------------------- USART2 Configuration --------------------------*/
196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
373 .loc 1 196 21
374 01e6 7B68 ldr r3, [r7, #4]
375 01e8 1B68 ldr r3, [r3]
376 .loc 1 196 45
377 01ea 03F00203 and r3, r3, #2
378 .loc 1 196 5
379 01ee 002B cmp r3, #0
380 01f0 08D0 beq .L20
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
381 .loc 1 202 5
382 01f2 4A4B ldr r3, .L32
ARM GAS /tmp/ccwmaYtI.s page 29
383 01f4 1B6B ldr r3, [r3, #48]
384 01f6 23F44032 bic r2, r3, #196608
385 01fa 7B68 ldr r3, [r7, #4]
386 01fc DB68 ldr r3, [r3, #12]
387 01fe 4749 ldr r1, .L32
388 0200 1343 orrs r3, r3, r2
389 0202 0B63 str r3, [r1, #48]
390 .L20:
203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */
205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW)
207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ USART3 Configuration ------------------------*/
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
391 .loc 1 208 21
392 0204 7B68 ldr r3, [r7, #4]
393 0206 1B68 ldr r3, [r3]
394 .loc 1 208 45
395 0208 03F00403 and r3, r3, #4
396 .loc 1 208 5
397 020c 002B cmp r3, #0
398 020e 08D0 beq .L21
209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART3 clock source */
214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
399 .loc 1 214 5
400 0210 424B ldr r3, .L32
401 0212 1B6B ldr r3, [r3, #48]
402 0214 23F44022 bic r2, r3, #786432
403 0218 7B68 ldr r3, [r7, #4]
404 021a 1B69 ldr r3, [r3, #16]
405 021c 3F49 ldr r1, .L32
406 021e 1343 orrs r3, r3, r2
407 0220 0B63 str r3, [r1, #48]
408 .L21:
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */
217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C1 Configuration ------------------------*/
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
409 .loc 1 219 21
410 0222 7B68 ldr r3, [r7, #4]
411 0224 1B68 ldr r3, [r3]
412 .loc 1 219 45
413 0226 03F02003 and r3, r3, #32
414 .loc 1 219 5
415 022a 002B cmp r3, #0
416 022c 08D0 beq .L22
220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */
225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
ARM GAS /tmp/ccwmaYtI.s page 30
417 .loc 1 225 5
418 022e 3B4B ldr r3, .L32
419 0230 1B6B ldr r3, [r3, #48]
420 0232 23F01002 bic r2, r3, #16
421 0236 7B68 ldr r3, [r7, #4]
422 0238 DB69 ldr r3, [r3, #28]
423 023a 3849 ldr r1, .L32
424 023c 1343 orrs r3, r3, r2
425 023e 0B63 str r3, [r1, #48]
426 .L22:
226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE)\
229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC)\
230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302x8) \
231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC)
232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ USB Configuration ------------------------*/
233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
427 .loc 1 233 21
428 0240 7B68 ldr r3, [r7, #4]
429 0242 1B68 ldr r3, [r3]
430 .loc 1 233 45
431 0244 03F40033 and r3, r3, #131072
432 .loc 1 233 5
433 0248 002B cmp r3, #0
434 024a 08D0 beq .L23
234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->USBClockSelection));
237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USB clock source */
239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->USBClockSelection);
435 .loc 1 239 5
436 024c 334B ldr r3, .L32
437 024e 5B68 ldr r3, [r3, #4]
438 0250 23F48002 bic r2, r3, #4194304
439 0254 7B68 ldr r3, [r7, #4]
440 0256 1B6B ldr r3, [r3, #48]
441 0258 3049 ldr r1, .L32
442 025a 1343 orrs r3, r3, r2
443 025c 4B60 str r3, [r1, #4]
444 .L23:
240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || */
243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || */
244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302x8 || */
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC */
246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\
250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx)
251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C2 Configuration ------------------------*/
253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
445 .loc 1 253 21
ARM GAS /tmp/ccwmaYtI.s page 31
446 025e 7B68 ldr r3, [r7, #4]
447 0260 1B68 ldr r3, [r3]
448 .loc 1 253 45
449 0262 03F04003 and r3, r3, #64
450 .loc 1 253 5
451 0266 002B cmp r3, #0
452 0268 08D0 beq .L24
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C2 clock source */
259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
453 .loc 1 259 5
454 026a 2C4B ldr r3, .L32
455 026c 1B6B ldr r3, [r3, #48]
456 026e 23F02002 bic r2, r3, #32
457 0272 7B68 ldr r3, [r7, #4]
458 0274 1B6A ldr r3, [r3, #32]
459 0276 2949 ldr r1, .L32
460 0278 1343 orrs r3, r3, r2
461 027a 0B63 str r3, [r1, #48]
462 .L24:
260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */
264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */
266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C3 Configuration ------------------------*/
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C3 clock source */
277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */
281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ UART4 Configuration ------------------------*/
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
463 .loc 1 286 21
464 027c 7B68 ldr r3, [r7, #4]
465 027e 1B68 ldr r3, [r3]
466 .loc 1 286 45
467 0280 03F00803 and r3, r3, #8
468 .loc 1 286 5
469 0284 002B cmp r3, #0
ARM GAS /tmp/ccwmaYtI.s page 32
470 0286 08D0 beq .L25
287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the UART4 clock source */
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
471 .loc 1 292 5
472 0288 244B ldr r3, .L32
473 028a 1B6B ldr r3, [r3, #48]
474 028c 23F44012 bic r2, r3, #3145728
475 0290 7B68 ldr r3, [r7, #4]
476 0292 5B69 ldr r3, [r3, #20]
477 0294 2149 ldr r1, .L32
478 0296 1343 orrs r3, r3, r2
479 0298 0B63 str r3, [r1, #48]
480 .L25:
293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ UART5 Configuration ------------------------*/
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
481 .loc 1 296 21
482 029a 7B68 ldr r3, [r7, #4]
483 029c 1B68 ldr r3, [r3]
484 .loc 1 296 45
485 029e 03F01003 and r3, r3, #16
486 .loc 1 296 5
487 02a2 002B cmp r3, #0
488 02a4 08D0 beq .L26
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the UART5 clock source */
302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
489 .loc 1 302 5
490 02a6 1D4B ldr r3, .L32
491 02a8 1B6B ldr r3, [r3, #48]
492 02aa 23F44002 bic r2, r3, #12582912
493 02ae 7B68 ldr r3, [r7, #4]
494 02b0 9B69 ldr r3, [r3, #24]
495 02b2 1A49 ldr r1, .L32
496 02b4 1343 orrs r3, r3, r2
497 02b6 0B63 str r3, [r1, #48]
498 .L26:
303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx */
307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2S Configuration ------------------------*/
312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S)
499 .loc 1 312 21
500 02b8 7B68 ldr r3, [r7, #4]
ARM GAS /tmp/ccwmaYtI.s page 33
501 02ba 1B68 ldr r3, [r3]
502 .loc 1 312 45
503 02bc 03F40073 and r3, r3, #512
504 .loc 1 312 5
505 02c0 002B cmp r3, #0
506 02c2 08D0 beq .L27
313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2S clock source */
318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
507 .loc 1 318 5
508 02c4 154B ldr r3, .L32
509 02c6 5B68 ldr r3, [r3, #4]
510 02c8 23F40002 bic r2, r3, #8388608
511 02cc 7B68 ldr r3, [r7, #4]
512 02ce 9B6A ldr r3, [r3, #40]
513 02d0 1249 ldr r1, .L32
514 02d2 1343 orrs r3, r3, r2
515 02d4 4B60 str r3, [r1, #4]
516 .L27:
319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */
323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */
324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 clock Configuration ------------------*/
328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC1) == RCC_PERIPHCLK_ADC1)
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC1PLLCLK_DIV(PeriphClkInit->Adc1ClockSelection));
332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC1 clock source */
334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC1_CONFIG(PeriphClkInit->Adc1ClockSelection);
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */
338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 & ADC2 clock Configuration -------------*/
344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC12) == RCC_PERIPHCLK_ADC12)
517 .loc 1 344 21
518 02d6 7B68 ldr r3, [r7, #4]
519 02d8 1B68 ldr r3, [r3]
520 .loc 1 344 45
521 02da 03F08003 and r3, r3, #128
522 .loc 1 344 5
523 02de 002B cmp r3, #0
524 02e0 08D0 beq .L28
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
ARM GAS /tmp/ccwmaYtI.s page 34
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC12PLLCLK_DIV(PeriphClkInit->Adc12ClockSelection));
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC12 clock source */
350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC12_CONFIG(PeriphClkInit->Adc12ClockSelection);
525 .loc 1 350 5
526 02e2 0E4B ldr r3, .L32
527 02e4 DB6A ldr r3, [r3, #44]
528 02e6 23F4F872 bic r2, r3, #496
529 02ea 7B68 ldr r3, [r7, #4]
530 02ec 5B6A ldr r3, [r3, #36]
531 02ee 0B49 ldr r1, .L32
532 02f0 1343 orrs r3, r3, r2
533 02f2 CB62 str r3, [r1, #44]
534 .L28:
351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx */
356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\
358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx)
359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC3 & ADC4 clock Configuration -------------*/
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC34) == RCC_PERIPHCLK_ADC34)
362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC34PLLCLK_DIV(PeriphClkInit->Adc34ClockSelection));
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC34 clock source */
367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC34_CONFIG(PeriphClkInit->Adc34ClockSelection);
368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */
372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx)
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 clock Configuration ------------------*/
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC1) == RCC_PERIPHCLK_ADC1)
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC1PCLK2_DIV(PeriphClkInit->Adc1ClockSelection));
380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC1 clock source */
382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC1_CONFIG(PeriphClkInit->Adc1ClockSelection);
383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\
390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM1 clock Configuration ----------------*/
ARM GAS /tmp/ccwmaYtI.s page 35
393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM1) == RCC_PERIPHCLK_TIM1)
535 .loc 1 393 21
536 02f4 7B68 ldr r3, [r7, #4]
537 02f6 1B68 ldr r3, [r3]
538 .loc 1 393 45
539 02f8 03F48053 and r3, r3, #4096
540 .loc 1 393 5
541 02fc 002B cmp r3, #0
542 02fe 08D0 beq .L29
394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM1CLKSOURCE(PeriphClkInit->Tim1ClockSelection));
397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM1 clock source */
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM1_CONFIG(PeriphClkInit->Tim1ClockSelection);
543 .loc 1 399 5
544 0300 064B ldr r3, .L32
545 0302 1B6B ldr r3, [r3, #48]
546 0304 23F48072 bic r2, r3, #256
547 0308 7B68 ldr r3, [r7, #4]
548 030a DB6A ldr r3, [r3, #44]
549 030c 0349 ldr r1, .L32
550 030e 1343 orrs r3, r3, r2
551 0310 0B63 str r3, [r1, #48]
552 .L29:
400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */
404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\
408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx)
409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM8 clock Configuration ----------------*/
411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM8) == RCC_PERIPHCLK_TIM8)
412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM8CLKSOURCE(PeriphClkInit->Tim8ClockSelection));
415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM8 clock source */
417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM8_CONFIG(PeriphClkInit->Tim8ClockSelection);
418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */
421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */
422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM15 clock Configuration ----------------*/
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM15) == RCC_PERIPHCLK_TIM15)
427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM15CLKSOURCE(PeriphClkInit->Tim15ClockSelection));
430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM15 clock source */
ARM GAS /tmp/ccwmaYtI.s page 36
432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM15_CONFIG(PeriphClkInit->Tim15ClockSelection);
433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM16 clock Configuration ----------------*/
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM16) == RCC_PERIPHCLK_TIM16)
437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM16CLKSOURCE(PeriphClkInit->Tim16ClockSelection));
440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM16 clock source */
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM16_CONFIG(PeriphClkInit->Tim16ClockSelection);
443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM17 clock Configuration ----------------*/
446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM17) == RCC_PERIPHCLK_TIM17)
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM17CLKSOURCE(PeriphClkInit->Tim17ClockSelection));
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM17 clock source */
452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM17_CONFIG(PeriphClkInit->Tim17ClockSelection);
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */
456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F334x8)
458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ HRTIM1 clock Configuration ----------------*/
460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1)
461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection));
464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the HRTIM1 clock source */
466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection);
467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F334x8 */
470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx)
472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ SDADC clock Configuration -------------------*/
474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDADC) == RCC_PERIPHCLK_SDADC)
475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_SDADCSYSCLK_DIV(PeriphClkInit->SdadcClockSelection));
478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the SDADC clock prescaler */
480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_SDADC_CONFIG(PeriphClkInit->SdadcClockSelection);
481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ CEC clock Configuration -------------------*/
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
ARM GAS /tmp/ccwmaYtI.s page 37
489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */
490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM2 clock Configuration -------------------*/
498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM2) == RCC_PERIPHCLK_TIM2)
499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM2CLKSOURCE(PeriphClkInit->Tim2ClockSelection));
502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */
504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM2_CONFIG(PeriphClkInit->Tim2ClockSelection);
505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM3 clock Configuration -------------------*/
508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM34) == RCC_PERIPHCLK_TIM34)
509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM3CLKSOURCE(PeriphClkInit->Tim34ClockSelection));
512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */
514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM34_CONFIG(PeriphClkInit->Tim34ClockSelection);
515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM15 clock Configuration ------------------*/
518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM15) == RCC_PERIPHCLK_TIM15)
519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM15CLKSOURCE(PeriphClkInit->Tim15ClockSelection));
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */
524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM15_CONFIG(PeriphClkInit->Tim15ClockSelection);
525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM16 clock Configuration ------------------*/
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM16) == RCC_PERIPHCLK_TIM16)
529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM16CLKSOURCE(PeriphClkInit->Tim16ClockSelection));
532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */
534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM16_CONFIG(PeriphClkInit->Tim16ClockSelection);
535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM17 clock Configuration ------------------*/
538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM17) == RCC_PERIPHCLK_TIM17)
539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM17CLKSOURCE(PeriphClkInit->Tim17ClockSelection));
542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */
544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM17_CONFIG(PeriphClkInit->Tim17ClockSelection);
545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
ARM GAS /tmp/ccwmaYtI.s page 38
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)
550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM20 clock Configuration ------------------*/
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM20) == RCC_PERIPHCLK_TIM20)
552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM20CLKSOURCE(PeriphClkInit->Tim20ClockSelection));
555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */
557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM20_CONFIG(PeriphClkInit->Tim20ClockSelection);
558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx */
560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_OK;
553 .loc 1 562 10
554 0312 0023 movs r3, #0
555 .L6:
563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
556 .loc 1 563 1
557 0314 1846 mov r0, r3
558 0316 4837 adds r7, r7, #72
559 .cfi_def_cfa_offset 8
560 0318 BD46 mov sp, r7
561 .cfi_def_cfa_register 13
562 @ sp needed
563 031a 80BD pop {r7, pc}
564 .L33:
565 .align 2
566 .L32:
567 031c 00100240 .word 1073876992
568 .cfi_endproc
569 .LFE130:
571 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits
572 .align 1
573 .global HAL_RCCEx_GetPeriphCLKConfig
574 .syntax unified
575 .thumb
576 .thumb_func
578 HAL_RCCEx_GetPeriphCLKConfig:
579 .LFB131:
564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /**
566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Get the RCC_ClkInitStruct according to the internal
567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * RCC configuration registers.
568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks
570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * (ADC, CEC, I2C, I2S, SDADC, HRTIM, TIM, USART, RTC and USB clocks).
571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval None
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
580 .loc 1 574 1
581 .cfi_startproc
582 @ args = 0, pretend = 0, frame = 8
ARM GAS /tmp/ccwmaYtI.s page 39
583 @ frame_needed = 1, uses_anonymous_args = 0
584 @ link register save eliminated.
585 0000 80B4 push {r7}
586 .cfi_def_cfa_offset 4
587 .cfi_offset 7, -4
588 0002 83B0 sub sp, sp, #12
589 .cfi_def_cfa_offset 16
590 0004 00AF add r7, sp, #0
591 .cfi_def_cfa_register 7
592 0006 7860 str r0, [r7, #4]
575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/
576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Common part first */
577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) && defined(RCC_CFGR3_USART3SW)
578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK
593 .loc 1 578 39
594 0008 7B68 ldr r3, [r7, #4]
595 000a 3A4A ldr r2, .L35
596 000c 1A60 str r2, [r3]
579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC;
580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else
581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | \
582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC;
583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW && RCC_CFGR3_USART3SW */
584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the RTC configuration --------------------------------------------*/
586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE();
597 .loc 1 586 38
598 000e 3A4B ldr r3, .L35+4
599 0010 1B6A ldr r3, [r3, #32]
600 0012 03F44072 and r2, r3, #768
601 .loc 1 586 36
602 0016 7B68 ldr r3, [r7, #4]
603 0018 5A60 str r2, [r3, #4]
587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/
588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE();
604 .loc 1 588 41
605 001a 374B ldr r3, .L35+4
606 001c 1B6B ldr r3, [r3, #48]
607 001e 03F00302 and r2, r3, #3
608 .loc 1 588 39
609 0022 7B68 ldr r3, [r7, #4]
610 0024 9A60 str r2, [r3, #8]
589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW)
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART2 clock configuration -----------------------------------------*/
591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE();
611 .loc 1 591 41
612 0026 344B ldr r3, .L35+4
613 0028 1B6B ldr r3, [r3, #48]
614 002a 03F44032 and r2, r3, #196608
615 .loc 1 591 39
616 002e 7B68 ldr r3, [r7, #4]
617 0030 DA60 str r2, [r3, #12]
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */
593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW)
594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART3 clock configuration -----------------------------------------*/
595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE();
618 .loc 1 595 41
ARM GAS /tmp/ccwmaYtI.s page 40
619 0032 314B ldr r3, .L35+4
620 0034 1B6B ldr r3, [r3, #48]
621 0036 03F44022 and r2, r3, #786432
622 .loc 1 595 39
623 003a 7B68 ldr r3, [r7, #4]
624 003c 1A61 str r2, [r3, #16]
596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */
597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C1 clock configuration -----------------------------------------*/
598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
625 .loc 1 598 39
626 003e 2E4B ldr r3, .L35+4
627 0040 1B6B ldr r3, [r3, #48]
628 0042 03F01002 and r2, r3, #16
629 .loc 1 598 37
630 0046 7B68 ldr r3, [r7, #4]
631 0048 DA61 str r2, [r3, #28]
599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE)\
601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC)\
602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302x8) \
603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC)
604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB;
632 .loc 1 605 16
633 004a 7B68 ldr r3, [r7, #4]
634 004c 1B68 ldr r3, [r3]
635 .loc 1 605 39
636 004e 43F40032 orr r2, r3, #131072
637 0052 7B68 ldr r3, [r7, #4]
638 0054 1A60 str r2, [r3]
606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USB clock configuration -----------------------------------------*/
607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->USBClockSelection = __HAL_RCC_GET_USB_SOURCE();
639 .loc 1 607 38
640 0056 284B ldr r3, .L35+4
641 0058 5B68 ldr r3, [r3, #4]
642 005a 03F48002 and r2, r3, #4194304
643 .loc 1 607 36
644 005e 7B68 ldr r3, [r7, #4]
645 0060 1A63 str r2, [r3, #48]
608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || */
610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || */
611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302x8 || */
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC */
613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx)
618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2C2;
646 .loc 1 619 16
647 0062 7B68 ldr r3, [r7, #4]
648 0064 1B68 ldr r3, [r3]
649 .loc 1 619 39
650 0066 43F04002 orr r2, r3, #64
651 006a 7B68 ldr r3, [r7, #4]
ARM GAS /tmp/ccwmaYtI.s page 41
652 006c 1A60 str r2, [r3]
620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C2 clock configuration -----------------------------------------*/
621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE();
653 .loc 1 621 39
654 006e 224B ldr r3, .L35+4
655 0070 1B6B ldr r3, [r3, #48]
656 0072 03F02002 and r2, r3, #32
657 .loc 1 621 37
658 0076 7B68 ldr r3, [r7, #4]
659 0078 1A62 str r2, [r3, #32]
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */
625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */
627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2C3;
632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C3 clock configuration -----------------------------------------*/
633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE();
634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */
637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) ||defined(STM32F358xx)
640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= (RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5);
660 .loc 1 641 16
661 007a 7B68 ldr r3, [r7, #4]
662 007c 1B68 ldr r3, [r3]
663 .loc 1 641 39
664 007e 43F01802 orr r2, r3, #24
665 0082 7B68 ldr r3, [r7, #4]
666 0084 1A60 str r2, [r3]
642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART4 clock configuration -----------------------------------------*/
643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE();
667 .loc 1 643 40
668 0086 1C4B ldr r3, .L35+4
669 0088 1B6B ldr r3, [r3, #48]
670 008a 03F44012 and r2, r3, #3145728
671 .loc 1 643 38
672 008e 7B68 ldr r3, [r7, #4]
673 0090 5A61 str r2, [r3, #20]
644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART5 clock configuration -----------------------------------------*/
645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE();
674 .loc 1 645 40
675 0092 194B ldr r3, .L35+4
676 0094 1B6B ldr r3, [r3, #48]
677 0096 03F44002 and r2, r3, #12582912
678 .loc 1 645 38
679 009a 7B68 ldr r3, [r7, #4]
680 009c 9A61 str r2, [r3, #24]
646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
ARM GAS /tmp/ccwmaYtI.s page 42
648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx */
649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2S;
681 .loc 1 654 16
682 009e 7B68 ldr r3, [r7, #4]
683 00a0 1B68 ldr r3, [r3]
684 .loc 1 654 39
685 00a2 43F40072 orr r2, r3, #512
686 00a6 7B68 ldr r3, [r7, #4]
687 00a8 1A60 str r2, [r3]
655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2S clock configuration -----------------------------------------*/
656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2sClockSelection = __HAL_RCC_GET_I2S_SOURCE();
688 .loc 1 656 38
689 00aa 134B ldr r3, .L35+4
690 00ac 5B68 ldr r3, [r3, #4]
691 00ae 03F40002 and r2, r3, #8388608
692 .loc 1 656 36
693 00b2 7B68 ldr r3, [r7, #4]
694 00b4 9A62 str r2, [r3, #40]
657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */
660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\
663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx)
664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC1;
666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 clock configuration -----------------------------------------*/
667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc1ClockSelection = __HAL_RCC_GET_ADC1_SOURCE();
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */
671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC12;
695 .loc 1 676 16
696 00b6 7B68 ldr r3, [r7, #4]
697 00b8 1B68 ldr r3, [r3]
698 .loc 1 676 39
699 00ba 43F08002 orr r2, r3, #128
700 00be 7B68 ldr r3, [r7, #4]
701 00c0 1A60 str r2, [r3]
677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 & ADC2 clock configuration -----------------------------------------*/
678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc12ClockSelection = __HAL_RCC_GET_ADC12_SOURCE();
702 .loc 1 678 40
703 00c2 0D4B ldr r3, .L35+4
704 00c4 DB6A ldr r3, [r3, #44]
705 00c6 03F4F872 and r2, r3, #496
706 .loc 1 678 38
ARM GAS /tmp/ccwmaYtI.s page 43
707 00ca 7B68 ldr r3, [r7, #4]
708 00cc 5A62 str r2, [r3, #36]
679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */
682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx */
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\
685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx)
686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC34;
688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC3 & ADC4 clock configuration -----------------------------------------*/
689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc34ClockSelection = __HAL_RCC_GET_ADC34_SOURCE();
690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */
692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */
693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\
697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM1;
709 .loc 1 699 16
710 00ce 7B68 ldr r3, [r7, #4]
711 00d0 1B68 ldr r3, [r3]
712 .loc 1 699 39
713 00d2 43F48052 orr r2, r3, #4096
714 00d6 7B68 ldr r3, [r7, #4]
715 00d8 1A60 str r2, [r3]
700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM1 clock configuration -----------------------------------------*/
701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim1ClockSelection = __HAL_RCC_GET_TIM1_SOURCE();
716 .loc 1 701 39
717 00da 074B ldr r3, .L35+4
718 00dc 1B6B ldr r3, [r3, #48]
719 00de 03F48072 and r2, r3, #256
720 .loc 1 701 37
721 00e2 7B68 ldr r3, [r7, #4]
722 00e4 DA62 str r2, [r3, #44]
702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */
705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */
707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\
709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx)
710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM8;
712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM8 clock configuration -----------------------------------------*/
713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim8ClockSelection = __HAL_RCC_GET_TIM8_SOURCE();
714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */
716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */
717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
ARM GAS /tmp/ccwmaYtI.s page 44
720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= (RCC_PERIPHCLK_TIM15 | RCC_PERIPHCLK_TIM16 | RCC_PERIPHCLK
721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM15 clock configuration -----------------------------------------*/
722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim15ClockSelection = __HAL_RCC_GET_TIM15_SOURCE();
723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/
724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim16ClockSelection = __HAL_RCC_GET_TIM16_SOURCE();
725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/
726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim17ClockSelection = __HAL_RCC_GET_TIM17_SOURCE();
727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */
729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F334x8)
731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_HRTIM1;
733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the HRTIM1 clock configuration -----------------------------------------*/
734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Hrtim1ClockSelection = __HAL_RCC_GET_HRTIM1_SOURCE();
735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F334x8 */
737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx)
739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_SDADC;
741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the SDADC clock configuration -----------------------------------------*/
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->SdadcClockSelection = __HAL_RCC_GET_SDADC_SOURCE();
743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_CEC;
745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the CEC clock configuration -----------------------------------------*/
746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE();
747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */
749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM2;
753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM2 clock configuration -----------------------------------------*/
754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim2ClockSelection = __HAL_RCC_GET_TIM2_SOURCE();
755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM34;
757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM3 clock configuration -----------------------------------------*/
758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim34ClockSelection = __HAL_RCC_GET_TIM34_SOURCE();
759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM15;
761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM15 clock configuration -----------------------------------------*/
762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim15ClockSelection = __HAL_RCC_GET_TIM15_SOURCE();
763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM16;
765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/
766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim16ClockSelection = __HAL_RCC_GET_TIM16_SOURCE();
767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM17;
769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/
770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim17ClockSelection = __HAL_RCC_GET_TIM17_SOURCE();
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined (STM32F303xE) || defined(STM32F398xx)
775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM20;
776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM20 clock configuration -----------------------------------------*/
ARM GAS /tmp/ccwmaYtI.s page 45
777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim20ClockSelection = __HAL_RCC_GET_TIM20_SOURCE();
778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx */
779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
723 .loc 1 779 1
724 00e6 00BF nop
725 00e8 0C37 adds r7, r7, #12
726 .cfi_def_cfa_offset 4
727 00ea BD46 mov sp, r7
728 .cfi_def_cfa_register 13
729 @ sp needed
730 00ec 5DF8047B ldr r7, [sp], #4
731 .cfi_restore 7
732 .cfi_def_cfa_offset 0
733 00f0 7047 bx lr
734 .L36:
735 00f2 00BF .align 2
736 .L35:
737 00f4 27000100 .word 65575
738 00f8 00100240 .word 1073876992
739 .cfi_endproc
740 .LFE131:
742 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits
743 .align 1
744 .global HAL_RCCEx_GetPeriphCLKFreq
745 .syntax unified
746 .thumb
747 .thumb_func
749 HAL_RCCEx_GetPeriphCLKFreq:
750 .LFB132:
780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /**
782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Returns the peripheral clock frequency
783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note Returns 0 if peripheral clock is unknown or 0xDEADDEAD if not applicable.
784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier
785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This parameter can be one of the following values:
786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock
787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock
788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock
789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F301x8
790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock
792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock
794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock
796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock
797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock
798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302x8
800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock
802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock
805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock
807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock
ARM GAS /tmp/ccwmaYtI.s page 46
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock
809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302xC
811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock
814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock
815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302xE
822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock
825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock
826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock
828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock
833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock
834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock
835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock
836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock
837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303x8
839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303xC
843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock
846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock
847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock
852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock
854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303xE
856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock
859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock
860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock
862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
ARM GAS /tmp/ccwmaYtI.s page 47
865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock
866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock
868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock
869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock
870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock
871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock
872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM20 TIM20 peripheral clock
873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock
874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F318xx
876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock
878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock
880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock
882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock
883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock
884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F328xx
886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F334x8
891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_HRTIM1 HRTIM1 peripheral clock
894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F358xx
896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock
899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock
900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock
903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock
905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F373xC
907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock
912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_SDADC SDADC peripheral clock
913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F378xx
916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock
920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_SDADC SDADC peripheral clock
921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
ARM GAS /tmp/ccwmaYtI.s page 48
922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F398xx
924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock
926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock
927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock
928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock
929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock
930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock
931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock
932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock
933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock
934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock
935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock
936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock
937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock
938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock
939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM20 TIM20 peripheral clock
940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock
941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif
942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral)
943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
751 .loc 1 945 1
752 .cfi_startproc
753 @ args = 0, pretend = 0, frame = 24
754 @ frame_needed = 1, uses_anonymous_args = 0
755 0000 80B5 push {r7, lr}
756 .cfi_def_cfa_offset 8
757 .cfi_offset 7, -8
758 .cfi_offset 14, -4
759 0002 86B0 sub sp, sp, #24
760 .cfi_def_cfa_offset 32
761 0004 00AF add r7, sp, #0
762 .cfi_def_cfa_register 7
763 0006 7860 str r0, [r7, #4]
946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */
947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t frequency = 0U;
764 .loc 1 947 12
765 0008 0023 movs r3, #0
766 000a 7B61 str r3, [r7, #20]
948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t srcclk = 0U;
767 .loc 1 949 12
768 000c 0023 movs r3, #0
769 000e 3B61 str r3, [r7, #16]
950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34)
951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static const uint16_t adc_pll_prediv_table[16U] = { 1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64
952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR2_ADCPRE12 || RCC_CFGR2_ADCPRE34 */
953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_SDPRE)
954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static const uint8_t sdadc_prescaler_table[16U] = { 2U, 4U, 6U, 8U, 10U, 12U, 14U, 16U, 20U, 24
955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_SDPRE */
956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */
958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
ARM GAS /tmp/ccwmaYtI.s page 49
960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** switch (PeriphClk)
770 .loc 1 960 3
771 0010 7B68 ldr r3, [r7, #4]
772 0012 B3F5003F cmp r3, #131072
773 0016 00F0ED81 beq .L38
774 001a 7B68 ldr r3, [r7, #4]
775 001c B3F5003F cmp r3, #131072
776 0020 00F24E82 bhi .L91
777 0024 7B68 ldr r3, [r7, #4]
778 0026 B3F5803F cmp r3, #65536
779 002a 74D0 beq .L40
780 002c 7B68 ldr r3, [r7, #4]
781 002e B3F5803F cmp r3, #65536
782 0032 00F24582 bhi .L91
783 0036 7B68 ldr r3, [r7, #4]
784 0038 B3F5805F cmp r3, #4096
785 003c 00F02482 beq .L41
786 0040 7B68 ldr r3, [r7, #4]
787 0042 B3F5805F cmp r3, #4096
788 0046 00F23B82 bhi .L91
789 004a 7B68 ldr r3, [r7, #4]
790 004c B3F5007F cmp r3, #512
791 0050 00F0BD81 beq .L42
792 0054 7B68 ldr r3, [r7, #4]
793 0056 B3F5007F cmp r3, #512
794 005a 00F23182 bhi .L91
795 005e 7B68 ldr r3, [r7, #4]
796 0060 802B cmp r3, #128
797 0062 00F0E481 beq .L43
798 0066 7B68 ldr r3, [r7, #4]
799 0068 802B cmp r3, #128
800 006a 00F22982 bhi .L91
801 006e 7B68 ldr r3, [r7, #4]
802 0070 202B cmp r3, #32
803 0072 4BD8 bhi .L44
804 0074 7B68 ldr r3, [r7, #4]
805 0076 002B cmp r3, #0
806 0078 00F02282 beq .L91
807 007c 7B68 ldr r3, [r7, #4]
808 007e 013B subs r3, r3, #1
809 0080 1F2B cmp r3, #31
810 0082 00F21D82 bhi .L91
811 0086 01A2 adr r2, .L46
812 0088 52F823F0 ldr pc, [r2, r3, lsl #2]
813 .p2align 2
814 .L46:
815 008c 7B010000 .word .L51+1
816 0090 D7010000 .word .L50+1
817 0094 C1040000 .word .L91+1
818 0098 39020000 .word .L49+1
819 009c C1040000 .word .L91+1
820 00a0 C1040000 .word .L91+1
821 00a4 C1040000 .word .L91+1
822 00a8 9B020000 .word .L48+1
823 00ac C1040000 .word .L91+1
824 00b0 C1040000 .word .L91+1
825 00b4 C1040000 .word .L91+1
ARM GAS /tmp/ccwmaYtI.s page 50
826 00b8 C1040000 .word .L91+1
827 00bc C1040000 .word .L91+1
828 00c0 C1040000 .word .L91+1
829 00c4 C1040000 .word .L91+1
830 00c8 FD020000 .word .L47+1
831 00cc C1040000 .word .L91+1
832 00d0 C1040000 .word .L91+1
833 00d4 C1040000 .word .L91+1
834 00d8 C1040000 .word .L91+1
835 00dc C1040000 .word .L91+1
836 00e0 C1040000 .word .L91+1
837 00e4 C1040000 .word .L91+1
838 00e8 C1040000 .word .L91+1
839 00ec C1040000 .word .L91+1
840 00f0 C1040000 .word .L91+1
841 00f4 C1040000 .word .L91+1
842 00f8 C1040000 .word .L91+1
843 00fc C1040000 .word .L91+1
844 0100 C1040000 .word .L91+1
845 0104 C1040000 .word .L91+1
846 0108 5F030000 .word .L45+1
847 .p2align 1
848 .L44:
849 010c 7B68 ldr r3, [r7, #4]
850 010e 402B cmp r3, #64
851 0110 00F04481 beq .L52
961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC:
963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current RTC source */
965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE();
966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if RTC clock selection is LSE */
968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSI is ready and if RTC clock selection is LSI */
973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)))
974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSI_VALUE;
976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/
978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 32U;
981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1:
985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART1 source */
987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE();
988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is PCLK1 */
990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_USART1CLKSOURCE_PCLK2)
991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK2)
ARM GAS /tmp/ccwmaYtI.s page 51
992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq();
994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else
996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK1)
997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_USART1CLKSOURCE_PCLK2 */
1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART1 clock selection is HSI */
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is SYSCLK */
1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK)
1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART1 clock selection is LSE */
1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW)
1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2:
1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART2 source */
1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE();
1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is PCLK1 */
1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART2CLKSOURCE_PCLK1)
1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART2 clock selection is HSI */
1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is SYSCLK */
1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK)
1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART2 clock selection is LSE */
1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */
1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW)
1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART3:
ARM GAS /tmp/ccwmaYtI.s page 52
1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART3 source */
1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART3_SOURCE();
1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is PCLK1 */
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART3CLKSOURCE_PCLK1)
1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART3 clock selection is HSI */
1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is SYSCLK */
1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK)
1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART3 clock selection is LSE */
1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */
1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_UART4SW)
1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_UART4:
1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current UART4 source */
1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_UART4_SOURCE();
1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART4 clock selection is PCLK1 */
1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_UART4CLKSOURCE_PCLK1)
1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if UART4 clock selection is HSI */
1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART4CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART4 clock selection is SYSCLK */
1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_UART4CLKSOURCE_SYSCLK)
1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if UART4 clock selection is LSE */
1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART4CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_UART4SW */
1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_UART5SW)
ARM GAS /tmp/ccwmaYtI.s page 53
1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_UART5:
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current UART5 source */
1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_UART5_SOURCE();
1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART5 clock selection is PCLK1 */
1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_UART5CLKSOURCE_PCLK1)
1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if UART5 clock selection is HSI */
1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART5CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART5 clock selection is SYSCLK */
1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_UART5CLKSOURCE_SYSCLK)
1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if UART5 clock selection is LSE */
1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART5CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_UART5SW */
1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1:
1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C1 source */
1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE();
1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C1 clock selection is HSI */
1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is SYSCLK */
1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK)
1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_I2C2SW)
1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C2:
1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C2 source */
1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C2_SOURCE();
1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C2 clock selection is HSI */
1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C2 clock selection is SYSCLK */
ARM GAS /tmp/ccwmaYtI.s page 54
1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C2CLKSOURCE_SYSCLK)
1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_I2C2SW */
1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_I2C3SW)
1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C3:
1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C3 source */
1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C3_SOURCE();
1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C3 clock selection is HSI */
1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C3 clock selection is SYSCLK */
1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C3CLKSOURCE_SYSCLK)
1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_I2C3SW */
1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_I2SSRC)
1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2S:
1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2S source */
1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2S_SOURCE();
1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin */
1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_I2SCLKSOURCE_EXT)
1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* External clock used. Frequency cannot be returned.*/
1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = 0xDEADDEADU;
1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2S clock selection is SYSCLK */
1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2SCLKSOURCE_SYSCLK)
1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_I2SSRC */
1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_USBPRE)
1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB:
1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */
1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))
1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USB source */
1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE();
1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USB clock selection is not divided */
1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USBCLKSOURCE_PLL)
ARM GAS /tmp/ccwmaYtI.s page 55
1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USB clock selection is divided by 1.5 */
1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else /* RCC_USBCLKSOURCE_PLL_DIV1_5 */
1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = (RCC_GetPLLCLKFreq() * 3U) / 2U;
1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_USBPRE */
1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR_ADCPRE)
1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC1:
1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC1 source */
1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC1_SOURCE();
1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES)
1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC1 clock selection is AHB */
1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC1PLLCLK_OFF)
1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */
1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else
1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */
1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))
1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6U/8U/10U/12U/16U/32
1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> POSITION_VAL(RCC_CFGR2_
1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else /* RCC_CFGR_ADCPRE */
1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* ADC1 is set to PLCK2 frequency divided by 2U/4U/6U/8U */
1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq() / (((srcclk >> POSITION_VAL(RCC_CFGR_ADCPRE)) + 1U) * 2U)
1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES */
1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR_ADCPRE */
1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADCPRE12)
1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC12:
1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC12 source */
1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC12_SOURCE();
1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC12 clock selection is AHB */
1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC12PLLCLK_OFF)
1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */
1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else
1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */
1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))
1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6/8U/10U/12U/16U/32U
ARM GAS /tmp/ccwmaYtI.s page 56
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> POSITION_VAL(RCC_CFGR2_
1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADCPRE12 */
1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADCPRE34)
1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC34:
1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC34 source */
1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC34_SOURCE();
1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC34 clock selection is AHB */
1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC34PLLCLK_OFF)
1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */
1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else
1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */
1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))
1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6U/8U/10U/12U/16U/32
1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> POSITION_VAL(RCC_CFGR2_
1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADCPRE34 */
1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM1SW)
1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM1:
1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM1 source */
1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM1_SOURCE();
1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM1 clock selection is PLL */
1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM1CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM1 clock selection is SYSCLK */
1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM1CLK_HCLK)
1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM1SW */
1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM2SW)
1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM2:
1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM2 source */
1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM2_SOURCE();
1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM2 clock selection is PLL */
1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM2CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
ARM GAS /tmp/ccwmaYtI.s page 57
1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM2 clock selection is SYSCLK */
1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM2CLK_HCLK)
1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM2SW */
1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM8SW)
1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM8:
1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM8 source */
1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM8_SOURCE();
1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM8 clock selection is PLL */
1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM8CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM8 clock selection is SYSCLK */
1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM8CLK_HCLK)
1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM8SW */
1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM15SW)
1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM15:
1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM15 source */
1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM15_SOURCE();
1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM15 clock selection is PLL */
1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM15CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM15 clock selection is SYSCLK */
1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM15CLK_HCLK)
1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM15SW */
1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM16SW)
1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM16:
1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM16 source */
1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM16_SOURCE();
1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM16 clock selection is PLL */
1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM16CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
ARM GAS /tmp/ccwmaYtI.s page 58
1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM16 clock selection is SYSCLK */
1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM16CLK_HCLK)
1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM16SW */
1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM17SW)
1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM17:
1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM17 source */
1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM17_SOURCE();
1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM17 clock selection is PLL */
1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM17CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM17 clock selection is SYSCLK */
1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM17CLK_HCLK)
1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM17SW */
1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM20SW)
1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM20:
1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM20 source */
1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM20_SOURCE();
1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM20 clock selection is PLL */
1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM20CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM20 clock selection is SYSCLK */
1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM20CLK_HCLK)
1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM20SW */
1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM34SW)
1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM34:
1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM34 source */
1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM34_SOURCE();
1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM34 clock selection is PLL */
1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM34CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
ARM GAS /tmp/ccwmaYtI.s page 59
1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM34 clock selection is SYSCLK */
1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM34CLK_HCLK)
1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM34SW */
1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_HRTIM1SW)
1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_HRTIM1:
1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current HRTIM1 source */
1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_HRTIM1_SOURCE();
1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if HRTIM1 clock selection is PLL */
1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_HRTIM1CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq();
1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HRTIM1 clock selection is SYSCLK */
1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_HRTIM1CLK_HCLK)
1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock;
1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_HRTIM1SW */
1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_SDPRE)
1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_SDADC:
1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current SDADC source */
1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_SDADC_SOURCE();
1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the system frequency divided by SDADC prescaler (2U/4U/6U/8U/10U/12U/14U/16U/
1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock / sdadc_prescaler_table[(srcclk >> POSITION_VAL(RCC_CFGR_SDPRE))
1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_SDPRE */
1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_CECSW)
1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_CEC:
1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current CEC source */
1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_CEC_SOURCE();
1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if CEC clock selection is HSI */
1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_CECCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if CEC clock selection is LSE */
1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_CECCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
ARM GAS /tmp/ccwmaYtI.s page 60
1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_CECSW */
1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** default:
1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break;
852 .loc 1 1508 7
853 0114 D4E1 b .L91
854 .L40:
965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
855 .loc 1 965 16
856 0116 9A4B ldr r3, .L105
857 0118 1B6A ldr r3, [r3, #32]
965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
858 .loc 1 965 14
859 011a 03F44073 and r3, r3, #768
860 011e 3B61 str r3, [r7, #16]
968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
861 .loc 1 968 10
862 0120 3B69 ldr r3, [r7, #16]
863 0122 B3F5807F cmp r3, #256
864 0126 09D1 bne .L53
968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
865 .loc 1 968 48 discriminator 1
866 0128 954B ldr r3, .L105
867 012a 1B6A ldr r3, [r3, #32]
868 012c 03F00203 and r3, r3, #2
968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
869 .loc 1 968 44 discriminator 1
870 0130 022B cmp r3, #2
871 0132 03D1 bne .L53
970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
872 .loc 1 970 19
873 0134 4FF40043 mov r3, #32768
874 0138 7B61 str r3, [r7, #20]
875 013a 1DE0 b .L54
876 .L53:
973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
877 .loc 1 973 15
878 013c 3B69 ldr r3, [r7, #16]
879 013e B3F5007F cmp r3, #512
880 0142 09D1 bne .L55
973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
881 .loc 1 973 53 discriminator 1
882 0144 8E4B ldr r3, .L105
883 0146 5B6A ldr r3, [r3, #36]
884 0148 03F00203 and r3, r3, #2
973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
885 .loc 1 973 49 discriminator 1
886 014c 022B cmp r3, #2
887 014e 03D1 bne .L55
975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
888 .loc 1 975 19
889 0150 49F64043 movw r3, #40000
890 0154 7B61 str r3, [r7, #20]
891 0156 0FE0 b .L54
892 .L55:
978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
893 .loc 1 978 15
ARM GAS /tmp/ccwmaYtI.s page 61
894 0158 3B69 ldr r3, [r7, #16]
895 015a B3F5407F cmp r3, #768
896 015e 40F0B181 bne .L92
978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
897 .loc 1 978 59 discriminator 1
898 0162 874B ldr r3, .L105
899 0164 1B68 ldr r3, [r3]
900 0166 03F40033 and r3, r3, #131072
978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
901 .loc 1 978 55 discriminator 1
902 016a B3F5003F cmp r3, #131072
903 016e 40F0A981 bne .L92
980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
904 .loc 1 980 19
905 0172 844B ldr r3, .L105+4
906 0174 7B61 str r3, [r7, #20]
982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
907 .loc 1 982 7
908 0176 A5E1 b .L92
909 .L54:
910 0178 A4E1 b .L92
911 .L51:
987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
912 .loc 1 987 16
913 017a 814B ldr r3, .L105
914 017c 1B6B ldr r3, [r3, #48]
987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
915 .loc 1 987 14
916 017e 03F00303 and r3, r3, #3
917 0182 3B61 str r3, [r7, #16]
991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
918 .loc 1 991 10
919 0184 3B69 ldr r3, [r7, #16]
920 0186 002B cmp r3, #0
921 0188 03D1 bne .L57
993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
922 .loc 1 993 21
923 018a FFF7FEFF bl HAL_RCC_GetPCLK2Freq
924 018e 7861 str r0, [r7, #20]
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
925 .loc 1 1016 7
926 0190 9AE1 b .L93
927 .L57:
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
928 .loc 1 1002 15
929 0192 3B69 ldr r3, [r7, #16]
930 0194 032B cmp r3, #3
931 0196 08D1 bne .L59
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
932 .loc 1 1002 56 discriminator 1
933 0198 794B ldr r3, .L105
934 019a 1B68 ldr r3, [r3]
935 019c 03F00203 and r3, r3, #2
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
936 .loc 1 1002 52 discriminator 1
937 01a0 022B cmp r3, #2
938 01a2 02D1 bne .L59
ARM GAS /tmp/ccwmaYtI.s page 62
1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
939 .loc 1 1004 19
940 01a4 784B ldr r3, .L105+8
941 01a6 7B61 str r3, [r7, #20]
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
942 .loc 1 1016 7
943 01a8 8EE1 b .L93
944 .L59:
1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
945 .loc 1 1007 15
946 01aa 3B69 ldr r3, [r7, #16]
947 01ac 012B cmp r3, #1
948 01ae 03D1 bne .L60
1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
949 .loc 1 1009 21
950 01b0 FFF7FEFF bl HAL_RCC_GetSysClockFreq
951 01b4 7861 str r0, [r7, #20]
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
952 .loc 1 1016 7
953 01b6 87E1 b .L93
954 .L60:
1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
955 .loc 1 1012 15
956 01b8 3B69 ldr r3, [r7, #16]
957 01ba 022B cmp r3, #2
958 01bc 40F08481 bne .L93
1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
959 .loc 1 1012 56 discriminator 1
960 01c0 6F4B ldr r3, .L105
961 01c2 1B6A ldr r3, [r3, #32]
962 01c4 03F00203 and r3, r3, #2
1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
963 .loc 1 1012 52 discriminator 1
964 01c8 022B cmp r3, #2
965 01ca 40F07D81 bne .L93
1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
966 .loc 1 1014 19
967 01ce 4FF40043 mov r3, #32768
968 01d2 7B61 str r3, [r7, #20]
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
969 .loc 1 1016 7
970 01d4 78E1 b .L93
971 .L50:
1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
972 .loc 1 1022 16
973 01d6 6A4B ldr r3, .L105
974 01d8 1B6B ldr r3, [r3, #48]
1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
975 .loc 1 1022 14
976 01da 03F44033 and r3, r3, #196608
977 01de 3B61 str r3, [r7, #16]
1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
978 .loc 1 1025 10
979 01e0 3B69 ldr r3, [r7, #16]
980 01e2 002B cmp r3, #0
981 01e4 03D1 bne .L61
1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
ARM GAS /tmp/ccwmaYtI.s page 63
982 .loc 1 1027 21
983 01e6 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
984 01ea 7861 str r0, [r7, #20]
1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
985 .loc 1 1044 7
986 01ec 6EE1 b .L94
987 .L61:
1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
988 .loc 1 1030 15
989 01ee 3B69 ldr r3, [r7, #16]
990 01f0 B3F5403F cmp r3, #196608
991 01f4 08D1 bne .L63
1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
992 .loc 1 1030 56 discriminator 1
993 01f6 624B ldr r3, .L105
994 01f8 1B68 ldr r3, [r3]
995 01fa 03F00203 and r3, r3, #2
1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
996 .loc 1 1030 52 discriminator 1
997 01fe 022B cmp r3, #2
998 0200 02D1 bne .L63
1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
999 .loc 1 1032 19
1000 0202 614B ldr r3, .L105+8
1001 0204 7B61 str r3, [r7, #20]
1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1002 .loc 1 1044 7
1003 0206 61E1 b .L94
1004 .L63:
1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1005 .loc 1 1035 15
1006 0208 3B69 ldr r3, [r7, #16]
1007 020a B3F5803F cmp r3, #65536
1008 020e 03D1 bne .L64
1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1009 .loc 1 1037 21
1010 0210 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1011 0214 7861 str r0, [r7, #20]
1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1012 .loc 1 1044 7
1013 0216 59E1 b .L94
1014 .L64:
1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1015 .loc 1 1040 15
1016 0218 3B69 ldr r3, [r7, #16]
1017 021a B3F5003F cmp r3, #131072
1018 021e 40F05581 bne .L94
1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1019 .loc 1 1040 56 discriminator 1
1020 0222 574B ldr r3, .L105
1021 0224 1B6A ldr r3, [r3, #32]
1022 0226 03F00203 and r3, r3, #2
1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1023 .loc 1 1040 52 discriminator 1
1024 022a 022B cmp r3, #2
1025 022c 40F04E81 bne .L94
1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
ARM GAS /tmp/ccwmaYtI.s page 64
1026 .loc 1 1042 19
1027 0230 4FF40043 mov r3, #32768
1028 0234 7B61 str r3, [r7, #20]
1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1029 .loc 1 1044 7
1030 0236 49E1 b .L94
1031 .L49:
1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1032 .loc 1 1051 16
1033 0238 514B ldr r3, .L105
1034 023a 1B6B ldr r3, [r3, #48]
1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1035 .loc 1 1051 14
1036 023c 03F44023 and r3, r3, #786432
1037 0240 3B61 str r3, [r7, #16]
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1038 .loc 1 1054 10
1039 0242 3B69 ldr r3, [r7, #16]
1040 0244 002B cmp r3, #0
1041 0246 03D1 bne .L65
1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1042 .loc 1 1056 21
1043 0248 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1044 024c 7861 str r0, [r7, #20]
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1045 .loc 1 1073 6
1046 024e 3FE1 b .L95
1047 .L65:
1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1048 .loc 1 1059 15
1049 0250 3B69 ldr r3, [r7, #16]
1050 0252 B3F5402F cmp r3, #786432
1051 0256 08D1 bne .L67
1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1052 .loc 1 1059 56 discriminator 1
1053 0258 494B ldr r3, .L105
1054 025a 1B68 ldr r3, [r3]
1055 025c 03F00203 and r3, r3, #2
1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1056 .loc 1 1059 52 discriminator 1
1057 0260 022B cmp r3, #2
1058 0262 02D1 bne .L67
1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1059 .loc 1 1061 19
1060 0264 484B ldr r3, .L105+8
1061 0266 7B61 str r3, [r7, #20]
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1062 .loc 1 1073 6
1063 0268 32E1 b .L95
1064 .L67:
1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1065 .loc 1 1064 15
1066 026a 3B69 ldr r3, [r7, #16]
1067 026c B3F5802F cmp r3, #262144
1068 0270 03D1 bne .L68
1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1069 .loc 1 1066 21
ARM GAS /tmp/ccwmaYtI.s page 65
1070 0272 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1071 0276 7861 str r0, [r7, #20]
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1072 .loc 1 1073 6
1073 0278 2AE1 b .L95
1074 .L68:
1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1075 .loc 1 1069 15
1076 027a 3B69 ldr r3, [r7, #16]
1077 027c B3F5002F cmp r3, #524288
1078 0280 40F02681 bne .L95
1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1079 .loc 1 1069 56 discriminator 1
1080 0284 3E4B ldr r3, .L105
1081 0286 1B6A ldr r3, [r3, #32]
1082 0288 03F00203 and r3, r3, #2
1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1083 .loc 1 1069 52 discriminator 1
1084 028c 022B cmp r3, #2
1085 028e 40F01F81 bne .L95
1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1086 .loc 1 1071 19
1087 0292 4FF40043 mov r3, #32768
1088 0296 7B61 str r3, [r7, #20]
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1089 .loc 1 1073 6
1090 0298 1AE1 b .L95
1091 .L48:
1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1092 .loc 1 1080 16
1093 029a 394B ldr r3, .L105
1094 029c 1B6B ldr r3, [r3, #48]
1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1095 .loc 1 1080 14
1096 029e 03F44013 and r3, r3, #3145728
1097 02a2 3B61 str r3, [r7, #16]
1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1098 .loc 1 1083 10
1099 02a4 3B69 ldr r3, [r7, #16]
1100 02a6 002B cmp r3, #0
1101 02a8 03D1 bne .L69
1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1102 .loc 1 1085 21
1103 02aa FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1104 02ae 7861 str r0, [r7, #20]
1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1105 .loc 1 1102 7
1106 02b0 10E1 b .L96
1107 .L69:
1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1108 .loc 1 1088 15
1109 02b2 3B69 ldr r3, [r7, #16]
1110 02b4 B3F5401F cmp r3, #3145728
1111 02b8 08D1 bne .L71
1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1112 .loc 1 1088 55 discriminator 1
1113 02ba 314B ldr r3, .L105
ARM GAS /tmp/ccwmaYtI.s page 66
1114 02bc 1B68 ldr r3, [r3]
1115 02be 03F00203 and r3, r3, #2
1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1116 .loc 1 1088 51 discriminator 1
1117 02c2 022B cmp r3, #2
1118 02c4 02D1 bne .L71
1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1119 .loc 1 1090 19
1120 02c6 304B ldr r3, .L105+8
1121 02c8 7B61 str r3, [r7, #20]
1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1122 .loc 1 1102 7
1123 02ca 03E1 b .L96
1124 .L71:
1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1125 .loc 1 1093 15
1126 02cc 3B69 ldr r3, [r7, #16]
1127 02ce B3F5801F cmp r3, #1048576
1128 02d2 03D1 bne .L72
1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1129 .loc 1 1095 21
1130 02d4 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1131 02d8 7861 str r0, [r7, #20]
1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1132 .loc 1 1102 7
1133 02da FBE0 b .L96
1134 .L72:
1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1135 .loc 1 1098 15
1136 02dc 3B69 ldr r3, [r7, #16]
1137 02de B3F5001F cmp r3, #2097152
1138 02e2 40F0F780 bne .L96
1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1139 .loc 1 1098 55 discriminator 1
1140 02e6 264B ldr r3, .L105
1141 02e8 1B6A ldr r3, [r3, #32]
1142 02ea 03F00203 and r3, r3, #2
1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1143 .loc 1 1098 51 discriminator 1
1144 02ee 022B cmp r3, #2
1145 02f0 40F0F080 bne .L96
1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1146 .loc 1 1100 19
1147 02f4 4FF40043 mov r3, #32768
1148 02f8 7B61 str r3, [r7, #20]
1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1149 .loc 1 1102 7
1150 02fa EBE0 b .L96
1151 .L47:
1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1152 .loc 1 1109 16
1153 02fc 204B ldr r3, .L105
1154 02fe 1B6B ldr r3, [r3, #48]
1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1155 .loc 1 1109 14
1156 0300 03F44003 and r3, r3, #12582912
1157 0304 3B61 str r3, [r7, #16]
ARM GAS /tmp/ccwmaYtI.s page 67
1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1158 .loc 1 1112 10
1159 0306 3B69 ldr r3, [r7, #16]
1160 0308 002B cmp r3, #0
1161 030a 03D1 bne .L73
1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1162 .loc 1 1114 21
1163 030c FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1164 0310 7861 str r0, [r7, #20]
1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1165 .loc 1 1131 7
1166 0312 E1E0 b .L97
1167 .L73:
1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1168 .loc 1 1117 15
1169 0314 3B69 ldr r3, [r7, #16]
1170 0316 B3F5400F cmp r3, #12582912
1171 031a 08D1 bne .L75
1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1172 .loc 1 1117 55 discriminator 1
1173 031c 184B ldr r3, .L105
1174 031e 1B68 ldr r3, [r3]
1175 0320 03F00203 and r3, r3, #2
1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1176 .loc 1 1117 51 discriminator 1
1177 0324 022B cmp r3, #2
1178 0326 02D1 bne .L75
1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1179 .loc 1 1119 19
1180 0328 174B ldr r3, .L105+8
1181 032a 7B61 str r3, [r7, #20]
1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1182 .loc 1 1131 7
1183 032c D4E0 b .L97
1184 .L75:
1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1185 .loc 1 1122 15
1186 032e 3B69 ldr r3, [r7, #16]
1187 0330 B3F5800F cmp r3, #4194304
1188 0334 03D1 bne .L76
1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1189 .loc 1 1124 21
1190 0336 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1191 033a 7861 str r0, [r7, #20]
1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1192 .loc 1 1131 7
1193 033c CCE0 b .L97
1194 .L76:
1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1195 .loc 1 1127 15
1196 033e 3B69 ldr r3, [r7, #16]
1197 0340 B3F5000F cmp r3, #8388608
1198 0344 40F0C880 bne .L97
1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1199 .loc 1 1127 55 discriminator 1
1200 0348 0D4B ldr r3, .L105
1201 034a 1B6A ldr r3, [r3, #32]
ARM GAS /tmp/ccwmaYtI.s page 68
1202 034c 03F00203 and r3, r3, #2
1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1203 .loc 1 1127 51 discriminator 1
1204 0350 022B cmp r3, #2
1205 0352 40F0C180 bne .L97
1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1206 .loc 1 1129 19
1207 0356 4FF40043 mov r3, #32768
1208 035a 7B61 str r3, [r7, #20]
1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1209 .loc 1 1131 7
1210 035c BCE0 b .L97
1211 .L45:
1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1212 .loc 1 1137 16
1213 035e 084B ldr r3, .L105
1214 0360 1B6B ldr r3, [r3, #48]
1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1215 .loc 1 1137 14
1216 0362 03F01003 and r3, r3, #16
1217 0366 3B61 str r3, [r7, #16]
1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1218 .loc 1 1140 10
1219 0368 3B69 ldr r3, [r7, #16]
1220 036a 002B cmp r3, #0
1221 036c 0ED1 bne .L77
1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1222 .loc 1 1140 49 discriminator 1
1223 036e 044B ldr r3, .L105
1224 0370 1B68 ldr r3, [r3]
1225 0372 03F00203 and r3, r3, #2
1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1226 .loc 1 1140 45 discriminator 1
1227 0376 022B cmp r3, #2
1228 0378 08D1 bne .L77
1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1229 .loc 1 1142 19
1230 037a 034B ldr r3, .L105+8
1231 037c 7B61 str r3, [r7, #20]
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1232 .loc 1 1149 7
1233 037e ADE0 b .L98
1234 .L106:
1235 .align 2
1236 .L105:
1237 0380 00100240 .word 1073876992
1238 0384 20A10700 .word 500000
1239 0388 00127A00 .word 8000000
1240 .L77:
1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1241 .loc 1 1145 15
1242 038c 3B69 ldr r3, [r7, #16]
1243 038e 102B cmp r3, #16
1244 0390 40F0A480 bne .L98
1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1245 .loc 1 1147 21
1246 0394 FFF7FEFF bl HAL_RCC_GetSysClockFreq
ARM GAS /tmp/ccwmaYtI.s page 69
1247 0398 7861 str r0, [r7, #20]
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1248 .loc 1 1149 7
1249 039a 9FE0 b .L98
1250 .L52:
1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1251 .loc 1 1155 16
1252 039c 574B ldr r3, .L107
1253 039e 1B6B ldr r3, [r3, #48]
1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1254 .loc 1 1155 14
1255 03a0 03F02003 and r3, r3, #32
1256 03a4 3B61 str r3, [r7, #16]
1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1257 .loc 1 1158 10
1258 03a6 3B69 ldr r3, [r7, #16]
1259 03a8 002B cmp r3, #0
1260 03aa 08D1 bne .L79
1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1261 .loc 1 1158 49 discriminator 1
1262 03ac 534B ldr r3, .L107
1263 03ae 1B68 ldr r3, [r3]
1264 03b0 03F00203 and r3, r3, #2
1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1265 .loc 1 1158 45 discriminator 1
1266 03b4 022B cmp r3, #2
1267 03b6 02D1 bne .L79
1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1268 .loc 1 1160 19
1269 03b8 514B ldr r3, .L107+4
1270 03ba 7B61 str r3, [r7, #20]
1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1271 .loc 1 1167 7
1272 03bc 90E0 b .L99
1273 .L79:
1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1274 .loc 1 1163 15
1275 03be 3B69 ldr r3, [r7, #16]
1276 03c0 202B cmp r3, #32
1277 03c2 40F08D80 bne .L99
1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1278 .loc 1 1165 21
1279 03c6 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1280 03ca 7861 str r0, [r7, #20]
1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1281 .loc 1 1167 7
1282 03cc 88E0 b .L99
1283 .L42:
1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1284 .loc 1 1193 16
1285 03ce 4B4B ldr r3, .L107
1286 03d0 5B68 ldr r3, [r3, #4]
1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1287 .loc 1 1193 14
1288 03d2 03F40003 and r3, r3, #8388608
1289 03d6 3B61 str r3, [r7, #16]
1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
ARM GAS /tmp/ccwmaYtI.s page 70
1290 .loc 1 1196 10
1291 03d8 3B69 ldr r3, [r7, #16]
1292 03da B3F5000F cmp r3, #8388608
1293 03de 02D1 bne .L81
1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1294 .loc 1 1199 19
1295 03e0 484B ldr r3, .L107+8
1296 03e2 7B61 str r3, [r7, #20]
1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1297 .loc 1 1206 7
1298 03e4 7EE0 b .L100
1299 .L81:
1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1300 .loc 1 1202 15
1301 03e6 3B69 ldr r3, [r7, #16]
1302 03e8 002B cmp r3, #0
1303 03ea 7BD1 bne .L100
1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1304 .loc 1 1204 21
1305 03ec FFF7FEFF bl HAL_RCC_GetSysClockFreq
1306 03f0 7861 str r0, [r7, #20]
1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1307 .loc 1 1206 7
1308 03f2 77E0 b .L100
1309 .L38:
1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1310 .loc 1 1213 11
1311 03f4 414B ldr r3, .L107
1312 03f6 1B68 ldr r3, [r3]
1313 03f8 03F00073 and r3, r3, #33554432
1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1314 .loc 1 1213 10
1315 03fc B3F1007F cmp r3, #33554432
1316 0400 72D1 bne .L101
1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1317 .loc 1 1216 18
1318 0402 3E4B ldr r3, .L107
1319 0404 5B68 ldr r3, [r3, #4]
1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1320 .loc 1 1216 16
1321 0406 03F48003 and r3, r3, #4194304
1322 040a 3B61 str r3, [r7, #16]
1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1323 .loc 1 1219 12
1324 040c 3B69 ldr r3, [r7, #16]
1325 040e B3F5800F cmp r3, #4194304
1326 0412 03D1 bne .L84
1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1327 .loc 1 1221 23
1328 0414 FFF7FEFF bl RCC_GetPLLCLKFreq
1329 0418 7861 str r0, [r7, #20]
1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1330 .loc 1 1229 7
1331 041a 65E0 b .L101
1332 .L84:
1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1333 .loc 1 1226 24
ARM GAS /tmp/ccwmaYtI.s page 71
1334 041c FFF7FEFF bl RCC_GetPLLCLKFreq
1335 0420 0246 mov r2, r0
1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1336 .loc 1 1226 44 discriminator 1
1337 0422 1346 mov r3, r2
1338 0424 5B00 lsls r3, r3, #1
1339 0426 1344 add r3, r3, r2
1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1340 .loc 1 1226 21 discriminator 1
1341 0428 5B08 lsrs r3, r3, #1
1342 042a 7B61 str r3, [r7, #20]
1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1343 .loc 1 1229 7
1344 042c 5CE0 b .L101
1345 .L43:
1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC12 clock selection is AHB */
1346 .loc 1 1264 16
1347 042e 334B ldr r3, .L107
1348 0430 DB6A ldr r3, [r3, #44]
1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC12 clock selection is AHB */
1349 .loc 1 1264 14
1350 0432 03F4F873 and r3, r3, #496
1351 0436 3B61 str r3, [r7, #16]
1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1352 .loc 1 1266 10
1353 0438 3B69 ldr r3, [r7, #16]
1354 043a 002B cmp r3, #0
1355 043c 03D1 bne .L85
1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1356 .loc 1 1268 21
1357 043e 324B ldr r3, .L107+12
1358 0440 1B68 ldr r3, [r3]
1359 0442 7B61 str r3, [r7, #20]
1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1360 .loc 1 1280 7
1361 0444 52E0 b .L102
1362 .L85:
1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1363 .loc 1 1274 13
1364 0446 2D4B ldr r3, .L107
1365 0448 1B68 ldr r3, [r3]
1366 044a 03F00073 and r3, r3, #33554432
1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1367 .loc 1 1274 12
1368 044e B3F1007F cmp r3, #33554432
1369 0452 4BD1 bne .L102
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1370 .loc 1 1277 23
1371 0454 FFF7FEFF bl RCC_GetPLLCLKFreq
1372 0458 0246 mov r2, r0
1373 045a 4FF4F873 mov r3, #496
1374 045e FB60 str r3, [r7, #12]
1375 .LBB30:
1376 .LBB31:
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1377 .loc 2 988 4
1378 0460 FB68 ldr r3, [r7, #12]
ARM GAS /tmp/ccwmaYtI.s page 72
1379 .syntax unified
1380 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1381 0462 93FAA3F3 rbit r3, r3
1382 @ 0 "" 2
1383 .thumb
1384 .syntax unified
1385 0466 BB60 str r3, [r7, #8]
1386 .loc 2 1001 10
1387 0468 BB68 ldr r3, [r7, #8]
1388 .LBE31:
1389 .LBE30:
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1390 .loc 1 1277 77 discriminator 2
1391 046a B3FA83F3 clz r3, r3
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1392 .loc 1 1277 77 is_stmt 0 discriminator 3
1393 046e DBB2 uxtb r3, r3
1394 0470 1946 mov r1, r3
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1395 .loc 1 1277 74 is_stmt 1 discriminator 3
1396 0472 3B69 ldr r3, [r7, #16]
1397 0474 CB40 lsrs r3, r3, r1
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1398 .loc 1 1277 111 discriminator 3
1399 0476 03F00F03 and r3, r3, #15
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1400 .loc 1 1277 65 discriminator 3
1401 047a 2449 ldr r1, .L107+16
1402 047c 31F81330 ldrh r3, [r1, r3, lsl #1]
1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1403 .loc 1 1277 21 discriminator 3
1404 0480 B2FBF3F3 udiv r3, r2, r3
1405 0484 7B61 str r3, [r7, #20]
1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1406 .loc 1 1280 7
1407 0486 31E0 b .L102
1408 .L41:
1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1409 .loc 1 1310 16
1410 0488 1C4B ldr r3, .L107
1411 048a 1B6B ldr r3, [r3, #48]
1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1412 .loc 1 1310 14
1413 048c 03F48073 and r3, r3, #256
1414 0490 3B61 str r3, [r7, #16]
1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1415 .loc 1 1313 10
1416 0492 3B69 ldr r3, [r7, #16]
1417 0494 B3F5807F cmp r3, #256
1418 0498 0BD1 bne .L88
1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1419 .loc 1 1313 46 discriminator 1
1420 049a 184B ldr r3, .L107
1421 049c 1B68 ldr r3, [r3]
1422 049e 03F00073 and r3, r3, #33554432
1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1423 .loc 1 1313 42 discriminator 1
ARM GAS /tmp/ccwmaYtI.s page 73
1424 04a2 B3F1007F cmp r3, #33554432
1425 04a6 04D1 bne .L88
1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1426 .loc 1 1315 21
1427 04a8 FFF7FEFF bl RCC_GetPLLCLKFreq
1428 04ac 7861 str r0, [r7, #20]
1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1429 .loc 1 1315 19
1430 04ae 00BF nop
1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1431 .loc 1 1322 7
1432 04b0 1EE0 b .L103
1433 .L88:
1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1434 .loc 1 1318 15
1435 04b2 3B69 ldr r3, [r7, #16]
1436 04b4 002B cmp r3, #0
1437 04b6 1BD1 bne .L103
1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1438 .loc 1 1320 19
1439 04b8 134B ldr r3, .L107+12
1440 04ba 1B68 ldr r3, [r3]
1441 04bc 7B61 str r3, [r7, #20]
1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1442 .loc 1 1322 7
1443 04be 17E0 b .L103
1444 .L91:
1445 .loc 1 1508 7
1446 04c0 00BF nop
1447 04c2 16E0 b .L56
1448 .L92:
982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1449 .loc 1 982 7
1450 04c4 00BF nop
1451 04c6 14E0 b .L56
1452 .L93:
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1453 .loc 1 1016 7
1454 04c8 00BF nop
1455 04ca 12E0 b .L56
1456 .L94:
1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1457 .loc 1 1044 7
1458 04cc 00BF nop
1459 04ce 10E0 b .L56
1460 .L95:
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1461 .loc 1 1073 6
1462 04d0 00BF nop
1463 04d2 0EE0 b .L56
1464 .L96:
1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1465 .loc 1 1102 7
1466 04d4 00BF nop
1467 04d6 0CE0 b .L56
1468 .L97:
1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
ARM GAS /tmp/ccwmaYtI.s page 74
1469 .loc 1 1131 7
1470 04d8 00BF nop
1471 04da 0AE0 b .L56
1472 .L98:
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1473 .loc 1 1149 7
1474 04dc 00BF nop
1475 04de 08E0 b .L56
1476 .L99:
1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1477 .loc 1 1167 7
1478 04e0 00BF nop
1479 04e2 06E0 b .L56
1480 .L100:
1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1481 .loc 1 1206 7
1482 04e4 00BF nop
1483 04e6 04E0 b .L56
1484 .L101:
1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1485 .loc 1 1229 7
1486 04e8 00BF nop
1487 04ea 02E0 b .L56
1488 .L102:
1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1489 .loc 1 1280 7
1490 04ec 00BF nop
1491 04ee 00E0 b .L56
1492 .L103:
1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1493 .loc 1 1322 7
1494 04f0 00BF nop
1495 .L56:
1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return(frequency);
1496 .loc 1 1511 9
1497 04f2 7B69 ldr r3, [r7, #20]
1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1498 .loc 1 1512 1
1499 04f4 1846 mov r0, r3
1500 04f6 1837 adds r7, r7, #24
1501 .cfi_def_cfa_offset 8
1502 04f8 BD46 mov sp, r7
1503 .cfi_def_cfa_register 13
1504 @ sp needed
1505 04fa 80BD pop {r7, pc}
1506 .L108:
1507 .align 2
1508 .L107:
1509 04fc 00100240 .word 1073876992
1510 0500 00127A00 .word 8000000
1511 0504 ADDEADDE .word -559030611
1512 0508 00000000 .word SystemCoreClock
1513 050c 00000000 .word adc_pll_prediv_table.0
1514 .cfi_endproc
1515 .LFE132:
ARM GAS /tmp/ccwmaYtI.s page 75
1517 .section .text.RCC_GetPLLCLKFreq,"ax",%progbits
1518 .align 1
1519 .syntax unified
1520 .thumb
1521 .thumb_func
1523 RCC_GetPLLCLKFreq:
1524 .LFB133:
1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /**
1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @}
1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /**
1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @}
1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) || de
1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM1SW) || defined(RCC_CFGR3_TIM2SW) || defined(RCC_CFGR3_TIM8SW) || defined(
1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM16SW) || defined(RCC_CFGR3_TIM17SW) || defined(RCC_CFGR3_TIM20SW) || defin
1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_HRTIM1SW)
1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @addtogroup RCCEx_Private_Functions
1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{
1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */
1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static uint32_t RCC_GetPLLCLKFreq(void)
1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1525 .loc 1 1532 1
1526 .cfi_startproc
1527 @ args = 0, pretend = 0, frame = 16
1528 @ frame_needed = 1, uses_anonymous_args = 0
1529 @ link register save eliminated.
1530 0000 80B4 push {r7}
1531 .cfi_def_cfa_offset 4
1532 .cfi_offset 7, -4
1533 0002 85B0 sub sp, sp, #20
1534 .cfi_def_cfa_offset 24
1535 0004 00AF add r7, sp, #0
1536 .cfi_def_cfa_register 7
1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t pllmul = 0U, pllsource = 0U, prediv = 0U, pllclk = 0U;
1537 .loc 1 1533 12
1538 0006 0023 movs r3, #0
1539 0008 BB60 str r3, [r7, #8]
1540 .loc 1 1533 25
1541 000a 0023 movs r3, #0
1542 000c 7B60 str r3, [r7, #4]
1543 .loc 1 1533 41
1544 000e 0023 movs r3, #0
1545 0010 3B60 str r3, [r7]
1546 .loc 1 1533 54
1547 0012 0023 movs r3, #0
1548 0014 FB60 str r3, [r7, #12]
1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
1549 .loc 1 1535 15
1550 0016 164B ldr r3, .L113
1551 0018 5B68 ldr r3, [r3, #4]
ARM GAS /tmp/ccwmaYtI.s page 76
1552 .loc 1 1535 10
1553 001a 03F47013 and r3, r3, #3932160
1554 001e BB60 str r3, [r7, #8]
1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllmul = ( pllmul >> 18U) + 2U;
1555 .loc 1 1536 21
1556 0020 BB68 ldr r3, [r7, #8]
1557 0022 9B0C lsrs r3, r3, #18
1558 .loc 1 1536 10
1559 0024 0233 adds r3, r3, #2
1560 0026 BB60 str r3, [r7, #8]
1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
1561 .loc 1 1537 18
1562 0028 114B ldr r3, .L113
1563 002a 5B68 ldr r3, [r3, #4]
1564 .loc 1 1537 13
1565 002c 03F48033 and r3, r3, #65536
1566 0030 7B60 str r3, [r7, #4]
1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (pllsource != RCC_PLLSOURCE_HSI)
1567 .loc 1 1539 6
1568 0032 7B68 ldr r3, [r7, #4]
1569 0034 002B cmp r3, #0
1570 0036 0ED0 beq .L110
1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** prediv = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U;
1571 .loc 1 1541 18
1572 0038 0D4B ldr r3, .L113
1573 003a DB6A ldr r3, [r3, #44]
1574 .loc 1 1541 26
1575 003c 03F00F03 and r3, r3, #15
1576 .loc 1 1541 12
1577 0040 0133 adds r3, r3, #1
1578 0042 3B60 str r3, [r7]
1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSE_VALUE/prediv) * pllmul;
1579 .loc 1 1543 24
1580 0044 0B4A ldr r2, .L113+4
1581 0046 3B68 ldr r3, [r7]
1582 0048 B2FBF3F2 udiv r2, r2, r3
1583 .loc 1 1543 12
1584 004c BB68 ldr r3, [r7, #8]
1585 004e 02FB03F3 mul r3, r2, r3
1586 0052 FB60 str r3, [r7, #12]
1587 0054 04E0 b .L111
1588 .L110:
1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else
1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2U * PLLMUL */
1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSI_VALUE >> 1U) * pllmul;
1589 .loc 1 1548 12
1590 0056 BB68 ldr r3, [r7, #8]
1591 0058 074A ldr r2, .L113+8
1592 005a 02FB03F3 mul r3, r2, r3
1593 005e FB60 str r3, [r7, #12]
1594 .L111:
1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
ARM GAS /tmp/ccwmaYtI.s page 77
1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else
1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** prediv = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U;
1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSE_VALUE/prediv) * pllmul;
1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else
1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** {
1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSI_VALUE/prediv) * pllmul;
1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c ****
1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return pllclk;
1595 .loc 1 1564 10
1596 0060 FB68 ldr r3, [r7, #12]
1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** }
1597 .loc 1 1565 1
1598 0062 1846 mov r0, r3
1599 0064 1437 adds r7, r7, #20
1600 .cfi_def_cfa_offset 4
1601 0066 BD46 mov sp, r7
1602 .cfi_def_cfa_register 13
1603 @ sp needed
1604 0068 5DF8047B ldr r7, [sp], #4
1605 .cfi_restore 7
1606 .cfi_def_cfa_offset 0
1607 006c 7047 bx lr
1608 .L114:
1609 006e 00BF .align 2
1610 .L113:
1611 0070 00100240 .word 1073876992
1612 0074 0024F400 .word 16000000
1613 0078 00093D00 .word 4000000
1614 .cfi_endproc
1615 .LFE133:
1617 .section .rodata.adc_pll_prediv_table.0,"a"
1618 .align 2
1621 adc_pll_prediv_table.0:
1622 0000 0100 .short 1
1623 0002 0200 .short 2
1624 0004 0400 .short 4
1625 0006 0600 .short 6
1626 0008 0800 .short 8
1627 000a 0A00 .short 10
1628 000c 0C00 .short 12
1629 000e 1000 .short 16
1630 0010 2000 .short 32
1631 0012 4000 .short 64
1632 0014 8000 .short 128
1633 0016 0001 .short 256
1634 0018 0001 .short 256
1635 001a 0001 .short 256
1636 001c 0001 .short 256
1637 001e 0001 .short 256
1638 .text
ARM GAS /tmp/ccwmaYtI.s page 78
1639 .Letext0:
1640 .file 3 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl
1641 .file 4 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl
1642 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
1643 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
1644 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
1645 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h"
1646 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h"
1647 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
1648 .file 11 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h"
ARM GAS /tmp/ccwmaYtI.s page 79
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_rcc_ex.c
/tmp/ccwmaYtI.s:21 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t
/tmp/ccwmaYtI.s:27 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig
/tmp/ccwmaYtI.s:281 .text.HAL_RCCEx_PeriphCLKConfig:0000015c $d
/tmp/ccwmaYtI.s:285 .text.HAL_RCCEx_PeriphCLKConfig:00000168 $t
/tmp/ccwmaYtI.s:567 .text.HAL_RCCEx_PeriphCLKConfig:0000031c $d
/tmp/ccwmaYtI.s:572 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t
/tmp/ccwmaYtI.s:578 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig
/tmp/ccwmaYtI.s:737 .text.HAL_RCCEx_GetPeriphCLKConfig:000000f4 $d
/tmp/ccwmaYtI.s:743 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t
/tmp/ccwmaYtI.s:749 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq
/tmp/ccwmaYtI.s:815 .text.HAL_RCCEx_GetPeriphCLKFreq:0000008c $d
/tmp/ccwmaYtI.s:847 .text.HAL_RCCEx_GetPeriphCLKFreq:0000010c $t
/tmp/ccwmaYtI.s:1237 .text.HAL_RCCEx_GetPeriphCLKFreq:00000380 $d
/tmp/ccwmaYtI.s:1242 .text.HAL_RCCEx_GetPeriphCLKFreq:0000038c $t
/tmp/ccwmaYtI.s:1523 .text.RCC_GetPLLCLKFreq:00000000 RCC_GetPLLCLKFreq
/tmp/ccwmaYtI.s:1509 .text.HAL_RCCEx_GetPeriphCLKFreq:000004fc $d
/tmp/ccwmaYtI.s:1621 .rodata.adc_pll_prediv_table.0:00000000 adc_pll_prediv_table.0
/tmp/ccwmaYtI.s:1518 .text.RCC_GetPLLCLKFreq:00000000 $t
/tmp/ccwmaYtI.s:1611 .text.RCC_GetPLLCLKFreq:00000070 $d
/tmp/ccwmaYtI.s:1618 .rodata.adc_pll_prediv_table.0:00000000 $d
UNDEFINED SYMBOLS
HAL_GetTick
HAL_RCC_GetPCLK2Freq
HAL_RCC_GetSysClockFreq
HAL_RCC_GetPCLK1Freq
SystemCoreClock