1270 lines
50 KiB
Plaintext
1270 lines
50 KiB
Plaintext
ARM GAS /tmp/cccWxVkc.s page 1
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1 .cpu cortex-m4
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2 .arch armv7e-m
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3 .fpu fpv4-sp-d16
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4 .eabi_attribute 27, 1
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5 .eabi_attribute 28, 1
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6 .eabi_attribute 20, 1
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7 .eabi_attribute 21, 1
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8 .eabi_attribute 23, 3
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9 .eabi_attribute 24, 1
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10 .eabi_attribute 25, 1
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11 .eabi_attribute 26, 1
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12 .eabi_attribute 30, 6
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13 .eabi_attribute 34, 1
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14 .eabi_attribute 18, 4
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15 .file "AMS_HighLevel.c"
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16 .text
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17 .Ltext0:
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18 .cfi_sections .debug_frame
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19 .file 1 "Core/Src/AMS_HighLevel.c"
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20 .global module
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21 .section .bss.module,"aw",%nobits
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22 .align 2
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25 module:
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26 0000 00000000 .space 116
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26 00000000
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26 00000000
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26 00000000
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26 00000000
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27 .global balancedCells
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28 .section .bss.balancedCells,"aw",%nobits
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29 .align 2
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32 balancedCells:
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33 0000 00000000 .space 4
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34 .global balancingActive
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35 .section .bss.balancingActive,"aw",%nobits
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38 balancingActive:
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39 0000 00 .space 1
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40 .global amsuv
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41 .section .bss.amsuv,"aw",%nobits
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42 .align 1
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45 amsuv:
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46 0000 0000 .space 2
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47 .global amsov
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48 .section .bss.amsov,"aw",%nobits
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49 .align 1
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52 amsov:
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53 0000 0000 .space 2
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54 .global numberofCells
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55 .section .data.numberofCells,"aw"
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58 numberofCells:
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59 0000 0D .byte 13
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60 .global numberofAux
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61 .section .bss.numberofAux,"aw",%nobits
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64 numberofAux:
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65 0000 00 .space 1
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66 .global packetChecksumFails
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67 .section .bss.packetChecksumFails,"aw",%nobits
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ARM GAS /tmp/cccWxVkc.s page 2
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70 packetChecksumFails:
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71 0000 00 .space 1
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72 .global deviceSleeps
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73 .section .bss.deviceSleeps,"aw",%nobits
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76 deviceSleeps:
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77 0000 00 .space 1
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78 .global currentAMSState
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79 .section .bss.currentAMSState,"aw",%nobits
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82 currentAMSState:
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83 0000 00 .space 1
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84 .global lastAMSState
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85 .section .bss.lastAMSState,"aw",%nobits
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88 lastAMSState:
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89 0000 00 .space 1
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90 .global pollingTimes
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91 .section .bss.pollingTimes,"aw",%nobits
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92 .align 2
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95 pollingTimes:
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96 0000 00000000 .space 8
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96 00000000
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97 .section .text.AMS_Init,"ax",%progbits
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98 .align 1
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99 .global AMS_Init
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100 .syntax unified
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101 .thumb
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102 .thumb_func
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104 AMS_Init:
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105 .LFB130:
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1:Core/Src/AMS_HighLevel.c **** /*
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2:Core/Src/AMS_HighLevel.c **** * AMS_HighLevel.c
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3:Core/Src/AMS_HighLevel.c **** *
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4:Core/Src/AMS_HighLevel.c **** * Created on: 20.07.2022
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5:Core/Src/AMS_HighLevel.c **** * Author: max
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6:Core/Src/AMS_HighLevel.c **** */
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7:Core/Src/AMS_HighLevel.c ****
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8:Core/Src/AMS_HighLevel.c **** #include "AMS_HighLevel.h"
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9:Core/Src/AMS_HighLevel.c **** #include "ADBMS_Abstraction.h"
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10:Core/Src/AMS_HighLevel.c **** #include "ADBMS_LL_Driver.h"
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11:Core/Src/AMS_HighLevel.c **** #include <stdint.h>
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12:Core/Src/AMS_HighLevel.c ****
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13:Core/Src/AMS_HighLevel.c **** Cell_Module module = {};
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14:Core/Src/AMS_HighLevel.c **** uint32_t balancedCells = 0;
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15:Core/Src/AMS_HighLevel.c **** bool balancingActive = false;
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16:Core/Src/AMS_HighLevel.c ****
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17:Core/Src/AMS_HighLevel.c **** uint16_t amsuv = 0;
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18:Core/Src/AMS_HighLevel.c **** uint16_t amsov = 0;
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19:Core/Src/AMS_HighLevel.c ****
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20:Core/Src/AMS_HighLevel.c **** uint8_t numberofCells = 13;
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21:Core/Src/AMS_HighLevel.c **** uint8_t numberofAux = 0;
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22:Core/Src/AMS_HighLevel.c ****
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23:Core/Src/AMS_HighLevel.c **** uint8_t packetChecksumFails = 0;
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24:Core/Src/AMS_HighLevel.c **** #define MAX_PACKET_CHECKSUM_FAILS 5
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25:Core/Src/AMS_HighLevel.c ****
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26:Core/Src/AMS_HighLevel.c **** uint8_t deviceSleeps = 0;
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27:Core/Src/AMS_HighLevel.c **** #define MAX_DEVICE_SLEEP 3 //TODO: change to correct value
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28:Core/Src/AMS_HighLevel.c **** #define MAX_CELL_VOLTAGE 4200 //change to 4200
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29:Core/Src/AMS_HighLevel.c **** #define MIN_CELL_VOLTAGE 3200 //change to 3000
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ARM GAS /tmp/cccWxVkc.s page 3
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30:Core/Src/AMS_HighLevel.c **** #define CELL_VOLTAGE_DIFF_BALANCING 20 //max difference between lowest cell and any other cell
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31:Core/Src/AMS_HighLevel.c ****
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32:Core/Src/AMS_HighLevel.c **** amsState currentAMSState = AMSDEACTIVE;
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33:Core/Src/AMS_HighLevel.c **** amsState lastAMSState = AMSDEACTIVE;
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34:Core/Src/AMS_HighLevel.c ****
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35:Core/Src/AMS_HighLevel.c **** struct pollingTimes {
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36:Core/Src/AMS_HighLevel.c **** uint32_t S_ADC_OW_CHECK;
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37:Core/Src/AMS_HighLevel.c **** uint32_t TMP1075;
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38:Core/Src/AMS_HighLevel.c **** };
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39:Core/Src/AMS_HighLevel.c ****
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40:Core/Src/AMS_HighLevel.c **** struct pollingTimes pollingTimes = {0, 0};
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41:Core/Src/AMS_HighLevel.c ****
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42:Core/Src/AMS_HighLevel.c **** void AMS_Init(SPI_HandleTypeDef* hspi) {
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106 .loc 1 42 40
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107 .cfi_startproc
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108 @ args = 0, pretend = 0, frame = 16
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109 @ frame_needed = 1, uses_anonymous_args = 0
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110 0000 90B5 push {r4, r7, lr}
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111 .cfi_def_cfa_offset 12
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112 .cfi_offset 4, -12
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113 .cfi_offset 7, -8
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114 .cfi_offset 14, -4
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115 0002 85B0 sub sp, sp, #20
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116 .cfi_def_cfa_offset 32
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117 0004 00AF add r7, sp, #0
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118 .cfi_def_cfa_register 7
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119 0006 7860 str r0, [r7, #4]
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43:Core/Src/AMS_HighLevel.c **** initAMS(hspi, numberofCells, numberofAux);
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120 .loc 1 43 3
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121 0008 104B ldr r3, .L2
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122 000a 1B78 ldrb r3, [r3] @ zero_extendqisi2
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123 000c 104A ldr r2, .L2+4
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124 000e 1278 ldrb r2, [r2] @ zero_extendqisi2
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125 0010 1946 mov r1, r3
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126 0012 7868 ldr r0, [r7, #4]
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127 0014 FFF7FEFF bl initAMS
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44:Core/Src/AMS_HighLevel.c **** amsov = DEFAULT_OV;
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128 .loc 1 44 9
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129 0018 0E4B ldr r3, .L2+8
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130 001a 40F26542 movw r2, #1125
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131 001e 1A80 strh r2, [r3] @ movhi
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45:Core/Src/AMS_HighLevel.c **** amsuv = DEFAULT_UV;
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132 .loc 1 45 9
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133 0020 0D4B ldr r3, .L2+12
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134 0022 40F2A112 movw r2, #417
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135 0026 1A80 strh r2, [r3] @ movhi
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46:Core/Src/AMS_HighLevel.c ****
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47:Core/Src/AMS_HighLevel.c **** pollingTimes = (struct pollingTimes) {HAL_GetTick(), HAL_GetTick()};
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136 .loc 1 47 41
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137 0028 FFF7FEFF bl HAL_GetTick
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138 002c 0446 mov r4, r0
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139 .loc 1 47 56 discriminator 1
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140 002e FFF7FEFF bl HAL_GetTick
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141 0032 0346 mov r3, r0
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142 .loc 1 47 16 discriminator 2
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143 0034 094A ldr r2, .L2+16
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144 0036 1460 str r4, [r2]
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ARM GAS /tmp/cccWxVkc.s page 4
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145 0038 084A ldr r2, .L2+16
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146 003a 5360 str r3, [r2, #4]
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48:Core/Src/AMS_HighLevel.c ****
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49:Core/Src/AMS_HighLevel.c **** currentAMSState = AMSIDLE;
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147 .loc 1 49 19
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148 003c 084B ldr r3, .L2+20
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149 003e 0122 movs r2, #1
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150 0040 1A70 strb r2, [r3]
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50:Core/Src/AMS_HighLevel.c **** }
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151 .loc 1 50 1
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152 0042 00BF nop
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153 0044 1437 adds r7, r7, #20
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154 .cfi_def_cfa_offset 12
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155 0046 BD46 mov sp, r7
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156 .cfi_def_cfa_register 13
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157 @ sp needed
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158 0048 90BD pop {r4, r7, pc}
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159 .L3:
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160 004a 00BF .align 2
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161 .L2:
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162 004c 00000000 .word numberofCells
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163 0050 00000000 .word numberofAux
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164 0054 00000000 .word amsov
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165 0058 00000000 .word amsuv
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166 005c 00000000 .word pollingTimes
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167 0060 00000000 .word currentAMSState
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168 .cfi_endproc
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169 .LFE130:
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171 .section .text.AMS_Loop,"ax",%progbits
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172 .align 1
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173 .global AMS_Loop
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174 .syntax unified
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175 .thumb
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176 .thumb_func
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178 AMS_Loop:
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179 .LFB131:
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51:Core/Src/AMS_HighLevel.c ****
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52:Core/Src/AMS_HighLevel.c **** void AMS_Loop() {
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180 .loc 1 52 17
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181 .cfi_startproc
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182 @ args = 0, pretend = 0, frame = 0
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183 @ frame_needed = 1, uses_anonymous_args = 0
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184 0000 80B5 push {r7, lr}
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185 .cfi_def_cfa_offset 8
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186 .cfi_offset 7, -8
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187 .cfi_offset 14, -4
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188 0002 00AF add r7, sp, #0
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189 .cfi_def_cfa_register 7
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53:Core/Src/AMS_HighLevel.c ****
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54:Core/Src/AMS_HighLevel.c **** // On Transition Functions called ones if the State Changed
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55:Core/Src/AMS_HighLevel.c ****
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56:Core/Src/AMS_HighLevel.c **** if (currentAMSState != lastAMSState) {
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190 .loc 1 56 23
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191 0004 224B ldr r3, .L27
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192 0006 1A78 ldrb r2, [r3] @ zero_extendqisi2
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193 0008 224B ldr r3, .L27+4
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194 000a 1B78 ldrb r3, [r3] @ zero_extendqisi2
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ARM GAS /tmp/cccWxVkc.s page 5
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195 .loc 1 56 6
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196 000c 9A42 cmp r2, r3
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197 000e 19D0 beq .L5
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57:Core/Src/AMS_HighLevel.c **** switch (currentAMSState) {
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198 .loc 1 57 5
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199 0010 1F4B ldr r3, .L27
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200 0012 1B78 ldrb r3, [r3] @ zero_extendqisi2
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201 0014 062B cmp r3, #6
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202 0016 11D8 bhi .L6
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203 0018 01A2 adr r2, .L8
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204 001a 52F823F0 ldr pc, [r2, r3, lsl #2]
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205 001e 00BF .p2align 2
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206 .L8:
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207 0020 3D000000 .word .L6+1
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208 0024 3D000000 .word .L6+1
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209 0028 3D000000 .word .L6+1
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210 002c 3D000000 .word .L6+1
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211 0030 3D000000 .word .L6+1
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212 0034 3D000000 .word .L6+1
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213 0038 3D000000 .word .L6+1
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214 .p2align 1
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215 .L6:
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58:Core/Src/AMS_HighLevel.c **** case AMSIDLE:
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59:Core/Src/AMS_HighLevel.c **** break;
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60:Core/Src/AMS_HighLevel.c **** case AMSDEACTIVE:
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61:Core/Src/AMS_HighLevel.c **** break;
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62:Core/Src/AMS_HighLevel.c **** case AMSCHARGING:
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63:Core/Src/AMS_HighLevel.c **** break;
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64:Core/Src/AMS_HighLevel.c **** case AMSIDLEBALANCING:
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65:Core/Src/AMS_HighLevel.c **** break;
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66:Core/Src/AMS_HighLevel.c **** case AMSDISCHARGING:
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67:Core/Src/AMS_HighLevel.c **** break;
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68:Core/Src/AMS_HighLevel.c **** case AMSWARNING:
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69:Core/Src/AMS_HighLevel.c **** break;
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70:Core/Src/AMS_HighLevel.c **** case AMSERROR:
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71:Core/Src/AMS_HighLevel.c **** break;
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72:Core/Src/AMS_HighLevel.c **** }
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73:Core/Src/AMS_HighLevel.c **** lastAMSState = currentAMSState;
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216 .loc 1 73 18
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217 003c 144B ldr r3, .L27
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218 003e 1A78 ldrb r2, [r3] @ zero_extendqisi2
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219 0040 144B ldr r3, .L27+4
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220 0042 1A70 strb r2, [r3]
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221 .L5:
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74:Core/Src/AMS_HighLevel.c **** }
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75:Core/Src/AMS_HighLevel.c ****
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76:Core/Src/AMS_HighLevel.c **** // Main Loops for different AMS States
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77:Core/Src/AMS_HighLevel.c ****
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78:Core/Src/AMS_HighLevel.c **** switch (currentAMSState) {
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222 .loc 1 78 3
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223 0044 124B ldr r3, .L27
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224 0046 1B78 ldrb r3, [r3] @ zero_extendqisi2
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225 0048 062B cmp r3, #6
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226 004a 1ED8 bhi .L24
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227 004c 01A2 adr r2, .L17
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228 004e 52F823F0 ldr pc, [r2, r3, lsl #2]
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229 0052 00BF .p2align 2
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ARM GAS /tmp/cccWxVkc.s page 6
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230 .L17:
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231 0054 89000000 .word .L25+1
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232 0058 71000000 .word .L22+1
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233 005c 77000000 .word .L21+1
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234 0060 7D000000 .word .L20+1
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235 0064 89000000 .word .L25+1
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236 0068 83000000 .word .L18+1
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237 006c 89000000 .word .L25+1
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238 .p2align 1
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239 .L22:
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79:Core/Src/AMS_HighLevel.c **** case AMSIDLE:
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80:Core/Src/AMS_HighLevel.c **** AMS_Idle_Loop();
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240 .loc 1 80 5
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241 0070 FFF7FEFF bl AMS_Idle_Loop
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81:Core/Src/AMS_HighLevel.c **** break;
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242 .loc 1 81 5
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243 0074 09E0 b .L15
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244 .L21:
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82:Core/Src/AMS_HighLevel.c **** case AMSDEACTIVE:
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83:Core/Src/AMS_HighLevel.c **** break;
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84:Core/Src/AMS_HighLevel.c **** case AMSCHARGING:
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85:Core/Src/AMS_HighLevel.c **** AMS_Idle_Loop();
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245 .loc 1 85 5
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246 0076 FFF7FEFF bl AMS_Idle_Loop
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86:Core/Src/AMS_HighLevel.c **** break;
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247 .loc 1 86 5
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248 007a 06E0 b .L15
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249 .L20:
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87:Core/Src/AMS_HighLevel.c **** case AMSIDLEBALANCING:
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88:Core/Src/AMS_HighLevel.c **** AMS_Idle_Loop();
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250 .loc 1 88 5
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251 007c FFF7FEFF bl AMS_Idle_Loop
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89:Core/Src/AMS_HighLevel.c **** break;
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252 .loc 1 89 5
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253 0080 03E0 b .L15
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254 .L18:
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90:Core/Src/AMS_HighLevel.c **** case AMSDISCHARGING:
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91:Core/Src/AMS_HighLevel.c **** break;
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92:Core/Src/AMS_HighLevel.c **** case AMSWARNING:
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93:Core/Src/AMS_HighLevel.c **** AMS_Warning_Loop();
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255 .loc 1 93 5
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256 0082 FFF7FEFF bl AMS_Warning_Loop
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94:Core/Src/AMS_HighLevel.c **** break;
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257 .loc 1 94 5
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258 0086 00E0 b .L15
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259 .L25:
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83:Core/Src/AMS_HighLevel.c **** case AMSCHARGING:
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260 .loc 1 83 5
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261 0088 00BF nop
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262 .L15:
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263 .L24:
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95:Core/Src/AMS_HighLevel.c **** case AMSERROR:
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96:Core/Src/AMS_HighLevel.c **** break;
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97:Core/Src/AMS_HighLevel.c **** }
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98:Core/Src/AMS_HighLevel.c **** }
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264 .loc 1 98 1
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265 008a 00BF nop
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ARM GAS /tmp/cccWxVkc.s page 7
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266 008c 80BD pop {r7, pc}
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267 .L28:
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268 008e 00BF .align 2
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269 .L27:
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270 0090 00000000 .word currentAMSState
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271 0094 00000000 .word lastAMSState
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272 .cfi_endproc
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273 .LFE131:
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275 .section .text.AMS_Idle_Loop,"ax",%progbits
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276 .align 1
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277 .global AMS_Idle_Loop
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278 .syntax unified
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279 .thumb
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280 .thumb_func
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282 AMS_Idle_Loop:
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283 .LFB132:
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99:Core/Src/AMS_HighLevel.c ****
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100:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Idle_Loop() {
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284 .loc 1 100 25
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285 .cfi_startproc
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286 @ args = 0, pretend = 0, frame = 24
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287 @ frame_needed = 1, uses_anonymous_args = 0
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288 0000 2DE9B04F push {r4, r5, r7, r8, r9, r10, fp, lr}
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289 .cfi_def_cfa_offset 32
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290 .cfi_offset 4, -32
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291 .cfi_offset 5, -28
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292 .cfi_offset 7, -24
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293 .cfi_offset 8, -20
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294 .cfi_offset 9, -16
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295 .cfi_offset 10, -12
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296 .cfi_offset 11, -8
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297 .cfi_offset 14, -4
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298 0004 88B0 sub sp, sp, #32
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299 .cfi_def_cfa_offset 64
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300 0006 02AF add r7, sp, #8
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301 .cfi_def_cfa 7, 56
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101:Core/Src/AMS_HighLevel.c **** if (!amsWakeUp()) {
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302 .loc 1 101 8
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303 0008 FFF7FEFF bl amsWakeUp
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304 000c 0346 mov r3, r0
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305 .loc 1 101 6 discriminator 1
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||
306 000e 002B cmp r3, #0
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307 0010 05D1 bne .L30
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102:Core/Src/AMS_HighLevel.c **** error_data.data_kind = SEK_INTERNAL_BMS_TIMEOUT; //we don't receive data for the wakeup command
|
||
308 .loc 1 102 26
|
||
309 0012 944B ldr r3, .L46
|
||
310 0014 0722 movs r2, #7
|
||
311 0016 5A80 strh r2, [r3, #2] @ movhi
|
||
103:Core/Src/AMS_HighLevel.c **** set_error_source(ERROR_SOURCE_INTERNAL); //so we can't tell if we timed out
|
||
312 .loc 1 103 5
|
||
313 0018 2020 movs r0, #32
|
||
314 001a FFF7FEFF bl set_error_source
|
||
315 .L30:
|
||
104:Core/Src/AMS_HighLevel.c **** }
|
||
105:Core/Src/AMS_HighLevel.c ****
|
||
106:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsAuxAndStatusMeasurement(&module);
|
||
316 .loc 1 106 26
|
||
ARM GAS /tmp/cccWxVkc.s page 8
|
||
|
||
|
||
317 001e 9248 ldr r0, .L46+4
|
||
318 0020 FFF7FEFF bl amsAuxAndStatusMeasurement
|
||
319 0024 0346 mov r3, r0
|
||
320 0026 1A46 mov r2, r3
|
||
321 .loc 1 106 23 discriminator 1
|
||
322 0028 904B ldr r3, .L46+8
|
||
323 002a 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
324 002c 1344 add r3, r3, r2
|
||
325 002e DAB2 uxtb r2, r3
|
||
326 0030 8E4B ldr r3, .L46+8
|
||
327 0032 1A70 strb r2, [r3]
|
||
107:Core/Src/AMS_HighLevel.c ****
|
||
108:Core/Src/AMS_HighLevel.c **** if (module.status.SLEEP) {
|
||
328 .loc 1 108 7
|
||
329 0034 8C4B ldr r3, .L46+4
|
||
330 0036 93F84D30 ldrb r3, [r3, #77] @ zero_extendqisi2
|
||
331 003a 03F01003 and r3, r3, #16
|
||
332 003e DBB2 uxtb r3, r3
|
||
333 .loc 1 108 6
|
||
334 0040 002B cmp r3, #0
|
||
335 0042 12D0 beq .L31
|
||
109:Core/Src/AMS_HighLevel.c **** deviceSleeps++;
|
||
336 .loc 1 109 17
|
||
337 0044 8A4B ldr r3, .L46+12
|
||
338 0046 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
339 0048 0133 adds r3, r3, #1
|
||
340 004a DAB2 uxtb r2, r3
|
||
341 004c 884B ldr r3, .L46+12
|
||
342 004e 1A70 strb r2, [r3]
|
||
110:Core/Src/AMS_HighLevel.c **** if (deviceSleeps > MAX_DEVICE_SLEEP) {
|
||
343 .loc 1 110 22
|
||
344 0050 874B ldr r3, .L46+12
|
||
345 0052 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
346 .loc 1 110 8
|
||
347 0054 032B cmp r3, #3
|
||
348 0056 06D9 bls .L32
|
||
111:Core/Src/AMS_HighLevel.c **** error_data.data_kind = SEK_INTERNAL_BMS_TIMEOUT;
|
||
349 .loc 1 111 28
|
||
350 0058 824B ldr r3, .L46
|
||
351 005a 0722 movs r2, #7
|
||
352 005c 5A80 strh r2, [r3, #2] @ movhi
|
||
112:Core/Src/AMS_HighLevel.c **** set_error_source(ERROR_SOURCE_INTERNAL);
|
||
353 .loc 1 112 7
|
||
354 005e 2020 movs r0, #32
|
||
355 0060 FFF7FEFF bl set_error_source
|
||
356 0064 01E0 b .L31
|
||
357 .L32:
|
||
113:Core/Src/AMS_HighLevel.c **** } else {
|
||
114:Core/Src/AMS_HighLevel.c **** amsReset();
|
||
358 .loc 1 114 7
|
||
359 0066 FFF7FEFF bl amsReset
|
||
360 .L31:
|
||
115:Core/Src/AMS_HighLevel.c **** }
|
||
116:Core/Src/AMS_HighLevel.c **** }
|
||
117:Core/Src/AMS_HighLevel.c ****
|
||
118:Core/Src/AMS_HighLevel.c **** if (module.status.CS_FLT || module.status.SPIFLT || module.status.CMED ||
|
||
361 .loc 1 118 20
|
||
ARM GAS /tmp/cccWxVkc.s page 9
|
||
|
||
|
||
362 006a 7F4B ldr r3, .L46+4
|
||
363 006c B3F84830 ldrh r3, [r3, #72]
|
||
364 .loc 1 118 6
|
||
365 0070 002B cmp r3, #0
|
||
366 0072 37D1 bne .L33
|
||
367 .loc 1 118 28 discriminator 1
|
||
368 0074 7C4B ldr r3, .L46+4
|
||
369 0076 93F84D30 ldrb r3, [r3, #77] @ zero_extendqisi2
|
||
370 007a 03F00803 and r3, r3, #8
|
||
371 007e DBB2 uxtb r3, r3
|
||
372 0080 002B cmp r3, #0
|
||
373 0082 2FD1 bne .L33
|
||
374 .loc 1 118 52 discriminator 2
|
||
375 0084 784B ldr r3, .L46+4
|
||
376 0086 93F84C30 ldrb r3, [r3, #76] @ zero_extendqisi2
|
||
377 008a 03F02003 and r3, r3, #32
|
||
378 008e DBB2 uxtb r3, r3
|
||
379 0090 002B cmp r3, #0
|
||
380 0092 27D1 bne .L33
|
||
381 .loc 1 118 74 discriminator 3
|
||
382 0094 744B ldr r3, .L46+4
|
||
383 0096 93F84C30 ldrb r3, [r3, #76] @ zero_extendqisi2
|
||
384 009a 23F07F03 bic r3, r3, #127
|
||
385 009e DBB2 uxtb r3, r3
|
||
386 00a0 002B cmp r3, #0
|
||
387 00a2 1FD1 bne .L33
|
||
119:Core/Src/AMS_HighLevel.c **** module.status.SMED || module.status.VDE || module.status.VDEL ||
|
||
388 .loc 1 119 26
|
||
389 00a4 704B ldr r3, .L46+4
|
||
390 00a6 93F84D30 ldrb r3, [r3, #77] @ zero_extendqisi2
|
||
391 00aa 03F00203 and r3, r3, #2
|
||
392 00ae DBB2 uxtb r3, r3
|
||
393 00b0 002B cmp r3, #0
|
||
394 00b2 17D1 bne .L33
|
||
395 .loc 1 119 47 discriminator 1
|
||
396 00b4 6C4B ldr r3, .L46+4
|
||
397 00b6 93F84D30 ldrb r3, [r3, #77] @ zero_extendqisi2
|
||
398 00ba 03F00103 and r3, r3, #1
|
||
399 00be DBB2 uxtb r3, r3
|
||
400 00c0 002B cmp r3, #0
|
||
401 00c2 0FD1 bne .L33
|
||
402 .loc 1 119 69 discriminator 2
|
||
403 00c4 684B ldr r3, .L46+4
|
||
404 00c6 93F84D30 ldrb r3, [r3, #77] @ zero_extendqisi2
|
||
405 00ca 23F07F03 bic r3, r3, #127
|
||
406 00ce DBB2 uxtb r3, r3
|
||
407 00d0 002B cmp r3, #0
|
||
408 00d2 07D1 bne .L33
|
||
120:Core/Src/AMS_HighLevel.c **** module.status.OSCCHK || module.status.TMODCHK) {
|
||
409 .loc 1 120 27
|
||
410 00d4 644B ldr r3, .L46+4
|
||
411 00d6 93F84D30 ldrb r3, [r3, #77] @ zero_extendqisi2
|
||
412 00da 03F04003 and r3, r3, #64
|
||
413 00de DBB2 uxtb r3, r3
|
||
414 00e0 002B cmp r3, #0
|
||
415 00e2 05D0 beq .L34
|
||
416 .L33:
|
||
ARM GAS /tmp/cccWxVkc.s page 10
|
||
|
||
|
||
121:Core/Src/AMS_HighLevel.c **** error_data.data_kind = SEK_INTERNAL_BMS_FAULT;
|
||
417 .loc 1 121 26
|
||
418 00e4 5F4B ldr r3, .L46
|
||
419 00e6 0A22 movs r2, #10
|
||
420 00e8 5A80 strh r2, [r3, #2] @ movhi
|
||
122:Core/Src/AMS_HighLevel.c **** set_error_source(ERROR_SOURCE_INTERNAL);
|
||
421 .loc 1 122 5
|
||
422 00ea 2020 movs r0, #32
|
||
423 00ec FFF7FEFF bl set_error_source
|
||
424 .L34:
|
||
123:Core/Src/AMS_HighLevel.c **** }
|
||
124:Core/Src/AMS_HighLevel.c ****
|
||
125:Core/Src/AMS_HighLevel.c **** if (module.status.THSD) {
|
||
425 .loc 1 125 7
|
||
426 00f0 5D4B ldr r3, .L46+4
|
||
427 00f2 93F84D30 ldrb r3, [r3, #77] @ zero_extendqisi2
|
||
428 00f6 03F02003 and r3, r3, #32
|
||
429 00fa DBB2 uxtb r3, r3
|
||
430 .loc 1 125 6
|
||
431 00fc 002B cmp r3, #0
|
||
432 00fe 05D0 beq .L35
|
||
126:Core/Src/AMS_HighLevel.c **** error_data.data_kind = SEK_INTERNAL_BMS_OVERTEMP;
|
||
433 .loc 1 126 26
|
||
434 0100 584B ldr r3, .L46
|
||
435 0102 0922 movs r2, #9
|
||
436 0104 5A80 strh r2, [r3, #2] @ movhi
|
||
127:Core/Src/AMS_HighLevel.c **** set_error_source(ERROR_SOURCE_INTERNAL);
|
||
437 .loc 1 127 5
|
||
438 0106 2020 movs r0, #32
|
||
439 0108 FFF7FEFF bl set_error_source
|
||
440 .L35:
|
||
128:Core/Src/AMS_HighLevel.c **** }
|
||
129:Core/Src/AMS_HighLevel.c ****
|
||
130:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCellMeasurement(&module);
|
||
441 .loc 1 130 26
|
||
442 010c 5648 ldr r0, .L46+4
|
||
443 010e FFF7FEFF bl amsCellMeasurement
|
||
444 0112 0346 mov r3, r0
|
||
445 0114 1A46 mov r2, r3
|
||
446 .loc 1 130 23 discriminator 1
|
||
447 0116 554B ldr r3, .L46+8
|
||
448 0118 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
449 011a 1344 add r3, r3, r2
|
||
450 011c DAB2 uxtb r2, r3
|
||
451 011e 534B ldr r3, .L46+8
|
||
452 0120 1A70 strb r2, [r3]
|
||
131:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCheckUnderOverVoltage(&module);
|
||
453 .loc 1 131 26
|
||
454 0122 5148 ldr r0, .L46+4
|
||
455 0124 FFF7FEFF bl amsCheckUnderOverVoltage
|
||
456 0128 0346 mov r3, r0
|
||
457 012a 1A46 mov r2, r3
|
||
458 .loc 1 131 23 discriminator 1
|
||
459 012c 4F4B ldr r3, .L46+8
|
||
460 012e 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
461 0130 1344 add r3, r3, r2
|
||
462 0132 DAB2 uxtb r2, r3
|
||
ARM GAS /tmp/cccWxVkc.s page 11
|
||
|
||
|
||
463 0134 4D4B ldr r3, .L46+8
|
||
464 0136 1A70 strb r2, [r3]
|
||
132:Core/Src/AMS_HighLevel.c ****
|
||
133:Core/Src/AMS_HighLevel.c **** if (packetChecksumFails > MAX_PACKET_CHECKSUM_FAILS) {
|
||
465 .loc 1 133 27
|
||
466 0138 4C4B ldr r3, .L46+8
|
||
467 013a 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
468 .loc 1 133 6
|
||
469 013c 052B cmp r3, #5
|
||
470 013e 05D9 bls .L36
|
||
134:Core/Src/AMS_HighLevel.c **** error_data.data_kind = SEK_INTERNAL_BMS_CHECKSUM_FAIL;
|
||
471 .loc 1 134 26
|
||
472 0140 484B ldr r3, .L46
|
||
473 0142 0822 movs r2, #8
|
||
474 0144 5A80 strh r2, [r3, #2] @ movhi
|
||
135:Core/Src/AMS_HighLevel.c **** set_error_source(ERROR_SOURCE_INTERNAL);
|
||
475 .loc 1 135 5
|
||
476 0146 2020 movs r0, #32
|
||
477 0148 FFF7FEFF bl set_error_source
|
||
478 .L36:
|
||
136:Core/Src/AMS_HighLevel.c **** }
|
||
137:Core/Src/AMS_HighLevel.c ****
|
||
138:Core/Src/AMS_HighLevel.c **** int any_voltage_error = 0;
|
||
479 .loc 1 138 7
|
||
480 014c 0023 movs r3, #0
|
||
481 014e 7B61 str r3, [r7, #20]
|
||
482 .LBB2:
|
||
139:Core/Src/AMS_HighLevel.c **** for (size_t i = 0; i < numberofCells; i++) {
|
||
483 .loc 1 139 15
|
||
484 0150 0023 movs r3, #0
|
||
485 0152 3B61 str r3, [r7, #16]
|
||
486 .loc 1 139 3
|
||
487 0154 48E0 b .L37
|
||
488 .L40:
|
||
140:Core/Src/AMS_HighLevel.c **** if (module.cellVoltages[i] < MIN_CELL_VOLTAGE) {
|
||
489 .loc 1 140 28
|
||
490 0156 444A ldr r2, .L46+4
|
||
491 0158 3B69 ldr r3, [r7, #16]
|
||
492 015a 32F91330 ldrsh r3, [r2, r3, lsl #1]
|
||
493 .loc 1 140 8
|
||
494 015e B3F5486F cmp r3, #3200
|
||
495 0162 1BDA bge .L38
|
||
496 .LBB3:
|
||
141:Core/Src/AMS_HighLevel.c **** any_voltage_error = 1;
|
||
497 .loc 1 141 25
|
||
498 0164 0123 movs r3, #1
|
||
499 0166 7B61 str r3, [r7, #20]
|
||
142:Core/Src/AMS_HighLevel.c **** error_data.data_kind = SEK_UNDERVOLT;
|
||
500 .loc 1 142 28
|
||
501 0168 3E4B ldr r3, .L46
|
||
502 016a 0322 movs r2, #3
|
||
503 016c 5A80 strh r2, [r3, #2] @ movhi
|
||
143:Core/Src/AMS_HighLevel.c **** error_data.data[0] = i;
|
||
504 .loc 1 143 26
|
||
505 016e 3B69 ldr r3, [r7, #16]
|
||
506 0170 DAB2 uxtb r2, r3
|
||
507 0172 3C4B ldr r3, .L46
|
||
ARM GAS /tmp/cccWxVkc.s page 12
|
||
|
||
|
||
508 0174 1A71 strb r2, [r3, #4]
|
||
144:Core/Src/AMS_HighLevel.c **** uint8_t* ptr = &error_data.data[1];
|
||
509 .loc 1 144 16
|
||
510 0176 3F4B ldr r3, .L46+16
|
||
511 0178 7B60 str r3, [r7, #4]
|
||
145:Core/Src/AMS_HighLevel.c **** ptr = ftcan_marshal_unsigned(ptr, module.cellVoltages[i], 2);
|
||
512 .loc 1 145 60
|
||
513 017a 3B4A ldr r2, .L46+4
|
||
514 017c 3B69 ldr r3, [r7, #16]
|
||
515 017e 32F91330 ldrsh r3, [r2, r3, lsl #1]
|
||
516 .loc 1 145 13
|
||
517 0182 1BB2 sxth r3, r3
|
||
518 0184 DA17 asrs r2, r3, #31
|
||
519 0186 9846 mov r8, r3
|
||
520 0188 9146 mov r9, r2
|
||
521 018a 0223 movs r3, #2
|
||
522 018c 0093 str r3, [sp]
|
||
523 018e 4246 mov r2, r8
|
||
524 0190 4B46 mov r3, r9
|
||
525 0192 7868 ldr r0, [r7, #4]
|
||
526 0194 FFF7FEFF bl ftcan_marshal_unsigned
|
||
527 0198 7860 str r0, [r7, #4]
|
||
528 .LBE3:
|
||
529 019a 22E0 b .L39
|
||
530 .L38:
|
||
146:Core/Src/AMS_HighLevel.c **** } else if (module.cellVoltages[i] > MAX_CELL_VOLTAGE) {
|
||
531 .loc 1 146 35
|
||
532 019c 324A ldr r2, .L46+4
|
||
533 019e 3B69 ldr r3, [r7, #16]
|
||
534 01a0 32F91330 ldrsh r3, [r2, r3, lsl #1]
|
||
535 .loc 1 146 15
|
||
536 01a4 41F26802 movw r2, #4200
|
||
537 01a8 9342 cmp r3, r2
|
||
538 01aa 1ADD ble .L39
|
||
539 .LBB4:
|
||
147:Core/Src/AMS_HighLevel.c **** any_voltage_error = 1;
|
||
540 .loc 1 147 25
|
||
541 01ac 0123 movs r3, #1
|
||
542 01ae 7B61 str r3, [r7, #20]
|
||
148:Core/Src/AMS_HighLevel.c **** error_data.data_kind = SEK_OVERVOLT;
|
||
543 .loc 1 148 28
|
||
544 01b0 2C4B ldr r3, .L46
|
||
545 01b2 0222 movs r2, #2
|
||
546 01b4 5A80 strh r2, [r3, #2] @ movhi
|
||
149:Core/Src/AMS_HighLevel.c **** error_data.data[0] = i;
|
||
547 .loc 1 149 26
|
||
548 01b6 3B69 ldr r3, [r7, #16]
|
||
549 01b8 DAB2 uxtb r2, r3
|
||
550 01ba 2A4B ldr r3, .L46
|
||
551 01bc 1A71 strb r2, [r3, #4]
|
||
150:Core/Src/AMS_HighLevel.c **** uint8_t* ptr = &error_data.data[1];
|
||
552 .loc 1 150 16
|
||
553 01be 2D4B ldr r3, .L46+16
|
||
554 01c0 BB60 str r3, [r7, #8]
|
||
151:Core/Src/AMS_HighLevel.c **** ptr = ftcan_marshal_unsigned(ptr, module.cellVoltages[i], 2);
|
||
555 .loc 1 151 60
|
||
556 01c2 294A ldr r2, .L46+4
|
||
ARM GAS /tmp/cccWxVkc.s page 13
|
||
|
||
|
||
557 01c4 3B69 ldr r3, [r7, #16]
|
||
558 01c6 32F91330 ldrsh r3, [r2, r3, lsl #1]
|
||
559 .loc 1 151 13
|
||
560 01ca 1BB2 sxth r3, r3
|
||
561 01cc DA17 asrs r2, r3, #31
|
||
562 01ce 9A46 mov r10, r3
|
||
563 01d0 9346 mov fp, r2
|
||
564 01d2 0223 movs r3, #2
|
||
565 01d4 0093 str r3, [sp]
|
||
566 01d6 5246 mov r2, r10
|
||
567 01d8 5B46 mov r3, fp
|
||
568 01da B868 ldr r0, [r7, #8]
|
||
569 01dc FFF7FEFF bl ftcan_marshal_unsigned
|
||
570 01e0 B860 str r0, [r7, #8]
|
||
571 .L39:
|
||
572 .LBE4:
|
||
139:Core/Src/AMS_HighLevel.c **** if (module.cellVoltages[i] < MIN_CELL_VOLTAGE) {
|
||
573 .loc 1 139 42 discriminator 2
|
||
574 01e2 3B69 ldr r3, [r7, #16]
|
||
575 01e4 0133 adds r3, r3, #1
|
||
576 01e6 3B61 str r3, [r7, #16]
|
||
577 .L37:
|
||
139:Core/Src/AMS_HighLevel.c **** if (module.cellVoltages[i] < MIN_CELL_VOLTAGE) {
|
||
578 .loc 1 139 24 discriminator 1
|
||
579 01e8 234B ldr r3, .L46+20
|
||
580 01ea 1B78 ldrb r3, [r3] @ zero_extendqisi2
|
||
581 01ec 1A46 mov r2, r3
|
||
582 01ee 3B69 ldr r3, [r7, #16]
|
||
583 01f0 9342 cmp r3, r2
|
||
584 01f2 B0D3 bcc .L40
|
||
585 .LBE2:
|
||
152:Core/Src/AMS_HighLevel.c **** }
|
||
153:Core/Src/AMS_HighLevel.c **** }
|
||
154:Core/Src/AMS_HighLevel.c ****
|
||
155:Core/Src/AMS_HighLevel.c **** if (module.internalDieTemp > 28000) { //TODO: change to correct value
|
||
586 .loc 1 155 13
|
||
587 01f4 1C4B ldr r3, .L46+4
|
||
588 01f6 B3F84E30 ldrh r3, [r3, #78]
|
||
589 .loc 1 155 6
|
||
590 01fa 46F66052 movw r2, #28000
|
||
591 01fe 9342 cmp r3, r2
|
||
592 0200 17D9 bls .L41
|
||
593 .LBB5:
|
||
156:Core/Src/AMS_HighLevel.c **** error_data.data_kind = SEK_INTERNAL_BMS_OVERTEMP;
|
||
594 .loc 1 156 26
|
||
595 0202 184B ldr r3, .L46
|
||
596 0204 0922 movs r2, #9
|
||
597 0206 5A80 strh r2, [r3, #2] @ movhi
|
||
157:Core/Src/AMS_HighLevel.c **** uint8_t* ptr = &error_data.data[0];
|
||
598 .loc 1 157 14
|
||
599 0208 1C4B ldr r3, .L46+24
|
||
600 020a FB60 str r3, [r7, #12]
|
||
158:Core/Src/AMS_HighLevel.c **** ptr = ftcan_marshal_unsigned(ptr, module.internalDieTemp, 2);
|
||
601 .loc 1 158 45
|
||
602 020c 164B ldr r3, .L46+4
|
||
603 020e B3F84E30 ldrh r3, [r3, #78]
|
||
604 .loc 1 158 11
|
||
ARM GAS /tmp/cccWxVkc.s page 14
|
||
|
||
|
||
605 0212 9BB2 uxth r3, r3
|
||
606 0214 0022 movs r2, #0
|
||
607 0216 1C46 mov r4, r3
|
||
608 0218 1546 mov r5, r2
|
||
609 021a 0223 movs r3, #2
|
||
610 021c 0093 str r3, [sp]
|
||
611 021e 2246 mov r2, r4
|
||
612 0220 2B46 mov r3, r5
|
||
613 0222 F868 ldr r0, [r7, #12]
|
||
614 0224 FFF7FEFF bl ftcan_marshal_unsigned
|
||
615 0228 F860 str r0, [r7, #12]
|
||
159:Core/Src/AMS_HighLevel.c ****
|
||
160:Core/Src/AMS_HighLevel.c **** set_error_source(ERROR_SOURCE_INTERNAL);
|
||
616 .loc 1 160 5
|
||
617 022a 2020 movs r0, #32
|
||
618 022c FFF7FEFF bl set_error_source
|
||
619 .LBE5:
|
||
620 0230 02E0 b .L42
|
||
621 .L41:
|
||
161:Core/Src/AMS_HighLevel.c **** } else {
|
||
162:Core/Src/AMS_HighLevel.c **** clear_error_source(ERROR_SOURCE_INTERNAL);
|
||
622 .loc 1 162 5
|
||
623 0232 2020 movs r0, #32
|
||
624 0234 FFF7FEFF bl clear_error_source
|
||
625 .L42:
|
||
163:Core/Src/AMS_HighLevel.c **** }
|
||
164:Core/Src/AMS_HighLevel.c ****
|
||
165:Core/Src/AMS_HighLevel.c **** if (any_voltage_error) {
|
||
626 .loc 1 165 6
|
||
627 0238 7B69 ldr r3, [r7, #20]
|
||
628 023a 002B cmp r3, #0
|
||
629 023c 03D0 beq .L43
|
||
166:Core/Src/AMS_HighLevel.c **** set_error_source(ERROR_SOURCE_VOLTAGES);
|
||
630 .loc 1 166 5
|
||
631 023e 0120 movs r0, #1
|
||
632 0240 FFF7FEFF bl set_error_source
|
||
633 0244 02E0 b .L44
|
||
634 .L43:
|
||
167:Core/Src/AMS_HighLevel.c **** } else {
|
||
168:Core/Src/AMS_HighLevel.c **** clear_error_source(ERROR_SOURCE_VOLTAGES);
|
||
635 .loc 1 168 5
|
||
636 0246 0120 movs r0, #1
|
||
637 0248 FFF7FEFF bl clear_error_source
|
||
638 .L44:
|
||
169:Core/Src/AMS_HighLevel.c **** }
|
||
170:Core/Src/AMS_HighLevel.c ****
|
||
171:Core/Src/AMS_HighLevel.c **** mcuDelay(10);
|
||
639 .loc 1 171 3
|
||
640 024c 0A20 movs r0, #10
|
||
641 024e FFF7FEFF bl mcuDelay
|
||
172:Core/Src/AMS_HighLevel.c ****
|
||
173:Core/Src/AMS_HighLevel.c **** AMS_Balancing_Loop();
|
||
642 .loc 1 173 3
|
||
643 0252 FFF7FEFF bl AMS_Balancing_Loop
|
||
174:Core/Src/AMS_HighLevel.c **** return 0;
|
||
644 .loc 1 174 10
|
||
645 0256 0023 movs r3, #0
|
||
ARM GAS /tmp/cccWxVkc.s page 15
|
||
|
||
|
||
175:Core/Src/AMS_HighLevel.c **** }
|
||
646 .loc 1 175 1
|
||
647 0258 1846 mov r0, r3
|
||
648 025a 1837 adds r7, r7, #24
|
||
649 .cfi_def_cfa_offset 32
|
||
650 025c BD46 mov sp, r7
|
||
651 .cfi_def_cfa_register 13
|
||
652 @ sp needed
|
||
653 025e BDE8B08F pop {r4, r5, r7, r8, r9, r10, fp, pc}
|
||
654 .L47:
|
||
655 0262 00BF .align 2
|
||
656 .L46:
|
||
657 0264 00000000 .word error_data
|
||
658 0268 00000000 .word module
|
||
659 026c 00000000 .word packetChecksumFails
|
||
660 0270 00000000 .word deviceSleeps
|
||
661 0274 05000000 .word error_data+5
|
||
662 0278 00000000 .word numberofCells
|
||
663 027c 04000000 .word error_data+4
|
||
664 .cfi_endproc
|
||
665 .LFE132:
|
||
667 .section .text.AMS_Warning_Loop,"ax",%progbits
|
||
668 .align 1
|
||
669 .global AMS_Warning_Loop
|
||
670 .syntax unified
|
||
671 .thumb
|
||
672 .thumb_func
|
||
674 AMS_Warning_Loop:
|
||
675 .LFB133:
|
||
176:Core/Src/AMS_HighLevel.c ****
|
||
177:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Warning_Loop() { return 0; }
|
||
676 .loc 1 177 28
|
||
677 .cfi_startproc
|
||
678 @ args = 0, pretend = 0, frame = 0
|
||
679 @ frame_needed = 1, uses_anonymous_args = 0
|
||
680 @ link register save eliminated.
|
||
681 0000 80B4 push {r7}
|
||
682 .cfi_def_cfa_offset 4
|
||
683 .cfi_offset 7, -4
|
||
684 0002 00AF add r7, sp, #0
|
||
685 .cfi_def_cfa_register 7
|
||
686 .loc 1 177 37
|
||
687 0004 0023 movs r3, #0
|
||
688 .loc 1 177 40
|
||
689 0006 1846 mov r0, r3
|
||
690 0008 BD46 mov sp, r7
|
||
691 .cfi_def_cfa_register 13
|
||
692 @ sp needed
|
||
693 000a 5DF8047B ldr r7, [sp], #4
|
||
694 .cfi_restore 7
|
||
695 .cfi_def_cfa_offset 0
|
||
696 000e 7047 bx lr
|
||
697 .cfi_endproc
|
||
698 .LFE133:
|
||
700 .section .text.AMS_Error_Loop,"ax",%progbits
|
||
701 .align 1
|
||
702 .global AMS_Error_Loop
|
||
ARM GAS /tmp/cccWxVkc.s page 16
|
||
|
||
|
||
703 .syntax unified
|
||
704 .thumb
|
||
705 .thumb_func
|
||
707 AMS_Error_Loop:
|
||
708 .LFB134:
|
||
178:Core/Src/AMS_HighLevel.c ****
|
||
179:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Error_Loop() { return 0; }
|
||
709 .loc 1 179 26
|
||
710 .cfi_startproc
|
||
711 @ args = 0, pretend = 0, frame = 0
|
||
712 @ frame_needed = 1, uses_anonymous_args = 0
|
||
713 @ link register save eliminated.
|
||
714 0000 80B4 push {r7}
|
||
715 .cfi_def_cfa_offset 4
|
||
716 .cfi_offset 7, -4
|
||
717 0002 00AF add r7, sp, #0
|
||
718 .cfi_def_cfa_register 7
|
||
719 .loc 1 179 35
|
||
720 0004 0023 movs r3, #0
|
||
721 .loc 1 179 38
|
||
722 0006 1846 mov r0, r3
|
||
723 0008 BD46 mov sp, r7
|
||
724 .cfi_def_cfa_register 13
|
||
725 @ sp needed
|
||
726 000a 5DF8047B ldr r7, [sp], #4
|
||
727 .cfi_restore 7
|
||
728 .cfi_def_cfa_offset 0
|
||
729 000e 7047 bx lr
|
||
730 .cfi_endproc
|
||
731 .LFE134:
|
||
733 .section .text.AMS_Charging_Loop,"ax",%progbits
|
||
734 .align 1
|
||
735 .global AMS_Charging_Loop
|
||
736 .syntax unified
|
||
737 .thumb
|
||
738 .thumb_func
|
||
740 AMS_Charging_Loop:
|
||
741 .LFB135:
|
||
180:Core/Src/AMS_HighLevel.c ****
|
||
181:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Charging_Loop() { return 0; }
|
||
742 .loc 1 181 29
|
||
743 .cfi_startproc
|
||
744 @ args = 0, pretend = 0, frame = 0
|
||
745 @ frame_needed = 1, uses_anonymous_args = 0
|
||
746 @ link register save eliminated.
|
||
747 0000 80B4 push {r7}
|
||
748 .cfi_def_cfa_offset 4
|
||
749 .cfi_offset 7, -4
|
||
750 0002 00AF add r7, sp, #0
|
||
751 .cfi_def_cfa_register 7
|
||
752 .loc 1 181 38
|
||
753 0004 0023 movs r3, #0
|
||
754 .loc 1 181 41
|
||
755 0006 1846 mov r0, r3
|
||
756 0008 BD46 mov sp, r7
|
||
757 .cfi_def_cfa_register 13
|
||
758 @ sp needed
|
||
ARM GAS /tmp/cccWxVkc.s page 17
|
||
|
||
|
||
759 000a 5DF8047B ldr r7, [sp], #4
|
||
760 .cfi_restore 7
|
||
761 .cfi_def_cfa_offset 0
|
||
762 000e 7047 bx lr
|
||
763 .cfi_endproc
|
||
764 .LFE135:
|
||
766 .section .text.AMS_Discharging_Loop,"ax",%progbits
|
||
767 .align 1
|
||
768 .global AMS_Discharging_Loop
|
||
769 .syntax unified
|
||
770 .thumb
|
||
771 .thumb_func
|
||
773 AMS_Discharging_Loop:
|
||
774 .LFB136:
|
||
182:Core/Src/AMS_HighLevel.c ****
|
||
183:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Discharging_Loop() { return 0; }
|
||
775 .loc 1 183 32
|
||
776 .cfi_startproc
|
||
777 @ args = 0, pretend = 0, frame = 0
|
||
778 @ frame_needed = 1, uses_anonymous_args = 0
|
||
779 @ link register save eliminated.
|
||
780 0000 80B4 push {r7}
|
||
781 .cfi_def_cfa_offset 4
|
||
782 .cfi_offset 7, -4
|
||
783 0002 00AF add r7, sp, #0
|
||
784 .cfi_def_cfa_register 7
|
||
785 .loc 1 183 41
|
||
786 0004 0023 movs r3, #0
|
||
787 .loc 1 183 44
|
||
788 0006 1846 mov r0, r3
|
||
789 0008 BD46 mov sp, r7
|
||
790 .cfi_def_cfa_register 13
|
||
791 @ sp needed
|
||
792 000a 5DF8047B ldr r7, [sp], #4
|
||
793 .cfi_restore 7
|
||
794 .cfi_def_cfa_offset 0
|
||
795 000e 7047 bx lr
|
||
796 .cfi_endproc
|
||
797 .LFE136:
|
||
799 .section .text.AMS_Balancing_Loop,"ax",%progbits
|
||
800 .align 1
|
||
801 .global AMS_Balancing_Loop
|
||
802 .syntax unified
|
||
803 .thumb
|
||
804 .thumb_func
|
||
806 AMS_Balancing_Loop:
|
||
807 .LFB137:
|
||
184:Core/Src/AMS_HighLevel.c ****
|
||
185:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Balancing_Loop() {
|
||
808 .loc 1 185 30
|
||
809 .cfi_startproc
|
||
810 @ args = 0, pretend = 0, frame = 16
|
||
811 @ frame_needed = 1, uses_anonymous_args = 0
|
||
812 0000 80B5 push {r7, lr}
|
||
813 .cfi_def_cfa_offset 8
|
||
814 .cfi_offset 7, -8
|
||
815 .cfi_offset 14, -4
|
||
ARM GAS /tmp/cccWxVkc.s page 18
|
||
|
||
|
||
816 0002 84B0 sub sp, sp, #16
|
||
817 .cfi_def_cfa_offset 24
|
||
818 0004 00AF add r7, sp, #0
|
||
819 .cfi_def_cfa_register 7
|
||
186:Core/Src/AMS_HighLevel.c **** uint8_t id_cell_lowest_voltage = 0;
|
||
820 .loc 1 186 11
|
||
821 0006 0023 movs r3, #0
|
||
822 0008 FB73 strb r3, [r7, #15]
|
||
187:Core/Src/AMS_HighLevel.c **** uint8_t num_of_cells_to_balance = 0;
|
||
823 .loc 1 187 11
|
||
824 000a 0023 movs r3, #0
|
||
825 000c BB73 strb r3, [r7, #14]
|
||
188:Core/Src/AMS_HighLevel.c **** uint32_t channels = 0;
|
||
826 .loc 1 188 12
|
||
827 000e 0023 movs r3, #0
|
||
828 0010 BB60 str r3, [r7, #8]
|
||
829 .LBB6:
|
||
189:Core/Src/AMS_HighLevel.c **** for (int i = 0; i < 13; i++) {
|
||
830 .loc 1 189 12
|
||
831 0012 0023 movs r3, #0
|
||
832 0014 7B60 str r3, [r7, #4]
|
||
833 .loc 1 189 3
|
||
834 0016 0EE0 b .L57
|
||
835 .L59:
|
||
190:Core/Src/AMS_HighLevel.c **** if (module.cellVoltages[i] < module.cellVoltages[id_cell_lowest_voltage])
|
||
836 .loc 1 190 28
|
||
837 0018 224A ldr r2, .L65
|
||
838 001a 7B68 ldr r3, [r7, #4]
|
||
839 001c 32F91320 ldrsh r2, [r2, r3, lsl #1]
|
||
840 .loc 1 190 53
|
||
841 0020 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
|
||
842 0022 2049 ldr r1, .L65
|
||
843 0024 31F91330 ldrsh r3, [r1, r3, lsl #1]
|
||
844 .loc 1 190 8
|
||
845 0028 9A42 cmp r2, r3
|
||
846 002a 01DA bge .L58
|
||
191:Core/Src/AMS_HighLevel.c **** id_cell_lowest_voltage = i;
|
||
847 .loc 1 191 30
|
||
848 002c 7B68 ldr r3, [r7, #4]
|
||
849 002e FB73 strb r3, [r7, #15]
|
||
850 .L58:
|
||
189:Core/Src/AMS_HighLevel.c **** for (int i = 0; i < 13; i++) {
|
||
851 .loc 1 189 28 discriminator 2
|
||
852 0030 7B68 ldr r3, [r7, #4]
|
||
853 0032 0133 adds r3, r3, #1
|
||
854 0034 7B60 str r3, [r7, #4]
|
||
855 .L57:
|
||
189:Core/Src/AMS_HighLevel.c **** for (int i = 0; i < 13; i++) {
|
||
856 .loc 1 189 21 discriminator 1
|
||
857 0036 7B68 ldr r3, [r7, #4]
|
||
858 0038 0C2B cmp r3, #12
|
||
859 003a EDDD ble .L59
|
||
860 .LBE6:
|
||
861 .LBB7:
|
||
192:Core/Src/AMS_HighLevel.c **** }
|
||
193:Core/Src/AMS_HighLevel.c ****
|
||
194:Core/Src/AMS_HighLevel.c **** for (int i = 0; i < 13; i++) {
|
||
ARM GAS /tmp/cccWxVkc.s page 19
|
||
|
||
|
||
862 .loc 1 194 12
|
||
863 003c 0023 movs r3, #0
|
||
864 003e 3B60 str r3, [r7]
|
||
865 .loc 1 194 3
|
||
866 0040 18E0 b .L60
|
||
867 .L62:
|
||
195:Core/Src/AMS_HighLevel.c **** if (module.cellVoltages[i] - CELL_VOLTAGE_DIFF_BALANCING < module.cellVoltages[id_cell_lowest_v
|
||
868 .loc 1 195 28
|
||
869 0042 184A ldr r2, .L65
|
||
870 0044 3B68 ldr r3, [r7]
|
||
871 0046 32F91330 ldrsh r3, [r2, r3, lsl #1]
|
||
872 .loc 1 195 62
|
||
873 004a 133B subs r3, r3, #19
|
||
874 .loc 1 195 83
|
||
875 004c FA7B ldrb r2, [r7, #15] @ zero_extendqisi2
|
||
876 004e 1549 ldr r1, .L65
|
||
877 0050 31F91220 ldrsh r2, [r1, r2, lsl #1]
|
||
878 .loc 1 195 8
|
||
879 0054 9342 cmp r3, r2
|
||
880 0056 0ADC bgt .L61
|
||
196:Core/Src/AMS_HighLevel.c **** channels |= 1 << i;
|
||
881 .loc 1 196 21
|
||
882 0058 0122 movs r2, #1
|
||
883 005a 3B68 ldr r3, [r7]
|
||
884 005c 02FA03F3 lsl r3, r2, r3
|
||
885 0060 1A46 mov r2, r3
|
||
886 .loc 1 196 16
|
||
887 0062 BB68 ldr r3, [r7, #8]
|
||
888 0064 1343 orrs r3, r3, r2
|
||
889 0066 BB60 str r3, [r7, #8]
|
||
197:Core/Src/AMS_HighLevel.c **** num_of_cells_to_balance++;
|
||
890 .loc 1 197 30
|
||
891 0068 BB7B ldrb r3, [r7, #14] @ zero_extendqisi2
|
||
892 006a 0133 adds r3, r3, #1
|
||
893 006c BB73 strb r3, [r7, #14]
|
||
894 .L61:
|
||
194:Core/Src/AMS_HighLevel.c **** if (module.cellVoltages[i] - CELL_VOLTAGE_DIFF_BALANCING < module.cellVoltages[id_cell_lowest_v
|
||
895 .loc 1 194 28 discriminator 2
|
||
896 006e 3B68 ldr r3, [r7]
|
||
897 0070 0133 adds r3, r3, #1
|
||
898 0072 3B60 str r3, [r7]
|
||
899 .L60:
|
||
194:Core/Src/AMS_HighLevel.c **** if (module.cellVoltages[i] - CELL_VOLTAGE_DIFF_BALANCING < module.cellVoltages[id_cell_lowest_v
|
||
900 .loc 1 194 21 discriminator 1
|
||
901 0074 3B68 ldr r3, [r7]
|
||
902 0076 0C2B cmp r3, #12
|
||
903 0078 E3DD ble .L62
|
||
904 .LBE7:
|
||
198:Core/Src/AMS_HighLevel.c **** }
|
||
199:Core/Src/AMS_HighLevel.c **** }
|
||
200:Core/Src/AMS_HighLevel.c ****
|
||
201:Core/Src/AMS_HighLevel.c **** if (num_of_cells_to_balance == 0){
|
||
905 .loc 1 201 6
|
||
906 007a BB7B ldrb r3, [r7, #14] @ zero_extendqisi2
|
||
907 007c 002B cmp r3, #0
|
||
908 007e 04D1 bne .L63
|
||
202:Core/Src/AMS_HighLevel.c **** balancingActive = 0;
|
||
ARM GAS /tmp/cccWxVkc.s page 20
|
||
|
||
|
||
909 .loc 1 202 21
|
||
910 0080 094B ldr r3, .L65+4
|
||
911 0082 0022 movs r2, #0
|
||
912 0084 1A70 strb r2, [r3]
|
||
203:Core/Src/AMS_HighLevel.c **** return 0;
|
||
913 .loc 1 203 12
|
||
914 0086 0023 movs r3, #0
|
||
915 0088 07E0 b .L64
|
||
916 .L63:
|
||
204:Core/Src/AMS_HighLevel.c **** }
|
||
205:Core/Src/AMS_HighLevel.c ****
|
||
206:Core/Src/AMS_HighLevel.c **** amsConfigBalancing(channels, 0xF);
|
||
917 .loc 1 206 3
|
||
918 008a 0F21 movs r1, #15
|
||
919 008c B868 ldr r0, [r7, #8]
|
||
920 008e FFF7FEFF bl amsConfigBalancing
|
||
207:Core/Src/AMS_HighLevel.c **** balancingActive = 1;
|
||
921 .loc 1 207 19
|
||
922 0092 054B ldr r3, .L65+4
|
||
923 0094 0122 movs r2, #1
|
||
924 0096 1A70 strb r2, [r3]
|
||
208:Core/Src/AMS_HighLevel.c **** return 0;
|
||
925 .loc 1 208 10
|
||
926 0098 0023 movs r3, #0
|
||
927 .L64:
|
||
209:Core/Src/AMS_HighLevel.c **** }
|
||
928 .loc 1 209 1
|
||
929 009a 1846 mov r0, r3
|
||
930 009c 1037 adds r7, r7, #16
|
||
931 .cfi_def_cfa_offset 8
|
||
932 009e BD46 mov sp, r7
|
||
933 .cfi_def_cfa_register 13
|
||
934 @ sp needed
|
||
935 00a0 80BD pop {r7, pc}
|
||
936 .L66:
|
||
937 00a2 00BF .align 2
|
||
938 .L65:
|
||
939 00a4 00000000 .word module
|
||
940 00a8 00000000 .word balancingActive
|
||
941 .cfi_endproc
|
||
942 .LFE137:
|
||
944 .text
|
||
945 .Letext0:
|
||
946 .file 2 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl
|
||
947 .file 3 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl
|
||
948 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
|
||
949 .file 5 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/lib/gcc/arm-none-e
|
||
950 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
|
||
951 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
|
||
952 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
|
||
953 .file 9 "Core/Inc/ADBMS_LL_Driver.h"
|
||
954 .file 10 "Core/Inc/ADBMS_Abstraction.h"
|
||
955 .file 11 "Core/Inc/errors.h"
|
||
956 .file 12 "Core/Inc/AMS_HighLevel.h"
|
||
957 .file 13 "Core/Lib/can-halal/can-halal.h"
|
||
958 .file 14 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
|
||
ARM GAS /tmp/cccWxVkc.s page 21
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:00000000 AMS_HighLevel.c
|
||
/tmp/cccWxVkc.s:25 .bss.module:00000000 module
|
||
/tmp/cccWxVkc.s:22 .bss.module:00000000 $d
|
||
/tmp/cccWxVkc.s:32 .bss.balancedCells:00000000 balancedCells
|
||
/tmp/cccWxVkc.s:29 .bss.balancedCells:00000000 $d
|
||
/tmp/cccWxVkc.s:38 .bss.balancingActive:00000000 balancingActive
|
||
/tmp/cccWxVkc.s:39 .bss.balancingActive:00000000 $d
|
||
/tmp/cccWxVkc.s:45 .bss.amsuv:00000000 amsuv
|
||
/tmp/cccWxVkc.s:42 .bss.amsuv:00000000 $d
|
||
/tmp/cccWxVkc.s:52 .bss.amsov:00000000 amsov
|
||
/tmp/cccWxVkc.s:49 .bss.amsov:00000000 $d
|
||
/tmp/cccWxVkc.s:58 .data.numberofCells:00000000 numberofCells
|
||
/tmp/cccWxVkc.s:64 .bss.numberofAux:00000000 numberofAux
|
||
/tmp/cccWxVkc.s:65 .bss.numberofAux:00000000 $d
|
||
/tmp/cccWxVkc.s:70 .bss.packetChecksumFails:00000000 packetChecksumFails
|
||
/tmp/cccWxVkc.s:71 .bss.packetChecksumFails:00000000 $d
|
||
/tmp/cccWxVkc.s:76 .bss.deviceSleeps:00000000 deviceSleeps
|
||
/tmp/cccWxVkc.s:77 .bss.deviceSleeps:00000000 $d
|
||
/tmp/cccWxVkc.s:82 .bss.currentAMSState:00000000 currentAMSState
|
||
/tmp/cccWxVkc.s:83 .bss.currentAMSState:00000000 $d
|
||
/tmp/cccWxVkc.s:88 .bss.lastAMSState:00000000 lastAMSState
|
||
/tmp/cccWxVkc.s:89 .bss.lastAMSState:00000000 $d
|
||
/tmp/cccWxVkc.s:95 .bss.pollingTimes:00000000 pollingTimes
|
||
/tmp/cccWxVkc.s:92 .bss.pollingTimes:00000000 $d
|
||
/tmp/cccWxVkc.s:98 .text.AMS_Init:00000000 $t
|
||
/tmp/cccWxVkc.s:104 .text.AMS_Init:00000000 AMS_Init
|
||
/tmp/cccWxVkc.s:162 .text.AMS_Init:0000004c $d
|
||
/tmp/cccWxVkc.s:172 .text.AMS_Loop:00000000 $t
|
||
/tmp/cccWxVkc.s:178 .text.AMS_Loop:00000000 AMS_Loop
|
||
/tmp/cccWxVkc.s:207 .text.AMS_Loop:00000020 $d
|
||
/tmp/cccWxVkc.s:214 .text.AMS_Loop:0000003c $t
|
||
/tmp/cccWxVkc.s:231 .text.AMS_Loop:00000054 $d
|
||
/tmp/cccWxVkc.s:238 .text.AMS_Loop:00000070 $t
|
||
/tmp/cccWxVkc.s:282 .text.AMS_Idle_Loop:00000000 AMS_Idle_Loop
|
||
/tmp/cccWxVkc.s:674 .text.AMS_Warning_Loop:00000000 AMS_Warning_Loop
|
||
/tmp/cccWxVkc.s:270 .text.AMS_Loop:00000090 $d
|
||
/tmp/cccWxVkc.s:276 .text.AMS_Idle_Loop:00000000 $t
|
||
/tmp/cccWxVkc.s:806 .text.AMS_Balancing_Loop:00000000 AMS_Balancing_Loop
|
||
/tmp/cccWxVkc.s:657 .text.AMS_Idle_Loop:00000264 $d
|
||
/tmp/cccWxVkc.s:668 .text.AMS_Warning_Loop:00000000 $t
|
||
/tmp/cccWxVkc.s:701 .text.AMS_Error_Loop:00000000 $t
|
||
/tmp/cccWxVkc.s:707 .text.AMS_Error_Loop:00000000 AMS_Error_Loop
|
||
/tmp/cccWxVkc.s:734 .text.AMS_Charging_Loop:00000000 $t
|
||
/tmp/cccWxVkc.s:740 .text.AMS_Charging_Loop:00000000 AMS_Charging_Loop
|
||
/tmp/cccWxVkc.s:767 .text.AMS_Discharging_Loop:00000000 $t
|
||
/tmp/cccWxVkc.s:773 .text.AMS_Discharging_Loop:00000000 AMS_Discharging_Loop
|
||
/tmp/cccWxVkc.s:800 .text.AMS_Balancing_Loop:00000000 $t
|
||
/tmp/cccWxVkc.s:939 .text.AMS_Balancing_Loop:000000a4 $d
|
||
|
||
UNDEFINED SYMBOLS
|
||
initAMS
|
||
HAL_GetTick
|
||
amsWakeUp
|
||
set_error_source
|
||
amsAuxAndStatusMeasurement
|
||
amsReset
|
||
ARM GAS /tmp/cccWxVkc.s page 22
|
||
|
||
|
||
amsCellMeasurement
|
||
amsCheckUnderOverVoltage
|
||
ftcan_marshal_unsigned
|
||
clear_error_source
|
||
mcuDelay
|
||
error_data
|
||
amsConfigBalancing
|