ARM GAS /tmp/ccMLQ7U7.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 6
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_flash_ex.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c"
20 .section .text.HAL_FLASHEx_Erase,"ax",%progbits
21 .align 1
22 .global HAL_FLASHEx_Erase
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_FLASHEx_Erase:
28 .LFB130:
1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ******************************************************************************
3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @file stm32f3xx_hal_flash_ex.c
4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @author MCD Application Team
5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Extended FLASH HAL module driver.
6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This file provides firmware functions to manage the following
8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * functionalities of the FLASH peripheral:
9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended Initialization/de-initialization functions
10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended I/O operation functions
11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended Peripheral Control functions
12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim
14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ==============================================================================
15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### Flash peripheral extended features #####
16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ==============================================================================
17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### How to use this driver #####
19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ==============================================================================
20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] This driver provides functions to configure and program the FLASH memory
21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** of all STM32F3xxx devices. It includes
22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Set/Reset the write protection
24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Program the user Option Bytes
25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Get the Read protection Level
26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim
28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ******************************************************************************
29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @attention
30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
ARM GAS /tmp/ccMLQ7U7.s page 2
31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Copyright (c) 2016 STMicroelectronics.
32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * All rights reserved.
33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in
35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * the root directory of this software component.
36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ******************************************************************************
38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Includes ------------------------------------------------------------------*/
41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #include "stm32f3xx_hal.h"
42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver
44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #ifdef HAL_FLASH_MODULE_ENABLED
47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH
49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Variables
52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Variables used for Erase pages under interruption*/
55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** extern FLASH_ProcessTypeDef pFlash;
56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx FLASHEx
65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief FLASH HAL Extension module driver
66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private typedef -----------------------------------------------------------*/
70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private define ------------------------------------------------------------*/
71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants
72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_IWDGSW_BIT (uint32_t)POSITION_VAL(FLASH_OBR_IWDG_SW)
75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA0_BIT (uint32_t)POSITION_VAL(FLASH_OBR_DATA0)
76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA1_BIT (uint32_t)POSITION_VAL(FLASH_OBR_DATA1)
77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private macro -------------------------------------------------------------*/
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros
83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
ARM GAS /tmp/ccMLQ7U7.s page 3
88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private variables ---------------------------------------------------------*/
90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/
91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase operations */
95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static void FLASH_MassErase(void);
96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress);
97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Option bytes control */
99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage);
100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage);
101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel);
102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig);
103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void);
105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void);
106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void);
107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Exported functions ---------------------------------------------------------*/
113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions
118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief FLASH Memory Erasing functions
119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim
121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ==============================================================================
122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### FLASH Erasing Programming functions #####
123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ==============================================================================
124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] The FLASH Memory Erasing functions, includes the following functions:
126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase: return only when erase has been done
127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase_IT: end of erase is done when HAL_FLASH_EndOfOperationCallback
128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** is called with parameter 0xFFFFFFFF
129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] Any operation of erase should follow these steps:
131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Unlock() function to enable the flash control register and
132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** program memory access.
133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the desired function to erase page.
134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Lock() to disable the flash program memory access
135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (recommended to protect the FLASH memory against possible unwanted operation).
136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim
138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages
144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function
ARM GAS /tmp/ccMLQ7U7.s page 4
145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * must be called before.
146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access
147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation)
148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the erasing.
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param[out] PageError pointer to variable that
152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information on faulty page in case of error
153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (0xFFFFFFFF means that all the pages have been correctly erased)
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status
156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
29 .loc 1 158 1
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 16
32 @ frame_needed = 1, uses_anonymous_args = 0
33 0000 80B5 push {r7, lr}
34 .cfi_def_cfa_offset 8
35 .cfi_offset 7, -8
36 .cfi_offset 14, -4
37 0002 84B0 sub sp, sp, #16
38 .cfi_def_cfa_offset 24
39 0004 00AF add r7, sp, #0
40 .cfi_def_cfa_register 7
41 0006 7860 str r0, [r7, #4]
42 0008 3960 str r1, [r7]
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR;
43 .loc 1 159 21
44 000a 0123 movs r3, #1
45 000c FB73 strb r3, [r7, #15]
160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U;
46 .loc 1 160 12
47 000e 0023 movs r3, #0
48 0010 BB60 str r3, [r7, #8]
161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */
163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash);
49 .loc 1 163 3
50 0012 2E4B ldr r3, .L9
51 0014 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2
52 0016 012B cmp r3, #1
53 0018 01D1 bne .L2
54 .loc 1 163 3 is_stmt 0 discriminator 1
55 001a 0223 movs r3, #2
56 .loc 1 163 3
57 001c 52E0 b .L3
58 .L2:
59 .loc 1 163 3 discriminator 2
60 001e 2B4B ldr r3, .L9
61 0020 0122 movs r2, #1
62 0022 1A76 strb r2, [r3, #24]
164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
ARM GAS /tmp/ccMLQ7U7.s page 5
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
63 .loc 1 168 17 is_stmt 1
64 0024 7B68 ldr r3, [r7, #4]
65 0026 1B68 ldr r3, [r3]
66 .loc 1 168 6
67 0028 012B cmp r3, #1
68 002a 15D1 bne .L4
169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Mass Erase requested for Bank1 */
171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
69 .loc 1 172 11
70 002c 4CF25030 movw r0, #50000
71 0030 FFF7FEFF bl FLASH_WaitForLastOperation
72 0034 0346 mov r3, r0
73 .loc 1 172 10 discriminator 1
74 0036 002B cmp r3, #0
75 0038 40D1 bne .L5
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Mass erase to be done*/
175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase();
76 .loc 1 175 9
77 003a FFF7FEFF bl FLASH_MassErase
176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
78 .loc 1 178 18
79 003e 4CF25030 movw r0, #50000
80 0042 FFF7FEFF bl FLASH_WaitForLastOperation
81 0046 0346 mov r3, r0
82 0048 FB73 strb r3, [r7, #15]
179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the MER Bit */
181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
83 .loc 1 181 9
84 004a 214B ldr r3, .L9+4
85 004c 1B69 ldr r3, [r3, #16]
86 004e 204A ldr r2, .L9+4
87 0050 23F00403 bic r3, r3, #4
88 0054 1361 str r3, [r2, #16]
89 0056 31E0 b .L5
90 .L4:
182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else
185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Page Erase is requested */
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Page Erase requested on address located on bank1 */
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
91 .loc 1 193 11
92 0058 4CF25030 movw r0, #50000
93 005c FFF7FEFF bl FLASH_WaitForLastOperation
ARM GAS /tmp/ccMLQ7U7.s page 6
94 0060 0346 mov r3, r0
95 .loc 1 193 10 discriminator 1
96 0062 002B cmp r3, #0
97 0064 2AD1 bne .L5
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Initialization of PageError variable*/
196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *PageError = 0xFFFFFFFFU;
98 .loc 1 196 20
99 0066 3B68 ldr r3, [r7]
100 0068 4FF0FF32 mov r2, #-1
101 006c 1A60 str r2, [r3]
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase page by page to be done*/
199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** for(address = pEraseInit->PageAddress;
102 .loc 1 199 21
103 006e 7B68 ldr r3, [r7, #4]
104 0070 5B68 ldr r3, [r3, #4]
105 0072 BB60 str r3, [r7, #8]
106 .loc 1 199 9
107 0074 19E0 b .L6
108 .L8:
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE)
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_PageErase(address);
109 .loc 1 203 11
110 0076 B868 ldr r0, [r7, #8]
111 0078 FFF7FEFF bl FLASH_PageErase
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
112 .loc 1 206 20
113 007c 4CF25030 movw r0, #50000
114 0080 FFF7FEFF bl FLASH_WaitForLastOperation
115 0084 0346 mov r3, r0
116 0086 FB73 strb r3, [r7, #15]
207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the PER Bit */
209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
117 .loc 1 209 11
118 0088 114B ldr r3, .L9+4
119 008a 1B69 ldr r3, [r3, #16]
120 008c 104A ldr r2, .L9+4
121 008e 23F00203 bic r3, r3, #2
122 0092 1361 str r3, [r2, #16]
210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK)
123 .loc 1 211 14
124 0094 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
125 0096 002B cmp r3, #0
126 0098 03D0 beq .L7
212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* In case of error, stop erase procedure and return the faulty address */
214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *PageError = address;
127 .loc 1 214 24
128 009a 3B68 ldr r3, [r7]
129 009c BA68 ldr r2, [r7, #8]
ARM GAS /tmp/ccMLQ7U7.s page 7
130 009e 1A60 str r2, [r3]
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** break;
131 .loc 1 215 13
132 00a0 0CE0 b .L5
133 .L7:
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
134 .loc 1 201 21
135 00a2 BB68 ldr r3, [r7, #8]
136 00a4 03F50063 add r3, r3, #2048
137 00a8 BB60 str r3, [r7, #8]
138 .L6:
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE)
139 .loc 1 200 35
140 00aa 7B68 ldr r3, [r7, #4]
141 00ac 9B68 ldr r3, [r3, #8]
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE)
142 .loc 1 200 45
143 00ae DA02 lsls r2, r3, #11
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE)
144 .loc 1 200 76
145 00b0 7B68 ldr r3, [r7, #4]
146 00b2 5B68 ldr r3, [r3, #4]
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE)
147 .loc 1 200 64
148 00b4 1344 add r3, r3, r2
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE)
149 .loc 1 200 21
150 00b6 BA68 ldr r2, [r7, #8]
151 00b8 9A42 cmp r2, r3
152 00ba DCD3 bcc .L8
153 .L5:
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash);
154 .loc 1 222 3
155 00bc 034B ldr r3, .L9
156 00be 0022 movs r2, #0
157 00c0 1A76 strb r2, [r3, #24]
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
158 .loc 1 224 10
159 00c2 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
160 .L3:
225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
161 .loc 1 225 1
162 00c4 1846 mov r0, r3
163 00c6 1037 adds r7, r7, #16
164 .cfi_def_cfa_offset 8
165 00c8 BD46 mov sp, r7
166 .cfi_def_cfa_register 13
167 @ sp needed
168 00ca 80BD pop {r7, pc}
169 .L10:
ARM GAS /tmp/ccMLQ7U7.s page 8
170 .align 2
171 .L9:
172 00cc 00000000 .word pFlash
173 00d0 00200240 .word 1073881088
174 .cfi_endproc
175 .LFE130:
177 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits
178 .align 1
179 .global HAL_FLASHEx_Erase_IT
180 .syntax unified
181 .thumb
182 .thumb_func
184 HAL_FLASHEx_Erase_IT:
185 .LFB131:
226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled
229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function
230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * must be called before.
231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access
232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation)
233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the erasing.
235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status
237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
186 .loc 1 239 1
187 .cfi_startproc
188 @ args = 0, pretend = 0, frame = 16
189 @ frame_needed = 1, uses_anonymous_args = 0
190 0000 80B5 push {r7, lr}
191 .cfi_def_cfa_offset 8
192 .cfi_offset 7, -8
193 .cfi_offset 14, -4
194 0002 84B0 sub sp, sp, #16
195 .cfi_def_cfa_offset 24
196 0004 00AF add r7, sp, #0
197 .cfi_def_cfa_register 7
198 0006 7860 str r0, [r7, #4]
240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK;
199 .loc 1 240 21
200 0008 0023 movs r3, #0
201 000a FB73 strb r3, [r7, #15]
241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */
243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash);
202 .loc 1 243 3
203 000c 1A4B ldr r3, .L17
204 000e 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2
205 0010 012B cmp r3, #1
206 0012 01D1 bne .L12
207 .loc 1 243 3 is_stmt 0 discriminator 1
208 0014 0223 movs r3, #2
209 .loc 1 243 3
210 0016 2AE0 b .L13
ARM GAS /tmp/ccMLQ7U7.s page 9
211 .L12:
212 .loc 1 243 3 discriminator 2
213 0018 174B ldr r3, .L17
214 001a 0122 movs r2, #1
215 001c 1A76 strb r2, [r3, #24]
244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If procedure already ongoing, reject the next one */
246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
216 .loc 1 246 13 is_stmt 1
217 001e 164B ldr r3, .L17
218 0020 1B78 ldrb r3, [r3]
219 0022 DBB2 uxtb r3, r3
220 .loc 1 246 6
221 0024 002B cmp r3, #0
222 0026 01D0 beq .L14
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return HAL_ERROR;
223 .loc 1 248 12
224 0028 0123 movs r3, #1
225 002a 20E0 b .L13
226 .L14:
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable End of FLASH Operation and Error source interrupts */
255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
227 .loc 1 255 3
228 002c 134B ldr r3, .L17+4
229 002e 1B69 ldr r3, [r3, #16]
230 0030 124A ldr r2, .L17+4
231 0032 43F4A053 orr r3, r3, #5120
232 0036 1361 str r3, [r2, #16]
256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
233 .loc 1 257 17
234 0038 7B68 ldr r3, [r7, #4]
235 003a 1B68 ldr r3, [r3]
236 .loc 1 257 6
237 003c 012B cmp r3, #1
238 003e 05D1 bne .L15
258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Mass erase to be done*/
260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
239 .loc 1 260 29
240 0040 0D4B ldr r3, .L17
241 0042 0222 movs r2, #2
242 0044 1A70 strb r2, [r3]
261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase();
243 .loc 1 261 9
244 0046 FFF7FEFF bl FLASH_MassErase
245 004a 0FE0 b .L16
246 .L15:
262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else
264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
ARM GAS /tmp/ccMLQ7U7.s page 10
265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase by page to be done*/
266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE;
247 .loc 1 271 29
248 004c 0A4B ldr r3, .L17
249 004e 0122 movs r2, #1
250 0050 1A70 strb r2, [r3]
272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages;
251 .loc 1 272 38
252 0052 7B68 ldr r3, [r7, #4]
253 0054 9B68 ldr r3, [r3, #8]
254 .loc 1 272 26
255 0056 084A ldr r2, .L17
256 0058 5360 str r3, [r2, #4]
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress;
257 .loc 1 273 32
258 005a 7B68 ldr r3, [r7, #4]
259 005c 5B68 ldr r3, [r3, #4]
260 .loc 1 273 20
261 005e 064A ldr r2, .L17
262 0060 9360 str r3, [r2, #8]
274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Erase 1st page and wait for IT*/
276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_PageErase(pEraseInit->PageAddress);
263 .loc 1 276 5
264 0062 7B68 ldr r3, [r7, #4]
265 0064 5B68 ldr r3, [r3, #4]
266 0066 1846 mov r0, r3
267 0068 FFF7FEFF bl FLASH_PageErase
268 .L16:
277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
269 .loc 1 279 10
270 006c FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
271 .L13:
280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
272 .loc 1 280 1
273 006e 1846 mov r0, r3
274 0070 1037 adds r7, r7, #16
275 .cfi_def_cfa_offset 8
276 0072 BD46 mov sp, r7
277 .cfi_def_cfa_register 13
278 @ sp needed
279 0074 80BD pop {r7, pc}
280 .L18:
281 0076 00BF .align 2
282 .L17:
283 0078 00000000 .word pFlash
284 007c 00200240 .word 1073881088
285 .cfi_endproc
286 .LFE131:
288 .section .text.HAL_FLASHEx_OBErase,"ax",%progbits
ARM GAS /tmp/ccMLQ7U7.s page 11
289 .align 1
290 .global HAL_FLASHEx_OBErase
291 .syntax unified
292 .thumb
293 .thumb_func
295 HAL_FLASHEx_OBErase:
296 .LFB132:
281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions
287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Option Bytes Programming functions
288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim
290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ==============================================================================
291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### Option Bytes Programming functions #####
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ==============================================================================
293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..]
294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** This subsection provides a set of functions allowing to control the FLASH
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** option bytes operations.
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim
298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Erases the FLASH option bytes.
303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note This functions erases all option bytes except the Read protection (RDP).
304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf
305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b
306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t
307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur)
308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status
309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBErase(void)
312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
297 .loc 1 312 1
298 .cfi_startproc
299 @ args = 0, pretend = 0, frame = 8
300 @ frame_needed = 1, uses_anonymous_args = 0
301 0000 80B5 push {r7, lr}
302 .cfi_def_cfa_offset 8
303 .cfi_offset 7, -8
304 .cfi_offset 14, -4
305 0002 82B0 sub sp, sp, #8
306 .cfi_def_cfa_offset 16
307 0004 00AF add r7, sp, #0
308 .cfi_def_cfa_register 7
313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0;
309 .loc 1 313 11
310 0006 AA23 movs r3, #170
311 0008 BB71 strb r3, [r7, #6]
314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR;
312 .loc 1 314 21
ARM GAS /tmp/ccMLQ7U7.s page 12
313 000a 0123 movs r3, #1
314 000c FB71 strb r3, [r7, #7]
315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get the actual read protection Option Byte value */
317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** rdptmp = FLASH_OB_GetRDP();
315 .loc 1 317 12
316 000e FFF7FEFF bl FLASH_OB_GetRDP
317 0012 0346 mov r3, r0
318 .loc 1 317 10 discriminator 1
319 0014 BB71 strb r3, [r7, #6]
318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
320 .loc 1 320 12
321 0016 4CF25030 movw r0, #50000
322 001a FFF7FEFF bl FLASH_WaitForLastOperation
323 001e 0346 mov r3, r0
324 0020 FB71 strb r3, [r7, #7]
321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK)
325 .loc 1 322 5
326 0022 FB79 ldrb r3, [r7, #7] @ zero_extendqisi2
327 0024 002B cmp r3, #0
328 0026 23D1 bne .L20
323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */
325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
329 .loc 1 325 22
330 0028 144B ldr r3, .L22
331 002a 0022 movs r2, #0
332 002c DA61 str r2, [r3, #28]
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */
328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER);
333 .loc 1 328 5
334 002e 144B ldr r3, .L22+4
335 0030 1B69 ldr r3, [r3, #16]
336 0032 134A ldr r2, .L22+4
337 0034 43F02003 orr r3, r3, #32
338 0038 1361 str r3, [r2, #16]
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT);
339 .loc 1 329 5
340 003a 114B ldr r3, .L22+4
341 003c 1B69 ldr r3, [r3, #16]
342 003e 104A ldr r2, .L22+4
343 0040 43F04003 orr r3, r3, #64
344 0044 1361 str r3, [r2, #16]
330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
345 .loc 1 332 14
346 0046 4CF25030 movw r0, #50000
347 004a FFF7FEFF bl FLASH_WaitForLastOperation
348 004e 0346 mov r3, r0
349 0050 FB71 strb r3, [r7, #7]
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */
ARM GAS /tmp/ccMLQ7U7.s page 13
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER);
350 .loc 1 335 5
351 0052 0B4B ldr r3, .L22+4
352 0054 1B69 ldr r3, [r3, #16]
353 0056 0A4A ldr r2, .L22+4
354 0058 23F02003 bic r3, r3, #32
355 005c 1361 str r3, [r2, #16]
336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK)
356 .loc 1 337 7
357 005e FB79 ldrb r3, [r7, #7] @ zero_extendqisi2
358 0060 002B cmp r3, #0
359 0062 05D1 bne .L20
338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Restore the last read protection Option Byte value */
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(rdptmp);
360 .loc 1 340 16
361 0064 BB79 ldrb r3, [r7, #6] @ zero_extendqisi2
362 0066 1846 mov r0, r3
363 0068 FFF7FEFF bl FLASH_OB_RDP_LevelConfig
364 006c 0346 mov r3, r0
365 006e FB71 strb r3, [r7, #7]
366 .L20:
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the erase status */
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
367 .loc 1 345 10
368 0070 FB79 ldrb r3, [r7, #7] @ zero_extendqisi2
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
369 .loc 1 346 1
370 0072 1846 mov r0, r3
371 0074 0837 adds r7, r7, #8
372 .cfi_def_cfa_offset 8
373 0076 BD46 mov sp, r7
374 .cfi_def_cfa_register 13
375 @ sp needed
376 0078 80BD pop {r7, pc}
377 .L23:
378 007a 00BF .align 2
379 .L22:
380 007c 00000000 .word pFlash
381 0080 00200240 .word 1073881088
382 .cfi_endproc
383 .LFE132:
385 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits
386 .align 1
387 .global HAL_FLASHEx_OBProgram
388 .syntax unified
389 .thumb
390 .thumb_func
392 HAL_FLASHEx_OBProgram:
393 .LFB133:
347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Program option bytes
ARM GAS /tmp/ccMLQ7U7.s page 14
350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf
351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b
352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t
353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur)
354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that
356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the programming.
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status
359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
394 .loc 1 361 1
395 .cfi_startproc
396 @ args = 0, pretend = 0, frame = 16
397 @ frame_needed = 1, uses_anonymous_args = 0
398 0000 80B5 push {r7, lr}
399 .cfi_def_cfa_offset 8
400 .cfi_offset 7, -8
401 .cfi_offset 14, -4
402 0002 84B0 sub sp, sp, #16
403 .cfi_def_cfa_offset 24
404 0004 00AF add r7, sp, #0
405 .cfi_def_cfa_register 7
406 0006 7860 str r0, [r7, #4]
362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR;
407 .loc 1 362 21
408 0008 0123 movs r3, #1
409 000a FB73 strb r3, [r7, #15]
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash);
410 .loc 1 365 3
411 000c 394B ldr r3, .L33
412 000e 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2
413 0010 012B cmp r3, #1
414 0012 01D1 bne .L25
415 .loc 1 365 3 is_stmt 0 discriminator 1
416 0014 0223 movs r3, #2
417 .loc 1 365 3
418 0016 69E0 b .L26
419 .L25:
420 .loc 1 365 3 discriminator 2
421 0018 364B ldr r3, .L33
422 001a 0122 movs r2, #1
423 001c 1A76 strb r2, [r3, #24]
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Write protection configuration */
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
424 .loc 1 371 14 is_stmt 1
425 001e 7B68 ldr r3, [r7, #4]
426 0020 1B68 ldr r3, [r3]
427 .loc 1 371 27
428 0022 03F00103 and r3, r3, #1
ARM GAS /tmp/ccMLQ7U7.s page 15
429 .loc 1 371 5
430 0026 002B cmp r3, #0
431 0028 1AD0 beq .L27
372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_WRPSTATE(pOBInit->WRPState));
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
432 .loc 1 374 16
433 002a 7B68 ldr r3, [r7, #4]
434 002c 5B68 ldr r3, [r3, #4]
435 .loc 1 374 8
436 002e 012B cmp r3, #1
437 0030 07D1 bne .L28
375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable of Write protection on the selected page */
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_EnableWRP(pOBInit->WRPPage);
438 .loc 1 377 16
439 0032 7B68 ldr r3, [r7, #4]
440 0034 9B68 ldr r3, [r3, #8]
441 0036 1846 mov r0, r3
442 0038 FFF7FEFF bl FLASH_OB_EnableWRP
443 003c 0346 mov r3, r0
444 003e FB73 strb r3, [r7, #15]
445 0040 06E0 b .L29
446 .L28:
378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else
380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Disable of Write protection on the selected page */
382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_DisableWRP(pOBInit->WRPPage);
447 .loc 1 382 16
448 0042 7B68 ldr r3, [r7, #4]
449 0044 9B68 ldr r3, [r3, #8]
450 0046 1846 mov r0, r3
451 0048 FFF7FEFF bl FLASH_OB_DisableWRP
452 004c 0346 mov r3, r0
453 004e FB73 strb r3, [r7, #15]
454 .L29:
383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK)
455 .loc 1 384 8
456 0050 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
457 0052 002B cmp r3, #0
458 0054 04D0 beq .L27
385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */
387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash);
459 .loc 1 387 7
460 0056 274B ldr r3, .L33
461 0058 0022 movs r2, #0
462 005a 1A76 strb r2, [r3, #24]
388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
463 .loc 1 388 14
464 005c FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
465 005e 45E0 b .L26
466 .L27:
389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
ARM GAS /tmp/ccMLQ7U7.s page 16
391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Read protection configuration */
393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
467 .loc 1 393 14
468 0060 7B68 ldr r3, [r7, #4]
469 0062 1B68 ldr r3, [r3]
470 .loc 1 393 27
471 0064 03F00203 and r3, r3, #2
472 .loc 1 393 5
473 0068 002B cmp r3, #0
474 006a 0ED0 beq .L30
394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
475 .loc 1 395 14
476 006c 7B68 ldr r3, [r7, #4]
477 006e 1B7B ldrb r3, [r3, #12] @ zero_extendqisi2
478 0070 1846 mov r0, r3
479 0072 FFF7FEFF bl FLASH_OB_RDP_LevelConfig
480 0076 0346 mov r3, r0
481 0078 FB73 strb r3, [r7, #15]
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK)
482 .loc 1 396 8
483 007a FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
484 007c 002B cmp r3, #0
485 007e 04D0 beq .L30
397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash);
486 .loc 1 399 7
487 0080 1C4B ldr r3, .L33
488 0082 0022 movs r2, #0
489 0084 1A76 strb r2, [r3, #24]
400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
490 .loc 1 400 14
491 0086 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
492 0088 30E0 b .L26
493 .L30:
401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* USER configuration */
405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
494 .loc 1 405 14
495 008a 7B68 ldr r3, [r7, #4]
496 008c 1B68 ldr r3, [r3]
497 .loc 1 405 27
498 008e 03F00403 and r3, r3, #4
499 .loc 1 405 5
500 0092 002B cmp r3, #0
501 0094 0ED0 beq .L31
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig);
502 .loc 1 407 14
503 0096 7B68 ldr r3, [r7, #4]
504 0098 5B7B ldrb r3, [r3, #13] @ zero_extendqisi2
505 009a 1846 mov r0, r3
506 009c FFF7FEFF bl FLASH_OB_UserConfig
ARM GAS /tmp/ccMLQ7U7.s page 17
507 00a0 0346 mov r3, r0
508 00a2 FB73 strb r3, [r7, #15]
408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK)
509 .loc 1 408 8
510 00a4 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
511 00a6 002B cmp r3, #0
512 00a8 04D0 beq .L31
409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */
411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash);
513 .loc 1 411 7
514 00aa 124B ldr r3, .L33
515 00ac 0022 movs r2, #0
516 00ae 1A76 strb r2, [r3, #24]
412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
517 .loc 1 412 14
518 00b0 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
519 00b2 1BE0 b .L26
520 .L31:
413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* DATA configuration*/
417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA)
521 .loc 1 417 14
522 00b4 7B68 ldr r3, [r7, #4]
523 00b6 1B68 ldr r3, [r3]
524 .loc 1 417 27
525 00b8 03F00803 and r3, r3, #8
526 .loc 1 417 5
527 00bc 002B cmp r3, #0
528 00be 11D0 beq .L32
418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData);
529 .loc 1 419 14
530 00c0 7B68 ldr r3, [r7, #4]
531 00c2 1A69 ldr r2, [r3, #16]
532 00c4 7B68 ldr r3, [r7, #4]
533 00c6 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2
534 00c8 1946 mov r1, r3
535 00ca 1046 mov r0, r2
536 00cc FFF7FEFF bl FLASH_OB_ProgramData
537 00d0 0346 mov r3, r0
538 00d2 FB73 strb r3, [r7, #15]
420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK)
539 .loc 1 420 8
540 00d4 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
541 00d6 002B cmp r3, #0
542 00d8 04D0 beq .L32
421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */
423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash);
543 .loc 1 423 7
544 00da 064B ldr r3, .L33
545 00dc 0022 movs r2, #0
546 00de 1A76 strb r2, [r3, #24]
424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
ARM GAS /tmp/ccMLQ7U7.s page 18
547 .loc 1 424 14
548 00e0 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
549 00e2 03E0 b .L26
550 .L32:
425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */
429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash);
551 .loc 1 429 3
552 00e4 034B ldr r3, .L33
553 00e6 0022 movs r2, #0
554 00e8 1A76 strb r2, [r3, #24]
430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
555 .loc 1 431 10
556 00ea FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
557 .L26:
432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
558 .loc 1 432 1
559 00ec 1846 mov r0, r3
560 00ee 1037 adds r7, r7, #16
561 .cfi_def_cfa_offset 8
562 00f0 BD46 mov sp, r7
563 .cfi_def_cfa_register 13
564 @ sp needed
565 00f2 80BD pop {r7, pc}
566 .L34:
567 .align 2
568 .L33:
569 00f4 00000000 .word pFlash
570 .cfi_endproc
571 .LFE133:
573 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits
574 .align 1
575 .global HAL_FLASHEx_OBGetConfig
576 .syntax unified
577 .thumb
578 .thumb_func
580 HAL_FLASHEx_OBGetConfig:
581 .LFB134:
433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Get the Option byte configuration
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that
437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the programming.
438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None
440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
582 .loc 1 442 1
583 .cfi_startproc
584 @ args = 0, pretend = 0, frame = 8
585 @ frame_needed = 1, uses_anonymous_args = 0
586 0000 80B5 push {r7, lr}
587 .cfi_def_cfa_offset 8
ARM GAS /tmp/ccMLQ7U7.s page 19
588 .cfi_offset 7, -8
589 .cfi_offset 14, -4
590 0002 82B0 sub sp, sp, #8
591 .cfi_def_cfa_offset 16
592 0004 00AF add r7, sp, #0
593 .cfi_def_cfa_register 7
594 0006 7860 str r0, [r7, #4]
443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER;
595 .loc 1 443 23
596 0008 7B68 ldr r3, [r7, #4]
597 000a 0722 movs r2, #7
598 000c 1A60 str r2, [r3]
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get WRP*/
446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->WRPPage = FLASH_OB_GetWRP();
599 .loc 1 446 22
600 000e FFF7FEFF bl FLASH_OB_GetWRP
601 0012 0246 mov r2, r0
602 .loc 1 446 20 discriminator 1
603 0014 7B68 ldr r3, [r7, #4]
604 0016 9A60 str r2, [r3, #8]
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get RDP Level*/
449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->RDPLevel = FLASH_OB_GetRDP();
605 .loc 1 449 23
606 0018 FFF7FEFF bl FLASH_OB_GetRDP
607 001c 0346 mov r3, r0
608 .loc 1 449 21 discriminator 1
609 001e DAB2 uxtb r2, r3
610 0020 7B68 ldr r3, [r7, #4]
611 0022 1A73 strb r2, [r3, #12]
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get USER*/
452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->USERConfig = FLASH_OB_GetUser();
612 .loc 1 452 25
613 0024 FFF7FEFF bl FLASH_OB_GetUser
614 0028 0346 mov r3, r0
615 002a 1A46 mov r2, r3
616 .loc 1 452 23 discriminator 1
617 002c 7B68 ldr r3, [r7, #4]
618 002e 5A73 strb r2, [r3, #13]
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
619 .loc 1 453 1
620 0030 00BF nop
621 0032 0837 adds r7, r7, #8
622 .cfi_def_cfa_offset 8
623 0034 BD46 mov sp, r7
624 .cfi_def_cfa_register 13
625 @ sp needed
626 0036 80BD pop {r7, pc}
627 .cfi_endproc
628 .LFE134:
630 .section .text.HAL_FLASHEx_OBGetUserData,"ax",%progbits
631 .align 1
632 .global HAL_FLASHEx_OBGetUserData
633 .syntax unified
634 .thumb
ARM GAS /tmp/ccMLQ7U7.s page 20
635 .thumb_func
637 HAL_FLASHEx_OBGetUserData:
638 .LFB135:
454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Get the Option byte user data
457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param DATAAdress Address of the option byte DATA
458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values:
459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA0
460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA1
461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval Value programmed in USER data
462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress)
464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
639 .loc 1 464 1
640 .cfi_startproc
641 @ args = 0, pretend = 0, frame = 32
642 @ frame_needed = 1, uses_anonymous_args = 0
643 @ link register save eliminated.
644 0000 80B4 push {r7}
645 .cfi_def_cfa_offset 4
646 .cfi_offset 7, -4
647 0002 89B0 sub sp, sp, #36
648 .cfi_def_cfa_offset 40
649 0004 00AF add r7, sp, #0
650 .cfi_def_cfa_register 7
651 0006 7860 str r0, [r7, #4]
465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t value = 0U;
652 .loc 1 465 12
653 0008 0023 movs r3, #0
654 000a FB61 str r3, [r7, #28]
466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (DATAAdress == OB_DATA_ADDRESS_DATA0)
655 .loc 1 467 6
656 000c 7B68 ldr r3, [r7, #4]
657 000e 164A ldr r2, .L42
658 0010 9342 cmp r3, r2
659 0012 11D1 bne .L37
468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data0 */
470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA0) >> FLASH_POSITION_OB_USERDATA0_BIT;
660 .loc 1 470 13
661 0014 154B ldr r3, .L42+4
662 0016 DB69 ldr r3, [r3, #28]
663 0018 03F47F03 and r3, r3, #16711680
664 001c 4FF47F02 mov r2, #16711680
665 0020 BA61 str r2, [r7, #24]
666 .LBB8:
667 .LBB9:
668 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
ARM GAS /tmp/ccMLQ7U7.s page 21
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
ARM GAS /tmp/ccMLQ7U7.s page 22
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
ARM GAS /tmp/ccMLQ7U7.s page 23
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
144:Drivers/CMSIS/Include/cmsis_gcc.h ****
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
154:Drivers/CMSIS/Include/cmsis_gcc.h ****
155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
158:Drivers/CMSIS/Include/cmsis_gcc.h ****
159:Drivers/CMSIS/Include/cmsis_gcc.h ****
160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
169:Drivers/CMSIS/Include/cmsis_gcc.h ****
170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
174:Drivers/CMSIS/Include/cmsis_gcc.h ****
175:Drivers/CMSIS/Include/cmsis_gcc.h ****
176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
ARM GAS /tmp/ccMLQ7U7.s page 24
179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
185:Drivers/CMSIS/Include/cmsis_gcc.h ****
186:Drivers/CMSIS/Include/cmsis_gcc.h ****
187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
198:Drivers/CMSIS/Include/cmsis_gcc.h ****
199:Drivers/CMSIS/Include/cmsis_gcc.h ****
200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
208:Drivers/CMSIS/Include/cmsis_gcc.h ****
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
213:Drivers/CMSIS/Include/cmsis_gcc.h ****
214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
218:Drivers/CMSIS/Include/cmsis_gcc.h **** */
219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
222:Drivers/CMSIS/Include/cmsis_gcc.h ****
223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
227:Drivers/CMSIS/Include/cmsis_gcc.h ****
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
ARM GAS /tmp/ccMLQ7U7.s page 25
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
240:Drivers/CMSIS/Include/cmsis_gcc.h ****
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
246:Drivers/CMSIS/Include/cmsis_gcc.h **** */
247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
250:Drivers/CMSIS/Include/cmsis_gcc.h ****
251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
254:Drivers/CMSIS/Include/cmsis_gcc.h ****
255:Drivers/CMSIS/Include/cmsis_gcc.h ****
256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
270:Drivers/CMSIS/Include/cmsis_gcc.h ****
271:Drivers/CMSIS/Include/cmsis_gcc.h ****
272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
276:Drivers/CMSIS/Include/cmsis_gcc.h **** */
277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
281:Drivers/CMSIS/Include/cmsis_gcc.h ****
282:Drivers/CMSIS/Include/cmsis_gcc.h ****
283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS /tmp/ccMLQ7U7.s page 26
293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
295:Drivers/CMSIS/Include/cmsis_gcc.h ****
296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
300:Drivers/CMSIS/Include/cmsis_gcc.h **** */
301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
304:Drivers/CMSIS/Include/cmsis_gcc.h ****
305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
309:Drivers/CMSIS/Include/cmsis_gcc.h ****
310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
319:Drivers/CMSIS/Include/cmsis_gcc.h ****
320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
324:Drivers/CMSIS/Include/cmsis_gcc.h ****
325:Drivers/CMSIS/Include/cmsis_gcc.h ****
326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
334:Drivers/CMSIS/Include/cmsis_gcc.h **** }
335:Drivers/CMSIS/Include/cmsis_gcc.h ****
336:Drivers/CMSIS/Include/cmsis_gcc.h ****
337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
342:Drivers/CMSIS/Include/cmsis_gcc.h **** */
343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccMLQ7U7.s page 27
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
359:Drivers/CMSIS/Include/cmsis_gcc.h ****
360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
363:Drivers/CMSIS/Include/cmsis_gcc.h ****
364:Drivers/CMSIS/Include/cmsis_gcc.h ****
365:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
369:Drivers/CMSIS/Include/cmsis_gcc.h **** */
370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
377:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
381:Drivers/CMSIS/Include/cmsis_gcc.h **** */
382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
385:Drivers/CMSIS/Include/cmsis_gcc.h ****
386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
388:Drivers/CMSIS/Include/cmsis_gcc.h **** }
389:Drivers/CMSIS/Include/cmsis_gcc.h ****
390:Drivers/CMSIS/Include/cmsis_gcc.h ****
391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
396:Drivers/CMSIS/Include/cmsis_gcc.h **** */
397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
398:Drivers/CMSIS/Include/cmsis_gcc.h **** {
399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
400:Drivers/CMSIS/Include/cmsis_gcc.h ****
401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
405:Drivers/CMSIS/Include/cmsis_gcc.h ****
406:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccMLQ7U7.s page 28
407:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
411:Drivers/CMSIS/Include/cmsis_gcc.h **** */
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
417:Drivers/CMSIS/Include/cmsis_gcc.h ****
418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
423:Drivers/CMSIS/Include/cmsis_gcc.h **** */
424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
425:Drivers/CMSIS/Include/cmsis_gcc.h **** {
426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
429:Drivers/CMSIS/Include/cmsis_gcc.h ****
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
434:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
438:Drivers/CMSIS/Include/cmsis_gcc.h **** */
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
440:Drivers/CMSIS/Include/cmsis_gcc.h **** {
441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
442:Drivers/CMSIS/Include/cmsis_gcc.h **** }
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
444:Drivers/CMSIS/Include/cmsis_gcc.h ****
445:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
449:Drivers/CMSIS/Include/cmsis_gcc.h **** */
450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
454:Drivers/CMSIS/Include/cmsis_gcc.h ****
455:Drivers/CMSIS/Include/cmsis_gcc.h ****
456:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
460:Drivers/CMSIS/Include/cmsis_gcc.h **** */
461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
462:Drivers/CMSIS/Include/cmsis_gcc.h **** {
463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
ARM GAS /tmp/ccMLQ7U7.s page 29
464:Drivers/CMSIS/Include/cmsis_gcc.h ****
465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
468:Drivers/CMSIS/Include/cmsis_gcc.h ****
469:Drivers/CMSIS/Include/cmsis_gcc.h ****
470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
471:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
475:Drivers/CMSIS/Include/cmsis_gcc.h **** */
476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
479:Drivers/CMSIS/Include/cmsis_gcc.h ****
480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
485:Drivers/CMSIS/Include/cmsis_gcc.h ****
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
495:Drivers/CMSIS/Include/cmsis_gcc.h ****
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
498:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
502:Drivers/CMSIS/Include/cmsis_gcc.h **** */
503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
504:Drivers/CMSIS/Include/cmsis_gcc.h **** {
505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
508:Drivers/CMSIS/Include/cmsis_gcc.h ****
509:Drivers/CMSIS/Include/cmsis_gcc.h ****
510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
515:Drivers/CMSIS/Include/cmsis_gcc.h **** */
516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
519:Drivers/CMSIS/Include/cmsis_gcc.h **** }
520:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccMLQ7U7.s page 30
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
526:Drivers/CMSIS/Include/cmsis_gcc.h **** */
527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
528:Drivers/CMSIS/Include/cmsis_gcc.h **** {
529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
530:Drivers/CMSIS/Include/cmsis_gcc.h ****
531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
534:Drivers/CMSIS/Include/cmsis_gcc.h ****
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
537:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
541:Drivers/CMSIS/Include/cmsis_gcc.h **** */
542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
545:Drivers/CMSIS/Include/cmsis_gcc.h ****
546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
548:Drivers/CMSIS/Include/cmsis_gcc.h **** }
549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
550:Drivers/CMSIS/Include/cmsis_gcc.h ****
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
552:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
556:Drivers/CMSIS/Include/cmsis_gcc.h **** */
557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
558:Drivers/CMSIS/Include/cmsis_gcc.h **** {
559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
560:Drivers/CMSIS/Include/cmsis_gcc.h **** }
561:Drivers/CMSIS/Include/cmsis_gcc.h ****
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
568:Drivers/CMSIS/Include/cmsis_gcc.h **** */
569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
570:Drivers/CMSIS/Include/cmsis_gcc.h **** {
571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
574:Drivers/CMSIS/Include/cmsis_gcc.h ****
575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
ARM GAS /tmp/ccMLQ7U7.s page 31
578:Drivers/CMSIS/Include/cmsis_gcc.h ****
579:Drivers/CMSIS/Include/cmsis_gcc.h ****
580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
582:Drivers/CMSIS/Include/cmsis_gcc.h ****
583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
591:Drivers/CMSIS/Include/cmsis_gcc.h **** */
592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
593:Drivers/CMSIS/Include/cmsis_gcc.h **** {
594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
604:Drivers/CMSIS/Include/cmsis_gcc.h ****
605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
606:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
610:Drivers/CMSIS/Include/cmsis_gcc.h ****
611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
613:Drivers/CMSIS/Include/cmsis_gcc.h **** */
614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
615:Drivers/CMSIS/Include/cmsis_gcc.h **** {
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
626:Drivers/CMSIS/Include/cmsis_gcc.h ****
627:Drivers/CMSIS/Include/cmsis_gcc.h ****
628:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
633:Drivers/CMSIS/Include/cmsis_gcc.h ****
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
ARM GAS /tmp/ccMLQ7U7.s page 32
635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
636:Drivers/CMSIS/Include/cmsis_gcc.h **** */
637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
647:Drivers/CMSIS/Include/cmsis_gcc.h ****
648:Drivers/CMSIS/Include/cmsis_gcc.h ****
649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
654:Drivers/CMSIS/Include/cmsis_gcc.h ****
655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
657:Drivers/CMSIS/Include/cmsis_gcc.h **** */
658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
666:Drivers/CMSIS/Include/cmsis_gcc.h **** }
667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
668:Drivers/CMSIS/Include/cmsis_gcc.h ****
669:Drivers/CMSIS/Include/cmsis_gcc.h ****
670:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
675:Drivers/CMSIS/Include/cmsis_gcc.h ****
676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
678:Drivers/CMSIS/Include/cmsis_gcc.h **** */
679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
690:Drivers/CMSIS/Include/cmsis_gcc.h **** }
691:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccMLQ7U7.s page 33
692:Drivers/CMSIS/Include/cmsis_gcc.h ****
693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
698:Drivers/CMSIS/Include/cmsis_gcc.h ****
699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
701:Drivers/CMSIS/Include/cmsis_gcc.h **** */
702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
ARM GAS /tmp/ccMLQ7U7.s page 34
749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
756:Drivers/CMSIS/Include/cmsis_gcc.h ****
757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
760:Drivers/CMSIS/Include/cmsis_gcc.h ****
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
765:Drivers/CMSIS/Include/cmsis_gcc.h **** */
766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
767:Drivers/CMSIS/Include/cmsis_gcc.h **** {
768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
777:Drivers/CMSIS/Include/cmsis_gcc.h ****
778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
784:Drivers/CMSIS/Include/cmsis_gcc.h **** }
785:Drivers/CMSIS/Include/cmsis_gcc.h ****
786:Drivers/CMSIS/Include/cmsis_gcc.h ****
787:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
ARM GAS /tmp/ccMLQ7U7.s page 35
806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
808:Drivers/CMSIS/Include/cmsis_gcc.h ****
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
811:Drivers/CMSIS/Include/cmsis_gcc.h ****
812:Drivers/CMSIS/Include/cmsis_gcc.h ****
813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
818:Drivers/CMSIS/Include/cmsis_gcc.h ****
819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
831:Drivers/CMSIS/Include/cmsis_gcc.h ****
832:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
835:Drivers/CMSIS/Include/cmsis_gcc.h **** */
836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
837:Drivers/CMSIS/Include/cmsis_gcc.h ****
838:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
841:Drivers/CMSIS/Include/cmsis_gcc.h **** */
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
843:Drivers/CMSIS/Include/cmsis_gcc.h ****
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
845:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
849:Drivers/CMSIS/Include/cmsis_gcc.h **** */
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
851:Drivers/CMSIS/Include/cmsis_gcc.h ****
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
856:Drivers/CMSIS/Include/cmsis_gcc.h **** */
857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
858:Drivers/CMSIS/Include/cmsis_gcc.h ****
859:Drivers/CMSIS/Include/cmsis_gcc.h ****
860:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
ARM GAS /tmp/ccMLQ7U7.s page 36
863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
865:Drivers/CMSIS/Include/cmsis_gcc.h **** */
866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
870:Drivers/CMSIS/Include/cmsis_gcc.h ****
871:Drivers/CMSIS/Include/cmsis_gcc.h ****
872:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
876:Drivers/CMSIS/Include/cmsis_gcc.h **** */
877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
878:Drivers/CMSIS/Include/cmsis_gcc.h **** {
879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
880:Drivers/CMSIS/Include/cmsis_gcc.h **** }
881:Drivers/CMSIS/Include/cmsis_gcc.h ****
882:Drivers/CMSIS/Include/cmsis_gcc.h ****
883:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
887:Drivers/CMSIS/Include/cmsis_gcc.h **** */
888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
889:Drivers/CMSIS/Include/cmsis_gcc.h **** {
890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
891:Drivers/CMSIS/Include/cmsis_gcc.h **** }
892:Drivers/CMSIS/Include/cmsis_gcc.h ****
893:Drivers/CMSIS/Include/cmsis_gcc.h ****
894:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
899:Drivers/CMSIS/Include/cmsis_gcc.h **** */
900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
901:Drivers/CMSIS/Include/cmsis_gcc.h **** {
902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
906:Drivers/CMSIS/Include/cmsis_gcc.h ****
907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
912:Drivers/CMSIS/Include/cmsis_gcc.h ****
913:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
918:Drivers/CMSIS/Include/cmsis_gcc.h **** */
919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
ARM GAS /tmp/ccMLQ7U7.s page 37
920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
922:Drivers/CMSIS/Include/cmsis_gcc.h ****
923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
927:Drivers/CMSIS/Include/cmsis_gcc.h ****
928:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
933:Drivers/CMSIS/Include/cmsis_gcc.h **** */
934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
935:Drivers/CMSIS/Include/cmsis_gcc.h **** {
936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
940:Drivers/CMSIS/Include/cmsis_gcc.h ****
941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
945:Drivers/CMSIS/Include/cmsis_gcc.h ****
946:Drivers/CMSIS/Include/cmsis_gcc.h ****
947:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
953:Drivers/CMSIS/Include/cmsis_gcc.h **** */
954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
955:Drivers/CMSIS/Include/cmsis_gcc.h **** {
956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
960:Drivers/CMSIS/Include/cmsis_gcc.h **** }
961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
962:Drivers/CMSIS/Include/cmsis_gcc.h **** }
963:Drivers/CMSIS/Include/cmsis_gcc.h ****
964:Drivers/CMSIS/Include/cmsis_gcc.h ****
965:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
971:Drivers/CMSIS/Include/cmsis_gcc.h **** */
972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
974:Drivers/CMSIS/Include/cmsis_gcc.h ****
975:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
ARM GAS /tmp/ccMLQ7U7.s page 38
977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
980:Drivers/CMSIS/Include/cmsis_gcc.h **** */
981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
984:Drivers/CMSIS/Include/cmsis_gcc.h ****
985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
669 .loc 2 988 4
670 0022 BA69 ldr r2, [r7, #24]
671 .syntax unified
672 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
673 0024 92FAA2F2 rbit r2, r2
674 @ 0 "" 2
675 .thumb
676 .syntax unified
677 0028 7A61 str r2, [r7, #20]
989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
991:Drivers/CMSIS/Include/cmsis_gcc.h ****
992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
994:Drivers/CMSIS/Include/cmsis_gcc.h **** {
995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
998:Drivers/CMSIS/Include/cmsis_gcc.h **** }
999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
678 .loc 2 1001 10
679 002a 7A69 ldr r2, [r7, #20]
680 .LBE9:
681 .LBE8:
682 .loc 1 470 54 discriminator 1
683 002c B2FA82F2 clz r2, r2
684 .loc 1 470 54 is_stmt 0 discriminator 2
685 0030 D2B2 uxtb r2, r2
686 .loc 1 470 11 is_stmt 1 discriminator 2
687 0032 D340 lsrs r3, r3, r2
688 0034 FB61 str r3, [r7, #28]
689 0036 10E0 b .L39
690 .L37:
471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else
473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data1 */
475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA1) >> FLASH_POSITION_OB_USERDATA1_BIT;
691 .loc 1 475 13
692 0038 0C4B ldr r3, .L42+4
693 003a DB69 ldr r3, [r3, #28]
694 003c 03F07F43 and r3, r3, #-16777216
695 0040 4FF07F42 mov r2, #-16777216
ARM GAS /tmp/ccMLQ7U7.s page 39
696 0044 3A61 str r2, [r7, #16]
697 .LBB10:
698 .LBB11:
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
699 .loc 2 988 4
700 0046 3A69 ldr r2, [r7, #16]
701 .syntax unified
702 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
703 0048 92FAA2F2 rbit r2, r2
704 @ 0 "" 2
705 .thumb
706 .syntax unified
707 004c FA60 str r2, [r7, #12]
708 .loc 2 1001 10
709 004e FA68 ldr r2, [r7, #12]
710 .LBE11:
711 .LBE10:
712 .loc 1 475 54 discriminator 1
713 0050 B2FA82F2 clz r2, r2
714 .loc 1 475 54 is_stmt 0 discriminator 2
715 0054 D2B2 uxtb r2, r2
716 .loc 1 475 11 is_stmt 1 discriminator 2
717 0056 D340 lsrs r3, r3, r2
718 0058 FB61 str r3, [r7, #28]
719 .L39:
476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return value;
720 .loc 1 478 10
721 005a FB69 ldr r3, [r7, #28]
479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
722 .loc 1 479 1
723 005c 1846 mov r0, r3
724 005e 2437 adds r7, r7, #36
725 .cfi_def_cfa_offset 4
726 0060 BD46 mov sp, r7
727 .cfi_def_cfa_register 13
728 @ sp needed
729 0062 5DF8047B ldr r7, [sp], #4
730 .cfi_restore 7
731 .cfi_def_cfa_offset 0
732 0066 7047 bx lr
733 .L43:
734 .align 2
735 .L42:
736 0068 04F8FF1F .word 536868868
737 006c 00200240 .word 1073881088
738 .cfi_endproc
739 .LFE135:
741 .section .text.FLASH_MassErase,"ax",%progbits
742 .align 1
743 .syntax unified
744 .thumb
745 .thumb_func
747 FLASH_MassErase:
748 .LFB136:
480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
ARM GAS /tmp/ccMLQ7U7.s page 40
481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Functions
490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Full erase of FLASH memory Bank
495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static void FLASH_MassErase(void)
499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
749 .loc 1 499 1
750 .cfi_startproc
751 @ args = 0, pretend = 0, frame = 0
752 @ frame_needed = 1, uses_anonymous_args = 0
753 @ link register save eliminated.
754 0000 80B4 push {r7}
755 .cfi_def_cfa_offset 4
756 .cfi_offset 7, -4
757 0002 00AF add r7, sp, #0
758 .cfi_def_cfa_register 7
500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */
501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
759 .loc 1 501 20
760 0004 094B ldr r3, .L45
761 0006 0022 movs r2, #0
762 0008 DA61 str r2, [r3, #28]
502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Only bank1 will be erased*/
504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_MER);
763 .loc 1 504 5
764 000a 094B ldr r3, .L45+4
765 000c 1B69 ldr r3, [r3, #16]
766 000e 084A ldr r2, .L45+4
767 0010 43F00403 orr r3, r3, #4
768 0014 1361 str r3, [r2, #16]
505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT);
769 .loc 1 505 5
770 0016 064B ldr r3, .L45+4
771 0018 1B69 ldr r3, [r3, #16]
772 001a 054A ldr r2, .L45+4
773 001c 43F04003 orr r3, r3, #64
774 0020 1361 str r3, [r2, #16]
506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
775 .loc 1 506 1
776 0022 00BF nop
777 0024 BD46 mov sp, r7
778 .cfi_def_cfa_register 13
779 @ sp needed
ARM GAS /tmp/ccMLQ7U7.s page 41
780 0026 5DF8047B ldr r7, [sp], #4
781 .cfi_restore 7
782 .cfi_def_cfa_offset 0
783 002a 7047 bx lr
784 .L46:
785 .align 2
786 .L45:
787 002c 00000000 .word pFlash
788 0030 00200240 .word 1073881088
789 .cfi_endproc
790 .LFE136:
792 .section .text.FLASH_OB_EnableWRP,"ax",%progbits
793 .align 1
794 .syntax unified
795 .thumb
796 .thumb_func
798 FLASH_OB_EnableWRP:
799 .LFB137:
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Enable the write protection of the desired pages
510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function.
511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1),
512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if
513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write protected.
516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series
517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status
518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage)
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
800 .loc 1 520 1
801 .cfi_startproc
802 @ args = 0, pretend = 0, frame = 24
803 @ frame_needed = 1, uses_anonymous_args = 0
804 0000 80B5 push {r7, lr}
805 .cfi_def_cfa_offset 8
806 .cfi_offset 7, -8
807 .cfi_offset 14, -4
808 0002 86B0 sub sp, sp, #24
809 .cfi_def_cfa_offset 32
810 0004 00AF add r7, sp, #0
811 .cfi_def_cfa_register 7
812 0006 7860 str r0, [r7, #4]
521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK;
813 .loc 1 521 21
814 0008 0023 movs r3, #0
815 000a FB75 strb r3, [r7, #23]
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU;
816 .loc 1 522 12
817 000c 4FF6FF73 movw r3, #65535
818 0010 BB82 strh r3, [r7, #20] @ movhi
523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1)
524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU;
819 .loc 1 524 12
820 0012 4FF6FF73 movw r3, #65535
ARM GAS /tmp/ccMLQ7U7.s page 42
821 0016 7B82 strh r3, [r7, #18] @ movhi
525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */
526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2)
527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU;
822 .loc 1 527 12
823 0018 4FF6FF73 movw r3, #65535
824 001c 3B82 strh r3, [r7, #16] @ movhi
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */
529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3)
530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU;
825 .loc 1 530 12
826 001e 4FF6FF73 movw r3, #65535
827 0022 FB81 strh r3, [r7, #14] @ movhi
531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */
532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage));
535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be protected ******/
537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WriteProtectPage = (uint32_t)(~((~FLASH_OB_GetWRP()) | WriteProtectPage));
828 .loc 1 537 37
829 0024 FFF7FEFF bl FLASH_OB_GetWRP
830 0028 0246 mov r2, r0
831 .loc 1 537 33 discriminator 1
832 002a 7B68 ldr r3, [r7, #4]
833 002c DB43 mvns r3, r3
834 .loc 1 537 20 discriminator 1
835 002e 1340 ands r3, r3, r2
836 0030 7B60 str r3, [r7, #4]
538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK)
540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
837 .loc 1 540 15
838 0032 7B68 ldr r3, [r7, #4]
839 0034 9BB2 uxth r3, r3
840 .loc 1 540 13
841 0036 DBB2 uxtb r3, r3
842 0038 BB82 strh r3, [r7, #20] @ movhi
541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */
542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK)
544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U);
843 .loc 1 544 70
844 003a 7B68 ldr r3, [r7, #4]
845 003c 1B0A lsrs r3, r3, #8
846 .loc 1 544 15
847 003e 9BB2 uxth r3, r3
848 .loc 1 544 13
849 0040 DBB2 uxtb r3, r3
850 0042 7B82 strh r3, [r7, #18] @ movhi
545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK)
548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U);
851 .loc 1 548 70
852 0044 7B68 ldr r3, [r7, #4]
853 0046 1B0C lsrs r3, r3, #16
ARM GAS /tmp/ccMLQ7U7.s page 43
854 .loc 1 548 15
855 0048 9BB2 uxth r3, r3
856 .loc 1 548 13
857 004a DBB2 uxtb r3, r3
858 004c 3B82 strh r3, [r7, #16] @ movhi
549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */
550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO127MASK)
552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U);
859 .loc 1 552 71
860 004e 7B68 ldr r3, [r7, #4]
861 0050 1B0E lsrs r3, r3, #24
862 .loc 1 552 13
863 0052 FB81 strh r3, [r7, #14] @ movhi
553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK)
554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24U);
555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */
556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
864 .loc 1 558 12
865 0054 4CF25030 movw r0, #50000
866 0058 FFF7FEFF bl FLASH_WaitForLastOperation
867 005c 0346 mov r3, r0
868 005e FB75 strb r3, [r7, #23]
559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK)
869 .loc 1 560 5
870 0060 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
871 0062 002B cmp r3, #0
872 0064 62D1 bne .L48
561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */
563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
873 .loc 1 563 22
874 0066 344B ldr r3, .L54
875 0068 0022 movs r2, #0
876 006a DA61 str r2, [r3, #28]
564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */
566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase();
877 .loc 1 566 14
878 006c FFF7FEFF bl HAL_FLASHEx_OBErase
879 0070 0346 mov r3, r0
880 0072 FB75 strb r3, [r7, #23]
567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK)
881 .loc 1 567 8
882 0074 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
883 0076 002B cmp r3, #0
884 0078 58D1 bne .L48
568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable write protection */
570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
885 .loc 1 570 7
886 007a 304B ldr r3, .L54+4
887 007c 1B69 ldr r3, [r3, #16]
888 007e 2F4A ldr r2, .L54+4
ARM GAS /tmp/ccMLQ7U7.s page 44
889 0080 43F01003 orr r3, r3, #16
890 0084 1361 str r3, [r2, #16]
571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0)
573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU)
891 .loc 1 573 9
892 0086 BB8A ldrh r3, [r7, #20]
893 0088 FF2B cmp r3, #255
894 008a 0DD0 beq .L49
574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP0 &= WRP0_Data;
895 .loc 1 575 11
896 008c 2C4B ldr r3, .L54+8
897 008e 1B89 ldrh r3, [r3, #8] @ movhi
898 0090 9AB2 uxth r2, r3
899 0092 2B49 ldr r1, .L54+8
900 .loc 1 575 18
901 0094 BB8A ldrh r3, [r7, #20] @ movhi
902 0096 1340 ands r3, r3, r2
903 0098 9BB2 uxth r3, r3
904 009a 0B81 strh r3, [r1, #8] @ movhi
576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
905 .loc 1 578 18
906 009c 4CF25030 movw r0, #50000
907 00a0 FFF7FEFF bl FLASH_WaitForLastOperation
908 00a4 0346 mov r3, r0
909 00a6 FB75 strb r3, [r7, #23]
910 .L49:
579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */
581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1)
583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU))
911 .loc 1 583 9
912 00a8 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
913 00aa 002B cmp r3, #0
914 00ac 10D1 bne .L50
915 .loc 1 583 29 discriminator 1
916 00ae 7B8A ldrh r3, [r7, #18]
917 00b0 FF2B cmp r3, #255
918 00b2 0DD0 beq .L50
584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP1 &= WRP1_Data;
919 .loc 1 585 11
920 00b4 224B ldr r3, .L54+8
921 00b6 5B89 ldrh r3, [r3, #10] @ movhi
922 00b8 9AB2 uxth r2, r3
923 00ba 2149 ldr r1, .L54+8
924 .loc 1 585 18
925 00bc 7B8A ldrh r3, [r7, #18] @ movhi
926 00be 1340 ands r3, r3, r2
927 00c0 9BB2 uxth r3, r3
928 00c2 4B81 strh r3, [r1, #10] @ movhi
586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
ARM GAS /tmp/ccMLQ7U7.s page 45
588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
929 .loc 1 588 18
930 00c4 4CF25030 movw r0, #50000
931 00c8 FFF7FEFF bl FLASH_WaitForLastOperation
932 00cc 0346 mov r3, r0
933 00ce FB75 strb r3, [r7, #23]
934 .L50:
589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */
591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2)
593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU))
935 .loc 1 593 9
936 00d0 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
937 00d2 002B cmp r3, #0
938 00d4 10D1 bne .L51
939 .loc 1 593 29 discriminator 1
940 00d6 3B8A ldrh r3, [r7, #16]
941 00d8 FF2B cmp r3, #255
942 00da 0DD0 beq .L51
594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP2 &= WRP2_Data;
943 .loc 1 595 11
944 00dc 184B ldr r3, .L54+8
945 00de 9B89 ldrh r3, [r3, #12] @ movhi
946 00e0 9AB2 uxth r2, r3
947 00e2 1749 ldr r1, .L54+8
948 .loc 1 595 18
949 00e4 3B8A ldrh r3, [r7, #16] @ movhi
950 00e6 1340 ands r3, r3, r2
951 00e8 9BB2 uxth r3, r3
952 00ea 8B81 strh r3, [r1, #12] @ movhi
596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
953 .loc 1 598 18
954 00ec 4CF25030 movw r0, #50000
955 00f0 FFF7FEFF bl FLASH_WaitForLastOperation
956 00f4 0346 mov r3, r0
957 00f6 FB75 strb r3, [r7, #23]
958 .L51:
599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */
601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3)
603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU))
959 .loc 1 603 9
960 00f8 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
961 00fa 002B cmp r3, #0
962 00fc 10D1 bne .L52
963 .loc 1 603 29 discriminator 1
964 00fe FB89 ldrh r3, [r7, #14]
965 0100 FF2B cmp r3, #255
966 0102 0DD0 beq .L52
604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP3 &= WRP3_Data;
967 .loc 1 605 11
ARM GAS /tmp/ccMLQ7U7.s page 46
968 0104 0E4B ldr r3, .L54+8
969 0106 DB89 ldrh r3, [r3, #14] @ movhi
970 0108 9AB2 uxth r2, r3
971 010a 0D49 ldr r1, .L54+8
972 .loc 1 605 18
973 010c FB89 ldrh r3, [r7, #14] @ movhi
974 010e 1340 ands r3, r3, r2
975 0110 9BB2 uxth r3, r3
976 0112 CB81 strh r3, [r1, #14] @ movhi
606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
977 .loc 1 608 18
978 0114 4CF25030 movw r0, #50000
979 0118 FFF7FEFF bl FLASH_WaitForLastOperation
980 011c 0346 mov r3, r0
981 011e FB75 strb r3, [r7, #23]
982 .L52:
609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */
611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */
613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
983 .loc 1 613 7
984 0120 064B ldr r3, .L54+4
985 0122 1B69 ldr r3, [r3, #16]
986 0124 054A ldr r2, .L54+4
987 0126 23F01003 bic r3, r3, #16
988 012a 1361 str r3, [r2, #16]
989 .L48:
614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
990 .loc 1 617 10
991 012c FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
992 .loc 1 618 1
993 012e 1846 mov r0, r3
994 0130 1837 adds r7, r7, #24
995 .cfi_def_cfa_offset 8
996 0132 BD46 mov sp, r7
997 .cfi_def_cfa_register 13
998 @ sp needed
999 0134 80BD pop {r7, pc}
1000 .L55:
1001 0136 00BF .align 2
1002 .L54:
1003 0138 00000000 .word pFlash
1004 013c 00200240 .word 1073881088
1005 0140 00F8FF1F .word 536868864
1006 .cfi_endproc
1007 .LFE137:
1009 .section .text.FLASH_OB_DisableWRP,"ax",%progbits
1010 .align 1
1011 .syntax unified
1012 .thumb
ARM GAS /tmp/ccMLQ7U7.s page 47
1013 .thumb_func
1015 FLASH_OB_DisableWRP:
1016 .LFB138:
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Disable the write protection of the desired pages
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function.
623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1),
624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if
625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write unprotected.
628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series
629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status
630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage)
632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
1017 .loc 1 632 1
1018 .cfi_startproc
1019 @ args = 0, pretend = 0, frame = 24
1020 @ frame_needed = 1, uses_anonymous_args = 0
1021 0000 80B5 push {r7, lr}
1022 .cfi_def_cfa_offset 8
1023 .cfi_offset 7, -8
1024 .cfi_offset 14, -4
1025 0002 86B0 sub sp, sp, #24
1026 .cfi_def_cfa_offset 32
1027 0004 00AF add r7, sp, #0
1028 .cfi_def_cfa_register 7
1029 0006 7860 str r0, [r7, #4]
633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK;
1030 .loc 1 633 21
1031 0008 0023 movs r3, #0
1032 000a FB75 strb r3, [r7, #23]
634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU;
1033 .loc 1 634 12
1034 000c 4FF6FF73 movw r3, #65535
1035 0010 BB82 strh r3, [r7, #20] @ movhi
635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1)
636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU;
1036 .loc 1 636 12
1037 0012 4FF6FF73 movw r3, #65535
1038 0016 7B82 strh r3, [r7, #18] @ movhi
637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */
638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2)
639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU;
1039 .loc 1 639 12
1040 0018 4FF6FF73 movw r3, #65535
1041 001c 3B82 strh r3, [r7, #16] @ movhi
640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */
641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3)
642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU;
1042 .loc 1 642 12
1043 001e 4FF6FF73 movw r3, #65535
1044 0022 FB81 strh r3, [r7, #14] @ movhi
643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */
644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
ARM GAS /tmp/ccMLQ7U7.s page 48
645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage));
647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be unprotected ******/
649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WriteProtectPage = (FLASH_OB_GetWRP() | WriteProtectPage);
1045 .loc 1 649 23
1046 0024 FFF7FEFF bl FLASH_OB_GetWRP
1047 0028 0246 mov r2, r0
1048 .loc 1 649 20 discriminator 1
1049 002a 7B68 ldr r3, [r7, #4]
1050 002c 1343 orrs r3, r3, r2
1051 002e 7B60 str r3, [r7, #4]
650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK)
652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
1052 .loc 1 652 15
1053 0030 7B68 ldr r3, [r7, #4]
1054 0032 9BB2 uxth r3, r3
1055 .loc 1 652 13
1056 0034 DBB2 uxtb r3, r3
1057 0036 BB82 strh r3, [r7, #20] @ movhi
653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */
654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK)
656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U);
1058 .loc 1 656 70
1059 0038 7B68 ldr r3, [r7, #4]
1060 003a 1B0A lsrs r3, r3, #8
1061 .loc 1 656 15
1062 003c 9BB2 uxth r3, r3
1063 .loc 1 656 13
1064 003e DBB2 uxtb r3, r3
1065 0040 7B82 strh r3, [r7, #18] @ movhi
657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK)
660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U);
1066 .loc 1 660 70
1067 0042 7B68 ldr r3, [r7, #4]
1068 0044 1B0C lsrs r3, r3, #16
1069 .loc 1 660 15
1070 0046 9BB2 uxth r3, r3
1071 .loc 1 660 13
1072 0048 DBB2 uxtb r3, r3
1073 004a 3B82 strh r3, [r7, #16] @ movhi
661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */
662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO127MASK)
664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U);
1074 .loc 1 664 71
1075 004c 7B68 ldr r3, [r7, #4]
1076 004e 1B0E lsrs r3, r3, #24
1077 .loc 1 664 13
1078 0050 FB81 strh r3, [r7, #14] @ movhi
665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK)
666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24U);
667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */
ARM GAS /tmp/ccMLQ7U7.s page 49
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1079 .loc 1 671 12
1080 0052 4CF25030 movw r0, #50000
1081 0056 FFF7FEFF bl FLASH_WaitForLastOperation
1082 005a 0346 mov r3, r0
1083 005c FB75 strb r3, [r7, #23]
672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK)
1084 .loc 1 673 5
1085 005e FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
1086 0060 002B cmp r3, #0
1087 0062 62D1 bne .L57
674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */
676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
1088 .loc 1 676 22
1089 0064 334B ldr r3, .L63
1090 0066 0022 movs r2, #0
1091 0068 DA61 str r2, [r3, #28]
677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */
679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase();
1092 .loc 1 679 14
1093 006a FFF7FEFF bl HAL_FLASHEx_OBErase
1094 006e 0346 mov r3, r0
1095 0070 FB75 strb r3, [r7, #23]
680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK)
1096 .loc 1 680 8
1097 0072 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
1098 0074 002B cmp r3, #0
1099 0076 58D1 bne .L57
681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
1100 .loc 1 682 7
1101 0078 2F4B ldr r3, .L63+4
1102 007a 1B69 ldr r3, [r3, #16]
1103 007c 2E4A ldr r2, .L63+4
1104 007e 43F01003 orr r3, r3, #16
1105 0082 1361 str r3, [r2, #16]
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0)
685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU)
1106 .loc 1 685 9
1107 0084 BB8A ldrh r3, [r7, #20]
1108 0086 FF2B cmp r3, #255
1109 0088 0DD0 beq .L58
686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP0 |= WRP0_Data;
1110 .loc 1 687 11
1111 008a 2C4B ldr r3, .L63+8
1112 008c 1B89 ldrh r3, [r3, #8] @ movhi
1113 008e 9AB2 uxth r2, r3
1114 0090 2A49 ldr r1, .L63+8
1115 .loc 1 687 18
ARM GAS /tmp/ccMLQ7U7.s page 50
1116 0092 BB8A ldrh r3, [r7, #20] @ movhi
1117 0094 1343 orrs r3, r3, r2
1118 0096 9BB2 uxth r3, r3
1119 0098 0B81 strh r3, [r1, #8] @ movhi
688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1120 .loc 1 690 18
1121 009a 4CF25030 movw r0, #50000
1122 009e FFF7FEFF bl FLASH_WaitForLastOperation
1123 00a2 0346 mov r3, r0
1124 00a4 FB75 strb r3, [r7, #23]
1125 .L58:
691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */
693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1)
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU))
1126 .loc 1 695 9
1127 00a6 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
1128 00a8 002B cmp r3, #0
1129 00aa 10D1 bne .L59
1130 .loc 1 695 29 discriminator 1
1131 00ac 7B8A ldrh r3, [r7, #18]
1132 00ae FF2B cmp r3, #255
1133 00b0 0DD0 beq .L59
696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP1 |= WRP1_Data;
1134 .loc 1 697 11
1135 00b2 224B ldr r3, .L63+8
1136 00b4 5B89 ldrh r3, [r3, #10] @ movhi
1137 00b6 9AB2 uxth r2, r3
1138 00b8 2049 ldr r1, .L63+8
1139 .loc 1 697 18
1140 00ba 7B8A ldrh r3, [r7, #18] @ movhi
1141 00bc 1343 orrs r3, r3, r2
1142 00be 9BB2 uxth r3, r3
1143 00c0 4B81 strh r3, [r1, #10] @ movhi
698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1144 .loc 1 700 18
1145 00c2 4CF25030 movw r0, #50000
1146 00c6 FFF7FEFF bl FLASH_WaitForLastOperation
1147 00ca 0346 mov r3, r0
1148 00cc FB75 strb r3, [r7, #23]
1149 .L59:
701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */
703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2)
705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU))
1150 .loc 1 705 9
1151 00ce FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
1152 00d0 002B cmp r3, #0
1153 00d2 10D1 bne .L60
1154 .loc 1 705 29 discriminator 1
ARM GAS /tmp/ccMLQ7U7.s page 51
1155 00d4 3B8A ldrh r3, [r7, #16]
1156 00d6 FF2B cmp r3, #255
1157 00d8 0DD0 beq .L60
706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP2 |= WRP2_Data;
1158 .loc 1 707 11
1159 00da 184B ldr r3, .L63+8
1160 00dc 9B89 ldrh r3, [r3, #12] @ movhi
1161 00de 9AB2 uxth r2, r3
1162 00e0 1649 ldr r1, .L63+8
1163 .loc 1 707 18
1164 00e2 3B8A ldrh r3, [r7, #16] @ movhi
1165 00e4 1343 orrs r3, r3, r2
1166 00e6 9BB2 uxth r3, r3
1167 00e8 8B81 strh r3, [r1, #12] @ movhi
708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1168 .loc 1 710 18
1169 00ea 4CF25030 movw r0, #50000
1170 00ee FFF7FEFF bl FLASH_WaitForLastOperation
1171 00f2 0346 mov r3, r0
1172 00f4 FB75 strb r3, [r7, #23]
1173 .L60:
711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */
713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3)
715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU))
1174 .loc 1 715 9
1175 00f6 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
1176 00f8 002B cmp r3, #0
1177 00fa 10D1 bne .L61
1178 .loc 1 715 29 discriminator 1
1179 00fc FB89 ldrh r3, [r7, #14]
1180 00fe FF2B cmp r3, #255
1181 0100 0DD0 beq .L61
716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP3 |= WRP3_Data;
1182 .loc 1 717 11
1183 0102 0E4B ldr r3, .L63+8
1184 0104 DB89 ldrh r3, [r3, #14] @ movhi
1185 0106 9AB2 uxth r2, r3
1186 0108 0C49 ldr r1, .L63+8
1187 .loc 1 717 18
1188 010a FB89 ldrh r3, [r7, #14] @ movhi
1189 010c 1343 orrs r3, r3, r2
1190 010e 9BB2 uxth r3, r3
1191 0110 CB81 strh r3, [r1, #14] @ movhi
718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1192 .loc 1 720 18
1193 0112 4CF25030 movw r0, #50000
1194 0116 FFF7FEFF bl FLASH_WaitForLastOperation
1195 011a 0346 mov r3, r0
1196 011c FB75 strb r3, [r7, #23]
ARM GAS /tmp/ccMLQ7U7.s page 52
1197 .L61:
721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */
723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */
725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
1198 .loc 1 725 7
1199 011e 064B ldr r3, .L63+4
1200 0120 1B69 ldr r3, [r3, #16]
1201 0122 054A ldr r2, .L63+4
1202 0124 23F01003 bic r3, r3, #16
1203 0128 1361 str r3, [r2, #16]
1204 .L57:
726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
1205 .loc 1 728 10
1206 012a FB7D ldrb r3, [r7, #23] @ zero_extendqisi2
729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
1207 .loc 1 729 1
1208 012c 1846 mov r0, r3
1209 012e 1837 adds r7, r7, #24
1210 .cfi_def_cfa_offset 8
1211 0130 BD46 mov sp, r7
1212 .cfi_def_cfa_register 13
1213 @ sp needed
1214 0132 80BD pop {r7, pc}
1215 .L64:
1216 .align 2
1217 .L63:
1218 0134 00000000 .word pFlash
1219 0138 00200240 .word 1073881088
1220 013c 00F8FF1F .word 536868864
1221 .cfi_endproc
1222 .LFE138:
1224 .section .text.FLASH_OB_RDP_LevelConfig,"ax",%progbits
1225 .align 1
1226 .syntax unified
1227 .thumb
1228 .thumb_func
1230 FLASH_OB_RDP_LevelConfig:
1231 .LFB139:
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Set the read protection level.
733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param ReadProtectLevel specifies the read protection level.
734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values:
735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection
736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection
738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note Warning: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status
740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel)
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
1232 .loc 1 742 1
1233 .cfi_startproc
ARM GAS /tmp/ccMLQ7U7.s page 53
1234 @ args = 0, pretend = 0, frame = 16
1235 @ frame_needed = 1, uses_anonymous_args = 0
1236 0000 80B5 push {r7, lr}
1237 .cfi_def_cfa_offset 8
1238 .cfi_offset 7, -8
1239 .cfi_offset 14, -4
1240 0002 84B0 sub sp, sp, #16
1241 .cfi_def_cfa_offset 24
1242 0004 00AF add r7, sp, #0
1243 .cfi_def_cfa_register 7
1244 0006 0346 mov r3, r0
1245 0008 FB71 strb r3, [r7, #7]
743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK;
1246 .loc 1 743 21
1247 000a 0023 movs r3, #0
1248 000c FB73 strb r3, [r7, #15]
744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel));
747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1249 .loc 1 749 12
1250 000e 4CF25030 movw r0, #50000
1251 0012 FFF7FEFF bl FLASH_WaitForLastOperation
1252 0016 0346 mov r3, r0
1253 0018 FB73 strb r3, [r7, #15]
750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK)
1254 .loc 1 751 5
1255 001a FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
1256 001c 002B cmp r3, #0
1257 001e 33D1 bne .L66
752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */
754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
1258 .loc 1 754 22
1259 0020 1C4B ldr r3, .L68
1260 0022 0022 movs r2, #0
1261 0024 DA61 str r2, [r3, #28]
755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */
757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER);
1262 .loc 1 757 5
1263 0026 1C4B ldr r3, .L68+4
1264 0028 1B69 ldr r3, [r3, #16]
1265 002a 1B4A ldr r2, .L68+4
1266 002c 43F02003 orr r3, r3, #32
1267 0030 1361 str r3, [r2, #16]
758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT);
1268 .loc 1 758 5
1269 0032 194B ldr r3, .L68+4
1270 0034 1B69 ldr r3, [r3, #16]
1271 0036 184A ldr r2, .L68+4
1272 0038 43F04003 orr r3, r3, #64
1273 003c 1361 str r3, [r2, #16]
759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
ARM GAS /tmp/ccMLQ7U7.s page 54
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1274 .loc 1 761 14
1275 003e 4CF25030 movw r0, #50000
1276 0042 FFF7FEFF bl FLASH_WaitForLastOperation
1277 0046 0346 mov r3, r0
1278 0048 FB73 strb r3, [r7, #15]
762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */
764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER);
1279 .loc 1 764 5
1280 004a 134B ldr r3, .L68+4
1281 004c 1B69 ldr r3, [r3, #16]
1282 004e 124A ldr r2, .L68+4
1283 0050 23F02003 bic r3, r3, #32
1284 0054 1361 str r3, [r2, #16]
765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK)
1285 .loc 1 766 7
1286 0056 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
1287 0058 002B cmp r3, #0
1288 005a 15D1 bne .L66
767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */
769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
1289 .loc 1 769 7
1290 005c 0E4B ldr r3, .L68+4
1291 005e 1B69 ldr r3, [r3, #16]
1292 0060 0D4A ldr r2, .L68+4
1293 0062 43F01003 orr r3, r3, #16
1294 0066 1361 str r3, [r2, #16]
770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRITE_REG(OB->RDP, ReadProtectLevel);
1295 .loc 1 771 7
1296 0068 0C4B ldr r3, .L68+8
1297 006a FA79 ldrb r2, [r7, #7] @ zero_extendqisi2
1298 006c 92B2 uxth r2, r2
1299 006e 1A80 strh r2, [r3] @ movhi
772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1300 .loc 1 774 16
1301 0070 4CF25030 movw r0, #50000
1302 0074 FFF7FEFF bl FLASH_WaitForLastOperation
1303 0078 0346 mov r3, r0
1304 007a FB73 strb r3, [r7, #15]
775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */
777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
1305 .loc 1 777 7
1306 007c 064B ldr r3, .L68+4
1307 007e 1B69 ldr r3, [r3, #16]
1308 0080 054A ldr r2, .L68+4
1309 0082 23F01003 bic r3, r3, #16
1310 0086 1361 str r3, [r2, #16]
1311 .L66:
778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
ARM GAS /tmp/ccMLQ7U7.s page 55
779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
1312 .loc 1 781 10
1313 0088 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
1314 .loc 1 782 1
1315 008a 1846 mov r0, r3
1316 008c 1037 adds r7, r7, #16
1317 .cfi_def_cfa_offset 8
1318 008e BD46 mov sp, r7
1319 .cfi_def_cfa_register 13
1320 @ sp needed
1321 0090 80BD pop {r7, pc}
1322 .L69:
1323 0092 00BF .align 2
1324 .L68:
1325 0094 00000000 .word pFlash
1326 0098 00200240 .word 1073881088
1327 009c 00F8FF1F .word 536868864
1328 .cfi_endproc
1329 .LFE139:
1331 .section .text.FLASH_OB_UserConfig,"ax",%progbits
1332 .align 1
1333 .syntax unified
1334 .thumb
1335 .thumb_func
1337 FLASH_OB_UserConfig:
1338 .LFB140:
783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Program the FLASH User Option Byte.
786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param UserConfig The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY
788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6).
789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * And SDADC12_VDD_MONITOR(Bit7) for STM32F373 or STM32F378 .
790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status
791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig)
793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
1339 .loc 1 793 1
1340 .cfi_startproc
1341 @ args = 0, pretend = 0, frame = 16
1342 @ frame_needed = 1, uses_anonymous_args = 0
1343 0000 80B5 push {r7, lr}
1344 .cfi_def_cfa_offset 8
1345 .cfi_offset 7, -8
1346 .cfi_offset 14, -4
1347 0002 84B0 sub sp, sp, #16
1348 .cfi_def_cfa_offset 24
1349 0004 00AF add r7, sp, #0
1350 .cfi_def_cfa_register 7
1351 0006 0346 mov r3, r0
1352 0008 FB71 strb r3, [r7, #7]
794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK;
1353 .loc 1 794 21
1354 000a 0023 movs r3, #0
ARM GAS /tmp/ccMLQ7U7.s page 56
1355 000c FB73 strb r3, [r7, #15]
795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW)));
798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST)));
799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST)));
800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET)));
801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON)));
802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET)));
803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_SDADC12_VDD_MONITOR)
804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_SDACD_VDD_MONITOR((UserConfig&OB_SDACD_VDD_MONITOR_SET)));
805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_SDADC12_VDD_MONITOR */
806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1356 .loc 1 808 12
1357 000e 4CF25030 movw r0, #50000
1358 0012 FFF7FEFF bl FLASH_WaitForLastOperation
1359 0016 0346 mov r3, r0
1360 0018 FB73 strb r3, [r7, #15]
809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK)
1361 .loc 1 810 5
1362 001a FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
1363 001c 002B cmp r3, #0
1364 001e 1AD1 bne .L71
811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */
813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
1365 .loc 1 813 22
1366 0020 0F4B ldr r3, .L73
1367 0022 0022 movs r2, #0
1368 0024 DA61 str r2, [r3, #28]
814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */
816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
1369 .loc 1 816 5
1370 0026 0F4B ldr r3, .L73+4
1371 0028 1B69 ldr r3, [r3, #16]
1372 002a 0E4A ldr r2, .L73+4
1373 002c 43F01003 orr r3, r3, #16
1374 0030 1361 str r3, [r2, #16]
817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_SDADC12_VDD_MONITOR)
819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x08U);
820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #else
821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x88U);
1375 .loc 1 821 14
1376 0032 FB79 ldrb r3, [r7, #7]
1377 0034 63F07703 orn r3, r3, #119
1378 0038 DAB2 uxtb r2, r3
1379 .loc 1 821 7
1380 003a 0B4B ldr r3, .L73+8
1381 .loc 1 821 14
1382 003c 5A80 strh r2, [r3, #2] @ movhi
822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif
823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
ARM GAS /tmp/ccMLQ7U7.s page 57
824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1383 .loc 1 825 14
1384 003e 4CF25030 movw r0, #50000
1385 0042 FFF7FEFF bl FLASH_WaitForLastOperation
1386 0046 0346 mov r3, r0
1387 0048 FB73 strb r3, [r7, #15]
826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */
828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
1388 .loc 1 828 5
1389 004a 064B ldr r3, .L73+4
1390 004c 1B69 ldr r3, [r3, #16]
1391 004e 054A ldr r2, .L73+4
1392 0050 23F01003 bic r3, r3, #16
1393 0054 1361 str r3, [r2, #16]
1394 .L71:
829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
1395 .loc 1 831 10
1396 0056 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
1397 .loc 1 832 1
1398 0058 1846 mov r0, r3
1399 005a 1037 adds r7, r7, #16
1400 .cfi_def_cfa_offset 8
1401 005c BD46 mov sp, r7
1402 .cfi_def_cfa_register 13
1403 @ sp needed
1404 005e 80BD pop {r7, pc}
1405 .L74:
1406 .align 2
1407 .L73:
1408 0060 00000000 .word pFlash
1409 0064 00200240 .word 1073881088
1410 0068 00F8FF1F .word 536868864
1411 .cfi_endproc
1412 .LFE140:
1414 .section .text.FLASH_OB_ProgramData,"ax",%progbits
1415 .align 1
1416 .syntax unified
1417 .thumb
1418 .thumb_func
1420 FLASH_OB_ProgramData:
1421 .LFB141:
833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Programs a half word at a specified Option Byte Data address.
836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf
837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b
838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t
839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur)
840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param Address specifies the address to be programmed.
842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be 0x1FFFF804 or 0x1FFFF806.
843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param Data specifies the data to be programmed.
ARM GAS /tmp/ccMLQ7U7.s page 58
844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status
845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data)
847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
1422 .loc 1 847 1
1423 .cfi_startproc
1424 @ args = 0, pretend = 0, frame = 16
1425 @ frame_needed = 1, uses_anonymous_args = 0
1426 0000 80B5 push {r7, lr}
1427 .cfi_def_cfa_offset 8
1428 .cfi_offset 7, -8
1429 .cfi_offset 14, -4
1430 0002 84B0 sub sp, sp, #16
1431 .cfi_def_cfa_offset 24
1432 0004 00AF add r7, sp, #0
1433 .cfi_def_cfa_register 7
1434 0006 7860 str r0, [r7, #4]
1435 0008 0B46 mov r3, r1
1436 000a FB70 strb r3, [r7, #3]
848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR;
1437 .loc 1 848 21
1438 000c 0123 movs r3, #1
1439 000e FB73 strb r3, [r7, #15]
849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */
851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_DATA_ADDRESS(Address));
852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1440 .loc 1 854 12
1441 0010 4CF25030 movw r0, #50000
1442 0014 FFF7FEFF bl FLASH_WaitForLastOperation
1443 0018 0346 mov r3, r0
1444 001a FB73 strb r3, [r7, #15]
855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK)
1445 .loc 1 856 5
1446 001c FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
1447 001e 002B cmp r3, #0
1448 0020 18D1 bne .L76
857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */
859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
1449 .loc 1 859 22
1450 0022 0F4B ldr r3, .L78
1451 0024 0022 movs r2, #0
1452 0026 DA61 str r2, [r3, #28]
860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enables the Option Bytes Programming operation */
862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
1453 .loc 1 862 5
1454 0028 0E4B ldr r3, .L78+4
1455 002a 1B69 ldr r3, [r3, #16]
1456 002c 0D4A ldr r2, .L78+4
1457 002e 43F01003 orr r3, r3, #16
1458 0032 1361 str r3, [r2, #16]
863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data;
ARM GAS /tmp/ccMLQ7U7.s page 59
1459 .loc 1 863 6
1460 0034 7B68 ldr r3, [r7, #4]
1461 .loc 1 863 30
1462 0036 FA78 ldrb r2, [r7, #3] @ zero_extendqisi2
1463 0038 92B2 uxth r2, r2
1464 003a 1A80 strh r2, [r3] @ movhi
864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1465 .loc 1 866 14
1466 003c 4CF25030 movw r0, #50000
1467 0040 FFF7FEFF bl FLASH_WaitForLastOperation
1468 0044 0346 mov r3, r0
1469 0046 FB73 strb r3, [r7, #15]
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the program operation is completed, disable the OPTPG Bit */
869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
1470 .loc 1 869 5
1471 0048 064B ldr r3, .L78+4
1472 004a 1B69 ldr r3, [r3, #16]
1473 004c 054A ldr r2, .L78+4
1474 004e 23F01003 bic r3, r3, #16
1475 0052 1361 str r3, [r2, #16]
1476 .L76:
870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the Option Byte Data Program Status */
872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status;
1477 .loc 1 872 10
1478 0054 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2
873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
1479 .loc 1 873 1
1480 0056 1846 mov r0, r3
1481 0058 1037 adds r7, r7, #16
1482 .cfi_def_cfa_offset 8
1483 005a BD46 mov sp, r7
1484 .cfi_def_cfa_register 13
1485 @ sp needed
1486 005c 80BD pop {r7, pc}
1487 .L79:
1488 005e 00BF .align 2
1489 .L78:
1490 0060 00000000 .word pFlash
1491 0064 00200240 .word 1073881088
1492 .cfi_endproc
1493 .LFE141:
1495 .section .text.FLASH_OB_GetWRP,"ax",%progbits
1496 .align 1
1497 .syntax unified
1498 .thumb
1499 .thumb_func
1501 FLASH_OB_GetWRP:
1502 .LFB142:
874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Return the FLASH Write Protection Option Bytes value.
877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval The FLASH Write Protection Option Bytes value
878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
ARM GAS /tmp/ccMLQ7U7.s page 60
879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void)
880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
1503 .loc 1 880 1
1504 .cfi_startproc
1505 @ args = 0, pretend = 0, frame = 0
1506 @ frame_needed = 1, uses_anonymous_args = 0
1507 @ link register save eliminated.
1508 0000 80B4 push {r7}
1509 .cfi_def_cfa_offset 4
1510 .cfi_offset 7, -4
1511 0002 00AF add r7, sp, #0
1512 .cfi_def_cfa_register 7
881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */
882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return (uint32_t)(READ_REG(FLASH->WRPR));
1513 .loc 1 882 21
1514 0004 034B ldr r3, .L82
1515 .loc 1 882 10
1516 0006 1B6A ldr r3, [r3, #32]
883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
1517 .loc 1 883 1
1518 0008 1846 mov r0, r3
1519 000a BD46 mov sp, r7
1520 .cfi_def_cfa_register 13
1521 @ sp needed
1522 000c 5DF8047B ldr r7, [sp], #4
1523 .cfi_restore 7
1524 .cfi_def_cfa_offset 0
1525 0010 7047 bx lr
1526 .L83:
1527 0012 00BF .align 2
1528 .L82:
1529 0014 00200240 .word 1073881088
1530 .cfi_endproc
1531 .LFE142:
1533 .section .text.FLASH_OB_GetRDP,"ax",%progbits
1534 .align 1
1535 .syntax unified
1536 .thumb
1537 .thumb_func
1539 FLASH_OB_GetRDP:
1540 .LFB143:
884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Returns the FLASH Read Protection level.
887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval FLASH RDP level
888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values:
889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection
890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection
892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void)
894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
1541 .loc 1 894 1
1542 .cfi_startproc
1543 @ args = 0, pretend = 0, frame = 8
1544 @ frame_needed = 1, uses_anonymous_args = 0
1545 @ link register save eliminated.
ARM GAS /tmp/ccMLQ7U7.s page 61
1546 0000 80B4 push {r7}
1547 .cfi_def_cfa_offset 4
1548 .cfi_offset 7, -4
1549 0002 83B0 sub sp, sp, #12
1550 .cfi_def_cfa_offset 16
1551 0004 00AF add r7, sp, #0
1552 .cfi_def_cfa_register 7
895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t tmp_reg = 0U;
1553 .loc 1 895 12
1554 0006 0023 movs r3, #0
1555 0008 7B60 str r3, [r7, #4]
896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Read RDP level bits */
898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_RDPRT)
899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, FLASH_OBR_RDPRT);
1556 .loc 1 899 13
1557 000a 0B4B ldr r3, .L88
1558 000c DB69 ldr r3, [r3, #28]
1559 .loc 1 899 11
1560 000e 03F00603 and r3, r3, #6
1561 0012 7B60 str r3, [r7, #4]
900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(FLASH_OBR_LEVEL1_PROT)
901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, (FLASH_OBR_LEVEL1_PROT | FLASH_OBR_LEVEL2_PROT));
902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_RDPRT */
903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_RDPRT)
905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (tmp_reg == FLASH_OBR_RDPRT_2)
1562 .loc 1 905 6
1563 0014 7B68 ldr r3, [r7, #4]
1564 0016 062B cmp r3, #6
1565 0018 01D1 bne .L85
906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(FLASH_OBR_LEVEL1_PROT)
907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (tmp_reg == FLASH_OBR_LEVEL2_PROT)
908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_RDPRT */
909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_2;
1566 .loc 1 910 12
1567 001a CC23 movs r3, #204
1568 001c 05E0 b .L86
1569 .L85:
911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else if (tmp_reg == 0U)
1570 .loc 1 912 11
1571 001e 7B68 ldr r3, [r7, #4]
1572 0020 002B cmp r3, #0
1573 0022 01D1 bne .L87
913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_0;
1574 .loc 1 914 12
1575 0024 AA23 movs r3, #170
1576 0026 00E0 b .L86
1577 .L87:
915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else
917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_1;
1578 .loc 1 918 12
ARM GAS /tmp/ccMLQ7U7.s page 62
1579 0028 BB23 movs r3, #187
1580 .L86:
919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
1581 .loc 1 920 1
1582 002a 1846 mov r0, r3
1583 002c 0C37 adds r7, r7, #12
1584 .cfi_def_cfa_offset 4
1585 002e BD46 mov sp, r7
1586 .cfi_def_cfa_register 13
1587 @ sp needed
1588 0030 5DF8047B ldr r7, [sp], #4
1589 .cfi_restore 7
1590 .cfi_def_cfa_offset 0
1591 0034 7047 bx lr
1592 .L89:
1593 0036 00BF .align 2
1594 .L88:
1595 0038 00200240 .word 1073881088
1596 .cfi_endproc
1597 .LFE143:
1599 .section .text.FLASH_OB_GetUser,"ax",%progbits
1600 .align 1
1601 .syntax unified
1602 .thumb
1603 .thumb_func
1605 FLASH_OB_GetUser:
1606 .LFB144:
921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value.
924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY(Bit2), nB
925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6).
926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * And SDADC12_VDD_MONITOR(Bit7) for STM32F373 or STM32F378 .
927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void)
929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
1607 .loc 1 929 1
1608 .cfi_startproc
1609 @ args = 0, pretend = 0, frame = 8
1610 @ frame_needed = 1, uses_anonymous_args = 0
1611 @ link register save eliminated.
1612 0000 80B4 push {r7}
1613 .cfi_def_cfa_offset 4
1614 .cfi_offset 7, -4
1615 0002 83B0 sub sp, sp, #12
1616 .cfi_def_cfa_offset 16
1617 0004 00AF add r7, sp, #0
1618 .cfi_def_cfa_register 7
930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the User Option Byte */
931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> FLASH_POSITION_IWDGSW_BIT);
1619 .loc 1 931 21
1620 0006 0B4B ldr r3, .L93
1621 0008 DB69 ldr r3, [r3, #28]
1622 .loc 1 931 42
1623 000a 03F4EE43 and r3, r3, #30464
1624 000e 4FF48072 mov r2, #256
ARM GAS /tmp/ccMLQ7U7.s page 63
1625 0012 7A60 str r2, [r7, #4]
1626 .LBB12:
1627 .LBB13:
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1628 .loc 2 988 4
1629 0014 7A68 ldr r2, [r7, #4]
1630 .syntax unified
1631 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1632 0016 92FAA2F2 rbit r2, r2
1633 @ 0 "" 2
1634 .thumb
1635 .syntax unified
1636 001a 3A60 str r2, [r7]
1637 .loc 2 1001 10
1638 001c 3A68 ldr r2, [r7]
1639 .LBE13:
1640 .LBE12:
1641 .loc 1 931 63 discriminator 1
1642 001e B2FA82F2 clz r2, r2
1643 .loc 1 931 63 is_stmt 0 discriminator 2
1644 0022 D2B2 uxtb r2, r2
1645 .loc 1 931 60 is_stmt 1 discriminator 2
1646 0024 D340 lsrs r3, r3, r2
1647 .loc 1 931 10 discriminator 2
1648 0026 DBB2 uxtb r3, r3
932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
1649 .loc 1 932 1
1650 0028 1846 mov r0, r3
1651 002a 0C37 adds r7, r7, #12
1652 .cfi_def_cfa_offset 4
1653 002c BD46 mov sp, r7
1654 .cfi_def_cfa_register 13
1655 @ sp needed
1656 002e 5DF8047B ldr r7, [sp], #4
1657 .cfi_restore 7
1658 .cfi_def_cfa_offset 0
1659 0032 7047 bx lr
1660 .L94:
1661 .align 2
1662 .L93:
1663 0034 00200240 .word 1073881088
1664 .cfi_endproc
1665 .LFE144:
1667 .section .text.FLASH_PageErase,"ax",%progbits
1668 .align 1
1669 .global FLASH_PageErase
1670 .syntax unified
1671 .thumb
1672 .thumb_func
1674 FLASH_PageErase:
1675 .LFB145:
933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
ARM GAS /tmp/ccMLQ7U7.s page 64
939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @}
940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH
943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Functions
947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{
948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /**
951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory page
952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param PageAddress FLASH page to erase
953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series
954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *
955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None
956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */
957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress)
958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** {
1676 .loc 1 958 1
1677 .cfi_startproc
1678 @ args = 0, pretend = 0, frame = 8
1679 @ frame_needed = 1, uses_anonymous_args = 0
1680 @ link register save eliminated.
1681 0000 80B4 push {r7}
1682 .cfi_def_cfa_offset 4
1683 .cfi_offset 7, -4
1684 0002 83B0 sub sp, sp, #12
1685 .cfi_def_cfa_offset 16
1686 0004 00AF add r7, sp, #0
1687 .cfi_def_cfa_register 7
1688 0006 7860 str r0, [r7, #4]
959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */
960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
1689 .loc 1 960 20
1690 0008 0B4B ldr r3, .L96
1691 000a 0022 movs r2, #0
1692 000c DA61 str r2, [r3, #28]
961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c ****
962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Proceed to erase the page */
963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_PER);
1693 .loc 1 963 5
1694 000e 0B4B ldr r3, .L96+4
1695 0010 1B69 ldr r3, [r3, #16]
1696 0012 0A4A ldr r2, .L96+4
1697 0014 43F00203 orr r3, r3, #2
1698 0018 1361 str r3, [r2, #16]
964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRITE_REG(FLASH->AR, PageAddress);
1699 .loc 1 964 5
1700 001a 084A ldr r2, .L96+4
1701 001c 7B68 ldr r3, [r7, #4]
1702 001e 5361 str r3, [r2, #20]
965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT);
1703 .loc 1 965 5
1704 0020 064B ldr r3, .L96+4
1705 0022 1B69 ldr r3, [r3, #16]
ARM GAS /tmp/ccMLQ7U7.s page 65
1706 0024 054A ldr r2, .L96+4
1707 0026 43F04003 orr r3, r3, #64
1708 002a 1361 str r3, [r2, #16]
966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** }
1709 .loc 1 966 1
1710 002c 00BF nop
1711 002e 0C37 adds r7, r7, #12
1712 .cfi_def_cfa_offset 4
1713 0030 BD46 mov sp, r7
1714 .cfi_def_cfa_register 13
1715 @ sp needed
1716 0032 5DF8047B ldr r7, [sp], #4
1717 .cfi_restore 7
1718 .cfi_def_cfa_offset 0
1719 0036 7047 bx lr
1720 .L97:
1721 .align 2
1722 .L96:
1723 0038 00000000 .word pFlash
1724 003c 00200240 .word 1073881088
1725 .cfi_endproc
1726 .LFE145:
1728 .text
1729 .Letext0:
1730 .file 3 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl
1731 .file 4 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl
1732 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
1733 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
1734 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h"
1735 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h"
ARM GAS /tmp/ccMLQ7U7.s page 66
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_flash_ex.c
/tmp/ccMLQ7U7.s:21 .text.HAL_FLASHEx_Erase:00000000 $t
/tmp/ccMLQ7U7.s:27 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase
/tmp/ccMLQ7U7.s:747 .text.FLASH_MassErase:00000000 FLASH_MassErase
/tmp/ccMLQ7U7.s:1674 .text.FLASH_PageErase:00000000 FLASH_PageErase
/tmp/ccMLQ7U7.s:172 .text.HAL_FLASHEx_Erase:000000cc $d
/tmp/ccMLQ7U7.s:178 .text.HAL_FLASHEx_Erase_IT:00000000 $t
/tmp/ccMLQ7U7.s:184 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT
/tmp/ccMLQ7U7.s:283 .text.HAL_FLASHEx_Erase_IT:00000078 $d
/tmp/ccMLQ7U7.s:289 .text.HAL_FLASHEx_OBErase:00000000 $t
/tmp/ccMLQ7U7.s:295 .text.HAL_FLASHEx_OBErase:00000000 HAL_FLASHEx_OBErase
/tmp/ccMLQ7U7.s:1539 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP
/tmp/ccMLQ7U7.s:1230 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig
/tmp/ccMLQ7U7.s:380 .text.HAL_FLASHEx_OBErase:0000007c $d
/tmp/ccMLQ7U7.s:386 .text.HAL_FLASHEx_OBProgram:00000000 $t
/tmp/ccMLQ7U7.s:392 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram
/tmp/ccMLQ7U7.s:798 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP
/tmp/ccMLQ7U7.s:1015 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP
/tmp/ccMLQ7U7.s:1337 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig
/tmp/ccMLQ7U7.s:1420 .text.FLASH_OB_ProgramData:00000000 FLASH_OB_ProgramData
/tmp/ccMLQ7U7.s:569 .text.HAL_FLASHEx_OBProgram:000000f4 $d
/tmp/ccMLQ7U7.s:574 .text.HAL_FLASHEx_OBGetConfig:00000000 $t
/tmp/ccMLQ7U7.s:580 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig
/tmp/ccMLQ7U7.s:1501 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP
/tmp/ccMLQ7U7.s:1605 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser
/tmp/ccMLQ7U7.s:631 .text.HAL_FLASHEx_OBGetUserData:00000000 $t
/tmp/ccMLQ7U7.s:637 .text.HAL_FLASHEx_OBGetUserData:00000000 HAL_FLASHEx_OBGetUserData
/tmp/ccMLQ7U7.s:736 .text.HAL_FLASHEx_OBGetUserData:00000068 $d
/tmp/ccMLQ7U7.s:742 .text.FLASH_MassErase:00000000 $t
/tmp/ccMLQ7U7.s:787 .text.FLASH_MassErase:0000002c $d
/tmp/ccMLQ7U7.s:793 .text.FLASH_OB_EnableWRP:00000000 $t
/tmp/ccMLQ7U7.s:1003 .text.FLASH_OB_EnableWRP:00000138 $d
/tmp/ccMLQ7U7.s:1010 .text.FLASH_OB_DisableWRP:00000000 $t
/tmp/ccMLQ7U7.s:1218 .text.FLASH_OB_DisableWRP:00000134 $d
/tmp/ccMLQ7U7.s:1225 .text.FLASH_OB_RDP_LevelConfig:00000000 $t
/tmp/ccMLQ7U7.s:1325 .text.FLASH_OB_RDP_LevelConfig:00000094 $d
/tmp/ccMLQ7U7.s:1332 .text.FLASH_OB_UserConfig:00000000 $t
/tmp/ccMLQ7U7.s:1408 .text.FLASH_OB_UserConfig:00000060 $d
/tmp/ccMLQ7U7.s:1415 .text.FLASH_OB_ProgramData:00000000 $t
/tmp/ccMLQ7U7.s:1490 .text.FLASH_OB_ProgramData:00000060 $d
/tmp/ccMLQ7U7.s:1496 .text.FLASH_OB_GetWRP:00000000 $t
/tmp/ccMLQ7U7.s:1529 .text.FLASH_OB_GetWRP:00000014 $d
/tmp/ccMLQ7U7.s:1534 .text.FLASH_OB_GetRDP:00000000 $t
/tmp/ccMLQ7U7.s:1595 .text.FLASH_OB_GetRDP:00000038 $d
/tmp/ccMLQ7U7.s:1600 .text.FLASH_OB_GetUser:00000000 $t
/tmp/ccMLQ7U7.s:1663 .text.FLASH_OB_GetUser:00000034 $d
/tmp/ccMLQ7U7.s:1668 .text.FLASH_PageErase:00000000 $t
/tmp/ccMLQ7U7.s:1723 .text.FLASH_PageErase:00000038 $d
UNDEFINED SYMBOLS
FLASH_WaitForLastOperation
pFlash