ARM GAS /tmp/ccM1MpQr.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 6 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_can.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c" 20 .section .text.HAL_CAN_Init,"ax",%progbits 21 .align 1 22 .global HAL_CAN_Init 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_CAN_Init: 28 .LFB130: 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ****************************************************************************** 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @file stm32f3xx_hal_can.c 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @author MCD Application Team 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN HAL module driver. 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * functionalities of the Controller Area Network (CAN) peripheral: 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Configuration functions 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Control functions 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Interrupts management 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Callbacks functions 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Peripheral State and Error functions 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ****************************************************************************** 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @attention 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Copyright (c) 2016 STMicroelectronics. 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * All rights reserved. 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This software is licensed under terms that can be found in the LICENSE file 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * in the root directory of this software component. 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ****************************************************************************** 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### How to use this driver ##### 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] ARM GAS /tmp/ccM1MpQr.s page 2 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Initialize the CAN low level resources by implementing the 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspInit(): 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Configure CAN pins 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Enable the clock for the CAN GPIOs 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Configure CAN pins as alternate function open-drain 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Configure the CAN interrupt priority using 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_NVIC_SetPriority() 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ() 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler() 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** function resorts to HAL_CAN_MspInit() for low-level initialization. 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Configure the reception filters using the following configuration 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** functions: 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_ConfigFilter() 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Start the CAN module using HAL_CAN_Start() function. At this level 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the node is active on the bus: it receive messages, and can send 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** messages. 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) To manage messages transmission, the following Tx control functions 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can be used: 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_AddTxMessage() to request transmission of a new 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** message. 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** message. 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mailboxes. 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_IsTxMessagePending() to check if a message is pending 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** in a Tx mailbox. 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** sent, if time triggered communication mode is enabled. 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) When a message is received into the CAN Rx FIFOs, it can be retrieved 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using the HAL_CAN_GetRxMessage() function. The function 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** stored in the Rx Fifo. 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Calling the HAL_CAN_Stop() function stops the CAN module. 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The deinitialization is achieved with HAL_CAN_DeInit() function. 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Polling mode operation *** 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================== 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Reception: 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel() 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** until at least one message is received. 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Then get the message using HAL_CAN_GetRxMessage(). 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Transmission: 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Monitor the Tx mailboxes availability until at least one Tx 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel(). ARM GAS /tmp/ccM1MpQr.s page 3 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Then request transmission of a message using 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_AddTxMessage(). 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Interrupt mode operation *** 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ================================ 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Notifications are activated using HAL_CAN_ActivateNotification() 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** function. Then, the process can be controlled through the 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** available user callbacks: HAL_CAN_xxxCallback(), using same APIs 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage(). 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Notifications can be deactivated using 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_DeactivateNotification() function. 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** here. 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Directly get the Rx message in the callback, using 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxMessage(). 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Or deactivate the notification in the callback without 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** getting the Rx message. The Rx message can then be got later 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using HAL_CAN_GetRxMessage(). Once the Rx message have been 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** read, the notification can be activated again. 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Sleep mode *** 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ================== 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The CAN peripheral can be put in sleep mode (low power), using 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** current CAN activity (transmission or reception of a CAN frame) will 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** be completed. 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) A notification can be activated to be informed when the sleep mode 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** will be entered. 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) It can be checked if the sleep mode is entered using 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_IsSleepActive(). 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Note that the CAN state (accessible from the API HAL_CAN_GetState()) 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** submitted (the sleep mode is not yet entered), and become 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective. 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The wake-up from sleep mode can be triggered by two ways: 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Using HAL_CAN_WakeUp(). When returning from this function, 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the sleep mode is exited (if return status is HAL_OK). 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) When a start of Rx CAN frame is detected by the CAN peripheral, 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if automatic wake up mode is enabled. 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Callback registration *** 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================= 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** allows the user to configure dynamically the driver callbacks. ARM GAS /tmp/ccM1MpQr.s page 4 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Use Function HAL_CAN_RegisterCallback() to register an interrupt callback. 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Function HAL_CAN_RegisterCallback() allows to register following callbacks: 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) SleepCallback : Sleep Callback. 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) ErrorCallback : Error Callback. 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspInitCallback : CAN MspInit. 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit. 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This function takes as parameters the HAL peripheral handle, the Callback ID 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and a pointer to the user callback function. 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Use function HAL_CAN_UnRegisterCallback() to reset a callback to the default 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** weak function. 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle, 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and the Callback ID. 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This function allows to reset following callbacks: 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) SleepCallback : Sleep Callback. 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) ErrorCallback : Error Callback. 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspInitCallback : CAN MspInit. 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit. 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** By default, after the HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET, 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** all callbacks are set to the corresponding weak functions: 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** example HAL_CAN_ErrorCallback(). 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Exception done for MspInit and MspDeInit functions that are 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** reset to the legacy weak function in the HAL_CAN_Init()/ HAL_CAN_DeInit() only when 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** these callbacks are null (not registered beforehand). 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if not, MspInit or MspDeInit are not null, the HAL_CAN_Init()/ HAL_CAN_DeInit() 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only. 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Exception done MspInit/MspDeInit that can be registered/unregistered 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state, 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** In that case first register the MspInit/MspDeInit user callbacks 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using HAL_CAN_RegisterCallback() before calling HAL_CAN_DeInit() ARM GAS /tmp/ccM1MpQr.s page 5 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** or HAL_CAN_Init() function. 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** not defined, the callback registration feature is not available and all callbacks 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** are set to the corresponding weak functions. 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ****************************************************************************** 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Includes ------------------------------------------------------------------*/ 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #include "stm32f3xx_hal.h" 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @addtogroup STM32F3xx_HAL_Driver 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if defined(CAN) 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN CAN 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN driver modules 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #ifdef HAL_CAN_MODULE_ENABLED 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #ifdef HAL_CAN_LEGACY_MODULE_ENABLED 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once" 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private typedef -----------------------------------------------------------*/ 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private define ------------------------------------------------------------*/ 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Private_Constants CAN Private Constants 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #define CAN_TIMEOUT_VALUE 10U 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private macro -------------------------------------------------------------*/ 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private variables ---------------------------------------------------------*/ 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private function prototypes -----------------------------------------------*/ 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exported functions --------------------------------------------------------*/ 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions CAN Exported Functions 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initialization and Configuration functions 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Initialization and de-initialization functions ##### 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to: 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Init : Initialize and configure the CAN. ARM GAS /tmp/ccM1MpQr.s page 6 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_DeInit : De-initialize the CAN. 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_MspInit : Initialize the CAN MSP. 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP. 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initializes the CAN peripheral according to the specified 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * parameters in the CAN_InitStruct. 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 29 .loc 1 275 1 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 16 32 @ frame_needed = 1, uses_anonymous_args = 0 33 0000 80B5 push {r7, lr} 34 .cfi_def_cfa_offset 8 35 .cfi_offset 7, -8 36 .cfi_offset 14, -4 37 0002 84B0 sub sp, sp, #16 38 .cfi_def_cfa_offset 24 39 0004 00AF add r7, sp, #0 40 .cfi_def_cfa_register 7 41 0006 7860 str r0, [r7, #4] 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart; 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */ 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan == NULL) 42 .loc 1 279 6 43 0008 7B68 ldr r3, [r7, #4] 44 000a 002B cmp r3, #0 45 000c 01D1 bne .L2 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 46 .loc 1 281 12 47 000e 0123 movs r3, #1 48 0010 EDE0 b .L3 49 .L2: 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode)); 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); ARM GAS /tmp/ccM1MpQr.s page 7 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET) 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset callbacks to legacy functions */ 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0M 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0F 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1M 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1F 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbo 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbo 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbo 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbo 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbo 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbo 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCal 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFr 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCal 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->MspInitCallback == NULL) 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */ 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */ 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback(hcan); 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET) 50 .loc 1 326 11 51 0012 7B68 ldr r3, [r7, #4] 52 0014 93F82030 ldrb r3, [r3, #32] 53 0018 DBB2 uxtb r3, r3 54 .loc 1 326 6 55 001a 002B cmp r3, #0 56 001c 02D1 bne .L4 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */ 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspInit(hcan); 57 .loc 1 329 5 58 001e 7868 ldr r0, [r7, #4] 59 0020 FFF7FEFF bl HAL_CAN_MspInit 60 .L4: 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request initialisation */ 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 61 .loc 1 334 3 62 0024 7B68 ldr r3, [r7, #4] 63 0026 1B68 ldr r3, [r3] 64 0028 1A68 ldr r2, [r3] 65 002a 7B68 ldr r3, [r7, #4] 66 002c 1B68 ldr r3, [r3] ARM GAS /tmp/ccM1MpQr.s page 8 67 002e 42F00102 orr r2, r2, #1 68 0032 1A60 str r2, [r3] 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */ 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick(); 69 .loc 1 337 15 70 0034 FFF7FEFF bl HAL_GetTick 71 0038 F860 str r0, [r7, #12] 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait initialisation acknowledge */ 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 72 .loc 1 340 9 73 003a 12E0 b .L5 74 .L6: 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 75 .loc 1 342 10 76 003c FFF7FEFF bl HAL_GetTick 77 0040 0246 mov r2, r0 78 .loc 1 342 24 discriminator 1 79 0042 FB68 ldr r3, [r7, #12] 80 0044 D31A subs r3, r2, r3 81 .loc 1 342 8 discriminator 1 82 0046 0A2B cmp r3, #10 83 0048 0BD9 bls .L5 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 84 .loc 1 345 11 85 004a 7B68 ldr r3, [r7, #4] 86 004c 5B6A ldr r3, [r3, #36] 87 .loc 1 345 23 88 004e 43F40032 orr r2, r3, #131072 89 0052 7B68 ldr r3, [r7, #4] 90 0054 5A62 str r2, [r3, #36] 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; 91 .loc 1 348 19 92 0056 7B68 ldr r3, [r7, #4] 93 0058 0522 movs r2, #5 94 005a 83F82020 strb r2, [r3, #32] 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 95 .loc 1 350 14 96 005e 0123 movs r3, #1 97 0060 C5E0 b .L3 98 .L5: 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 99 .loc 1 340 15 100 0062 7B68 ldr r3, [r7, #4] 101 0064 1B68 ldr r3, [r3] 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 102 .loc 1 340 25 103 0066 5B68 ldr r3, [r3, #4] 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 104 .loc 1 340 31 ARM GAS /tmp/ccM1MpQr.s page 9 105 0068 03F00103 and r3, r3, #1 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 106 .loc 1 340 47 107 006c 002B cmp r3, #0 108 006e E5D0 beq .L6 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exit from sleep mode */ 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 109 .loc 1 355 3 110 0070 7B68 ldr r3, [r7, #4] 111 0072 1B68 ldr r3, [r3] 112 0074 1A68 ldr r2, [r3] 113 0076 7B68 ldr r3, [r7, #4] 114 0078 1B68 ldr r3, [r3] 115 007a 22F00202 bic r2, r2, #2 116 007e 1A60 str r2, [r3] 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */ 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick(); 117 .loc 1 358 15 118 0080 FFF7FEFF bl HAL_GetTick 119 0084 F860 str r0, [r7, #12] 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Sleep mode leave acknowledge */ 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 120 .loc 1 361 9 121 0086 12E0 b .L7 122 .L8: 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 123 .loc 1 363 10 124 0088 FFF7FEFF bl HAL_GetTick 125 008c 0246 mov r2, r0 126 .loc 1 363 24 discriminator 1 127 008e FB68 ldr r3, [r7, #12] 128 0090 D31A subs r3, r2, r3 129 .loc 1 363 8 discriminator 1 130 0092 0A2B cmp r3, #10 131 0094 0BD9 bls .L7 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 132 .loc 1 366 11 133 0096 7B68 ldr r3, [r7, #4] 134 0098 5B6A ldr r3, [r3, #36] 135 .loc 1 366 23 136 009a 43F40032 orr r2, r3, #131072 137 009e 7B68 ldr r3, [r7, #4] 138 00a0 5A62 str r2, [r3, #36] 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; 139 .loc 1 369 19 140 00a2 7B68 ldr r3, [r7, #4] 141 00a4 0522 movs r2, #5 ARM GAS /tmp/ccM1MpQr.s page 10 142 00a6 83F82020 strb r2, [r3, #32] 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 143 .loc 1 371 14 144 00aa 0123 movs r3, #1 145 00ac 9FE0 b .L3 146 .L7: 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 147 .loc 1 361 15 148 00ae 7B68 ldr r3, [r7, #4] 149 00b0 1B68 ldr r3, [r3] 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 150 .loc 1 361 25 151 00b2 5B68 ldr r3, [r3, #4] 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 152 .loc 1 361 31 153 00b4 03F00203 and r3, r3, #2 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 154 .loc 1 361 47 155 00b8 002B cmp r3, #0 156 00ba E5D1 bne .L8 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the time triggered communication mode */ 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.TimeTriggeredMode == ENABLE) 157 .loc 1 376 17 158 00bc 7B68 ldr r3, [r7, #4] 159 00be 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 160 .loc 1 376 6 161 00c0 012B cmp r3, #1 162 00c2 08D1 bne .L9 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 163 .loc 1 378 5 164 00c4 7B68 ldr r3, [r7, #4] 165 00c6 1B68 ldr r3, [r3] 166 00c8 1A68 ldr r2, [r3] 167 00ca 7B68 ldr r3, [r7, #4] 168 00cc 1B68 ldr r3, [r3] 169 00ce 42F08002 orr r2, r2, #128 170 00d2 1A60 str r2, [r3] 171 00d4 07E0 b .L10 172 .L9: 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 173 .loc 1 382 5 174 00d6 7B68 ldr r3, [r7, #4] 175 00d8 1B68 ldr r3, [r3] 176 00da 1A68 ldr r2, [r3] 177 00dc 7B68 ldr r3, [r7, #4] 178 00de 1B68 ldr r3, [r3] 179 00e0 22F08002 bic r2, r2, #128 180 00e4 1A60 str r2, [r3] 181 .L10: ARM GAS /tmp/ccM1MpQr.s page 11 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic bus-off management */ 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoBusOff == ENABLE) 182 .loc 1 386 17 183 00e6 7B68 ldr r3, [r7, #4] 184 00e8 5B7E ldrb r3, [r3, #25] @ zero_extendqisi2 185 .loc 1 386 6 186 00ea 012B cmp r3, #1 187 00ec 08D1 bne .L11 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 188 .loc 1 388 5 189 00ee 7B68 ldr r3, [r7, #4] 190 00f0 1B68 ldr r3, [r3] 191 00f2 1A68 ldr r2, [r3] 192 00f4 7B68 ldr r3, [r7, #4] 193 00f6 1B68 ldr r3, [r3] 194 00f8 42F04002 orr r2, r2, #64 195 00fc 1A60 str r2, [r3] 196 00fe 07E0 b .L12 197 .L11: 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 198 .loc 1 392 5 199 0100 7B68 ldr r3, [r7, #4] 200 0102 1B68 ldr r3, [r3] 201 0104 1A68 ldr r2, [r3] 202 0106 7B68 ldr r3, [r7, #4] 203 0108 1B68 ldr r3, [r3] 204 010a 22F04002 bic r2, r2, #64 205 010e 1A60 str r2, [r3] 206 .L12: 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic wake-up mode */ 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoWakeUp == ENABLE) 207 .loc 1 396 17 208 0110 7B68 ldr r3, [r7, #4] 209 0112 9B7E ldrb r3, [r3, #26] @ zero_extendqisi2 210 .loc 1 396 6 211 0114 012B cmp r3, #1 212 0116 08D1 bne .L13 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 213 .loc 1 398 5 214 0118 7B68 ldr r3, [r7, #4] 215 011a 1B68 ldr r3, [r3] 216 011c 1A68 ldr r2, [r3] 217 011e 7B68 ldr r3, [r7, #4] 218 0120 1B68 ldr r3, [r3] 219 0122 42F02002 orr r2, r2, #32 220 0126 1A60 str r2, [r3] 221 0128 07E0 b .L14 222 .L13: ARM GAS /tmp/ccM1MpQr.s page 12 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 223 .loc 1 402 5 224 012a 7B68 ldr r3, [r7, #4] 225 012c 1B68 ldr r3, [r3] 226 012e 1A68 ldr r2, [r3] 227 0130 7B68 ldr r3, [r7, #4] 228 0132 1B68 ldr r3, [r3] 229 0134 22F02002 bic r2, r2, #32 230 0138 1A60 str r2, [r3] 231 .L14: 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic retransmission */ 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoRetransmission == ENABLE) 232 .loc 1 406 17 233 013a 7B68 ldr r3, [r7, #4] 234 013c DB7E ldrb r3, [r3, #27] @ zero_extendqisi2 235 .loc 1 406 6 236 013e 012B cmp r3, #1 237 0140 08D1 bne .L15 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); 238 .loc 1 408 5 239 0142 7B68 ldr r3, [r7, #4] 240 0144 1B68 ldr r3, [r3] 241 0146 1A68 ldr r2, [r3] 242 0148 7B68 ldr r3, [r7, #4] 243 014a 1B68 ldr r3, [r3] 244 014c 22F01002 bic r2, r2, #16 245 0150 1A60 str r2, [r3] 246 0152 07E0 b .L16 247 .L15: 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); 248 .loc 1 412 5 249 0154 7B68 ldr r3, [r7, #4] 250 0156 1B68 ldr r3, [r3] 251 0158 1A68 ldr r2, [r3] 252 015a 7B68 ldr r3, [r7, #4] 253 015c 1B68 ldr r3, [r3] 254 015e 42F01002 orr r2, r2, #16 255 0162 1A60 str r2, [r3] 256 .L16: 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the receive FIFO locked mode */ 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.ReceiveFifoLocked == ENABLE) 257 .loc 1 416 17 258 0164 7B68 ldr r3, [r7, #4] 259 0166 1B7F ldrb r3, [r3, #28] @ zero_extendqisi2 260 .loc 1 416 6 261 0168 012B cmp r3, #1 ARM GAS /tmp/ccM1MpQr.s page 13 262 016a 08D1 bne .L17 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 263 .loc 1 418 5 264 016c 7B68 ldr r3, [r7, #4] 265 016e 1B68 ldr r3, [r3] 266 0170 1A68 ldr r2, [r3] 267 0172 7B68 ldr r3, [r7, #4] 268 0174 1B68 ldr r3, [r3] 269 0176 42F00802 orr r2, r2, #8 270 017a 1A60 str r2, [r3] 271 017c 07E0 b .L18 272 .L17: 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 273 .loc 1 422 5 274 017e 7B68 ldr r3, [r7, #4] 275 0180 1B68 ldr r3, [r3] 276 0182 1A68 ldr r2, [r3] 277 0184 7B68 ldr r3, [r7, #4] 278 0186 1B68 ldr r3, [r3] 279 0188 22F00802 bic r2, r2, #8 280 018c 1A60 str r2, [r3] 281 .L18: 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the transmit FIFO priority */ 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.TransmitFifoPriority == ENABLE) 282 .loc 1 426 17 283 018e 7B68 ldr r3, [r7, #4] 284 0190 5B7F ldrb r3, [r3, #29] @ zero_extendqisi2 285 .loc 1 426 6 286 0192 012B cmp r3, #1 287 0194 08D1 bne .L19 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 288 .loc 1 428 5 289 0196 7B68 ldr r3, [r7, #4] 290 0198 1B68 ldr r3, [r3] 291 019a 1A68 ldr r2, [r3] 292 019c 7B68 ldr r3, [r7, #4] 293 019e 1B68 ldr r3, [r3] 294 01a0 42F00402 orr r2, r2, #4 295 01a4 1A60 str r2, [r3] 296 01a6 07E0 b .L20 297 .L19: 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 298 .loc 1 432 5 299 01a8 7B68 ldr r3, [r7, #4] 300 01aa 1B68 ldr r3, [r3] 301 01ac 1A68 ldr r2, [r3] 302 01ae 7B68 ldr r3, [r7, #4] ARM GAS /tmp/ccM1MpQr.s page 14 303 01b0 1B68 ldr r3, [r3] 304 01b2 22F00402 bic r2, r2, #4 305 01b6 1A60 str r2, [r3] 306 .L20: 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the bit timing register */ 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | 307 .loc 1 436 3 308 01b8 7B68 ldr r3, [r7, #4] 309 01ba 9A68 ldr r2, [r3, #8] 310 01bc 7B68 ldr r3, [r7, #4] 311 01be DB68 ldr r3, [r3, #12] 312 01c0 1A43 orrs r2, r2, r3 313 01c2 7B68 ldr r3, [r7, #4] 314 01c4 1B69 ldr r3, [r3, #16] 315 01c6 1A43 orrs r2, r2, r3 316 01c8 7B68 ldr r3, [r7, #4] 317 01ca 5B69 ldr r3, [r3, #20] 318 01cc 42EA0301 orr r1, r2, r3 319 01d0 7B68 ldr r3, [r7, #4] 320 01d2 5B68 ldr r3, [r3, #4] 321 01d4 5A1E subs r2, r3, #1 322 01d6 7B68 ldr r3, [r7, #4] 323 01d8 1B68 ldr r3, [r3] 324 01da 0A43 orrs r2, r2, r1 325 01dc DA61 str r2, [r3, #28] 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.SyncJumpWidth | 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.TimeSeg1 | 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.TimeSeg2 | 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (hcan->Init.Prescaler - 1U))); 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialize the error code */ 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; 326 .loc 1 443 19 327 01de 7B68 ldr r3, [r7, #4] 328 01e0 0022 movs r2, #0 329 01e2 5A62 str r2, [r3, #36] 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialize the CAN state */ 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY; 330 .loc 1 446 15 331 01e4 7B68 ldr r3, [r7, #4] 332 01e6 0122 movs r2, #1 333 01e8 83F82020 strb r2, [r3, #32] 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 334 .loc 1 449 10 335 01ec 0023 movs r3, #0 336 .L3: 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 337 .loc 1 450 1 338 01ee 1846 mov r0, r3 339 01f0 1037 adds r7, r7, #16 340 .cfi_def_cfa_offset 8 341 01f2 BD46 mov sp, r7 ARM GAS /tmp/ccM1MpQr.s page 15 342 .cfi_def_cfa_register 13 343 @ sp needed 344 01f4 80BD pop {r7, pc} 345 .cfi_endproc 346 .LFE130: 348 .section .text.HAL_CAN_DeInit,"ax",%progbits 349 .align 1 350 .global HAL_CAN_DeInit 351 .syntax unified 352 .thumb 353 .thumb_func 355 HAL_CAN_DeInit: 356 .LFB131: 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Deinitializes the CAN peripheral registers to their default 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * reset values. 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 357 .loc 1 460 1 358 .cfi_startproc 359 @ args = 0, pretend = 0, frame = 8 360 @ frame_needed = 1, uses_anonymous_args = 0 361 0000 80B5 push {r7, lr} 362 .cfi_def_cfa_offset 8 363 .cfi_offset 7, -8 364 .cfi_offset 14, -4 365 0002 82B0 sub sp, sp, #8 366 .cfi_def_cfa_offset 16 367 0004 00AF add r7, sp, #0 368 .cfi_def_cfa_register 7 369 0006 7860 str r0, [r7, #4] 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */ 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan == NULL) 370 .loc 1 462 6 371 0008 7B68 ldr r3, [r7, #4] 372 000a 002B cmp r3, #0 373 000c 01D1 bne .L22 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 374 .loc 1 464 12 375 000e 0123 movs r3, #1 376 0010 15E0 b .L23 377 .L22: 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Stop the CAN module */ 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (void)HAL_CAN_Stop(hcan); 378 .loc 1 471 9 379 0012 7868 ldr r0, [r7, #4] ARM GAS /tmp/ccM1MpQr.s page 16 380 0014 FFF7FEFF bl HAL_CAN_Stop 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->MspDeInitCallback == NULL) 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */ 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */ 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback(hcan); 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */ 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspDeInit(hcan); 381 .loc 1 484 3 382 0018 7868 ldr r0, [r7, #4] 383 001a FFF7FEFF bl HAL_CAN_MspDeInit 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN peripheral */ 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); 384 .loc 1 488 3 385 001e 7B68 ldr r3, [r7, #4] 386 0020 1B68 ldr r3, [r3] 387 0022 1A68 ldr r2, [r3] 388 0024 7B68 ldr r3, [r7, #4] 389 0026 1B68 ldr r3, [r3] 390 0028 42F40042 orr r2, r2, #32768 391 002c 1A60 str r2, [r3] 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN ErrorCode */ 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; 392 .loc 1 491 19 393 002e 7B68 ldr r3, [r7, #4] 394 0030 0022 movs r2, #0 395 0032 5A62 str r2, [r3, #36] 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_RESET; 396 .loc 1 494 15 397 0034 7B68 ldr r3, [r7, #4] 398 0036 0022 movs r2, #0 399 0038 83F82020 strb r2, [r3, #32] 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 400 .loc 1 497 10 401 003c 0023 movs r3, #0 402 .L23: 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 403 .loc 1 498 1 404 003e 1846 mov r0, r3 405 0040 0837 adds r7, r7, #8 406 .cfi_def_cfa_offset 8 407 0042 BD46 mov sp, r7 408 .cfi_def_cfa_register 13 409 @ sp needed ARM GAS /tmp/ccM1MpQr.s page 17 410 0044 80BD pop {r7, pc} 411 .cfi_endproc 412 .LFE131: 414 .section .text.HAL_CAN_MspInit,"ax",%progbits 415 .align 1 416 .weak HAL_CAN_MspInit 417 .syntax unified 418 .thumb 419 .thumb_func 421 HAL_CAN_MspInit: 422 .LFB132: 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initializes the CAN MSP. 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan) 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 423 .loc 1 507 1 424 .cfi_startproc 425 @ args = 0, pretend = 0, frame = 8 426 @ frame_needed = 1, uses_anonymous_args = 0 427 @ link register save eliminated. 428 0000 80B4 push {r7} 429 .cfi_def_cfa_offset 4 430 .cfi_offset 7, -4 431 0002 83B0 sub sp, sp, #12 432 .cfi_def_cfa_offset 16 433 0004 00AF add r7, sp, #0 434 .cfi_def_cfa_register 7 435 0006 7860 str r0, [r7, #4] 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_MspInit could be implemented in the user file 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 436 .loc 1 514 1 437 0008 00BF nop 438 000a 0C37 adds r7, r7, #12 439 .cfi_def_cfa_offset 4 440 000c BD46 mov sp, r7 441 .cfi_def_cfa_register 13 442 @ sp needed 443 000e 5DF8047B ldr r7, [sp], #4 444 .cfi_restore 7 445 .cfi_def_cfa_offset 0 446 0012 7047 bx lr 447 .cfi_endproc 448 .LFE132: 450 .section .text.HAL_CAN_MspDeInit,"ax",%progbits 451 .align 1 452 .weak HAL_CAN_MspDeInit 453 .syntax unified ARM GAS /tmp/ccM1MpQr.s page 18 454 .thumb 455 .thumb_func 457 HAL_CAN_MspDeInit: 458 .LFB133: 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief DeInitializes the CAN MSP. 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan) 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 459 .loc 1 523 1 460 .cfi_startproc 461 @ args = 0, pretend = 0, frame = 8 462 @ frame_needed = 1, uses_anonymous_args = 0 463 @ link register save eliminated. 464 0000 80B4 push {r7} 465 .cfi_def_cfa_offset 4 466 .cfi_offset 7, -4 467 0002 83B0 sub sp, sp, #12 468 .cfi_def_cfa_offset 16 469 0004 00AF add r7, sp, #0 470 .cfi_def_cfa_register 7 471 0006 7860 str r0, [r7, #4] 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_MspDeInit could be implemented in the user file 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 472 .loc 1 530 1 473 0008 00BF nop 474 000a 0C37 adds r7, r7, #12 475 .cfi_def_cfa_offset 4 476 000c BD46 mov sp, r7 477 .cfi_def_cfa_register 13 478 @ sp needed 479 000e 5DF8047B ldr r7, [sp], #4 480 .cfi_restore 7 481 .cfi_def_cfa_offset 0 482 0012 7047 bx lr 483 .cfi_endproc 484 .LFE133: 486 .section .text.HAL_CAN_ConfigFilter,"ax",%progbits 487 .align 1 488 .global HAL_CAN_ConfigFilter 489 .syntax unified 490 .thumb 491 .thumb_func 493 HAL_CAN_ConfigFilter: 494 .LFB134: 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** ARM GAS /tmp/ccM1MpQr.s page 19 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Register a CAN CallBack. 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * To be used instead of the weak predefined callback 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for CAN module 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param CallbackID ID of the callback to be registered 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one of the following values: 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pCallback pointer to the Callback function 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Callb 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** void (* pCallback)(CAN_HandleTypeDef *_hcan)) 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pCallback == NULL) 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID) 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = pCallback; 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = pCallback; 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = pCallback; 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = pCallback; 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ARM GAS /tmp/ccM1MpQr.s page 20 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = pCallback; 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = pCallback; 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = pCallback; 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID : 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = pCallback; 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = pCallback; 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID : 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = pCallback; 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID : 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = pCallback; 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = pCallback; 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID : 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = pCallback; 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = pCallback; 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = pCallback; 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default : 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET) 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID) 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { ARM GAS /tmp/ccM1MpQr.s page 21 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = pCallback; 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = pCallback; 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default : 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Unregister a CAN CallBack. 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * CAN callback is redirected to the weak predefined callback 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for CAN module 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param CallbackID ID of the callback to be unregistered 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one of the following values: 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Cal 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ARM GAS /tmp/ccM1MpQr.s page 22 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID) 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID : 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID : 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID : 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID : 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : ARM GAS /tmp/ccM1MpQr.s page 23 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default : 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET) 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID) 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default : 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group2 Configuration functions 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Configuration functions. 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * ARM GAS /tmp/ccM1MpQr.s page 24 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Configuration functions ##### 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to: 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Configures the CAN reception filter according to the specified 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * parameters in the CAN_FilterInitStruct. 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * contains the filter configuration information. 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterCon 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 495 .loc 1 840 1 496 .cfi_startproc 497 @ args = 0, pretend = 0, frame = 24 498 @ frame_needed = 1, uses_anonymous_args = 0 499 @ link register save eliminated. 500 0000 80B4 push {r7} 501 .cfi_def_cfa_offset 4 502 .cfi_offset 7, -4 503 0002 87B0 sub sp, sp, #28 504 .cfi_def_cfa_offset 32 505 0004 00AF add r7, sp, #0 506 .cfi_def_cfa_register 7 507 0006 7860 str r0, [r7, #4] 508 0008 3960 str r1, [r7] 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t filternbrbitpos; 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_TypeDef *can_ip = hcan->Instance; 509 .loc 1 842 16 510 000a 7B68 ldr r3, [r7, #4] 511 000c 1B68 ldr r3, [r3] 512 000e 7B61 str r3, [r7, #20] 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 513 .loc 1 843 24 514 0010 7B68 ldr r3, [r7, #4] 515 0012 93F82030 ldrb r3, [r3, #32] 516 0016 FB74 strb r3, [r7, #19] 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 517 .loc 1 845 6 518 0018 FB7C ldrb r3, [r7, #19] @ zero_extendqisi2 519 001a 012B cmp r3, #1 520 001c 03D0 beq .L27 521 .loc 1 845 38 discriminator 1 522 001e FB7C ldrb r3, [r7, #19] @ zero_extendqisi2 523 0020 022B cmp r3, #2 524 0022 40F0AA80 bne .L28 ARM GAS /tmp/ccM1MpQr.s page 25 525 .L27: 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh)); 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* CAN is single instance with 14 dedicated filters banks */ 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialisation mode for the filter */ 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FMR, CAN_FMR_FINIT); 526 .loc 1 864 5 527 0026 7B69 ldr r3, [r7, #20] 528 0028 D3F80032 ldr r3, [r3, #512] 529 002c 43F00102 orr r2, r3, #1 530 0030 7B69 ldr r3, [r7, #20] 531 0032 C3F80022 str r2, [r3, #512] 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Convert filter number into bit position */ 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); 532 .loc 1 867 52 533 0036 3B68 ldr r3, [r7] 534 0038 5B69 ldr r3, [r3, #20] 535 .loc 1 867 65 536 003a 03F01F03 and r3, r3, #31 537 .loc 1 867 21 538 003e 0122 movs r2, #1 539 0040 02FA03F3 lsl r3, r2, r3 540 0044 FB60 str r3, [r7, #12] 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Deactivation */ 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FA1R, filternbrbitpos); 541 .loc 1 870 5 542 0046 7B69 ldr r3, [r7, #20] 543 0048 D3F81C22 ldr r2, [r3, #540] 544 004c FB68 ldr r3, [r7, #12] 545 004e DB43 mvns r3, r3 546 0050 1A40 ands r2, r2, r3 547 0052 7B69 ldr r3, [r7, #20] 548 0054 C3F81C22 str r2, [r3, #540] 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Scale */ 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) 549 .loc 1 873 22 550 0058 3B68 ldr r3, [r7] 551 005a DB69 ldr r3, [r3, #28] 552 .loc 1 873 8 553 005c 002B cmp r3, #0 ARM GAS /tmp/ccM1MpQr.s page 26 554 005e 23D1 bne .L29 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 16-bit scale for the filter */ 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FS1R, filternbrbitpos); 555 .loc 1 876 7 556 0060 7B69 ldr r3, [r7, #20] 557 0062 D3F80C22 ldr r2, [r3, #524] 558 0066 FB68 ldr r3, [r7, #12] 559 0068 DB43 mvns r3, r3 560 006a 1A40 ands r2, r2, r3 561 006c 7B69 ldr r3, [r7, #20] 562 006e C3F80C22 str r2, [r3, #524] 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* First 16-bit identifier and First 16-bit mask */ 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Or First 16-bit identifier and Second 16-bit identifier */ 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 563 .loc 1 881 48 564 0072 3B68 ldr r3, [r7] 565 0074 DB68 ldr r3, [r3, #12] 566 .loc 1 881 67 567 0076 1904 lsls r1, r3, #16 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 568 .loc 1 882 47 569 0078 3B68 ldr r3, [r7] 570 007a 5B68 ldr r3, [r3, #4] 571 .loc 1 882 22 572 007c 9BB2 uxth r3, r3 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 573 .loc 1 880 44 574 007e 3A68 ldr r2, [r7] 575 0080 5269 ldr r2, [r2, #20] 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 576 .loc 1 881 75 577 0082 1943 orrs r1, r1, r3 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 578 .loc 1 880 62 579 0084 7B69 ldr r3, [r7, #20] 580 0086 4832 adds r2, r2, #72 581 0088 43F83210 str r1, [r3, r2, lsl #3] 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Second 16-bit identifier and Second 16-bit mask */ 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Or Third 16-bit identifier and Fourth 16-bit identifier */ 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 582 .loc 1 887 48 583 008c 3B68 ldr r3, [r7] 584 008e 9B68 ldr r3, [r3, #8] 585 .loc 1 887 68 586 0090 1904 lsls r1, r3, #16 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); 587 .loc 1 888 47 588 0092 3B68 ldr r3, [r7] 589 0094 1B68 ldr r3, [r3] 590 .loc 1 888 22 591 0096 9AB2 uxth r2, r3 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | ARM GAS /tmp/ccM1MpQr.s page 27 592 .loc 1 886 44 593 0098 3B68 ldr r3, [r7] 594 009a 5B69 ldr r3, [r3, #20] 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); 595 .loc 1 887 76 596 009c 0A43 orrs r2, r2, r1 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 597 .loc 1 886 62 598 009e 7969 ldr r1, [r7, #20] 599 00a0 4833 adds r3, r3, #72 600 00a2 DB00 lsls r3, r3, #3 601 00a4 0B44 add r3, r3, r1 602 00a6 5A60 str r2, [r3, #4] 603 .L29: 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) 604 .loc 1 891 22 605 00a8 3B68 ldr r3, [r7] 606 00aa DB69 ldr r3, [r3, #28] 607 .loc 1 891 8 608 00ac 012B cmp r3, #1 609 00ae 22D1 bne .L30 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit scale for the filter */ 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FS1R, filternbrbitpos); 610 .loc 1 894 7 611 00b0 7B69 ldr r3, [r7, #20] 612 00b2 D3F80C22 ldr r2, [r3, #524] 613 00b6 FB68 ldr r3, [r7, #12] 614 00b8 1A43 orrs r2, r2, r3 615 00ba 7B69 ldr r3, [r7, #20] 616 00bc C3F80C22 str r2, [r3, #524] 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit identifier or First 32-bit identifier */ 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 617 .loc 1 898 48 618 00c0 3B68 ldr r3, [r7] 619 00c2 1B68 ldr r3, [r3] 620 .loc 1 898 64 621 00c4 1904 lsls r1, r3, #16 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 622 .loc 1 899 47 623 00c6 3B68 ldr r3, [r7] 624 00c8 5B68 ldr r3, [r3, #4] 625 .loc 1 899 22 626 00ca 9BB2 uxth r3, r3 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 627 .loc 1 897 44 628 00cc 3A68 ldr r2, [r7] 629 00ce 5269 ldr r2, [r2, #20] 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 630 .loc 1 898 72 631 00d0 1943 orrs r1, r1, r3 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 632 .loc 1 897 62 ARM GAS /tmp/ccM1MpQr.s page 28 633 00d2 7B69 ldr r3, [r7, #20] 634 00d4 4832 adds r2, r2, #72 635 00d6 43F83210 str r1, [r3, r2, lsl #3] 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit mask or Second 32-bit identifier */ 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 636 .loc 1 903 48 637 00da 3B68 ldr r3, [r7] 638 00dc 9B68 ldr r3, [r3, #8] 639 .loc 1 903 68 640 00de 1904 lsls r1, r3, #16 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); 641 .loc 1 904 47 642 00e0 3B68 ldr r3, [r7] 643 00e2 DB68 ldr r3, [r3, #12] 644 .loc 1 904 22 645 00e4 9AB2 uxth r2, r3 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 646 .loc 1 902 44 647 00e6 3B68 ldr r3, [r7] 648 00e8 5B69 ldr r3, [r3, #20] 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); 649 .loc 1 903 76 650 00ea 0A43 orrs r2, r2, r1 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 651 .loc 1 902 62 652 00ec 7969 ldr r1, [r7, #20] 653 00ee 4833 adds r3, r3, #72 654 00f0 DB00 lsls r3, r3, #3 655 00f2 0B44 add r3, r3, r1 656 00f4 5A60 str r2, [r3, #4] 657 .L30: 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Mode */ 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) 658 .loc 1 908 22 659 00f6 3B68 ldr r3, [r7] 660 00f8 9B69 ldr r3, [r3, #24] 661 .loc 1 908 8 662 00fa 002B cmp r3, #0 663 00fc 09D1 bne .L31 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Id/Mask mode for the filter*/ 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FM1R, filternbrbitpos); 664 .loc 1 911 7 665 00fe 7B69 ldr r3, [r7, #20] 666 0100 D3F80422 ldr r2, [r3, #516] 667 0104 FB68 ldr r3, [r7, #12] 668 0106 DB43 mvns r3, r3 669 0108 1A40 ands r2, r2, r3 670 010a 7B69 ldr r3, [r7, #20] 671 010c C3F80422 str r2, [r3, #516] 672 0110 07E0 b .L32 673 .L31: 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } ARM GAS /tmp/ccM1MpQr.s page 29 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Identifier list mode for the filter*/ 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FM1R, filternbrbitpos); 674 .loc 1 916 7 675 0112 7B69 ldr r3, [r7, #20] 676 0114 D3F80422 ldr r2, [r3, #516] 677 0118 FB68 ldr r3, [r7, #12] 678 011a 1A43 orrs r2, r2, r3 679 011c 7B69 ldr r3, [r7, #20] 680 011e C3F80422 str r2, [r3, #516] 681 .L32: 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter FIFO assignment */ 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) 682 .loc 1 920 22 683 0122 3B68 ldr r3, [r7] 684 0124 1B69 ldr r3, [r3, #16] 685 .loc 1 920 8 686 0126 002B cmp r3, #0 687 0128 09D1 bne .L33 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* FIFO 0 assignation for the filter */ 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); 688 .loc 1 923 7 689 012a 7B69 ldr r3, [r7, #20] 690 012c D3F81422 ldr r2, [r3, #532] 691 0130 FB68 ldr r3, [r7, #12] 692 0132 DB43 mvns r3, r3 693 0134 1A40 ands r2, r2, r3 694 0136 7B69 ldr r3, [r7, #20] 695 0138 C3F81422 str r2, [r3, #532] 696 013c 07E0 b .L34 697 .L33: 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* FIFO 1 assignation for the filter */ 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FFA1R, filternbrbitpos); 698 .loc 1 928 7 699 013e 7B69 ldr r3, [r7, #20] 700 0140 D3F81422 ldr r2, [r3, #532] 701 0144 FB68 ldr r3, [r7, #12] 702 0146 1A43 orrs r2, r2, r3 703 0148 7B69 ldr r3, [r7, #20] 704 014a C3F81422 str r2, [r3, #532] 705 .L34: 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter activation */ 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) 706 .loc 1 932 22 707 014e 3B68 ldr r3, [r7] 708 0150 1B6A ldr r3, [r3, #32] 709 .loc 1 932 8 710 0152 012B cmp r3, #1 ARM GAS /tmp/ccM1MpQr.s page 30 711 0154 07D1 bne .L35 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FA1R, filternbrbitpos); 712 .loc 1 934 7 713 0156 7B69 ldr r3, [r7, #20] 714 0158 D3F81C22 ldr r2, [r3, #540] 715 015c FB68 ldr r3, [r7, #12] 716 015e 1A43 orrs r2, r2, r3 717 0160 7B69 ldr r3, [r7, #20] 718 0162 C3F81C22 str r2, [r3, #540] 719 .L35: 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Leave the initialisation mode for the filter */ 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); 720 .loc 1 938 5 721 0166 7B69 ldr r3, [r7, #20] 722 0168 D3F80032 ldr r3, [r3, #512] 723 016c 23F00102 bic r2, r3, #1 724 0170 7B69 ldr r3, [r7, #20] 725 0172 C3F80022 str r2, [r3, #512] 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 726 .loc 1 941 12 727 0176 0023 movs r3, #0 728 0178 06E0 b .L36 729 .L28: 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 730 .loc 1 946 9 731 017a 7B68 ldr r3, [r7, #4] 732 017c 5B6A ldr r3, [r3, #36] 733 .loc 1 946 21 734 017e 43F48022 orr r2, r3, #262144 735 0182 7B68 ldr r3, [r7, #4] 736 0184 5A62 str r2, [r3, #36] 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 737 .loc 1 948 12 738 0186 0123 movs r3, #1 739 .L36: 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 740 .loc 1 950 1 741 0188 1846 mov r0, r3 742 018a 1C37 adds r7, r7, #28 743 .cfi_def_cfa_offset 4 744 018c BD46 mov sp, r7 745 .cfi_def_cfa_register 13 746 @ sp needed 747 018e 5DF8047B ldr r7, [sp], #4 748 .cfi_restore 7 749 .cfi_def_cfa_offset 0 ARM GAS /tmp/ccM1MpQr.s page 31 750 0192 7047 bx lr 751 .cfi_endproc 752 .LFE134: 754 .section .text.HAL_CAN_Start,"ax",%progbits 755 .align 1 756 .global HAL_CAN_Start 757 .syntax unified 758 .thumb 759 .thumb_func 761 HAL_CAN_Start: 762 .LFB135: 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group3 Control functions 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Control functions 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Control functions ##### 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to: 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Start : Start the CAN module 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Stop : Stop the CAN module 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RequestSleep : Request sleep mode entry. 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_WakeUp : Wake up from sleep mode. 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IsSleepActive : Check is sleep mode is active. 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and activate the corresponding 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmission request 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_AbortTxRequest : Abort transmission request 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pending on the selected Tx mailbox 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Start the CAN module. 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 763 .loc 1 990 1 764 .cfi_startproc 765 @ args = 0, pretend = 0, frame = 16 766 @ frame_needed = 1, uses_anonymous_args = 0 767 0000 80B5 push {r7, lr} 768 .cfi_def_cfa_offset 8 ARM GAS /tmp/ccM1MpQr.s page 32 769 .cfi_offset 7, -8 770 .cfi_offset 14, -4 771 0002 84B0 sub sp, sp, #16 772 .cfi_def_cfa_offset 24 773 0004 00AF add r7, sp, #0 774 .cfi_def_cfa_register 7 775 0006 7860 str r0, [r7, #4] 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart; 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) 776 .loc 1 993 11 777 0008 7B68 ldr r3, [r7, #4] 778 000a 93F82030 ldrb r3, [r3, #32] 779 000e DBB2 uxtb r3, r3 780 .loc 1 993 6 781 0010 012B cmp r3, #1 782 0012 2ED1 bne .L38 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN peripheral state */ 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_LISTENING; 783 .loc 1 996 17 784 0014 7B68 ldr r3, [r7, #4] 785 0016 0222 movs r2, #2 786 0018 83F82020 strb r2, [r3, #32] 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request leave initialisation */ 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 787 .loc 1 999 5 788 001c 7B68 ldr r3, [r7, #4] 789 001e 1B68 ldr r3, [r3] 790 0020 1A68 ldr r2, [r3] 791 0022 7B68 ldr r3, [r7, #4] 792 0024 1B68 ldr r3, [r3] 793 0026 22F00102 bic r2, r2, #1 794 002a 1A60 str r2, [r3] 1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */ 1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick(); 795 .loc 1 1002 17 796 002c FFF7FEFF bl HAL_GetTick 797 0030 F860 str r0, [r7, #12] 1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait the acknowledge */ 1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 798 .loc 1 1005 11 799 0032 12E0 b .L39 800 .L41: 1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check for the Timeout */ 1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 801 .loc 1 1008 12 802 0034 FFF7FEFF bl HAL_GetTick 803 0038 0246 mov r2, r0 804 .loc 1 1008 26 discriminator 1 805 003a FB68 ldr r3, [r7, #12] 806 003c D31A subs r3, r2, r3 807 .loc 1 1008 10 discriminator 1 ARM GAS /tmp/ccM1MpQr.s page 33 808 003e 0A2B cmp r3, #10 809 0040 0BD9 bls .L39 1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 810 .loc 1 1011 13 811 0042 7B68 ldr r3, [r7, #4] 812 0044 5B6A ldr r3, [r3, #36] 813 .loc 1 1011 25 814 0046 43F40032 orr r2, r3, #131072 815 004a 7B68 ldr r3, [r7, #4] 816 004c 5A62 str r2, [r3, #36] 1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ 1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; 817 .loc 1 1014 21 818 004e 7B68 ldr r3, [r7, #4] 819 0050 0522 movs r2, #5 820 0052 83F82020 strb r2, [r3, #32] 1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 821 .loc 1 1016 16 822 0056 0123 movs r3, #1 823 0058 12E0 b .L40 824 .L39: 1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 825 .loc 1 1005 17 826 005a 7B68 ldr r3, [r7, #4] 827 005c 1B68 ldr r3, [r3] 1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 828 .loc 1 1005 27 829 005e 5B68 ldr r3, [r3, #4] 1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 830 .loc 1 1005 33 831 0060 03F00103 and r3, r3, #1 1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 832 .loc 1 1005 49 833 0064 002B cmp r3, #0 834 0066 E5D1 bne .L41 1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN ErrorCode */ 1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; 835 .loc 1 1021 21 836 0068 7B68 ldr r3, [r7, #4] 837 006a 0022 movs r2, #0 838 006c 5A62 str r2, [r3, #36] 1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 839 .loc 1 1024 12 840 006e 0023 movs r3, #0 841 0070 06E0 b .L40 842 .L38: 1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else ARM GAS /tmp/ccM1MpQr.s page 34 1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; 843 .loc 1 1029 9 844 0072 7B68 ldr r3, [r7, #4] 845 0074 5B6A ldr r3, [r3, #36] 846 .loc 1 1029 21 847 0076 43F40022 orr r2, r3, #524288 848 007a 7B68 ldr r3, [r7, #4] 849 007c 5A62 str r2, [r3, #36] 1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 850 .loc 1 1031 12 851 007e 0123 movs r3, #1 852 .L40: 1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 853 .loc 1 1033 1 854 0080 1846 mov r0, r3 855 0082 1037 adds r7, r7, #16 856 .cfi_def_cfa_offset 8 857 0084 BD46 mov sp, r7 858 .cfi_def_cfa_register 13 859 @ sp needed 860 0086 80BD pop {r7, pc} 861 .cfi_endproc 862 .LFE135: 864 .section .text.HAL_CAN_Stop,"ax",%progbits 865 .align 1 866 .global HAL_CAN_Stop 867 .syntax unified 868 .thumb 869 .thumb_func 871 HAL_CAN_Stop: 872 .LFB136: 1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Stop the CAN module and enable access to configuration registers. 1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) 1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 873 .loc 1 1042 1 874 .cfi_startproc 875 @ args = 0, pretend = 0, frame = 16 876 @ frame_needed = 1, uses_anonymous_args = 0 877 0000 80B5 push {r7, lr} 878 .cfi_def_cfa_offset 8 879 .cfi_offset 7, -8 880 .cfi_offset 14, -4 881 0002 84B0 sub sp, sp, #16 882 .cfi_def_cfa_offset 24 883 0004 00AF add r7, sp, #0 884 .cfi_def_cfa_register 7 885 0006 7860 str r0, [r7, #4] ARM GAS /tmp/ccM1MpQr.s page 35 1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart; 1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_LISTENING) 886 .loc 1 1045 11 887 0008 7B68 ldr r3, [r7, #4] 888 000a 93F82030 ldrb r3, [r3, #32] 889 000e DBB2 uxtb r3, r3 890 .loc 1 1045 6 891 0010 022B cmp r3, #2 892 0012 33D1 bne .L43 1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request initialisation */ 1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 893 .loc 1 1048 5 894 0014 7B68 ldr r3, [r7, #4] 895 0016 1B68 ldr r3, [r3] 896 0018 1A68 ldr r2, [r3] 897 001a 7B68 ldr r3, [r7, #4] 898 001c 1B68 ldr r3, [r3] 899 001e 42F00102 orr r2, r2, #1 900 0022 1A60 str r2, [r3] 1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */ 1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick(); 901 .loc 1 1051 17 902 0024 FFF7FEFF bl HAL_GetTick 903 0028 F860 str r0, [r7, #12] 1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait the acknowledge */ 1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 904 .loc 1 1054 11 905 002a 12E0 b .L44 906 .L46: 1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check for the Timeout */ 1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 907 .loc 1 1057 12 908 002c FFF7FEFF bl HAL_GetTick 909 0030 0246 mov r2, r0 910 .loc 1 1057 26 discriminator 1 911 0032 FB68 ldr r3, [r7, #12] 912 0034 D31A subs r3, r2, r3 913 .loc 1 1057 10 discriminator 1 914 0036 0A2B cmp r3, #10 915 0038 0BD9 bls .L44 1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 916 .loc 1 1060 13 917 003a 7B68 ldr r3, [r7, #4] 918 003c 5B6A ldr r3, [r3, #36] 919 .loc 1 1060 25 920 003e 43F40032 orr r2, r3, #131072 921 0042 7B68 ldr r3, [r7, #4] 922 0044 5A62 str r2, [r3, #36] 1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ ARM GAS /tmp/ccM1MpQr.s page 36 1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; 923 .loc 1 1063 21 924 0046 7B68 ldr r3, [r7, #4] 925 0048 0522 movs r2, #5 926 004a 83F82020 strb r2, [r3, #32] 1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 927 .loc 1 1065 16 928 004e 0123 movs r3, #1 929 0050 1BE0 b .L45 930 .L44: 1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 931 .loc 1 1054 17 932 0052 7B68 ldr r3, [r7, #4] 933 0054 1B68 ldr r3, [r3] 1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 934 .loc 1 1054 27 935 0056 5B68 ldr r3, [r3, #4] 1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 936 .loc 1 1054 33 937 0058 03F00103 and r3, r3, #1 1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 938 .loc 1 1054 49 939 005c 002B cmp r3, #0 940 005e E5D0 beq .L46 1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exit from sleep mode */ 1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 941 .loc 1 1070 5 942 0060 7B68 ldr r3, [r7, #4] 943 0062 1B68 ldr r3, [r3] 944 0064 1A68 ldr r2, [r3] 945 0066 7B68 ldr r3, [r7, #4] 946 0068 1B68 ldr r3, [r3] 947 006a 22F00202 bic r2, r2, #2 948 006e 1A60 str r2, [r3] 1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN peripheral state */ 1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY; 949 .loc 1 1073 17 950 0070 7B68 ldr r3, [r7, #4] 951 0072 0122 movs r2, #1 952 0074 83F82020 strb r2, [r3, #32] 1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 953 .loc 1 1076 12 954 0078 0023 movs r3, #0 955 007a 06E0 b .L45 956 .L43: 1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; ARM GAS /tmp/ccM1MpQr.s page 37 957 .loc 1 1081 9 958 007c 7B68 ldr r3, [r7, #4] 959 007e 5B6A ldr r3, [r3, #36] 960 .loc 1 1081 21 961 0080 43F48012 orr r2, r3, #1048576 962 0084 7B68 ldr r3, [r7, #4] 963 0086 5A62 str r2, [r3, #36] 1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 964 .loc 1 1083 12 965 0088 0123 movs r3, #1 966 .L45: 1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 967 .loc 1 1085 1 968 008a 1846 mov r0, r3 969 008c 1037 adds r7, r7, #16 970 .cfi_def_cfa_offset 8 971 008e BD46 mov sp, r7 972 .cfi_def_cfa_register 13 973 @ sp needed 974 0090 80BD pop {r7, pc} 975 .cfi_endproc 976 .LFE136: 978 .section .text.HAL_CAN_RequestSleep,"ax",%progbits 979 .align 1 980 .global HAL_CAN_RequestSleep 981 .syntax unified 982 .thumb 983 .thumb_func 985 HAL_CAN_RequestSleep: 986 .LFB137: 1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Request the sleep mode (low power) entry. 1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * When returning from this function, Sleep mode will be entered 1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * as soon as the current CAN activity (transmission or reception 1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * of a CAN frame) has been completed. 1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status. 1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) 1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 987 .loc 1 1097 1 988 .cfi_startproc 989 @ args = 0, pretend = 0, frame = 16 990 @ frame_needed = 1, uses_anonymous_args = 0 991 @ link register save eliminated. 992 0000 80B4 push {r7} 993 .cfi_def_cfa_offset 4 994 .cfi_offset 7, -4 995 0002 85B0 sub sp, sp, #20 996 .cfi_def_cfa_offset 24 997 0004 00AF add r7, sp, #0 998 .cfi_def_cfa_register 7 999 0006 7860 str r0, [r7, #4] ARM GAS /tmp/ccM1MpQr.s page 38 1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1000 .loc 1 1098 24 1001 0008 7B68 ldr r3, [r7, #4] 1002 000a 93F82030 ldrb r3, [r3, #32] 1003 000e FB73 strb r3, [r7, #15] 1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 1004 .loc 1 1100 6 1005 0010 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 1006 0012 012B cmp r3, #1 1007 0014 02D0 beq .L48 1008 .loc 1 1100 38 discriminator 1 1009 0016 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 1010 0018 022B cmp r3, #2 1011 001a 09D1 bne .L49 1012 .L48: 1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request Sleep mode */ 1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 1013 .loc 1 1104 5 1014 001c 7B68 ldr r3, [r7, #4] 1015 001e 1B68 ldr r3, [r3] 1016 0020 1A68 ldr r2, [r3] 1017 0022 7B68 ldr r3, [r7, #4] 1018 0024 1B68 ldr r3, [r3] 1019 0026 42F00202 orr r2, r2, #2 1020 002a 1A60 str r2, [r3] 1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 1021 .loc 1 1107 12 1022 002c 0023 movs r3, #0 1023 002e 06E0 b .L50 1024 .L49: 1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 1025 .loc 1 1112 9 1026 0030 7B68 ldr r3, [r7, #4] 1027 0032 5B6A ldr r3, [r3, #36] 1028 .loc 1 1112 21 1029 0034 43F48022 orr r2, r3, #262144 1030 0038 7B68 ldr r3, [r7, #4] 1031 003a 5A62 str r2, [r3, #36] 1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 1032 .loc 1 1115 12 1033 003c 0123 movs r3, #1 1034 .L50: 1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1035 .loc 1 1117 1 1036 003e 1846 mov r0, r3 ARM GAS /tmp/ccM1MpQr.s page 39 1037 0040 1437 adds r7, r7, #20 1038 .cfi_def_cfa_offset 4 1039 0042 BD46 mov sp, r7 1040 .cfi_def_cfa_register 13 1041 @ sp needed 1042 0044 5DF8047B ldr r7, [sp], #4 1043 .cfi_restore 7 1044 .cfi_def_cfa_offset 0 1045 0048 7047 bx lr 1046 .cfi_endproc 1047 .LFE137: 1049 .section .text.HAL_CAN_WakeUp,"ax",%progbits 1050 .align 1 1051 .global HAL_CAN_WakeUp 1052 .syntax unified 1053 .thumb 1054 .thumb_func 1056 HAL_CAN_WakeUp: 1057 .LFB138: 1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Wake up from sleep mode. 1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * When returning with HAL_OK status from this function, Sleep mode 1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * is exited. 1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status. 1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) 1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1058 .loc 1 1128 1 1059 .cfi_startproc 1060 @ args = 0, pretend = 0, frame = 24 1061 @ frame_needed = 1, uses_anonymous_args = 0 1062 @ link register save eliminated. 1063 0000 80B4 push {r7} 1064 .cfi_def_cfa_offset 4 1065 .cfi_offset 7, -4 1066 0002 87B0 sub sp, sp, #28 1067 .cfi_def_cfa_offset 32 1068 0004 00AF add r7, sp, #0 1069 .cfi_def_cfa_register 7 1070 0006 7860 str r0, [r7, #4] 1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __IO uint32_t count = 0; 1071 .loc 1 1129 17 1072 0008 0023 movs r3, #0 1073 000a FB60 str r3, [r7, #12] 1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t timeout = 1000000U; 1074 .loc 1 1130 12 1075 000c 1C4B ldr r3, .L57 1076 000e 7B61 str r3, [r7, #20] 1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1077 .loc 1 1131 24 1078 0010 7B68 ldr r3, [r7, #4] 1079 0012 93F82030 ldrb r3, [r3, #32] 1080 0016 FB74 strb r3, [r7, #19] 1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ARM GAS /tmp/ccM1MpQr.s page 40 1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 1081 .loc 1 1133 6 1082 0018 FB7C ldrb r3, [r7, #19] @ zero_extendqisi2 1083 001a 012B cmp r3, #1 1084 001c 02D0 beq .L52 1085 .loc 1 1133 38 discriminator 1 1086 001e FB7C ldrb r3, [r7, #19] @ zero_extendqisi2 1087 0020 022B cmp r3, #2 1088 0022 1FD1 bne .L53 1089 .L52: 1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wake up request */ 1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 1090 .loc 1 1137 5 1091 0024 7B68 ldr r3, [r7, #4] 1092 0026 1B68 ldr r3, [r3] 1093 0028 1A68 ldr r2, [r3] 1094 002a 7B68 ldr r3, [r7, #4] 1095 002c 1B68 ldr r3, [r3] 1096 002e 22F00202 bic r2, r2, #2 1097 0032 1A60 str r2, [r3] 1098 .L56: 1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait sleep mode is exited */ 1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** do 1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Increment counter */ 1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** count++; 1099 .loc 1 1143 12 1100 0034 FB68 ldr r3, [r7, #12] 1101 0036 0133 adds r3, r3, #1 1102 0038 FB60 str r3, [r7, #12] 1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if timeout is reached */ 1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (count > timeout) 1103 .loc 1 1146 17 1104 003a FB68 ldr r3, [r7, #12] 1105 .loc 1 1146 10 1106 003c 7A69 ldr r2, [r7, #20] 1107 003e 9A42 cmp r2, r3 1108 0040 07D2 bcs .L54 1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 1109 .loc 1 1149 13 1110 0042 7B68 ldr r3, [r7, #4] 1111 0044 5B6A ldr r3, [r3, #36] 1112 .loc 1 1149 25 1113 0046 43F40032 orr r2, r3, #131072 1114 004a 7B68 ldr r3, [r7, #4] 1115 004c 5A62 str r2, [r3, #36] 1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 1116 .loc 1 1151 16 1117 004e 0123 movs r3, #1 1118 0050 0FE0 b .L55 ARM GAS /tmp/ccM1MpQr.s page 41 1119 .L54: 1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); 1120 .loc 1 1154 17 1121 0052 7B68 ldr r3, [r7, #4] 1122 0054 1B68 ldr r3, [r3] 1123 .loc 1 1154 27 1124 0056 5B68 ldr r3, [r3, #4] 1125 .loc 1 1154 33 1126 0058 03F00203 and r3, r3, #2 1127 .loc 1 1154 49 1128 005c 002B cmp r3, #0 1129 005e E9D1 bne .L56 1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 1130 .loc 1 1157 12 1131 0060 0023 movs r3, #0 1132 0062 06E0 b .L55 1133 .L53: 1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 1134 .loc 1 1162 9 1135 0064 7B68 ldr r3, [r7, #4] 1136 0066 5B6A ldr r3, [r3, #36] 1137 .loc 1 1162 21 1138 0068 43F48022 orr r2, r3, #262144 1139 006c 7B68 ldr r3, [r7, #4] 1140 006e 5A62 str r2, [r3, #36] 1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 1141 .loc 1 1164 12 1142 0070 0123 movs r3, #1 1143 .L55: 1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1144 .loc 1 1166 1 1145 0072 1846 mov r0, r3 1146 0074 1C37 adds r7, r7, #28 1147 .cfi_def_cfa_offset 4 1148 0076 BD46 mov sp, r7 1149 .cfi_def_cfa_register 13 1150 @ sp needed 1151 0078 5DF8047B ldr r7, [sp], #4 1152 .cfi_restore 7 1153 .cfi_def_cfa_offset 0 1154 007c 7047 bx lr 1155 .L58: 1156 007e 00BF .align 2 1157 .L57: 1158 0080 40420F00 .word 1000000 1159 .cfi_endproc 1160 .LFE138: ARM GAS /tmp/ccM1MpQr.s page 42 1162 .section .text.HAL_CAN_IsSleepActive,"ax",%progbits 1163 .align 1 1164 .global HAL_CAN_IsSleepActive 1165 .syntax unified 1166 .thumb 1167 .thumb_func 1169 HAL_CAN_IsSleepActive: 1170 .LFB139: 1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Check is sleep mode is active. 1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Status 1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 0 : Sleep mode is not active. 1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 1 : Sleep mode is active. 1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan) 1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1171 .loc 1 1177 1 1172 .cfi_startproc 1173 @ args = 0, pretend = 0, frame = 16 1174 @ frame_needed = 1, uses_anonymous_args = 0 1175 @ link register save eliminated. 1176 0000 80B4 push {r7} 1177 .cfi_def_cfa_offset 4 1178 .cfi_offset 7, -4 1179 0002 85B0 sub sp, sp, #20 1180 .cfi_def_cfa_offset 24 1181 0004 00AF add r7, sp, #0 1182 .cfi_def_cfa_register 7 1183 0006 7860 str r0, [r7, #4] 1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t status = 0U; 1184 .loc 1 1178 12 1185 0008 0023 movs r3, #0 1186 000a FB60 str r3, [r7, #12] 1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1187 .loc 1 1179 24 1188 000c 7B68 ldr r3, [r7, #4] 1189 000e 93F82030 ldrb r3, [r3, #32] 1190 0012 FB72 strb r3, [r7, #11] 1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 1191 .loc 1 1181 6 1192 0014 FB7A ldrb r3, [r7, #11] @ zero_extendqisi2 1193 0016 012B cmp r3, #1 1194 0018 02D0 beq .L60 1195 .loc 1 1181 38 discriminator 1 1196 001a FB7A ldrb r3, [r7, #11] @ zero_extendqisi2 1197 001c 022B cmp r3, #2 1198 001e 08D1 bne .L61 1199 .L60: 1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Sleep mode */ 1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 1200 .loc 1 1185 14 ARM GAS /tmp/ccM1MpQr.s page 43 1201 0020 7B68 ldr r3, [r7, #4] 1202 0022 1B68 ldr r3, [r3] 1203 .loc 1 1185 24 1204 0024 5B68 ldr r3, [r3, #4] 1205 .loc 1 1185 30 1206 0026 03F00203 and r3, r3, #2 1207 .loc 1 1185 8 1208 002a 002B cmp r3, #0 1209 002c 01D0 beq .L61 1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = 1U; 1210 .loc 1 1187 14 1211 002e 0123 movs r3, #1 1212 0030 FB60 str r3, [r7, #12] 1213 .L61: 1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; 1214 .loc 1 1192 10 1215 0032 FB68 ldr r3, [r7, #12] 1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1216 .loc 1 1193 1 1217 0034 1846 mov r0, r3 1218 0036 1437 adds r7, r7, #20 1219 .cfi_def_cfa_offset 4 1220 0038 BD46 mov sp, r7 1221 .cfi_def_cfa_register 13 1222 @ sp needed 1223 003a 5DF8047B ldr r7, [sp], #4 1224 .cfi_restore 7 1225 .cfi_def_cfa_offset 0 1226 003e 7047 bx lr 1227 .cfi_endproc 1228 .LFE139: 1230 .section .text.HAL_CAN_AddTxMessage,"ax",%progbits 1231 .align 1 1232 .global HAL_CAN_AddTxMessage 1233 .syntax unified 1234 .thumb 1235 .thumb_func 1237 HAL_CAN_AddTxMessage: 1238 .LFB140: 1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Add a message to the first free Tx mailbox and activate the 1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * corresponding transmission request. 1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pHeader pointer to a CAN_TxHeaderTypeDef structure. 1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param aData array containing the payload of the Tx frame. 1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pTxMailbox pointer to a variable where the function will return 1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the TxMailbox used to store the Tx message. 1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_Tx_Mailboxes. 1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ ARM GAS /tmp/ccM1MpQr.s page 44 1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, 1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** const uint8_t aData[], uint32_t *pTxMailbox) 1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1239 .loc 1 1209 1 1240 .cfi_startproc 1241 @ args = 0, pretend = 0, frame = 32 1242 @ frame_needed = 1, uses_anonymous_args = 0 1243 @ link register save eliminated. 1244 0000 80B4 push {r7} 1245 .cfi_def_cfa_offset 4 1246 .cfi_offset 7, -4 1247 0002 89B0 sub sp, sp, #36 1248 .cfi_def_cfa_offset 40 1249 0004 00AF add r7, sp, #0 1250 .cfi_def_cfa_register 7 1251 0006 F860 str r0, [r7, #12] 1252 0008 B960 str r1, [r7, #8] 1253 000a 7A60 str r2, [r7, #4] 1254 000c 3B60 str r3, [r7] 1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t transmitmailbox; 1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1255 .loc 1 1211 24 1256 000e FB68 ldr r3, [r7, #12] 1257 0010 93F82030 ldrb r3, [r3, #32] 1258 0014 FB77 strb r3, [r7, #31] 1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsr = READ_REG(hcan->Instance->TSR); 1259 .loc 1 1212 18 1260 0016 FB68 ldr r3, [r7, #12] 1261 0018 1B68 ldr r3, [r3] 1262 .loc 1 1212 12 1263 001a 9B68 ldr r3, [r3, #8] 1264 001c BB61 str r3, [r7, #24] 1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ 1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IDTYPE(pHeader->IDE)); 1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RTR(pHeader->RTR)); 1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_DLC(pHeader->DLC)); 1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) 1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_STDID(pHeader->StdId)); 1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_EXTID(pHeader->ExtId)); 1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); 1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 1265 .loc 1 1228 6 1266 001e FB7F ldrb r3, [r7, #31] @ zero_extendqisi2 1267 0020 012B cmp r3, #1 1268 0022 03D0 beq .L64 1269 .loc 1 1228 38 discriminator 1 1270 0024 FB7F ldrb r3, [r7, #31] @ zero_extendqisi2 1271 0026 022B cmp r3, #2 1272 0028 40F0AD80 bne .L65 1273 .L64: ARM GAS /tmp/ccM1MpQr.s page 45 1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that all the Tx mailboxes are not full */ 1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((tsr & CAN_TSR_TME0) != 0U) || 1274 .loc 1 1232 15 1275 002c BB69 ldr r3, [r7, #24] 1276 002e 03F08063 and r3, r3, #67108864 1277 .loc 1 1232 8 1278 0032 002B cmp r3, #0 1279 0034 0AD1 bne .L66 1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) || 1280 .loc 1 1233 15 1281 0036 BB69 ldr r3, [r7, #24] 1282 0038 03F00063 and r3, r3, #134217728 1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) || 1283 .loc 1 1232 38 discriminator 1 1284 003c 002B cmp r3, #0 1285 003e 05D1 bne .L66 1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((tsr & CAN_TSR_TME2) != 0U)) 1286 .loc 1 1234 15 1287 0040 BB69 ldr r3, [r7, #24] 1288 0042 03F08053 and r3, r3, #268435456 1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) || 1289 .loc 1 1233 38 1290 0046 002B cmp r3, #0 1291 0048 00F09580 beq .L67 1292 .L66: 1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Select an empty transmit mailbox */ 1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; 1293 .loc 1 1237 46 1294 004c BB69 ldr r3, [r7, #24] 1295 004e 1B0E lsrs r3, r3, #24 1296 .loc 1 1237 23 1297 0050 03F00303 and r3, r3, #3 1298 0054 7B61 str r3, [r7, #20] 1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Store the Tx mailbox */ 1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *pTxMailbox = (uint32_t)1 << transmitmailbox; 1299 .loc 1 1240 33 1300 0056 0122 movs r2, #1 1301 0058 7B69 ldr r3, [r7, #20] 1302 005a 9A40 lsls r2, r2, r3 1303 .loc 1 1240 19 1304 005c 3B68 ldr r3, [r7] 1305 005e 1A60 str r2, [r3] 1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the Id */ 1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) 1306 .loc 1 1243 18 1307 0060 BB68 ldr r3, [r7, #8] 1308 0062 9B68 ldr r3, [r3, #8] 1309 .loc 1 1243 10 1310 0064 002B cmp r3, #0 1311 0066 0DD1 bne .L68 1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | ARM GAS /tmp/ccM1MpQr.s page 46 1312 .loc 1 1245 68 1313 0068 BB68 ldr r3, [r7, #8] 1314 006a 1B68 ldr r3, [r3] 1315 .loc 1 1245 76 1316 006c 5A05 lsls r2, r3, #21 1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); 1317 .loc 1 1246 67 1318 006e BB68 ldr r3, [r7, #8] 1319 0070 DB68 ldr r3, [r3, #12] 1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); 1320 .loc 1 1245 13 1321 0072 F968 ldr r1, [r7, #12] 1322 0074 0968 ldr r1, [r1] 1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); 1323 .loc 1 1245 98 1324 0076 1A43 orrs r2, r2, r3 1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); 1325 .loc 1 1245 57 1326 0078 7B69 ldr r3, [r7, #20] 1327 007a 1833 adds r3, r3, #24 1328 007c 1B01 lsls r3, r3, #4 1329 007e 0B44 add r3, r3, r1 1330 0080 1A60 str r2, [r3] 1331 0082 0FE0 b .L69 1332 .L68: 1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 1333 .loc 1 1250 68 1334 0084 BB68 ldr r3, [r7, #8] 1335 0086 5B68 ldr r3, [r3, #4] 1336 .loc 1 1250 76 1337 0088 DA00 lsls r2, r3, #3 1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | 1338 .loc 1 1251 67 1339 008a BB68 ldr r3, [r7, #8] 1340 008c 9B68 ldr r3, [r3, #8] 1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | 1341 .loc 1 1250 98 1342 008e 1A43 orrs r2, r2, r3 1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); 1343 .loc 1 1252 67 1344 0090 BB68 ldr r3, [r7, #8] 1345 0092 DB68 ldr r3, [r3, #12] 1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | 1346 .loc 1 1250 13 1347 0094 F968 ldr r1, [r7, #12] 1348 0096 0968 ldr r1, [r1] 1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | 1349 .loc 1 1251 73 1350 0098 1A43 orrs r2, r2, r3 1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | 1351 .loc 1 1250 57 1352 009a 7B69 ldr r3, [r7, #20] 1353 009c 1833 adds r3, r3, #24 1354 009e 1B01 lsls r3, r3, #4 ARM GAS /tmp/ccM1MpQr.s page 47 1355 00a0 0B44 add r3, r3, r1 1356 00a2 1A60 str r2, [r3] 1357 .L69: 1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the DLC */ 1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); 1358 .loc 1 1256 11 1359 00a4 FB68 ldr r3, [r7, #12] 1360 00a6 1968 ldr r1, [r3] 1361 .loc 1 1256 66 1362 00a8 BB68 ldr r3, [r7, #8] 1363 00aa 1A69 ldr r2, [r3, #16] 1364 .loc 1 1256 56 1365 00ac 7B69 ldr r3, [r7, #20] 1366 00ae 1833 adds r3, r3, #24 1367 00b0 1B01 lsls r3, r3, #4 1368 00b2 0B44 add r3, r3, r1 1369 00b4 0433 adds r3, r3, #4 1370 00b6 1A60 str r2, [r3] 1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the Transmit Global Time mode */ 1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->TransmitGlobalTime == ENABLE) 1371 .loc 1 1259 18 1372 00b8 BB68 ldr r3, [r7, #8] 1373 00ba 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 1374 .loc 1 1259 10 1375 00bc 012B cmp r3, #1 1376 00be 11D1 bne .L70 1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); 1377 .loc 1 1261 9 1378 00c0 FB68 ldr r3, [r7, #12] 1379 00c2 1A68 ldr r2, [r3] 1380 00c4 7B69 ldr r3, [r7, #20] 1381 00c6 1833 adds r3, r3, #24 1382 00c8 1B01 lsls r3, r3, #4 1383 00ca 1344 add r3, r3, r2 1384 00cc 0433 adds r3, r3, #4 1385 00ce 1B68 ldr r3, [r3] 1386 00d0 FA68 ldr r2, [r7, #12] 1387 00d2 1168 ldr r1, [r2] 1388 00d4 43F48072 orr r2, r3, #256 1389 00d8 7B69 ldr r3, [r7, #20] 1390 00da 1833 adds r3, r3, #24 1391 00dc 1B01 lsls r3, r3, #4 1392 00de 0B44 add r3, r3, r1 1393 00e0 0433 adds r3, r3, #4 1394 00e2 1A60 str r2, [r3] 1395 .L70: 1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the data field */ 1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, 1396 .loc 1 1265 7 1397 00e4 7B68 ldr r3, [r7, #4] 1398 00e6 0733 adds r3, r3, #7 ARM GAS /tmp/ccM1MpQr.s page 48 1399 00e8 1B78 ldrb r3, [r3] @ zero_extendqisi2 1400 00ea 1A06 lsls r2, r3, #24 1401 00ec 7B68 ldr r3, [r7, #4] 1402 00ee 0633 adds r3, r3, #6 1403 00f0 1B78 ldrb r3, [r3] @ zero_extendqisi2 1404 00f2 1B04 lsls r3, r3, #16 1405 00f4 1A43 orrs r2, r2, r3 1406 00f6 7B68 ldr r3, [r7, #4] 1407 00f8 0533 adds r3, r3, #5 1408 00fa 1B78 ldrb r3, [r3] @ zero_extendqisi2 1409 00fc 1B02 lsls r3, r3, #8 1410 00fe 1343 orrs r3, r3, r2 1411 0100 7A68 ldr r2, [r7, #4] 1412 0102 0432 adds r2, r2, #4 1413 0104 1278 ldrb r2, [r2] @ zero_extendqisi2 1414 0106 1046 mov r0, r2 1415 0108 FA68 ldr r2, [r7, #12] 1416 010a 1168 ldr r1, [r2] 1417 010c 43EA0002 orr r2, r3, r0 1418 0110 7B69 ldr r3, [r7, #20] 1419 0112 1B01 lsls r3, r3, #4 1420 0114 0B44 add r3, r3, r1 1421 0116 03F5C673 add r3, r3, #396 1422 011a 1A60 str r2, [r3] 1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | 1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | 1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | 1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); 1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, 1423 .loc 1 1270 7 1424 011c 7B68 ldr r3, [r7, #4] 1425 011e 0333 adds r3, r3, #3 1426 0120 1B78 ldrb r3, [r3] @ zero_extendqisi2 1427 0122 1A06 lsls r2, r3, #24 1428 0124 7B68 ldr r3, [r7, #4] 1429 0126 0233 adds r3, r3, #2 1430 0128 1B78 ldrb r3, [r3] @ zero_extendqisi2 1431 012a 1B04 lsls r3, r3, #16 1432 012c 1A43 orrs r2, r2, r3 1433 012e 7B68 ldr r3, [r7, #4] 1434 0130 0133 adds r3, r3, #1 1435 0132 1B78 ldrb r3, [r3] @ zero_extendqisi2 1436 0134 1B02 lsls r3, r3, #8 1437 0136 1343 orrs r3, r3, r2 1438 0138 7A68 ldr r2, [r7, #4] 1439 013a 1278 ldrb r2, [r2] @ zero_extendqisi2 1440 013c 1046 mov r0, r2 1441 013e FA68 ldr r2, [r7, #12] 1442 0140 1168 ldr r1, [r2] 1443 0142 43EA0002 orr r2, r3, r0 1444 0146 7B69 ldr r3, [r7, #20] 1445 0148 1B01 lsls r3, r3, #4 1446 014a 0B44 add r3, r3, r1 1447 014c 03F5C473 add r3, r3, #392 1448 0150 1A60 str r2, [r3] 1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) | 1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | ARM GAS /tmp/ccM1MpQr.s page 49 1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | 1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); 1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request transmission */ 1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); 1449 .loc 1 1277 7 1450 0152 FB68 ldr r3, [r7, #12] 1451 0154 1A68 ldr r2, [r3] 1452 0156 7B69 ldr r3, [r7, #20] 1453 0158 1833 adds r3, r3, #24 1454 015a 1B01 lsls r3, r3, #4 1455 015c 1344 add r3, r3, r2 1456 015e 1B68 ldr r3, [r3] 1457 0160 FA68 ldr r2, [r7, #12] 1458 0162 1168 ldr r1, [r2] 1459 0164 43F00102 orr r2, r3, #1 1460 0168 7B69 ldr r3, [r7, #20] 1461 016a 1833 adds r3, r3, #24 1462 016c 1B01 lsls r3, r3, #4 1463 016e 0B44 add r3, r3, r1 1464 0170 1A60 str r2, [r3] 1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 1465 .loc 1 1280 14 1466 0172 0023 movs r3, #0 1467 0174 0EE0 b .L71 1468 .L67: 1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 1469 .loc 1 1285 11 1470 0176 FB68 ldr r3, [r7, #12] 1471 0178 5B6A ldr r3, [r3, #36] 1472 .loc 1 1285 23 1473 017a 43F40012 orr r2, r3, #2097152 1474 017e FB68 ldr r3, [r7, #12] 1475 0180 5A62 str r2, [r3, #36] 1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 1476 .loc 1 1287 14 1477 0182 0123 movs r3, #1 1478 0184 06E0 b .L71 1479 .L65: 1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 1480 .loc 1 1293 9 1481 0186 FB68 ldr r3, [r7, #12] 1482 0188 5B6A ldr r3, [r3, #36] 1483 .loc 1 1293 21 1484 018a 43F48022 orr r2, r3, #262144 ARM GAS /tmp/ccM1MpQr.s page 50 1485 018e FB68 ldr r3, [r7, #12] 1486 0190 5A62 str r2, [r3, #36] 1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 1487 .loc 1 1295 12 1488 0192 0123 movs r3, #1 1489 .L71: 1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1490 .loc 1 1297 1 1491 0194 1846 mov r0, r3 1492 0196 2437 adds r7, r7, #36 1493 .cfi_def_cfa_offset 4 1494 0198 BD46 mov sp, r7 1495 .cfi_def_cfa_register 13 1496 @ sp needed 1497 019a 5DF8047B ldr r7, [sp], #4 1498 .cfi_restore 7 1499 .cfi_def_cfa_offset 0 1500 019e 7047 bx lr 1501 .cfi_endproc 1502 .LFE140: 1504 .section .text.HAL_CAN_AbortTxRequest,"ax",%progbits 1505 .align 1 1506 .global HAL_CAN_AbortTxRequest 1507 .syntax unified 1508 .thumb 1509 .thumb_func 1511 HAL_CAN_AbortTxRequest: 1512 .LFB141: 1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Abort transmission requests 1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailboxes List of the Tx Mailboxes to abort. 1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes. 1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) 1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1513 .loc 1 1308 1 1514 .cfi_startproc 1515 @ args = 0, pretend = 0, frame = 16 1516 @ frame_needed = 1, uses_anonymous_args = 0 1517 @ link register save eliminated. 1518 0000 80B4 push {r7} 1519 .cfi_def_cfa_offset 4 1520 .cfi_offset 7, -4 1521 0002 85B0 sub sp, sp, #20 1522 .cfi_def_cfa_offset 24 1523 0004 00AF add r7, sp, #0 1524 .cfi_def_cfa_register 7 1525 0006 7860 str r0, [r7, #4] 1526 0008 3960 str r1, [r7] 1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1527 .loc 1 1309 24 ARM GAS /tmp/ccM1MpQr.s page 51 1528 000a 7B68 ldr r3, [r7, #4] 1529 000c 93F82030 ldrb r3, [r3, #32] 1530 0010 FB73 strb r3, [r7, #15] 1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ 1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); 1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 1531 .loc 1 1314 6 1532 0012 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 1533 0014 012B cmp r3, #1 1534 0016 02D0 beq .L73 1535 .loc 1 1314 38 discriminator 1 1536 0018 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 1537 001a 022B cmp r3, #2 1538 001c 28D1 bne .L74 1539 .L73: 1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 0 */ 1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U) 1540 .loc 1 1318 22 1541 001e 3B68 ldr r3, [r7] 1542 0020 03F00103 and r3, r3, #1 1543 .loc 1 1318 8 1544 0024 002B cmp r3, #0 1545 0026 07D0 beq .L75 1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 0 */ 1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); 1546 .loc 1 1321 7 1547 0028 7B68 ldr r3, [r7, #4] 1548 002a 1B68 ldr r3, [r3] 1549 002c 9A68 ldr r2, [r3, #8] 1550 002e 7B68 ldr r3, [r7, #4] 1551 0030 1B68 ldr r3, [r3] 1552 0032 42F08002 orr r2, r2, #128 1553 0036 9A60 str r2, [r3, #8] 1554 .L75: 1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 1 */ 1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U) 1555 .loc 1 1325 22 1556 0038 3B68 ldr r3, [r7] 1557 003a 03F00203 and r3, r3, #2 1558 .loc 1 1325 8 1559 003e 002B cmp r3, #0 1560 0040 07D0 beq .L76 1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 1 */ 1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); 1561 .loc 1 1328 7 1562 0042 7B68 ldr r3, [r7, #4] 1563 0044 1B68 ldr r3, [r3] 1564 0046 9A68 ldr r2, [r3, #8] 1565 0048 7B68 ldr r3, [r7, #4] ARM GAS /tmp/ccM1MpQr.s page 52 1566 004a 1B68 ldr r3, [r3] 1567 004c 42F40042 orr r2, r2, #32768 1568 0050 9A60 str r2, [r3, #8] 1569 .L76: 1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 2 */ 1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U) 1570 .loc 1 1332 22 1571 0052 3B68 ldr r3, [r7] 1572 0054 03F00403 and r3, r3, #4 1573 .loc 1 1332 8 1574 0058 002B cmp r3, #0 1575 005a 07D0 beq .L77 1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 2 */ 1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); 1576 .loc 1 1335 7 1577 005c 7B68 ldr r3, [r7, #4] 1578 005e 1B68 ldr r3, [r3] 1579 0060 9A68 ldr r2, [r3, #8] 1580 0062 7B68 ldr r3, [r7, #4] 1581 0064 1B68 ldr r3, [r3] 1582 0066 42F40002 orr r2, r2, #8388608 1583 006a 9A60 str r2, [r3, #8] 1584 .L77: 1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 1585 .loc 1 1339 12 1586 006c 0023 movs r3, #0 1587 006e 06E0 b .L78 1588 .L74: 1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 1589 .loc 1 1344 9 1590 0070 7B68 ldr r3, [r7, #4] 1591 0072 5B6A ldr r3, [r3, #36] 1592 .loc 1 1344 21 1593 0074 43F48022 orr r2, r3, #262144 1594 0078 7B68 ldr r3, [r7, #4] 1595 007a 5A62 str r2, [r3, #36] 1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 1596 .loc 1 1346 12 1597 007c 0123 movs r3, #1 1598 .L78: 1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1599 .loc 1 1348 1 1600 007e 1846 mov r0, r3 1601 0080 1437 adds r7, r7, #20 1602 .cfi_def_cfa_offset 4 ARM GAS /tmp/ccM1MpQr.s page 53 1603 0082 BD46 mov sp, r7 1604 .cfi_def_cfa_register 13 1605 @ sp needed 1606 0084 5DF8047B ldr r7, [sp], #4 1607 .cfi_restore 7 1608 .cfi_def_cfa_offset 0 1609 0088 7047 bx lr 1610 .cfi_endproc 1611 .LFE141: 1613 .section .text.HAL_CAN_GetTxMailboxesFreeLevel,"ax",%progbits 1614 .align 1 1615 .global HAL_CAN_GetTxMailboxesFreeLevel 1616 .syntax unified 1617 .thumb 1618 .thumb_func 1620 HAL_CAN_GetTxMailboxesFreeLevel: 1621 .LFB142: 1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes. 1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Number of free Tx Mailboxes. 1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) 1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1622 .loc 1 1357 1 1623 .cfi_startproc 1624 @ args = 0, pretend = 0, frame = 16 1625 @ frame_needed = 1, uses_anonymous_args = 0 1626 @ link register save eliminated. 1627 0000 80B4 push {r7} 1628 .cfi_def_cfa_offset 4 1629 .cfi_offset 7, -4 1630 0002 85B0 sub sp, sp, #20 1631 .cfi_def_cfa_offset 24 1632 0004 00AF add r7, sp, #0 1633 .cfi_def_cfa_register 7 1634 0006 7860 str r0, [r7, #4] 1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t freelevel = 0U; 1635 .loc 1 1358 12 1636 0008 0023 movs r3, #0 1637 000a FB60 str r3, [r7, #12] 1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1638 .loc 1 1359 24 1639 000c 7B68 ldr r3, [r7, #4] 1640 000e 93F82030 ldrb r3, [r3, #32] 1641 0012 FB72 strb r3, [r7, #11] 1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 1642 .loc 1 1361 6 1643 0014 FB7A ldrb r3, [r7, #11] @ zero_extendqisi2 1644 0016 012B cmp r3, #1 1645 0018 02D0 beq .L80 1646 .loc 1 1361 38 discriminator 1 1647 001a FB7A ldrb r3, [r7, #11] @ zero_extendqisi2 1648 001c 022B cmp r3, #2 ARM GAS /tmp/ccM1MpQr.s page 54 1649 001e 1DD1 bne .L81 1650 .L80: 1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 0 status */ 1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) 1651 .loc 1 1365 14 1652 0020 7B68 ldr r3, [r7, #4] 1653 0022 1B68 ldr r3, [r3] 1654 .loc 1 1365 24 1655 0024 9B68 ldr r3, [r3, #8] 1656 .loc 1 1365 30 1657 0026 03F08063 and r3, r3, #67108864 1658 .loc 1 1365 8 1659 002a 002B cmp r3, #0 1660 002c 02D0 beq .L82 1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++; 1661 .loc 1 1367 16 1662 002e FB68 ldr r3, [r7, #12] 1663 0030 0133 adds r3, r3, #1 1664 0032 FB60 str r3, [r7, #12] 1665 .L82: 1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 1 status */ 1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) 1666 .loc 1 1371 14 1667 0034 7B68 ldr r3, [r7, #4] 1668 0036 1B68 ldr r3, [r3] 1669 .loc 1 1371 24 1670 0038 9B68 ldr r3, [r3, #8] 1671 .loc 1 1371 30 1672 003a 03F00063 and r3, r3, #134217728 1673 .loc 1 1371 8 1674 003e 002B cmp r3, #0 1675 0040 02D0 beq .L83 1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++; 1676 .loc 1 1373 16 1677 0042 FB68 ldr r3, [r7, #12] 1678 0044 0133 adds r3, r3, #1 1679 0046 FB60 str r3, [r7, #12] 1680 .L83: 1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 2 status */ 1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) 1681 .loc 1 1377 14 1682 0048 7B68 ldr r3, [r7, #4] 1683 004a 1B68 ldr r3, [r3] 1684 .loc 1 1377 24 1685 004c 9B68 ldr r3, [r3, #8] 1686 .loc 1 1377 30 1687 004e 03F08053 and r3, r3, #268435456 1688 .loc 1 1377 8 1689 0052 002B cmp r3, #0 ARM GAS /tmp/ccM1MpQr.s page 55 1690 0054 02D0 beq .L81 1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++; 1691 .loc 1 1379 16 1692 0056 FB68 ldr r3, [r7, #12] 1693 0058 0133 adds r3, r3, #1 1694 005a FB60 str r3, [r7, #12] 1695 .L81: 1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return Tx Mailboxes free level */ 1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return freelevel; 1696 .loc 1 1384 10 1697 005c FB68 ldr r3, [r7, #12] 1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1698 .loc 1 1385 1 1699 005e 1846 mov r0, r3 1700 0060 1437 adds r7, r7, #20 1701 .cfi_def_cfa_offset 4 1702 0062 BD46 mov sp, r7 1703 .cfi_def_cfa_register 13 1704 @ sp needed 1705 0064 5DF8047B ldr r7, [sp], #4 1706 .cfi_restore 7 1707 .cfi_def_cfa_offset 0 1708 0068 7047 bx lr 1709 .cfi_endproc 1710 .LFE142: 1712 .section .text.HAL_CAN_IsTxMessagePending,"ax",%progbits 1713 .align 1 1714 .global HAL_CAN_IsTxMessagePending 1715 .syntax unified 1716 .thumb 1717 .thumb_func 1719 HAL_CAN_IsTxMessagePending: 1720 .LFB143: 1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Check if a transmission request is pending on the selected Tx 1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Mailboxes. 1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailboxes List of Tx Mailboxes to check. 1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes. 1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Status 1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 0 : No pending transmission request on any selected Tx Mailboxes. 1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 1 : Pending transmission request on at least one of the selected 1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Tx Mailbox. 1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) 1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1721 .loc 1 1400 1 1722 .cfi_startproc 1723 @ args = 0, pretend = 0, frame = 16 1724 @ frame_needed = 1, uses_anonymous_args = 0 1725 @ link register save eliminated. ARM GAS /tmp/ccM1MpQr.s page 56 1726 0000 80B4 push {r7} 1727 .cfi_def_cfa_offset 4 1728 .cfi_offset 7, -4 1729 0002 85B0 sub sp, sp, #20 1730 .cfi_def_cfa_offset 24 1731 0004 00AF add r7, sp, #0 1732 .cfi_def_cfa_register 7 1733 0006 7860 str r0, [r7, #4] 1734 0008 3960 str r1, [r7] 1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t status = 0U; 1735 .loc 1 1401 12 1736 000a 0023 movs r3, #0 1737 000c FB60 str r3, [r7, #12] 1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1738 .loc 1 1402 24 1739 000e 7B68 ldr r3, [r7, #4] 1740 0010 93F82030 ldrb r3, [r3, #32] 1741 0014 FB72 strb r3, [r7, #11] 1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ 1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); 1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 1742 .loc 1 1407 6 1743 0016 FB7A ldrb r3, [r7, #11] @ zero_extendqisi2 1744 0018 012B cmp r3, #1 1745 001a 02D0 beq .L86 1746 .loc 1 1407 38 discriminator 1 1747 001c FB7A ldrb r3, [r7, #11] @ zero_extendqisi2 1748 001e 022B cmp r3, #2 1749 0020 0BD1 bne .L87 1750 .L86: 1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check pending transmission request on the selected Tx Mailboxes */ 1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_P 1751 .loc 1 1411 14 1752 0022 7B68 ldr r3, [r7, #4] 1753 0024 1B68 ldr r3, [r3] 1754 .loc 1 1411 24 1755 0026 9A68 ldr r2, [r3, #8] 1756 .loc 1 1411 45 1757 0028 3B68 ldr r3, [r7] 1758 002a 9B06 lsls r3, r3, #26 1759 .loc 1 1411 30 1760 002c 1A40 ands r2, r2, r3 1761 .loc 1 1411 83 1762 002e 3B68 ldr r3, [r7] 1763 0030 9B06 lsls r3, r3, #26 1764 .loc 1 1411 8 1765 0032 9A42 cmp r2, r3 1766 0034 01D0 beq .L87 1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = 1U; 1767 .loc 1 1413 14 1768 0036 0123 movs r3, #1 1769 0038 FB60 str r3, [r7, #12] ARM GAS /tmp/ccM1MpQr.s page 57 1770 .L87: 1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return status */ 1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; 1771 .loc 1 1418 10 1772 003a FB68 ldr r3, [r7, #12] 1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1773 .loc 1 1419 1 1774 003c 1846 mov r0, r3 1775 003e 1437 adds r7, r7, #20 1776 .cfi_def_cfa_offset 4 1777 0040 BD46 mov sp, r7 1778 .cfi_def_cfa_register 13 1779 @ sp needed 1780 0042 5DF8047B ldr r7, [sp], #4 1781 .cfi_restore 7 1782 .cfi_def_cfa_offset 0 1783 0046 7047 bx lr 1784 .cfi_endproc 1785 .LFE143: 1787 .section .text.HAL_CAN_GetTxTimestamp,"ax",%progbits 1788 .align 1 1789 .global HAL_CAN_GetTxTimestamp 1790 .syntax unified 1791 .thumb 1792 .thumb_func 1794 HAL_CAN_GetTxTimestamp: 1795 .LFB144: 1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return timestamp of Tx message sent, if time triggered communication 1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mode is enabled. 1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailbox Tx Mailbox where the timestamp of message sent will be 1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * read. 1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one value of @arg CAN_Tx_Mailboxes. 1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Timestamp of message sent from Tx Mailbox. 1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox) 1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1796 .loc 1 1432 1 1797 .cfi_startproc 1798 @ args = 0, pretend = 0, frame = 32 1799 @ frame_needed = 1, uses_anonymous_args = 0 1800 @ link register save eliminated. 1801 0000 80B4 push {r7} 1802 .cfi_def_cfa_offset 4 1803 .cfi_offset 7, -4 1804 0002 89B0 sub sp, sp, #36 1805 .cfi_def_cfa_offset 40 1806 0004 00AF add r7, sp, #0 1807 .cfi_def_cfa_register 7 1808 0006 7860 str r0, [r7, #4] 1809 0008 3960 str r1, [r7] ARM GAS /tmp/ccM1MpQr.s page 58 1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t timestamp = 0U; 1810 .loc 1 1433 12 1811 000a 0023 movs r3, #0 1812 000c FB61 str r3, [r7, #28] 1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t transmitmailbox; 1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1813 .loc 1 1435 24 1814 000e 7B68 ldr r3, [r7, #4] 1815 0010 93F82030 ldrb r3, [r3, #32] 1816 0014 FB76 strb r3, [r7, #27] 1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ 1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX(TxMailbox)); 1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 1817 .loc 1 1440 6 1818 0016 FB7E ldrb r3, [r7, #27] @ zero_extendqisi2 1819 0018 012B cmp r3, #1 1820 001a 02D0 beq .L90 1821 .loc 1 1440 38 discriminator 1 1822 001c FB7E ldrb r3, [r7, #27] @ zero_extendqisi2 1823 001e 022B cmp r3, #2 1824 0020 15D1 bne .L91 1825 .L90: 1826 0022 3B68 ldr r3, [r7] 1827 0024 3B61 str r3, [r7, #16] 1828 .LBB4: 1829 .LBB5: 1830 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ ARM GAS /tmp/ccM1MpQr.s page 59 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccM1MpQr.s page 60 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); ARM GAS /tmp/ccM1MpQr.s page 61 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 158:Drivers/CMSIS/Include/cmsis_gcc.h **** 159:Drivers/CMSIS/Include/cmsis_gcc.h **** 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccM1MpQr.s page 62 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } 254:Drivers/CMSIS/Include/cmsis_gcc.h **** 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) ARM GAS /tmp/ccM1MpQr.s page 63 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** 271:Drivers/CMSIS/Include/cmsis_gcc.h **** 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat ARM GAS /tmp/ccM1MpQr.s page 64 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 319:Drivers/CMSIS/Include/cmsis_gcc.h **** 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } 335:Drivers/CMSIS/Include/cmsis_gcc.h **** 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 359:Drivers/CMSIS/Include/cmsis_gcc.h **** 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } 363:Drivers/CMSIS/Include/cmsis_gcc.h **** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) ARM GAS /tmp/ccM1MpQr.s page 65 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 385:Drivers/CMSIS/Include/cmsis_gcc.h **** 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } 389:Drivers/CMSIS/Include/cmsis_gcc.h **** 390:Drivers/CMSIS/Include/cmsis_gcc.h **** 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 405:Drivers/CMSIS/Include/cmsis_gcc.h **** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/ccM1MpQr.s page 66 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 429:Drivers/CMSIS/Include/cmsis_gcc.h **** 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** 455:Drivers/CMSIS/Include/cmsis_gcc.h **** 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 464:Drivers/CMSIS/Include/cmsis_gcc.h **** 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 484:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccM1MpQr.s page 67 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 508:Drivers/CMSIS/Include/cmsis_gcc.h **** 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } 520:Drivers/CMSIS/Include/cmsis_gcc.h **** 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 530:Drivers/CMSIS/Include/cmsis_gcc.h **** 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } 534:Drivers/CMSIS/Include/cmsis_gcc.h **** 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccM1MpQr.s page 68 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } 561:Drivers/CMSIS/Include/cmsis_gcc.h **** 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 578:Drivers/CMSIS/Include/cmsis_gcc.h **** 579:Drivers/CMSIS/Include/cmsis_gcc.h **** 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else ARM GAS /tmp/ccM1MpQr.s page 69 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } 604:Drivers/CMSIS/Include/cmsis_gcc.h **** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 610:Drivers/CMSIS/Include/cmsis_gcc.h **** 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 626:Drivers/CMSIS/Include/cmsis_gcc.h **** 627:Drivers/CMSIS/Include/cmsis_gcc.h **** 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 633:Drivers/CMSIS/Include/cmsis_gcc.h **** 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 648:Drivers/CMSIS/Include/cmsis_gcc.h **** 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s ARM GAS /tmp/ccM1MpQr.s page 70 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 669:Drivers/CMSIS/Include/cmsis_gcc.h **** 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 675:Drivers/CMSIS/Include/cmsis_gcc.h **** 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } 691:Drivers/CMSIS/Include/cmsis_gcc.h **** 692:Drivers/CMSIS/Include/cmsis_gcc.h **** 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/ccM1MpQr.s page 71 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 756:Drivers/CMSIS/Include/cmsis_gcc.h **** 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) ARM GAS /tmp/ccM1MpQr.s page 72 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 777:Drivers/CMSIS/Include/cmsis_gcc.h **** 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } 785:Drivers/CMSIS/Include/cmsis_gcc.h **** 786:Drivers/CMSIS/Include/cmsis_gcc.h **** 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else ARM GAS /tmp/ccM1MpQr.s page 73 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 831:Drivers/CMSIS/Include/cmsis_gcc.h **** 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 843:Drivers/CMSIS/Include/cmsis_gcc.h **** 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 870:Drivers/CMSIS/Include/cmsis_gcc.h **** 871:Drivers/CMSIS/Include/cmsis_gcc.h **** 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } 881:Drivers/CMSIS/Include/cmsis_gcc.h **** 882:Drivers/CMSIS/Include/cmsis_gcc.h **** 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/ccM1MpQr.s page 74 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } 892:Drivers/CMSIS/Include/cmsis_gcc.h **** 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 906:Drivers/CMSIS/Include/cmsis_gcc.h **** 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 940:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccM1MpQr.s page 75 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } 945:Drivers/CMSIS/Include/cmsis_gcc.h **** 946:Drivers/CMSIS/Include/cmsis_gcc.h **** 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } 963:Drivers/CMSIS/Include/cmsis_gcc.h **** 964:Drivers/CMSIS/Include/cmsis_gcc.h **** 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 984:Drivers/CMSIS/Include/cmsis_gcc.h **** 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 1831 .loc 2 988 4 1832 0026 3B69 ldr r3, [r7, #16] 1833 .syntax unified 1834 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1835 0028 93FAA3F3 rbit r3, r3 1836 @ 0 "" 2 1837 .thumb 1838 .syntax unified 1839 002c FB60 str r3, [r7, #12] ARM GAS /tmp/ccM1MpQr.s page 76 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 991:Drivers/CMSIS/Include/cmsis_gcc.h **** 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1840 .loc 2 1001 10 1841 002e FB68 ldr r3, [r7, #12] 1842 .LBE5: 1843 .LBE4: 1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Select the Tx mailbox */ 1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmitmailbox = POSITION_VAL(TxMailbox); 1844 .loc 1 1444 23 discriminator 1 1845 0030 B3FA83F3 clz r3, r3 1846 .loc 1 1444 23 is_stmt 0 discriminator 2 1847 0034 DBB2 uxtb r3, r3 1848 .loc 1 1444 21 is_stmt 1 discriminator 2 1849 0036 7B61 str r3, [r7, #20] 1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get timestamp */ 1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TI 1850 .loc 1 1447 22 1851 0038 7B68 ldr r3, [r7, #4] 1852 003a 1A68 ldr r2, [r3] 1853 .loc 1 1447 61 1854 003c 7B69 ldr r3, [r7, #20] 1855 003e 1833 adds r3, r3, #24 1856 0040 1B01 lsls r3, r3, #4 1857 0042 1344 add r3, r3, r2 1858 0044 0433 adds r3, r3, #4 1859 0046 1B68 ldr r3, [r3] 1860 .loc 1 1447 85 1861 0048 1B0C lsrs r3, r3, #16 1862 .loc 1 1447 15 1863 004a 9BB2 uxth r3, r3 1864 004c FB61 str r3, [r7, #28] 1865 .L91: 1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return the timestamp */ 1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return timestamp; 1866 .loc 1 1451 10 1867 004e FB69 ldr r3, [r7, #28] 1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1868 .loc 1 1452 1 1869 0050 1846 mov r0, r3 1870 0052 2437 adds r7, r7, #36 1871 .cfi_def_cfa_offset 4 ARM GAS /tmp/ccM1MpQr.s page 77 1872 0054 BD46 mov sp, r7 1873 .cfi_def_cfa_register 13 1874 @ sp needed 1875 0056 5DF8047B ldr r7, [sp], #4 1876 .cfi_restore 7 1877 .cfi_def_cfa_offset 0 1878 005a 7047 bx lr 1879 .cfi_endproc 1880 .LFE144: 1882 .section .text.HAL_CAN_GetRxMessage,"ax",%progbits 1883 .align 1 1884 .global HAL_CAN_GetRxMessage 1885 .syntax unified 1886 .thumb 1887 .thumb_func 1889 HAL_CAN_GetRxMessage: 1890 .LFB145: 1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Get an CAN frame from the Rx FIFO zone into the message RAM. 1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param RxFifo Fifo number of the received message to be read. 1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number. 1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header 1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * of the Rx frame will be stored. 1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param aData array where the payload of the Rx frame will be stored. 1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, 1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) 1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1891 .loc 1 1467 1 1892 .cfi_startproc 1893 @ args = 0, pretend = 0, frame = 24 1894 @ frame_needed = 1, uses_anonymous_args = 0 1895 @ link register save eliminated. 1896 0000 80B4 push {r7} 1897 .cfi_def_cfa_offset 4 1898 .cfi_offset 7, -4 1899 0002 87B0 sub sp, sp, #28 1900 .cfi_def_cfa_offset 32 1901 0004 00AF add r7, sp, #0 1902 .cfi_def_cfa_register 7 1903 0006 F860 str r0, [r7, #12] 1904 0008 B960 str r1, [r7, #8] 1905 000a 7A60 str r2, [r7, #4] 1906 000c 3B60 str r3, [r7] 1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 1907 .loc 1 1468 24 1908 000e FB68 ldr r3, [r7, #12] 1909 0010 93F82030 ldrb r3, [r3, #32] 1910 0014 FB75 strb r3, [r7, #23] 1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo)); 1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || ARM GAS /tmp/ccM1MpQr.s page 78 1911 .loc 1 1472 6 1912 0016 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2 1913 0018 012B cmp r3, #1 1914 001a 03D0 beq .L95 1915 .loc 1 1472 38 discriminator 1 1916 001c FB7D ldrb r3, [r7, #23] @ zero_extendqisi2 1917 001e 022B cmp r3, #2 1918 0020 40F00381 bne .L96 1919 .L95: 1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the Rx FIFO */ 1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 1920 .loc 1 1476 8 1921 0024 BB68 ldr r3, [r7, #8] 1922 0026 002B cmp r3, #0 1923 0028 0ED1 bne .L97 1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that the Rx FIFO 0 is not empty */ 1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) 1924 .loc 1 1479 16 1925 002a FB68 ldr r3, [r7, #12] 1926 002c 1B68 ldr r3, [r3] 1927 .loc 1 1479 26 1928 002e DB68 ldr r3, [r3, #12] 1929 .loc 1 1479 33 1930 0030 03F00303 and r3, r3, #3 1931 .loc 1 1479 10 1932 0034 002B cmp r3, #0 1933 0036 16D1 bne .L98 1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 1934 .loc 1 1482 13 1935 0038 FB68 ldr r3, [r7, #12] 1936 003a 5B6A ldr r3, [r3, #36] 1937 .loc 1 1482 25 1938 003c 43F40012 orr r2, r3, #2097152 1939 0040 FB68 ldr r3, [r7, #12] 1940 0042 5A62 str r2, [r3, #36] 1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 1941 .loc 1 1484 16 1942 0044 0123 movs r3, #1 1943 0046 F7E0 b .L99 1944 .L97: 1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */ 1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that the Rx FIFO 1 is not empty */ 1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) 1945 .loc 1 1490 16 1946 0048 FB68 ldr r3, [r7, #12] 1947 004a 1B68 ldr r3, [r3] 1948 .loc 1 1490 26 1949 004c 1B69 ldr r3, [r3, #16] ARM GAS /tmp/ccM1MpQr.s page 79 1950 .loc 1 1490 33 1951 004e 03F00303 and r3, r3, #3 1952 .loc 1 1490 10 1953 0052 002B cmp r3, #0 1954 0054 07D1 bne .L98 1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 1955 .loc 1 1493 13 1956 0056 FB68 ldr r3, [r7, #12] 1957 0058 5B6A ldr r3, [r3, #36] 1958 .loc 1 1493 25 1959 005a 43F40012 orr r2, r3, #2097152 1960 005e FB68 ldr r3, [r7, #12] 1961 0060 5A62 str r2, [r3, #36] 1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 1962 .loc 1 1495 16 1963 0062 0123 movs r3, #1 1964 0064 E8E0 b .L99 1965 .L98: 1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get the header */ 1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; 1966 .loc 1 1500 39 1967 0066 FB68 ldr r3, [r7, #12] 1968 0068 1A68 ldr r2, [r3] 1969 .loc 1 1500 71 1970 006a BB68 ldr r3, [r7, #8] 1971 006c 1B33 adds r3, r3, #27 1972 006e 1B01 lsls r3, r3, #4 1973 0070 1344 add r3, r3, r2 1974 0072 1B68 ldr r3, [r3] 1975 .loc 1 1500 33 1976 0074 03F00402 and r2, r3, #4 1977 .loc 1 1500 18 1978 0078 7B68 ldr r3, [r7, #4] 1979 007a 9A60 str r2, [r3, #8] 1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) 1980 .loc 1 1501 16 1981 007c 7B68 ldr r3, [r7, #4] 1982 007e 9B68 ldr r3, [r3, #8] 1983 .loc 1 1501 8 1984 0080 002B cmp r3, #0 1985 0082 0CD1 bne .L100 1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_ 1986 .loc 1 1503 45 1987 0084 FB68 ldr r3, [r7, #12] 1988 0086 1A68 ldr r2, [r3] 1989 .loc 1 1503 77 1990 0088 BB68 ldr r3, [r7, #8] 1991 008a 1B33 adds r3, r3, #27 1992 008c 1B01 lsls r3, r3, #4 1993 008e 1344 add r3, r3, r2 ARM GAS /tmp/ccM1MpQr.s page 80 1994 0090 1B68 ldr r3, [r3] 1995 .loc 1 1503 83 1996 0092 5B0D lsrs r3, r3, #21 1997 0094 C3F30A02 ubfx r2, r3, #0, #11 1998 .loc 1 1503 22 1999 0098 7B68 ldr r3, [r7, #4] 2000 009a 1A60 str r2, [r3] 2001 009c 0BE0 b .L101 2002 .L100: 1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & 1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; 2003 .loc 1 1508 29 2004 009e FB68 ldr r3, [r7, #12] 2005 00a0 1A68 ldr r2, [r3] 2006 .loc 1 1508 61 2007 00a2 BB68 ldr r3, [r7, #8] 2008 00a4 1B33 adds r3, r3, #27 2009 00a6 1B01 lsls r3, r3, #4 2010 00a8 1344 add r3, r3, r2 2011 00aa 1B68 ldr r3, [r3] 2012 .loc 1 1508 67 2013 00ac DB08 lsrs r3, r3, #3 2014 00ae 23F06042 bic r2, r3, #-536870912 1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; 2015 .loc 1 1507 22 2016 00b2 7B68 ldr r3, [r7, #4] 2017 00b4 5A60 str r2, [r3, #4] 2018 .L101: 1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); 2019 .loc 1 1510 40 2020 00b6 FB68 ldr r3, [r7, #12] 2021 00b8 1A68 ldr r2, [r3] 2022 .loc 1 1510 72 2023 00ba BB68 ldr r3, [r7, #8] 2024 00bc 1B33 adds r3, r3, #27 2025 00be 1B01 lsls r3, r3, #4 2026 00c0 1344 add r3, r3, r2 2027 00c2 1B68 ldr r3, [r3] 2028 .loc 1 1510 34 2029 00c4 03F00202 and r2, r3, #2 2030 .loc 1 1510 18 2031 00c8 7B68 ldr r3, [r7, #4] 2032 00ca DA60 str r2, [r3, #12] 1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) 2033 .loc 1 1511 31 2034 00cc FB68 ldr r3, [r7, #12] 2035 00ce 1A68 ldr r2, [r3] 2036 .loc 1 1511 63 2037 00d0 BB68 ldr r3, [r7, #8] 2038 00d2 1B33 adds r3, r3, #27 2039 00d4 1B01 lsls r3, r3, #4 2040 00d6 1344 add r3, r3, r2 2041 00d8 0433 adds r3, r3, #4 ARM GAS /tmp/ccM1MpQr.s page 81 2042 00da 1B68 ldr r3, [r3] 2043 .loc 1 1511 92 2044 00dc 03F00803 and r3, r3, #8 2045 .loc 1 1511 8 2046 00e0 002B cmp r3, #0 2047 00e2 03D0 beq .L102 1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Truncate DLC to 8 if received field is over range */ 1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->DLC = 8U; 2048 .loc 1 1514 20 2049 00e4 7B68 ldr r3, [r7, #4] 2050 00e6 0822 movs r2, #8 2051 00e8 1A61 str r2, [r3, #16] 2052 00ea 0BE0 b .L103 2053 .L102: 1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_P 2054 .loc 1 1518 43 2055 00ec FB68 ldr r3, [r7, #12] 2056 00ee 1A68 ldr r2, [r3] 2057 .loc 1 1518 75 2058 00f0 BB68 ldr r3, [r7, #8] 2059 00f2 1B33 adds r3, r3, #27 2060 00f4 1B01 lsls r3, r3, #4 2061 00f6 1344 add r3, r3, r2 2062 00f8 0433 adds r3, r3, #4 2063 00fa 1B68 ldr r3, [r3] 2064 .loc 1 1518 82 2065 00fc 03F00F02 and r2, r3, #15 2066 .loc 1 1518 20 2067 0100 7B68 ldr r3, [r7, #4] 2068 0102 1A61 str r2, [r3, #16] 2069 .L103: 1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_ 2070 .loc 1 1520 54 2071 0104 FB68 ldr r3, [r7, #12] 2072 0106 1A68 ldr r2, [r3] 2073 .loc 1 1520 86 2074 0108 BB68 ldr r3, [r7, #8] 2075 010a 1B33 adds r3, r3, #27 2076 010c 1B01 lsls r3, r3, #4 2077 010e 1344 add r3, r3, r2 2078 0110 0433 adds r3, r3, #4 2079 0112 1B68 ldr r3, [r3] 2080 .loc 1 1520 93 2081 0114 1B0A lsrs r3, r3, #8 2082 0116 DAB2 uxtb r2, r3 2083 .loc 1 1520 31 2084 0118 7B68 ldr r3, [r7, #4] 2085 011a 9A61 str r2, [r3, #24] 1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_ 2086 .loc 1 1521 48 2087 011c FB68 ldr r3, [r7, #12] 2088 011e 1A68 ldr r2, [r3] ARM GAS /tmp/ccM1MpQr.s page 82 2089 .loc 1 1521 80 2090 0120 BB68 ldr r3, [r7, #8] 2091 0122 1B33 adds r3, r3, #27 2092 0124 1B01 lsls r3, r3, #4 2093 0126 1344 add r3, r3, r2 2094 0128 0433 adds r3, r3, #4 2095 012a 1B68 ldr r3, [r3] 2096 .loc 1 1521 87 2097 012c 1B0C lsrs r3, r3, #16 2098 012e 9AB2 uxth r2, r3 2099 .loc 1 1521 24 2100 0130 7B68 ldr r3, [r7, #4] 2101 0132 5A61 str r2, [r3, #20] 1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get the data */ 1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R 2102 .loc 1 1524 49 2103 0134 FB68 ldr r3, [r7, #12] 2104 0136 1A68 ldr r2, [r3] 2105 .loc 1 1524 81 2106 0138 BB68 ldr r3, [r7, #8] 2107 013a 1B01 lsls r3, r3, #4 2108 013c 1344 add r3, r3, r2 2109 013e 03F5DC73 add r3, r3, #440 2110 0142 1B68 ldr r3, [r3] 2111 .loc 1 1524 16 2112 0144 DAB2 uxtb r2, r3 2113 .loc 1 1524 14 2114 0146 3B68 ldr r3, [r7] 2115 0148 1A70 strb r2, [r3] 1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R 2116 .loc 1 1525 49 2117 014a FB68 ldr r3, [r7, #12] 2118 014c 1A68 ldr r2, [r3] 2119 .loc 1 1525 81 2120 014e BB68 ldr r3, [r7, #8] 2121 0150 1B01 lsls r3, r3, #4 2122 0152 1344 add r3, r3, r2 2123 0154 03F5DC73 add r3, r3, #440 2124 0158 1B68 ldr r3, [r3] 2125 .loc 1 1525 88 2126 015a 1A0A lsrs r2, r3, #8 2127 .loc 1 1525 10 2128 015c 3B68 ldr r3, [r7] 2129 015e 0133 adds r3, r3, #1 2130 .loc 1 1525 16 2131 0160 D2B2 uxtb r2, r2 2132 .loc 1 1525 14 2133 0162 1A70 strb r2, [r3] 1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R 2134 .loc 1 1526 49 2135 0164 FB68 ldr r3, [r7, #12] 2136 0166 1A68 ldr r2, [r3] 2137 .loc 1 1526 81 2138 0168 BB68 ldr r3, [r7, #8] 2139 016a 1B01 lsls r3, r3, #4 2140 016c 1344 add r3, r3, r2 ARM GAS /tmp/ccM1MpQr.s page 83 2141 016e 03F5DC73 add r3, r3, #440 2142 0172 1B68 ldr r3, [r3] 2143 .loc 1 1526 88 2144 0174 1A0C lsrs r2, r3, #16 2145 .loc 1 1526 10 2146 0176 3B68 ldr r3, [r7] 2147 0178 0233 adds r3, r3, #2 2148 .loc 1 1526 16 2149 017a D2B2 uxtb r2, r2 2150 .loc 1 1526 14 2151 017c 1A70 strb r2, [r3] 1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R 2152 .loc 1 1527 49 2153 017e FB68 ldr r3, [r7, #12] 2154 0180 1A68 ldr r2, [r3] 2155 .loc 1 1527 81 2156 0182 BB68 ldr r3, [r7, #8] 2157 0184 1B01 lsls r3, r3, #4 2158 0186 1344 add r3, r3, r2 2159 0188 03F5DC73 add r3, r3, #440 2160 018c 1B68 ldr r3, [r3] 2161 .loc 1 1527 88 2162 018e 1A0E lsrs r2, r3, #24 2163 .loc 1 1527 10 2164 0190 3B68 ldr r3, [r7] 2165 0192 0333 adds r3, r3, #3 2166 .loc 1 1527 16 2167 0194 D2B2 uxtb r2, r2 2168 .loc 1 1527 14 2169 0196 1A70 strb r2, [r3] 1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R 2170 .loc 1 1528 49 2171 0198 FB68 ldr r3, [r7, #12] 2172 019a 1A68 ldr r2, [r3] 2173 .loc 1 1528 81 2174 019c BB68 ldr r3, [r7, #8] 2175 019e 1B01 lsls r3, r3, #4 2176 01a0 1344 add r3, r3, r2 2177 01a2 03F5DE73 add r3, r3, #444 2178 01a6 1A68 ldr r2, [r3] 2179 .loc 1 1528 10 2180 01a8 3B68 ldr r3, [r7] 2181 01aa 0433 adds r3, r3, #4 2182 .loc 1 1528 16 2183 01ac D2B2 uxtb r2, r2 2184 .loc 1 1528 14 2185 01ae 1A70 strb r2, [r3] 1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R 2186 .loc 1 1529 49 2187 01b0 FB68 ldr r3, [r7, #12] 2188 01b2 1A68 ldr r2, [r3] 2189 .loc 1 1529 81 2190 01b4 BB68 ldr r3, [r7, #8] 2191 01b6 1B01 lsls r3, r3, #4 2192 01b8 1344 add r3, r3, r2 2193 01ba 03F5DE73 add r3, r3, #444 2194 01be 1B68 ldr r3, [r3] ARM GAS /tmp/ccM1MpQr.s page 84 2195 .loc 1 1529 88 2196 01c0 1A0A lsrs r2, r3, #8 2197 .loc 1 1529 10 2198 01c2 3B68 ldr r3, [r7] 2199 01c4 0533 adds r3, r3, #5 2200 .loc 1 1529 16 2201 01c6 D2B2 uxtb r2, r2 2202 .loc 1 1529 14 2203 01c8 1A70 strb r2, [r3] 1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R 2204 .loc 1 1530 49 2205 01ca FB68 ldr r3, [r7, #12] 2206 01cc 1A68 ldr r2, [r3] 2207 .loc 1 1530 81 2208 01ce BB68 ldr r3, [r7, #8] 2209 01d0 1B01 lsls r3, r3, #4 2210 01d2 1344 add r3, r3, r2 2211 01d4 03F5DE73 add r3, r3, #444 2212 01d8 1B68 ldr r3, [r3] 2213 .loc 1 1530 88 2214 01da 1A0C lsrs r2, r3, #16 2215 .loc 1 1530 10 2216 01dc 3B68 ldr r3, [r7] 2217 01de 0633 adds r3, r3, #6 2218 .loc 1 1530 16 2219 01e0 D2B2 uxtb r2, r2 2220 .loc 1 1530 14 2221 01e2 1A70 strb r2, [r3] 1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R 2222 .loc 1 1531 49 2223 01e4 FB68 ldr r3, [r7, #12] 2224 01e6 1A68 ldr r2, [r3] 2225 .loc 1 1531 81 2226 01e8 BB68 ldr r3, [r7, #8] 2227 01ea 1B01 lsls r3, r3, #4 2228 01ec 1344 add r3, r3, r2 2229 01ee 03F5DE73 add r3, r3, #444 2230 01f2 1B68 ldr r3, [r3] 2231 .loc 1 1531 88 2232 01f4 1A0E lsrs r2, r3, #24 2233 .loc 1 1531 10 2234 01f6 3B68 ldr r3, [r7] 2235 01f8 0733 adds r3, r3, #7 2236 .loc 1 1531 16 2237 01fa D2B2 uxtb r2, r2 2238 .loc 1 1531 14 2239 01fc 1A70 strb r2, [r3] 1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release the FIFO */ 1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 2240 .loc 1 1534 8 2241 01fe BB68 ldr r3, [r7, #8] 2242 0200 002B cmp r3, #0 2243 0202 08D1 bne .L104 1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release RX FIFO 0 */ 1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); ARM GAS /tmp/ccM1MpQr.s page 85 2244 .loc 1 1537 7 2245 0204 FB68 ldr r3, [r7, #12] 2246 0206 1B68 ldr r3, [r3] 2247 0208 DA68 ldr r2, [r3, #12] 2248 020a FB68 ldr r3, [r7, #12] 2249 020c 1B68 ldr r3, [r3] 2250 020e 42F02002 orr r2, r2, #32 2251 0212 DA60 str r2, [r3, #12] 2252 0214 07E0 b .L105 2253 .L104: 1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */ 1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release RX FIFO 1 */ 1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); 2254 .loc 1 1542 7 2255 0216 FB68 ldr r3, [r7, #12] 2256 0218 1B68 ldr r3, [r3] 2257 021a 1A69 ldr r2, [r3, #16] 2258 021c FB68 ldr r3, [r7, #12] 2259 021e 1B68 ldr r3, [r3] 2260 0220 42F02002 orr r2, r2, #32 2261 0224 1A61 str r2, [r3, #16] 2262 .L105: 1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 2263 .loc 1 1546 12 2264 0226 0023 movs r3, #0 2265 0228 06E0 b .L99 2266 .L96: 1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 2267 .loc 1 1551 9 2268 022a FB68 ldr r3, [r7, #12] 2269 022c 5B6A ldr r3, [r3, #36] 2270 .loc 1 1551 21 2271 022e 43F48022 orr r2, r3, #262144 2272 0232 FB68 ldr r3, [r7, #12] 2273 0234 5A62 str r2, [r3, #36] 1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 2274 .loc 1 1553 12 2275 0236 0123 movs r3, #1 2276 .L99: 1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2277 .loc 1 1555 1 2278 0238 1846 mov r0, r3 2279 023a 1C37 adds r7, r7, #28 2280 .cfi_def_cfa_offset 4 2281 023c BD46 mov sp, r7 2282 .cfi_def_cfa_register 13 ARM GAS /tmp/ccM1MpQr.s page 86 2283 @ sp needed 2284 023e 5DF8047B ldr r7, [sp], #4 2285 .cfi_restore 7 2286 .cfi_def_cfa_offset 0 2287 0242 7047 bx lr 2288 .cfi_endproc 2289 .LFE145: 2291 .section .text.HAL_CAN_GetRxFifoFillLevel,"ax",%progbits 2292 .align 1 2293 .global HAL_CAN_GetRxFifoFillLevel 2294 .syntax unified 2295 .thumb 2296 .thumb_func 2298 HAL_CAN_GetRxFifoFillLevel: 2299 .LFB146: 1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return Rx FIFO fill level. 1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param RxFifo Rx FIFO. 1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number. 1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Number of messages available in Rx FIFO. 1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo) 1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2300 .loc 1 1566 1 2301 .cfi_startproc 2302 @ args = 0, pretend = 0, frame = 16 2303 @ frame_needed = 1, uses_anonymous_args = 0 2304 @ link register save eliminated. 2305 0000 80B4 push {r7} 2306 .cfi_def_cfa_offset 4 2307 .cfi_offset 7, -4 2308 0002 85B0 sub sp, sp, #20 2309 .cfi_def_cfa_offset 24 2310 0004 00AF add r7, sp, #0 2311 .cfi_def_cfa_register 7 2312 0006 7860 str r0, [r7, #4] 2313 0008 3960 str r1, [r7] 1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t filllevel = 0U; 2314 .loc 1 1567 12 2315 000a 0023 movs r3, #0 2316 000c FB60 str r3, [r7, #12] 1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 2317 .loc 1 1568 24 2318 000e 7B68 ldr r3, [r7, #4] 2319 0010 93F82030 ldrb r3, [r3, #32] 2320 0014 FB72 strb r3, [r7, #11] 1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ 1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo)); 1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 2321 .loc 1 1573 6 2322 0016 FB7A ldrb r3, [r7, #11] @ zero_extendqisi2 2323 0018 012B cmp r3, #1 ARM GAS /tmp/ccM1MpQr.s page 87 2324 001a 02D0 beq .L107 2325 .loc 1 1573 38 discriminator 1 2326 001c FB7A ldrb r3, [r7, #11] @ zero_extendqisi2 2327 001e 022B cmp r3, #2 2328 0020 0FD1 bne .L108 2329 .L107: 1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) 2330 .loc 1 1576 8 2331 0022 3B68 ldr r3, [r7] 2332 0024 002B cmp r3, #0 2333 0026 06D1 bne .L109 1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0; 2334 .loc 1 1578 23 2335 0028 7B68 ldr r3, [r7, #4] 2336 002a 1B68 ldr r3, [r3] 2337 .loc 1 1578 33 2338 002c DB68 ldr r3, [r3, #12] 2339 .loc 1 1578 17 2340 002e 03F00303 and r3, r3, #3 2341 0032 FB60 str r3, [r7, #12] 2342 0034 05E0 b .L108 2343 .L109: 1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* RxFifo == CAN_RX_FIFO1 */ 1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1; 2344 .loc 1 1582 23 2345 0036 7B68 ldr r3, [r7, #4] 2346 0038 1B68 ldr r3, [r3] 2347 .loc 1 1582 33 2348 003a 1B69 ldr r3, [r3, #16] 2349 .loc 1 1582 17 2350 003c 03F00303 and r3, r3, #3 2351 0040 FB60 str r3, [r7, #12] 2352 .L108: 1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return Rx FIFO fill level */ 1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return filllevel; 2353 .loc 1 1587 10 2354 0042 FB68 ldr r3, [r7, #12] 1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2355 .loc 1 1588 1 2356 0044 1846 mov r0, r3 2357 0046 1437 adds r7, r7, #20 2358 .cfi_def_cfa_offset 4 2359 0048 BD46 mov sp, r7 2360 .cfi_def_cfa_register 13 2361 @ sp needed 2362 004a 5DF8047B ldr r7, [sp], #4 2363 .cfi_restore 7 2364 .cfi_def_cfa_offset 0 2365 004e 7047 bx lr ARM GAS /tmp/ccM1MpQr.s page 88 2366 .cfi_endproc 2367 .LFE146: 2369 .section .text.HAL_CAN_ActivateNotification,"ax",%progbits 2370 .align 1 2371 .global HAL_CAN_ActivateNotification 2372 .syntax unified 2373 .thumb 2374 .thumb_func 2376 HAL_CAN_ActivateNotification: 2377 .LFB147: 1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} 1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group4 Interrupts management 1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Interrupts management 1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim 1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Interrupts management ##### 1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to: 1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ActivateNotification : Enable interrupts 1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_DeactivateNotification : Disable interrupts 1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IRQHandler : Handles CAN interrupt request 1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim 1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Enable interrupts. 1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param ActiveITs indicates which interrupts will be enabled. 1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts. 1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) 1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2378 .loc 1 1619 1 2379 .cfi_startproc 2380 @ args = 0, pretend = 0, frame = 16 2381 @ frame_needed = 1, uses_anonymous_args = 0 2382 @ link register save eliminated. 2383 0000 80B4 push {r7} 2384 .cfi_def_cfa_offset 4 2385 .cfi_offset 7, -4 2386 0002 85B0 sub sp, sp, #20 2387 .cfi_def_cfa_offset 24 2388 0004 00AF add r7, sp, #0 2389 .cfi_def_cfa_register 7 2390 0006 7860 str r0, [r7, #4] 2391 0008 3960 str r1, [r7] 1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 2392 .loc 1 1620 24 ARM GAS /tmp/ccM1MpQr.s page 89 2393 000a 7B68 ldr r3, [r7, #4] 2394 000c 93F82030 ldrb r3, [r3, #32] 2395 0010 FB73 strb r3, [r7, #15] 1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ 1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IT(ActiveITs)); 1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 2396 .loc 1 1625 6 2397 0012 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 2398 0014 012B cmp r3, #1 2399 0016 02D0 beq .L112 2400 .loc 1 1625 38 discriminator 1 2401 0018 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 2402 001a 022B cmp r3, #2 2403 001c 09D1 bne .L113 2404 .L112: 1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Enable the selected interrupts */ 1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_ENABLE_IT(hcan, ActiveITs); 2405 .loc 1 1629 5 2406 001e 7B68 ldr r3, [r7, #4] 2407 0020 1B68 ldr r3, [r3] 2408 0022 5969 ldr r1, [r3, #20] 2409 0024 7B68 ldr r3, [r7, #4] 2410 0026 1B68 ldr r3, [r3] 2411 0028 3A68 ldr r2, [r7] 2412 002a 0A43 orrs r2, r2, r1 2413 002c 5A61 str r2, [r3, #20] 1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 2414 .loc 1 1632 12 2415 002e 0023 movs r3, #0 2416 0030 06E0 b .L114 2417 .L113: 1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 2418 .loc 1 1637 9 2419 0032 7B68 ldr r3, [r7, #4] 2420 0034 5B6A ldr r3, [r3, #36] 2421 .loc 1 1637 21 2422 0036 43F48022 orr r2, r3, #262144 2423 003a 7B68 ldr r3, [r7, #4] 2424 003c 5A62 str r2, [r3, #36] 1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 2425 .loc 1 1639 12 2426 003e 0123 movs r3, #1 2427 .L114: 1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2428 .loc 1 1641 1 ARM GAS /tmp/ccM1MpQr.s page 90 2429 0040 1846 mov r0, r3 2430 0042 1437 adds r7, r7, #20 2431 .cfi_def_cfa_offset 4 2432 0044 BD46 mov sp, r7 2433 .cfi_def_cfa_register 13 2434 @ sp needed 2435 0046 5DF8047B ldr r7, [sp], #4 2436 .cfi_restore 7 2437 .cfi_def_cfa_offset 0 2438 004a 7047 bx lr 2439 .cfi_endproc 2440 .LFE147: 2442 .section .text.HAL_CAN_DeactivateNotification,"ax",%progbits 2443 .align 1 2444 .global HAL_CAN_DeactivateNotification 2445 .syntax unified 2446 .thumb 2447 .thumb_func 2449 HAL_CAN_DeactivateNotification: 2450 .LFB148: 1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Disable interrupts. 1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param InactiveITs indicates which interrupts will be disabled. 1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts. 1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs) 1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2451 .loc 1 1652 1 2452 .cfi_startproc 2453 @ args = 0, pretend = 0, frame = 16 2454 @ frame_needed = 1, uses_anonymous_args = 0 2455 @ link register save eliminated. 2456 0000 80B4 push {r7} 2457 .cfi_def_cfa_offset 4 2458 .cfi_offset 7, -4 2459 0002 85B0 sub sp, sp, #20 2460 .cfi_def_cfa_offset 24 2461 0004 00AF add r7, sp, #0 2462 .cfi_def_cfa_register 7 2463 0006 7860 str r0, [r7, #4] 2464 0008 3960 str r1, [r7] 1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 2465 .loc 1 1653 24 2466 000a 7B68 ldr r3, [r7, #4] 2467 000c 93F82030 ldrb r3, [r3, #32] 2468 0010 FB73 strb r3, [r7, #15] 1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ 1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IT(InactiveITs)); 1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 2469 .loc 1 1658 6 2470 0012 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 ARM GAS /tmp/ccM1MpQr.s page 91 2471 0014 012B cmp r3, #1 2472 0016 02D0 beq .L116 2473 .loc 1 1658 38 discriminator 1 2474 0018 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 2475 001a 022B cmp r3, #2 2476 001c 0AD1 bne .L117 2477 .L116: 1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Disable the selected interrupts */ 1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_DISABLE_IT(hcan, InactiveITs); 2478 .loc 1 1662 5 2479 001e 7B68 ldr r3, [r7, #4] 2480 0020 1B68 ldr r3, [r3] 2481 0022 5969 ldr r1, [r3, #20] 2482 0024 3B68 ldr r3, [r7] 2483 0026 DA43 mvns r2, r3 2484 0028 7B68 ldr r3, [r7, #4] 2485 002a 1B68 ldr r3, [r3] 2486 002c 0A40 ands r2, r2, r1 2487 002e 5A61 str r2, [r3, #20] 1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ 1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; 2488 .loc 1 1665 12 2489 0030 0023 movs r3, #0 2490 0032 06E0 b .L118 2491 .L117: 1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 2492 .loc 1 1670 9 2493 0034 7B68 ldr r3, [r7, #4] 2494 0036 5B6A ldr r3, [r3, #36] 2495 .loc 1 1670 21 2496 0038 43F48022 orr r2, r3, #262144 2497 003c 7B68 ldr r3, [r7, #4] 2498 003e 5A62 str r2, [r3, #36] 1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; 2499 .loc 1 1672 12 2500 0040 0123 movs r3, #1 2501 .L118: 1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2502 .loc 1 1674 1 2503 0042 1846 mov r0, r3 2504 0044 1437 adds r7, r7, #20 2505 .cfi_def_cfa_offset 4 2506 0046 BD46 mov sp, r7 2507 .cfi_def_cfa_register 13 2508 @ sp needed 2509 0048 5DF8047B ldr r7, [sp], #4 2510 .cfi_restore 7 2511 .cfi_def_cfa_offset 0 ARM GAS /tmp/ccM1MpQr.s page 92 2512 004c 7047 bx lr 2513 .cfi_endproc 2514 .LFE148: 2516 .section .text.HAL_CAN_IRQHandler,"ax",%progbits 2517 .align 1 2518 .global HAL_CAN_IRQHandler 2519 .syntax unified 2520 .thumb 2521 .thumb_func 2523 HAL_CAN_IRQHandler: 2524 .LFB149: 1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Handles CAN interrupt request 1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) 1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2525 .loc 1 1683 1 2526 .cfi_startproc 2527 @ args = 0, pretend = 0, frame = 40 2528 @ frame_needed = 1, uses_anonymous_args = 0 2529 0000 80B5 push {r7, lr} 2530 .cfi_def_cfa_offset 8 2531 .cfi_offset 7, -8 2532 .cfi_offset 14, -4 2533 0002 8AB0 sub sp, sp, #40 2534 .cfi_def_cfa_offset 48 2535 0004 00AF add r7, sp, #0 2536 .cfi_def_cfa_register 7 2537 0006 7860 str r0, [r7, #4] 1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; 2538 .loc 1 1684 12 2539 0008 0023 movs r3, #0 2540 000a 7B62 str r3, [r7, #36] 1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); 2541 .loc 1 1685 25 2542 000c 7B68 ldr r3, [r7, #4] 2543 000e 1B68 ldr r3, [r3] 2544 .loc 1 1685 12 2545 0010 5B69 ldr r3, [r3, #20] 2546 0012 3B62 str r3, [r7, #32] 1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); 2547 .loc 1 1686 23 2548 0014 7B68 ldr r3, [r7, #4] 2549 0016 1B68 ldr r3, [r3] 2550 .loc 1 1686 12 2551 0018 5B68 ldr r3, [r3, #4] 2552 001a FB61 str r3, [r7, #28] 1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); 2553 .loc 1 1687 23 2554 001c 7B68 ldr r3, [r7, #4] 2555 001e 1B68 ldr r3, [r3] 2556 .loc 1 1687 12 2557 0020 9B68 ldr r3, [r3, #8] ARM GAS /tmp/ccM1MpQr.s page 93 2558 0022 BB61 str r3, [r7, #24] 1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); 2559 .loc 1 1688 24 2560 0024 7B68 ldr r3, [r7, #4] 2561 0026 1B68 ldr r3, [r3] 2562 .loc 1 1688 12 2563 0028 DB68 ldr r3, [r3, #12] 2564 002a 7B61 str r3, [r7, #20] 1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); 2565 .loc 1 1689 24 2566 002c 7B68 ldr r3, [r7, #4] 2567 002e 1B68 ldr r3, [r3] 2568 .loc 1 1689 12 2569 0030 1B69 ldr r3, [r3, #16] 2570 0032 3B61 str r3, [r7, #16] 1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); 2571 .loc 1 1690 23 2572 0034 7B68 ldr r3, [r7, #4] 2573 0036 1B68 ldr r3, [r3] 2574 .loc 1 1690 12 2575 0038 9B69 ldr r3, [r3, #24] 2576 003a FB60 str r3, [r7, #12] 1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox empty interrupt management *****************************/ 1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) 2577 .loc 1 1693 19 2578 003c 3B6A ldr r3, [r7, #32] 2579 003e 03F00103 and r3, r3, #1 2580 .loc 1 1693 6 2581 0042 002B cmp r3, #0 2582 0044 7CD0 beq .L120 1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 0 management *****************************************/ 1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP0) != 0U) 2583 .loc 1 1696 19 2584 0046 BB69 ldr r3, [r7, #24] 2585 0048 03F00103 and r3, r3, #1 2586 .loc 1 1696 8 2587 004c 002B cmp r3, #0 2588 004e 23D0 beq .L121 1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ 1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); 2589 .loc 1 1699 7 2590 0050 7B68 ldr r3, [r7, #4] 2591 0052 1B68 ldr r3, [r3] 2592 0054 0122 movs r2, #1 2593 0056 9A60 str r2, [r3, #8] 1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK0) != 0U) 2594 .loc 1 1701 21 2595 0058 BB69 ldr r3, [r7, #24] 2596 005a 03F00203 and r3, r3, #2 2597 .loc 1 1701 10 2598 005e 002B cmp r3, #0 2599 0060 03D0 beq .L122 1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { ARM GAS /tmp/ccM1MpQr.s page 94 1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 0 complete callback */ 1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback(hcan); 1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox0CompleteCallback(hcan); 2600 .loc 1 1709 9 2601 0062 7868 ldr r0, [r7, #4] 2602 0064 FFF7FEFF bl HAL_CAN_TxMailbox0CompleteCallback 2603 0068 16E0 b .L121 2604 .L122: 1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST0) != 0U) 2605 .loc 1 1714 23 2606 006a BB69 ldr r3, [r7, #24] 2607 006c 03F00403 and r3, r3, #4 2608 .loc 1 1714 12 2609 0070 002B cmp r3, #0 2610 0072 04D0 beq .L123 1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST0; 2611 .loc 1 1717 21 2612 0074 7B6A ldr r3, [r7, #36] 2613 0076 43F40063 orr r3, r3, #2048 2614 007a 7B62 str r3, [r7, #36] 2615 007c 0CE0 b .L121 2616 .L123: 1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR0) != 0U) 2617 .loc 1 1719 28 2618 007e BB69 ldr r3, [r7, #24] 2619 0080 03F00803 and r3, r3, #8 2620 .loc 1 1719 17 2621 0084 002B cmp r3, #0 2622 0086 04D0 beq .L124 1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR0; 2623 .loc 1 1722 21 2624 0088 7B6A ldr r3, [r7, #36] 2625 008a 43F48053 orr r3, r3, #4096 2626 008e 7B62 str r3, [r7, #36] 2627 0090 02E0 b .L121 2628 .L124: 1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 0 abort callback */ 1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback(hcan); 1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else ARM GAS /tmp/ccM1MpQr.s page 95 1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox0AbortCallback(hcan); 2629 .loc 1 1732 11 2630 0092 7868 ldr r0, [r7, #4] 2631 0094 FFF7FEFF bl HAL_CAN_TxMailbox0AbortCallback 2632 .L121: 1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 1 management *****************************************/ 1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP1) != 0U) 2633 .loc 1 1739 19 2634 0098 BB69 ldr r3, [r7, #24] 2635 009a 03F48073 and r3, r3, #256 2636 .loc 1 1739 8 2637 009e 002B cmp r3, #0 2638 00a0 24D0 beq .L125 1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ 1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); 2639 .loc 1 1742 7 2640 00a2 7B68 ldr r3, [r7, #4] 2641 00a4 1B68 ldr r3, [r3] 2642 00a6 4FF48072 mov r2, #256 2643 00aa 9A60 str r2, [r3, #8] 1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK1) != 0U) 2644 .loc 1 1744 21 2645 00ac BB69 ldr r3, [r7, #24] 2646 00ae 03F40073 and r3, r3, #512 2647 .loc 1 1744 10 2648 00b2 002B cmp r3, #0 2649 00b4 03D0 beq .L126 1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 1 complete callback */ 1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback(hcan); 1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox1CompleteCallback(hcan); 2650 .loc 1 1752 9 2651 00b6 7868 ldr r0, [r7, #4] 2652 00b8 FFF7FEFF bl HAL_CAN_TxMailbox1CompleteCallback 2653 00bc 16E0 b .L125 2654 .L126: 1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST1) != 0U) 2655 .loc 1 1757 23 2656 00be BB69 ldr r3, [r7, #24] 2657 00c0 03F48063 and r3, r3, #1024 2658 .loc 1 1757 12 ARM GAS /tmp/ccM1MpQr.s page 96 2659 00c4 002B cmp r3, #0 2660 00c6 04D0 beq .L127 1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST1; 2661 .loc 1 1760 21 2662 00c8 7B6A ldr r3, [r7, #36] 2663 00ca 43F40053 orr r3, r3, #8192 2664 00ce 7B62 str r3, [r7, #36] 2665 00d0 0CE0 b .L125 2666 .L127: 1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR1) != 0U) 2667 .loc 1 1762 28 2668 00d2 BB69 ldr r3, [r7, #24] 2669 00d4 03F40063 and r3, r3, #2048 2670 .loc 1 1762 17 2671 00d8 002B cmp r3, #0 2672 00da 04D0 beq .L128 1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR1; 2673 .loc 1 1765 21 2674 00dc 7B6A ldr r3, [r7, #36] 2675 00de 43F48043 orr r3, r3, #16384 2676 00e2 7B62 str r3, [r7, #36] 2677 00e4 02E0 b .L125 2678 .L128: 1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 1 abort callback */ 1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback(hcan); 1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox1AbortCallback(hcan); 2679 .loc 1 1775 11 2680 00e6 7868 ldr r0, [r7, #4] 2681 00e8 FFF7FEFF bl HAL_CAN_TxMailbox1AbortCallback 2682 .L125: 1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 2 management *****************************************/ 1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP2) != 0U) 2683 .loc 1 1782 19 2684 00ec BB69 ldr r3, [r7, #24] 2685 00ee 03F48033 and r3, r3, #65536 2686 .loc 1 1782 8 2687 00f2 002B cmp r3, #0 2688 00f4 24D0 beq .L120 1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ ARM GAS /tmp/ccM1MpQr.s page 97 1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); 2689 .loc 1 1785 7 2690 00f6 7B68 ldr r3, [r7, #4] 2691 00f8 1B68 ldr r3, [r3] 2692 00fa 4FF48032 mov r2, #65536 2693 00fe 9A60 str r2, [r3, #8] 1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK2) != 0U) 2694 .loc 1 1787 21 2695 0100 BB69 ldr r3, [r7, #24] 2696 0102 03F40033 and r3, r3, #131072 2697 .loc 1 1787 10 2698 0106 002B cmp r3, #0 2699 0108 03D0 beq .L129 1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 2 complete callback */ 1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback(hcan); 1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox2CompleteCallback(hcan); 2700 .loc 1 1795 9 2701 010a 7868 ldr r0, [r7, #4] 2702 010c FFF7FEFF bl HAL_CAN_TxMailbox2CompleteCallback 2703 0110 16E0 b .L120 2704 .L129: 1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST2) != 0U) 2705 .loc 1 1800 23 2706 0112 BB69 ldr r3, [r7, #24] 2707 0114 03F48023 and r3, r3, #262144 2708 .loc 1 1800 12 2709 0118 002B cmp r3, #0 2710 011a 04D0 beq .L130 1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST2; 2711 .loc 1 1803 21 2712 011c 7B6A ldr r3, [r7, #36] 2713 011e 43F40043 orr r3, r3, #32768 2714 0122 7B62 str r3, [r7, #36] 2715 0124 0CE0 b .L120 2716 .L130: 1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR2) != 0U) 2717 .loc 1 1805 28 2718 0126 BB69 ldr r3, [r7, #24] 2719 0128 03F40023 and r3, r3, #524288 2720 .loc 1 1805 17 2721 012c 002B cmp r3, #0 2722 012e 04D0 beq .L131 1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ ARM GAS /tmp/ccM1MpQr.s page 98 1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR2; 2723 .loc 1 1808 21 2724 0130 7B6A ldr r3, [r7, #36] 2725 0132 43F48033 orr r3, r3, #65536 2726 0136 7B62 str r3, [r7, #36] 2727 0138 02E0 b .L120 2728 .L131: 1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 2 abort callback */ 1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback(hcan); 1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox2AbortCallback(hcan); 2729 .loc 1 1818 11 2730 013a 7868 ldr r0, [r7, #4] 2731 013c FFF7FEFF bl HAL_CAN_TxMailbox2AbortCallback 2732 .L120: 1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 overrun interrupt management *****************************/ 1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) 2733 .loc 1 1826 19 2734 0140 3B6A ldr r3, [r7, #32] 2735 0142 03F00803 and r3, r3, #8 2736 .loc 1 1826 6 2737 0146 002B cmp r3, #0 2738 0148 0CD0 beq .L132 1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) 2739 .loc 1 1828 20 2740 014a 7B69 ldr r3, [r7, #20] 2741 014c 03F01003 and r3, r3, #16 2742 .loc 1 1828 8 2743 0150 002B cmp r3, #0 2744 0152 07D0 beq .L132 1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Rx Fifo 0 overrun error */ 1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV0; 2745 .loc 1 1831 17 2746 0154 7B6A ldr r3, [r7, #36] 2747 0156 43F40073 orr r3, r3, #512 2748 015a 7B62 str r3, [r7, #36] 1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO0 Overrun Flag */ 1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); 2749 .loc 1 1834 7 2750 015c 7B68 ldr r3, [r7, #4] 2751 015e 1B68 ldr r3, [r3] 2752 0160 1022 movs r2, #16 ARM GAS /tmp/ccM1MpQr.s page 99 2753 0162 DA60 str r2, [r3, #12] 2754 .L132: 1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 full interrupt management ********************************/ 1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) 2755 .loc 1 1839 19 2756 0164 3B6A ldr r3, [r7, #32] 2757 0166 03F00403 and r3, r3, #4 2758 .loc 1 1839 6 2759 016a 002B cmp r3, #0 2760 016c 0BD0 beq .L133 1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FULL0) != 0U) 2761 .loc 1 1841 20 2762 016e 7B69 ldr r3, [r7, #20] 2763 0170 03F00803 and r3, r3, #8 2764 .loc 1 1841 8 2765 0174 002B cmp r3, #0 2766 0176 06D0 beq .L133 1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO 0 full Flag */ 1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); 2767 .loc 1 1844 7 2768 0178 7B68 ldr r3, [r7, #4] 2769 017a 1B68 ldr r3, [r3] 2770 017c 0822 movs r2, #8 2771 017e DA60 str r2, [r3, #12] 1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 full Callback */ 1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback(hcan); 1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo0FullCallback(hcan); 2772 .loc 1 1852 7 2773 0180 7868 ldr r0, [r7, #4] 2774 0182 FFF7FEFF bl HAL_CAN_RxFifo0FullCallback 2775 .L133: 1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 message pending interrupt management *********************/ 1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) 2776 .loc 1 1858 19 2777 0186 3B6A ldr r3, [r7, #32] 2778 0188 03F00203 and r3, r3, #2 2779 .loc 1 1858 6 2780 018c 002B cmp r3, #0 2781 018e 09D0 beq .L134 1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if message is still pending */ 1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) 2782 .loc 1 1861 14 ARM GAS /tmp/ccM1MpQr.s page 100 2783 0190 7B68 ldr r3, [r7, #4] 2784 0192 1B68 ldr r3, [r3] 2785 .loc 1 1861 24 2786 0194 DB68 ldr r3, [r3, #12] 2787 .loc 1 1861 31 2788 0196 03F00303 and r3, r3, #3 2789 .loc 1 1861 8 2790 019a 002B cmp r3, #0 2791 019c 02D0 beq .L134 1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 message pending Callback */ 1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback(hcan); 1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo0MsgPendingCallback(hcan); 2792 .loc 1 1869 7 2793 019e 7868 ldr r0, [r7, #4] 2794 01a0 FFF7FEFF bl HAL_CAN_RxFifo0MsgPendingCallback 2795 .L134: 1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 overrun interrupt management *****************************/ 1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) 2796 .loc 1 1875 19 2797 01a4 3B6A ldr r3, [r7, #32] 2798 01a6 03F04003 and r3, r3, #64 2799 .loc 1 1875 6 2800 01aa 002B cmp r3, #0 2801 01ac 0CD0 beq .L135 1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) 2802 .loc 1 1877 20 2803 01ae 3B69 ldr r3, [r7, #16] 2804 01b0 03F01003 and r3, r3, #16 2805 .loc 1 1877 8 2806 01b4 002B cmp r3, #0 2807 01b6 07D0 beq .L135 1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Rx Fifo 1 overrun error */ 1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV1; 2808 .loc 1 1880 17 2809 01b8 7B6A ldr r3, [r7, #36] 2810 01ba 43F48063 orr r3, r3, #1024 2811 01be 7B62 str r3, [r7, #36] 1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO1 Overrun Flag */ 1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); 2812 .loc 1 1883 7 2813 01c0 7B68 ldr r3, [r7, #4] 2814 01c2 1B68 ldr r3, [r3] 2815 01c4 1022 movs r2, #16 2816 01c6 1A61 str r2, [r3, #16] 2817 .L135: ARM GAS /tmp/ccM1MpQr.s page 101 1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 full interrupt management ********************************/ 1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) 2818 .loc 1 1888 19 2819 01c8 3B6A ldr r3, [r7, #32] 2820 01ca 03F02003 and r3, r3, #32 2821 .loc 1 1888 6 2822 01ce 002B cmp r3, #0 2823 01d0 0BD0 beq .L136 1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FULL1) != 0U) 2824 .loc 1 1890 20 2825 01d2 3B69 ldr r3, [r7, #16] 2826 01d4 03F00803 and r3, r3, #8 2827 .loc 1 1890 8 2828 01d8 002B cmp r3, #0 2829 01da 06D0 beq .L136 1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO 1 full Flag */ 1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); 2830 .loc 1 1893 7 2831 01dc 7B68 ldr r3, [r7, #4] 2832 01de 1B68 ldr r3, [r3] 2833 01e0 0822 movs r2, #8 2834 01e2 1A61 str r2, [r3, #16] 1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 full Callback */ 1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback(hcan); 1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo1FullCallback(hcan); 2835 .loc 1 1901 7 2836 01e4 7868 ldr r0, [r7, #4] 2837 01e6 FFF7FEFF bl HAL_CAN_RxFifo1FullCallback 2838 .L136: 1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 message pending interrupt management *********************/ 1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) 2839 .loc 1 1907 19 2840 01ea 3B6A ldr r3, [r7, #32] 2841 01ec 03F01003 and r3, r3, #16 2842 .loc 1 1907 6 2843 01f0 002B cmp r3, #0 2844 01f2 09D0 beq .L137 1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if message is still pending */ 1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) 2845 .loc 1 1910 14 2846 01f4 7B68 ldr r3, [r7, #4] 2847 01f6 1B68 ldr r3, [r3] ARM GAS /tmp/ccM1MpQr.s page 102 2848 .loc 1 1910 24 2849 01f8 1B69 ldr r3, [r3, #16] 2850 .loc 1 1910 31 2851 01fa 03F00303 and r3, r3, #3 2852 .loc 1 1910 8 2853 01fe 002B cmp r3, #0 2854 0200 02D0 beq .L137 1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 message pending Callback */ 1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback(hcan); 1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo1MsgPendingCallback(hcan); 2855 .loc 1 1918 7 2856 0202 7868 ldr r0, [r7, #4] 2857 0204 FFF7FEFF bl HAL_CAN_RxFifo1MsgPendingCallback 2858 .L137: 1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep interrupt management *********************************************/ 1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) 2859 .loc 1 1924 19 2860 0208 3B6A ldr r3, [r7, #32] 2861 020a 03F40033 and r3, r3, #131072 2862 .loc 1 1924 6 2863 020e 002B cmp r3, #0 2864 0210 0BD0 beq .L138 1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_SLAKI) != 0U) 2865 .loc 1 1926 19 2866 0212 FB69 ldr r3, [r7, #28] 2867 0214 03F01003 and r3, r3, #16 2868 .loc 1 1926 8 2869 0218 002B cmp r3, #0 2870 021a 06D0 beq .L138 1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear Sleep interrupt Flag */ 1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); 2871 .loc 1 1929 7 2872 021c 7B68 ldr r3, [r7, #4] 2873 021e 1B68 ldr r3, [r3] 2874 0220 1022 movs r2, #16 2875 0222 5A60 str r2, [r3, #4] 1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep Callback */ 1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback(hcan); 1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_SleepCallback(hcan); 2876 .loc 1 1937 7 2877 0224 7868 ldr r0, [r7, #4] ARM GAS /tmp/ccM1MpQr.s page 103 2878 0226 FFF7FEFF bl HAL_CAN_SleepCallback 2879 .L138: 1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* WakeUp interrupt management *********************************************/ 1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_WAKEUP) != 0U) 2880 .loc 1 1943 19 2881 022a 3B6A ldr r3, [r7, #32] 2882 022c 03F48033 and r3, r3, #65536 2883 .loc 1 1943 6 2884 0230 002B cmp r3, #0 2885 0232 0BD0 beq .L139 1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_WKUI) != 0U) 2886 .loc 1 1945 19 2887 0234 FB69 ldr r3, [r7, #28] 2888 0236 03F00803 and r3, r3, #8 2889 .loc 1 1945 8 2890 023a 002B cmp r3, #0 2891 023c 06D0 beq .L139 1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear WakeUp Flag */ 1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); 2892 .loc 1 1948 7 2893 023e 7B68 ldr r3, [r7, #4] 2894 0240 1B68 ldr r3, [r3] 2895 0242 0822 movs r2, #8 2896 0244 5A60 str r2, [r3, #4] 1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* WakeUp Callback */ 1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback(hcan); 1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_WakeUpFromRxMsgCallback(hcan); 2897 .loc 1 1956 7 2898 0246 7868 ldr r0, [r7, #4] 2899 0248 FFF7FEFF bl HAL_CAN_WakeUpFromRxMsgCallback 2900 .L139: 1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Error interrupts management *********************************************/ 1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_ERROR) != 0U) 2901 .loc 1 1962 19 2902 024c 3B6A ldr r3, [r7, #32] 2903 024e 03F40043 and r3, r3, #32768 2904 .loc 1 1962 6 2905 0252 002B cmp r3, #0 2906 0254 7BD0 beq .L140 1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_ERRI) != 0U) 2907 .loc 1 1964 19 ARM GAS /tmp/ccM1MpQr.s page 104 2908 0256 FB69 ldr r3, [r7, #28] 2909 0258 03F00403 and r3, r3, #4 2910 .loc 1 1964 8 2911 025c 002B cmp r3, #0 2912 025e 72D0 beq .L141 1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Error Warning Flag */ 1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 2913 .loc 1 1967 24 2914 0260 3B6A ldr r3, [r7, #32] 2915 0262 03F48073 and r3, r3, #256 2916 .loc 1 1967 10 2917 0266 002B cmp r3, #0 2918 0268 08D0 beq .L142 1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) 2919 .loc 1 1968 22 2920 026a FB68 ldr r3, [r7, #12] 2921 026c 03F00103 and r3, r3, #1 1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) 2922 .loc 1 1967 55 discriminator 1 2923 0270 002B cmp r3, #0 2924 0272 03D0 beq .L142 1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Error Warning */ 1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EWG; 2925 .loc 1 1971 19 2926 0274 7B6A ldr r3, [r7, #36] 2927 0276 43F00103 orr r3, r3, #1 2928 027a 7B62 str r3, [r7, #36] 2929 .L142: 1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Warning Flag as read-only */ 1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Error Passive Flag */ 1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 2930 .loc 1 1977 24 2931 027c 3B6A ldr r3, [r7, #32] 2932 027e 03F40073 and r3, r3, #512 2933 .loc 1 1977 10 2934 0282 002B cmp r3, #0 2935 0284 08D0 beq .L143 1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) 2936 .loc 1 1978 22 2937 0286 FB68 ldr r3, [r7, #12] 2938 0288 03F00203 and r3, r3, #2 1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) 2939 .loc 1 1977 55 discriminator 1 2940 028c 002B cmp r3, #0 2941 028e 03D0 beq .L143 1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Error Passive */ 1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EPV; 2942 .loc 1 1981 19 2943 0290 7B6A ldr r3, [r7, #36] 2944 0292 43F00203 orr r3, r3, #2 2945 0296 7B62 str r3, [r7, #36] ARM GAS /tmp/ccM1MpQr.s page 105 2946 .L143: 1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Passive Flag as read-only */ 1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Bus-off Flag */ 1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_BUSOFF) != 0U) && 2947 .loc 1 1987 24 2948 0298 3B6A ldr r3, [r7, #32] 2949 029a 03F48063 and r3, r3, #1024 2950 .loc 1 1987 10 2951 029e 002B cmp r3, #0 2952 02a0 08D0 beq .L144 1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) 2953 .loc 1 1988 22 2954 02a2 FB68 ldr r3, [r7, #12] 2955 02a4 03F00403 and r3, r3, #4 1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) 2956 .loc 1 1987 48 discriminator 1 2957 02a8 002B cmp r3, #0 2958 02aa 03D0 beq .L144 1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bus-Off */ 1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BOF; 2959 .loc 1 1991 19 2960 02ac 7B6A ldr r3, [r7, #36] 2961 02ae 43F00403 orr r3, r3, #4 2962 02b2 7B62 str r3, [r7, #36] 2963 .L144: 1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Bus-Off as read-only */ 1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Last Error Code Flag */ 1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 2964 .loc 1 1997 24 2965 02b4 3B6A ldr r3, [r7, #32] 2966 02b6 03F40063 and r3, r3, #2048 2967 .loc 1 1997 10 2968 02ba 002B cmp r3, #0 2969 02bc 43D0 beq .L141 1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) 2970 .loc 1 1998 22 2971 02be FB68 ldr r3, [r7, #12] 2972 02c0 03F07003 and r3, r3, #112 1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) 2973 .loc 1 1997 57 discriminator 1 2974 02c4 002B cmp r3, #0 2975 02c6 3ED0 beq .L141 1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (esrflags & CAN_ESR_LEC) 2976 .loc 1 2000 26 2977 02c8 FB68 ldr r3, [r7, #12] 2978 02ca 03F07003 and r3, r3, #112 2979 .loc 1 2000 9 2980 02ce 602B cmp r3, #96 2981 02d0 2BD0 beq .L145 ARM GAS /tmp/ccM1MpQr.s page 106 2982 02d2 602B cmp r3, #96 2983 02d4 2ED8 bhi .L154 2984 02d6 502B cmp r3, #80 2985 02d8 22D0 beq .L147 2986 02da 502B cmp r3, #80 2987 02dc 2AD8 bhi .L154 2988 02de 402B cmp r3, #64 2989 02e0 19D0 beq .L148 2990 02e2 402B cmp r3, #64 2991 02e4 26D8 bhi .L154 2992 02e6 302B cmp r3, #48 2993 02e8 10D0 beq .L149 2994 02ea 302B cmp r3, #48 2995 02ec 22D8 bhi .L154 2996 02ee 102B cmp r3, #16 2997 02f0 02D0 beq .L150 2998 02f2 202B cmp r3, #32 2999 02f4 05D0 beq .L151 2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_0): 2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Stuff error */ 2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_STF; 2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1): 2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Form error */ 2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_FOR; 2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): 2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Acknowledgement error */ 2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_ACK; 2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2): 2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bit recessive error */ 2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BR; 2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): 2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bit Dominant error */ 2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BD; 2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): 2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to CRC error */ 2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_CRC; 2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default: 2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 3000 .loc 1 2027 13 3001 02f6 1DE0 b .L154 3002 .L150: 2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 3003 .loc 1 2004 23 3004 02f8 7B6A ldr r3, [r7, #36] 3005 02fa 43F00803 orr r3, r3, #8 3006 02fe 7B62 str r3, [r7, #36] 2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1): 3007 .loc 1 2005 13 3008 0300 19E0 b .L152 3009 .L151: ARM GAS /tmp/ccM1MpQr.s page 107 2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 3010 .loc 1 2008 23 3011 0302 7B6A ldr r3, [r7, #36] 3012 0304 43F01003 orr r3, r3, #16 3013 0308 7B62 str r3, [r7, #36] 2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): 3014 .loc 1 2009 13 3015 030a 14E0 b .L152 3016 .L149: 2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 3017 .loc 1 2012 23 3018 030c 7B6A ldr r3, [r7, #36] 3019 030e 43F02003 orr r3, r3, #32 3020 0312 7B62 str r3, [r7, #36] 2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2): 3021 .loc 1 2013 13 3022 0314 0FE0 b .L152 3023 .L148: 2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 3024 .loc 1 2016 23 3025 0316 7B6A ldr r3, [r7, #36] 3026 0318 43F04003 orr r3, r3, #64 3027 031c 7B62 str r3, [r7, #36] 2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): 3028 .loc 1 2017 13 3029 031e 0AE0 b .L152 3030 .L147: 2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 3031 .loc 1 2020 23 3032 0320 7B6A ldr r3, [r7, #36] 3033 0322 43F08003 orr r3, r3, #128 3034 0326 7B62 str r3, [r7, #36] 2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): 3035 .loc 1 2021 13 3036 0328 05E0 b .L152 3037 .L145: 2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; 3038 .loc 1 2024 23 3039 032a 7B6A ldr r3, [r7, #36] 3040 032c 43F48073 orr r3, r3, #256 3041 0330 7B62 str r3, [r7, #36] 2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default: 3042 .loc 1 2025 13 3043 0332 00E0 b .L152 3044 .L154: 3045 .loc 1 2027 13 3046 0334 00BF nop 3047 .L152: 2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear Last error code Flag */ 2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); 3048 .loc 1 2031 9 3049 0336 7B68 ldr r3, [r7, #4] 3050 0338 1B68 ldr r3, [r3] 3051 033a 9A69 ldr r2, [r3, #24] 3052 033c 7B68 ldr r3, [r7, #4] ARM GAS /tmp/ccM1MpQr.s page 108 3053 033e 1B68 ldr r3, [r3] 3054 0340 22F07002 bic r2, r2, #112 3055 0344 9A61 str r2, [r3, #24] 3056 .L141: 2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear ERRI Flag */ 2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); 3057 .loc 1 2036 5 3058 0346 7B68 ldr r3, [r7, #4] 3059 0348 1B68 ldr r3, [r3] 3060 034a 0422 movs r2, #4 3061 034c 5A60 str r2, [r3, #4] 3062 .L140: 2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call the Error call Back in case of Errors */ 2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (errorcode != HAL_CAN_ERROR_NONE) 3063 .loc 1 2040 6 3064 034e 7B6A ldr r3, [r7, #36] 3065 0350 002B cmp r3, #0 3066 0352 08D0 beq .L155 2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code in handle */ 2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= errorcode; 3067 .loc 1 2043 9 3068 0354 7B68 ldr r3, [r7, #4] 3069 0356 5A6A ldr r2, [r3, #36] 3070 .loc 1 2043 21 3071 0358 7B6A ldr r3, [r7, #36] 3072 035a 1A43 orrs r2, r2, r3 3073 035c 7B68 ldr r3, [r7, #4] 3074 035e 5A62 str r2, [r3, #36] 2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call Error callback function */ 2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ 2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback(hcan); 2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else 2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ 2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_ErrorCallback(hcan); 3075 .loc 1 2051 5 3076 0360 7868 ldr r0, [r7, #4] 3077 0362 FFF7FEFF bl HAL_CAN_ErrorCallback 3078 .L155: 2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3079 .loc 1 2054 1 3080 0366 00BF nop 3081 0368 2837 adds r7, r7, #40 3082 .cfi_def_cfa_offset 8 3083 036a BD46 mov sp, r7 3084 .cfi_def_cfa_register 13 3085 @ sp needed 3086 036c 80BD pop {r7, pc} ARM GAS /tmp/ccM1MpQr.s page 109 3087 .cfi_endproc 3088 .LFE149: 3090 .section .text.HAL_CAN_TxMailbox0CompleteCallback,"ax",%progbits 3091 .align 1 3092 .weak HAL_CAN_TxMailbox0CompleteCallback 3093 .syntax unified 3094 .thumb 3095 .thumb_func 3097 HAL_CAN_TxMailbox0CompleteCallback: 3098 .LFB150: 2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} 2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group5 Callback functions 2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN Callback functions 2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim 2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Callback functions ##### 2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] 2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This subsection provides the following callback functions: 2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox0CompleteCallback 2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox1CompleteCallback 2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox2CompleteCallback 2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox0AbortCallback 2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox1AbortCallback 2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox2AbortCallback 2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo0MsgPendingCallback 2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo0FullCallback 2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo1MsgPendingCallback 2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo1FullCallback 2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_SleepCallback 2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_WakeUpFromRxMsgCallback 2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ErrorCallback 2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim 2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 0 complete callback. 2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) 2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3099 .loc 1 2094 1 3100 .cfi_startproc 3101 @ args = 0, pretend = 0, frame = 8 3102 @ frame_needed = 1, uses_anonymous_args = 0 3103 @ link register save eliminated. 3104 0000 80B4 push {r7} 3105 .cfi_def_cfa_offset 4 ARM GAS /tmp/ccM1MpQr.s page 110 3106 .cfi_offset 7, -4 3107 0002 83B0 sub sp, sp, #12 3108 .cfi_def_cfa_offset 16 3109 0004 00AF add r7, sp, #0 3110 .cfi_def_cfa_register 7 3111 0006 7860 str r0, [r7, #4] 2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the 2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file 2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3112 .loc 1 2102 1 3113 0008 00BF nop 3114 000a 0C37 adds r7, r7, #12 3115 .cfi_def_cfa_offset 4 3116 000c BD46 mov sp, r7 3117 .cfi_def_cfa_register 13 3118 @ sp needed 3119 000e 5DF8047B ldr r7, [sp], #4 3120 .cfi_restore 7 3121 .cfi_def_cfa_offset 0 3122 0012 7047 bx lr 3123 .cfi_endproc 3124 .LFE150: 3126 .section .text.HAL_CAN_TxMailbox1CompleteCallback,"ax",%progbits 3127 .align 1 3128 .weak HAL_CAN_TxMailbox1CompleteCallback 3129 .syntax unified 3130 .thumb 3131 .thumb_func 3133 HAL_CAN_TxMailbox1CompleteCallback: 3134 .LFB151: 2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 1 complete callback. 2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) 2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3135 .loc 1 2111 1 3136 .cfi_startproc 3137 @ args = 0, pretend = 0, frame = 8 3138 @ frame_needed = 1, uses_anonymous_args = 0 3139 @ link register save eliminated. 3140 0000 80B4 push {r7} 3141 .cfi_def_cfa_offset 4 3142 .cfi_offset 7, -4 3143 0002 83B0 sub sp, sp, #12 3144 .cfi_def_cfa_offset 16 3145 0004 00AF add r7, sp, #0 3146 .cfi_def_cfa_register 7 3147 0006 7860 str r0, [r7, #4] ARM GAS /tmp/ccM1MpQr.s page 111 2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the 2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file 2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3148 .loc 1 2119 1 3149 0008 00BF nop 3150 000a 0C37 adds r7, r7, #12 3151 .cfi_def_cfa_offset 4 3152 000c BD46 mov sp, r7 3153 .cfi_def_cfa_register 13 3154 @ sp needed 3155 000e 5DF8047B ldr r7, [sp], #4 3156 .cfi_restore 7 3157 .cfi_def_cfa_offset 0 3158 0012 7047 bx lr 3159 .cfi_endproc 3160 .LFE151: 3162 .section .text.HAL_CAN_TxMailbox2CompleteCallback,"ax",%progbits 3163 .align 1 3164 .weak HAL_CAN_TxMailbox2CompleteCallback 3165 .syntax unified 3166 .thumb 3167 .thumb_func 3169 HAL_CAN_TxMailbox2CompleteCallback: 3170 .LFB152: 2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 2 complete callback. 2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) 2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3171 .loc 1 2128 1 3172 .cfi_startproc 3173 @ args = 0, pretend = 0, frame = 8 3174 @ frame_needed = 1, uses_anonymous_args = 0 3175 @ link register save eliminated. 3176 0000 80B4 push {r7} 3177 .cfi_def_cfa_offset 4 3178 .cfi_offset 7, -4 3179 0002 83B0 sub sp, sp, #12 3180 .cfi_def_cfa_offset 16 3181 0004 00AF add r7, sp, #0 3182 .cfi_def_cfa_register 7 3183 0006 7860 str r0, [r7, #4] 2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the 2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file ARM GAS /tmp/ccM1MpQr.s page 112 2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3184 .loc 1 2136 1 3185 0008 00BF nop 3186 000a 0C37 adds r7, r7, #12 3187 .cfi_def_cfa_offset 4 3188 000c BD46 mov sp, r7 3189 .cfi_def_cfa_register 13 3190 @ sp needed 3191 000e 5DF8047B ldr r7, [sp], #4 3192 .cfi_restore 7 3193 .cfi_def_cfa_offset 0 3194 0012 7047 bx lr 3195 .cfi_endproc 3196 .LFE152: 3198 .section .text.HAL_CAN_TxMailbox0AbortCallback,"ax",%progbits 3199 .align 1 3200 .weak HAL_CAN_TxMailbox0AbortCallback 3201 .syntax unified 3202 .thumb 3203 .thumb_func 3205 HAL_CAN_TxMailbox0AbortCallback: 3206 .LFB153: 2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 0 Cancellation callback. 2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) 2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3207 .loc 1 2145 1 3208 .cfi_startproc 3209 @ args = 0, pretend = 0, frame = 8 3210 @ frame_needed = 1, uses_anonymous_args = 0 3211 @ link register save eliminated. 3212 0000 80B4 push {r7} 3213 .cfi_def_cfa_offset 4 3214 .cfi_offset 7, -4 3215 0002 83B0 sub sp, sp, #12 3216 .cfi_def_cfa_offset 16 3217 0004 00AF add r7, sp, #0 3218 .cfi_def_cfa_register 7 3219 0006 7860 str r0, [r7, #4] 2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox0AbortCallback could be implemented in the 2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file 2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3220 .loc 1 2153 1 3221 0008 00BF nop 3222 000a 0C37 adds r7, r7, #12 3223 .cfi_def_cfa_offset 4 ARM GAS /tmp/ccM1MpQr.s page 113 3224 000c BD46 mov sp, r7 3225 .cfi_def_cfa_register 13 3226 @ sp needed 3227 000e 5DF8047B ldr r7, [sp], #4 3228 .cfi_restore 7 3229 .cfi_def_cfa_offset 0 3230 0012 7047 bx lr 3231 .cfi_endproc 3232 .LFE153: 3234 .section .text.HAL_CAN_TxMailbox1AbortCallback,"ax",%progbits 3235 .align 1 3236 .weak HAL_CAN_TxMailbox1AbortCallback 3237 .syntax unified 3238 .thumb 3239 .thumb_func 3241 HAL_CAN_TxMailbox1AbortCallback: 3242 .LFB154: 2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 1 Cancellation callback. 2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) 2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3243 .loc 1 2162 1 3244 .cfi_startproc 3245 @ args = 0, pretend = 0, frame = 8 3246 @ frame_needed = 1, uses_anonymous_args = 0 3247 @ link register save eliminated. 3248 0000 80B4 push {r7} 3249 .cfi_def_cfa_offset 4 3250 .cfi_offset 7, -4 3251 0002 83B0 sub sp, sp, #12 3252 .cfi_def_cfa_offset 16 3253 0004 00AF add r7, sp, #0 3254 .cfi_def_cfa_register 7 3255 0006 7860 str r0, [r7, #4] 2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox1AbortCallback could be implemented in the 2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file 2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3256 .loc 1 2170 1 3257 0008 00BF nop 3258 000a 0C37 adds r7, r7, #12 3259 .cfi_def_cfa_offset 4 3260 000c BD46 mov sp, r7 3261 .cfi_def_cfa_register 13 3262 @ sp needed 3263 000e 5DF8047B ldr r7, [sp], #4 3264 .cfi_restore 7 3265 .cfi_def_cfa_offset 0 ARM GAS /tmp/ccM1MpQr.s page 114 3266 0012 7047 bx lr 3267 .cfi_endproc 3268 .LFE154: 3270 .section .text.HAL_CAN_TxMailbox2AbortCallback,"ax",%progbits 3271 .align 1 3272 .weak HAL_CAN_TxMailbox2AbortCallback 3273 .syntax unified 3274 .thumb 3275 .thumb_func 3277 HAL_CAN_TxMailbox2AbortCallback: 3278 .LFB155: 2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 2 Cancellation callback. 2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains 2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) 2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3279 .loc 1 2179 1 3280 .cfi_startproc 3281 @ args = 0, pretend = 0, frame = 8 3282 @ frame_needed = 1, uses_anonymous_args = 0 3283 @ link register save eliminated. 3284 0000 80B4 push {r7} 3285 .cfi_def_cfa_offset 4 3286 .cfi_offset 7, -4 3287 0002 83B0 sub sp, sp, #12 3288 .cfi_def_cfa_offset 16 3289 0004 00AF add r7, sp, #0 3290 .cfi_def_cfa_register 7 3291 0006 7860 str r0, [r7, #4] 2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox2AbortCallback could be implemented in the 2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file 2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3292 .loc 1 2187 1 3293 0008 00BF nop 3294 000a 0C37 adds r7, r7, #12 3295 .cfi_def_cfa_offset 4 3296 000c BD46 mov sp, r7 3297 .cfi_def_cfa_register 13 3298 @ sp needed 3299 000e 5DF8047B ldr r7, [sp], #4 3300 .cfi_restore 7 3301 .cfi_def_cfa_offset 0 3302 0012 7047 bx lr 3303 .cfi_endproc 3304 .LFE155: 3306 .section .text.HAL_CAN_RxFifo0MsgPendingCallback,"ax",%progbits 3307 .align 1 3308 .weak HAL_CAN_RxFifo0MsgPendingCallback ARM GAS /tmp/ccM1MpQr.s page 115 3309 .syntax unified 3310 .thumb 3311 .thumb_func 3313 HAL_CAN_RxFifo0MsgPendingCallback: 3314 .LFB156: 2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 0 message pending callback. 2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) 2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3315 .loc 1 2196 1 3316 .cfi_startproc 3317 @ args = 0, pretend = 0, frame = 8 3318 @ frame_needed = 1, uses_anonymous_args = 0 3319 @ link register save eliminated. 3320 0000 80B4 push {r7} 3321 .cfi_def_cfa_offset 4 3322 .cfi_offset 7, -4 3323 0002 83B0 sub sp, sp, #12 3324 .cfi_def_cfa_offset 16 3325 0004 00AF add r7, sp, #0 3326 .cfi_def_cfa_register 7 3327 0006 7860 str r0, [r7, #4] 2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the 2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file 2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3328 .loc 1 2204 1 3329 0008 00BF nop 3330 000a 0C37 adds r7, r7, #12 3331 .cfi_def_cfa_offset 4 3332 000c BD46 mov sp, r7 3333 .cfi_def_cfa_register 13 3334 @ sp needed 3335 000e 5DF8047B ldr r7, [sp], #4 3336 .cfi_restore 7 3337 .cfi_def_cfa_offset 0 3338 0012 7047 bx lr 3339 .cfi_endproc 3340 .LFE156: 3342 .section .text.HAL_CAN_RxFifo0FullCallback,"ax",%progbits 3343 .align 1 3344 .weak HAL_CAN_RxFifo0FullCallback 3345 .syntax unified 3346 .thumb 3347 .thumb_func 3349 HAL_CAN_RxFifo0FullCallback: 3350 .LFB157: 2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ARM GAS /tmp/ccM1MpQr.s page 116 2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 0 full callback. 2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) 2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3351 .loc 1 2213 1 3352 .cfi_startproc 3353 @ args = 0, pretend = 0, frame = 8 3354 @ frame_needed = 1, uses_anonymous_args = 0 3355 @ link register save eliminated. 3356 0000 80B4 push {r7} 3357 .cfi_def_cfa_offset 4 3358 .cfi_offset 7, -4 3359 0002 83B0 sub sp, sp, #12 3360 .cfi_def_cfa_offset 16 3361 0004 00AF add r7, sp, #0 3362 .cfi_def_cfa_register 7 3363 0006 7860 str r0, [r7, #4] 2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo0FullCallback could be implemented in the user 2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** file 2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3364 .loc 1 2221 1 3365 0008 00BF nop 3366 000a 0C37 adds r7, r7, #12 3367 .cfi_def_cfa_offset 4 3368 000c BD46 mov sp, r7 3369 .cfi_def_cfa_register 13 3370 @ sp needed 3371 000e 5DF8047B ldr r7, [sp], #4 3372 .cfi_restore 7 3373 .cfi_def_cfa_offset 0 3374 0012 7047 bx lr 3375 .cfi_endproc 3376 .LFE157: 3378 .section .text.HAL_CAN_RxFifo1MsgPendingCallback,"ax",%progbits 3379 .align 1 3380 .weak HAL_CAN_RxFifo1MsgPendingCallback 3381 .syntax unified 3382 .thumb 3383 .thumb_func 3385 HAL_CAN_RxFifo1MsgPendingCallback: 3386 .LFB158: 2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 1 message pending callback. 2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ ARM GAS /tmp/ccM1MpQr.s page 117 2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) 2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3387 .loc 1 2230 1 3388 .cfi_startproc 3389 @ args = 0, pretend = 0, frame = 8 3390 @ frame_needed = 1, uses_anonymous_args = 0 3391 @ link register save eliminated. 3392 0000 80B4 push {r7} 3393 .cfi_def_cfa_offset 4 3394 .cfi_offset 7, -4 3395 0002 83B0 sub sp, sp, #12 3396 .cfi_def_cfa_offset 16 3397 0004 00AF add r7, sp, #0 3398 .cfi_def_cfa_register 7 3399 0006 7860 str r0, [r7, #4] 2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the 2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file 2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3400 .loc 1 2238 1 3401 0008 00BF nop 3402 000a 0C37 adds r7, r7, #12 3403 .cfi_def_cfa_offset 4 3404 000c BD46 mov sp, r7 3405 .cfi_def_cfa_register 13 3406 @ sp needed 3407 000e 5DF8047B ldr r7, [sp], #4 3408 .cfi_restore 7 3409 .cfi_def_cfa_offset 0 3410 0012 7047 bx lr 3411 .cfi_endproc 3412 .LFE158: 3414 .section .text.HAL_CAN_RxFifo1FullCallback,"ax",%progbits 3415 .align 1 3416 .weak HAL_CAN_RxFifo1FullCallback 3417 .syntax unified 3418 .thumb 3419 .thumb_func 3421 HAL_CAN_RxFifo1FullCallback: 3422 .LFB159: 2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 1 full callback. 2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) 2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3423 .loc 1 2247 1 3424 .cfi_startproc 3425 @ args = 0, pretend = 0, frame = 8 3426 @ frame_needed = 1, uses_anonymous_args = 0 ARM GAS /tmp/ccM1MpQr.s page 118 3427 @ link register save eliminated. 3428 0000 80B4 push {r7} 3429 .cfi_def_cfa_offset 4 3430 .cfi_offset 7, -4 3431 0002 83B0 sub sp, sp, #12 3432 .cfi_def_cfa_offset 16 3433 0004 00AF add r7, sp, #0 3434 .cfi_def_cfa_register 7 3435 0006 7860 str r0, [r7, #4] 2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo1FullCallback could be implemented in the user 2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** file 2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3436 .loc 1 2255 1 3437 0008 00BF nop 3438 000a 0C37 adds r7, r7, #12 3439 .cfi_def_cfa_offset 4 3440 000c BD46 mov sp, r7 3441 .cfi_def_cfa_register 13 3442 @ sp needed 3443 000e 5DF8047B ldr r7, [sp], #4 3444 .cfi_restore 7 3445 .cfi_def_cfa_offset 0 3446 0012 7047 bx lr 3447 .cfi_endproc 3448 .LFE159: 3450 .section .text.HAL_CAN_SleepCallback,"ax",%progbits 3451 .align 1 3452 .weak HAL_CAN_SleepCallback 3453 .syntax unified 3454 .thumb 3455 .thumb_func 3457 HAL_CAN_SleepCallback: 3458 .LFB160: 2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Sleep callback. 2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) 2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3459 .loc 1 2264 1 3460 .cfi_startproc 3461 @ args = 0, pretend = 0, frame = 8 3462 @ frame_needed = 1, uses_anonymous_args = 0 3463 @ link register save eliminated. 3464 0000 80B4 push {r7} 3465 .cfi_def_cfa_offset 4 3466 .cfi_offset 7, -4 3467 0002 83B0 sub sp, sp, #12 3468 .cfi_def_cfa_offset 16 ARM GAS /tmp/ccM1MpQr.s page 119 3469 0004 00AF add r7, sp, #0 3470 .cfi_def_cfa_register 7 3471 0006 7860 str r0, [r7, #4] 2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_SleepCallback could be implemented in the user file 2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3472 .loc 1 2271 1 3473 0008 00BF nop 3474 000a 0C37 adds r7, r7, #12 3475 .cfi_def_cfa_offset 4 3476 000c BD46 mov sp, r7 3477 .cfi_def_cfa_register 13 3478 @ sp needed 3479 000e 5DF8047B ldr r7, [sp], #4 3480 .cfi_restore 7 3481 .cfi_def_cfa_offset 0 3482 0012 7047 bx lr 3483 .cfi_endproc 3484 .LFE160: 3486 .section .text.HAL_CAN_WakeUpFromRxMsgCallback,"ax",%progbits 3487 .align 1 3488 .weak HAL_CAN_WakeUpFromRxMsgCallback 3489 .syntax unified 3490 .thumb 3491 .thumb_func 3493 HAL_CAN_WakeUpFromRxMsgCallback: 3494 .LFB161: 2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief WakeUp from Rx message callback. 2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) 2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3495 .loc 1 2280 1 3496 .cfi_startproc 3497 @ args = 0, pretend = 0, frame = 8 3498 @ frame_needed = 1, uses_anonymous_args = 0 3499 @ link register save eliminated. 3500 0000 80B4 push {r7} 3501 .cfi_def_cfa_offset 4 3502 .cfi_offset 7, -4 3503 0002 83B0 sub sp, sp, #12 3504 .cfi_def_cfa_offset 16 3505 0004 00AF add r7, sp, #0 3506 .cfi_def_cfa_register 7 3507 0006 7860 str r0, [r7, #4] 2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, ARM GAS /tmp/ccM1MpQr.s page 120 2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the 2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file 2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3508 .loc 1 2288 1 3509 0008 00BF nop 3510 000a 0C37 adds r7, r7, #12 3511 .cfi_def_cfa_offset 4 3512 000c BD46 mov sp, r7 3513 .cfi_def_cfa_register 13 3514 @ sp needed 3515 000e 5DF8047B ldr r7, [sp], #4 3516 .cfi_restore 7 3517 .cfi_def_cfa_offset 0 3518 0012 7047 bx lr 3519 .cfi_endproc 3520 .LFE161: 3522 .section .text.HAL_CAN_ErrorCallback,"ax",%progbits 3523 .align 1 3524 .weak HAL_CAN_ErrorCallback 3525 .syntax unified 3526 .thumb 3527 .thumb_func 3529 HAL_CAN_ErrorCallback: 3530 .LFB162: 2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Error CAN callback. 2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None 2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) 2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3531 .loc 1 2297 1 3532 .cfi_startproc 3533 @ args = 0, pretend = 0, frame = 8 3534 @ frame_needed = 1, uses_anonymous_args = 0 3535 @ link register save eliminated. 3536 0000 80B4 push {r7} 3537 .cfi_def_cfa_offset 4 3538 .cfi_offset 7, -4 3539 0002 83B0 sub sp, sp, #12 3540 .cfi_def_cfa_offset 16 3541 0004 00AF add r7, sp, #0 3542 .cfi_def_cfa_register 7 3543 0006 7860 str r0, [r7, #4] 2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ 2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); 2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, 2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_ErrorCallback could be implemented in the user file 2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3544 .loc 1 2304 1 3545 0008 00BF nop 3546 000a 0C37 adds r7, r7, #12 ARM GAS /tmp/ccM1MpQr.s page 121 3547 .cfi_def_cfa_offset 4 3548 000c BD46 mov sp, r7 3549 .cfi_def_cfa_register 13 3550 @ sp needed 3551 000e 5DF8047B ldr r7, [sp], #4 3552 .cfi_restore 7 3553 .cfi_def_cfa_offset 0 3554 0012 7047 bx lr 3555 .cfi_endproc 3556 .LFE162: 3558 .section .text.HAL_CAN_GetState,"ax",%progbits 3559 .align 1 3560 .global HAL_CAN_GetState 3561 .syntax unified 3562 .thumb 3563 .thumb_func 3565 HAL_CAN_GetState: 3566 .LFB163: 2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} 2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions 2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN Peripheral State functions 2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * 2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim 2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Peripheral State and Error functions ##### 2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== 2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] 2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This subsection provides functions allowing to : 2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetState() : Return the CAN state. 2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetError() : Return the CAN error codes if any. 2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ResetError(): Reset the CAN error codes if any. 2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim 2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ 2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return the CAN state. 2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL state 2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan) 2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3567 .loc 1 2334 1 3568 .cfi_startproc 3569 @ args = 0, pretend = 0, frame = 16 3570 @ frame_needed = 1, uses_anonymous_args = 0 3571 @ link register save eliminated. 3572 0000 80B4 push {r7} 3573 .cfi_def_cfa_offset 4 3574 .cfi_offset 7, -4 3575 0002 85B0 sub sp, sp, #20 ARM GAS /tmp/ccM1MpQr.s page 122 3576 .cfi_def_cfa_offset 24 3577 0004 00AF add r7, sp, #0 3578 .cfi_def_cfa_register 7 3579 0006 7860 str r0, [r7, #4] 2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; 3580 .loc 1 2335 24 3581 0008 7B68 ldr r3, [r7, #4] 3582 000a 93F82030 ldrb r3, [r3, #32] 3583 000e FB73 strb r3, [r7, #15] 2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 3584 .loc 1 2337 6 3585 0010 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 3586 0012 012B cmp r3, #1 3587 0014 02D0 beq .L170 3588 .loc 1 2337 38 discriminator 1 3589 0016 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 3590 0018 022B cmp r3, #2 3591 001a 12D1 bne .L171 3592 .L170: 2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check sleep mode acknowledge flag */ 2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 3593 .loc 1 2341 14 3594 001c 7B68 ldr r3, [r7, #4] 3595 001e 1B68 ldr r3, [r3] 3596 .loc 1 2341 24 3597 0020 5B68 ldr r3, [r3, #4] 3598 .loc 1 2341 30 3599 0022 03F00203 and r3, r3, #2 3600 .loc 1 2341 8 3601 0026 002B cmp r3, #0 3602 0028 02D0 beq .L172 2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep mode is active */ 2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_ACTIVE; 3603 .loc 1 2344 13 3604 002a 0423 movs r3, #4 3605 002c FB73 strb r3, [r7, #15] 3606 002e 08E0 b .L171 3607 .L172: 2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check sleep mode request flag */ 2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U) 3608 .loc 1 2347 19 3609 0030 7B68 ldr r3, [r7, #4] 3610 0032 1B68 ldr r3, [r3] 3611 .loc 1 2347 29 3612 0034 1B68 ldr r3, [r3] 3613 .loc 1 2347 35 3614 0036 03F00203 and r3, r3, #2 3615 .loc 1 2347 13 3616 003a 002B cmp r3, #0 3617 003c 01D0 beq .L171 2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep mode request is pending */ ARM GAS /tmp/ccM1MpQr.s page 123 2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_PENDING; 3618 .loc 1 2350 13 3619 003e 0323 movs r3, #3 3620 0040 FB73 strb r3, [r7, #15] 3621 .L171: 2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Neither sleep mode request nor sleep mode acknowledge */ 2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return CAN state */ 2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return state; 3622 .loc 1 2359 10 3623 0042 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3624 .loc 1 2360 1 3625 0044 1846 mov r0, r3 3626 0046 1437 adds r7, r7, #20 3627 .cfi_def_cfa_offset 4 3628 0048 BD46 mov sp, r7 3629 .cfi_def_cfa_register 13 3630 @ sp needed 3631 004a 5DF8047B ldr r7, [sp], #4 3632 .cfi_restore 7 3633 .cfi_def_cfa_offset 0 3634 004e 7047 bx lr 3635 .cfi_endproc 3636 .LFE163: 3638 .section .text.HAL_CAN_GetError,"ax",%progbits 3639 .align 1 3640 .global HAL_CAN_GetError 3641 .syntax unified 3642 .thumb 3643 .thumb_func 3645 HAL_CAN_GetError: 3646 .LFB164: 2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return the CAN error code. 2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval CAN Error Code 2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan) 2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3647 .loc 1 2369 1 3648 .cfi_startproc 3649 @ args = 0, pretend = 0, frame = 8 3650 @ frame_needed = 1, uses_anonymous_args = 0 3651 @ link register save eliminated. 3652 0000 80B4 push {r7} 3653 .cfi_def_cfa_offset 4 3654 .cfi_offset 7, -4 3655 0002 83B0 sub sp, sp, #12 3656 .cfi_def_cfa_offset 16 ARM GAS /tmp/ccM1MpQr.s page 124 3657 0004 00AF add r7, sp, #0 3658 .cfi_def_cfa_register 7 3659 0006 7860 str r0, [r7, #4] 2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return CAN error code */ 2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return hcan->ErrorCode; 3660 .loc 1 2371 14 3661 0008 7B68 ldr r3, [r7, #4] 3662 000a 5B6A ldr r3, [r3, #36] 2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3663 .loc 1 2372 1 3664 000c 1846 mov r0, r3 3665 000e 0C37 adds r7, r7, #12 3666 .cfi_def_cfa_offset 4 3667 0010 BD46 mov sp, r7 3668 .cfi_def_cfa_register 13 3669 @ sp needed 3670 0012 5DF8047B ldr r7, [sp], #4 3671 .cfi_restore 7 3672 .cfi_def_cfa_offset 0 3673 0016 7047 bx lr 3674 .cfi_endproc 3675 .LFE164: 3677 .section .text.HAL_CAN_ResetError,"ax",%progbits 3678 .align 1 3679 .global HAL_CAN_ResetError 3680 .syntax unified 3681 .thumb 3682 .thumb_func 3684 HAL_CAN_ResetError: 3685 .LFB165: 2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** 2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Reset the CAN error code. 2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains 2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. 2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status 2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ 2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan) 2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 3686 .loc 1 2381 1 3687 .cfi_startproc 3688 @ args = 0, pretend = 0, frame = 16 3689 @ frame_needed = 1, uses_anonymous_args = 0 3690 @ link register save eliminated. 3691 0000 80B4 push {r7} 3692 .cfi_def_cfa_offset 4 3693 .cfi_offset 7, -4 3694 0002 85B0 sub sp, sp, #20 3695 .cfi_def_cfa_offset 24 3696 0004 00AF add r7, sp, #0 3697 .cfi_def_cfa_register 7 3698 0006 7860 str r0, [r7, #4] 2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; 3699 .loc 1 2382 21 3700 0008 0023 movs r3, #0 3701 000a FB73 strb r3, [r7, #15] 2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; ARM GAS /tmp/ccM1MpQr.s page 125 3702 .loc 1 2383 24 3703 000c 7B68 ldr r3, [r7, #4] 3704 000e 93F82030 ldrb r3, [r3, #32] 3705 0012 BB73 strb r3, [r7, #14] 2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || 3706 .loc 1 2385 6 3707 0014 BB7B ldrb r3, [r7, #14] @ zero_extendqisi2 3708 0016 012B cmp r3, #1 3709 0018 02D0 beq .L177 3710 .loc 1 2385 38 discriminator 1 3711 001a BB7B ldrb r3, [r7, #14] @ zero_extendqisi2 3712 001c 022B cmp r3, #2 3713 001e 03D1 bne .L178 3714 .L177: 2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) 2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset CAN error code */ 2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = 0U; 3715 .loc 1 2389 21 3716 0020 7B68 ldr r3, [r7, #4] 3717 0022 0022 movs r2, #0 3718 0024 5A62 str r2, [r3, #36] 3719 0026 07E0 b .L179 3720 .L178: 2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else 2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { 2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ 2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 3721 .loc 1 2394 9 3722 0028 7B68 ldr r3, [r7, #4] 3723 002a 5B6A ldr r3, [r3, #36] 3724 .loc 1 2394 21 3725 002c 43F48022 orr r2, r3, #262144 3726 0030 7B68 ldr r3, [r7, #4] 3727 0032 5A62 str r2, [r3, #36] 2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; 3728 .loc 1 2396 12 3729 0034 0123 movs r3, #1 3730 0036 FB73 strb r3, [r7, #15] 3731 .L179: 2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** 2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return the status */ 2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; 3732 .loc 1 2400 10 3733 0038 FB7B ldrb r3, [r7, #15] @ zero_extendqisi2 2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } 3734 .loc 1 2401 1 3735 003a 1846 mov r0, r3 3736 003c 1437 adds r7, r7, #20 3737 .cfi_def_cfa_offset 4 3738 003e BD46 mov sp, r7 3739 .cfi_def_cfa_register 13 3740 @ sp needed ARM GAS /tmp/ccM1MpQr.s page 126 3741 0040 5DF8047B ldr r7, [sp], #4 3742 .cfi_restore 7 3743 .cfi_def_cfa_offset 0 3744 0044 7047 bx lr 3745 .cfi_endproc 3746 .LFE165: 3748 .text 3749 .Letext0: 3750 .file 3 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl 3751 .file 4 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl 3752 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 3753 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 3754 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 3755 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" 3756 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" ARM GAS /tmp/ccM1MpQr.s page 127 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_can.c /tmp/ccM1MpQr.s:21 .text.HAL_CAN_Init:00000000 $t /tmp/ccM1MpQr.s:27 .text.HAL_CAN_Init:00000000 HAL_CAN_Init /tmp/ccM1MpQr.s:421 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit /tmp/ccM1MpQr.s:349 .text.HAL_CAN_DeInit:00000000 $t /tmp/ccM1MpQr.s:355 .text.HAL_CAN_DeInit:00000000 HAL_CAN_DeInit /tmp/ccM1MpQr.s:871 .text.HAL_CAN_Stop:00000000 HAL_CAN_Stop /tmp/ccM1MpQr.s:457 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit /tmp/ccM1MpQr.s:415 .text.HAL_CAN_MspInit:00000000 $t /tmp/ccM1MpQr.s:451 .text.HAL_CAN_MspDeInit:00000000 $t /tmp/ccM1MpQr.s:487 .text.HAL_CAN_ConfigFilter:00000000 $t /tmp/ccM1MpQr.s:493 .text.HAL_CAN_ConfigFilter:00000000 HAL_CAN_ConfigFilter /tmp/ccM1MpQr.s:755 .text.HAL_CAN_Start:00000000 $t /tmp/ccM1MpQr.s:761 .text.HAL_CAN_Start:00000000 HAL_CAN_Start /tmp/ccM1MpQr.s:865 .text.HAL_CAN_Stop:00000000 $t /tmp/ccM1MpQr.s:979 .text.HAL_CAN_RequestSleep:00000000 $t /tmp/ccM1MpQr.s:985 .text.HAL_CAN_RequestSleep:00000000 HAL_CAN_RequestSleep /tmp/ccM1MpQr.s:1050 .text.HAL_CAN_WakeUp:00000000 $t /tmp/ccM1MpQr.s:1056 .text.HAL_CAN_WakeUp:00000000 HAL_CAN_WakeUp /tmp/ccM1MpQr.s:1158 .text.HAL_CAN_WakeUp:00000080 $d /tmp/ccM1MpQr.s:1163 .text.HAL_CAN_IsSleepActive:00000000 $t /tmp/ccM1MpQr.s:1169 .text.HAL_CAN_IsSleepActive:00000000 HAL_CAN_IsSleepActive /tmp/ccM1MpQr.s:1231 .text.HAL_CAN_AddTxMessage:00000000 $t /tmp/ccM1MpQr.s:1237 .text.HAL_CAN_AddTxMessage:00000000 HAL_CAN_AddTxMessage /tmp/ccM1MpQr.s:1505 .text.HAL_CAN_AbortTxRequest:00000000 $t /tmp/ccM1MpQr.s:1511 .text.HAL_CAN_AbortTxRequest:00000000 HAL_CAN_AbortTxRequest /tmp/ccM1MpQr.s:1614 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 $t /tmp/ccM1MpQr.s:1620 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 HAL_CAN_GetTxMailboxesFreeLevel /tmp/ccM1MpQr.s:1713 .text.HAL_CAN_IsTxMessagePending:00000000 $t /tmp/ccM1MpQr.s:1719 .text.HAL_CAN_IsTxMessagePending:00000000 HAL_CAN_IsTxMessagePending /tmp/ccM1MpQr.s:1788 .text.HAL_CAN_GetTxTimestamp:00000000 $t /tmp/ccM1MpQr.s:1794 .text.HAL_CAN_GetTxTimestamp:00000000 HAL_CAN_GetTxTimestamp /tmp/ccM1MpQr.s:1883 .text.HAL_CAN_GetRxMessage:00000000 $t /tmp/ccM1MpQr.s:1889 .text.HAL_CAN_GetRxMessage:00000000 HAL_CAN_GetRxMessage /tmp/ccM1MpQr.s:2292 .text.HAL_CAN_GetRxFifoFillLevel:00000000 $t /tmp/ccM1MpQr.s:2298 .text.HAL_CAN_GetRxFifoFillLevel:00000000 HAL_CAN_GetRxFifoFillLevel /tmp/ccM1MpQr.s:2370 .text.HAL_CAN_ActivateNotification:00000000 $t /tmp/ccM1MpQr.s:2376 .text.HAL_CAN_ActivateNotification:00000000 HAL_CAN_ActivateNotification /tmp/ccM1MpQr.s:2443 .text.HAL_CAN_DeactivateNotification:00000000 $t /tmp/ccM1MpQr.s:2449 .text.HAL_CAN_DeactivateNotification:00000000 HAL_CAN_DeactivateNotification /tmp/ccM1MpQr.s:2517 .text.HAL_CAN_IRQHandler:00000000 $t /tmp/ccM1MpQr.s:2523 .text.HAL_CAN_IRQHandler:00000000 HAL_CAN_IRQHandler /tmp/ccM1MpQr.s:3097 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 HAL_CAN_TxMailbox0CompleteCallback /tmp/ccM1MpQr.s:3205 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 HAL_CAN_TxMailbox0AbortCallback /tmp/ccM1MpQr.s:3133 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 HAL_CAN_TxMailbox1CompleteCallback /tmp/ccM1MpQr.s:3241 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 HAL_CAN_TxMailbox1AbortCallback /tmp/ccM1MpQr.s:3169 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 HAL_CAN_TxMailbox2CompleteCallback /tmp/ccM1MpQr.s:3277 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 HAL_CAN_TxMailbox2AbortCallback /tmp/ccM1MpQr.s:3349 .text.HAL_CAN_RxFifo0FullCallback:00000000 HAL_CAN_RxFifo0FullCallback /tmp/ccM1MpQr.s:3313 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 HAL_CAN_RxFifo0MsgPendingCallback /tmp/ccM1MpQr.s:3421 .text.HAL_CAN_RxFifo1FullCallback:00000000 HAL_CAN_RxFifo1FullCallback /tmp/ccM1MpQr.s:3385 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 HAL_CAN_RxFifo1MsgPendingCallback /tmp/ccM1MpQr.s:3457 .text.HAL_CAN_SleepCallback:00000000 HAL_CAN_SleepCallback /tmp/ccM1MpQr.s:3493 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 HAL_CAN_WakeUpFromRxMsgCallback /tmp/ccM1MpQr.s:3529 .text.HAL_CAN_ErrorCallback:00000000 HAL_CAN_ErrorCallback /tmp/ccM1MpQr.s:3091 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 $t ARM GAS /tmp/ccM1MpQr.s page 128 /tmp/ccM1MpQr.s:3127 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 $t /tmp/ccM1MpQr.s:3163 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 $t /tmp/ccM1MpQr.s:3199 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 $t /tmp/ccM1MpQr.s:3235 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 $t /tmp/ccM1MpQr.s:3271 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 $t /tmp/ccM1MpQr.s:3307 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 $t /tmp/ccM1MpQr.s:3343 .text.HAL_CAN_RxFifo0FullCallback:00000000 $t /tmp/ccM1MpQr.s:3379 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 $t /tmp/ccM1MpQr.s:3415 .text.HAL_CAN_RxFifo1FullCallback:00000000 $t /tmp/ccM1MpQr.s:3451 .text.HAL_CAN_SleepCallback:00000000 $t /tmp/ccM1MpQr.s:3487 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 $t /tmp/ccM1MpQr.s:3523 .text.HAL_CAN_ErrorCallback:00000000 $t /tmp/ccM1MpQr.s:3559 .text.HAL_CAN_GetState:00000000 $t /tmp/ccM1MpQr.s:3565 .text.HAL_CAN_GetState:00000000 HAL_CAN_GetState /tmp/ccM1MpQr.s:3639 .text.HAL_CAN_GetError:00000000 $t /tmp/ccM1MpQr.s:3645 .text.HAL_CAN_GetError:00000000 HAL_CAN_GetError /tmp/ccM1MpQr.s:3678 .text.HAL_CAN_ResetError:00000000 $t /tmp/ccM1MpQr.s:3684 .text.HAL_CAN_ResetError:00000000 HAL_CAN_ResetError UNDEFINED SYMBOLS HAL_GetTick