ARM GAS /tmp/ccdHkDFg.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_msp.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/stm32f3xx_hal_msp.c" 20 .section .text.HAL_MspInit,"ax",%progbits 21 .align 1 22 .global HAL_MspInit 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_MspInit: 28 .LFB130: 1:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f3xx_hal_msp.c **** /** 3:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 4:Core/Src/stm32f3xx_hal_msp.c **** * @file stm32f3xx_hal_msp.c 5:Core/Src/stm32f3xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 6:Core/Src/stm32f3xx_hal_msp.c **** * and de-Initialization codes. 7:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 8:Core/Src/stm32f3xx_hal_msp.c **** * @attention 9:Core/Src/stm32f3xx_hal_msp.c **** * 10:Core/Src/stm32f3xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics. 11:Core/Src/stm32f3xx_hal_msp.c **** * All rights reserved. 12:Core/Src/stm32f3xx_hal_msp.c **** * 13:Core/Src/stm32f3xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/stm32f3xx_hal_msp.c **** * in the root directory of this software component. 15:Core/Src/stm32f3xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/stm32f3xx_hal_msp.c **** * 17:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 18:Core/Src/stm32f3xx_hal_msp.c **** */ 19:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Header */ 20:Core/Src/stm32f3xx_hal_msp.c **** 21:Core/Src/stm32f3xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 22:Core/Src/stm32f3xx_hal_msp.c **** #include "main.h" 23:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 24:Core/Src/stm32f3xx_hal_msp.c **** 25:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Includes */ 26:Core/Src/stm32f3xx_hal_msp.c **** 27:Core/Src/stm32f3xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 28:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f3xx_hal_msp.c **** 30:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */ ARM GAS /tmp/ccdHkDFg.s page 2 31:Core/Src/stm32f3xx_hal_msp.c **** 32:Core/Src/stm32f3xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 33:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Define */ 34:Core/Src/stm32f3xx_hal_msp.c **** 35:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Define */ 36:Core/Src/stm32f3xx_hal_msp.c **** 37:Core/Src/stm32f3xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 38:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 39:Core/Src/stm32f3xx_hal_msp.c **** 40:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Macro */ 41:Core/Src/stm32f3xx_hal_msp.c **** 42:Core/Src/stm32f3xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 43:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PV */ 44:Core/Src/stm32f3xx_hal_msp.c **** 45:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PV */ 46:Core/Src/stm32f3xx_hal_msp.c **** 47:Core/Src/stm32f3xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 48:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 49:Core/Src/stm32f3xx_hal_msp.c **** 50:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PFP */ 51:Core/Src/stm32f3xx_hal_msp.c **** 52:Core/Src/stm32f3xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 53:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 54:Core/Src/stm32f3xx_hal_msp.c **** 55:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 56:Core/Src/stm32f3xx_hal_msp.c **** 57:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 58:Core/Src/stm32f3xx_hal_msp.c **** 59:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END 0 */ 60:Core/Src/stm32f3xx_hal_msp.c **** 61:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); 62:Core/Src/stm32f3xx_hal_msp.c **** /** 63:Core/Src/stm32f3xx_hal_msp.c **** * Initializes the Global MSP. 64:Core/Src/stm32f3xx_hal_msp.c **** */ 65:Core/Src/stm32f3xx_hal_msp.c **** void HAL_MspInit(void) 66:Core/Src/stm32f3xx_hal_msp.c **** { 29 .loc 1 66 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 34 0000 82B0 sub sp, sp, #8 35 .cfi_def_cfa_offset 8 67:Core/Src/stm32f3xx_hal_msp.c **** 68:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 69:Core/Src/stm32f3xx_hal_msp.c **** 70:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 71:Core/Src/stm32f3xx_hal_msp.c **** 72:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 36 .loc 1 72 3 view .LVU1 37 .LBB2: 38 .loc 1 72 3 view .LVU2 39 .loc 1 72 3 view .LVU3 40 0002 0A4B ldr r3, .L3 41 0004 9A69 ldr r2, [r3, #24] 42 0006 42F00102 orr r2, r2, #1 43 000a 9A61 str r2, [r3, #24] ARM GAS /tmp/ccdHkDFg.s page 3 44 .loc 1 72 3 view .LVU4 45 000c 9A69 ldr r2, [r3, #24] 46 000e 02F00102 and r2, r2, #1 47 0012 0092 str r2, [sp] 48 .loc 1 72 3 view .LVU5 49 0014 009A ldr r2, [sp] 50 .LBE2: 51 .loc 1 72 3 view .LVU6 73:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); 52 .loc 1 73 3 view .LVU7 53 .LBB3: 54 .loc 1 73 3 view .LVU8 55 .loc 1 73 3 view .LVU9 56 0016 DA69 ldr r2, [r3, #28] 57 0018 42F08052 orr r2, r2, #268435456 58 001c DA61 str r2, [r3, #28] 59 .loc 1 73 3 view .LVU10 60 001e DB69 ldr r3, [r3, #28] 61 0020 03F08053 and r3, r3, #268435456 62 0024 0193 str r3, [sp, #4] 63 .loc 1 73 3 view .LVU11 64 0026 019B ldr r3, [sp, #4] 65 .LBE3: 66 .loc 1 73 3 view .LVU12 74:Core/Src/stm32f3xx_hal_msp.c **** 75:Core/Src/stm32f3xx_hal_msp.c **** /* System interrupt init*/ 76:Core/Src/stm32f3xx_hal_msp.c **** 77:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 78:Core/Src/stm32f3xx_hal_msp.c **** 79:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 80:Core/Src/stm32f3xx_hal_msp.c **** } 67 .loc 1 80 1 is_stmt 0 view .LVU13 68 0028 02B0 add sp, sp, #8 69 .cfi_def_cfa_offset 0 70 @ sp needed 71 002a 7047 bx lr 72 .L4: 73 .align 2 74 .L3: 75 002c 00100240 .word 1073876992 76 .cfi_endproc 77 .LFE130: 79 .section .text.HAL_CAN_MspInit,"ax",%progbits 80 .align 1 81 .global HAL_CAN_MspInit 82 .syntax unified 83 .thumb 84 .thumb_func 86 HAL_CAN_MspInit: 87 .LVL0: 88 .LFB131: 81:Core/Src/stm32f3xx_hal_msp.c **** 82:Core/Src/stm32f3xx_hal_msp.c **** /** 83:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP Initialization 84:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 85:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer 86:Core/Src/stm32f3xx_hal_msp.c **** * @retval None ARM GAS /tmp/ccdHkDFg.s page 4 87:Core/Src/stm32f3xx_hal_msp.c **** */ 88:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) 89:Core/Src/stm32f3xx_hal_msp.c **** { 89 .loc 1 89 1 is_stmt 1 view -0 90 .cfi_startproc 91 @ args = 0, pretend = 0, frame = 32 92 @ frame_needed = 0, uses_anonymous_args = 0 93 .loc 1 89 1 is_stmt 0 view .LVU15 94 0000 00B5 push {lr} 95 .cfi_def_cfa_offset 4 96 .cfi_offset 14, -4 97 0002 89B0 sub sp, sp, #36 98 .cfi_def_cfa_offset 40 90:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 99 .loc 1 90 3 is_stmt 1 view .LVU16 100 .loc 1 90 20 is_stmt 0 view .LVU17 101 0004 0023 movs r3, #0 102 0006 0393 str r3, [sp, #12] 103 0008 0493 str r3, [sp, #16] 104 000a 0593 str r3, [sp, #20] 105 000c 0693 str r3, [sp, #24] 106 000e 0793 str r3, [sp, #28] 91:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN) 107 .loc 1 91 3 is_stmt 1 view .LVU18 108 .loc 1 91 10 is_stmt 0 view .LVU19 109 0010 0268 ldr r2, [r0] 110 .loc 1 91 5 view .LVU20 111 0012 144B ldr r3, .L9 112 0014 9A42 cmp r2, r3 113 0016 02D0 beq .L8 114 .LVL1: 115 .L5: 92:Core/Src/stm32f3xx_hal_msp.c **** { 93:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 0 */ 94:Core/Src/stm32f3xx_hal_msp.c **** 95:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 0 */ 96:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 97:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_ENABLE(); 98:Core/Src/stm32f3xx_hal_msp.c **** 99:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 100:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 101:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX 102:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX 103:Core/Src/stm32f3xx_hal_msp.c **** */ 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 110:Core/Src/stm32f3xx_hal_msp.c **** 111:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */ 112:Core/Src/stm32f3xx_hal_msp.c **** 113:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 1 */ 114:Core/Src/stm32f3xx_hal_msp.c **** } 115:Core/Src/stm32f3xx_hal_msp.c **** 116:Core/Src/stm32f3xx_hal_msp.c **** } ARM GAS /tmp/ccdHkDFg.s page 5 116 .loc 1 116 1 view .LVU21 117 0018 09B0 add sp, sp, #36 118 .cfi_remember_state 119 .cfi_def_cfa_offset 4 120 @ sp needed 121 001a 5DF804FB ldr pc, [sp], #4 122 .LVL2: 123 .L8: 124 .cfi_restore_state 97:Core/Src/stm32f3xx_hal_msp.c **** 125 .loc 1 97 5 is_stmt 1 view .LVU22 126 .LBB4: 97:Core/Src/stm32f3xx_hal_msp.c **** 127 .loc 1 97 5 view .LVU23 97:Core/Src/stm32f3xx_hal_msp.c **** 128 .loc 1 97 5 view .LVU24 129 001e 03F5D633 add r3, r3, #109568 130 0022 DA69 ldr r2, [r3, #28] 131 0024 42F00072 orr r2, r2, #33554432 132 0028 DA61 str r2, [r3, #28] 97:Core/Src/stm32f3xx_hal_msp.c **** 133 .loc 1 97 5 view .LVU25 134 002a DA69 ldr r2, [r3, #28] 135 002c 02F00072 and r2, r2, #33554432 136 0030 0192 str r2, [sp, #4] 97:Core/Src/stm32f3xx_hal_msp.c **** 137 .loc 1 97 5 view .LVU26 138 0032 019A ldr r2, [sp, #4] 139 .LBE4: 97:Core/Src/stm32f3xx_hal_msp.c **** 140 .loc 1 97 5 view .LVU27 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 141 .loc 1 99 5 view .LVU28 142 .LBB5: 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 143 .loc 1 99 5 view .LVU29 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 144 .loc 1 99 5 view .LVU30 145 0034 5A69 ldr r2, [r3, #20] 146 0036 42F40032 orr r2, r2, #131072 147 003a 5A61 str r2, [r3, #20] 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 148 .loc 1 99 5 view .LVU31 149 003c 5B69 ldr r3, [r3, #20] 150 003e 03F40033 and r3, r3, #131072 151 0042 0293 str r3, [sp, #8] 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 152 .loc 1 99 5 view .LVU32 153 0044 029B ldr r3, [sp, #8] 154 .LBE5: 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 155 .loc 1 99 5 view .LVU33 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 156 .loc 1 104 5 view .LVU34 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 157 .loc 1 104 25 is_stmt 0 view .LVU35 158 0046 4FF4C053 mov r3, #6144 ARM GAS /tmp/ccdHkDFg.s page 6 159 004a 0393 str r3, [sp, #12] 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 160 .loc 1 105 5 is_stmt 1 view .LVU36 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 161 .loc 1 105 26 is_stmt 0 view .LVU37 162 004c 0223 movs r3, #2 163 004e 0493 str r3, [sp, #16] 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 164 .loc 1 106 5 is_stmt 1 view .LVU38 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 165 .loc 1 107 5 view .LVU39 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 166 .loc 1 107 27 is_stmt 0 view .LVU40 167 0050 0323 movs r3, #3 168 0052 0693 str r3, [sp, #24] 108:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 169 .loc 1 108 5 is_stmt 1 view .LVU41 108:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 170 .loc 1 108 31 is_stmt 0 view .LVU42 171 0054 0923 movs r3, #9 172 0056 0793 str r3, [sp, #28] 109:Core/Src/stm32f3xx_hal_msp.c **** 173 .loc 1 109 5 is_stmt 1 view .LVU43 174 0058 03A9 add r1, sp, #12 175 005a 4FF09040 mov r0, #1207959552 176 .LVL3: 109:Core/Src/stm32f3xx_hal_msp.c **** 177 .loc 1 109 5 is_stmt 0 view .LVU44 178 005e FFF7FEFF bl HAL_GPIO_Init 179 .LVL4: 180 .loc 1 116 1 view .LVU45 181 0062 D9E7 b .L5 182 .L10: 183 .align 2 184 .L9: 185 0064 00640040 .word 1073767424 186 .cfi_endproc 187 .LFE131: 189 .section .text.HAL_CAN_MspDeInit,"ax",%progbits 190 .align 1 191 .global HAL_CAN_MspDeInit 192 .syntax unified 193 .thumb 194 .thumb_func 196 HAL_CAN_MspDeInit: 197 .LVL5: 198 .LFB132: 117:Core/Src/stm32f3xx_hal_msp.c **** 118:Core/Src/stm32f3xx_hal_msp.c **** /** 119:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP De-Initialization 120:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 121:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer 122:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 123:Core/Src/stm32f3xx_hal_msp.c **** */ 124:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) 125:Core/Src/stm32f3xx_hal_msp.c **** { 199 .loc 1 125 1 is_stmt 1 view -0 ARM GAS /tmp/ccdHkDFg.s page 7 200 .cfi_startproc 201 @ args = 0, pretend = 0, frame = 0 202 @ frame_needed = 0, uses_anonymous_args = 0 203 .loc 1 125 1 is_stmt 0 view .LVU47 204 0000 08B5 push {r3, lr} 205 .cfi_def_cfa_offset 8 206 .cfi_offset 3, -8 207 .cfi_offset 14, -4 126:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN) 208 .loc 1 126 3 is_stmt 1 view .LVU48 209 .loc 1 126 10 is_stmt 0 view .LVU49 210 0002 0268 ldr r2, [r0] 211 .loc 1 126 5 view .LVU50 212 0004 074B ldr r3, .L15 213 0006 9A42 cmp r2, r3 214 0008 00D0 beq .L14 215 .LVL6: 216 .L11: 127:Core/Src/stm32f3xx_hal_msp.c **** { 128:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 0 */ 129:Core/Src/stm32f3xx_hal_msp.c **** 130:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 0 */ 131:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 132:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_DISABLE(); 133:Core/Src/stm32f3xx_hal_msp.c **** 134:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 135:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX 136:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX 137:Core/Src/stm32f3xx_hal_msp.c **** */ 138:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); 139:Core/Src/stm32f3xx_hal_msp.c **** 140:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */ 141:Core/Src/stm32f3xx_hal_msp.c **** 142:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 1 */ 143:Core/Src/stm32f3xx_hal_msp.c **** } 144:Core/Src/stm32f3xx_hal_msp.c **** 145:Core/Src/stm32f3xx_hal_msp.c **** } 217 .loc 1 145 1 view .LVU51 218 000a 08BD pop {r3, pc} 219 .LVL7: 220 .L14: 132:Core/Src/stm32f3xx_hal_msp.c **** 221 .loc 1 132 5 is_stmt 1 view .LVU52 222 000c 064A ldr r2, .L15+4 223 000e D369 ldr r3, [r2, #28] 224 0010 23F00073 bic r3, r3, #33554432 225 0014 D361 str r3, [r2, #28] 138:Core/Src/stm32f3xx_hal_msp.c **** 226 .loc 1 138 5 view .LVU53 227 0016 4FF4C051 mov r1, #6144 228 001a 4FF09040 mov r0, #1207959552 229 .LVL8: 138:Core/Src/stm32f3xx_hal_msp.c **** 230 .loc 1 138 5 is_stmt 0 view .LVU54 231 001e FFF7FEFF bl HAL_GPIO_DeInit 232 .LVL9: 233 .loc 1 145 1 view .LVU55 ARM GAS /tmp/ccdHkDFg.s page 8 234 0022 F2E7 b .L11 235 .L16: 236 .align 2 237 .L15: 238 0024 00640040 .word 1073767424 239 0028 00100240 .word 1073876992 240 .cfi_endproc 241 .LFE132: 243 .section .text.HAL_I2C_MspInit,"ax",%progbits 244 .align 1 245 .global HAL_I2C_MspInit 246 .syntax unified 247 .thumb 248 .thumb_func 250 HAL_I2C_MspInit: 251 .LVL10: 252 .LFB133: 146:Core/Src/stm32f3xx_hal_msp.c **** 147:Core/Src/stm32f3xx_hal_msp.c **** /** 148:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP Initialization 149:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 150:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer 151:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 152:Core/Src/stm32f3xx_hal_msp.c **** */ 153:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) 154:Core/Src/stm32f3xx_hal_msp.c **** { 253 .loc 1 154 1 is_stmt 1 view -0 254 .cfi_startproc 255 @ args = 0, pretend = 0, frame = 32 256 @ frame_needed = 0, uses_anonymous_args = 0 257 .loc 1 154 1 is_stmt 0 view .LVU57 258 0000 F0B5 push {r4, r5, r6, r7, lr} 259 .cfi_def_cfa_offset 20 260 .cfi_offset 4, -20 261 .cfi_offset 5, -16 262 .cfi_offset 6, -12 263 .cfi_offset 7, -8 264 .cfi_offset 14, -4 265 0002 89B0 sub sp, sp, #36 266 .cfi_def_cfa_offset 56 155:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 267 .loc 1 155 3 is_stmt 1 view .LVU58 268 .loc 1 155 20 is_stmt 0 view .LVU59 269 0004 0023 movs r3, #0 270 0006 0393 str r3, [sp, #12] 271 0008 0493 str r3, [sp, #16] 272 000a 0593 str r3, [sp, #20] 273 000c 0693 str r3, [sp, #24] 274 000e 0793 str r3, [sp, #28] 156:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1) 275 .loc 1 156 3 is_stmt 1 view .LVU60 276 .loc 1 156 10 is_stmt 0 view .LVU61 277 0010 0268 ldr r2, [r0] 278 .loc 1 156 5 view .LVU62 279 0012 1E4B ldr r3, .L21 280 0014 9A42 cmp r2, r3 281 0016 01D0 beq .L20 ARM GAS /tmp/ccdHkDFg.s page 9 282 .LVL11: 283 .L17: 157:Core/Src/stm32f3xx_hal_msp.c **** { 158:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 0 */ 159:Core/Src/stm32f3xx_hal_msp.c **** 160:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 0 */ 161:Core/Src/stm32f3xx_hal_msp.c **** 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 163:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 164:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 165:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL 166:Core/Src/stm32f3xx_hal_msp.c **** PB9 ------> I2C1_SDA 167:Core/Src/stm32f3xx_hal_msp.c **** */ 168:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_15; 169:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 172:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 173:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 174:Core/Src/stm32f3xx_hal_msp.c **** 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9; 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 179:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 180:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 181:Core/Src/stm32f3xx_hal_msp.c **** 182:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 183:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_ENABLE(); 184:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 185:Core/Src/stm32f3xx_hal_msp.c **** 186:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 1 */ 187:Core/Src/stm32f3xx_hal_msp.c **** } 188:Core/Src/stm32f3xx_hal_msp.c **** 189:Core/Src/stm32f3xx_hal_msp.c **** } 284 .loc 1 189 1 view .LVU63 285 0018 09B0 add sp, sp, #36 286 .cfi_remember_state 287 .cfi_def_cfa_offset 20 288 @ sp needed 289 001a F0BD pop {r4, r5, r6, r7, pc} 290 .LVL12: 291 .L20: 292 .cfi_restore_state 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 293 .loc 1 162 5 is_stmt 1 view .LVU64 294 .LBB6: 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 295 .loc 1 162 5 view .LVU65 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 296 .loc 1 162 5 view .LVU66 297 001c 1C4C ldr r4, .L21+4 298 001e 6369 ldr r3, [r4, #20] 299 0020 43F40033 orr r3, r3, #131072 300 0024 6361 str r3, [r4, #20] 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 301 .loc 1 162 5 view .LVU67 ARM GAS /tmp/ccdHkDFg.s page 10 302 0026 6369 ldr r3, [r4, #20] 303 0028 03F40033 and r3, r3, #131072 304 002c 0093 str r3, [sp] 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 305 .loc 1 162 5 view .LVU68 306 002e 009B ldr r3, [sp] 307 .LBE6: 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 308 .loc 1 162 5 view .LVU69 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 309 .loc 1 163 5 view .LVU70 310 .LBB7: 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 311 .loc 1 163 5 view .LVU71 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 312 .loc 1 163 5 view .LVU72 313 0030 6369 ldr r3, [r4, #20] 314 0032 43F48023 orr r3, r3, #262144 315 0036 6361 str r3, [r4, #20] 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 316 .loc 1 163 5 view .LVU73 317 0038 6369 ldr r3, [r4, #20] 318 003a 03F48023 and r3, r3, #262144 319 003e 0193 str r3, [sp, #4] 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 320 .loc 1 163 5 view .LVU74 321 0040 019B ldr r3, [sp, #4] 322 .LBE7: 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 323 .loc 1 163 5 view .LVU75 168:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 324 .loc 1 168 5 view .LVU76 168:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 325 .loc 1 168 25 is_stmt 0 view .LVU77 326 0042 4FF40043 mov r3, #32768 327 0046 0393 str r3, [sp, #12] 169:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 328 .loc 1 169 5 is_stmt 1 view .LVU78 169:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 329 .loc 1 169 26 is_stmt 0 view .LVU79 330 0048 1227 movs r7, #18 331 004a 0497 str r7, [sp, #16] 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 332 .loc 1 170 5 is_stmt 1 view .LVU80 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 333 .loc 1 171 5 view .LVU81 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 334 .loc 1 171 27 is_stmt 0 view .LVU82 335 004c 0326 movs r6, #3 336 004e 0696 str r6, [sp, #24] 172:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 337 .loc 1 172 5 is_stmt 1 view .LVU83 172:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 338 .loc 1 172 31 is_stmt 0 view .LVU84 339 0050 0425 movs r5, #4 340 0052 0795 str r5, [sp, #28] 173:Core/Src/stm32f3xx_hal_msp.c **** ARM GAS /tmp/ccdHkDFg.s page 11 341 .loc 1 173 5 is_stmt 1 view .LVU85 342 0054 03A9 add r1, sp, #12 343 0056 4FF09040 mov r0, #1207959552 344 .LVL13: 173:Core/Src/stm32f3xx_hal_msp.c **** 345 .loc 1 173 5 is_stmt 0 view .LVU86 346 005a FFF7FEFF bl HAL_GPIO_Init 347 .LVL14: 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 348 .loc 1 175 5 is_stmt 1 view .LVU87 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 349 .loc 1 175 25 is_stmt 0 view .LVU88 350 005e 4FF40073 mov r3, #512 351 0062 0393 str r3, [sp, #12] 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 352 .loc 1 176 5 is_stmt 1 view .LVU89 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 353 .loc 1 176 26 is_stmt 0 view .LVU90 354 0064 0497 str r7, [sp, #16] 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 355 .loc 1 177 5 is_stmt 1 view .LVU91 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 356 .loc 1 177 26 is_stmt 0 view .LVU92 357 0066 0023 movs r3, #0 358 0068 0593 str r3, [sp, #20] 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 359 .loc 1 178 5 is_stmt 1 view .LVU93 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 360 .loc 1 178 27 is_stmt 0 view .LVU94 361 006a 0696 str r6, [sp, #24] 179:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 362 .loc 1 179 5 is_stmt 1 view .LVU95 179:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 363 .loc 1 179 31 is_stmt 0 view .LVU96 364 006c 0795 str r5, [sp, #28] 180:Core/Src/stm32f3xx_hal_msp.c **** 365 .loc 1 180 5 is_stmt 1 view .LVU97 366 006e 03A9 add r1, sp, #12 367 0070 0848 ldr r0, .L21+8 368 0072 FFF7FEFF bl HAL_GPIO_Init 369 .LVL15: 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 370 .loc 1 183 5 view .LVU98 371 .LBB8: 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 372 .loc 1 183 5 view .LVU99 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 373 .loc 1 183 5 view .LVU100 374 0076 E369 ldr r3, [r4, #28] 375 0078 43F40013 orr r3, r3, #2097152 376 007c E361 str r3, [r4, #28] 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 377 .loc 1 183 5 view .LVU101 378 007e E369 ldr r3, [r4, #28] 379 0080 03F40013 and r3, r3, #2097152 380 0084 0293 str r3, [sp, #8] 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ ARM GAS /tmp/ccdHkDFg.s page 12 381 .loc 1 183 5 view .LVU102 382 0086 029B ldr r3, [sp, #8] 383 .LBE8: 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 384 .loc 1 183 5 discriminator 1 view .LVU103 385 .loc 1 189 1 is_stmt 0 view .LVU104 386 0088 C6E7 b .L17 387 .L22: 388 008a 00BF .align 2 389 .L21: 390 008c 00540040 .word 1073763328 391 0090 00100240 .word 1073876992 392 0094 00040048 .word 1207960576 393 .cfi_endproc 394 .LFE133: 396 .section .text.HAL_I2C_MspDeInit,"ax",%progbits 397 .align 1 398 .global HAL_I2C_MspDeInit 399 .syntax unified 400 .thumb 401 .thumb_func 403 HAL_I2C_MspDeInit: 404 .LVL16: 405 .LFB134: 190:Core/Src/stm32f3xx_hal_msp.c **** 191:Core/Src/stm32f3xx_hal_msp.c **** /** 192:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP De-Initialization 193:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 194:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer 195:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 196:Core/Src/stm32f3xx_hal_msp.c **** */ 197:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) 198:Core/Src/stm32f3xx_hal_msp.c **** { 406 .loc 1 198 1 is_stmt 1 view -0 407 .cfi_startproc 408 @ args = 0, pretend = 0, frame = 0 409 @ frame_needed = 0, uses_anonymous_args = 0 410 .loc 1 198 1 is_stmt 0 view .LVU106 411 0000 08B5 push {r3, lr} 412 .cfi_def_cfa_offset 8 413 .cfi_offset 3, -8 414 .cfi_offset 14, -4 199:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1) 415 .loc 1 199 3 is_stmt 1 view .LVU107 416 .loc 1 199 10 is_stmt 0 view .LVU108 417 0002 0268 ldr r2, [r0] 418 .loc 1 199 5 view .LVU109 419 0004 0A4B ldr r3, .L27 420 0006 9A42 cmp r2, r3 421 0008 00D0 beq .L26 422 .LVL17: 423 .L23: 200:Core/Src/stm32f3xx_hal_msp.c **** { 201:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */ 202:Core/Src/stm32f3xx_hal_msp.c **** 203:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 0 */ 204:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ ARM GAS /tmp/ccdHkDFg.s page 13 205:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_DISABLE(); 206:Core/Src/stm32f3xx_hal_msp.c **** 207:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 208:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL 209:Core/Src/stm32f3xx_hal_msp.c **** PB9 ------> I2C1_SDA 210:Core/Src/stm32f3xx_hal_msp.c **** */ 211:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15); 212:Core/Src/stm32f3xx_hal_msp.c **** 213:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_9); 214:Core/Src/stm32f3xx_hal_msp.c **** 215:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */ 216:Core/Src/stm32f3xx_hal_msp.c **** 217:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 1 */ 218:Core/Src/stm32f3xx_hal_msp.c **** } 219:Core/Src/stm32f3xx_hal_msp.c **** 220:Core/Src/stm32f3xx_hal_msp.c **** } 424 .loc 1 220 1 view .LVU110 425 000a 08BD pop {r3, pc} 426 .LVL18: 427 .L26: 205:Core/Src/stm32f3xx_hal_msp.c **** 428 .loc 1 205 5 is_stmt 1 view .LVU111 429 000c 094A ldr r2, .L27+4 430 000e D369 ldr r3, [r2, #28] 431 0010 23F40013 bic r3, r3, #2097152 432 0014 D361 str r3, [r2, #28] 211:Core/Src/stm32f3xx_hal_msp.c **** 433 .loc 1 211 5 view .LVU112 434 0016 4FF40041 mov r1, #32768 435 001a 4FF09040 mov r0, #1207959552 436 .LVL19: 211:Core/Src/stm32f3xx_hal_msp.c **** 437 .loc 1 211 5 is_stmt 0 view .LVU113 438 001e FFF7FEFF bl HAL_GPIO_DeInit 439 .LVL20: 213:Core/Src/stm32f3xx_hal_msp.c **** 440 .loc 1 213 5 is_stmt 1 view .LVU114 441 0022 4FF40071 mov r1, #512 442 0026 0448 ldr r0, .L27+8 443 0028 FFF7FEFF bl HAL_GPIO_DeInit 444 .LVL21: 445 .loc 1 220 1 is_stmt 0 view .LVU115 446 002c EDE7 b .L23 447 .L28: 448 002e 00BF .align 2 449 .L27: 450 0030 00540040 .word 1073763328 451 0034 00100240 .word 1073876992 452 0038 00040048 .word 1207960576 453 .cfi_endproc 454 .LFE134: 456 .section .text.HAL_SPI_MspInit,"ax",%progbits 457 .align 1 458 .global HAL_SPI_MspInit 459 .syntax unified 460 .thumb 461 .thumb_func ARM GAS /tmp/ccdHkDFg.s page 14 463 HAL_SPI_MspInit: 464 .LVL22: 465 .LFB135: 221:Core/Src/stm32f3xx_hal_msp.c **** 222:Core/Src/stm32f3xx_hal_msp.c **** /** 223:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP Initialization 224:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 225:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer 226:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 227:Core/Src/stm32f3xx_hal_msp.c **** */ 228:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) 229:Core/Src/stm32f3xx_hal_msp.c **** { 466 .loc 1 229 1 is_stmt 1 view -0 467 .cfi_startproc 468 @ args = 0, pretend = 0, frame = 32 469 @ frame_needed = 0, uses_anonymous_args = 0 470 .loc 1 229 1 is_stmt 0 view .LVU117 471 0000 00B5 push {lr} 472 .cfi_def_cfa_offset 4 473 .cfi_offset 14, -4 474 0002 89B0 sub sp, sp, #36 475 .cfi_def_cfa_offset 40 230:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 476 .loc 1 230 3 is_stmt 1 view .LVU118 477 .loc 1 230 20 is_stmt 0 view .LVU119 478 0004 0023 movs r3, #0 479 0006 0393 str r3, [sp, #12] 480 0008 0493 str r3, [sp, #16] 481 000a 0593 str r3, [sp, #20] 482 000c 0693 str r3, [sp, #24] 483 000e 0793 str r3, [sp, #28] 231:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI1) 484 .loc 1 231 3 is_stmt 1 view .LVU120 485 .loc 1 231 10 is_stmt 0 view .LVU121 486 0010 0268 ldr r2, [r0] 487 .loc 1 231 5 view .LVU122 488 0012 144B ldr r3, .L33 489 0014 9A42 cmp r2, r3 490 0016 02D0 beq .L32 491 .LVL23: 492 .L29: 232:Core/Src/stm32f3xx_hal_msp.c **** { 233:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspInit 0 */ 234:Core/Src/stm32f3xx_hal_msp.c **** 235:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspInit 0 */ 236:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 237:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI1_CLK_ENABLE(); 238:Core/Src/stm32f3xx_hal_msp.c **** 239:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 240:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 241:Core/Src/stm32f3xx_hal_msp.c **** PA4 ------> SPI1_NSS 242:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> SPI1_SCK 243:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> SPI1_MISO 244:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> SPI1_MOSI 245:Core/Src/stm32f3xx_hal_msp.c **** */ 246:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; 247:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; ARM GAS /tmp/ccdHkDFg.s page 15 248:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 249:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 250:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 251:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 252:Core/Src/stm32f3xx_hal_msp.c **** 253:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspInit 1 */ 254:Core/Src/stm32f3xx_hal_msp.c **** 255:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspInit 1 */ 256:Core/Src/stm32f3xx_hal_msp.c **** } 257:Core/Src/stm32f3xx_hal_msp.c **** 258:Core/Src/stm32f3xx_hal_msp.c **** } 493 .loc 1 258 1 view .LVU123 494 0018 09B0 add sp, sp, #36 495 .cfi_remember_state 496 .cfi_def_cfa_offset 4 497 @ sp needed 498 001a 5DF804FB ldr pc, [sp], #4 499 .LVL24: 500 .L32: 501 .cfi_restore_state 237:Core/Src/stm32f3xx_hal_msp.c **** 502 .loc 1 237 5 is_stmt 1 view .LVU124 503 .LBB9: 237:Core/Src/stm32f3xx_hal_msp.c **** 504 .loc 1 237 5 view .LVU125 237:Core/Src/stm32f3xx_hal_msp.c **** 505 .loc 1 237 5 view .LVU126 506 001e 03F56043 add r3, r3, #57344 507 0022 9A69 ldr r2, [r3, #24] 508 0024 42F48052 orr r2, r2, #4096 509 0028 9A61 str r2, [r3, #24] 237:Core/Src/stm32f3xx_hal_msp.c **** 510 .loc 1 237 5 view .LVU127 511 002a 9A69 ldr r2, [r3, #24] 512 002c 02F48052 and r2, r2, #4096 513 0030 0192 str r2, [sp, #4] 237:Core/Src/stm32f3xx_hal_msp.c **** 514 .loc 1 237 5 view .LVU128 515 0032 019A ldr r2, [sp, #4] 516 .LBE9: 237:Core/Src/stm32f3xx_hal_msp.c **** 517 .loc 1 237 5 view .LVU129 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 518 .loc 1 239 5 view .LVU130 519 .LBB10: 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 520 .loc 1 239 5 view .LVU131 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 521 .loc 1 239 5 view .LVU132 522 0034 5A69 ldr r2, [r3, #20] 523 0036 42F40032 orr r2, r2, #131072 524 003a 5A61 str r2, [r3, #20] 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 525 .loc 1 239 5 view .LVU133 526 003c 5B69 ldr r3, [r3, #20] 527 003e 03F40033 and r3, r3, #131072 528 0042 0293 str r3, [sp, #8] ARM GAS /tmp/ccdHkDFg.s page 16 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 529 .loc 1 239 5 view .LVU134 530 0044 029B ldr r3, [sp, #8] 531 .LBE10: 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 532 .loc 1 239 5 view .LVU135 246:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 533 .loc 1 246 5 view .LVU136 246:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 534 .loc 1 246 25 is_stmt 0 view .LVU137 535 0046 F023 movs r3, #240 536 0048 0393 str r3, [sp, #12] 247:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 537 .loc 1 247 5 is_stmt 1 view .LVU138 247:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 538 .loc 1 247 26 is_stmt 0 view .LVU139 539 004a 0223 movs r3, #2 540 004c 0493 str r3, [sp, #16] 248:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 541 .loc 1 248 5 is_stmt 1 view .LVU140 249:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 542 .loc 1 249 5 view .LVU141 249:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 543 .loc 1 249 27 is_stmt 0 view .LVU142 544 004e 0323 movs r3, #3 545 0050 0693 str r3, [sp, #24] 250:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 546 .loc 1 250 5 is_stmt 1 view .LVU143 250:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 547 .loc 1 250 31 is_stmt 0 view .LVU144 548 0052 0523 movs r3, #5 549 0054 0793 str r3, [sp, #28] 251:Core/Src/stm32f3xx_hal_msp.c **** 550 .loc 1 251 5 is_stmt 1 view .LVU145 551 0056 03A9 add r1, sp, #12 552 0058 4FF09040 mov r0, #1207959552 553 .LVL25: 251:Core/Src/stm32f3xx_hal_msp.c **** 554 .loc 1 251 5 is_stmt 0 view .LVU146 555 005c FFF7FEFF bl HAL_GPIO_Init 556 .LVL26: 557 .loc 1 258 1 view .LVU147 558 0060 DAE7 b .L29 559 .L34: 560 0062 00BF .align 2 561 .L33: 562 0064 00300140 .word 1073819648 563 .cfi_endproc 564 .LFE135: 566 .section .text.HAL_SPI_MspDeInit,"ax",%progbits 567 .align 1 568 .global HAL_SPI_MspDeInit 569 .syntax unified 570 .thumb 571 .thumb_func 573 HAL_SPI_MspDeInit: 574 .LVL27: ARM GAS /tmp/ccdHkDFg.s page 17 575 .LFB136: 259:Core/Src/stm32f3xx_hal_msp.c **** 260:Core/Src/stm32f3xx_hal_msp.c **** /** 261:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP De-Initialization 262:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 263:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer 264:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 265:Core/Src/stm32f3xx_hal_msp.c **** */ 266:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) 267:Core/Src/stm32f3xx_hal_msp.c **** { 576 .loc 1 267 1 is_stmt 1 view -0 577 .cfi_startproc 578 @ args = 0, pretend = 0, frame = 0 579 @ frame_needed = 0, uses_anonymous_args = 0 580 .loc 1 267 1 is_stmt 0 view .LVU149 581 0000 08B5 push {r3, lr} 582 .cfi_def_cfa_offset 8 583 .cfi_offset 3, -8 584 .cfi_offset 14, -4 268:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI1) 585 .loc 1 268 3 is_stmt 1 view .LVU150 586 .loc 1 268 10 is_stmt 0 view .LVU151 587 0002 0268 ldr r2, [r0] 588 .loc 1 268 5 view .LVU152 589 0004 074B ldr r3, .L39 590 0006 9A42 cmp r2, r3 591 0008 00D0 beq .L38 592 .LVL28: 593 .L35: 269:Core/Src/stm32f3xx_hal_msp.c **** { 270:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspDeInit 0 */ 271:Core/Src/stm32f3xx_hal_msp.c **** 272:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspDeInit 0 */ 273:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 274:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI1_CLK_DISABLE(); 275:Core/Src/stm32f3xx_hal_msp.c **** 276:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration 277:Core/Src/stm32f3xx_hal_msp.c **** PA4 ------> SPI1_NSS 278:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> SPI1_SCK 279:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> SPI1_MISO 280:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> SPI1_MOSI 281:Core/Src/stm32f3xx_hal_msp.c **** */ 282:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); 283:Core/Src/stm32f3xx_hal_msp.c **** 284:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspDeInit 1 */ 285:Core/Src/stm32f3xx_hal_msp.c **** 286:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspDeInit 1 */ 287:Core/Src/stm32f3xx_hal_msp.c **** } 288:Core/Src/stm32f3xx_hal_msp.c **** 289:Core/Src/stm32f3xx_hal_msp.c **** } 594 .loc 1 289 1 view .LVU153 595 000a 08BD pop {r3, pc} 596 .LVL29: 597 .L38: 274:Core/Src/stm32f3xx_hal_msp.c **** 598 .loc 1 274 5 is_stmt 1 view .LVU154 599 000c 064A ldr r2, .L39+4 ARM GAS /tmp/ccdHkDFg.s page 18 600 000e 9369 ldr r3, [r2, #24] 601 0010 23F48053 bic r3, r3, #4096 602 0014 9361 str r3, [r2, #24] 282:Core/Src/stm32f3xx_hal_msp.c **** 603 .loc 1 282 5 view .LVU155 604 0016 F021 movs r1, #240 605 0018 4FF09040 mov r0, #1207959552 606 .LVL30: 282:Core/Src/stm32f3xx_hal_msp.c **** 607 .loc 1 282 5 is_stmt 0 view .LVU156 608 001c FFF7FEFF bl HAL_GPIO_DeInit 609 .LVL31: 610 .loc 1 289 1 view .LVU157 611 0020 F3E7 b .L35 612 .L40: 613 0022 00BF .align 2 614 .L39: 615 0024 00300140 .word 1073819648 616 0028 00100240 .word 1073876992 617 .cfi_endproc 618 .LFE136: 620 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits 621 .align 1 622 .global HAL_TIM_PWM_MspInit 623 .syntax unified 624 .thumb 625 .thumb_func 627 HAL_TIM_PWM_MspInit: 628 .LVL32: 629 .LFB137: 290:Core/Src/stm32f3xx_hal_msp.c **** 291:Core/Src/stm32f3xx_hal_msp.c **** /** 292:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_PWM MSP Initialization 293:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 294:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_pwm: TIM_PWM handle pointer 295:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 296:Core/Src/stm32f3xx_hal_msp.c **** */ 297:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) 298:Core/Src/stm32f3xx_hal_msp.c **** { 630 .loc 1 298 1 is_stmt 1 view -0 631 .cfi_startproc 632 @ args = 0, pretend = 0, frame = 8 633 @ frame_needed = 0, uses_anonymous_args = 0 634 @ link register save eliminated. 635 .loc 1 298 1 is_stmt 0 view .LVU159 636 0000 82B0 sub sp, sp, #8 637 .cfi_def_cfa_offset 8 299:Core/Src/stm32f3xx_hal_msp.c **** if(htim_pwm->Instance==TIM1) 638 .loc 1 299 3 is_stmt 1 view .LVU160 639 .loc 1 299 14 is_stmt 0 view .LVU161 640 0002 0368 ldr r3, [r0] 641 .loc 1 299 5 view .LVU162 642 0004 0E4A ldr r2, .L47 643 0006 9342 cmp r3, r2 644 0008 04D0 beq .L45 300:Core/Src/stm32f3xx_hal_msp.c **** { 301:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 0 */ ARM GAS /tmp/ccdHkDFg.s page 19 302:Core/Src/stm32f3xx_hal_msp.c **** 303:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspInit 0 */ 304:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 305:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM1_CLK_ENABLE(); 306:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 307:Core/Src/stm32f3xx_hal_msp.c **** 308:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspInit 1 */ 309:Core/Src/stm32f3xx_hal_msp.c **** } 310:Core/Src/stm32f3xx_hal_msp.c **** else if(htim_pwm->Instance==TIM15) 645 .loc 1 310 8 is_stmt 1 view .LVU163 646 .loc 1 310 10 is_stmt 0 view .LVU164 647 000a 0E4A ldr r2, .L47+4 648 000c 9342 cmp r3, r2 649 000e 0CD0 beq .L46 650 .L41: 311:Core/Src/stm32f3xx_hal_msp.c **** { 312:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 0 */ 313:Core/Src/stm32f3xx_hal_msp.c **** 314:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspInit 0 */ 315:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 316:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM15_CLK_ENABLE(); 317:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ 318:Core/Src/stm32f3xx_hal_msp.c **** 319:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspInit 1 */ 320:Core/Src/stm32f3xx_hal_msp.c **** } 321:Core/Src/stm32f3xx_hal_msp.c **** 322:Core/Src/stm32f3xx_hal_msp.c **** } 651 .loc 1 322 1 view .LVU165 652 0010 02B0 add sp, sp, #8 653 .cfi_remember_state 654 .cfi_def_cfa_offset 0 655 @ sp needed 656 0012 7047 bx lr 657 .L45: 658 .cfi_restore_state 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 659 .loc 1 305 5 is_stmt 1 view .LVU166 660 .LBB11: 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 661 .loc 1 305 5 view .LVU167 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 662 .loc 1 305 5 view .LVU168 663 0014 0C4B ldr r3, .L47+8 664 0016 9A69 ldr r2, [r3, #24] 665 0018 42F40062 orr r2, r2, #2048 666 001c 9A61 str r2, [r3, #24] 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 667 .loc 1 305 5 view .LVU169 668 001e 9B69 ldr r3, [r3, #24] 669 0020 03F40063 and r3, r3, #2048 670 0024 0093 str r3, [sp] 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 671 .loc 1 305 5 view .LVU170 672 0026 009B ldr r3, [sp] 673 .LBE11: 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 674 .loc 1 305 5 view .LVU171 ARM GAS /tmp/ccdHkDFg.s page 20 675 0028 F2E7 b .L41 676 .L46: 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ 677 .loc 1 316 5 view .LVU172 678 .LBB12: 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ 679 .loc 1 316 5 view .LVU173 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ 680 .loc 1 316 5 view .LVU174 681 002a 074B ldr r3, .L47+8 682 002c 9A69 ldr r2, [r3, #24] 683 002e 42F48032 orr r2, r2, #65536 684 0032 9A61 str r2, [r3, #24] 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ 685 .loc 1 316 5 view .LVU175 686 0034 9B69 ldr r3, [r3, #24] 687 0036 03F48033 and r3, r3, #65536 688 003a 0193 str r3, [sp, #4] 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ 689 .loc 1 316 5 view .LVU176 690 003c 019B ldr r3, [sp, #4] 691 .LBE12: 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ 692 .loc 1 316 5 discriminator 1 view .LVU177 693 .loc 1 322 1 is_stmt 0 view .LVU178 694 003e E7E7 b .L41 695 .L48: 696 .align 2 697 .L47: 698 0040 002C0140 .word 1073818624 699 0044 00400140 .word 1073823744 700 0048 00100240 .word 1073876992 701 .cfi_endproc 702 .LFE137: 704 .section .text.HAL_TIM_MspPostInit,"ax",%progbits 705 .align 1 706 .global HAL_TIM_MspPostInit 707 .syntax unified 708 .thumb 709 .thumb_func 711 HAL_TIM_MspPostInit: 712 .LVL33: 713 .LFB138: 323:Core/Src/stm32f3xx_hal_msp.c **** 324:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) 325:Core/Src/stm32f3xx_hal_msp.c **** { 714 .loc 1 325 1 is_stmt 1 view -0 715 .cfi_startproc 716 @ args = 0, pretend = 0, frame = 32 717 @ frame_needed = 0, uses_anonymous_args = 0 718 .loc 1 325 1 is_stmt 0 view .LVU180 719 0000 00B5 push {lr} 720 .cfi_def_cfa_offset 4 721 .cfi_offset 14, -4 722 0002 89B0 sub sp, sp, #36 723 .cfi_def_cfa_offset 40 326:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; ARM GAS /tmp/ccdHkDFg.s page 21 724 .loc 1 326 3 is_stmt 1 view .LVU181 725 .loc 1 326 20 is_stmt 0 view .LVU182 726 0004 0023 movs r3, #0 727 0006 0393 str r3, [sp, #12] 728 0008 0493 str r3, [sp, #16] 729 000a 0593 str r3, [sp, #20] 730 000c 0693 str r3, [sp, #24] 731 000e 0793 str r3, [sp, #28] 327:Core/Src/stm32f3xx_hal_msp.c **** if(htim->Instance==TIM1) 732 .loc 1 327 3 is_stmt 1 view .LVU183 733 .loc 1 327 10 is_stmt 0 view .LVU184 734 0010 0368 ldr r3, [r0] 735 .loc 1 327 5 view .LVU185 736 0012 1A4A ldr r2, .L55 737 0014 9342 cmp r3, r2 738 0016 05D0 beq .L53 328:Core/Src/stm32f3xx_hal_msp.c **** { 329:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 0 */ 330:Core/Src/stm32f3xx_hal_msp.c **** 331:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspPostInit 0 */ 332:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 333:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration 334:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> TIM1_CH3N 335:Core/Src/stm32f3xx_hal_msp.c **** */ 336:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_15; 337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 338:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 339:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 340:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_TIM1; 341:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 342:Core/Src/stm32f3xx_hal_msp.c **** 343:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 1 */ 344:Core/Src/stm32f3xx_hal_msp.c **** 345:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspPostInit 1 */ 346:Core/Src/stm32f3xx_hal_msp.c **** } 347:Core/Src/stm32f3xx_hal_msp.c **** else if(htim->Instance==TIM15) 739 .loc 1 347 8 is_stmt 1 view .LVU186 740 .loc 1 347 10 is_stmt 0 view .LVU187 741 0018 194A ldr r2, .L55+4 742 001a 9342 cmp r3, r2 743 001c 18D0 beq .L54 744 .LVL34: 745 .L49: 348:Core/Src/stm32f3xx_hal_msp.c **** { 349:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspPostInit 0 */ 350:Core/Src/stm32f3xx_hal_msp.c **** 351:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspPostInit 0 */ 352:Core/Src/stm32f3xx_hal_msp.c **** 353:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 354:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration 355:Core/Src/stm32f3xx_hal_msp.c **** PA2 ------> TIM15_CH1 356:Core/Src/stm32f3xx_hal_msp.c **** PA3 ------> TIM15_CH2 357:Core/Src/stm32f3xx_hal_msp.c **** */ 358:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = PWM_PG_FAN1_Pin|PWM_PG_FAN2_Pin; 359:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 360:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 361:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; ARM GAS /tmp/ccdHkDFg.s page 22 362:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_TIM15; 363:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 364:Core/Src/stm32f3xx_hal_msp.c **** 365:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspPostInit 1 */ 366:Core/Src/stm32f3xx_hal_msp.c **** 367:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspPostInit 1 */ 368:Core/Src/stm32f3xx_hal_msp.c **** } 369:Core/Src/stm32f3xx_hal_msp.c **** 370:Core/Src/stm32f3xx_hal_msp.c **** } 746 .loc 1 370 1 view .LVU188 747 001e 09B0 add sp, sp, #36 748 .cfi_remember_state 749 .cfi_def_cfa_offset 4 750 @ sp needed 751 0020 5DF804FB ldr pc, [sp], #4 752 .LVL35: 753 .L53: 754 .cfi_restore_state 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration 755 .loc 1 332 5 is_stmt 1 view .LVU189 756 .LBB13: 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration 757 .loc 1 332 5 view .LVU190 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration 758 .loc 1 332 5 view .LVU191 759 0024 174B ldr r3, .L55+8 760 0026 5A69 ldr r2, [r3, #20] 761 0028 42F48022 orr r2, r2, #262144 762 002c 5A61 str r2, [r3, #20] 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration 763 .loc 1 332 5 view .LVU192 764 002e 5B69 ldr r3, [r3, #20] 765 0030 03F48023 and r3, r3, #262144 766 0034 0193 str r3, [sp, #4] 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration 767 .loc 1 332 5 view .LVU193 768 0036 019B ldr r3, [sp, #4] 769 .LBE13: 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration 770 .loc 1 332 5 view .LVU194 336:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 771 .loc 1 336 5 view .LVU195 336:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 772 .loc 1 336 25 is_stmt 0 view .LVU196 773 0038 4FF40043 mov r3, #32768 774 003c 0393 str r3, [sp, #12] 337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 775 .loc 1 337 5 is_stmt 1 view .LVU197 337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 776 .loc 1 337 26 is_stmt 0 view .LVU198 777 003e 0223 movs r3, #2 778 0040 0493 str r3, [sp, #16] 338:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 779 .loc 1 338 5 is_stmt 1 view .LVU199 339:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_TIM1; 780 .loc 1 339 5 view .LVU200 340:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); ARM GAS /tmp/ccdHkDFg.s page 23 781 .loc 1 340 5 view .LVU201 340:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 782 .loc 1 340 31 is_stmt 0 view .LVU202 783 0042 0423 movs r3, #4 784 0044 0793 str r3, [sp, #28] 341:Core/Src/stm32f3xx_hal_msp.c **** 785 .loc 1 341 5 is_stmt 1 view .LVU203 786 0046 03A9 add r1, sp, #12 787 0048 0F48 ldr r0, .L55+12 788 .LVL36: 341:Core/Src/stm32f3xx_hal_msp.c **** 789 .loc 1 341 5 is_stmt 0 view .LVU204 790 004a FFF7FEFF bl HAL_GPIO_Init 791 .LVL37: 792 004e E6E7 b .L49 793 .LVL38: 794 .L54: 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration 795 .loc 1 353 5 is_stmt 1 view .LVU205 796 .LBB14: 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration 797 .loc 1 353 5 view .LVU206 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration 798 .loc 1 353 5 view .LVU207 799 0050 0C4B ldr r3, .L55+8 800 0052 5A69 ldr r2, [r3, #20] 801 0054 42F40032 orr r2, r2, #131072 802 0058 5A61 str r2, [r3, #20] 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration 803 .loc 1 353 5 view .LVU208 804 005a 5B69 ldr r3, [r3, #20] 805 005c 03F40033 and r3, r3, #131072 806 0060 0293 str r3, [sp, #8] 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration 807 .loc 1 353 5 view .LVU209 808 0062 029B ldr r3, [sp, #8] 809 .LBE14: 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration 810 .loc 1 353 5 view .LVU210 358:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 811 .loc 1 358 5 view .LVU211 358:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 812 .loc 1 358 25 is_stmt 0 view .LVU212 813 0064 0C23 movs r3, #12 814 0066 0393 str r3, [sp, #12] 359:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 815 .loc 1 359 5 is_stmt 1 view .LVU213 359:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 816 .loc 1 359 26 is_stmt 0 view .LVU214 817 0068 0223 movs r3, #2 818 006a 0493 str r3, [sp, #16] 360:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 819 .loc 1 360 5 is_stmt 1 view .LVU215 361:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_TIM15; 820 .loc 1 361 5 view .LVU216 362:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 821 .loc 1 362 5 view .LVU217 ARM GAS /tmp/ccdHkDFg.s page 24 362:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 822 .loc 1 362 31 is_stmt 0 view .LVU218 823 006c 0923 movs r3, #9 824 006e 0793 str r3, [sp, #28] 363:Core/Src/stm32f3xx_hal_msp.c **** 825 .loc 1 363 5 is_stmt 1 view .LVU219 826 0070 03A9 add r1, sp, #12 827 0072 4FF09040 mov r0, #1207959552 828 .LVL39: 363:Core/Src/stm32f3xx_hal_msp.c **** 829 .loc 1 363 5 is_stmt 0 view .LVU220 830 0076 FFF7FEFF bl HAL_GPIO_Init 831 .LVL40: 832 .loc 1 370 1 view .LVU221 833 007a D0E7 b .L49 834 .L56: 835 .align 2 836 .L55: 837 007c 002C0140 .word 1073818624 838 0080 00400140 .word 1073823744 839 0084 00100240 .word 1073876992 840 0088 00040048 .word 1207960576 841 .cfi_endproc 842 .LFE138: 844 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits 845 .align 1 846 .global HAL_TIM_PWM_MspDeInit 847 .syntax unified 848 .thumb 849 .thumb_func 851 HAL_TIM_PWM_MspDeInit: 852 .LVL41: 853 .LFB139: 371:Core/Src/stm32f3xx_hal_msp.c **** /** 372:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_PWM MSP De-Initialization 373:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 374:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_pwm: TIM_PWM handle pointer 375:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 376:Core/Src/stm32f3xx_hal_msp.c **** */ 377:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm) 378:Core/Src/stm32f3xx_hal_msp.c **** { 854 .loc 1 378 1 is_stmt 1 view -0 855 .cfi_startproc 856 @ args = 0, pretend = 0, frame = 0 857 @ frame_needed = 0, uses_anonymous_args = 0 858 @ link register save eliminated. 379:Core/Src/stm32f3xx_hal_msp.c **** if(htim_pwm->Instance==TIM1) 859 .loc 1 379 3 view .LVU223 860 .loc 1 379 14 is_stmt 0 view .LVU224 861 0000 0368 ldr r3, [r0] 862 .loc 1 379 5 view .LVU225 863 0002 0A4A ldr r2, .L62 864 0004 9342 cmp r3, r2 865 0006 03D0 beq .L60 380:Core/Src/stm32f3xx_hal_msp.c **** { 381:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 0 */ 382:Core/Src/stm32f3xx_hal_msp.c **** ARM GAS /tmp/ccdHkDFg.s page 25 383:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspDeInit 0 */ 384:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 385:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM1_CLK_DISABLE(); 386:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */ 387:Core/Src/stm32f3xx_hal_msp.c **** 388:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspDeInit 1 */ 389:Core/Src/stm32f3xx_hal_msp.c **** } 390:Core/Src/stm32f3xx_hal_msp.c **** else if(htim_pwm->Instance==TIM15) 866 .loc 1 390 8 is_stmt 1 view .LVU226 867 .loc 1 390 10 is_stmt 0 view .LVU227 868 0008 094A ldr r2, .L62+4 869 000a 9342 cmp r3, r2 870 000c 07D0 beq .L61 871 .L57: 391:Core/Src/stm32f3xx_hal_msp.c **** { 392:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspDeInit 0 */ 393:Core/Src/stm32f3xx_hal_msp.c **** 394:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspDeInit 0 */ 395:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 396:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM15_CLK_DISABLE(); 397:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspDeInit 1 */ 398:Core/Src/stm32f3xx_hal_msp.c **** 399:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspDeInit 1 */ 400:Core/Src/stm32f3xx_hal_msp.c **** } 401:Core/Src/stm32f3xx_hal_msp.c **** 402:Core/Src/stm32f3xx_hal_msp.c **** } 872 .loc 1 402 1 view .LVU228 873 000e 7047 bx lr 874 .L60: 385:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */ 875 .loc 1 385 5 is_stmt 1 view .LVU229 876 0010 02F56442 add r2, r2, #58368 877 0014 9369 ldr r3, [r2, #24] 878 0016 23F40063 bic r3, r3, #2048 879 001a 9361 str r3, [r2, #24] 880 001c 7047 bx lr 881 .L61: 396:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspDeInit 1 */ 882 .loc 1 396 5 view .LVU230 883 001e 02F55042 add r2, r2, #53248 884 0022 9369 ldr r3, [r2, #24] 885 0024 23F48033 bic r3, r3, #65536 886 0028 9361 str r3, [r2, #24] 887 .loc 1 402 1 is_stmt 0 view .LVU231 888 002a F0E7 b .L57 889 .L63: 890 .align 2 891 .L62: 892 002c 002C0140 .word 1073818624 893 0030 00400140 .word 1073823744 894 .cfi_endproc 895 .LFE139: 897 .section .text.HAL_UART_MspInit,"ax",%progbits 898 .align 1 899 .global HAL_UART_MspInit 900 .syntax unified 901 .thumb ARM GAS /tmp/ccdHkDFg.s page 26 902 .thumb_func 904 HAL_UART_MspInit: 905 .LVL42: 906 .LFB140: 403:Core/Src/stm32f3xx_hal_msp.c **** 404:Core/Src/stm32f3xx_hal_msp.c **** /** 405:Core/Src/stm32f3xx_hal_msp.c **** * @brief UART MSP Initialization 406:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 407:Core/Src/stm32f3xx_hal_msp.c **** * @param huart: UART handle pointer 408:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 409:Core/Src/stm32f3xx_hal_msp.c **** */ 410:Core/Src/stm32f3xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart) 411:Core/Src/stm32f3xx_hal_msp.c **** { 907 .loc 1 411 1 is_stmt 1 view -0 908 .cfi_startproc 909 @ args = 0, pretend = 0, frame = 32 910 @ frame_needed = 0, uses_anonymous_args = 0 911 .loc 1 411 1 is_stmt 0 view .LVU233 912 0000 00B5 push {lr} 913 .cfi_def_cfa_offset 4 914 .cfi_offset 14, -4 915 0002 89B0 sub sp, sp, #36 916 .cfi_def_cfa_offset 40 412:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 917 .loc 1 412 3 is_stmt 1 view .LVU234 918 .loc 1 412 20 is_stmt 0 view .LVU235 919 0004 0023 movs r3, #0 920 0006 0393 str r3, [sp, #12] 921 0008 0493 str r3, [sp, #16] 922 000a 0593 str r3, [sp, #20] 923 000c 0693 str r3, [sp, #24] 924 000e 0793 str r3, [sp, #28] 413:Core/Src/stm32f3xx_hal_msp.c **** if(huart->Instance==USART1) 925 .loc 1 413 3 is_stmt 1 view .LVU236 926 .loc 1 413 11 is_stmt 0 view .LVU237 927 0010 0268 ldr r2, [r0] 928 .loc 1 413 5 view .LVU238 929 0012 134B ldr r3, .L68 930 0014 9A42 cmp r2, r3 931 0016 02D0 beq .L67 932 .LVL43: 933 .L64: 414:Core/Src/stm32f3xx_hal_msp.c **** { 415:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 0 */ 416:Core/Src/stm32f3xx_hal_msp.c **** 417:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspInit 0 */ 418:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 419:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_USART1_CLK_ENABLE(); 420:Core/Src/stm32f3xx_hal_msp.c **** 421:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 422:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 423:Core/Src/stm32f3xx_hal_msp.c **** PB6 ------> USART1_TX 424:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> USART1_RX 425:Core/Src/stm32f3xx_hal_msp.c **** */ 426:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 427:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 428:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; ARM GAS /tmp/ccdHkDFg.s page 27 429:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 430:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 431:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 432:Core/Src/stm32f3xx_hal_msp.c **** 433:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */ 434:Core/Src/stm32f3xx_hal_msp.c **** 435:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspInit 1 */ 436:Core/Src/stm32f3xx_hal_msp.c **** } 437:Core/Src/stm32f3xx_hal_msp.c **** 438:Core/Src/stm32f3xx_hal_msp.c **** } 934 .loc 1 438 1 view .LVU239 935 0018 09B0 add sp, sp, #36 936 .cfi_remember_state 937 .cfi_def_cfa_offset 4 938 @ sp needed 939 001a 5DF804FB ldr pc, [sp], #4 940 .LVL44: 941 .L67: 942 .cfi_restore_state 419:Core/Src/stm32f3xx_hal_msp.c **** 943 .loc 1 419 5 is_stmt 1 view .LVU240 944 .LBB15: 419:Core/Src/stm32f3xx_hal_msp.c **** 945 .loc 1 419 5 view .LVU241 419:Core/Src/stm32f3xx_hal_msp.c **** 946 .loc 1 419 5 view .LVU242 947 001e 03F55843 add r3, r3, #55296 948 0022 9A69 ldr r2, [r3, #24] 949 0024 42F48042 orr r2, r2, #16384 950 0028 9A61 str r2, [r3, #24] 419:Core/Src/stm32f3xx_hal_msp.c **** 951 .loc 1 419 5 view .LVU243 952 002a 9A69 ldr r2, [r3, #24] 953 002c 02F48042 and r2, r2, #16384 954 0030 0192 str r2, [sp, #4] 419:Core/Src/stm32f3xx_hal_msp.c **** 955 .loc 1 419 5 view .LVU244 956 0032 019A ldr r2, [sp, #4] 957 .LBE15: 419:Core/Src/stm32f3xx_hal_msp.c **** 958 .loc 1 419 5 view .LVU245 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 959 .loc 1 421 5 view .LVU246 960 .LBB16: 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 961 .loc 1 421 5 view .LVU247 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 962 .loc 1 421 5 view .LVU248 963 0034 5A69 ldr r2, [r3, #20] 964 0036 42F48022 orr r2, r2, #262144 965 003a 5A61 str r2, [r3, #20] 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 966 .loc 1 421 5 view .LVU249 967 003c 5B69 ldr r3, [r3, #20] 968 003e 03F48023 and r3, r3, #262144 969 0042 0293 str r3, [sp, #8] 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration ARM GAS /tmp/ccdHkDFg.s page 28 970 .loc 1 421 5 view .LVU250 971 0044 029B ldr r3, [sp, #8] 972 .LBE16: 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 973 .loc 1 421 5 view .LVU251 426:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 974 .loc 1 426 5 view .LVU252 426:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 975 .loc 1 426 25 is_stmt 0 view .LVU253 976 0046 C023 movs r3, #192 977 0048 0393 str r3, [sp, #12] 427:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 978 .loc 1 427 5 is_stmt 1 view .LVU254 427:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 979 .loc 1 427 26 is_stmt 0 view .LVU255 980 004a 0223 movs r3, #2 981 004c 0493 str r3, [sp, #16] 428:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 982 .loc 1 428 5 is_stmt 1 view .LVU256 429:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 983 .loc 1 429 5 view .LVU257 429:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 984 .loc 1 429 27 is_stmt 0 view .LVU258 985 004e 0323 movs r3, #3 986 0050 0693 str r3, [sp, #24] 430:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 987 .loc 1 430 5 is_stmt 1 view .LVU259 430:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 988 .loc 1 430 31 is_stmt 0 view .LVU260 989 0052 0723 movs r3, #7 990 0054 0793 str r3, [sp, #28] 431:Core/Src/stm32f3xx_hal_msp.c **** 991 .loc 1 431 5 is_stmt 1 view .LVU261 992 0056 03A9 add r1, sp, #12 993 0058 0248 ldr r0, .L68+4 994 .LVL45: 431:Core/Src/stm32f3xx_hal_msp.c **** 995 .loc 1 431 5 is_stmt 0 view .LVU262 996 005a FFF7FEFF bl HAL_GPIO_Init 997 .LVL46: 998 .loc 1 438 1 view .LVU263 999 005e DBE7 b .L64 1000 .L69: 1001 .align 2 1002 .L68: 1003 0060 00380140 .word 1073821696 1004 0064 00040048 .word 1207960576 1005 .cfi_endproc 1006 .LFE140: 1008 .section .text.HAL_UART_MspDeInit,"ax",%progbits 1009 .align 1 1010 .global HAL_UART_MspDeInit 1011 .syntax unified 1012 .thumb 1013 .thumb_func 1015 HAL_UART_MspDeInit: 1016 .LVL47: ARM GAS /tmp/ccdHkDFg.s page 29 1017 .LFB141: 439:Core/Src/stm32f3xx_hal_msp.c **** 440:Core/Src/stm32f3xx_hal_msp.c **** /** 441:Core/Src/stm32f3xx_hal_msp.c **** * @brief UART MSP De-Initialization 442:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 443:Core/Src/stm32f3xx_hal_msp.c **** * @param huart: UART handle pointer 444:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 445:Core/Src/stm32f3xx_hal_msp.c **** */ 446:Core/Src/stm32f3xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 447:Core/Src/stm32f3xx_hal_msp.c **** { 1018 .loc 1 447 1 is_stmt 1 view -0 1019 .cfi_startproc 1020 @ args = 0, pretend = 0, frame = 0 1021 @ frame_needed = 0, uses_anonymous_args = 0 1022 .loc 1 447 1 is_stmt 0 view .LVU265 1023 0000 08B5 push {r3, lr} 1024 .cfi_def_cfa_offset 8 1025 .cfi_offset 3, -8 1026 .cfi_offset 14, -4 448:Core/Src/stm32f3xx_hal_msp.c **** if(huart->Instance==USART1) 1027 .loc 1 448 3 is_stmt 1 view .LVU266 1028 .loc 1 448 11 is_stmt 0 view .LVU267 1029 0002 0268 ldr r2, [r0] 1030 .loc 1 448 5 view .LVU268 1031 0004 064B ldr r3, .L74 1032 0006 9A42 cmp r2, r3 1033 0008 00D0 beq .L73 1034 .LVL48: 1035 .L70: 449:Core/Src/stm32f3xx_hal_msp.c **** { 450:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 0 */ 451:Core/Src/stm32f3xx_hal_msp.c **** 452:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 0 */ 453:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 454:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_USART1_CLK_DISABLE(); 455:Core/Src/stm32f3xx_hal_msp.c **** 456:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 457:Core/Src/stm32f3xx_hal_msp.c **** PB6 ------> USART1_TX 458:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> USART1_RX 459:Core/Src/stm32f3xx_hal_msp.c **** */ 460:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7); 461:Core/Src/stm32f3xx_hal_msp.c **** 462:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */ 463:Core/Src/stm32f3xx_hal_msp.c **** 464:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 1 */ 465:Core/Src/stm32f3xx_hal_msp.c **** } 466:Core/Src/stm32f3xx_hal_msp.c **** 467:Core/Src/stm32f3xx_hal_msp.c **** } 1036 .loc 1 467 1 view .LVU269 1037 000a 08BD pop {r3, pc} 1038 .LVL49: 1039 .L73: 454:Core/Src/stm32f3xx_hal_msp.c **** 1040 .loc 1 454 5 is_stmt 1 view .LVU270 1041 000c 054A ldr r2, .L74+4 1042 000e 9369 ldr r3, [r2, #24] 1043 0010 23F48043 bic r3, r3, #16384 ARM GAS /tmp/ccdHkDFg.s page 30 1044 0014 9361 str r3, [r2, #24] 460:Core/Src/stm32f3xx_hal_msp.c **** 1045 .loc 1 460 5 view .LVU271 1046 0016 C021 movs r1, #192 1047 0018 0348 ldr r0, .L74+8 1048 .LVL50: 460:Core/Src/stm32f3xx_hal_msp.c **** 1049 .loc 1 460 5 is_stmt 0 view .LVU272 1050 001a FFF7FEFF bl HAL_GPIO_DeInit 1051 .LVL51: 1052 .loc 1 467 1 view .LVU273 1053 001e F4E7 b .L70 1054 .L75: 1055 .align 2 1056 .L74: 1057 0020 00380140 .word 1073821696 1058 0024 00100240 .word 1073876992 1059 0028 00040048 .word 1207960576 1060 .cfi_endproc 1061 .LFE141: 1063 .text 1064 .Letext0: 1065 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod 1066 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod 1067 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 1068 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 1069 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 1070 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" 1071 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 1072 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" 1073 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" 1074 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" 1075 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" 1076 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" ARM GAS /tmp/ccdHkDFg.s page 31 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_msp.c /tmp/ccdHkDFg.s:21 .text.HAL_MspInit:00000000 $t /tmp/ccdHkDFg.s:27 .text.HAL_MspInit:00000000 HAL_MspInit /tmp/ccdHkDFg.s:75 .text.HAL_MspInit:0000002c $d /tmp/ccdHkDFg.s:80 .text.HAL_CAN_MspInit:00000000 $t /tmp/ccdHkDFg.s:86 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit /tmp/ccdHkDFg.s:185 .text.HAL_CAN_MspInit:00000064 $d /tmp/ccdHkDFg.s:190 .text.HAL_CAN_MspDeInit:00000000 $t /tmp/ccdHkDFg.s:196 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit /tmp/ccdHkDFg.s:238 .text.HAL_CAN_MspDeInit:00000024 $d /tmp/ccdHkDFg.s:244 .text.HAL_I2C_MspInit:00000000 $t /tmp/ccdHkDFg.s:250 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit /tmp/ccdHkDFg.s:390 .text.HAL_I2C_MspInit:0000008c $d /tmp/ccdHkDFg.s:397 .text.HAL_I2C_MspDeInit:00000000 $t /tmp/ccdHkDFg.s:403 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit /tmp/ccdHkDFg.s:450 .text.HAL_I2C_MspDeInit:00000030 $d /tmp/ccdHkDFg.s:457 .text.HAL_SPI_MspInit:00000000 $t /tmp/ccdHkDFg.s:463 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit /tmp/ccdHkDFg.s:562 .text.HAL_SPI_MspInit:00000064 $d /tmp/ccdHkDFg.s:567 .text.HAL_SPI_MspDeInit:00000000 $t /tmp/ccdHkDFg.s:573 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit /tmp/ccdHkDFg.s:615 .text.HAL_SPI_MspDeInit:00000024 $d /tmp/ccdHkDFg.s:621 .text.HAL_TIM_PWM_MspInit:00000000 $t /tmp/ccdHkDFg.s:627 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit /tmp/ccdHkDFg.s:698 .text.HAL_TIM_PWM_MspInit:00000040 $d /tmp/ccdHkDFg.s:705 .text.HAL_TIM_MspPostInit:00000000 $t /tmp/ccdHkDFg.s:711 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit /tmp/ccdHkDFg.s:837 .text.HAL_TIM_MspPostInit:0000007c $d /tmp/ccdHkDFg.s:845 .text.HAL_TIM_PWM_MspDeInit:00000000 $t /tmp/ccdHkDFg.s:851 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit /tmp/ccdHkDFg.s:892 .text.HAL_TIM_PWM_MspDeInit:0000002c $d /tmp/ccdHkDFg.s:898 .text.HAL_UART_MspInit:00000000 $t /tmp/ccdHkDFg.s:904 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit /tmp/ccdHkDFg.s:1003 .text.HAL_UART_MspInit:00000060 $d /tmp/ccdHkDFg.s:1009 .text.HAL_UART_MspDeInit:00000000 $t /tmp/ccdHkDFg.s:1015 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit /tmp/ccdHkDFg.s:1057 .text.HAL_UART_MspDeInit:00000020 $d UNDEFINED SYMBOLS HAL_GPIO_Init HAL_GPIO_DeInit