ARM GAS /tmp/ccb21fMF.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 6 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_pwr_ex.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c" 20 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits 21 .align 1 22 .global HAL_PWR_ConfigPVD 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_PWR_ConfigPVD: 28 .LFB130: 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @file stm32f3xx_hal_pwr_ex.c 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @author MCD Application Team 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral: 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @attention 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * Copyright (c) 2016 STMicroelectronics. 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * All rights reserved. 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * in the root directory of this software component. 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #include "stm32f3xx_hal.h" 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ARM GAS /tmp/ccb21fMF.s page 2 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief PWREx HAL module driver 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Private_Constants PWR Extended Private Constants 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_MODE_IT (0x00010000U) 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_MODE_EVT (0x00020000U) 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_RISING_EDGE (0x00000001U) 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_FALLING_EDGE (0x00000002U) 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @} 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Exported functions ---------------------------------------------------------*/ 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** @verbatim 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** =============================================================================== 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ##### Peripheral Extended control functions ##### 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** =============================================================================== 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** PVD configuration (present on all other devices than STM32F3x8 devices) *** 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ========================= 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** -@- PVD is not available on STM32F3x8 Product Line 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** Voltage regulator *** 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ========================= 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The voltage regulator is always enabled after Reset. It works in three different 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** modes. 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Run mode, the regulator supplies full power to the 1.8V domain (core, memories 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** and digital peripherals). ARM GAS /tmp/ccb21fMF.s page 3 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Stop mode, the regulator supplies low power to the 1.8V domain, preserving 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** contents of registers and SRAM. 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Stop mode, the regulator is powered off. The contents of the registers and SRAM 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** are lost except for the Standby circuitry and the Backup Domain. 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** Note: in the STM32F3x8xx devices, the voltage regulator is bypassed and the 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** microcontroller must be powered from a nominal VDD = 1.8V +/-8U% voltage. 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** SDADC power configuration *** 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ================================ 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) On STM32F373xC/STM32F378xx devices, there are up to 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 3 SDADC instances that can be enabled/disabled. 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** @endverbatim 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || \ 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F302xC) || defined(STM32F303xC) || \ 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F303x8) || defined(STM32F334x8) || \ 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F301x8) || defined(STM32F302x8) || \ 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F373xC) 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * information for the PVD. 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * more details about the voltage threshold corresponding to each 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * detection level. 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 29 .loc 1 129 1 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 1, uses_anonymous_args = 0 33 @ link register save eliminated. 34 0000 80B4 push {r7} 35 .cfi_def_cfa_offset 4 36 .cfi_offset 7, -4 37 0002 83B0 sub sp, sp, #12 38 .cfi_def_cfa_offset 16 39 0004 00AF add r7, sp, #0 40 .cfi_def_cfa_register 7 41 0006 7860 str r0, [r7, #4] 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check the parameters */ 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); ARM GAS /tmp/ccb21fMF.s page 4 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Set PLS[7:5] bits according to PVDLevel value */ 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); 42 .loc 1 135 3 43 0008 2B4B ldr r3, .L7 44 000a 1B68 ldr r3, [r3] 45 000c 23F0E002 bic r2, r3, #224 46 0010 7B68 ldr r3, [r7, #4] 47 0012 1B68 ldr r3, [r3] 48 0014 2849 ldr r1, .L7 49 0016 1343 orrs r3, r3, r2 50 0018 0B60 str r3, [r1] 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); 51 .loc 1 138 3 52 001a 284B ldr r3, .L7+4 53 001c 5B68 ldr r3, [r3, #4] 54 001e 274A ldr r2, .L7+4 55 0020 23F48033 bic r3, r3, #65536 56 0024 5360 str r3, [r2, #4] 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT(); 57 .loc 1 139 3 58 0026 254B ldr r3, .L7+4 59 0028 1B68 ldr r3, [r3] 60 002a 244A ldr r2, .L7+4 61 002c 23F48033 bic r3, r3, #65536 62 0030 1360 str r3, [r2] 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 63 .loc 1 140 3 64 0032 224B ldr r3, .L7+4 65 0034 9B68 ldr r3, [r3, #8] 66 0036 214A ldr r2, .L7+4 67 0038 23F48033 bic r3, r3, #65536 68 003c 9360 str r3, [r2, #8] 69 .loc 1 140 44 70 003e 1F4B ldr r3, .L7+4 71 0040 DB68 ldr r3, [r3, #12] 72 0042 1E4A ldr r2, .L7+4 73 0044 23F48033 bic r3, r3, #65536 74 0048 D360 str r3, [r2, #12] 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure interrupt mode */ 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) 75 .loc 1 143 17 76 004a 7B68 ldr r3, [r7, #4] 77 004c 5B68 ldr r3, [r3, #4] 78 .loc 1 143 24 79 004e 03F48033 and r3, r3, #65536 80 .loc 1 143 5 81 0052 002B cmp r3, #0 82 0054 05D0 beq .L2 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT(); 83 .loc 1 145 5 84 0056 194B ldr r3, .L7+4 ARM GAS /tmp/ccb21fMF.s page 5 85 0058 1B68 ldr r3, [r3] 86 005a 184A ldr r2, .L7+4 87 005c 43F48033 orr r3, r3, #65536 88 0060 1360 str r3, [r2] 89 .L2: 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure event mode */ 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) 90 .loc 1 149 17 91 0062 7B68 ldr r3, [r7, #4] 92 0064 5B68 ldr r3, [r3, #4] 93 .loc 1 149 24 94 0066 03F40033 and r3, r3, #131072 95 .loc 1 149 5 96 006a 002B cmp r3, #0 97 006c 05D0 beq .L3 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); 98 .loc 1 151 5 99 006e 134B ldr r3, .L7+4 100 0070 5B68 ldr r3, [r3, #4] 101 0072 124A ldr r2, .L7+4 102 0074 43F48033 orr r3, r3, #65536 103 0078 5360 str r3, [r2, #4] 104 .L3: 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure the edge */ 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) 105 .loc 1 155 17 106 007a 7B68 ldr r3, [r7, #4] 107 007c 5B68 ldr r3, [r3, #4] 108 .loc 1 155 24 109 007e 03F00103 and r3, r3, #1 110 .loc 1 155 5 111 0082 002B cmp r3, #0 112 0084 05D0 beq .L4 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); 113 .loc 1 157 5 114 0086 0D4B ldr r3, .L7+4 115 0088 9B68 ldr r3, [r3, #8] 116 008a 0C4A ldr r2, .L7+4 117 008c 43F48033 orr r3, r3, #65536 118 0090 9360 str r3, [r2, #8] 119 .L4: 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) 120 .loc 1 160 17 121 0092 7B68 ldr r3, [r7, #4] 122 0094 5B68 ldr r3, [r3, #4] 123 .loc 1 160 24 124 0096 03F00203 and r3, r3, #2 125 .loc 1 160 5 126 009a 002B cmp r3, #0 ARM GAS /tmp/ccb21fMF.s page 6 127 009c 05D0 beq .L6 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); 128 .loc 1 162 5 129 009e 074B ldr r3, .L7+4 130 00a0 DB68 ldr r3, [r3, #12] 131 00a2 064A ldr r2, .L7+4 132 00a4 43F48033 orr r3, r3, #65536 133 00a8 D360 str r3, [r2, #12] 134 .L6: 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 135 .loc 1 164 1 136 00aa 00BF nop 137 00ac 0C37 adds r7, r7, #12 138 .cfi_def_cfa_offset 4 139 00ae BD46 mov sp, r7 140 .cfi_def_cfa_register 13 141 @ sp needed 142 00b0 5DF8047B ldr r7, [sp], #4 143 .cfi_restore 7 144 .cfi_def_cfa_offset 0 145 00b4 7047 bx lr 146 .L8: 147 00b6 00BF .align 2 148 .L7: 149 00b8 00700040 .word 1073770496 150 00bc 00040140 .word 1073808384 151 .cfi_endproc 152 .LFE130: 154 .section .text.HAL_PWR_EnablePVD,"ax",%progbits 155 .align 1 156 .global HAL_PWR_EnablePVD 157 .syntax unified 158 .thumb 159 .thumb_func 161 HAL_PWR_EnablePVD: 162 .LFB131: 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Enables the Power Voltage Detector(PVD). 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_EnablePVD(void) 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 163 .loc 1 171 1 164 .cfi_startproc 165 @ args = 0, pretend = 0, frame = 0 166 @ frame_needed = 1, uses_anonymous_args = 0 167 @ link register save eliminated. 168 0000 80B4 push {r7} 169 .cfi_def_cfa_offset 4 170 .cfi_offset 7, -4 171 0002 00AF add r7, sp, #0 172 .cfi_def_cfa_register 7 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** SET_BIT(PWR->CR, PWR_CR_PVDE); 173 .loc 1 172 3 ARM GAS /tmp/ccb21fMF.s page 7 174 0004 054B ldr r3, .L10 175 0006 1B68 ldr r3, [r3] 176 0008 044A ldr r2, .L10 177 000a 43F01003 orr r3, r3, #16 178 000e 1360 str r3, [r2] 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 179 .loc 1 173 1 180 0010 00BF nop 181 0012 BD46 mov sp, r7 182 .cfi_def_cfa_register 13 183 @ sp needed 184 0014 5DF8047B ldr r7, [sp], #4 185 .cfi_restore 7 186 .cfi_def_cfa_offset 0 187 0018 7047 bx lr 188 .L11: 189 001a 00BF .align 2 190 .L10: 191 001c 00700040 .word 1073770496 192 .cfi_endproc 193 .LFE131: 195 .section .text.HAL_PWR_DisablePVD,"ax",%progbits 196 .align 1 197 .global HAL_PWR_DisablePVD 198 .syntax unified 199 .thumb 200 .thumb_func 202 HAL_PWR_DisablePVD: 203 .LFB132: 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Disables the Power Voltage Detector(PVD). 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_DisablePVD(void) 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 204 .loc 1 180 1 205 .cfi_startproc 206 @ args = 0, pretend = 0, frame = 0 207 @ frame_needed = 1, uses_anonymous_args = 0 208 @ link register save eliminated. 209 0000 80B4 push {r7} 210 .cfi_def_cfa_offset 4 211 .cfi_offset 7, -4 212 0002 00AF add r7, sp, #0 213 .cfi_def_cfa_register 7 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR, PWR_CR_PVDE); 214 .loc 1 181 3 215 0004 054B ldr r3, .L13 216 0006 1B68 ldr r3, [r3] 217 0008 044A ldr r2, .L13 218 000a 23F01003 bic r3, r3, #16 219 000e 1360 str r3, [r2] 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 220 .loc 1 182 1 221 0010 00BF nop 222 0012 BD46 mov sp, r7 ARM GAS /tmp/ccb21fMF.s page 8 223 .cfi_def_cfa_register 13 224 @ sp needed 225 0014 5DF8047B ldr r7, [sp], #4 226 .cfi_restore 7 227 .cfi_def_cfa_offset 0 228 0018 7047 bx lr 229 .L14: 230 001a 00BF .align 2 231 .L13: 232 001c 00700040 .word 1073770496 233 .cfi_endproc 234 .LFE132: 236 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits 237 .align 1 238 .global HAL_PWR_PVD_IRQHandler 239 .syntax unified 240 .thumb 241 .thumb_func 243 HAL_PWR_PVD_IRQHandler: 244 .LFB133: 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD interrupt request. 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_IRQHandler(). 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_PVD_IRQHandler(void) 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 245 .loc 1 190 1 246 .cfi_startproc 247 @ args = 0, pretend = 0, frame = 0 248 @ frame_needed = 1, uses_anonymous_args = 0 249 0000 80B5 push {r7, lr} 250 .cfi_def_cfa_offset 8 251 .cfi_offset 7, -8 252 .cfi_offset 14, -4 253 0002 00AF add r7, sp, #0 254 .cfi_def_cfa_register 7 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check PWR exti flag */ 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) 255 .loc 1 192 6 256 0004 064B ldr r3, .L18 257 0006 5B69 ldr r3, [r3, #20] 258 0008 03F48033 and r3, r3, #65536 259 .loc 1 192 5 260 000c 002B cmp r3, #0 261 000e 05D0 beq .L17 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */ 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback(); 262 .loc 1 195 5 263 0010 FFF7FEFF bl HAL_PWR_PVDCallback 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); 264 .loc 1 198 5 265 0014 024B ldr r3, .L18 ARM GAS /tmp/ccb21fMF.s page 9 266 0016 4FF48032 mov r2, #65536 267 001a 5A61 str r2, [r3, #20] 268 .L17: 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 269 .loc 1 200 1 270 001c 00BF nop 271 001e 80BD pop {r7, pc} 272 .L19: 273 .align 2 274 .L18: 275 0020 00040140 .word 1073808384 276 .cfi_endproc 277 .LFE133: 279 .section .text.HAL_PWR_PVDCallback,"ax",%progbits 280 .align 1 281 .weak HAL_PWR_PVDCallback 282 .syntax unified 283 .thumb 284 .thumb_func 286 HAL_PWR_PVDCallback: 287 .LFB134: 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief PWR PVD interrupt callback 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __weak void HAL_PWR_PVDCallback(void) 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { 288 .loc 1 207 1 289 .cfi_startproc 290 @ args = 0, pretend = 0, frame = 0 291 @ frame_needed = 1, uses_anonymous_args = 0 292 @ link register save eliminated. 293 0000 80B4 push {r7} 294 .cfi_def_cfa_offset 4 295 .cfi_offset 7, -4 296 0002 00AF add r7, sp, #0 297 .cfi_def_cfa_register 7 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** the HAL_PWR_PVDCallback could be implemented in the user file 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } 298 .loc 1 211 1 299 0004 00BF nop 300 0006 BD46 mov sp, r7 301 .cfi_def_cfa_register 13 302 @ sp needed 303 0008 5DF8047B ldr r7, [sp], #4 304 .cfi_restore 7 305 .cfi_def_cfa_offset 0 306 000c 7047 bx lr 307 .cfi_endproc 308 .LFE134: 310 .text 311 .Letext0: 312 .file 2 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl ARM GAS /tmp/ccb21fMF.s page 10 313 .file 3 "/nix/store/p8vkamc9b2vlibs9aw76vnasdbifhcbm-gcc-arm-embedded-13.2.rel1/arm-none-eabi/incl 314 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 315 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h" 316 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" ARM GAS /tmp/ccb21fMF.s page 11 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_pwr_ex.c /tmp/ccb21fMF.s:21 .text.HAL_PWR_ConfigPVD:00000000 $t /tmp/ccb21fMF.s:27 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD /tmp/ccb21fMF.s:149 .text.HAL_PWR_ConfigPVD:000000b8 $d /tmp/ccb21fMF.s:155 .text.HAL_PWR_EnablePVD:00000000 $t /tmp/ccb21fMF.s:161 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD /tmp/ccb21fMF.s:191 .text.HAL_PWR_EnablePVD:0000001c $d /tmp/ccb21fMF.s:196 .text.HAL_PWR_DisablePVD:00000000 $t /tmp/ccb21fMF.s:202 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD /tmp/ccb21fMF.s:232 .text.HAL_PWR_DisablePVD:0000001c $d /tmp/ccb21fMF.s:237 .text.HAL_PWR_PVD_IRQHandler:00000000 $t /tmp/ccb21fMF.s:243 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler /tmp/ccb21fMF.s:286 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback /tmp/ccb21fMF.s:275 .text.HAL_PWR_PVD_IRQHandler:00000020 $d /tmp/ccb21fMF.s:280 .text.HAL_PWR_PVDCallback:00000000 $t NO UNDEFINED SYMBOLS