This commit is contained in:
hamza
2024-07-10 01:39:38 +03:00
parent 4375bfce48
commit a86985bfc9
11 changed files with 217 additions and 41 deletions

View File

@ -17,6 +17,8 @@
/* The PWM period (1/FPWM) is defined by the following parameters:
ARR value, the Prescaler value, and the internal clock itself which drives the timer module FCLK.
F_PWM = (F_CLK)/((ARR + 1) * (PSC + 1))
(ARR + 1) * (PSC + 1) = (F_CLK)/(F_PWM)
(PSC + 1) = (F_CLK)/(F_PWM * (ARR + 1))
F_CLK = 16 MHz